4997 lines
296 KiB
Plaintext
4997 lines
296 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: At91x4x On-Chip Peripherals
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; @Props: Released
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; @Author: JAZ
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; @Changelog:
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; 2005-07-13 JAZ
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; 2007-04-04 JAZ
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; @Manufacturer: ATMEL - Atmel Corporation
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; @Doc: doc1354.pdf (2002.09); AT91M40800; AT91M40807; AT91R40807
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; @Core: ARM7TDMI
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; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perat91x4x.per 17440 2024-02-02 15:33:08Z kwisniewski $
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config 16. 8.
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width 0x0b
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base ad:0x00000000
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sif (cpu()=="AT91M40800"||cpu()=="AT91R40008"||cpu()=="AT91FR4042"||cpu()=="AT91FR40162"||cpu()=="AT91R40807")
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tree "External Bus Interface (EBI)"
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base 0xFFE00000
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width 0xa
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if (data.long(ad:0xFFE00000)&0x00000020)==0x00000020
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group.long 0x00++0x03
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line.long 0x00 "EBI_CSR0,Chip Select Register 0"
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hexmask.long 0x00 20.--31. 0x100000 " BA ,Base Address"
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bitfld.long 0x00 13. " CSEN ,Chip Select Enable" "Disabled,Enabled"
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bitfld.long 0x00 12. " BAT ,Byte Access Type" "Byte-write,Byte-select"
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textline " "
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bitfld.long 0x00 9.--11. " TDF ,Data Float Output Time" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 7.--8. " PAGES ,Page Size" "1MB,4MB,16MB,64MB"
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bitfld.long 0x00 5. " WSE ,Wait State Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 2.--4. " NWS ,Number of Wait States" "1,2,3,4,5,6,7,8"
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bitfld.long 0x00 0.--1. " DBW ,Data Bus Width" "Reserved,16-bit,8-bit,?..."
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else
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group.long 0x00++0x03
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line.long 0x00 "EBI_CSR0,Chip Select Register 0"
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hexmask.long 0x00 20.--31. 0x100000 " BA ,Base Address"
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bitfld.long 0x00 13. " CSEN ,Chip Select Enable" "Disabled,Enabled"
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bitfld.long 0x00 12. " BAT ,Byte Access Type" "Byte-write,Byte-select"
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textline " "
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bitfld.long 0x00 9.--11. " TDF ,Data Float Output Time" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 7.--8. " PAGES ,Page Size" "1MB,4MB,16MB,64MB"
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bitfld.long 0x00 5. " WSE ,Wait State Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 0.--1. " DBW ,Data Bus Width" "Reserved,16-bit,8-bit,?..."
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endif
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if (data.long(ad:0xFFE00000+0x04)&0x00000020)==0x00000020
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group.long 0x04++0x03
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line.long 0x00 "EBI_CSR1,Chip Select Register 1"
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hexmask.long 0x00 20.--31. 0x100000 " BA ,Base Address"
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bitfld.long 0x00 13. " CSEN ,Chip Select Enable" "Disabled,Enabled"
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bitfld.long 0x00 12. " BAT ,Byte Access Type" "Byte-write,Byte-select"
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textline " "
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bitfld.long 0x00 9.--11. " TDF ,Data Float Output Time" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 7.--8. " PAGES ,Page Size" "1MB,4MB,16MB,64MB"
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bitfld.long 0x00 5. " WSE ,Wait State Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 2.--4. " NWS ,Number of Wait States" "1,2,3,4,5,6,7,8"
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bitfld.long 0x00 0.--1. " DBW ,Data Bus Width" "Reserved,16-bit,8-bit,?..."
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else
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group.long 0x04++0x03
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line.long 0x00 "EBI_CSR1,Chip Select Register 1"
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hexmask.long 0x00 20.--31. 0x100000 " BA ,Base Address"
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bitfld.long 0x00 13. " CSEN ,Chip Select Enable" "Disabled,Enabled"
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bitfld.long 0x00 12. " BAT ,Byte Access Type" "Byte-write,Byte-select"
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textline " "
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bitfld.long 0x00 9.--11. " TDF ,Data Float Output Time" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 7.--8. " PAGES ,Page Size" "1MB,4MB,16MB,64MB"
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bitfld.long 0x00 5. " WSE ,Wait State Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 0.--1. " DBW ,Data Bus Width" "Reserved,16-bit,8-bit,?..."
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endif
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if (data.long(ad:0xFFE00000+0x08)&0x00000020)==0x00000020
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group.long 0x08++0x03
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line.long 0x00 "EBI_CSR2,Chip Select Register 2"
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hexmask.long 0x00 20.--31. 0x100000 " BA ,Base Address"
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bitfld.long 0x00 13. " CSEN ,Chip Select Enable" "Disabled,Enabled"
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bitfld.long 0x00 12. " BAT ,Byte Access Type" "Byte-write,Byte-select"
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textline " "
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bitfld.long 0x00 9.--11. " TDF ,Data Float Output Time" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 7.--8. " PAGES ,Page Size" "1MB,4MB,16MB,64MB"
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bitfld.long 0x00 5. " WSE ,Wait State Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 2.--4. " NWS ,Number of Wait States" "1,2,3,4,5,6,7,8"
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bitfld.long 0x00 0.--1. " DBW ,Data Bus Width" "Reserved,16-bit,8-bit,?..."
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else
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group.long 0x08++0x03
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line.long 0x00 "EBI_CSR2,Chip Select Register 2"
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hexmask.long 0x00 20.--31. 0x100000 " BA ,Base Address"
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bitfld.long 0x00 13. " CSEN ,Chip Select Enable" "Disabled,Enabled"
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bitfld.long 0x00 12. " BAT ,Byte Access Type" "Byte-write,Byte-select"
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textline " "
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bitfld.long 0x00 9.--11. " TDF ,Data Float Output Time" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 7.--8. " PAGES ,Page Size" "1MB,4MB,16MB,64MB"
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bitfld.long 0x00 5. " WSE ,Wait State Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 0.--1. " DBW ,Data Bus Width" "Reserved,16-bit,8-bit,?..."
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endif
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if (data.long(ad:0xFFE00000+0x0c)&0x00000020)==0x00000020
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group.long 0x0c++0x03
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line.long 0x00 "EBI_CSR3,Chip Select Register 3"
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hexmask.long 0x00 20.--31. 0x100000 " BA ,Base Address"
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bitfld.long 0x00 13. " CSEN ,Chip Select Enable" "Disabled,Enabled"
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bitfld.long 0x00 12. " BAT ,Byte Access Type" "Byte-write,Byte-select"
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textline " "
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bitfld.long 0x00 9.--11. " TDF ,Data Float Output Time" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 7.--8. " PAGES ,Page Size" "1MB,4MB,16MB,64MB"
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bitfld.long 0x00 5. " WSE ,Wait State Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 2.--4. " NWS ,Number of Wait States" "1,2,3,4,5,6,7,8"
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bitfld.long 0x00 0.--1. " DBW ,Data Bus Width" "Reserved,16-bit,8-bit,?..."
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else
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group.long 0x0c++0x03
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line.long 0x00 "EBI_CSR3,Chip Select Register 3"
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hexmask.long 0x00 20.--31. 0x100000 " BA ,Base Address"
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bitfld.long 0x00 13. " CSEN ,Chip Select Enable" "Disabled,Enabled"
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bitfld.long 0x00 12. " BAT ,Byte Access Type" "Byte-write,Byte-select"
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textline " "
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bitfld.long 0x00 9.--11. " TDF ,Data Float Output Time" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 7.--8. " PAGES ,Page Size" "1MB,4MB,16MB,64MB"
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bitfld.long 0x00 5. " WSE ,Wait State Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 0.--1. " DBW ,Data Bus Width" "Reserved,16-bit,8-bit,?..."
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endif
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if (data.long(ad:0xFFE00000+0x10)&0x00000020)==0x00000020
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group.long 0x10++0x03
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line.long 0x00 "EBI_CSR4,Chip Select Register 4"
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hexmask.long 0x00 20.--31. 0x100000 " BA ,Base Address"
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bitfld.long 0x00 13. " CSEN ,Chip Select Enable" "Disabled,Enabled"
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bitfld.long 0x00 12. " BAT ,Byte Access Type" "Byte-write,Byte-select"
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textline " "
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bitfld.long 0x00 9.--11. " TDF ,Data Float Output Time" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 7.--8. " PAGES ,Page Size" "1MB,4MB,16MB,64MB"
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bitfld.long 0x00 5. " WSE ,Wait State Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 2.--4. " NWS ,Number of Wait States" "1,2,3,4,5,6,7,8"
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bitfld.long 0x00 0.--1. " DBW ,Data Bus Width" "Reserved,16-bit,8-bit,?..."
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else
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group.long 0x10++0x03
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line.long 0x00 "EBI_CSR4,Chip Select Register 4"
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hexmask.long 0x00 20.--31. 0x100000 " BA ,Base Address"
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bitfld.long 0x00 13. " CSEN ,Chip Select Enable" "Disabled,Enabled"
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bitfld.long 0x00 12. " BAT ,Byte Access Type" "Byte-write,Byte-select"
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textline " "
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bitfld.long 0x00 9.--11. " TDF ,Data Float Output Time" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 7.--8. " PAGES ,Page Size" "1MB,4MB,16MB,64MB"
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bitfld.long 0x00 5. " WSE ,Wait State Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 0.--1. " DBW ,Data Bus Width" "Reserved,16-bit,8-bit,?..."
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endif
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if (data.long(ad:0xFFE00000+0x14)&0x00000020)==0x00000020
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group.long 0x14++0x03
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line.long 0x00 "EBI_CSR5,Chip Select Register 5"
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hexmask.long 0x00 20.--31. 0x100000 " BA ,Base Address"
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bitfld.long 0x00 13. " CSEN ,Chip Select Enable" "Disabled,Enabled"
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bitfld.long 0x00 12. " BAT ,Byte Access Type" "Byte-write,Byte-select"
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textline " "
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bitfld.long 0x00 9.--11. " TDF ,Data Float Output Time" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 7.--8. " PAGES ,Page Size" "1MB,4MB,16MB,64MB"
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bitfld.long 0x00 5. " WSE ,Wait State Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 2.--4. " NWS ,Number of Wait States" "1,2,3,4,5,6,7,8"
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bitfld.long 0x00 0.--1. " DBW ,Data Bus Width" "Reserved,16-bit,8-bit,?..."
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else
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group.long 0x14++0x03
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line.long 0x00 "EBI_CSR5,Chip Select Register 5"
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hexmask.long 0x00 20.--31. 0x100000 " BA ,Base Address"
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bitfld.long 0x00 13. " CSEN ,Chip Select Enable" "Disabled,Enabled"
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bitfld.long 0x00 12. " BAT ,Byte Access Type" "Byte-write,Byte-select"
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textline " "
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bitfld.long 0x00 9.--11. " TDF ,Data Float Output Time" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 7.--8. " PAGES ,Page Size" "1MB,4MB,16MB,64MB"
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bitfld.long 0x00 5. " WSE ,Wait State Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 0.--1. " DBW ,Data Bus Width" "Reserved,16-bit,8-bit,?..."
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endif
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if (data.long(ad:0xFFE00000+0x18)&0x00000020)==0x00000020
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group.long 0x18++0x03
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line.long 0x00 "EBI_CSR6,Chip Select Register 6"
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hexmask.long 0x00 20.--31. 0x100000 " BA ,Base Address"
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bitfld.long 0x00 13. " CSEN ,Chip Select Enable" "Disabled,Enabled"
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bitfld.long 0x00 12. " BAT ,Byte Access Type" "Byte-write,Byte-select"
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textline " "
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bitfld.long 0x00 9.--11. " TDF ,Data Float Output Time" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 7.--8. " PAGES ,Page Size" "1MB,4MB,16MB,64MB"
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bitfld.long 0x00 5. " WSE ,Wait State Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 2.--4. " NWS ,Number of Wait States" "1,2,3,4,5,6,7,8"
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bitfld.long 0x00 0.--1. " DBW ,Data Bus Width" "Reserved,16-bit,8-bit,?..."
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else
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group.long 0x18++0x03
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line.long 0x00 "EBI_CSR6,Chip Select Register 6"
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hexmask.long 0x00 20.--31. 0x100000 " BA ,Base Address"
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bitfld.long 0x00 13. " CSEN ,Chip Select Enable" "Disabled,Enabled"
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bitfld.long 0x00 12. " BAT ,Byte Access Type" "Byte-write,Byte-select"
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textline " "
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bitfld.long 0x00 9.--11. " TDF ,Data Float Output Time" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 7.--8. " PAGES ,Page Size" "1MB,4MB,16MB,64MB"
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bitfld.long 0x00 5. " WSE ,Wait State Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 0.--1. " DBW ,Data Bus Width" "Reserved,16-bit,8-bit,?..."
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endif
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if (data.long(ad:0xFFE00000+0x1c)&0x00000020)==0x00000020
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group.long 0x1c++0x03
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line.long 0x00 "EBI_CSR7,Chip Select Register 7"
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hexmask.long 0x00 20.--31. 0x100000 " BA ,Base Address"
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bitfld.long 0x00 13. " CSEN ,Chip Select Enable" "Disabled,Enabled"
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bitfld.long 0x00 12. " BAT ,Byte Access Type" "Byte-write,Byte-select"
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textline " "
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bitfld.long 0x00 9.--11. " TDF ,Data Float Output Time" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 7.--8. " PAGES ,Page Size" "1MB,4MB,16MB,64MB"
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bitfld.long 0x00 5. " WSE ,Wait State Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 2.--4. " NWS ,Number of Wait States" "1,2,3,4,5,6,7,8"
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bitfld.long 0x00 0.--1. " DBW ,Data Bus Width" "Reserved,16-bit,8-bit,?..."
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else
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group.long 0x1c++0x03
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line.long 0x00 "EBI_CSR7,Chip Select Register 7"
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hexmask.long 0x00 20.--31. 0x100000 " BA ,Base Address"
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bitfld.long 0x00 13. " CSEN ,Chip Select Enable" "Disabled,Enabled"
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bitfld.long 0x00 12. " BAT ,Byte Access Type" "Byte-write,Byte-select"
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textline " "
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bitfld.long 0x00 9.--11. " TDF ,Data Float Output Time" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 7.--8. " PAGES ,Page Size" "1MB,4MB,16MB,64MB"
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bitfld.long 0x00 5. " WSE ,Wait State Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 0.--1. " DBW ,Data Bus Width" "Reserved,16-bit,8-bit,?..."
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endif
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wgroup.long 0x20++0x03
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line.long 0x00 "EBI_RCR,Remap Control Register"
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bitfld.long 0x00 0. " RCB ,Remap Command Bit" "No effect,Canceled"
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group.long 0x24++0x03
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line.long 0x00 "EBI_MCR,Memory Control Register"
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bitfld.long 0x00 4. " DRP ,Data Read Protocol" "Standard,Early"
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bitfld.long 0x00 0.--2. " ALE ,Address Line Enable" "A20/A21/A22/A23,A20/A21/A22/A23,A20/A21/A22/A23,A20/A21/A22/A23,A20/A21/A22,A20/A21,A20,None"
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width 0xb
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tree.end
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tree "Power Saving (PS)"
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base 0xFFFF4000
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width 17.
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wgroup.long 0x00--0x0b
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line.long 0x00 "PS_CR,Control Register"
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bitfld.long 0x00 0. " CPU ,CPU Clock Disable" "No effect,Disabled"
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group.long 0x0c++0x03
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line.long 0x00 "PS_PCSR_Set/Clr,Peripheral Clock Status Register"
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setclrfld.long 0x00 8. -0x8 8. -0x4 8. " PIO ,Parallel IO Clock Status" "Disabled,Enabled"
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setclrfld.long 0x00 6. -0x8 6. -0x4 6. " TC2 ,Timer Counter 2 Clock Status" "Disabled,Enabled"
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setclrfld.long 0x00 5. -0x8 5. -0x4 5. " TC1 ,Timer Counter 1 Clock Status" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 4. -0x8 4. -0x4 4. " TC0 ,Timer Counter 0 Clock Status" "Disabled,Enabled"
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setclrfld.long 0x00 3. -0x8 3. -0x4 3. " US1 ,USART 1 Clock Status" "Disabled,Enabled"
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setclrfld.long 0x00 2. -0x8 2. -0x4 2. " US0 ,USART 0 Clock Status" "Disabled,Enabled"
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width 0xb
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tree.end
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tree "Advanced Interrupt Controller (AIC)"
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base 0xFFFFF000
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width 0xb
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tree "Source Mode Registers"
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group.long 0x00++0x03
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line.long 0x00 "AIC_SMR0,Source Mode Register 0"
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bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
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bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
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group.long 0x04++0x03
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line.long 0x00 "AIC_SMR1,Source Mode Register 1"
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bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
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bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
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group.long 0x08++0x03
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line.long 0x00 "AIC_SMR2,Source Mode Register 2"
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bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
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bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
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group.long 0x0c++0x03
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line.long 0x00 "AIC_SMR3,Source Mode Register 3"
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bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
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bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
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group.long 0x10++0x03
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line.long 0x00 "AIC_SMR4,Source Mode Register 4"
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bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
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bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
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group.long 0x14++0x03
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line.long 0x00 "AIC_SMR5,Source Mode Register 5"
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bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
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bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
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group.long 0x18++0x03
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line.long 0x00 "AIC_SMR6,Source Mode Register 6"
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bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
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bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
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group.long 0x1c++0x03
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line.long 0x00 "AIC_SMR7,Source Mode Register 7"
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bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "AIC_SMR8,Source Mode Register 8"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "AIC_SMR9,Source Mode Register 9"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "AIC_SMR10,Source Mode Register 10"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x2c++0x03
|
|
line.long 0x00 "AIC_SMR11,Source Mode Register 11"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "AIC_SMR12,Source Mode Register 12"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "AIC_SMR13,Source Mode Register 13"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "AIC_SMR14,Source Mode Register 14"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x3c++0x03
|
|
line.long 0x00 "AIC_SMR15,Source Mode Register 15"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "AIC_SMR16,Source Mode Register 16"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "AIC_SMR17,Source Mode Register 17"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "AIC_SMR18,Source Mode Register 18"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x4c++0x03
|
|
line.long 0x00 "AIC_SMR19,Source Mode Register 19"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "AIC_SMR20,Source Mode Register 20"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "AIC_SMR21,Source Mode Register 21"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "AIC_SMR22,Source Mode Register 22"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x5c++0x03
|
|
line.long 0x00 "AIC_SMR23,Source Mode Register 23"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "AIC_SMR24,Source Mode Register 24"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "AIC_SMR25,Source Mode Register 25"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "AIC_SMR26,Source Mode Register 26"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x6c++0x03
|
|
line.long 0x00 "AIC_SMR27,Source Mode Register 27"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "AIC_SMR28,Source Mode Register 28"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "AIC_SMR29,Source Mode Register 29"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "AIC_SMR30,Source Mode Register 30"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x7c++0x03
|
|
line.long 0x00 "AIC_SMR31,Source Mode Register 31"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
tree.end
|
|
tree "Source Vector Registers"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "AIC_SVR0,Source Vector Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "AIC_SVR1,Source Vector Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "AIC_SVR2,Source Vector Register 2"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0x8c++0x03
|
|
line.long 0x00 "AIC_SVR3,Source Vector Register 3"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "AIC_SVR4,Source Vector Register 4"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "AIC_SVR5,Source Vector Register 5"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "AIC_SVR6,Source Vector Register 6"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0x9c++0x03
|
|
line.long 0x00 "AIC_SVR7,Source Vector Register 7"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xa0++0x03
|
|
line.long 0x00 "AIC_SVR8,Source Vector Register 8"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xa4++0x03
|
|
line.long 0x00 "AIC_SVR9,Source Vector Register 9"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xa8++0x03
|
|
line.long 0x00 "AIC_SVR10,Source Vector Register 10"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xac++0x03
|
|
line.long 0x00 "AIC_SVR11,Source Vector Register 11"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xb0++0x03
|
|
line.long 0x00 "AIC_SVR12,Source Vector Register 12"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xb4++0x03
|
|
line.long 0x00 "AIC_SVR13,Source Vector Register 13"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xb8++0x03
|
|
line.long 0x00 "AIC_SVR14,Source Vector Register 14"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xbc++0x03
|
|
line.long 0x00 "AIC_SVR15,Source Vector Register 15"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xc0++0x03
|
|
line.long 0x00 "AIC_SVR16,Source Vector Register 16"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xc4++0x03
|
|
line.long 0x00 "AIC_SVR17,Source Vector Register 17"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xc8++0x03
|
|
line.long 0x00 "AIC_SVR18,Source Vector Register 18"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xcc++0x03
|
|
line.long 0x00 "AIC_SVR19,Source Vector Register 19"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xd0++0x03
|
|
line.long 0x00 "AIC_SVR20,Source Vector Register 20"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xd4++0x03
|
|
line.long 0x00 "AIC_SVR21,Source Vector Register 21"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xd8++0x03
|
|
line.long 0x00 "AIC_SVR22,Source Vector Register 22"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xdc++0x03
|
|
line.long 0x00 "AIC_SVR23,Source Vector Register 23"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xe0++0x03
|
|
line.long 0x00 "AIC_SVR24,Source Vector Register 24"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xe4++0x03
|
|
line.long 0x00 "AIC_SVR25,Source Vector Register 25"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xe8++0x03
|
|
line.long 0x00 "AIC_SVR26,Source Vector Register 26"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xec++0x03
|
|
line.long 0x00 "AIC_SVR27,Source Vector Register 27"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xf0++0x03
|
|
line.long 0x00 "AIC_SVR28,Source Vector Register 28"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xf4++0x03
|
|
line.long 0x00 "AIC_SVR29,Source Vector Register 29"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xf8++0x03
|
|
line.long 0x00 "AIC_SVR30,Source Vector Register 30"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xfc++0x03
|
|
line.long 0x00 "AIC_SVR31,Source Vector Register 31"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
tree.end
|
|
tree "Interrupt Registers"
|
|
rgroup.long 0x100++3
|
|
line.long 0x00 "AIC_IVR,Interrupt Vector Register"
|
|
hexfld.long 0x00 " IRQV ,Interrupt Vector Register"
|
|
rgroup.long 0x104++3
|
|
line.long 0x0 "AIC_FVR,Fast Interrupt Vector Register"
|
|
hexfld.long 0x0 " FIQV ,FIQ Vector Register"
|
|
rgroup.long 0x108++3
|
|
line.long 0x0 "AIC_ISR,Interrupt Status Register"
|
|
hexmask.long.byte 0x0 0.--4. 1. " IRQID ,Current Interrupt Identifier"
|
|
width 0x11
|
|
group.long 0x10c++3
|
|
line.long 0x0 "AIC_IPR_Set/Clr,Interrupt Pending Register Set/Clear"
|
|
setclrfld.long 0x0 18. 0x20 18. 0x1c 18. " IRQ2 ,External Interrupt 2 Pending" "Inactive,Pending"
|
|
setclrfld.long 0x0 17. 0x20 17. 0x1c 17. " IRQ1 ,External Interrupt 1 Pending" "Inactive,Pending"
|
|
setclrfld.long 0x0 16. 0x20 16. 0x1c 16. " IRQ0 ,External Interrupt 0 Pending" "Inactive,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0 8. 0x20 8. 0x1c 8. " PIOIRQ ,Parallel I/O Controller Interrupt Pending" "Inactive,Pending"
|
|
setclrfld.long 0x0 7. 0x20 7. 0x1c 7. " WDIRQ ,Watchdog Interrupt Pending" "Inactive,Pending"
|
|
setclrfld.long 0x0 6. 0x20 6. 0x1c 6. " TC2IRQ ,Timer Channel 2 Interrupt Pending" "Inactive,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0 5. 0x20 5. 0x1c 5. " TC1IRQ ,Timer Channel 1 Interrupt Pending" "Inactive,Pending"
|
|
setclrfld.long 0x0 4. 0x20 4. 0x1c 4. " TC0IRQ ,Timer Channel 0 Interrupt Pending" "Inactive,Pending"
|
|
setclrfld.long 0x0 3. 0x20 3. 0x1c 3. " US1IRQ ,USART Channel 1 Interrupt Pending" "Inactive,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0 2. 0x20 2. 0x1c 2. " UR0IRQ ,USART Channel 0 Interrupt Pending" "Inactive,Pending"
|
|
setclrfld.long 0x0 1. 0x20 1. 0x1c 1. " SWIRQ ,Software Interrupt Pending" "Inactive,Pending"
|
|
setclrfld.long 0x0 0. 0x20 0. 0x1c 0. " FIQ ,Fast Interrupt Pending" "Inactive,Pending"
|
|
group.long 0x110++3
|
|
line.long 0x0 "AIC_IMR_Set/Clr,Interrupt Mask Register Set/Clear"
|
|
setclrfld.long 0x0 18. 0x10 18. 0x14 18. " IRQ2 ,External Interrupt 2 Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0 17. 0x10 17. 0x14 18. " IRQ1 ,External Interrupt 1 Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0 16. 0x10 16. 0x14 16. " IRQ0 ,External Interrupt 0 Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 8. 0x10 8. 0x14 8. " PIOIRQ ,Parallel I/O Controller Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0 7. 0x10 7. 0x14 7. " WDIRQ ,Watchdog Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0 6. 0x10 6. 0x14 6. " TC2IRQ ,Timer Channel 2 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 5. 0x10 5. 0x14 5. " TC1IRQ ,Timer Channel 1 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0 4. 0x10 4. 0x14 4. " TC0IRQ ,Timer Channel 0 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0 3. 0x10 3. 0x14 3. " US1IRQ ,USART Channel 1 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0 2. 0x10 2. 0x14 2. " UR0IRQ ,USART Channel 0 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0 1. 0x10 1. 0x14 1. " SWIRQ ,Software Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0 0. 0x10 0. 0x14 0. " FIQ ,Fast Interrupt Mask" "Disabled,Enabled"
|
|
width 0xb
|
|
rgroup.long 0x114++3
|
|
line.long 0x0 "AIC_CISR,Core Interrupt Status Register"
|
|
bitfld.long 0x0 1. " NIRQ ,NIRQ Status" "Inactive,Active"
|
|
bitfld.long 0x0 0. " NFIQ ,NFIQ Status" "Inactive,Active"
|
|
hgroup.long 0x130++3
|
|
hide.long 0x0 "AIC_EOICR,End of Interrupt Command Register"
|
|
tree.end
|
|
width 0x9
|
|
tree "Spurious Interrupt nad Debug Control Register"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "AIC_SPU,Spurious Interrupt Vector Register"
|
|
hexfld.long 0x00 " SIUVEC ,Spurious Interrupt Vector Handler Register"
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree "Parallel Input/Output Controller (PIO)"
|
|
base 0xFFFF0000
|
|
width 0x12
|
|
tree "PIO"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "PIO_PSR_Set/Clr,PIO Status Register"
|
|
setclrfld.long 0x00 31. -0x8 31. -0x4 31. " A23/CS4 ,Address 23/Chip Select 4 Status" "Inactive,Active"
|
|
setclrfld.long 0x00 30. -0x8 30. -0x4 30. " A22/CS5 ,Address 22/Chip Select 5 Status" "Inactive,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x8 29. -0x4 29. " A21/CS6 ,Address 21/Chip Select 6 Status" "Inactive,Active"
|
|
setclrfld.long 0x00 28. -0x8 28. -0x4 28. " A20/CS7 ,Address 20/Chip Select 7 Status" "Inactive,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x8 27. -0x4 27. " NCS3 ,Chip Select 3 Status" "Inactive,Active"
|
|
setclrfld.long 0x00 26. -0x8 26. -0x4 26. " NCS2 ,Chip Select 2 Status" "Inactive,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x8 25. -0x4 25. " MCKO ,Master Clock Output Status" "Inactive,Active"
|
|
setclrfld.long 0x00 22. -0x8 22. -0x4 22. " RXD1 ,USART 1 Receive Data Signal Status" "Inactive,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x8 21. -0x4 21. " TXD1 ,USART 1 Transmit Data Signal Status" "Inactive,Active"
|
|
setclrfld.long 0x00 20. -0x8 20. -0x4 20. " SCK1 ,USART 1 Clock Signal Status" "Inactive,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x8 15. -0x4 15. " RXD0 ,USART 0 Receive Data Signal Status" "Inactive,Active"
|
|
setclrfld.long 0x00 14. -0x8 14. -0x4 14. " TXD0 ,USART 0 Transmit Data Signal Status" "Inactive,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x8 13. -0x4 13. " SCK0 ,USART 0 Clock Signal Status" "Inactive,Active"
|
|
setclrfld.long 0x00 12. -0x8 12. -0x4 12. " FIQ ,Fast Interrupt Status" "Inactive,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x8 11. -0x4 11. " IRQ2 ,External Interrupt 2 Status" "Inactive,Active"
|
|
setclrfld.long 0x00 10. -0x8 10. -0x4 10. " IRQ1 ,External Interrupt 1 Status" "Inactive,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x8 9. -0x4 9. " IRQ0 ,External Interrupt 0 Status" "Inactive,Active"
|
|
setclrfld.long 0x00 8. -0x8 8. -0x4 8. " TIOB2 ,Timer 2 Signal B Status" "Inactive,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x8 7. -0x4 7. " TIOA2 ,Timer 2 Signal A Status" "Inactive,Active"
|
|
setclrfld.long 0x00 6. -0x8 6. -0x4 6. " TCLK2 ,Timer 2 Clock signal Status" "Inactive,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x8 5. -0x4 5. " TIOB1 ,Timer 1 Signal B Status" "Inactive,Active"
|
|
setclrfld.long 0x00 4. -0x8 4. -0x4 4. " TIOA1 ,Timer 1 Signal A Status" "Inactive,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x8 3. -0x4 3. " TCLK1 ,Timer 1 Clock Signal Status" "Inactive,Active"
|
|
setclrfld.long 0x00 2. -0x8 2. -0x4 2. " TIOB0 ,Timer 0 Signal B Status" "Inactive,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x8 1. -0x4 1. " TIOA0 ,Timer 0 Signal A Status" "Inactive,Active"
|
|
setclrfld.long 0x00 0. -0x8 0. -0x4 0. " TCLK0 ,Timer 0 Clock Signal Status" "Inactive,Active"
|
|
tree.end
|
|
tree "Output"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PIO_OSR_Set/Clr,Output Status Register"
|
|
setclrfld.long 0x00 31. -0x8 31. -0x4 31. " A23/CS4 ,Address 23/Chip Select 4 Output Status" "Input,Output"
|
|
setclrfld.long 0x00 30. -0x8 30. -0x4 30. " A22/CS5 ,Address 22/Chip Select 5 Output Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x8 29. -0x4 29. " A21/CS6 ,Address 21/Chip Select 6 Output Status" "Input,Output"
|
|
setclrfld.long 0x00 28. -0x8 28. -0x4 28. " A20/CS7 ,Address 20/Chip Select 7 Output Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x8 27. -0x4 27. " NCS3 ,Chip Select 3 Output Status" "Input,Output"
|
|
setclrfld.long 0x00 26. -0x8 26. -0x4 26. " NCS2 ,Chip Select 2 Output Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x8 25. -0x4 25. " MCKO ,Master Clock Output Status" "Input,Output"
|
|
setclrfld.long 0x00 22. -0x8 22. -0x4 22. " RXD1 ,USART 1 Receive Data Signal Output Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x8 21. -0x4 21. " TXD1 ,USART 1 Transmit Data Signal Output Status" "Input,Output"
|
|
setclrfld.long 0x00 20. -0x8 20. -0x4 20. " SCK1 ,USART 1 Clock Signal Output Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x8 15. -0x4 15. " RXD0 ,USART 0 Receive Data Signal Output Status" "Input,Output"
|
|
setclrfld.long 0x00 14. -0x8 14. -0x4 14. " TXD0 ,USART 0 Transmit Data Signal Output Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x8 13. -0x4 13. " SCK0 ,USART 0 Clock Signal Output Status" "Input,Output"
|
|
setclrfld.long 0x00 12. -0x8 12. -0x4 12. " FIQ ,Fast Interrupt Output Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x8 11. -0x4 11. " IRQ2 ,External Interrupt 2 Output Status" "Input,Output"
|
|
setclrfld.long 0x00 10. -0x8 10. -0x4 10. " IRQ1 ,External Interrupt 1 Output Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x8 9. -0x4 9. " IRQ0 ,External Interrupt 0 Output Status" "Input,Output"
|
|
setclrfld.long 0x00 8. -0x8 8. -0x4 8. " TIOB2 ,Timer 2 Signal B Output Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x8 7. -0x4 7. " TIOA2 ,Timer 2 Signal A Output Status" "Input,Output"
|
|
setclrfld.long 0x00 6. -0x8 6. -0x4 6. " TCLK2 ,Timer 2 Clock signal Output Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x8 5. -0x4 5. " TIOB1 ,Timer 1 Signal B Output Status" "Input,Output"
|
|
setclrfld.long 0x00 4. -0x8 4. -0x4 4. " TIOA1 ,Timer 1 Signal A Output Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x8 3. -0x4 3. " TCLK1 ,Timer 1 Clock Signal Output Status" "Input,Output"
|
|
setclrfld.long 0x00 2. -0x8 2. -0x4 2. " TIOB0 ,Timer 0 Signal B Output Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x8 1. -0x4 1. " TIOA0 ,Timer 0 Signal A Output Status" "Input,Output"
|
|
setclrfld.long 0x00 0. -0x8 0. -0x4 0. " TCLK0 ,Timer 0 Clock Signal Output Status" "Input,Output"
|
|
tree.end
|
|
tree "Filter"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PIO_IFSR_Set/Clr,Glitch Input Filter Status Register"
|
|
setclrfld.long 0x00 31. -0x8 31. -0x4 31. " A23/CS4 ,Address 23/Chip Select 4 Glitch Filter Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x8 30. -0x4 30. " A22/CS5 ,Address 22/Chip Select 5 Glitch Filter Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x8 29. -0x4 29. " A21/CS6 ,Address 21/Chip Select 6 Glitch Filter Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. -0x8 28. -0x4 28. " A20/CS7 ,Address 20/Chip Select 7 Glitch Filter Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x8 27. -0x4 27. " NCS3 ,Chip Select 3 Glitch Filter Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. -0x8 26. -0x4 26. " NCS2 ,Chip Select 2 Glitch Filter Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x8 25. -0x4 25. " MCKO ,Master Clock Output Glitch Filter Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. -0x8 22. -0x4 22. " RXD1 ,USART 1 Receive Data Signal Glitch Filter Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x8 21. -0x4 21. " TXD1 ,USART 1 Transmit Data Signal Glitch Filter Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. -0x8 20. -0x4 20. " SCK1 ,USART 1 Clock Signal Glitch Filter Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x8 15. -0x4 15. " RXD0 ,USART 0 Receive Data Signal Glitch Filter Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x8 14. -0x4 14. " TXD0 ,USART 0 Transmit Data Signal Glitch Filter Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x8 13. -0x4 13. " SCK0 ,USART 0 Clock Signal Glitch Filter Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x8 12. -0x4 12. " FIQ ,Fast Interrupt Glitch Filter Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x8 11. -0x4 11. " IRQ2 ,External Interrupt 2 Glitch Filter Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x8 10. -0x4 10. " IRQ1 ,External Interrupt 1 Glitch Filter Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x8 9. -0x4 9. " IRQ0 ,External Interrupt 0 Glitch Filter Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x8 8. -0x4 8. " TIOB2 ,Timer 2 Signal B Glitch Filter Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x8 7. -0x4 7. " TIOA2 ,Timer 2 Signal A Glitch Filter Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x8 6. -0x4 6. " TCLK2 ,Timer 2 Clock signal Glitch Filter Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x8 5. -0x4 5. " TIOB1 ,Timer 1 Signal B Glitch Filter Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x8 4. -0x4 4. " TIOA1 ,Timer 1 Signal A Glitch Filter Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x8 3. -0x4 3. " TCLK1 ,Timer 1 Clock Signal Glitch Filter Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x8 2. -0x4 2. " TIOB0 ,Timer 0 Signal B Glitch Filter Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x8 1. -0x4 1. " TIOA0 ,Timer 0 Signal A Glitch Filter Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x8 0. -0x4 0. " TCLK0 ,Timer 0 Clock Signal Glitch Filter Status" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Data"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "PIO_ODSR_Set/Clr,Output Data Status Register"
|
|
setclrfld.long 0x00 31. -0x8 31. -0x4 31. " A23/CS4 ,Address 23/Chip Select 4 Output Data Status" "0,1"
|
|
setclrfld.long 0x00 30. -0x8 30. -0x4 30. " A22/CS5 ,Address 22/Chip Select 5 Output Data Status" "0,1"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x8 29. -0x4 29. " A21/CS6 ,Address 21/Chip Select 6 Output Data Status" "0,1"
|
|
setclrfld.long 0x00 28. -0x8 28. -0x4 28. " A20/CS7 ,Address 20/Chip Select 7 Output Data Status" "0,1"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x8 27. -0x4 27. " NCS3 ,Chip Select 3 Output Data Status" "0,1"
|
|
setclrfld.long 0x00 26. -0x8 26. -0x4 26. " NCS2 ,Chip Select 2 Output Data Status" "0,1"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x8 25. -0x4 25. " MCKO ,Master Clock Output Output Data Status" "0,1"
|
|
setclrfld.long 0x00 22. -0x8 22. -0x4 22. " RXD1 ,USART 1 Receive Data Signal Output Data Status" "0,1"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x8 21. -0x4 21. " TXD1 ,USART 1 Transmit Data Signal Output Data Status" "0,1"
|
|
setclrfld.long 0x00 20. -0x8 20. -0x4 20. " SCK1 ,USART 1 Clock Signal Output Data Status" "0,1"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x8 15. -0x4 15. " RXD0 ,USART 0 Receive Data Signal Output Data Status" "0,1"
|
|
setclrfld.long 0x00 14. -0x8 14. -0x4 14. " TXD0 ,USART 0 Transmit Data Signal Output Data Status" "0,1"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x8 13. -0x4 13. " SCK0 ,USART 0 Clock Signal Output Data Status" "0,1"
|
|
setclrfld.long 0x00 12. -0x8 12. -0x4 12. " FIQ ,Fast Interrupt Output Data Status" "0,1"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x8 11. -0x4 11. " IRQ2 ,External Interrupt 2 Output Data Status" "0,1"
|
|
setclrfld.long 0x00 10. -0x8 10. -0x4 10. " IRQ1 ,External Interrupt 1 Output Data Status" "0,1"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x8 9. -0x4 9. " IRQ0 ,External Interrupt 0 Output Data Status" "0,1"
|
|
setclrfld.long 0x00 8. -0x8 8. -0x4 8. " TIOB2 ,Timer 2 Signal B Output Data Status" "0,1"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x8 7. -0x4 7. " TIOA2 ,Timer 2 Signal A Output Data Status" "0,1"
|
|
setclrfld.long 0x00 6. -0x8 6. -0x4 6. " TCLK2 ,Timer 2 Clock signal Output Data Status" "0,1"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x8 5. -0x4 5. " TIOB1 ,Timer 1 Signal B Output Data Status" "0,1"
|
|
setclrfld.long 0x00 4. -0x8 4. -0x4 4. " TIOA1 ,Timer 1 Signal A Output Data Status" "0,1"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x8 3. -0x4 3. " TCLK1 ,Timer 1 Clock Signal Output Data Status" "0,1"
|
|
setclrfld.long 0x00 2. -0x8 2. -0x4 2. " TIOB0 ,Timer 0 Signal B Output Data Status" "0,1"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x8 1. -0x4 1. " TIOA0 ,Timer 0 Signal A Output Data Status" "0,1"
|
|
setclrfld.long 0x00 0. -0x8 0. -0x4 0. " TCLK0 ,Timer 0 Clock Signal Output Data Status" "0,1"
|
|
rgroup.long 0x3c++0x03
|
|
line.long 0x00 "PIO_PDSR,Pin Data Status Register"
|
|
bitfld.long 0x00 31. " A23/CS4 ,Address 23/Chip Select 4 Pin Data Status" "Low,High"
|
|
bitfld.long 0x00 30. " A22/CS5 ,Address 22/Chip Select 5 Pin Data Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 29. " A21/CS6 ,Address 21/Chip Select 6 Pin Data Status" "Low,High"
|
|
bitfld.long 0x00 28. " A20/CS7 ,Address 20/Chip Select 7 Pin Data Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " NCS3 ,Chip Select 3 Pin Data Status" "Low,High"
|
|
bitfld.long 0x00 26. " NCS2 ,Chip Select 2 Pin Data Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " MCKO ,Master Clock Pin Pin Data Status" "Low,High"
|
|
bitfld.long 0x00 22. " RXD1 ,USART 1 Receive Data Signal Pin Data Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TXD1 ,USART 1 Transmit Data Signal Pin Data Status" "Low,High"
|
|
bitfld.long 0x00 20. " SCK1 ,USART 1 Clock Signal Pin Data Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RXD0 ,USART 0 Receive Data Signal Pin Data Status" "Low,High"
|
|
bitfld.long 0x00 14. " TXD0 ,USART 0 Transmit Data Signal Pin Data Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SCK0 ,USART 0 Clock Signal Pin Data Status" "Low,High"
|
|
bitfld.long 0x00 12. " FIQ ,Fast Interrupt Pin Data Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQ2 ,External Interrupt 2 Pin Data Status" "Low,High"
|
|
bitfld.long 0x00 10. " IRQ1 ,External Interrupt 1 Pin Data Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " IRQ0 ,External Interrupt 0 Pin Data Status" "Low,High"
|
|
bitfld.long 0x00 8. " TIOB2 ,Timer 2 Signal B Pin Data Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TIOA2 ,Timer 2 Signal A Pin Data Status" "Low,High"
|
|
bitfld.long 0x00 6. " TCLK2 ,Timer 2 Clock signal Pin Data Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TIOB1 ,Timer 1 Signal B Pin Data Status" "Low,High"
|
|
bitfld.long 0x00 4. " TIOA1 ,Timer 1 Signal A Pin Data Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TCLK1 ,Timer 1 Clock Signal Pin Data Status" "Low,High"
|
|
bitfld.long 0x00 2. " TIOB0 ,Timer 0 Signal B Pin Data Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TIOA0 ,Timer 0 Signal A Pin Data Status" "Low,High"
|
|
bitfld.long 0x00 0. " TCLK0 ,Timer 0 Clock Signal Pin Data Status" "Low,High"
|
|
tree.end
|
|
tree "Interrupt"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PIO_IMR_Set/Clr,Interrupt Mask Register"
|
|
setclrfld.long 0x00 31. -0x8 31. -0x4 31. " A23/CS4 ,Address 23/Chip Select 4 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x8 30. -0x4 30. " A22/CS5 ,Address 22/Chip Select 5 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x8 29. -0x4 29. " A21/CS6 ,Address 21/Chip Select 6 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. -0x8 28. -0x4 28. " A20/CS7 ,Address 20/Chip Select 7 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x8 27. -0x4 27. " NCS3 ,Chip Select 3 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. -0x8 26. -0x4 26. " NCS2 ,Chip Select 2 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x8 25. -0x4 25. " MCKO ,Master Clock Output Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. -0x8 22. -0x4 22. " RXD1 ,USART 1 Receive Data Signal Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x8 21. -0x4 21. " TXD1 ,USART 1 Transmit Data Signal Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. -0x8 20. -0x4 20. " SCK1 ,USART 1 Clock Signal Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x8 15. -0x4 15. " RXD0 ,USART 0 Receive Data Signal Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x8 14. -0x4 14. " TXD0 ,USART 0 Transmit Data Signal Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x8 13. -0x4 13. " SCK0 ,USART 0 Clock Signal Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x8 12. -0x4 12. " FIQ ,Fast Interrupt Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x8 11. -0x4 11. " IRQ2 ,External Interrupt 2 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x8 10. -0x4 10. " IRQ1 ,External Interrupt 1 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x8 9. -0x4 9. " IRQ0 ,External Interrupt 0 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x8 8. -0x4 8. " TIOB2 ,Timer 2 Signal B Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x8 7. -0x4 7. " TIOA2 ,Timer 2 Signal A Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x8 6. -0x4 6. " TCLK2 ,Timer 2 Clock signal Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x8 5. -0x4 5. " TIOB1 ,Timer 1 Signal B Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x8 4. -0x4 4. " TIOA1 ,Timer 1 Signal A Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x8 3. -0x4 3. " TCLK1 ,Timer 1 Clock Signal Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x8 2. -0x4 2. " TIOB0 ,Timer 0 Signal B Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x8 1. -0x4 1. " TIOA0 ,Timer 0 Signal A Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x8 0. -0x4 0. " TCLK0 ,Timer 0 Clock Signal Interrupt Mask" "Disabled,Enabled"
|
|
rgroup.long 0x4c++0x03
|
|
line.long 0x00 "PIO_ISR,Interrupt Status Register"
|
|
bitfld.long 0x00 31. " A23/CS4 ,Address 23/Chip Select 4 Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. " A22/CS5 ,Address 22/Chip Select 5 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 29. " A21/CS6 ,Address 21/Chip Select 6 Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 28. " A20/CS7 ,Address 20/Chip Select 7 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 27. " NCS3 ,Chip Select 3 Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 26. " NCS2 ,Chip Select 2 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 25. " MCKO ,Master Clock Output Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 22. " RXD1 ,USART 1 Receive Data Signal Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TXD1 ,USART 1 Transmit Data Signal Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " SCK1 ,USART 1 Clock Signal Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RXD0 ,USART 0 Receive Data Signal Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " TXD0 ,USART 0 Transmit Data Signal Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SCK0 ,USART 0 Clock Signal Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " FIQ ,Fast Interrupt Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQ2 ,External Interrupt 2 Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10. " IRQ1 ,External Interrupt 1 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 9. " IRQ0 ,External Interrupt 0 Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " TIOB2 ,Timer 2 Signal B Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TIOA2 ,Timer 2 Signal A Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " TCLK2 ,Timer 2 Clock signal Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TIOB1 ,Timer 1 Signal B Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " TIOA1 ,Timer 1 Signal A Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TCLK1 ,Timer 1 Clock Signal Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " TIOB0 ,Timer 0 Signal B Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TIOA0 ,Timer 0 Signal A Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " TCLK0 ,Timer 0 Clock Signal Interrupt Status" "No interrupt,Interrupt"
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree "Watchdog Timer (WDT)"
|
|
base 0xFFFF8000
|
|
width 0x9
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "WD_OMR,Overflow Mode Register"
|
|
hexmask.long.word 0x00 4.--15. 1. " OKEY ,Overflow Access Key"
|
|
bitfld.long 0x00 3. " EXTEN ,External Signal Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " IRQEN ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RSTEN ,Reset Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " WDEN ,Watchdog Enable" "Disabled,Enabled"
|
|
line.long 0x04 "WDT_CMR,Clock Mode Register"
|
|
hexmask.long.word 0x04 7.--15. 1. " CKEY ,Clock Access Key"
|
|
hexmask.long.byte 0x04 2.--5. 1. " HPCV ,High Preload Counter Value"
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " WDCLKS ,Clock Selection" "MCK/8,MCK/32,MCK/128,MCK/1024"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "WDT_CR,Control Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " RSTKEY ,Restart Key"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "WDT_SR,Status Register"
|
|
bitfld.long 0x00 0. " WDOVF ,Watchdog Overflow" "No overflow,Overflow"
|
|
width 0xb
|
|
tree.end
|
|
tree.open "Universal Synchronous/Asynchronous Receiver/Transmitter (USART)"
|
|
tree "USART0"
|
|
base 0xFFFD0000
|
|
width 0x9
|
|
if (d.l(ad:0xFFFD0000+0x4)&0xc00)==0xc00
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "US_CR,Control Register"
|
|
bitfld.long 0x00 12. " SENDA ,Send Address" "No effect,Sent"
|
|
bitfld.long 0x00 11. " STTTO ,Start Time-out" "No effect,Started"
|
|
textline " "
|
|
bitfld.long 0x00 10. " STPBRK ,Stop Break" "No effect,Stopped"
|
|
bitfld.long 0x00 9. " STTBRK ,Start Break" "No effect,Started"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RSTSTA ,Reset Status Bits" "No effect,Reset"
|
|
bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 3. " RSTTX ,Reset Transmitter" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RSTRX ,Reset Receiver" "No effect,Reset"
|
|
else
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "US_CR,Control Register"
|
|
bitfld.long 0x00 11. " STTTO ,Start Time-out" "No effect,Started"
|
|
bitfld.long 0x00 10. " STPBRK ,Stop Break" "No effect,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 9. " STTBRK ,Start Break" "No effect,Started"
|
|
bitfld.long 0x00 8. " RSTSTA ,Reset Status Bits" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RSTTX ,Reset Transmitter" "No effect,Reset"
|
|
bitfld.long 0x00 2. " RSTRX ,Reset Receiver" "No effect,Reset"
|
|
endif
|
|
if (data.long(ad:0xFFFD0000+0x4)&0x00000100)==0x00000100
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "US_MR,Mode Register"
|
|
bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK"
|
|
bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit"
|
|
textline " "
|
|
;bitfld.long 0x00 16. " MSBF ,Bit Order" "Least Significant,Most Significant"
|
|
bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal Mode,Automatic Echo,Local Loopback,Remote Loopback"
|
|
bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,Reserved,2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,No parity,Multidrop,Multidrop"
|
|
bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits"
|
|
bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK /8,SCK,SCK"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "US_MR,Mode Register"
|
|
bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK"
|
|
bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit"
|
|
textline " "
|
|
;bitfld.long 0x00 16. " MSBF ,Bit Order" "Least Significant,Most Significant"
|
|
bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal Mode,Automatic Echo,Local Loopback,Remote Loopback"
|
|
bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,1.5,2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,No parity,Multidrop,Multidrop"
|
|
bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits"
|
|
bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK /8,SCK,SCK"
|
|
endif
|
|
width 16.
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "US_IMR_Set/Clr,Interrupt Mask Register"
|
|
setclrfld.long 0x00 9. -0x8 9. -0x4 9. " TXEMPTY ,TXEMPTY Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x8 8. -0x4 8. " TIMEOUT ,Time-out Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x8 7. -0x4 7. " PARE ,Parity Error Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x8 6. -0x4 6. " FRAME ,Framing Error Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x8 5. -0x4 5. " OVRE ,Overrun Error Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x8 4. -0x4 4. " ENDTX ,End of Transmit Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x8 3. -0x4 3. " ENDRX ,End of Receive Transfer Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x8 2. -0x4 2. " RXBRK ,Receiver Break Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x8 1. -0x4 1. " TXRDY ,TXRDY Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x8 0. -0x4 0. " RXRDY ,RXRDY Interrupt Mask" "Disabled,Enabled"
|
|
rgroup.long 0x14++0x7
|
|
line.long 0x00 "US_CSR,Channel Status Register"
|
|
bitfld.long 0x00 9. " TXEMPTY ,Transmitter Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 8. " TIMEOUT ,Receiver Time-out" "No time-out,Time-out"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PARE ,Parity Error" "No error,Error"
|
|
bitfld.long 0x00 6. " FRAME ,Framing Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 5. " OVRE ,Overrun Error" "No error,Error"
|
|
bitfld.long 0x00 4. " ENDTX ,End of Transmiter Transfer" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ENDRX ,End of Receiver Transfer" "Not ended,Ended"
|
|
bitfld.long 0x00 2. " RXBRK ,Break Received/End of Break" "No break,Break"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TXRDY ,Transmitter Ready" "Ready,Not ready"
|
|
bitfld.long 0x00 0. " RXRDY ,Receiver Ready" "Not ready,Ready"
|
|
line.long 0x04 "US_RHR,Receiver Holding Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " RXCHR ,Received Character"
|
|
wgroup.long 0x1c++0x03
|
|
line.long 0x00 "US_THR,Transmitter Holding Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXCHR ,Character to be Transmitted"
|
|
group.long 0x20--0x2b
|
|
line.long 0x00 "US_BRGR,Baud Rate Generator Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divider"
|
|
line.long 0x04 "US_RTOR,Receiver Time-out Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TO ,Time-out Value"
|
|
line.long 0x08 "US_TTGR,Transmitter Timeguard Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " TG ,Timeguard Value"
|
|
group.long 0x30--0x3f
|
|
line.long 0x00 "US_RPR,Receive Pointer Register"
|
|
;hexfld.long 0x00 " RXPTR ,Receive Pointer"
|
|
line.long 0x04 "US_RCR,Receive Counter Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter"
|
|
line.long 0x08 "US_TPR,Transmit Pointer Register"
|
|
;hexfld.long 0x08 " TXPTR ,Transmit Pointer"
|
|
line.long 0x0c "US_TCR,Transmit Counter Register"
|
|
hexmask.long.word 0x0c 0.--15. 1. " TXCTR ,Transmit Counter"
|
|
width 0xb
|
|
tree.end
|
|
tree "USART1"
|
|
base 0xFFFCC000
|
|
width 0x9
|
|
if (d.l(ad:0xFFFCC000+0x4)&0xc00)==0xc00
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "US_CR,Control Register"
|
|
bitfld.long 0x00 12. " SENDA ,Send Address" "No effect,Sent"
|
|
bitfld.long 0x00 11. " STTTO ,Start Time-out" "No effect,Started"
|
|
textline " "
|
|
bitfld.long 0x00 10. " STPBRK ,Stop Break" "No effect,Stopped"
|
|
bitfld.long 0x00 9. " STTBRK ,Start Break" "No effect,Started"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RSTSTA ,Reset Status Bits" "No effect,Reset"
|
|
bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 3. " RSTTX ,Reset Transmitter" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RSTRX ,Reset Receiver" "No effect,Reset"
|
|
else
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "US_CR,Control Register"
|
|
bitfld.long 0x00 11. " STTTO ,Start Time-out" "No effect,Started"
|
|
bitfld.long 0x00 10. " STPBRK ,Stop Break" "No effect,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 9. " STTBRK ,Start Break" "No effect,Started"
|
|
bitfld.long 0x00 8. " RSTSTA ,Reset Status Bits" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RSTTX ,Reset Transmitter" "No effect,Reset"
|
|
bitfld.long 0x00 2. " RSTRX ,Reset Receiver" "No effect,Reset"
|
|
endif
|
|
if (data.long(ad:0xFFFCC000+0x4)&0x00000100)==0x00000100
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "US_MR,Mode Register"
|
|
bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK"
|
|
bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit"
|
|
textline " "
|
|
;bitfld.long 0x00 16. " MSBF ,Bit Order" "Least Significant,Most Significant"
|
|
bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal Mode,Automatic Echo,Local Loopback,Remote Loopback"
|
|
bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,Reserved,2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,No parity,Multidrop,Multidrop"
|
|
bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits"
|
|
bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK /8,SCK,SCK"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "US_MR,Mode Register"
|
|
bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK"
|
|
bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit"
|
|
textline " "
|
|
;bitfld.long 0x00 16. " MSBF ,Bit Order" "Least Significant,Most Significant"
|
|
bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal Mode,Automatic Echo,Local Loopback,Remote Loopback"
|
|
bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,1.5,2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,No parity,Multidrop,Multidrop"
|
|
bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits"
|
|
bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK /8,SCK,SCK"
|
|
endif
|
|
width 16.
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "US_IMR_Set/Clr,Interrupt Mask Register"
|
|
setclrfld.long 0x00 9. -0x8 9. -0x4 9. " TXEMPTY ,TXEMPTY Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x8 8. -0x4 8. " TIMEOUT ,Time-out Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x8 7. -0x4 7. " PARE ,Parity Error Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x8 6. -0x4 6. " FRAME ,Framing Error Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x8 5. -0x4 5. " OVRE ,Overrun Error Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x8 4. -0x4 4. " ENDTX ,End of Transmit Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x8 3. -0x4 3. " ENDRX ,End of Receive Transfer Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x8 2. -0x4 2. " RXBRK ,Receiver Break Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x8 1. -0x4 1. " TXRDY ,TXRDY Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x8 0. -0x4 0. " RXRDY ,RXRDY Interrupt Mask" "Disabled,Enabled"
|
|
rgroup.long 0x14++0x7
|
|
line.long 0x00 "US_CSR,Channel Status Register"
|
|
bitfld.long 0x00 9. " TXEMPTY ,Transmitter Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 8. " TIMEOUT ,Receiver Time-out" "No time-out,Time-out"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PARE ,Parity Error" "No error,Error"
|
|
bitfld.long 0x00 6. " FRAME ,Framing Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 5. " OVRE ,Overrun Error" "No error,Error"
|
|
bitfld.long 0x00 4. " ENDTX ,End of Transmiter Transfer" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ENDRX ,End of Receiver Transfer" "Not ended,Ended"
|
|
bitfld.long 0x00 2. " RXBRK ,Break Received/End of Break" "No break,Break"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TXRDY ,Transmitter Ready" "Ready,Not ready"
|
|
bitfld.long 0x00 0. " RXRDY ,Receiver Ready" "Not ready,Ready"
|
|
line.long 0x04 "US_RHR,Receiver Holding Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " RXCHR ,Received Character"
|
|
wgroup.long 0x1c++0x03
|
|
line.long 0x00 "US_THR,Transmitter Holding Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXCHR ,Character to be Transmitted"
|
|
group.long 0x20--0x2b
|
|
line.long 0x00 "US_BRGR,Baud Rate Generator Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divider"
|
|
line.long 0x04 "US_RTOR,Receiver Time-out Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TO ,Time-out Value"
|
|
line.long 0x08 "US_TTGR,Transmitter Timeguard Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " TG ,Timeguard Value"
|
|
group.long 0x30--0x3f
|
|
line.long 0x00 "US_RPR,Receive Pointer Register"
|
|
;hexfld.long 0x00 " RXPTR ,Receive Pointer"
|
|
line.long 0x04 "US_RCR,Receive Counter Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter"
|
|
line.long 0x08 "US_TPR,Transmit Pointer Register"
|
|
;hexfld.long 0x08 " TXPTR ,Transmit Pointer"
|
|
line.long 0x0c "US_TCR,Transmit Counter Register"
|
|
hexmask.long.word 0x0c 0.--15. 1. " TXCTR ,Transmit Counter"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree.open "Timer/Counter (TC)"
|
|
tree "TC0"
|
|
base 0xFFFE0000
|
|
width 0x8
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "TC_CCR,Channel Control Register"
|
|
bitfld.long 0x00 2. " SWTRG ,Software Trigger Command" "No effect,Triggered"
|
|
bitfld.long 0x00 1. " CLKDIS ,Counter Clock Disable Command" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLKEN ,Counter Clock Enable Command" "No effect,Enabled"
|
|
if (data.long(ad:0xFFFE0000+0x04)&0x00008000)==0x00000000
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TC_CMR,Channel Mode Register (Capture Mode)"
|
|
bitfld.long 0x00 18.--19. " LDRB ,RB Loading Selection" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 16.--17. " LDRA ,RA Loading Selection" "None,Rising edge,Falling edge,Each edge"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform"
|
|
bitfld.long 0x00 14. " CPCTRG ,RC Compare Trigger Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB External Trigger Selection" "TIOB,TIOA"
|
|
bitfld.long 0x00 8.--9. " ETRGEDG ,External Trigger Edge Selection" "None,Rising edge,Falling edge,Each edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LDBDIS ,Counter Clock Disable with RB Loading" "Not disabled,Disabled"
|
|
bitfld.long 0x00 6. " LDBSTOP ,Counter Clock Stopped with RB Loading" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed"
|
|
bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising edge,Falling edge"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "MCK/2,MCK/8,MCK/32,MCK/128,MCK/1024,XC0,XC1,XC2"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TC_CMR,Channel Mode Register (Waveform Mode)"
|
|
bitfld.long 0x00 30.--31. " BSWTRG ,Software Trigger Effect on TIOB" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 28.--29. " BEEVT ,External Event Effect on TIOB" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform"
|
|
bitfld.long 0x00 26.--27. " BCPC ,RC Compare Effect on TIOB" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BCPB ,RB Compare Effect on TIOB" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 22.--23. " ASWTRG ,Software Trigger Effect on TIOA" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " AEEVT ,External Event Effect on TIOA" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 18.--19. " ACPC ,RC Compare Effect on TIOA" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " ACPA ,RA Compare Effect on TIOA" "None,Set,Clear,Toggle"
|
|
sif (cpu()=="AT91M40800"||cpu()=="AT91R40008"||cpu()=="AT91R40807")
|
|
bitfld.long 0x00 14. " CPCTRG ,RC Compare Trigger Enable" "No effect,Enabled"
|
|
else
|
|
bitfld.long 0x00 13.--14. " WAVSEL ,Waveform Selection" "UP without automatic,UP with automatic,UPDOWN without automatic,UPDOWN with automatic"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 12. " ENETRG ,External Event Trigger Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 10.--11. " EEVT ,External Event Selection" "TIOB,XC0,XC1,XC2"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " EEVTEDG ,External Event Edge Selection" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 7. " CPCDIS ,Counter Clock Disable with RC Compare" "Not disabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CPCSTOP ,Counter Clock Stopped with RC Compare" "Not stopped,Stopped"
|
|
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "MCK/2,MCK/8,MCK/32,MCK/128,MCK/1024,XC0,XC1,XC2"
|
|
endif
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "TC_CVR,Counter Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CV ,Counter Value"
|
|
if (data.long(ad:0xFFFE0000+0x04)&0x00008000)==0x00000000
|
|
rgroup.long 0x14++0x07
|
|
line.long 0x00 "TC_RA,Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A"
|
|
line.long 0x04 "TC_RB,Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B"
|
|
else
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "TC_RA,Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A"
|
|
line.long 0x04 "TC_RB,Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B"
|
|
endif
|
|
group.long 0x1c++0x03
|
|
line.long 0x00 "TC_RC,Register C"
|
|
hexmask.long.word 0x00 0.--15. 1. " RC ,Register C"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "TC_SR,Status Register"
|
|
bitfld.long 0x00 18. " MTIOB ,TIOB Mirror" "Low,High"
|
|
bitfld.long 0x00 17. " MTIOA ,TIOA Mirror" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CLKSTA ,Clock Enabling Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ETRGS ,External Trigger Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 6. " LDRBS ,RB Loading Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " LDRAS ,RA Loading Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CPCS ,RC Compare Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " CPBS ,RB Compare Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CPAS ,RA Compare Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " LOVRS ,Load Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " COVFS ,Counter Overflow Status" "Not occurred,Occurred"
|
|
width 16.
|
|
group.long 0x2c++0x03
|
|
line.long 0x00 "TC_IMR_Set/Clr,Interrupt Mask Register"
|
|
setclrfld.long 0x00 7. -0x8 7. -0x4 7. " ETRGS ,External Trigger" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x8 6. -0x4 6. " LDRBS ,RB Loading" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x8 5. -0x4 5. " LDRAS ,RA Loading" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x8 4. -0x4 4. " CPCS ,RC Compare" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x8 3. -0x4 3. " CPBS ,RB Compare" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x8 2. -0x4 2. " CPAS ,RA Compare" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x8 1. -0x4 1. " LOVRS ,Load Overrun" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x8 0. -0x4 0. " COVFS ,Counter Overflow" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "TC1"
|
|
base 0xFFFE0040
|
|
width 0x8
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "TC_CCR,Channel Control Register"
|
|
bitfld.long 0x00 2. " SWTRG ,Software Trigger Command" "No effect,Triggered"
|
|
bitfld.long 0x00 1. " CLKDIS ,Counter Clock Disable Command" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLKEN ,Counter Clock Enable Command" "No effect,Enabled"
|
|
if (data.long(ad:0xFFFE0040+0x04)&0x00008000)==0x00000000
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TC_CMR,Channel Mode Register (Capture Mode)"
|
|
bitfld.long 0x00 18.--19. " LDRB ,RB Loading Selection" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 16.--17. " LDRA ,RA Loading Selection" "None,Rising edge,Falling edge,Each edge"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform"
|
|
bitfld.long 0x00 14. " CPCTRG ,RC Compare Trigger Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB External Trigger Selection" "TIOB,TIOA"
|
|
bitfld.long 0x00 8.--9. " ETRGEDG ,External Trigger Edge Selection" "None,Rising edge,Falling edge,Each edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LDBDIS ,Counter Clock Disable with RB Loading" "Not disabled,Disabled"
|
|
bitfld.long 0x00 6. " LDBSTOP ,Counter Clock Stopped with RB Loading" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed"
|
|
bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising edge,Falling edge"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "MCK/2,MCK/8,MCK/32,MCK/128,MCK/1024,XC0,XC1,XC2"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TC_CMR,Channel Mode Register (Waveform Mode)"
|
|
bitfld.long 0x00 30.--31. " BSWTRG ,Software Trigger Effect on TIOB" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 28.--29. " BEEVT ,External Event Effect on TIOB" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform"
|
|
bitfld.long 0x00 26.--27. " BCPC ,RC Compare Effect on TIOB" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BCPB ,RB Compare Effect on TIOB" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 22.--23. " ASWTRG ,Software Trigger Effect on TIOA" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " AEEVT ,External Event Effect on TIOA" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 18.--19. " ACPC ,RC Compare Effect on TIOA" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " ACPA ,RA Compare Effect on TIOA" "None,Set,Clear,Toggle"
|
|
sif (cpu()=="AT91M40800"||cpu()=="AT91R40008"||cpu()=="AT91R40807")
|
|
bitfld.long 0x00 14. " CPCTRG ,RC Compare Trigger Enable" "No effect,Enabled"
|
|
else
|
|
bitfld.long 0x00 13.--14. " WAVSEL ,Waveform Selection" "UP without automatic,UP with automatic,UPDOWN without automatic,UPDOWN with automatic"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 12. " ENETRG ,External Event Trigger Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 10.--11. " EEVT ,External Event Selection" "TIOB,XC0,XC1,XC2"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " EEVTEDG ,External Event Edge Selection" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 7. " CPCDIS ,Counter Clock Disable with RC Compare" "Not disabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CPCSTOP ,Counter Clock Stopped with RC Compare" "Not stopped,Stopped"
|
|
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "MCK/2,MCK/8,MCK/32,MCK/128,MCK/1024,XC0,XC1,XC2"
|
|
endif
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "TC_CVR,Counter Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CV ,Counter Value"
|
|
if (data.long(ad:0xFFFE0040+0x04)&0x00008000)==0x00000000
|
|
rgroup.long 0x14++0x07
|
|
line.long 0x00 "TC_RA,Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A"
|
|
line.long 0x04 "TC_RB,Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B"
|
|
else
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "TC_RA,Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A"
|
|
line.long 0x04 "TC_RB,Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B"
|
|
endif
|
|
group.long 0x1c++0x03
|
|
line.long 0x00 "TC_RC,Register C"
|
|
hexmask.long.word 0x00 0.--15. 1. " RC ,Register C"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "TC_SR,Status Register"
|
|
bitfld.long 0x00 18. " MTIOB ,TIOB Mirror" "Low,High"
|
|
bitfld.long 0x00 17. " MTIOA ,TIOA Mirror" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CLKSTA ,Clock Enabling Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ETRGS ,External Trigger Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 6. " LDRBS ,RB Loading Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " LDRAS ,RA Loading Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CPCS ,RC Compare Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " CPBS ,RB Compare Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CPAS ,RA Compare Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " LOVRS ,Load Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " COVFS ,Counter Overflow Status" "Not occurred,Occurred"
|
|
width 16.
|
|
group.long 0x2c++0x03
|
|
line.long 0x00 "TC_IMR_Set/Clr,Interrupt Mask Register"
|
|
setclrfld.long 0x00 7. -0x8 7. -0x4 7. " ETRGS ,External Trigger" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x8 6. -0x4 6. " LDRBS ,RB Loading" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x8 5. -0x4 5. " LDRAS ,RA Loading" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x8 4. -0x4 4. " CPCS ,RC Compare" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x8 3. -0x4 3. " CPBS ,RB Compare" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x8 2. -0x4 2. " CPAS ,RA Compare" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x8 1. -0x4 1. " LOVRS ,Load Overrun" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x8 0. -0x4 0. " COVFS ,Counter Overflow" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "TC2"
|
|
base 0xFFFE0080
|
|
width 0x8
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "TC_CCR,Channel Control Register"
|
|
bitfld.long 0x00 2. " SWTRG ,Software Trigger Command" "No effect,Triggered"
|
|
bitfld.long 0x00 1. " CLKDIS ,Counter Clock Disable Command" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLKEN ,Counter Clock Enable Command" "No effect,Enabled"
|
|
if (data.long(ad:0xFFFE0080+0x04)&0x00008000)==0x00000000
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TC_CMR,Channel Mode Register (Capture Mode)"
|
|
bitfld.long 0x00 18.--19. " LDRB ,RB Loading Selection" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 16.--17. " LDRA ,RA Loading Selection" "None,Rising edge,Falling edge,Each edge"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform"
|
|
bitfld.long 0x00 14. " CPCTRG ,RC Compare Trigger Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB External Trigger Selection" "TIOB,TIOA"
|
|
bitfld.long 0x00 8.--9. " ETRGEDG ,External Trigger Edge Selection" "None,Rising edge,Falling edge,Each edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LDBDIS ,Counter Clock Disable with RB Loading" "Not disabled,Disabled"
|
|
bitfld.long 0x00 6. " LDBSTOP ,Counter Clock Stopped with RB Loading" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed"
|
|
bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising edge,Falling edge"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "MCK/2,MCK/8,MCK/32,MCK/128,MCK/1024,XC0,XC1,XC2"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TC_CMR,Channel Mode Register (Waveform Mode)"
|
|
bitfld.long 0x00 30.--31. " BSWTRG ,Software Trigger Effect on TIOB" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 28.--29. " BEEVT ,External Event Effect on TIOB" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform"
|
|
bitfld.long 0x00 26.--27. " BCPC ,RC Compare Effect on TIOB" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BCPB ,RB Compare Effect on TIOB" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 22.--23. " ASWTRG ,Software Trigger Effect on TIOA" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " AEEVT ,External Event Effect on TIOA" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 18.--19. " ACPC ,RC Compare Effect on TIOA" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " ACPA ,RA Compare Effect on TIOA" "None,Set,Clear,Toggle"
|
|
sif (cpu()=="AT91M40800"||cpu()=="AT91R40008"||cpu()=="AT91R40807")
|
|
bitfld.long 0x00 14. " CPCTRG ,RC Compare Trigger Enable" "No effect,Enabled"
|
|
else
|
|
bitfld.long 0x00 13.--14. " WAVSEL ,Waveform Selection" "UP without automatic,UP with automatic,UPDOWN without automatic,UPDOWN with automatic"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 12. " ENETRG ,External Event Trigger Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 10.--11. " EEVT ,External Event Selection" "TIOB,XC0,XC1,XC2"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " EEVTEDG ,External Event Edge Selection" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 7. " CPCDIS ,Counter Clock Disable with RC Compare" "Not disabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CPCSTOP ,Counter Clock Stopped with RC Compare" "Not stopped,Stopped"
|
|
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "MCK/2,MCK/8,MCK/32,MCK/128,MCK/1024,XC0,XC1,XC2"
|
|
endif
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "TC_CVR,Counter Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CV ,Counter Value"
|
|
if (data.long(ad:0xFFFE0080+0x04)&0x00008000)==0x00000000
|
|
rgroup.long 0x14++0x07
|
|
line.long 0x00 "TC_RA,Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A"
|
|
line.long 0x04 "TC_RB,Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B"
|
|
else
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "TC_RA,Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A"
|
|
line.long 0x04 "TC_RB,Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B"
|
|
endif
|
|
group.long 0x1c++0x03
|
|
line.long 0x00 "TC_RC,Register C"
|
|
hexmask.long.word 0x00 0.--15. 1. " RC ,Register C"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "TC_SR,Status Register"
|
|
bitfld.long 0x00 18. " MTIOB ,TIOB Mirror" "Low,High"
|
|
bitfld.long 0x00 17. " MTIOA ,TIOA Mirror" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CLKSTA ,Clock Enabling Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ETRGS ,External Trigger Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 6. " LDRBS ,RB Loading Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " LDRAS ,RA Loading Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CPCS ,RC Compare Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " CPBS ,RB Compare Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CPAS ,RA Compare Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " LOVRS ,Load Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " COVFS ,Counter Overflow Status" "Not occurred,Occurred"
|
|
width 16.
|
|
group.long 0x2c++0x03
|
|
line.long 0x00 "TC_IMR_Set/Clr,Interrupt Mask Register"
|
|
setclrfld.long 0x00 7. -0x8 7. -0x4 7. " ETRGS ,External Trigger" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x8 6. -0x4 6. " LDRBS ,RB Loading" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x8 5. -0x4 5. " LDRAS ,RA Loading" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x8 4. -0x4 4. " CPCS ,RC Compare" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x8 3. -0x4 3. " CPBS ,RB Compare" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x8 2. -0x4 2. " CPAS ,RA Compare" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x8 1. -0x4 1. " LOVRS ,Load Overrun" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x8 0. -0x4 0. " COVFS ,Counter Overflow" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "TC block registers"
|
|
base 0xFFFE00C0
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "TC_BCR,TC Block Control Register"
|
|
bitfld.long 0x00 0. " SYNC ,Synchro Command" "No effect,SYNC"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TC_BMR,TC Block Mode Register"
|
|
bitfld.long 0x00 4.--5. " TC2XC2S ,External Clock Signal 2 Selection" "TCLK2,None,TIOA0,TIOA1"
|
|
bitfld.long 0x00 2.--3. " TC1XC1S ,External Clock Signal 1 Selection" "TCLK1,None,TIOA0,TIOA2"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " TC0XC0S ,External Clock Signal 0 Selection" "TCLK0,None,TIOA1,TIOA2"
|
|
tree.end
|
|
tree.end
|
|
endif
|
|
sif (cpu()=="AT91M42800A")
|
|
tree "Advanced Interrupt Controller (AIC)"
|
|
base 0xFFFFF000
|
|
tree "Source Mode Registers"
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "AIC_SMR0,Source Mode Register 0"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "AIC_SMR1,Source Mode Register 1"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "AIC_SMR2,Source Mode Register 2"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "AIC_SMR3,Source Mode Register 3"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "AIC_SMR4,Source Mode Register 4"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "AIC_SMR5,Source Mode Register 5"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "AIC_SMR6,Source Mode Register 6"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x1c++0x03
|
|
line.long 0x00 "AIC_SMR7,Source Mode Register 7"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "AIC_SMR8,Source Mode Register 8"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "AIC_SMR9,Source Mode Register 9"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "AIC_SMR10,Source Mode Register 10"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x2c++0x03
|
|
line.long 0x00 "AIC_SMR11,Source Mode Register 11"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "AIC_SMR12,Source Mode Register 12"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "AIC_SMR13,Source Mode Register 13"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "AIC_SMR14,Source Mode Register 14"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x3c++0x03
|
|
line.long 0x00 "AIC_SMR15,Source Mode Register 15"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "AIC_SMR16,Source Mode Register 16"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "AIC_SMR17,Source Mode Register 17"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "AIC_SMR18,Source Mode Register 18"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x4c++0x03
|
|
line.long 0x00 "AIC_SMR19,Source Mode Register 19"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "AIC_SMR20,Source Mode Register 20"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "AIC_SMR21,Source Mode Register 21"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "AIC_SMR22,Source Mode Register 22"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x5c++0x03
|
|
line.long 0x00 "AIC_SMR23,Source Mode Register 23"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "AIC_SMR24,Source Mode Register 24"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "AIC_SMR25,Source Mode Register 25"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "AIC_SMR26,Source Mode Register 26"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x6c++0x03
|
|
line.long 0x00 "AIC_SMR27,Source Mode Register 27"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "AIC_SMR28,Source Mode Register 28"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "AIC_SMR29,Source Mode Register 29"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "AIC_SMR30,Source Mode Register 30"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.long 0x7c++0x03
|
|
line.long 0x00 "AIC_SMR31,Source Mode Register 31"
|
|
bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising"
|
|
bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
|
|
tree.end
|
|
tree "Source Vector Registers"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "AIC_SVR0,Source Vector Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "AIC_SVR1,Source Vector Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "AIC_SVR2,Source Vector Register 2"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0x8c++0x03
|
|
line.long 0x00 "AIC_SVR3,Source Vector Register 3"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "AIC_SVR4,Source Vector Register 4"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "AIC_SVR5,Source Vector Register 5"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "AIC_SVR6,Source Vector Register 6"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0x9c++0x03
|
|
line.long 0x00 "AIC_SVR7,Source Vector Register 7"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xa0++0x03
|
|
line.long 0x00 "AIC_SVR8,Source Vector Register 8"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xa4++0x03
|
|
line.long 0x00 "AIC_SVR9,Source Vector Register 9"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xa8++0x03
|
|
line.long 0x00 "AIC_SVR10,Source Vector Register 10"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xac++0x03
|
|
line.long 0x00 "AIC_SVR11,Source Vector Register 11"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xb0++0x03
|
|
line.long 0x00 "AIC_SVR12,Source Vector Register 12"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xb4++0x03
|
|
line.long 0x00 "AIC_SVR13,Source Vector Register 13"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xb8++0x03
|
|
line.long 0x00 "AIC_SVR14,Source Vector Register 14"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xbc++0x03
|
|
line.long 0x00 "AIC_SVR15,Source Vector Register 15"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xc0++0x03
|
|
line.long 0x00 "AIC_SVR16,Source Vector Register 16"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xc4++0x03
|
|
line.long 0x00 "AIC_SVR17,Source Vector Register 17"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xc8++0x03
|
|
line.long 0x00 "AIC_SVR18,Source Vector Register 18"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xcc++0x03
|
|
line.long 0x00 "AIC_SVR19,Source Vector Register 19"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xd0++0x03
|
|
line.long 0x00 "AIC_SVR20,Source Vector Register 20"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xd4++0x03
|
|
line.long 0x00 "AIC_SVR21,Source Vector Register 21"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xd8++0x03
|
|
line.long 0x00 "AIC_SVR22,Source Vector Register 22"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xdc++0x03
|
|
line.long 0x00 "AIC_SVR23,Source Vector Register 23"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xe0++0x03
|
|
line.long 0x00 "AIC_SVR24,Source Vector Register 24"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xe4++0x03
|
|
line.long 0x00 "AIC_SVR25,Source Vector Register 25"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xe8++0x03
|
|
line.long 0x00 "AIC_SVR26,Source Vector Register 26"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xec++0x03
|
|
line.long 0x00 "AIC_SVR27,Source Vector Register 27"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xf0++0x03
|
|
line.long 0x00 "AIC_SVR28,Source Vector Register 28"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xf4++0x03
|
|
line.long 0x00 "AIC_SVR29,Source Vector Register 29"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xf8++0x03
|
|
line.long 0x00 "AIC_SVR30,Source Vector Register 30"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
group.long 0xfc++0x03
|
|
line.long 0x00 "AIC_SVR31,Source Vector Register 31"
|
|
hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector"
|
|
tree.end
|
|
tree "Interrupt Registers"
|
|
rgroup.long 0x100--0x117
|
|
line.long 0x00 "AIC_IVR,Interrupt Vector Register"
|
|
hexfld.long 0x00 " IRQV ,Interrupt Vector Register"
|
|
line.long 0x04 "AIC_FVR,Fast Interrupt Vector Register"
|
|
hexfld.long 0x04 " FIQV ,FIQ Vector Register"
|
|
line.long 0x08 "AIC_ISR,Interrupt Status Register"
|
|
hexmask.long.byte 0x08 0.--4. 1. " IRQID ,Current Interrupt Identifier"
|
|
line.long 0x0c "AIC_IPR,Interrupt Pending Register"
|
|
bitfld.long 0x0C 31. " IRQ0 ,Interrupt Pending" "Inactive,Pending"
|
|
bitfld.long 0x0C 30. " IRQ1 ,Interrupt Pending" "Inactive,Pending"
|
|
bitfld.long 0x0C 29. " IRQ2 ,Interrupt Pending" "Inactive,Pending"
|
|
bitfld.long 0x0C 28. " IRQ3 ,Interrupt Pending" "Inactive,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " PMC ,Interrupt Pending" "Inactive,Pending"
|
|
bitfld.long 0x0C 14. " PIOB ,Interrupt Pending" "Inactive,Pending"
|
|
bitfld.long 0x0C 13. " PIOA ,Interrupt Pending" "Inactive,Pending"
|
|
bitfld.long 0x0C 12. " ST ,Interrupt Pending" "Inactive,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " TC5 ,Interrupt Pending" "Inactive,Pending"
|
|
bitfld.long 0x0C 10. " TC4 ,Interrupt Pending" "Inactive,Pending"
|
|
bitfld.long 0x0C 9. " TC3 ,Interrupt Pending" "Inactive,Pending"
|
|
bitfld.long 0x0C 8. " TC2 ,Interrupt Pending" "Inactive,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " TC1 ,Interrupt Pending" "Inactive,Pending"
|
|
bitfld.long 0x0C 6. " TC0 ,Interrupt Pending" "Inactive,Pending"
|
|
bitfld.long 0x0C 5. " SPIB ,Interrupt Pending" "Inactive,Pending"
|
|
bitfld.long 0x0C 4. " SPIA ,Interrupt Pending" "Inactive,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " US1 ,Interrupt Pending" "Inactive,Pending"
|
|
bitfld.long 0x0C 2. " US0 ,Interrupt Pending" "Inactive,Pending"
|
|
bitfld.long 0x0C 1. " SW ,Interrupt Pending" "Inactive,Pending"
|
|
bitfld.long 0x0C 0. " FIQ ,Interrupt Pending" "Inactive,Pending"
|
|
line.long 0x10 "AIC_IMR,Interrupt Mask Register"
|
|
bitfld.long 0x10 31. " IRQ0 ,Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 30. " IRQ1 ,Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 29. " IRQ2 ,Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 28. " IRQ3 ,Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 15. " PMC ,Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 14. " PIOB ,Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 13. " PIOA ,Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 12. " ST ,Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 11. " TC5 ,Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 10. " TC4 ,Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 9. " TC3 ,Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 8. " TC2 ,Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 7. " TC1 ,Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 6. " TC0 ,Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 5. " SPIB ,Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 4. " SPIA ,Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 3. " US1 ,Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " US0 ,Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " SW ,Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " FIQ ,Interrupt Mask" "Disabled,Enabled"
|
|
line.long 0x14 "AIC_CISR,Core Interrupt Status Register"
|
|
bitfld.long 0x14 1. " NIRQ ,NIRQ Status" "Deactivated,Active"
|
|
bitfld.long 0x14 0. " NFIQ ,NFIQ Status" "Deactivated,Active"
|
|
wgroup.long 0x120--0x133
|
|
line.long 0x00 "AIC_IECR,Interrupt Enable Command Register"
|
|
bitfld.long 0x00 31. " IRQ0 ,Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 30. " IRQ1 ,Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 29. " IRQ2 ,Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 28. " IRQ3 ,Interrupt Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PMC ,Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 14. " PIOB ,Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 13. " PIOA ,Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 12. " ST ,Interrupt Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TC5 ,Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 10. " TC4 ,Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 9. " TC3 ,Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 8. " TC2 ,Interrupt Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TC1 ,Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 6. " TC0 ,Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 5. " SPIB ,Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 4. " SPIA ,Interrupt Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " US1 ,Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 2. " US0 ,Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 1. " SW ,Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 0. " FIQ ,Interrupt Enable" "No effect,Enabled"
|
|
line.long 0x04 "AIC_IDCR,Interrupt Disable Command Register"
|
|
bitfld.long 0x04 31. " IRQ0 ,Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 30. " IRQ1 ,Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 29. " IRQ2 ,Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 28. " IRQ3 ,Interrupt Disable" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 15. " PMC ,Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 14. " PIOB ,Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 13. " PIOA ,Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 12. " ST ,Interrupt Disable" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 11. " TC5 ,Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 10. " TC4 ,Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 9. " TC3 ,Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 8. " TC2 ,Interrupt Disable" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " TC1 ,Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 6. " TC0 ,Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 5. " SPIB ,Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 4. " SPIA ,Interrupt Disable" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " US1 ,Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 2. " US0 ,Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 1. " SW ,Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 0. " FIQ ,Interrupt Disable" "No effect,Disabled"
|
|
line.long 0x08 "AIC_ICCR,Interrupt Clear Command Register"
|
|
bitfld.long 0x08 31. " IRQ0 ,Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x08 30. " IRQ1 ,Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x08 29. " IRQ2 ,Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x08 28. " IRQ3 ,Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 15. " PMC ,Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x08 14. " PIOB ,Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x08 13. " PIOA ,Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x08 12. " ST ,Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 11. " TC5 ,Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x08 10. " TC4 ,Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x08 9. " TC3 ,Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x08 8. " TC2 ,Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 7. " TC1 ,Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x08 6. " TC0 ,Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x08 5. " SPIB ,Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x08 4. " SPIA ,Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 3. " US1 ,Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x08 2. " US0 ,Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x08 1. " SW ,Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x08 0. " FIQ ,Interrupt Clear" "No effect,Cleared"
|
|
line.long 0x0c "AIC_ISCR,Interrupt Set Command Register"
|
|
bitfld.long 0x0c 31. " IRQ0 ,Interrupt Set" "No effect,Set"
|
|
bitfld.long 0x0c 30. " IRQ1 ,Interrupt Set" "No effect,Set"
|
|
bitfld.long 0x0c 29. " IRQ2 ,Interrupt Set" "No effect,Set"
|
|
bitfld.long 0x0c 28. " IRQ3 ,Interrupt Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0c 15. " PMC ,Interrupt Set" "No effect,Set"
|
|
bitfld.long 0x0c 14. " PIOB ,Interrupt Set" "No effect,Set"
|
|
bitfld.long 0x0c 13. " PIOA ,Interrupt Set" "No effect,Set"
|
|
bitfld.long 0x0c 12. " ST ,Interrupt Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0c 11. " TC5 ,Interrupt Set" "No effect,Set"
|
|
bitfld.long 0x0c 10. " TC4 ,Interrupt Set" "No effect,Set"
|
|
bitfld.long 0x0c 9. " TC3 ,Interrupt Set" "No effect,Set"
|
|
bitfld.long 0x0c 8. " TC2 ,Interrupt Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " TC1 ,Interrupt Set" "No effect,Set"
|
|
bitfld.long 0x0c 6. " TC0 ,Interrupt Set" "No effect,Set"
|
|
bitfld.long 0x0c 5. " SPIB ,Interrupt Set" "No effect,Set"
|
|
bitfld.long 0x0c 4. " SPIA ,Interrupt Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0c 3. " US1 ,Interrupt Set" "No effect,Set"
|
|
bitfld.long 0x0c 2. " US0 ,Interrupt Set" "No effect,Set"
|
|
bitfld.long 0x0c 1. " SW ,Interrupt Set" "No effect,Set"
|
|
bitfld.long 0x0c 0. " FIQ ,Interrupt Set" "No effect,Set"
|
|
line.long 0x10 "AIC_EOICR,End of Interrupt Command Register"
|
|
tree.end
|
|
tree "Spurious Interrupt and Debug Control Registers"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "AIC_SPU,Spurious Interrupt Vector Register"
|
|
hexfld.long 0x00 " SIUVEC ,Spurious Interrupt Vector Handler Register"
|
|
tree.end
|
|
tree.end
|
|
tree "System Timer"
|
|
base 0xFFFF8000
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "ST_CR,Control Register"
|
|
bitfld.long 0x00 0. " WDRST ,Watchdog Timer Restart" "No effect,Restarted"
|
|
group.long 0x04--0x0f
|
|
line.long 0x00 "ST_PIMR,Period Interval Mode Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PIV ,Period Interval Value"
|
|
line.long 0x04 "ST_WDMR,Watchdog Mode Register"
|
|
bitfld.long 0x04 17. " EXTEN ,External Signal Assertion Enable" "Not tied low,Tied low"
|
|
bitfld.long 0x04 16. " RSTEN ,Reset Enable" "No reset,Reset"
|
|
hexmask.long.word 0x04 0.--15. 1. " WDV ,Watchdog Counter Value"
|
|
line.long 0x08 "ST_RTMR,Real-time Mode Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " RTPRES ,Real-time Timer Prescaler Value"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "ST_SR,Status Register"
|
|
bitfld.long 0x00 3. " ALMS ,Alarm Status" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " RTTINC ,Real-time Timer Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x00 1. " WDOVF ,Watchdog Overflow" "Not reached 0,Reached 0"
|
|
bitfld.long 0x00 0. " PITS ,Period Interval Timer Status" "Not reached 0,Reached 0"
|
|
wgroup.long 0x14++0x07
|
|
line.long 0x00 "ST_IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 3. " ALMS ,Alarm Status Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 2. " RTTINC ,Real-time Timer Increment Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 1. " WDOVF ,Watchdog Overflow Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 0. " PITS ,Period Interval Timer Status Interrupt Enable" "No effect,Enabled"
|
|
line.long 0x04 "ST_IDR,Interrupt Disable Register"
|
|
bitfld.long 0x04 3. " ALMS ,Alarm Status Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 2. " RTTINC ,Real-time Timer Increment Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 1. " WDOVF ,Watchdog Overflow Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 0. " PITS ,Period Interval Timer Status Interrupt Disable" "No effect,Disabled"
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "ST_IMR,Interrupt Mask Register"
|
|
bitfld.long 0x00 3. " ALMS ,Alarm Status Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RTTINC ,Real-time Timer Increment Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WDOVF ,Watchdog Overflow Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PITS ,Period Interval Timer Status Interrupt Mask" "Disabled,Enabled"
|
|
if (0==0)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "ST_RTAR,Real-time Alarm Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " ALMV ,Alarm Value"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "ST_CRTR,Current Real Time Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CRTV ,Current Real-time Value"
|
|
elif (0==1)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "ST_RTAR,Real-time Alarm Register"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " ALMV ,Alarm Value"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "ST_CRTR,Current Real Time Register"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " CRTV ,Current Real-time Value"
|
|
endif
|
|
tree.end
|
|
tree "Power Management Controller (PMC)"
|
|
base 0xFFFF4000
|
|
wgroup.long 0x00++0x07
|
|
line.long 0x00 "PMC_SCER,System Clock Enable Register"
|
|
bitfld.long 0x00 0. " CPU ,System Clock Enable" "No effect,Enabled"
|
|
line.long 0x04 "PMC_SCDR,System Clock Disable Register"
|
|
bitfld.long 0x04 0. " CPU ,System Clock Disable" "No effect,Disabled"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "PMC_SCSR,System Clock Status Register"
|
|
bitfld.long 0x00 0. " CPU ,System Clock Status" "Disabled,Enabled"
|
|
wgroup.long 0x10++0x07
|
|
line.long 0x00 "PMC_PCER,Peripheral Clock Enable Register"
|
|
bitfld.long 0x00 14. " PIOB ,Parallel I/O B Clock Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 13. " PIOA ,Parallel I/O A Clock Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 11. " TC5 ,Timer Counter 5 Clock Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 10. " TC4 ,Timer Counter 4 Clock Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TC3 ,Timer Counter 3 Clock Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 8. " TC2 ,Timer Counter 2 Clock Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 7. " TC1 ,Timer Counter 1 Clock Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 6. " TC0 ,Timer Counter 0 Clock Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SPIB ,Special Peripheral Interface B Clock Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 4. " SPIA ,Special Peripheral Interface A Clock Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 3. " US1 ,USART 1 Clock Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 2. " US0 ,USART 0 Clock Enable" "No effect,Enabled"
|
|
line.long 0x04 "PMC_PCDR,Peripheral Clock Disable Register"
|
|
bitfld.long 0x04 14. " PIOB ,Parallel I/O B Clock Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 13. " PIOA ,Parallel I/O A Clock Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 11. " TC5 ,Timer Counter 5 Clock Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 10. " TC4 ,Timer Counter 4 Clock Disable" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 9. " TC3 ,Timer Counter 3 Clock Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 8. " TC2 ,Timer Counter 2 Clock Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 7. " TC1 ,Timer Counter 1 Clock Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 6. " TC0 ,Timer Counter 0 Clock Disable" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 5. " SPIB ,Special Peripheral Interface B Clock Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 4. " SPIA ,Special Peripheral Interface A Clock Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 3. " US1 ,USART 1 Clock Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 2. " US0 ,USART 0 Clock Disable" "No effect,Disabled"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "PMC_PCSR,Peripheral Clock Status Register"
|
|
bitfld.long 0x00 14. " PIOB ,Parallel I/O B Clock Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " PIOA ,Parallel I/O A Clock Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " TC5 ,Timer Counter 5 Clock Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " TC4 ,Timer Counter 4 Clock Status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TC3 ,Timer Counter 3 Clock Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " TC2 ,Timer Counter 2 Clock Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TC1 ,Timer Counter 1 Clock Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TC0 ,Timer Counter 0 Clock Status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SPIB ,Special Peripheral Interface B Clock Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SPIA ,Special Peripheral Interface A Clock Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " US1 ,USART 1 Clock Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " US0 ,USART 0 Clock Status" "Disabled,Enabled"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PMC_CGMR,Clock Generator Mode Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PLLCOUNT ,PLL Lock Counter"
|
|
hexmask.long.word 0x00 8.--18. 1. " MUL ,Phase Lock Loop Factor"
|
|
bitfld.long 0x00 7. " CSS ,Clock Source Selection" "Slow,PLL output"
|
|
bitfld.long 0x00 6. " MCKODS ,Master Clock Output Disable" "Driven,Tri-stated"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " MCKOSS ,Master Clock Output Source Selection" "Slow,Master,Master inverted,Master/2"
|
|
bitfld.long 0x00 3. " PLLS ,PLL Selection" "PLL A,PLL B"
|
|
bitfld.long 0x00 0.--2. " PRES ,Prescaler Selection" "None,Divide by 2,Divide by 4,Divide by 8,Divide by 16,Divide by 32,Divide by 64,?..."
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "PMC_SR,Status Register"
|
|
bitfld.long 0x00 0. " LOCK ,PLL Lock Status" "Not stabilized,Stabilized"
|
|
wgroup.long 0x34++0x07
|
|
line.long 0x00 "PMC_IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " LOCK ,PLL Lock Interrupt Enable" "No effect,Enabled"
|
|
line.long 0x04 "PMC_IDR,Interrupt Disable Register"
|
|
bitfld.long 0x04 0. " LOCK ,PLL Lock Disable" "No effect,Disabled"
|
|
rgroup.long 0x3c++0x03
|
|
line.long 0x00 "PMC_IMR,Interrupt Mask Register"
|
|
bitfld.long 0x00 0. " LOCK ,PLL Lock Interrupt Mask" "Disabled,Enabled"
|
|
tree.end
|
|
tree.open "Parallel Input/Output Controller (PIO)"
|
|
tree "PIOA"
|
|
base 0xFFFEC000
|
|
tree "PIO"
|
|
wgroup.long 0x00++0x07
|
|
line.long 0x00 "PIO_PER,PIO Enable Register"
|
|
bitfld.long 0x00 31. " P31 ,PIO Enable 31" "No effect,Enabled"
|
|
bitfld.long 0x00 30. " P30 ,PIO Enable 30" "No effect,Enabled"
|
|
bitfld.long 0x00 29. " P29 ,PIO Enable 29" "No effect,Enabled"
|
|
bitfld.long 0x00 28. " P28 ,PIO Enable 28" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,PIO Enable 27" "No effect,Enabled"
|
|
bitfld.long 0x00 26. " P26 ,PIO Enable 26" "No effect,Enabled"
|
|
bitfld.long 0x00 25. " P25 ,PIO Enable 25" "No effect,Enabled"
|
|
bitfld.long 0x00 24. " P24 ,PIO Enable 24" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,PIO Enable 23" "No effect,Enabled"
|
|
bitfld.long 0x00 22. " P22 ,PIO Enable 22" "No effect,Enabled"
|
|
bitfld.long 0x00 21. " P21 ,PIO Enable 21" "No effect,Enabled"
|
|
bitfld.long 0x00 20. " P20 ,PIO Enable 20" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,PIO Enable 19" "No effect,Enabled"
|
|
bitfld.long 0x00 18. " P18 ,PIO Enable 18" "No effect,Enabled"
|
|
bitfld.long 0x00 17. " P17 ,PIO Enable 17" "No effect,Enabled"
|
|
bitfld.long 0x00 16. " P16 ,PIO Enable 16" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,PIO Enable 15" "No effect,Enabled"
|
|
bitfld.long 0x00 14. " P14 ,PIO Enable 14" "No effect,Enabled"
|
|
bitfld.long 0x00 13. " P13 ,PIO Enable 13" "No effect,Enabled"
|
|
bitfld.long 0x00 12. " P12 ,PIO Enable 12" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,PIO Enable 11" "No effect,Enabled"
|
|
bitfld.long 0x00 10. " P10 ,PIO Enable 10" "No effect,Enabled"
|
|
bitfld.long 0x00 9. " P9 ,PIO Enable 9" "No effect,Enabled"
|
|
bitfld.long 0x00 8. " P8 ,PIO Enable 8" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,PIO Enable 7" "No effect,Enabled"
|
|
bitfld.long 0x00 6. " P6 ,PIO Enable 6" "No effect,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,PIO Enable 5" "No effect,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,PIO Enable 4" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,PIO Enable 3" "No effect,Enabled"
|
|
bitfld.long 0x00 2. " P2 ,PIO Enable 2" "No effect,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,PIO Enable 1" "No effect,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,PIO Enable 0" "No effect,Enabled"
|
|
line.long 0x04 "PIO_PDR,PIO Disable Register"
|
|
bitfld.long 0x04 31. " P31 ,PIO Disable 31" "No effect,Disabled"
|
|
bitfld.long 0x04 30. " P30 ,PIO Disable 30" "No effect,Disabled"
|
|
bitfld.long 0x04 29. " P29 ,PIO Disable 29" "No effect,Disabled"
|
|
bitfld.long 0x04 28. " P28 ,PIO Disable 28" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 27. " P27 ,PIO Disable 27" "No effect,Disabled"
|
|
bitfld.long 0x04 26. " P26 ,PIO Disable 26" "No effect,Disabled"
|
|
bitfld.long 0x04 25. " P25 ,PIO Disable 25" "No effect,Disabled"
|
|
bitfld.long 0x04 24. " P24 ,PIO Disable 24" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " P23 ,PIO Disable 23" "No effect,Disabled"
|
|
bitfld.long 0x04 22. " P22 ,PIO Disable 22" "No effect,Disabled"
|
|
bitfld.long 0x04 21. " P21 ,PIO Disable 21" "No effect,Disabled"
|
|
bitfld.long 0x04 20. " P20 ,PIO Disable 20" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " P19 ,PIO Disable 19" "No effect,Disabled"
|
|
bitfld.long 0x04 18. " P18 ,PIO Disable 18" "No effect,Disabled"
|
|
bitfld.long 0x04 17. " P17 ,PIO Disable 17" "No effect,Disabled"
|
|
bitfld.long 0x04 16. " P16 ,PIO Disable 16" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 15. " P15 ,PIO Disable 15" "No effect,Disabled"
|
|
bitfld.long 0x04 14. " P14 ,PIO Disable 14" "No effect,Disabled"
|
|
bitfld.long 0x04 13. " P13 ,PIO Disable 13" "No effect,Disabled"
|
|
bitfld.long 0x04 12. " P12 ,PIO Disable 12" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 11. " P11 ,PIO Disable 11" "No effect,Disabled"
|
|
bitfld.long 0x04 10. " P10 ,PIO Disable 10" "No effect,Disabled"
|
|
bitfld.long 0x04 9. " P9 ,PIO Disable 9" "No effect,Disabled"
|
|
bitfld.long 0x04 8. " P8 ,PIO Disable 8" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " P7 ,PIO Disable 7" "No effect,Disabled"
|
|
bitfld.long 0x04 6. " P6 ,PIO Disable 6" "No effect,Disabled"
|
|
bitfld.long 0x04 5. " P5 ,PIO Disable 5" "No effect,Disabled"
|
|
bitfld.long 0x04 4. " P4 ,PIO Disable 4" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " P3 ,PIO Disable 3" "No effect,Disabled"
|
|
bitfld.long 0x04 2. " P2 ,PIO Disable 2" "No effect,Disabled"
|
|
bitfld.long 0x04 1. " P1 ,PIO Disable 1" "No effect,Disabled"
|
|
bitfld.long 0x04 0. " P0 ,PIO Disable 0" "No effect,Disabled"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "PIO_PSR,PIO Status Register"
|
|
bitfld.long 0x00 31. " P31 ,PIO Status 31" "Inactive,Active"
|
|
bitfld.long 0x00 30. " P30 ,PIO Status 30" "Inactive,Active"
|
|
bitfld.long 0x00 29. " P29 ,PIO Status 29" "Inactive,Active"
|
|
bitfld.long 0x00 28. " P28 ,PIO Status 28" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,PIO Status 27" "Inactive,Active"
|
|
bitfld.long 0x00 26. " P26 ,PIO Status 26" "Inactive,Active"
|
|
bitfld.long 0x00 25. " P25 ,PIO Status 25" "Inactive,Active"
|
|
bitfld.long 0x00 24. " P24 ,PIO Status 24" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,PIO Status 23" "Inactive,Active"
|
|
bitfld.long 0x00 22. " P22 ,PIO Status 22" "Inactive,Active"
|
|
bitfld.long 0x00 21. " P21 ,PIO Status 21" "Inactive,Active"
|
|
bitfld.long 0x00 20. " P20 ,PIO Status 20" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,PIO Status 19" "Inactive,Active"
|
|
bitfld.long 0x00 18. " P18 ,PIO Status 18" "Inactive,Active"
|
|
bitfld.long 0x00 17. " P17 ,PIO Status 17" "Inactive,Active"
|
|
bitfld.long 0x00 16. " P16 ,PIO Status 16" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,PIO Status 15" "Inactive,Active"
|
|
bitfld.long 0x00 14. " P14 ,PIO Status 14" "Inactive,Active"
|
|
bitfld.long 0x00 13. " P13 ,PIO Status 13" "Inactive,Active"
|
|
bitfld.long 0x00 12. " P12 ,PIO Status 12" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,PIO Status 11" "Inactive,Active"
|
|
bitfld.long 0x00 10. " P10 ,PIO Status 10" "Inactive,Active"
|
|
bitfld.long 0x00 9. " P9 ,PIO Status 9" "Inactive,Active"
|
|
bitfld.long 0x00 8. " P8 ,PIO Status 8" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,PIO Status 7" "Inactive,Active"
|
|
bitfld.long 0x00 6. " P6 ,PIO Status 6" "Inactive,Active"
|
|
bitfld.long 0x00 5. " P5 ,PIO Status 5" "Inactive,Active"
|
|
bitfld.long 0x00 4. " P4 ,PIO Status 4" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,PIO Status 3" "Inactive,Active"
|
|
bitfld.long 0x00 2. " P2 ,PIO Status 2" "Inactive,Active"
|
|
bitfld.long 0x00 1. " P1 ,PIO Status 1" "Inactive,Active"
|
|
bitfld.long 0x00 0. " P0 ,PIO Status 0" "Inactive,Active"
|
|
tree.end
|
|
tree "Output"
|
|
wgroup.long 0x10++0x07
|
|
line.long 0x00 "PIO_OER,Output Enable Register"
|
|
bitfld.long 0x00 31. " P31 ,Output Enable31" "No effect,Enabled"
|
|
bitfld.long 0x00 30. " P30 ,Output Enable30" "No effect,Enabled"
|
|
bitfld.long 0x00 29. " P29 ,Output Enable29" "No effect,Enabled"
|
|
bitfld.long 0x00 28. " P28 ,Output Enable28" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Output Enable27" "No effect,Enabled"
|
|
bitfld.long 0x00 26. " P26 ,Output Enable26" "No effect,Enabled"
|
|
bitfld.long 0x00 25. " P25 ,Output Enable25" "No effect,Enabled"
|
|
bitfld.long 0x00 24. " P24 ,Output Enable24" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Output Enable23" "No effect,Enabled"
|
|
bitfld.long 0x00 22. " P22 ,Output Enable22" "No effect,Enabled"
|
|
bitfld.long 0x00 21. " P21 ,Output Enable21" "No effect,Enabled"
|
|
bitfld.long 0x00 20. " P20 ,Output Enable20" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Output Enable19" "No effect,Enabled"
|
|
bitfld.long 0x00 18. " P18 ,Output Enable18" "No effect,Enabled"
|
|
bitfld.long 0x00 17. " P17 ,Output Enable17" "No effect,Enabled"
|
|
bitfld.long 0x00 16. " P16 ,Output Enable16" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Output Enable15" "No effect,Enabled"
|
|
bitfld.long 0x00 14. " P14 ,Output Enable14" "No effect,Enabled"
|
|
bitfld.long 0x00 13. " P13 ,Output Enable13" "No effect,Enabled"
|
|
bitfld.long 0x00 12. " P12 ,Output Enable12" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Output Enable11" "No effect,Enabled"
|
|
bitfld.long 0x00 10. " P10 ,Output Enable10" "No effect,Enabled"
|
|
bitfld.long 0x00 9. " P9 ,Output Enable9" "No effect,Enabled"
|
|
bitfld.long 0x00 8. " P8 ,Output Enable8" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Output Enable7" "No effect,Enabled"
|
|
bitfld.long 0x00 6. " P6 ,Output Enable6" "No effect,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,Output Enable5" "No effect,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,Output Enable4" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Output Enable3" "No effect,Enabled"
|
|
bitfld.long 0x00 2. " P2 ,Output Enable2" "No effect,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,Output Enable1" "No effect,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,Output Enable0" "No effect,Enabled"
|
|
line.long 0x04 "PIO_ODR,Output Disable Register"
|
|
bitfld.long 0x04 31. " P31 ,Output Disable31" "No effect,Disabled"
|
|
bitfld.long 0x04 30. " P30 ,Output Disable30" "No effect,Disabled"
|
|
bitfld.long 0x04 29. " P29 ,Output Disable29" "No effect,Disabled"
|
|
bitfld.long 0x04 28. " P28 ,Output Disable28" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 27. " P27 ,Output Disable27" "No effect,Disabled"
|
|
bitfld.long 0x04 26. " P26 ,Output Disable26" "No effect,Disabled"
|
|
bitfld.long 0x04 25. " P25 ,Output Disable25" "No effect,Disabled"
|
|
bitfld.long 0x04 24. " P24 ,Output Disable24" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " P23 ,Output Disable23" "No effect,Disabled"
|
|
bitfld.long 0x04 22. " P22 ,Output Disable22" "No effect,Disabled"
|
|
bitfld.long 0x04 21. " P21 ,Output Disable21" "No effect,Disabled"
|
|
bitfld.long 0x04 20. " P20 ,Output Disable20" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " P19 ,Output Disable19" "No effect,Disabled"
|
|
bitfld.long 0x04 18. " P18 ,Output Disable18" "No effect,Disabled"
|
|
bitfld.long 0x04 17. " P17 ,Output Disable17" "No effect,Disabled"
|
|
bitfld.long 0x04 16. " P16 ,Output Disable16" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 15. " P15 ,Output Disable15" "No effect,Disabled"
|
|
bitfld.long 0x04 14. " P14 ,Output Disable14" "No effect,Disabled"
|
|
bitfld.long 0x04 13. " P13 ,Output Disable13" "No effect,Disabled"
|
|
bitfld.long 0x04 12. " P12 ,Output Disable12" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 11. " P11 ,Output Disable11" "No effect,Disabled"
|
|
bitfld.long 0x04 10. " P10 ,Output Disable10" "No effect,Disabled"
|
|
bitfld.long 0x04 9. " P9 ,Output Disable9" "No effect,Disabled"
|
|
bitfld.long 0x04 8. " P8 ,Output Disable8" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " P7 ,Output Disable7" "No effect,Disabled"
|
|
bitfld.long 0x04 6. " P6 ,Output Disable6" "No effect,Disabled"
|
|
bitfld.long 0x04 5. " P5 ,Output Disable5" "No effect,Disabled"
|
|
bitfld.long 0x04 4. " P4 ,Output Disable4" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " P3 ,Output Disable3" "No effect,Disabled"
|
|
bitfld.long 0x04 2. " P2 ,Output Disable2" "No effect,Disabled"
|
|
bitfld.long 0x04 1. " P1 ,Output Disable1" "No effect,Disabled"
|
|
bitfld.long 0x04 0. " P0 ,Output Disable0" "No effect,Disabled"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "PIO_OSR,Output Status Register"
|
|
bitfld.long 0x00 31. " P31 ,Output Status31" "Input,Output"
|
|
bitfld.long 0x00 30. " P30 ,Output Status30" "Input,Output"
|
|
bitfld.long 0x00 29. " P29 ,Output Status29" "Input,Output"
|
|
bitfld.long 0x00 28. " P28 ,Output Status28" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Output Status27" "Input,Output"
|
|
bitfld.long 0x00 26. " P26 ,Output Status26" "Input,Output"
|
|
bitfld.long 0x00 25. " P25 ,Output Status25" "Input,Output"
|
|
bitfld.long 0x00 24. " P24 ,Output Status24" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Output Status23" "Input,Output"
|
|
bitfld.long 0x00 22. " P22 ,Output Status22" "Input,Output"
|
|
bitfld.long 0x00 21. " P21 ,Output Status21" "Input,Output"
|
|
bitfld.long 0x00 20. " P20 ,Output Status20" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Output Status19" "Input,Output"
|
|
bitfld.long 0x00 18. " P18 ,Output Status18" "Input,Output"
|
|
bitfld.long 0x00 17. " P17 ,Output Status17" "Input,Output"
|
|
bitfld.long 0x00 16. " P16 ,Output Status16" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Output Status15" "Input,Output"
|
|
bitfld.long 0x00 14. " P14 ,Output Status14" "Input,Output"
|
|
bitfld.long 0x00 13. " P13 ,Output Status13" "Input,Output"
|
|
bitfld.long 0x00 12. " P12 ,Output Status12" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Output Status11" "Input,Output"
|
|
bitfld.long 0x00 10. " P10 ,Output Status10" "Input,Output"
|
|
bitfld.long 0x00 9. " P9 ,Output Status9" "Input,Output"
|
|
bitfld.long 0x00 8. " P8 ,Output Status8" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Output Status7" "Input,Output"
|
|
bitfld.long 0x00 6. " P6 ,Output Status6" "Input,Output"
|
|
bitfld.long 0x00 5. " P5 ,Output Status5" "Input,Output"
|
|
bitfld.long 0x00 4. " P4 ,Output Status4" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Output Status3" "Input,Output"
|
|
bitfld.long 0x00 2. " P2 ,Output Status2" "Input,Output"
|
|
bitfld.long 0x00 1. " P1 ,Output Status1" "Input,Output"
|
|
bitfld.long 0x00 0. " P0 ,Output Status0" "Input,Output"
|
|
tree.end
|
|
tree "Filter"
|
|
wgroup.long 0x20++0x07
|
|
line.long 0x00 "PIO_IFER,Glitch Input Filter Enable Register"
|
|
bitfld.long 0x00 31. " P31 ,Input Filter Enable 31" "No effect,Enabled"
|
|
bitfld.long 0x00 30. " P30 ,Input Filter Enable 30" "No effect,Enabled"
|
|
bitfld.long 0x00 29. " P29 ,Input Filter Enable 29" "No effect,Enabled"
|
|
bitfld.long 0x00 28. " P28 ,Input Filter Enable 28" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Input Filter Enable 27" "No effect,Enabled"
|
|
bitfld.long 0x00 26. " P26 ,Input Filter Enable 26" "No effect,Enabled"
|
|
bitfld.long 0x00 25. " P25 ,Input Filter Enable 25" "No effect,Enabled"
|
|
bitfld.long 0x00 24. " P24 ,Input Filter Enable 24" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Input Filter Enable 23" "No effect,Enabled"
|
|
bitfld.long 0x00 22. " P22 ,Input Filter Enable 22" "No effect,Enabled"
|
|
bitfld.long 0x00 21. " P21 ,Input Filter Enable 21" "No effect,Enabled"
|
|
bitfld.long 0x00 20. " P20 ,Input Filter Enable 20" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Input Filter Enable 19" "No effect,Enabled"
|
|
bitfld.long 0x00 18. " P18 ,Input Filter Enable 18" "No effect,Enabled"
|
|
bitfld.long 0x00 17. " P17 ,Input Filter Enable 17" "No effect,Enabled"
|
|
bitfld.long 0x00 16. " P16 ,Input Filter Enable 16" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Input Filter Enable 15" "No effect,Enabled"
|
|
bitfld.long 0x00 14. " P14 ,Input Filter Enable 14" "No effect,Enabled"
|
|
bitfld.long 0x00 13. " P13 ,Input Filter Enable 13" "No effect,Enabled"
|
|
bitfld.long 0x00 12. " P12 ,Input Filter Enable 12" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Input Filter Enable 11" "No effect,Enabled"
|
|
bitfld.long 0x00 10. " P10 ,Input Filter Enable 10" "No effect,Enabled"
|
|
bitfld.long 0x00 9. " P9 ,Input Filter Enable 9" "No effect,Enabled"
|
|
bitfld.long 0x00 8. " P8 ,Input Filter Enable 8" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Input Filter Enable 7" "No effect,Enabled"
|
|
bitfld.long 0x00 6. " P6 ,Input Filter Enable 6" "No effect,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,Input Filter Enable 5" "No effect,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,Input Filter Enable 4" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Input Filter Enable 3" "No effect,Enabled"
|
|
bitfld.long 0x00 2. " P2 ,Input Filter Enable 2" "No effect,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,Input Filter Enable 1" "No effect,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,Input Filter Enable 0" "No effect,Enabled"
|
|
line.long 0x04 "PIO_IFDR,Glitch Input Filter Disable Register"
|
|
bitfld.long 0x04 31. " P31 ,Input Filter Disable 31" "No effect,Disabled"
|
|
bitfld.long 0x04 30. " P30 ,Input Filter Disable 30" "No effect,Disabled"
|
|
bitfld.long 0x04 29. " P29 ,Input Filter Disable 29" "No effect,Disabled"
|
|
bitfld.long 0x04 28. " P28 ,Input Filter Disable 28" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 27. " P27 ,Input Filter Disable 27" "No effect,Disabled"
|
|
bitfld.long 0x04 26. " P26 ,Input Filter Disable 26" "No effect,Disabled"
|
|
bitfld.long 0x04 25. " P25 ,Input Filter Disable 25" "No effect,Disabled"
|
|
bitfld.long 0x04 24. " P24 ,Input Filter Disable 24" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " P23 ,Input Filter Disable 23" "No effect,Disabled"
|
|
bitfld.long 0x04 22. " P22 ,Input Filter Disable 22" "No effect,Disabled"
|
|
bitfld.long 0x04 21. " P21 ,Input Filter Disable 21" "No effect,Disabled"
|
|
bitfld.long 0x04 20. " P20 ,Input Filter Disable 20" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " P19 ,Input Filter Disable 19" "No effect,Disabled"
|
|
bitfld.long 0x04 18. " P18 ,Input Filter Disable 18" "No effect,Disabled"
|
|
bitfld.long 0x04 17. " P17 ,Input Filter Disable 17" "No effect,Disabled"
|
|
bitfld.long 0x04 16. " P16 ,Input Filter Disable 16" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 15. " P15 ,Input Filter Disable 15" "No effect,Disabled"
|
|
bitfld.long 0x04 14. " P14 ,Input Filter Disable 14" "No effect,Disabled"
|
|
bitfld.long 0x04 13. " P13 ,Input Filter Disable 13" "No effect,Disabled"
|
|
bitfld.long 0x04 12. " P12 ,Input Filter Disable 12" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 11. " P11 ,Input Filter Disable 11" "No effect,Disabled"
|
|
bitfld.long 0x04 10. " P10 ,Input Filter Disable 10" "No effect,Disabled"
|
|
bitfld.long 0x04 9. " P9 ,Input Filter Disable 9" "No effect,Disabled"
|
|
bitfld.long 0x04 8. " P8 ,Input Filter Disable 8" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " P7 ,Input Filter Disable 7" "No effect,Disabled"
|
|
bitfld.long 0x04 6. " P6 ,Input Filter Disable 6" "No effect,Disabled"
|
|
bitfld.long 0x04 5. " P5 ,Input Filter Disable 5" "No effect,Disabled"
|
|
bitfld.long 0x04 4. " P4 ,Input Filter Disable 4" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " P3 ,Input Filter Disable 3" "No effect,Disabled"
|
|
bitfld.long 0x04 2. " P2 ,Input Filter Disable 2" "No effect,Disabled"
|
|
bitfld.long 0x04 1. " P1 ,Input Filter Disable 1" "No effect,Disabled"
|
|
bitfld.long 0x04 0. " P0 ,Input Filter Disable 0" "No effect,Disabled"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "PIO_IFSR,Glitch Input Filter Status Register"
|
|
bitfld.long 0x00 31. " P31 ,Input Filter Status 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " P30 ,Input Filter Status 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " P29 ,Input Filter Status 29" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " P28 ,Input Filter Status 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Input Filter Status 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " P26 ,Input Filter Status 26" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " P25 ,Input Filter Status 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " P24 ,Input Filter Status 24" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Input Filter Status 23" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " P22 ,Input Filter Status 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " P21 ,Input Filter Status 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " P20 ,Input Filter Status 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Input Filter Status 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " P18 ,Input Filter Status 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " P17 ,Input Filter Status 17" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " P16 ,Input Filter Status 16" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Input Filter Status 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " P14 ,Input Filter Status 14" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " P13 ,Input Filter Status 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " P12 ,Input Filter Status 12" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Input Filter Status 11" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " P10 ,Input Filter Status 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " P9 ,Input Filter Status 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " P8 ,Input Filter Status 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Input Filter Status 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " P6 ,Input Filter Status 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,Input Filter Status 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,Input Filter Status 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Input Filter Status 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " P2 ,Input Filter Status 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,Input Filter Status 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,Input Filter Status 0" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Set/Clear"
|
|
wgroup.long 0x30++0x07
|
|
line.long 0x00 "PIO_SODR,Set Output Data Register"
|
|
bitfld.long 0x00 31. " P31 ,Set Output Data 31" "No effect,Set"
|
|
bitfld.long 0x00 30. " P30 ,Set Output Data 30" "No effect,Set"
|
|
bitfld.long 0x00 29. " P29 ,Set Output Data 29" "No effect,Set"
|
|
bitfld.long 0x00 28. " P28 ,Set Output Data 28" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Set Output Data 27" "No effect,Set"
|
|
bitfld.long 0x00 26. " P26 ,Set Output Data 26" "No effect,Set"
|
|
bitfld.long 0x00 25. " P25 ,Set Output Data 25" "No effect,Set"
|
|
bitfld.long 0x00 24. " P24 ,Set Output Data 24" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Set Output Data 23" "No effect,Set"
|
|
bitfld.long 0x00 22. " P22 ,Set Output Data 22" "No effect,Set"
|
|
bitfld.long 0x00 21. " P21 ,Set Output Data 21" "No effect,Set"
|
|
bitfld.long 0x00 20. " P20 ,Set Output Data 20" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Set Output Data 19" "No effect,Set"
|
|
bitfld.long 0x00 18. " P18 ,Set Output Data 18" "No effect,Set"
|
|
bitfld.long 0x00 17. " P17 ,Set Output Data 17" "No effect,Set"
|
|
bitfld.long 0x00 16. " P16 ,Set Output Data 16" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Set Output Data 15" "No effect,Set"
|
|
bitfld.long 0x00 14. " P14 ,Set Output Data 14" "No effect,Set"
|
|
bitfld.long 0x00 13. " P13 ,Set Output Data 13" "No effect,Set"
|
|
bitfld.long 0x00 12. " P12 ,Set Output Data 12" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Set Output Data 11" "No effect,Set"
|
|
bitfld.long 0x00 10. " P10 ,Set Output Data 10" "No effect,Set"
|
|
bitfld.long 0x00 9. " P9 ,Set Output Data 9" "No effect,Set"
|
|
bitfld.long 0x00 8. " P8 ,Set Output Data 8" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Set Output Data 7" "No effect,Set"
|
|
bitfld.long 0x00 6. " P6 ,Set Output Data 6" "No effect,Set"
|
|
bitfld.long 0x00 5. " P5 ,Set Output Data 5" "No effect,Set"
|
|
bitfld.long 0x00 4. " P4 ,Set Output Data 4" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Set Output Data 3" "No effect,Set"
|
|
bitfld.long 0x00 2. " P2 ,Set Output Data 2" "No effect,Set"
|
|
bitfld.long 0x00 1. " P1 ,Set Output Data 1" "No effect,Set"
|
|
bitfld.long 0x00 0. " P0 ,Set Output Data 0" "No effect,Set"
|
|
line.long 0x04 "PIO_CODR,Clear Output Data Register"
|
|
bitfld.long 0x04 31. " P31 ,Clear Output Data 31" "No effect,Cleared"
|
|
bitfld.long 0x04 30. " P30 ,Clear Output Data 30" "No effect,Cleared"
|
|
bitfld.long 0x04 29. " P29 ,Clear Output Data 29" "No effect,Cleared"
|
|
bitfld.long 0x04 28. " P28 ,Clear Output Data 28" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 27. " P27 ,Clear Output Data 27" "No effect,Cleared"
|
|
bitfld.long 0x04 26. " P26 ,Clear Output Data 26" "No effect,Cleared"
|
|
bitfld.long 0x04 25. " P25 ,Clear Output Data 25" "No effect,Cleared"
|
|
bitfld.long 0x04 24. " P24 ,Clear Output Data 24" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 23. " P23 ,Clear Output Data 23" "No effect,Cleared"
|
|
bitfld.long 0x04 22. " P22 ,Clear Output Data 22" "No effect,Cleared"
|
|
bitfld.long 0x04 21. " P21 ,Clear Output Data 21" "No effect,Cleared"
|
|
bitfld.long 0x04 20. " P20 ,Clear Output Data 20" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 19. " P19 ,Clear Output Data 19" "No effect,Cleared"
|
|
bitfld.long 0x04 18. " P18 ,Clear Output Data 18" "No effect,Cleared"
|
|
bitfld.long 0x04 17. " P17 ,Clear Output Data 17" "No effect,Cleared"
|
|
bitfld.long 0x04 16. " P16 ,Clear Output Data 16" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 15. " P15 ,Clear Output Data 15" "No effect,Cleared"
|
|
bitfld.long 0x04 14. " P14 ,Clear Output Data 14" "No effect,Cleared"
|
|
bitfld.long 0x04 13. " P13 ,Clear Output Data 13" "No effect,Cleared"
|
|
bitfld.long 0x04 12. " P12 ,Clear Output Data 12" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 11. " P11 ,Clear Output Data 11" "No effect,Cleared"
|
|
bitfld.long 0x04 10. " P10 ,Clear Output Data 10" "No effect,Cleared"
|
|
bitfld.long 0x04 9. " P9 ,Clear Output Data 9" "No effect,Cleared"
|
|
bitfld.long 0x04 8. " P8 ,Clear Output Data 8" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 7. " P7 ,Clear Output Data 7" "No effect,Cleared"
|
|
bitfld.long 0x04 6. " P6 ,Clear Output Data 6" "No effect,Cleared"
|
|
bitfld.long 0x04 5. " P5 ,Clear Output Data 5" "No effect,Cleared"
|
|
bitfld.long 0x04 4. " P4 ,Clear Output Data 4" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 3. " P3 ,Clear Output Data 3" "No effect,Cleared"
|
|
bitfld.long 0x04 2. " P2 ,Clear Output Data 2" "No effect,Cleared"
|
|
bitfld.long 0x04 1. " P1 ,Clear Output Data 1" "No effect,Cleared"
|
|
bitfld.long 0x04 0. " P0 ,Clear Output Data 0" "No effect,Cleared"
|
|
tree.end
|
|
tree "Status"
|
|
rgroup.long 0x38++0x07
|
|
line.long 0x00 "PIO_ODSR,Output Data Status Register"
|
|
bitfld.long 0x00 31. " P31 ,Output Data Status 31" "Low,High"
|
|
bitfld.long 0x00 30. " P30 ,Output Data Status 30" "Low,High"
|
|
bitfld.long 0x00 29. " P29 ,Output Data Status 29" "Low,High"
|
|
bitfld.long 0x00 28. " P28 ,Output Data Status 28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Output Data Status 27" "Low,High"
|
|
bitfld.long 0x00 26. " P26 ,Output Data Status 26" "Low,High"
|
|
bitfld.long 0x00 25. " P25 ,Output Data Status 25" "Low,High"
|
|
bitfld.long 0x00 24. " P24 ,Output Data Status 24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Output Data Status 23" "Low,High"
|
|
bitfld.long 0x00 22. " P22 ,Output Data Status 22" "Low,High"
|
|
bitfld.long 0x00 21. " P21 ,Output Data Status 21" "Low,High"
|
|
bitfld.long 0x00 20. " P20 ,Output Data Status 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Output Data Status 19" "Low,High"
|
|
bitfld.long 0x00 18. " P18 ,Output Data Status 18" "Low,High"
|
|
bitfld.long 0x00 17. " P17 ,Output Data Status 17" "Low,High"
|
|
bitfld.long 0x00 16. " P16 ,Output Data Status 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Output Data Status 15" "Low,High"
|
|
bitfld.long 0x00 14. " P14 ,Output Data Status 14" "Low,High"
|
|
bitfld.long 0x00 13. " P13 ,Output Data Status 13" "Low,High"
|
|
bitfld.long 0x00 12. " P12 ,Output Data Status 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Output Data Status 11" "Low,High"
|
|
bitfld.long 0x00 10. " P10 ,Output Data Status 10" "Low,High"
|
|
bitfld.long 0x00 9. " P9 ,Output Data Status 9" "Low,High"
|
|
bitfld.long 0x00 8. " P8 ,Output Data Status 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Output Data Status 7" "Low,High"
|
|
bitfld.long 0x00 6. " P6 ,Output Data Status 6" "Low,High"
|
|
bitfld.long 0x00 5. " P5 ,Output Data Status 5" "Low,High"
|
|
bitfld.long 0x00 4. " P4 ,Output Data Status 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Output Data Status 3" "Low,High"
|
|
bitfld.long 0x00 2. " P2 ,Output Data Status 2" "Low,High"
|
|
bitfld.long 0x00 1. " P1 ,Output Data Status 1" "Low,High"
|
|
bitfld.long 0x00 0. " P0 ,Output Data Status 0" "Low,High"
|
|
line.long 0x04 "PIO_PDSR,Pin Data Status Register"
|
|
bitfld.long 0x04 31. " P31 ,Output Data Status 31" "Low,High"
|
|
bitfld.long 0x04 30. " P30 ,Output Data Status 30" "Low,High"
|
|
bitfld.long 0x04 29. " P29 ,Output Data Status 29" "Low,High"
|
|
bitfld.long 0x04 28. " P28 ,Output Data Status 28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 27. " P27 ,Output Data Status 27" "Low,High"
|
|
bitfld.long 0x04 26. " P26 ,Output Data Status 26" "Low,High"
|
|
bitfld.long 0x04 25. " P25 ,Output Data Status 25" "Low,High"
|
|
bitfld.long 0x04 24. " P24 ,Output Data Status 24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 23. " P23 ,Output Data Status 23" "Low,High"
|
|
bitfld.long 0x04 22. " P22 ,Output Data Status 22" "Low,High"
|
|
bitfld.long 0x04 21. " P21 ,Output Data Status 21" "Low,High"
|
|
bitfld.long 0x04 20. " P20 ,Output Data Status 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 19. " P19 ,Output Data Status 19" "Low,High"
|
|
bitfld.long 0x04 18. " P18 ,Output Data Status 18" "Low,High"
|
|
bitfld.long 0x04 17. " P17 ,Output Data Status 17" "Low,High"
|
|
bitfld.long 0x04 16. " P16 ,Output Data Status 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 15. " P15 ,Output Data Status 15" "Low,High"
|
|
bitfld.long 0x04 14. " P14 ,Output Data Status 14" "Low,High"
|
|
bitfld.long 0x04 13. " P13 ,Output Data Status 13" "Low,High"
|
|
bitfld.long 0x04 12. " P12 ,Output Data Status 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 11. " P11 ,Output Data Status 11" "Low,High"
|
|
bitfld.long 0x04 10. " P10 ,Output Data Status 10" "Low,High"
|
|
bitfld.long 0x04 9. " P9 ,Output Data Status 9" "Low,High"
|
|
bitfld.long 0x04 8. " P8 ,Output Data Status 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 7. " P7 ,Output Data Status 7" "Low,High"
|
|
bitfld.long 0x04 6. " P6 ,Output Data Status 6" "Low,High"
|
|
bitfld.long 0x04 5. " P5 ,Output Data Status 5" "Low,High"
|
|
bitfld.long 0x04 4. " P4 ,Output Data Status 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 3. " P3 ,Output Data Status 3" "Low,High"
|
|
bitfld.long 0x04 2. " P2 ,Output Data Status 2" "Low,High"
|
|
bitfld.long 0x04 1. " P1 ,Output Data Status 1" "Low,High"
|
|
bitfld.long 0x04 0. " P0 ,Output Data Status 0" "Low,High"
|
|
tree.end
|
|
tree "Interrupt"
|
|
wgroup.long 0x40++0x07
|
|
line.long 0x00 "PIO_IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 31. " P31 ,Input Change Interrupt Enable 31" "No effect,Enabled"
|
|
bitfld.long 0x00 30. " P30 ,Input Change Interrupt Enable 30" "No effect,Enabled"
|
|
bitfld.long 0x00 29. " P29 ,Input Change Interrupt Enable 29" "No effect,Enabled"
|
|
bitfld.long 0x00 28. " P28 ,Input Change Interrupt Enable 28" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Input Change Interrupt Enable 27" "No effect,Enabled"
|
|
bitfld.long 0x00 26. " P26 ,Input Change Interrupt Enable 26" "No effect,Enabled"
|
|
bitfld.long 0x00 25. " P25 ,Input Change Interrupt Enable 25" "No effect,Enabled"
|
|
bitfld.long 0x00 24. " P24 ,Input Change Interrupt Enable 24" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Input Change Interrupt Enable 23" "No effect,Enabled"
|
|
bitfld.long 0x00 22. " P22 ,Input Change Interrupt Enable 22" "No effect,Enabled"
|
|
bitfld.long 0x00 21. " P21 ,Input Change Interrupt Enable 21" "No effect,Enabled"
|
|
bitfld.long 0x00 20. " P20 ,Input Change Interrupt Enable 20" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Input Change Interrupt Enable 19" "No effect,Enabled"
|
|
bitfld.long 0x00 18. " P18 ,Input Change Interrupt Enable 18" "No effect,Enabled"
|
|
bitfld.long 0x00 17. " P17 ,Input Change Interrupt Enable 17" "No effect,Enabled"
|
|
bitfld.long 0x00 16. " P16 ,Input Change Interrupt Enable 16" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Input Change Interrupt Enable 15" "No effect,Enabled"
|
|
bitfld.long 0x00 14. " P14 ,Input Change Interrupt Enable 14" "No effect,Enabled"
|
|
bitfld.long 0x00 13. " P13 ,Input Change Interrupt Enable 13" "No effect,Enabled"
|
|
bitfld.long 0x00 12. " P12 ,Input Change Interrupt Enable 12" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Input Change Interrupt Enable 11" "No effect,Enabled"
|
|
bitfld.long 0x00 10. " P10 ,Input Change Interrupt Enable 10" "No effect,Enabled"
|
|
bitfld.long 0x00 9. " P9 ,Input Change Interrupt Enable 9" "No effect,Enabled"
|
|
bitfld.long 0x00 8. " P8 ,Input Change Interrupt Enable 8" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Input Change Interrupt Enable 7" "No effect,Enabled"
|
|
bitfld.long 0x00 6. " P6 ,Input Change Interrupt Enable 6" "No effect,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,Input Change Interrupt Enable 5" "No effect,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,Input Change Interrupt Enable 4" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Input Change Interrupt Enable 3" "No effect,Enabled"
|
|
bitfld.long 0x00 2. " P2 ,Input Change Interrupt Enable 2" "No effect,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,Input Change Interrupt Enable 1" "No effect,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,Input Change Interrupt Enable 0" "No effect,Enabled"
|
|
line.long 0x04 "PIO_IDR,Interrupt Disable Register"
|
|
bitfld.long 0x04 31. " P31 ,Input Change Interrupt Disable 31" "No effect,Disabled"
|
|
bitfld.long 0x04 30. " P30 ,Input Change Interrupt Disable 30" "No effect,Disabled"
|
|
bitfld.long 0x04 29. " P29 ,Input Change Interrupt Disable 29" "No effect,Disabled"
|
|
bitfld.long 0x04 28. " P28 ,Input Change Interrupt Disable 28" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 27. " P27 ,Input Change Interrupt Disable 27" "No effect,Disabled"
|
|
bitfld.long 0x04 26. " P26 ,Input Change Interrupt Disable 26" "No effect,Disabled"
|
|
bitfld.long 0x04 25. " P25 ,Input Change Interrupt Disable 25" "No effect,Disabled"
|
|
bitfld.long 0x04 24. " P24 ,Input Change Interrupt Disable 24" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " P23 ,Input Change Interrupt Disable 23" "No effect,Disabled"
|
|
bitfld.long 0x04 22. " P22 ,Input Change Interrupt Disable 22" "No effect,Disabled"
|
|
bitfld.long 0x04 21. " P21 ,Input Change Interrupt Disable 21" "No effect,Disabled"
|
|
bitfld.long 0x04 20. " P20 ,Input Change Interrupt Disable 20" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " P19 ,Input Change Interrupt Disable 19" "No effect,Disabled"
|
|
bitfld.long 0x04 18. " P18 ,Input Change Interrupt Disable 18" "No effect,Disabled"
|
|
bitfld.long 0x04 17. " P17 ,Input Change Interrupt Disable 17" "No effect,Disabled"
|
|
bitfld.long 0x04 16. " P16 ,Input Change Interrupt Disable 16" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 15. " P15 ,Input Change Interrupt Disable 15" "No effect,Disabled"
|
|
bitfld.long 0x04 14. " P14 ,Input Change Interrupt Disable 14" "No effect,Disabled"
|
|
bitfld.long 0x04 13. " P13 ,Input Change Interrupt Disable 13" "No effect,Disabled"
|
|
bitfld.long 0x04 12. " P12 ,Input Change Interrupt Disable 12" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 11. " P11 ,Input Change Interrupt Disable 11" "No effect,Disabled"
|
|
bitfld.long 0x04 10. " P10 ,Input Change Interrupt Disable 10" "No effect,Disabled"
|
|
bitfld.long 0x04 9. " P9 ,Input Change Interrupt Disable 9" "No effect,Disabled"
|
|
bitfld.long 0x04 8. " P8 ,Input Change Interrupt Disable 8" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " P7 ,Input Change Interrupt Disable 7" "No effect,Disabled"
|
|
bitfld.long 0x04 6. " P6 ,Input Change Interrupt Disable 6" "No effect,Disabled"
|
|
bitfld.long 0x04 5. " P5 ,Input Change Interrupt Disable 5" "No effect,Disabled"
|
|
bitfld.long 0x04 4. " P4 ,Input Change Interrupt Disable 4" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " P3 ,Input Change Interrupt Disable 3" "No effect,Disabled"
|
|
bitfld.long 0x04 2. " P2 ,Input Change Interrupt Disable 2" "No effect,Disabled"
|
|
bitfld.long 0x04 1. " P1 ,Input Change Interrupt Disable 1" "No effect,Disabled"
|
|
bitfld.long 0x04 0. " P0 ,Input Change Interrupt Disable 0" "No effect,Disabled"
|
|
rgroup.long 0x48++0x07
|
|
line.long 0x00 "PIO_IMR,Interrupt Mask Register"
|
|
bitfld.long 0x00 31. " P31 ,Input Change Interrupt Mask 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " P30 ,Input Change Interrupt Mask 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " P29 ,Input Change Interrupt Mask 29" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " P28 ,Input Change Interrupt Mask 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Input Change Interrupt Mask 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " P26 ,Input Change Interrupt Mask 26" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " P25 ,Input Change Interrupt Mask 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " P24 ,Input Change Interrupt Mask 24" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Input Change Interrupt Mask 23" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " P22 ,Input Change Interrupt Mask 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " P21 ,Input Change Interrupt Mask 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " P20 ,Input Change Interrupt Mask 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Input Change Interrupt Mask 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " P18 ,Input Change Interrupt Mask 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " P17 ,Input Change Interrupt Mask 17" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " P16 ,Input Change Interrupt Mask 16" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Input Change Interrupt Mask 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " P14 ,Input Change Interrupt Mask 14" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " P13 ,Input Change Interrupt Mask 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " P12 ,Input Change Interrupt Mask 12" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Input Change Interrupt Mask 11" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " P10 ,Input Change Interrupt Mask 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " P9 ,Input Change Interrupt Mask 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " P8 ,Input Change Interrupt Mask 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Input Change Interrupt Mask 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " P6 ,Input Change Interrupt Mask 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,Input Change Interrupt Mask 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,Input Change Interrupt Mask 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Input Change Interrupt Mask 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " P2 ,Input Change Interrupt Mask 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,Input Change Interrupt Mask 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,Input Change Interrupt Mask 0" "Disabled,Enabled"
|
|
line.long 0x04 "PIO_ISR,Interrupt Status Register"
|
|
bitfld.long 0x04 31. " P31 ,Input Change Interrupt Status 31" "Not changed,Changed"
|
|
bitfld.long 0x04 30. " P30 ,Input Change Interrupt Status 30" "Not changed,Changed"
|
|
bitfld.long 0x04 29. " P29 ,Input Change Interrupt Status 29" "Not changed,Changed"
|
|
bitfld.long 0x04 28. " P28 ,Input Change Interrupt Status 28" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x04 27. " P27 ,Input Change Interrupt Status 27" "Not changed,Changed"
|
|
bitfld.long 0x04 26. " P26 ,Input Change Interrupt Status 26" "Not changed,Changed"
|
|
bitfld.long 0x04 25. " P25 ,Input Change Interrupt Status 25" "Not changed,Changed"
|
|
bitfld.long 0x04 24. " P24 ,Input Change Interrupt Status 24" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x04 23. " P23 ,Input Change Interrupt Status 23" "Not changed,Changed"
|
|
bitfld.long 0x04 22. " P22 ,Input Change Interrupt Status 22" "Not changed,Changed"
|
|
bitfld.long 0x04 21. " P21 ,Input Change Interrupt Status 21" "Not changed,Changed"
|
|
bitfld.long 0x04 20. " P20 ,Input Change Interrupt Status 20" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x04 19. " P19 ,Input Change Interrupt Status 19" "Not changed,Changed"
|
|
bitfld.long 0x04 18. " P18 ,Input Change Interrupt Status 18" "Not changed,Changed"
|
|
bitfld.long 0x04 17. " P17 ,Input Change Interrupt Status 17" "Not changed,Changed"
|
|
bitfld.long 0x04 16. " P16 ,Input Change Interrupt Status 16" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x04 15. " P15 ,Input Change Interrupt Status 15" "Not changed,Changed"
|
|
bitfld.long 0x04 14. " P14 ,Input Change Interrupt Status 14" "Not changed,Changed"
|
|
bitfld.long 0x04 13. " P13 ,Input Change Interrupt Status 13" "Not changed,Changed"
|
|
bitfld.long 0x04 12. " P12 ,Input Change Interrupt Status 12" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x04 11. " P11 ,Input Change Interrupt Status 11" "Not changed,Changed"
|
|
bitfld.long 0x04 10. " P10 ,Input Change Interrupt Status 10" "Not changed,Changed"
|
|
bitfld.long 0x04 9. " P9 ,Input Change Interrupt Status 9" "Not changed,Changed"
|
|
bitfld.long 0x04 8. " P8 ,Input Change Interrupt Status 8" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x04 7. " P7 ,Input Change Interrupt Status 7" "Not changed,Changed"
|
|
bitfld.long 0x04 6. " P6 ,Input Change Interrupt Status 6" "Not changed,Changed"
|
|
bitfld.long 0x04 5. " P5 ,Input Change Interrupt Status 5" "Not changed,Changed"
|
|
bitfld.long 0x04 4. " P4 ,Input Change Interrupt Status 4" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x04 3. " P3 ,Input Change Interrupt Status 3" "Not changed,Changed"
|
|
bitfld.long 0x04 2. " P2 ,Input Change Interrupt Status 2" "Not changed,Changed"
|
|
bitfld.long 0x04 1. " P1 ,Input Change Interrupt Status 1" "Not changed,Changed"
|
|
bitfld.long 0x04 0. " P0 ,Input Change Interrupt Status 0" "Not changed,Changed"
|
|
tree.end
|
|
tree "Multi-driver"
|
|
wgroup.long 0x50++0x07
|
|
line.long 0x00 "PIO_MDER,Multi-driver Enable Register"
|
|
bitfld.long 0x00 31. " P31 ,Multi Drive Enable 31" "No effect,Enabled"
|
|
bitfld.long 0x00 30. " P30 ,Multi Drive Enable 30" "No effect,Enabled"
|
|
bitfld.long 0x00 29. " P29 ,Multi Drive Enable 29" "No effect,Enabled"
|
|
bitfld.long 0x00 28. " P28 ,Multi Drive Enable 28" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Multi Drive Enable 27" "No effect,Enabled"
|
|
bitfld.long 0x00 26. " P26 ,Multi Drive Enable 26" "No effect,Enabled"
|
|
bitfld.long 0x00 25. " P25 ,Multi Drive Enable 25" "No effect,Enabled"
|
|
bitfld.long 0x00 24. " P24 ,Multi Drive Enable 24" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Multi Drive Enable 23" "No effect,Enabled"
|
|
bitfld.long 0x00 22. " P22 ,Multi Drive Enable 22" "No effect,Enabled"
|
|
bitfld.long 0x00 21. " P21 ,Multi Drive Enable 21" "No effect,Enabled"
|
|
bitfld.long 0x00 20. " P20 ,Multi Drive Enable 20" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Multi Drive Enable 19" "No effect,Enabled"
|
|
bitfld.long 0x00 18. " P18 ,Multi Drive Enable 18" "No effect,Enabled"
|
|
bitfld.long 0x00 17. " P17 ,Multi Drive Enable 17" "No effect,Enabled"
|
|
bitfld.long 0x00 16. " P16 ,Multi Drive Enable 16" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Multi Drive Enable 15" "No effect,Enabled"
|
|
bitfld.long 0x00 14. " P14 ,Multi Drive Enable 14" "No effect,Enabled"
|
|
bitfld.long 0x00 13. " P13 ,Multi Drive Enable 13" "No effect,Enabled"
|
|
bitfld.long 0x00 12. " P12 ,Multi Drive Enable 12" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Multi Drive Enable 11" "No effect,Enabled"
|
|
bitfld.long 0x00 10. " P10 ,Multi Drive Enable 10" "No effect,Enabled"
|
|
bitfld.long 0x00 9. " P9 ,Multi Drive Enable 9" "No effect,Enabled"
|
|
bitfld.long 0x00 8. " P8 ,Multi Drive Enable 8" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Multi Drive Enable 7" "No effect,Enabled"
|
|
bitfld.long 0x00 6. " P6 ,Multi Drive Enable 6" "No effect,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,Multi Drive Enable 5" "No effect,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,Multi Drive Enable 4" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Multi Drive Enable 3" "No effect,Enabled"
|
|
bitfld.long 0x00 2. " P2 ,Multi Drive Enable 2" "No effect,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,Multi Drive Enable 1" "No effect,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,Multi Drive Enable 0" "No effect,Enabled"
|
|
line.long 0x04 "PIO_MDDR,Multi-driver Disable Register"
|
|
bitfld.long 0x04 31. " P31 ,Multi Drive Disable 31" "No effect,Disabled"
|
|
bitfld.long 0x04 30. " P30 ,Multi Drive Disable 30" "No effect,Disabled"
|
|
bitfld.long 0x04 29. " P29 ,Multi Drive Disable 29" "No effect,Disabled"
|
|
bitfld.long 0x04 28. " P28 ,Multi Drive Disable 28" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 27. " P27 ,Multi Drive Disable 27" "No effect,Disabled"
|
|
bitfld.long 0x04 26. " P26 ,Multi Drive Disable 26" "No effect,Disabled"
|
|
bitfld.long 0x04 25. " P25 ,Multi Drive Disable 25" "No effect,Disabled"
|
|
bitfld.long 0x04 24. " P24 ,Multi Drive Disable 24" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " P23 ,Multi Drive Disable 23" "No effect,Disabled"
|
|
bitfld.long 0x04 22. " P22 ,Multi Drive Disable 22" "No effect,Disabled"
|
|
bitfld.long 0x04 21. " P21 ,Multi Drive Disable 21" "No effect,Disabled"
|
|
bitfld.long 0x04 20. " P20 ,Multi Drive Disable 20" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " P19 ,Multi Drive Disable 19" "No effect,Disabled"
|
|
bitfld.long 0x04 18. " P18 ,Multi Drive Disable 18" "No effect,Disabled"
|
|
bitfld.long 0x04 17. " P17 ,Multi Drive Disable 17" "No effect,Disabled"
|
|
bitfld.long 0x04 16. " P16 ,Multi Drive Disable 16" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 15. " P15 ,Multi Drive Disable 15" "No effect,Disabled"
|
|
bitfld.long 0x04 14. " P14 ,Multi Drive Disable 14" "No effect,Disabled"
|
|
bitfld.long 0x04 13. " P13 ,Multi Drive Disable 13" "No effect,Disabled"
|
|
bitfld.long 0x04 12. " P12 ,Multi Drive Disable 12" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 11. " P11 ,Multi Drive Disable 11" "No effect,Disabled"
|
|
bitfld.long 0x04 10. " P10 ,Multi Drive Disable 10" "No effect,Disabled"
|
|
bitfld.long 0x04 9. " P9 ,Multi Drive Disable 9" "No effect,Disabled"
|
|
bitfld.long 0x04 8. " P8 ,Multi Drive Disable 8" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " P7 ,Multi Drive Disable 7" "No effect,Disabled"
|
|
bitfld.long 0x04 6. " P6 ,Multi Drive Disable 6" "No effect,Disabled"
|
|
bitfld.long 0x04 5. " P5 ,Multi Drive Disable 5" "No effect,Disabled"
|
|
bitfld.long 0x04 4. " P4 ,Multi Drive Disable 4" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " P3 ,Multi Drive Disable 3" "No effect,Disabled"
|
|
bitfld.long 0x04 2. " P2 ,Multi Drive Disable 2" "No effect,Disabled"
|
|
bitfld.long 0x04 1. " P1 ,Multi Drive Disable 1" "No effect,Disabled"
|
|
bitfld.long 0x04 0. " P0 ,Multi Drive Disable 0" "No effect,Disabled"
|
|
rgroup.long 0x58++0x03
|
|
line.long 0x00 "PIO_MDSR,Multi-driver Status Register"
|
|
bitfld.long 0x00 31. " P31 ,Multi Drive Status 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " P30 ,Multi Drive Status 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " P29 ,Multi Drive Status 29" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " P28 ,Multi Drive Status 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Multi Drive Status 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " P26 ,Multi Drive Status 26" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " P25 ,Multi Drive Status 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " P24 ,Multi Drive Status 24" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Multi Drive Status 23" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " P22 ,Multi Drive Status 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " P21 ,Multi Drive Status 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " P20 ,Multi Drive Status 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Multi Drive Status 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " P18 ,Multi Drive Status 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " P17 ,Multi Drive Status 17" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " P16 ,Multi Drive Status 16" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Multi Drive Status 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " P14 ,Multi Drive Status 14" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " P13 ,Multi Drive Status 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " P12 ,Multi Drive Status 12" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Multi Drive Status 11" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " P10 ,Multi Drive Status 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " P9 ,Multi Drive Status 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " P8 ,Multi Drive Status 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Multi Drive Status 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " P6 ,Multi Drive Status 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,Multi Drive Status 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,Multi Drive Status 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Multi Drive Status 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " P2 ,Multi Drive Status 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,Multi Drive Status 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,Multi Drive Status 0" "Disabled,Enabled"
|
|
tree.end
|
|
tree.end
|
|
tree "PIOA"
|
|
base 0xFFFF0000
|
|
tree "PIO"
|
|
wgroup.long 0x00++0x07
|
|
line.long 0x00 "PIO_PER,PIO Enable Register"
|
|
bitfld.long 0x00 31. " P31 ,PIO Enable 31" "No effect,Enabled"
|
|
bitfld.long 0x00 30. " P30 ,PIO Enable 30" "No effect,Enabled"
|
|
bitfld.long 0x00 29. " P29 ,PIO Enable 29" "No effect,Enabled"
|
|
bitfld.long 0x00 28. " P28 ,PIO Enable 28" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,PIO Enable 27" "No effect,Enabled"
|
|
bitfld.long 0x00 26. " P26 ,PIO Enable 26" "No effect,Enabled"
|
|
bitfld.long 0x00 25. " P25 ,PIO Enable 25" "No effect,Enabled"
|
|
bitfld.long 0x00 24. " P24 ,PIO Enable 24" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,PIO Enable 23" "No effect,Enabled"
|
|
bitfld.long 0x00 22. " P22 ,PIO Enable 22" "No effect,Enabled"
|
|
bitfld.long 0x00 21. " P21 ,PIO Enable 21" "No effect,Enabled"
|
|
bitfld.long 0x00 20. " P20 ,PIO Enable 20" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,PIO Enable 19" "No effect,Enabled"
|
|
bitfld.long 0x00 18. " P18 ,PIO Enable 18" "No effect,Enabled"
|
|
bitfld.long 0x00 17. " P17 ,PIO Enable 17" "No effect,Enabled"
|
|
bitfld.long 0x00 16. " P16 ,PIO Enable 16" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,PIO Enable 15" "No effect,Enabled"
|
|
bitfld.long 0x00 14. " P14 ,PIO Enable 14" "No effect,Enabled"
|
|
bitfld.long 0x00 13. " P13 ,PIO Enable 13" "No effect,Enabled"
|
|
bitfld.long 0x00 12. " P12 ,PIO Enable 12" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,PIO Enable 11" "No effect,Enabled"
|
|
bitfld.long 0x00 10. " P10 ,PIO Enable 10" "No effect,Enabled"
|
|
bitfld.long 0x00 9. " P9 ,PIO Enable 9" "No effect,Enabled"
|
|
bitfld.long 0x00 8. " P8 ,PIO Enable 8" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,PIO Enable 7" "No effect,Enabled"
|
|
bitfld.long 0x00 6. " P6 ,PIO Enable 6" "No effect,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,PIO Enable 5" "No effect,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,PIO Enable 4" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,PIO Enable 3" "No effect,Enabled"
|
|
bitfld.long 0x00 2. " P2 ,PIO Enable 2" "No effect,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,PIO Enable 1" "No effect,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,PIO Enable 0" "No effect,Enabled"
|
|
line.long 0x04 "PIO_PDR,PIO Disable Register"
|
|
bitfld.long 0x04 31. " P31 ,PIO Disable 31" "No effect,Disabled"
|
|
bitfld.long 0x04 30. " P30 ,PIO Disable 30" "No effect,Disabled"
|
|
bitfld.long 0x04 29. " P29 ,PIO Disable 29" "No effect,Disabled"
|
|
bitfld.long 0x04 28. " P28 ,PIO Disable 28" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 27. " P27 ,PIO Disable 27" "No effect,Disabled"
|
|
bitfld.long 0x04 26. " P26 ,PIO Disable 26" "No effect,Disabled"
|
|
bitfld.long 0x04 25. " P25 ,PIO Disable 25" "No effect,Disabled"
|
|
bitfld.long 0x04 24. " P24 ,PIO Disable 24" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " P23 ,PIO Disable 23" "No effect,Disabled"
|
|
bitfld.long 0x04 22. " P22 ,PIO Disable 22" "No effect,Disabled"
|
|
bitfld.long 0x04 21. " P21 ,PIO Disable 21" "No effect,Disabled"
|
|
bitfld.long 0x04 20. " P20 ,PIO Disable 20" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " P19 ,PIO Disable 19" "No effect,Disabled"
|
|
bitfld.long 0x04 18. " P18 ,PIO Disable 18" "No effect,Disabled"
|
|
bitfld.long 0x04 17. " P17 ,PIO Disable 17" "No effect,Disabled"
|
|
bitfld.long 0x04 16. " P16 ,PIO Disable 16" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 15. " P15 ,PIO Disable 15" "No effect,Disabled"
|
|
bitfld.long 0x04 14. " P14 ,PIO Disable 14" "No effect,Disabled"
|
|
bitfld.long 0x04 13. " P13 ,PIO Disable 13" "No effect,Disabled"
|
|
bitfld.long 0x04 12. " P12 ,PIO Disable 12" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 11. " P11 ,PIO Disable 11" "No effect,Disabled"
|
|
bitfld.long 0x04 10. " P10 ,PIO Disable 10" "No effect,Disabled"
|
|
bitfld.long 0x04 9. " P9 ,PIO Disable 9" "No effect,Disabled"
|
|
bitfld.long 0x04 8. " P8 ,PIO Disable 8" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " P7 ,PIO Disable 7" "No effect,Disabled"
|
|
bitfld.long 0x04 6. " P6 ,PIO Disable 6" "No effect,Disabled"
|
|
bitfld.long 0x04 5. " P5 ,PIO Disable 5" "No effect,Disabled"
|
|
bitfld.long 0x04 4. " P4 ,PIO Disable 4" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " P3 ,PIO Disable 3" "No effect,Disabled"
|
|
bitfld.long 0x04 2. " P2 ,PIO Disable 2" "No effect,Disabled"
|
|
bitfld.long 0x04 1. " P1 ,PIO Disable 1" "No effect,Disabled"
|
|
bitfld.long 0x04 0. " P0 ,PIO Disable 0" "No effect,Disabled"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "PIO_PSR,PIO Status Register"
|
|
bitfld.long 0x00 31. " P31 ,PIO Status 31" "Inactive,Active"
|
|
bitfld.long 0x00 30. " P30 ,PIO Status 30" "Inactive,Active"
|
|
bitfld.long 0x00 29. " P29 ,PIO Status 29" "Inactive,Active"
|
|
bitfld.long 0x00 28. " P28 ,PIO Status 28" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,PIO Status 27" "Inactive,Active"
|
|
bitfld.long 0x00 26. " P26 ,PIO Status 26" "Inactive,Active"
|
|
bitfld.long 0x00 25. " P25 ,PIO Status 25" "Inactive,Active"
|
|
bitfld.long 0x00 24. " P24 ,PIO Status 24" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,PIO Status 23" "Inactive,Active"
|
|
bitfld.long 0x00 22. " P22 ,PIO Status 22" "Inactive,Active"
|
|
bitfld.long 0x00 21. " P21 ,PIO Status 21" "Inactive,Active"
|
|
bitfld.long 0x00 20. " P20 ,PIO Status 20" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,PIO Status 19" "Inactive,Active"
|
|
bitfld.long 0x00 18. " P18 ,PIO Status 18" "Inactive,Active"
|
|
bitfld.long 0x00 17. " P17 ,PIO Status 17" "Inactive,Active"
|
|
bitfld.long 0x00 16. " P16 ,PIO Status 16" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,PIO Status 15" "Inactive,Active"
|
|
bitfld.long 0x00 14. " P14 ,PIO Status 14" "Inactive,Active"
|
|
bitfld.long 0x00 13. " P13 ,PIO Status 13" "Inactive,Active"
|
|
bitfld.long 0x00 12. " P12 ,PIO Status 12" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,PIO Status 11" "Inactive,Active"
|
|
bitfld.long 0x00 10. " P10 ,PIO Status 10" "Inactive,Active"
|
|
bitfld.long 0x00 9. " P9 ,PIO Status 9" "Inactive,Active"
|
|
bitfld.long 0x00 8. " P8 ,PIO Status 8" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,PIO Status 7" "Inactive,Active"
|
|
bitfld.long 0x00 6. " P6 ,PIO Status 6" "Inactive,Active"
|
|
bitfld.long 0x00 5. " P5 ,PIO Status 5" "Inactive,Active"
|
|
bitfld.long 0x00 4. " P4 ,PIO Status 4" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,PIO Status 3" "Inactive,Active"
|
|
bitfld.long 0x00 2. " P2 ,PIO Status 2" "Inactive,Active"
|
|
bitfld.long 0x00 1. " P1 ,PIO Status 1" "Inactive,Active"
|
|
bitfld.long 0x00 0. " P0 ,PIO Status 0" "Inactive,Active"
|
|
tree.end
|
|
tree "Output"
|
|
wgroup.long 0x10++0x07
|
|
line.long 0x00 "PIO_OER,Output Enable Register"
|
|
bitfld.long 0x00 31. " P31 ,Output Enable31" "No effect,Enabled"
|
|
bitfld.long 0x00 30. " P30 ,Output Enable30" "No effect,Enabled"
|
|
bitfld.long 0x00 29. " P29 ,Output Enable29" "No effect,Enabled"
|
|
bitfld.long 0x00 28. " P28 ,Output Enable28" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Output Enable27" "No effect,Enabled"
|
|
bitfld.long 0x00 26. " P26 ,Output Enable26" "No effect,Enabled"
|
|
bitfld.long 0x00 25. " P25 ,Output Enable25" "No effect,Enabled"
|
|
bitfld.long 0x00 24. " P24 ,Output Enable24" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Output Enable23" "No effect,Enabled"
|
|
bitfld.long 0x00 22. " P22 ,Output Enable22" "No effect,Enabled"
|
|
bitfld.long 0x00 21. " P21 ,Output Enable21" "No effect,Enabled"
|
|
bitfld.long 0x00 20. " P20 ,Output Enable20" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Output Enable19" "No effect,Enabled"
|
|
bitfld.long 0x00 18. " P18 ,Output Enable18" "No effect,Enabled"
|
|
bitfld.long 0x00 17. " P17 ,Output Enable17" "No effect,Enabled"
|
|
bitfld.long 0x00 16. " P16 ,Output Enable16" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Output Enable15" "No effect,Enabled"
|
|
bitfld.long 0x00 14. " P14 ,Output Enable14" "No effect,Enabled"
|
|
bitfld.long 0x00 13. " P13 ,Output Enable13" "No effect,Enabled"
|
|
bitfld.long 0x00 12. " P12 ,Output Enable12" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Output Enable11" "No effect,Enabled"
|
|
bitfld.long 0x00 10. " P10 ,Output Enable10" "No effect,Enabled"
|
|
bitfld.long 0x00 9. " P9 ,Output Enable9" "No effect,Enabled"
|
|
bitfld.long 0x00 8. " P8 ,Output Enable8" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Output Enable7" "No effect,Enabled"
|
|
bitfld.long 0x00 6. " P6 ,Output Enable6" "No effect,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,Output Enable5" "No effect,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,Output Enable4" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Output Enable3" "No effect,Enabled"
|
|
bitfld.long 0x00 2. " P2 ,Output Enable2" "No effect,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,Output Enable1" "No effect,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,Output Enable0" "No effect,Enabled"
|
|
line.long 0x04 "PIO_ODR,Output Disable Register"
|
|
bitfld.long 0x04 31. " P31 ,Output Disable31" "No effect,Disabled"
|
|
bitfld.long 0x04 30. " P30 ,Output Disable30" "No effect,Disabled"
|
|
bitfld.long 0x04 29. " P29 ,Output Disable29" "No effect,Disabled"
|
|
bitfld.long 0x04 28. " P28 ,Output Disable28" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 27. " P27 ,Output Disable27" "No effect,Disabled"
|
|
bitfld.long 0x04 26. " P26 ,Output Disable26" "No effect,Disabled"
|
|
bitfld.long 0x04 25. " P25 ,Output Disable25" "No effect,Disabled"
|
|
bitfld.long 0x04 24. " P24 ,Output Disable24" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " P23 ,Output Disable23" "No effect,Disabled"
|
|
bitfld.long 0x04 22. " P22 ,Output Disable22" "No effect,Disabled"
|
|
bitfld.long 0x04 21. " P21 ,Output Disable21" "No effect,Disabled"
|
|
bitfld.long 0x04 20. " P20 ,Output Disable20" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " P19 ,Output Disable19" "No effect,Disabled"
|
|
bitfld.long 0x04 18. " P18 ,Output Disable18" "No effect,Disabled"
|
|
bitfld.long 0x04 17. " P17 ,Output Disable17" "No effect,Disabled"
|
|
bitfld.long 0x04 16. " P16 ,Output Disable16" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 15. " P15 ,Output Disable15" "No effect,Disabled"
|
|
bitfld.long 0x04 14. " P14 ,Output Disable14" "No effect,Disabled"
|
|
bitfld.long 0x04 13. " P13 ,Output Disable13" "No effect,Disabled"
|
|
bitfld.long 0x04 12. " P12 ,Output Disable12" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 11. " P11 ,Output Disable11" "No effect,Disabled"
|
|
bitfld.long 0x04 10. " P10 ,Output Disable10" "No effect,Disabled"
|
|
bitfld.long 0x04 9. " P9 ,Output Disable9" "No effect,Disabled"
|
|
bitfld.long 0x04 8. " P8 ,Output Disable8" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " P7 ,Output Disable7" "No effect,Disabled"
|
|
bitfld.long 0x04 6. " P6 ,Output Disable6" "No effect,Disabled"
|
|
bitfld.long 0x04 5. " P5 ,Output Disable5" "No effect,Disabled"
|
|
bitfld.long 0x04 4. " P4 ,Output Disable4" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " P3 ,Output Disable3" "No effect,Disabled"
|
|
bitfld.long 0x04 2. " P2 ,Output Disable2" "No effect,Disabled"
|
|
bitfld.long 0x04 1. " P1 ,Output Disable1" "No effect,Disabled"
|
|
bitfld.long 0x04 0. " P0 ,Output Disable0" "No effect,Disabled"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "PIO_OSR,Output Status Register"
|
|
bitfld.long 0x00 31. " P31 ,Output Status31" "Input,Output"
|
|
bitfld.long 0x00 30. " P30 ,Output Status30" "Input,Output"
|
|
bitfld.long 0x00 29. " P29 ,Output Status29" "Input,Output"
|
|
bitfld.long 0x00 28. " P28 ,Output Status28" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Output Status27" "Input,Output"
|
|
bitfld.long 0x00 26. " P26 ,Output Status26" "Input,Output"
|
|
bitfld.long 0x00 25. " P25 ,Output Status25" "Input,Output"
|
|
bitfld.long 0x00 24. " P24 ,Output Status24" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Output Status23" "Input,Output"
|
|
bitfld.long 0x00 22. " P22 ,Output Status22" "Input,Output"
|
|
bitfld.long 0x00 21. " P21 ,Output Status21" "Input,Output"
|
|
bitfld.long 0x00 20. " P20 ,Output Status20" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Output Status19" "Input,Output"
|
|
bitfld.long 0x00 18. " P18 ,Output Status18" "Input,Output"
|
|
bitfld.long 0x00 17. " P17 ,Output Status17" "Input,Output"
|
|
bitfld.long 0x00 16. " P16 ,Output Status16" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Output Status15" "Input,Output"
|
|
bitfld.long 0x00 14. " P14 ,Output Status14" "Input,Output"
|
|
bitfld.long 0x00 13. " P13 ,Output Status13" "Input,Output"
|
|
bitfld.long 0x00 12. " P12 ,Output Status12" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Output Status11" "Input,Output"
|
|
bitfld.long 0x00 10. " P10 ,Output Status10" "Input,Output"
|
|
bitfld.long 0x00 9. " P9 ,Output Status9" "Input,Output"
|
|
bitfld.long 0x00 8. " P8 ,Output Status8" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Output Status7" "Input,Output"
|
|
bitfld.long 0x00 6. " P6 ,Output Status6" "Input,Output"
|
|
bitfld.long 0x00 5. " P5 ,Output Status5" "Input,Output"
|
|
bitfld.long 0x00 4. " P4 ,Output Status4" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Output Status3" "Input,Output"
|
|
bitfld.long 0x00 2. " P2 ,Output Status2" "Input,Output"
|
|
bitfld.long 0x00 1. " P1 ,Output Status1" "Input,Output"
|
|
bitfld.long 0x00 0. " P0 ,Output Status0" "Input,Output"
|
|
tree.end
|
|
tree "Filter"
|
|
wgroup.long 0x20++0x07
|
|
line.long 0x00 "PIO_IFER,Glitch Input Filter Enable Register"
|
|
bitfld.long 0x00 31. " P31 ,Input Filter Enable 31" "No effect,Enabled"
|
|
bitfld.long 0x00 30. " P30 ,Input Filter Enable 30" "No effect,Enabled"
|
|
bitfld.long 0x00 29. " P29 ,Input Filter Enable 29" "No effect,Enabled"
|
|
bitfld.long 0x00 28. " P28 ,Input Filter Enable 28" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Input Filter Enable 27" "No effect,Enabled"
|
|
bitfld.long 0x00 26. " P26 ,Input Filter Enable 26" "No effect,Enabled"
|
|
bitfld.long 0x00 25. " P25 ,Input Filter Enable 25" "No effect,Enabled"
|
|
bitfld.long 0x00 24. " P24 ,Input Filter Enable 24" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Input Filter Enable 23" "No effect,Enabled"
|
|
bitfld.long 0x00 22. " P22 ,Input Filter Enable 22" "No effect,Enabled"
|
|
bitfld.long 0x00 21. " P21 ,Input Filter Enable 21" "No effect,Enabled"
|
|
bitfld.long 0x00 20. " P20 ,Input Filter Enable 20" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Input Filter Enable 19" "No effect,Enabled"
|
|
bitfld.long 0x00 18. " P18 ,Input Filter Enable 18" "No effect,Enabled"
|
|
bitfld.long 0x00 17. " P17 ,Input Filter Enable 17" "No effect,Enabled"
|
|
bitfld.long 0x00 16. " P16 ,Input Filter Enable 16" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Input Filter Enable 15" "No effect,Enabled"
|
|
bitfld.long 0x00 14. " P14 ,Input Filter Enable 14" "No effect,Enabled"
|
|
bitfld.long 0x00 13. " P13 ,Input Filter Enable 13" "No effect,Enabled"
|
|
bitfld.long 0x00 12. " P12 ,Input Filter Enable 12" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Input Filter Enable 11" "No effect,Enabled"
|
|
bitfld.long 0x00 10. " P10 ,Input Filter Enable 10" "No effect,Enabled"
|
|
bitfld.long 0x00 9. " P9 ,Input Filter Enable 9" "No effect,Enabled"
|
|
bitfld.long 0x00 8. " P8 ,Input Filter Enable 8" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Input Filter Enable 7" "No effect,Enabled"
|
|
bitfld.long 0x00 6. " P6 ,Input Filter Enable 6" "No effect,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,Input Filter Enable 5" "No effect,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,Input Filter Enable 4" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Input Filter Enable 3" "No effect,Enabled"
|
|
bitfld.long 0x00 2. " P2 ,Input Filter Enable 2" "No effect,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,Input Filter Enable 1" "No effect,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,Input Filter Enable 0" "No effect,Enabled"
|
|
line.long 0x04 "PIO_IFDR,Glitch Input Filter Disable Register"
|
|
bitfld.long 0x04 31. " P31 ,Input Filter Disable 31" "No effect,Disabled"
|
|
bitfld.long 0x04 30. " P30 ,Input Filter Disable 30" "No effect,Disabled"
|
|
bitfld.long 0x04 29. " P29 ,Input Filter Disable 29" "No effect,Disabled"
|
|
bitfld.long 0x04 28. " P28 ,Input Filter Disable 28" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 27. " P27 ,Input Filter Disable 27" "No effect,Disabled"
|
|
bitfld.long 0x04 26. " P26 ,Input Filter Disable 26" "No effect,Disabled"
|
|
bitfld.long 0x04 25. " P25 ,Input Filter Disable 25" "No effect,Disabled"
|
|
bitfld.long 0x04 24. " P24 ,Input Filter Disable 24" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " P23 ,Input Filter Disable 23" "No effect,Disabled"
|
|
bitfld.long 0x04 22. " P22 ,Input Filter Disable 22" "No effect,Disabled"
|
|
bitfld.long 0x04 21. " P21 ,Input Filter Disable 21" "No effect,Disabled"
|
|
bitfld.long 0x04 20. " P20 ,Input Filter Disable 20" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " P19 ,Input Filter Disable 19" "No effect,Disabled"
|
|
bitfld.long 0x04 18. " P18 ,Input Filter Disable 18" "No effect,Disabled"
|
|
bitfld.long 0x04 17. " P17 ,Input Filter Disable 17" "No effect,Disabled"
|
|
bitfld.long 0x04 16. " P16 ,Input Filter Disable 16" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 15. " P15 ,Input Filter Disable 15" "No effect,Disabled"
|
|
bitfld.long 0x04 14. " P14 ,Input Filter Disable 14" "No effect,Disabled"
|
|
bitfld.long 0x04 13. " P13 ,Input Filter Disable 13" "No effect,Disabled"
|
|
bitfld.long 0x04 12. " P12 ,Input Filter Disable 12" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 11. " P11 ,Input Filter Disable 11" "No effect,Disabled"
|
|
bitfld.long 0x04 10. " P10 ,Input Filter Disable 10" "No effect,Disabled"
|
|
bitfld.long 0x04 9. " P9 ,Input Filter Disable 9" "No effect,Disabled"
|
|
bitfld.long 0x04 8. " P8 ,Input Filter Disable 8" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " P7 ,Input Filter Disable 7" "No effect,Disabled"
|
|
bitfld.long 0x04 6. " P6 ,Input Filter Disable 6" "No effect,Disabled"
|
|
bitfld.long 0x04 5. " P5 ,Input Filter Disable 5" "No effect,Disabled"
|
|
bitfld.long 0x04 4. " P4 ,Input Filter Disable 4" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " P3 ,Input Filter Disable 3" "No effect,Disabled"
|
|
bitfld.long 0x04 2. " P2 ,Input Filter Disable 2" "No effect,Disabled"
|
|
bitfld.long 0x04 1. " P1 ,Input Filter Disable 1" "No effect,Disabled"
|
|
bitfld.long 0x04 0. " P0 ,Input Filter Disable 0" "No effect,Disabled"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "PIO_IFSR,Glitch Input Filter Status Register"
|
|
bitfld.long 0x00 31. " P31 ,Input Filter Status 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " P30 ,Input Filter Status 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " P29 ,Input Filter Status 29" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " P28 ,Input Filter Status 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Input Filter Status 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " P26 ,Input Filter Status 26" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " P25 ,Input Filter Status 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " P24 ,Input Filter Status 24" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Input Filter Status 23" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " P22 ,Input Filter Status 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " P21 ,Input Filter Status 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " P20 ,Input Filter Status 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Input Filter Status 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " P18 ,Input Filter Status 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " P17 ,Input Filter Status 17" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " P16 ,Input Filter Status 16" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Input Filter Status 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " P14 ,Input Filter Status 14" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " P13 ,Input Filter Status 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " P12 ,Input Filter Status 12" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Input Filter Status 11" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " P10 ,Input Filter Status 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " P9 ,Input Filter Status 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " P8 ,Input Filter Status 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Input Filter Status 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " P6 ,Input Filter Status 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,Input Filter Status 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,Input Filter Status 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Input Filter Status 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " P2 ,Input Filter Status 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,Input Filter Status 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,Input Filter Status 0" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Set/Clear"
|
|
wgroup.long 0x30++0x07
|
|
line.long 0x00 "PIO_SODR,Set Output Data Register"
|
|
bitfld.long 0x00 31. " P31 ,Set Output Data 31" "No effect,Set"
|
|
bitfld.long 0x00 30. " P30 ,Set Output Data 30" "No effect,Set"
|
|
bitfld.long 0x00 29. " P29 ,Set Output Data 29" "No effect,Set"
|
|
bitfld.long 0x00 28. " P28 ,Set Output Data 28" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Set Output Data 27" "No effect,Set"
|
|
bitfld.long 0x00 26. " P26 ,Set Output Data 26" "No effect,Set"
|
|
bitfld.long 0x00 25. " P25 ,Set Output Data 25" "No effect,Set"
|
|
bitfld.long 0x00 24. " P24 ,Set Output Data 24" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Set Output Data 23" "No effect,Set"
|
|
bitfld.long 0x00 22. " P22 ,Set Output Data 22" "No effect,Set"
|
|
bitfld.long 0x00 21. " P21 ,Set Output Data 21" "No effect,Set"
|
|
bitfld.long 0x00 20. " P20 ,Set Output Data 20" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Set Output Data 19" "No effect,Set"
|
|
bitfld.long 0x00 18. " P18 ,Set Output Data 18" "No effect,Set"
|
|
bitfld.long 0x00 17. " P17 ,Set Output Data 17" "No effect,Set"
|
|
bitfld.long 0x00 16. " P16 ,Set Output Data 16" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Set Output Data 15" "No effect,Set"
|
|
bitfld.long 0x00 14. " P14 ,Set Output Data 14" "No effect,Set"
|
|
bitfld.long 0x00 13. " P13 ,Set Output Data 13" "No effect,Set"
|
|
bitfld.long 0x00 12. " P12 ,Set Output Data 12" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Set Output Data 11" "No effect,Set"
|
|
bitfld.long 0x00 10. " P10 ,Set Output Data 10" "No effect,Set"
|
|
bitfld.long 0x00 9. " P9 ,Set Output Data 9" "No effect,Set"
|
|
bitfld.long 0x00 8. " P8 ,Set Output Data 8" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Set Output Data 7" "No effect,Set"
|
|
bitfld.long 0x00 6. " P6 ,Set Output Data 6" "No effect,Set"
|
|
bitfld.long 0x00 5. " P5 ,Set Output Data 5" "No effect,Set"
|
|
bitfld.long 0x00 4. " P4 ,Set Output Data 4" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Set Output Data 3" "No effect,Set"
|
|
bitfld.long 0x00 2. " P2 ,Set Output Data 2" "No effect,Set"
|
|
bitfld.long 0x00 1. " P1 ,Set Output Data 1" "No effect,Set"
|
|
bitfld.long 0x00 0. " P0 ,Set Output Data 0" "No effect,Set"
|
|
line.long 0x04 "PIO_CODR,Clear Output Data Register"
|
|
bitfld.long 0x04 31. " P31 ,Clear Output Data 31" "No effect,Cleared"
|
|
bitfld.long 0x04 30. " P30 ,Clear Output Data 30" "No effect,Cleared"
|
|
bitfld.long 0x04 29. " P29 ,Clear Output Data 29" "No effect,Cleared"
|
|
bitfld.long 0x04 28. " P28 ,Clear Output Data 28" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 27. " P27 ,Clear Output Data 27" "No effect,Cleared"
|
|
bitfld.long 0x04 26. " P26 ,Clear Output Data 26" "No effect,Cleared"
|
|
bitfld.long 0x04 25. " P25 ,Clear Output Data 25" "No effect,Cleared"
|
|
bitfld.long 0x04 24. " P24 ,Clear Output Data 24" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 23. " P23 ,Clear Output Data 23" "No effect,Cleared"
|
|
bitfld.long 0x04 22. " P22 ,Clear Output Data 22" "No effect,Cleared"
|
|
bitfld.long 0x04 21. " P21 ,Clear Output Data 21" "No effect,Cleared"
|
|
bitfld.long 0x04 20. " P20 ,Clear Output Data 20" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 19. " P19 ,Clear Output Data 19" "No effect,Cleared"
|
|
bitfld.long 0x04 18. " P18 ,Clear Output Data 18" "No effect,Cleared"
|
|
bitfld.long 0x04 17. " P17 ,Clear Output Data 17" "No effect,Cleared"
|
|
bitfld.long 0x04 16. " P16 ,Clear Output Data 16" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 15. " P15 ,Clear Output Data 15" "No effect,Cleared"
|
|
bitfld.long 0x04 14. " P14 ,Clear Output Data 14" "No effect,Cleared"
|
|
bitfld.long 0x04 13. " P13 ,Clear Output Data 13" "No effect,Cleared"
|
|
bitfld.long 0x04 12. " P12 ,Clear Output Data 12" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 11. " P11 ,Clear Output Data 11" "No effect,Cleared"
|
|
bitfld.long 0x04 10. " P10 ,Clear Output Data 10" "No effect,Cleared"
|
|
bitfld.long 0x04 9. " P9 ,Clear Output Data 9" "No effect,Cleared"
|
|
bitfld.long 0x04 8. " P8 ,Clear Output Data 8" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 7. " P7 ,Clear Output Data 7" "No effect,Cleared"
|
|
bitfld.long 0x04 6. " P6 ,Clear Output Data 6" "No effect,Cleared"
|
|
bitfld.long 0x04 5. " P5 ,Clear Output Data 5" "No effect,Cleared"
|
|
bitfld.long 0x04 4. " P4 ,Clear Output Data 4" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 3. " P3 ,Clear Output Data 3" "No effect,Cleared"
|
|
bitfld.long 0x04 2. " P2 ,Clear Output Data 2" "No effect,Cleared"
|
|
bitfld.long 0x04 1. " P1 ,Clear Output Data 1" "No effect,Cleared"
|
|
bitfld.long 0x04 0. " P0 ,Clear Output Data 0" "No effect,Cleared"
|
|
tree.end
|
|
tree "Status"
|
|
rgroup.long 0x38++0x07
|
|
line.long 0x00 "PIO_ODSR,Output Data Status Register"
|
|
bitfld.long 0x00 31. " P31 ,Output Data Status 31" "Low,High"
|
|
bitfld.long 0x00 30. " P30 ,Output Data Status 30" "Low,High"
|
|
bitfld.long 0x00 29. " P29 ,Output Data Status 29" "Low,High"
|
|
bitfld.long 0x00 28. " P28 ,Output Data Status 28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Output Data Status 27" "Low,High"
|
|
bitfld.long 0x00 26. " P26 ,Output Data Status 26" "Low,High"
|
|
bitfld.long 0x00 25. " P25 ,Output Data Status 25" "Low,High"
|
|
bitfld.long 0x00 24. " P24 ,Output Data Status 24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Output Data Status 23" "Low,High"
|
|
bitfld.long 0x00 22. " P22 ,Output Data Status 22" "Low,High"
|
|
bitfld.long 0x00 21. " P21 ,Output Data Status 21" "Low,High"
|
|
bitfld.long 0x00 20. " P20 ,Output Data Status 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Output Data Status 19" "Low,High"
|
|
bitfld.long 0x00 18. " P18 ,Output Data Status 18" "Low,High"
|
|
bitfld.long 0x00 17. " P17 ,Output Data Status 17" "Low,High"
|
|
bitfld.long 0x00 16. " P16 ,Output Data Status 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Output Data Status 15" "Low,High"
|
|
bitfld.long 0x00 14. " P14 ,Output Data Status 14" "Low,High"
|
|
bitfld.long 0x00 13. " P13 ,Output Data Status 13" "Low,High"
|
|
bitfld.long 0x00 12. " P12 ,Output Data Status 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Output Data Status 11" "Low,High"
|
|
bitfld.long 0x00 10. " P10 ,Output Data Status 10" "Low,High"
|
|
bitfld.long 0x00 9. " P9 ,Output Data Status 9" "Low,High"
|
|
bitfld.long 0x00 8. " P8 ,Output Data Status 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Output Data Status 7" "Low,High"
|
|
bitfld.long 0x00 6. " P6 ,Output Data Status 6" "Low,High"
|
|
bitfld.long 0x00 5. " P5 ,Output Data Status 5" "Low,High"
|
|
bitfld.long 0x00 4. " P4 ,Output Data Status 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Output Data Status 3" "Low,High"
|
|
bitfld.long 0x00 2. " P2 ,Output Data Status 2" "Low,High"
|
|
bitfld.long 0x00 1. " P1 ,Output Data Status 1" "Low,High"
|
|
bitfld.long 0x00 0. " P0 ,Output Data Status 0" "Low,High"
|
|
line.long 0x04 "PIO_PDSR,Pin Data Status Register"
|
|
bitfld.long 0x04 31. " P31 ,Output Data Status 31" "Low,High"
|
|
bitfld.long 0x04 30. " P30 ,Output Data Status 30" "Low,High"
|
|
bitfld.long 0x04 29. " P29 ,Output Data Status 29" "Low,High"
|
|
bitfld.long 0x04 28. " P28 ,Output Data Status 28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 27. " P27 ,Output Data Status 27" "Low,High"
|
|
bitfld.long 0x04 26. " P26 ,Output Data Status 26" "Low,High"
|
|
bitfld.long 0x04 25. " P25 ,Output Data Status 25" "Low,High"
|
|
bitfld.long 0x04 24. " P24 ,Output Data Status 24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 23. " P23 ,Output Data Status 23" "Low,High"
|
|
bitfld.long 0x04 22. " P22 ,Output Data Status 22" "Low,High"
|
|
bitfld.long 0x04 21. " P21 ,Output Data Status 21" "Low,High"
|
|
bitfld.long 0x04 20. " P20 ,Output Data Status 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 19. " P19 ,Output Data Status 19" "Low,High"
|
|
bitfld.long 0x04 18. " P18 ,Output Data Status 18" "Low,High"
|
|
bitfld.long 0x04 17. " P17 ,Output Data Status 17" "Low,High"
|
|
bitfld.long 0x04 16. " P16 ,Output Data Status 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 15. " P15 ,Output Data Status 15" "Low,High"
|
|
bitfld.long 0x04 14. " P14 ,Output Data Status 14" "Low,High"
|
|
bitfld.long 0x04 13. " P13 ,Output Data Status 13" "Low,High"
|
|
bitfld.long 0x04 12. " P12 ,Output Data Status 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 11. " P11 ,Output Data Status 11" "Low,High"
|
|
bitfld.long 0x04 10. " P10 ,Output Data Status 10" "Low,High"
|
|
bitfld.long 0x04 9. " P9 ,Output Data Status 9" "Low,High"
|
|
bitfld.long 0x04 8. " P8 ,Output Data Status 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 7. " P7 ,Output Data Status 7" "Low,High"
|
|
bitfld.long 0x04 6. " P6 ,Output Data Status 6" "Low,High"
|
|
bitfld.long 0x04 5. " P5 ,Output Data Status 5" "Low,High"
|
|
bitfld.long 0x04 4. " P4 ,Output Data Status 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 3. " P3 ,Output Data Status 3" "Low,High"
|
|
bitfld.long 0x04 2. " P2 ,Output Data Status 2" "Low,High"
|
|
bitfld.long 0x04 1. " P1 ,Output Data Status 1" "Low,High"
|
|
bitfld.long 0x04 0. " P0 ,Output Data Status 0" "Low,High"
|
|
tree.end
|
|
tree "Interrupt"
|
|
wgroup.long 0x40++0x07
|
|
line.long 0x00 "PIO_IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 31. " P31 ,Input Change Interrupt Enable 31" "No effect,Enabled"
|
|
bitfld.long 0x00 30. " P30 ,Input Change Interrupt Enable 30" "No effect,Enabled"
|
|
bitfld.long 0x00 29. " P29 ,Input Change Interrupt Enable 29" "No effect,Enabled"
|
|
bitfld.long 0x00 28. " P28 ,Input Change Interrupt Enable 28" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Input Change Interrupt Enable 27" "No effect,Enabled"
|
|
bitfld.long 0x00 26. " P26 ,Input Change Interrupt Enable 26" "No effect,Enabled"
|
|
bitfld.long 0x00 25. " P25 ,Input Change Interrupt Enable 25" "No effect,Enabled"
|
|
bitfld.long 0x00 24. " P24 ,Input Change Interrupt Enable 24" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Input Change Interrupt Enable 23" "No effect,Enabled"
|
|
bitfld.long 0x00 22. " P22 ,Input Change Interrupt Enable 22" "No effect,Enabled"
|
|
bitfld.long 0x00 21. " P21 ,Input Change Interrupt Enable 21" "No effect,Enabled"
|
|
bitfld.long 0x00 20. " P20 ,Input Change Interrupt Enable 20" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Input Change Interrupt Enable 19" "No effect,Enabled"
|
|
bitfld.long 0x00 18. " P18 ,Input Change Interrupt Enable 18" "No effect,Enabled"
|
|
bitfld.long 0x00 17. " P17 ,Input Change Interrupt Enable 17" "No effect,Enabled"
|
|
bitfld.long 0x00 16. " P16 ,Input Change Interrupt Enable 16" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Input Change Interrupt Enable 15" "No effect,Enabled"
|
|
bitfld.long 0x00 14. " P14 ,Input Change Interrupt Enable 14" "No effect,Enabled"
|
|
bitfld.long 0x00 13. " P13 ,Input Change Interrupt Enable 13" "No effect,Enabled"
|
|
bitfld.long 0x00 12. " P12 ,Input Change Interrupt Enable 12" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Input Change Interrupt Enable 11" "No effect,Enabled"
|
|
bitfld.long 0x00 10. " P10 ,Input Change Interrupt Enable 10" "No effect,Enabled"
|
|
bitfld.long 0x00 9. " P9 ,Input Change Interrupt Enable 9" "No effect,Enabled"
|
|
bitfld.long 0x00 8. " P8 ,Input Change Interrupt Enable 8" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Input Change Interrupt Enable 7" "No effect,Enabled"
|
|
bitfld.long 0x00 6. " P6 ,Input Change Interrupt Enable 6" "No effect,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,Input Change Interrupt Enable 5" "No effect,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,Input Change Interrupt Enable 4" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Input Change Interrupt Enable 3" "No effect,Enabled"
|
|
bitfld.long 0x00 2. " P2 ,Input Change Interrupt Enable 2" "No effect,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,Input Change Interrupt Enable 1" "No effect,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,Input Change Interrupt Enable 0" "No effect,Enabled"
|
|
line.long 0x04 "PIO_IDR,Interrupt Disable Register"
|
|
bitfld.long 0x04 31. " P31 ,Input Change Interrupt Disable 31" "No effect,Disabled"
|
|
bitfld.long 0x04 30. " P30 ,Input Change Interrupt Disable 30" "No effect,Disabled"
|
|
bitfld.long 0x04 29. " P29 ,Input Change Interrupt Disable 29" "No effect,Disabled"
|
|
bitfld.long 0x04 28. " P28 ,Input Change Interrupt Disable 28" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 27. " P27 ,Input Change Interrupt Disable 27" "No effect,Disabled"
|
|
bitfld.long 0x04 26. " P26 ,Input Change Interrupt Disable 26" "No effect,Disabled"
|
|
bitfld.long 0x04 25. " P25 ,Input Change Interrupt Disable 25" "No effect,Disabled"
|
|
bitfld.long 0x04 24. " P24 ,Input Change Interrupt Disable 24" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " P23 ,Input Change Interrupt Disable 23" "No effect,Disabled"
|
|
bitfld.long 0x04 22. " P22 ,Input Change Interrupt Disable 22" "No effect,Disabled"
|
|
bitfld.long 0x04 21. " P21 ,Input Change Interrupt Disable 21" "No effect,Disabled"
|
|
bitfld.long 0x04 20. " P20 ,Input Change Interrupt Disable 20" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " P19 ,Input Change Interrupt Disable 19" "No effect,Disabled"
|
|
bitfld.long 0x04 18. " P18 ,Input Change Interrupt Disable 18" "No effect,Disabled"
|
|
bitfld.long 0x04 17. " P17 ,Input Change Interrupt Disable 17" "No effect,Disabled"
|
|
bitfld.long 0x04 16. " P16 ,Input Change Interrupt Disable 16" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 15. " P15 ,Input Change Interrupt Disable 15" "No effect,Disabled"
|
|
bitfld.long 0x04 14. " P14 ,Input Change Interrupt Disable 14" "No effect,Disabled"
|
|
bitfld.long 0x04 13. " P13 ,Input Change Interrupt Disable 13" "No effect,Disabled"
|
|
bitfld.long 0x04 12. " P12 ,Input Change Interrupt Disable 12" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 11. " P11 ,Input Change Interrupt Disable 11" "No effect,Disabled"
|
|
bitfld.long 0x04 10. " P10 ,Input Change Interrupt Disable 10" "No effect,Disabled"
|
|
bitfld.long 0x04 9. " P9 ,Input Change Interrupt Disable 9" "No effect,Disabled"
|
|
bitfld.long 0x04 8. " P8 ,Input Change Interrupt Disable 8" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " P7 ,Input Change Interrupt Disable 7" "No effect,Disabled"
|
|
bitfld.long 0x04 6. " P6 ,Input Change Interrupt Disable 6" "No effect,Disabled"
|
|
bitfld.long 0x04 5. " P5 ,Input Change Interrupt Disable 5" "No effect,Disabled"
|
|
bitfld.long 0x04 4. " P4 ,Input Change Interrupt Disable 4" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " P3 ,Input Change Interrupt Disable 3" "No effect,Disabled"
|
|
bitfld.long 0x04 2. " P2 ,Input Change Interrupt Disable 2" "No effect,Disabled"
|
|
bitfld.long 0x04 1. " P1 ,Input Change Interrupt Disable 1" "No effect,Disabled"
|
|
bitfld.long 0x04 0. " P0 ,Input Change Interrupt Disable 0" "No effect,Disabled"
|
|
rgroup.long 0x48++0x07
|
|
line.long 0x00 "PIO_IMR,Interrupt Mask Register"
|
|
bitfld.long 0x00 31. " P31 ,Input Change Interrupt Mask 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " P30 ,Input Change Interrupt Mask 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " P29 ,Input Change Interrupt Mask 29" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " P28 ,Input Change Interrupt Mask 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Input Change Interrupt Mask 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " P26 ,Input Change Interrupt Mask 26" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " P25 ,Input Change Interrupt Mask 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " P24 ,Input Change Interrupt Mask 24" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Input Change Interrupt Mask 23" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " P22 ,Input Change Interrupt Mask 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " P21 ,Input Change Interrupt Mask 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " P20 ,Input Change Interrupt Mask 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Input Change Interrupt Mask 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " P18 ,Input Change Interrupt Mask 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " P17 ,Input Change Interrupt Mask 17" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " P16 ,Input Change Interrupt Mask 16" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Input Change Interrupt Mask 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " P14 ,Input Change Interrupt Mask 14" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " P13 ,Input Change Interrupt Mask 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " P12 ,Input Change Interrupt Mask 12" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Input Change Interrupt Mask 11" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " P10 ,Input Change Interrupt Mask 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " P9 ,Input Change Interrupt Mask 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " P8 ,Input Change Interrupt Mask 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Input Change Interrupt Mask 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " P6 ,Input Change Interrupt Mask 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,Input Change Interrupt Mask 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,Input Change Interrupt Mask 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Input Change Interrupt Mask 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " P2 ,Input Change Interrupt Mask 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,Input Change Interrupt Mask 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,Input Change Interrupt Mask 0" "Disabled,Enabled"
|
|
line.long 0x04 "PIO_ISR,Interrupt Status Register"
|
|
bitfld.long 0x04 31. " P31 ,Input Change Interrupt Status 31" "Not changed,Changed"
|
|
bitfld.long 0x04 30. " P30 ,Input Change Interrupt Status 30" "Not changed,Changed"
|
|
bitfld.long 0x04 29. " P29 ,Input Change Interrupt Status 29" "Not changed,Changed"
|
|
bitfld.long 0x04 28. " P28 ,Input Change Interrupt Status 28" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x04 27. " P27 ,Input Change Interrupt Status 27" "Not changed,Changed"
|
|
bitfld.long 0x04 26. " P26 ,Input Change Interrupt Status 26" "Not changed,Changed"
|
|
bitfld.long 0x04 25. " P25 ,Input Change Interrupt Status 25" "Not changed,Changed"
|
|
bitfld.long 0x04 24. " P24 ,Input Change Interrupt Status 24" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x04 23. " P23 ,Input Change Interrupt Status 23" "Not changed,Changed"
|
|
bitfld.long 0x04 22. " P22 ,Input Change Interrupt Status 22" "Not changed,Changed"
|
|
bitfld.long 0x04 21. " P21 ,Input Change Interrupt Status 21" "Not changed,Changed"
|
|
bitfld.long 0x04 20. " P20 ,Input Change Interrupt Status 20" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x04 19. " P19 ,Input Change Interrupt Status 19" "Not changed,Changed"
|
|
bitfld.long 0x04 18. " P18 ,Input Change Interrupt Status 18" "Not changed,Changed"
|
|
bitfld.long 0x04 17. " P17 ,Input Change Interrupt Status 17" "Not changed,Changed"
|
|
bitfld.long 0x04 16. " P16 ,Input Change Interrupt Status 16" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x04 15. " P15 ,Input Change Interrupt Status 15" "Not changed,Changed"
|
|
bitfld.long 0x04 14. " P14 ,Input Change Interrupt Status 14" "Not changed,Changed"
|
|
bitfld.long 0x04 13. " P13 ,Input Change Interrupt Status 13" "Not changed,Changed"
|
|
bitfld.long 0x04 12. " P12 ,Input Change Interrupt Status 12" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x04 11. " P11 ,Input Change Interrupt Status 11" "Not changed,Changed"
|
|
bitfld.long 0x04 10. " P10 ,Input Change Interrupt Status 10" "Not changed,Changed"
|
|
bitfld.long 0x04 9. " P9 ,Input Change Interrupt Status 9" "Not changed,Changed"
|
|
bitfld.long 0x04 8. " P8 ,Input Change Interrupt Status 8" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x04 7. " P7 ,Input Change Interrupt Status 7" "Not changed,Changed"
|
|
bitfld.long 0x04 6. " P6 ,Input Change Interrupt Status 6" "Not changed,Changed"
|
|
bitfld.long 0x04 5. " P5 ,Input Change Interrupt Status 5" "Not changed,Changed"
|
|
bitfld.long 0x04 4. " P4 ,Input Change Interrupt Status 4" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x04 3. " P3 ,Input Change Interrupt Status 3" "Not changed,Changed"
|
|
bitfld.long 0x04 2. " P2 ,Input Change Interrupt Status 2" "Not changed,Changed"
|
|
bitfld.long 0x04 1. " P1 ,Input Change Interrupt Status 1" "Not changed,Changed"
|
|
bitfld.long 0x04 0. " P0 ,Input Change Interrupt Status 0" "Not changed,Changed"
|
|
tree.end
|
|
tree "Multi-driver"
|
|
wgroup.long 0x50++0x07
|
|
line.long 0x00 "PIO_MDER,Multi-driver Enable Register"
|
|
bitfld.long 0x00 31. " P31 ,Multi Drive Enable 31" "No effect,Enabled"
|
|
bitfld.long 0x00 30. " P30 ,Multi Drive Enable 30" "No effect,Enabled"
|
|
bitfld.long 0x00 29. " P29 ,Multi Drive Enable 29" "No effect,Enabled"
|
|
bitfld.long 0x00 28. " P28 ,Multi Drive Enable 28" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Multi Drive Enable 27" "No effect,Enabled"
|
|
bitfld.long 0x00 26. " P26 ,Multi Drive Enable 26" "No effect,Enabled"
|
|
bitfld.long 0x00 25. " P25 ,Multi Drive Enable 25" "No effect,Enabled"
|
|
bitfld.long 0x00 24. " P24 ,Multi Drive Enable 24" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Multi Drive Enable 23" "No effect,Enabled"
|
|
bitfld.long 0x00 22. " P22 ,Multi Drive Enable 22" "No effect,Enabled"
|
|
bitfld.long 0x00 21. " P21 ,Multi Drive Enable 21" "No effect,Enabled"
|
|
bitfld.long 0x00 20. " P20 ,Multi Drive Enable 20" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Multi Drive Enable 19" "No effect,Enabled"
|
|
bitfld.long 0x00 18. " P18 ,Multi Drive Enable 18" "No effect,Enabled"
|
|
bitfld.long 0x00 17. " P17 ,Multi Drive Enable 17" "No effect,Enabled"
|
|
bitfld.long 0x00 16. " P16 ,Multi Drive Enable 16" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Multi Drive Enable 15" "No effect,Enabled"
|
|
bitfld.long 0x00 14. " P14 ,Multi Drive Enable 14" "No effect,Enabled"
|
|
bitfld.long 0x00 13. " P13 ,Multi Drive Enable 13" "No effect,Enabled"
|
|
bitfld.long 0x00 12. " P12 ,Multi Drive Enable 12" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Multi Drive Enable 11" "No effect,Enabled"
|
|
bitfld.long 0x00 10. " P10 ,Multi Drive Enable 10" "No effect,Enabled"
|
|
bitfld.long 0x00 9. " P9 ,Multi Drive Enable 9" "No effect,Enabled"
|
|
bitfld.long 0x00 8. " P8 ,Multi Drive Enable 8" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Multi Drive Enable 7" "No effect,Enabled"
|
|
bitfld.long 0x00 6. " P6 ,Multi Drive Enable 6" "No effect,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,Multi Drive Enable 5" "No effect,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,Multi Drive Enable 4" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Multi Drive Enable 3" "No effect,Enabled"
|
|
bitfld.long 0x00 2. " P2 ,Multi Drive Enable 2" "No effect,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,Multi Drive Enable 1" "No effect,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,Multi Drive Enable 0" "No effect,Enabled"
|
|
line.long 0x04 "PIO_MDDR,Multi-driver Disable Register"
|
|
bitfld.long 0x04 31. " P31 ,Multi Drive Disable 31" "No effect,Disabled"
|
|
bitfld.long 0x04 30. " P30 ,Multi Drive Disable 30" "No effect,Disabled"
|
|
bitfld.long 0x04 29. " P29 ,Multi Drive Disable 29" "No effect,Disabled"
|
|
bitfld.long 0x04 28. " P28 ,Multi Drive Disable 28" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 27. " P27 ,Multi Drive Disable 27" "No effect,Disabled"
|
|
bitfld.long 0x04 26. " P26 ,Multi Drive Disable 26" "No effect,Disabled"
|
|
bitfld.long 0x04 25. " P25 ,Multi Drive Disable 25" "No effect,Disabled"
|
|
bitfld.long 0x04 24. " P24 ,Multi Drive Disable 24" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " P23 ,Multi Drive Disable 23" "No effect,Disabled"
|
|
bitfld.long 0x04 22. " P22 ,Multi Drive Disable 22" "No effect,Disabled"
|
|
bitfld.long 0x04 21. " P21 ,Multi Drive Disable 21" "No effect,Disabled"
|
|
bitfld.long 0x04 20. " P20 ,Multi Drive Disable 20" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " P19 ,Multi Drive Disable 19" "No effect,Disabled"
|
|
bitfld.long 0x04 18. " P18 ,Multi Drive Disable 18" "No effect,Disabled"
|
|
bitfld.long 0x04 17. " P17 ,Multi Drive Disable 17" "No effect,Disabled"
|
|
bitfld.long 0x04 16. " P16 ,Multi Drive Disable 16" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 15. " P15 ,Multi Drive Disable 15" "No effect,Disabled"
|
|
bitfld.long 0x04 14. " P14 ,Multi Drive Disable 14" "No effect,Disabled"
|
|
bitfld.long 0x04 13. " P13 ,Multi Drive Disable 13" "No effect,Disabled"
|
|
bitfld.long 0x04 12. " P12 ,Multi Drive Disable 12" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 11. " P11 ,Multi Drive Disable 11" "No effect,Disabled"
|
|
bitfld.long 0x04 10. " P10 ,Multi Drive Disable 10" "No effect,Disabled"
|
|
bitfld.long 0x04 9. " P9 ,Multi Drive Disable 9" "No effect,Disabled"
|
|
bitfld.long 0x04 8. " P8 ,Multi Drive Disable 8" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " P7 ,Multi Drive Disable 7" "No effect,Disabled"
|
|
bitfld.long 0x04 6. " P6 ,Multi Drive Disable 6" "No effect,Disabled"
|
|
bitfld.long 0x04 5. " P5 ,Multi Drive Disable 5" "No effect,Disabled"
|
|
bitfld.long 0x04 4. " P4 ,Multi Drive Disable 4" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " P3 ,Multi Drive Disable 3" "No effect,Disabled"
|
|
bitfld.long 0x04 2. " P2 ,Multi Drive Disable 2" "No effect,Disabled"
|
|
bitfld.long 0x04 1. " P1 ,Multi Drive Disable 1" "No effect,Disabled"
|
|
bitfld.long 0x04 0. " P0 ,Multi Drive Disable 0" "No effect,Disabled"
|
|
rgroup.long 0x58++0x03
|
|
line.long 0x00 "PIO_MDSR,Multi-driver Status Register"
|
|
bitfld.long 0x00 31. " P31 ,Multi Drive Status 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " P30 ,Multi Drive Status 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " P29 ,Multi Drive Status 29" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " P28 ,Multi Drive Status 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Multi Drive Status 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " P26 ,Multi Drive Status 26" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " P25 ,Multi Drive Status 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " P24 ,Multi Drive Status 24" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Multi Drive Status 23" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " P22 ,Multi Drive Status 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " P21 ,Multi Drive Status 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " P20 ,Multi Drive Status 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Multi Drive Status 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " P18 ,Multi Drive Status 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " P17 ,Multi Drive Status 17" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " P16 ,Multi Drive Status 16" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Multi Drive Status 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " P14 ,Multi Drive Status 14" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " P13 ,Multi Drive Status 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " P12 ,Multi Drive Status 12" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Multi Drive Status 11" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " P10 ,Multi Drive Status 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " P9 ,Multi Drive Status 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " P8 ,Multi Drive Status 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Multi Drive Status 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " P6 ,Multi Drive Status 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,Multi Drive Status 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,Multi Drive Status 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Multi Drive Status 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " P2 ,Multi Drive Status 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,Multi Drive Status 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,Multi Drive Status 0" "Disabled,Enabled"
|
|
tree.end
|
|
tree.end
|
|
tree.end
|
|
tree.open "Timer/Counter (TC)"
|
|
tree "TC Block 0"
|
|
tree "TC0"
|
|
base 0xFFFD0000
|
|
width 0x8
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "TC_CCR,Channel Control Register"
|
|
bitfld.long 0x00 2. " SWTRG ,Software Trigger Command" "No effect,Triggered"
|
|
bitfld.long 0x00 1. " CLKDIS ,Counter Clock Disable Command" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLKEN ,Counter Clock Enable Command" "No effect,Enabled"
|
|
if (data.long(ad:0xFFFD0000+0x04)&0x00008000)==0x00000000
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TC_CMR,Channel Mode Register (Capture Mode)"
|
|
bitfld.long 0x00 18.--19. " LDRB ,RB Loading Selection" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 16.--17. " LDRA ,RA Loading Selection" "None,Rising edge,Falling edge,Each edge"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform"
|
|
bitfld.long 0x00 14. " CPCTRG ,RC Compare Trigger Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB External Trigger Selection" "TIOB,TIOA"
|
|
bitfld.long 0x00 8.--9. " ETRGEDG ,External Trigger Edge Selection" "None,Rising edge,Falling edge,Each edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LDBDIS ,Counter Clock Disable with RB Loading" "Not disabled,Disabled"
|
|
bitfld.long 0x00 6. " LDBSTOP ,Counter Clock Stopped with RB Loading" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed"
|
|
bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising edge,Falling edge"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "MCK/2,MCK/8,MCK/32,MCK/128,MCK/1024,XC0,XC1,XC2"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TC_CMR,Channel Mode Register (Waveform Mode)"
|
|
bitfld.long 0x00 30.--31. " BSWTRG ,Software Trigger Effect on TIOB" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 28.--29. " BEEVT ,External Event Effect on TIOB" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform"
|
|
bitfld.long 0x00 26.--27. " BCPC ,RC Compare Effect on TIOB" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BCPB ,RB Compare Effect on TIOB" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 22.--23. " ASWTRG ,Software Trigger Effect on TIOA" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " AEEVT ,External Event Effect on TIOA" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 18.--19. " ACPC ,RC Compare Effect on TIOA" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " ACPA ,RA Compare Effect on TIOA" "None,Set,Clear,Toggle"
|
|
sif (cpu()=="AT91M40800"||cpu()=="AT91R40008"||cpu()=="AT91R40807")
|
|
bitfld.long 0x00 14. " CPCTRG ,RC Compare Trigger Enable" "No effect,Enabled"
|
|
else
|
|
bitfld.long 0x00 13.--14. " WAVSEL ,Waveform Selection" "UP without automatic,UP with automatic,UPDOWN without automatic,UPDOWN with automatic"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 12. " ENETRG ,External Event Trigger Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 10.--11. " EEVT ,External Event Selection" "TIOB,XC0,XC1,XC2"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " EEVTEDG ,External Event Edge Selection" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 7. " CPCDIS ,Counter Clock Disable with RC Compare" "Not disabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CPCSTOP ,Counter Clock Stopped with RC Compare" "Not stopped,Stopped"
|
|
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "MCK/2,MCK/8,MCK/32,MCK/128,MCK/1024,XC0,XC1,XC2"
|
|
endif
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "TC_CVR,Counter Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CV ,Counter Value"
|
|
if (data.long(ad:0xFFFD0000+0x04)&0x00008000)==0x00000000
|
|
rgroup.long 0x14++0x07
|
|
line.long 0x00 "TC_RA,Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A"
|
|
line.long 0x04 "TC_RB,Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B"
|
|
else
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "TC_RA,Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A"
|
|
line.long 0x04 "TC_RB,Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B"
|
|
endif
|
|
group.long 0x1c++0x03
|
|
line.long 0x00 "TC_RC,Register C"
|
|
hexmask.long.word 0x00 0.--15. 1. " RC ,Register C"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "TC_SR,Status Register"
|
|
bitfld.long 0x00 18. " MTIOB ,TIOB Mirror" "Low,High"
|
|
bitfld.long 0x00 17. " MTIOA ,TIOA Mirror" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CLKSTA ,Clock Enabling Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ETRGS ,External Trigger Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 6. " LDRBS ,RB Loading Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " LDRAS ,RA Loading Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CPCS ,RC Compare Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " CPBS ,RB Compare Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CPAS ,RA Compare Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " LOVRS ,Load Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " COVFS ,Counter Overflow Status" "Not occurred,Occurred"
|
|
width 16.
|
|
group.long 0x2c++0x03
|
|
line.long 0x00 "TC_IMR_Set/Clr,Interrupt Mask Register"
|
|
setclrfld.long 0x00 7. -0x8 7. -0x4 7. " ETRGS ,External Trigger" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x8 6. -0x4 6. " LDRBS ,RB Loading" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x8 5. -0x4 5. " LDRAS ,RA Loading" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x8 4. -0x4 4. " CPCS ,RC Compare" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x8 3. -0x4 3. " CPBS ,RB Compare" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x8 2. -0x4 2. " CPAS ,RA Compare" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x8 1. -0x4 1. " LOVRS ,Load Overrun" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x8 0. -0x4 0. " COVFS ,Counter Overflow" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "TC1"
|
|
base 0xFFFD0040
|
|
width 0x8
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "TC_CCR,Channel Control Register"
|
|
bitfld.long 0x00 2. " SWTRG ,Software Trigger Command" "No effect,Triggered"
|
|
bitfld.long 0x00 1. " CLKDIS ,Counter Clock Disable Command" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLKEN ,Counter Clock Enable Command" "No effect,Enabled"
|
|
if (data.long(ad:0xFFFD0040+0x04)&0x00008000)==0x00000000
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TC_CMR,Channel Mode Register (Capture Mode)"
|
|
bitfld.long 0x00 18.--19. " LDRB ,RB Loading Selection" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 16.--17. " LDRA ,RA Loading Selection" "None,Rising edge,Falling edge,Each edge"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform"
|
|
bitfld.long 0x00 14. " CPCTRG ,RC Compare Trigger Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB External Trigger Selection" "TIOB,TIOA"
|
|
bitfld.long 0x00 8.--9. " ETRGEDG ,External Trigger Edge Selection" "None,Rising edge,Falling edge,Each edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LDBDIS ,Counter Clock Disable with RB Loading" "Not disabled,Disabled"
|
|
bitfld.long 0x00 6. " LDBSTOP ,Counter Clock Stopped with RB Loading" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed"
|
|
bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising edge,Falling edge"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "MCK/2,MCK/8,MCK/32,MCK/128,MCK/1024,XC0,XC1,XC2"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TC_CMR,Channel Mode Register (Waveform Mode)"
|
|
bitfld.long 0x00 30.--31. " BSWTRG ,Software Trigger Effect on TIOB" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 28.--29. " BEEVT ,External Event Effect on TIOB" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform"
|
|
bitfld.long 0x00 26.--27. " BCPC ,RC Compare Effect on TIOB" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BCPB ,RB Compare Effect on TIOB" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 22.--23. " ASWTRG ,Software Trigger Effect on TIOA" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " AEEVT ,External Event Effect on TIOA" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 18.--19. " ACPC ,RC Compare Effect on TIOA" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " ACPA ,RA Compare Effect on TIOA" "None,Set,Clear,Toggle"
|
|
sif (cpu()=="AT91M40800"||cpu()=="AT91R40008"||cpu()=="AT91R40807")
|
|
bitfld.long 0x00 14. " CPCTRG ,RC Compare Trigger Enable" "No effect,Enabled"
|
|
else
|
|
bitfld.long 0x00 13.--14. " WAVSEL ,Waveform Selection" "UP without automatic,UP with automatic,UPDOWN without automatic,UPDOWN with automatic"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 12. " ENETRG ,External Event Trigger Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 10.--11. " EEVT ,External Event Selection" "TIOB,XC0,XC1,XC2"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " EEVTEDG ,External Event Edge Selection" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 7. " CPCDIS ,Counter Clock Disable with RC Compare" "Not disabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CPCSTOP ,Counter Clock Stopped with RC Compare" "Not stopped,Stopped"
|
|
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "MCK/2,MCK/8,MCK/32,MCK/128,MCK/1024,XC0,XC1,XC2"
|
|
endif
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "TC_CVR,Counter Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CV ,Counter Value"
|
|
if (data.long(ad:0xFFFD0040+0x04)&0x00008000)==0x00000000
|
|
rgroup.long 0x14++0x07
|
|
line.long 0x00 "TC_RA,Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A"
|
|
line.long 0x04 "TC_RB,Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B"
|
|
else
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "TC_RA,Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A"
|
|
line.long 0x04 "TC_RB,Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B"
|
|
endif
|
|
group.long 0x1c++0x03
|
|
line.long 0x00 "TC_RC,Register C"
|
|
hexmask.long.word 0x00 0.--15. 1. " RC ,Register C"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "TC_SR,Status Register"
|
|
bitfld.long 0x00 18. " MTIOB ,TIOB Mirror" "Low,High"
|
|
bitfld.long 0x00 17. " MTIOA ,TIOA Mirror" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CLKSTA ,Clock Enabling Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ETRGS ,External Trigger Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 6. " LDRBS ,RB Loading Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " LDRAS ,RA Loading Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CPCS ,RC Compare Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " CPBS ,RB Compare Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CPAS ,RA Compare Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " LOVRS ,Load Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " COVFS ,Counter Overflow Status" "Not occurred,Occurred"
|
|
width 16.
|
|
group.long 0x2c++0x03
|
|
line.long 0x00 "TC_IMR_Set/Clr,Interrupt Mask Register"
|
|
setclrfld.long 0x00 7. -0x8 7. -0x4 7. " ETRGS ,External Trigger" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x8 6. -0x4 6. " LDRBS ,RB Loading" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x8 5. -0x4 5. " LDRAS ,RA Loading" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x8 4. -0x4 4. " CPCS ,RC Compare" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x8 3. -0x4 3. " CPBS ,RB Compare" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x8 2. -0x4 2. " CPAS ,RA Compare" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x8 1. -0x4 1. " LOVRS ,Load Overrun" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x8 0. -0x4 0. " COVFS ,Counter Overflow" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "TC2"
|
|
base 0xFFFD0080
|
|
width 0x8
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "TC_CCR,Channel Control Register"
|
|
bitfld.long 0x00 2. " SWTRG ,Software Trigger Command" "No effect,Triggered"
|
|
bitfld.long 0x00 1. " CLKDIS ,Counter Clock Disable Command" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLKEN ,Counter Clock Enable Command" "No effect,Enabled"
|
|
if (data.long(ad:0xFFFD0080+0x04)&0x00008000)==0x00000000
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TC_CMR,Channel Mode Register (Capture Mode)"
|
|
bitfld.long 0x00 18.--19. " LDRB ,RB Loading Selection" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 16.--17. " LDRA ,RA Loading Selection" "None,Rising edge,Falling edge,Each edge"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform"
|
|
bitfld.long 0x00 14. " CPCTRG ,RC Compare Trigger Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB External Trigger Selection" "TIOB,TIOA"
|
|
bitfld.long 0x00 8.--9. " ETRGEDG ,External Trigger Edge Selection" "None,Rising edge,Falling edge,Each edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LDBDIS ,Counter Clock Disable with RB Loading" "Not disabled,Disabled"
|
|
bitfld.long 0x00 6. " LDBSTOP ,Counter Clock Stopped with RB Loading" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed"
|
|
bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising edge,Falling edge"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "MCK/2,MCK/8,MCK/32,MCK/128,MCK/1024,XC0,XC1,XC2"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TC_CMR,Channel Mode Register (Waveform Mode)"
|
|
bitfld.long 0x00 30.--31. " BSWTRG ,Software Trigger Effect on TIOB" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 28.--29. " BEEVT ,External Event Effect on TIOB" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform"
|
|
bitfld.long 0x00 26.--27. " BCPC ,RC Compare Effect on TIOB" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BCPB ,RB Compare Effect on TIOB" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 22.--23. " ASWTRG ,Software Trigger Effect on TIOA" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " AEEVT ,External Event Effect on TIOA" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 18.--19. " ACPC ,RC Compare Effect on TIOA" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " ACPA ,RA Compare Effect on TIOA" "None,Set,Clear,Toggle"
|
|
sif (cpu()=="AT91M40800"||cpu()=="AT91R40008"||cpu()=="AT91R40807")
|
|
bitfld.long 0x00 14. " CPCTRG ,RC Compare Trigger Enable" "No effect,Enabled"
|
|
else
|
|
bitfld.long 0x00 13.--14. " WAVSEL ,Waveform Selection" "UP without automatic,UP with automatic,UPDOWN without automatic,UPDOWN with automatic"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 12. " ENETRG ,External Event Trigger Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 10.--11. " EEVT ,External Event Selection" "TIOB,XC0,XC1,XC2"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " EEVTEDG ,External Event Edge Selection" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 7. " CPCDIS ,Counter Clock Disable with RC Compare" "Not disabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CPCSTOP ,Counter Clock Stopped with RC Compare" "Not stopped,Stopped"
|
|
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "MCK/2,MCK/8,MCK/32,MCK/128,MCK/1024,XC0,XC1,XC2"
|
|
endif
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "TC_CVR,Counter Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CV ,Counter Value"
|
|
if (data.long(ad:0xFFFD0080+0x04)&0x00008000)==0x00000000
|
|
rgroup.long 0x14++0x07
|
|
line.long 0x00 "TC_RA,Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A"
|
|
line.long 0x04 "TC_RB,Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B"
|
|
else
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "TC_RA,Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A"
|
|
line.long 0x04 "TC_RB,Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B"
|
|
endif
|
|
group.long 0x1c++0x03
|
|
line.long 0x00 "TC_RC,Register C"
|
|
hexmask.long.word 0x00 0.--15. 1. " RC ,Register C"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "TC_SR,Status Register"
|
|
bitfld.long 0x00 18. " MTIOB ,TIOB Mirror" "Low,High"
|
|
bitfld.long 0x00 17. " MTIOA ,TIOA Mirror" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CLKSTA ,Clock Enabling Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ETRGS ,External Trigger Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 6. " LDRBS ,RB Loading Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " LDRAS ,RA Loading Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CPCS ,RC Compare Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " CPBS ,RB Compare Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CPAS ,RA Compare Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " LOVRS ,Load Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " COVFS ,Counter Overflow Status" "Not occurred,Occurred"
|
|
width 16.
|
|
group.long 0x2c++0x03
|
|
line.long 0x00 "TC_IMR_Set/Clr,Interrupt Mask Register"
|
|
setclrfld.long 0x00 7. -0x8 7. -0x4 7. " ETRGS ,External Trigger" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x8 6. -0x4 6. " LDRBS ,RB Loading" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x8 5. -0x4 5. " LDRAS ,RA Loading" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x8 4. -0x4 4. " CPCS ,RC Compare" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x8 3. -0x4 3. " CPBS ,RB Compare" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x8 2. -0x4 2. " CPAS ,RA Compare" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x8 1. -0x4 1. " LOVRS ,Load Overrun" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x8 0. -0x4 0. " COVFS ,Counter Overflow" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "TC block registers"
|
|
base 0xFFFD00C0
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "TC_BCR,TC Block Control Register"
|
|
bitfld.long 0x00 0. " SYNC ,Synchro Command" "No effect,SYNC"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TC_BMR,TC Block Mode Register"
|
|
bitfld.long 0x00 4.--5. " TC2XC2S ,External Clock Signal 2 Selection" "TCLK2,None,TIOA0,TIOA1"
|
|
bitfld.long 0x00 2.--3. " TC1XC1S ,External Clock Signal 1 Selection" "TCLK1,None,TIOA0,TIOA2"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " TC0XC0S ,External Clock Signal 0 Selection" "TCLK0,None,TIOA1,TIOA2"
|
|
tree.end
|
|
tree.end
|
|
tree "TC Block 1"
|
|
tree "TC3"
|
|
base 0xFFFD4000
|
|
width 0x8
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "TC_CCR,Channel Control Register"
|
|
bitfld.long 0x00 2. " SWTRG ,Software Trigger Command" "No effect,Triggered"
|
|
bitfld.long 0x00 1. " CLKDIS ,Counter Clock Disable Command" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLKEN ,Counter Clock Enable Command" "No effect,Enabled"
|
|
if (data.long(ad:0xFFFD4000+0x04)&0x00008000)==0x00000000
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TC_CMR,Channel Mode Register (Capture Mode)"
|
|
bitfld.long 0x00 18.--19. " LDRB ,RB Loading Selection" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 16.--17. " LDRA ,RA Loading Selection" "None,Rising edge,Falling edge,Each edge"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform"
|
|
bitfld.long 0x00 14. " CPCTRG ,RC Compare Trigger Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB External Trigger Selection" "TIOB,TIOA"
|
|
bitfld.long 0x00 8.--9. " ETRGEDG ,External Trigger Edge Selection" "None,Rising edge,Falling edge,Each edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LDBDIS ,Counter Clock Disable with RB Loading" "Not disabled,Disabled"
|
|
bitfld.long 0x00 6. " LDBSTOP ,Counter Clock Stopped with RB Loading" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed"
|
|
bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising edge,Falling edge"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "MCK/2,MCK/8,MCK/32,MCK/128,MCK/1024,XC0,XC1,XC2"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TC_CMR,Channel Mode Register (Waveform Mode)"
|
|
bitfld.long 0x00 30.--31. " BSWTRG ,Software Trigger Effect on TIOB" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 28.--29. " BEEVT ,External Event Effect on TIOB" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform"
|
|
bitfld.long 0x00 26.--27. " BCPC ,RC Compare Effect on TIOB" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BCPB ,RB Compare Effect on TIOB" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 22.--23. " ASWTRG ,Software Trigger Effect on TIOA" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " AEEVT ,External Event Effect on TIOA" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 18.--19. " ACPC ,RC Compare Effect on TIOA" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " ACPA ,RA Compare Effect on TIOA" "None,Set,Clear,Toggle"
|
|
sif (cpu()=="AT91M40800"||cpu()=="AT91R40008"||cpu()=="AT91R40807")
|
|
bitfld.long 0x00 14. " CPCTRG ,RC Compare Trigger Enable" "No effect,Enabled"
|
|
else
|
|
bitfld.long 0x00 13.--14. " WAVSEL ,Waveform Selection" "UP without automatic,UP with automatic,UPDOWN without automatic,UPDOWN with automatic"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 12. " ENETRG ,External Event Trigger Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 10.--11. " EEVT ,External Event Selection" "TIOB,XC0,XC1,XC2"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " EEVTEDG ,External Event Edge Selection" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 7. " CPCDIS ,Counter Clock Disable with RC Compare" "Not disabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CPCSTOP ,Counter Clock Stopped with RC Compare" "Not stopped,Stopped"
|
|
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "MCK/2,MCK/8,MCK/32,MCK/128,MCK/1024,XC0,XC1,XC2"
|
|
endif
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "TC_CVR,Counter Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CV ,Counter Value"
|
|
if (data.long(ad:0xFFFD4000+0x04)&0x00008000)==0x00000000
|
|
rgroup.long 0x14++0x07
|
|
line.long 0x00 "TC_RA,Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A"
|
|
line.long 0x04 "TC_RB,Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B"
|
|
else
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "TC_RA,Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A"
|
|
line.long 0x04 "TC_RB,Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B"
|
|
endif
|
|
group.long 0x1c++0x03
|
|
line.long 0x00 "TC_RC,Register C"
|
|
hexmask.long.word 0x00 0.--15. 1. " RC ,Register C"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "TC_SR,Status Register"
|
|
bitfld.long 0x00 18. " MTIOB ,TIOB Mirror" "Low,High"
|
|
bitfld.long 0x00 17. " MTIOA ,TIOA Mirror" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CLKSTA ,Clock Enabling Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ETRGS ,External Trigger Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 6. " LDRBS ,RB Loading Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " LDRAS ,RA Loading Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CPCS ,RC Compare Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " CPBS ,RB Compare Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CPAS ,RA Compare Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " LOVRS ,Load Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " COVFS ,Counter Overflow Status" "Not occurred,Occurred"
|
|
width 16.
|
|
group.long 0x2c++0x03
|
|
line.long 0x00 "TC_IMR_Set/Clr,Interrupt Mask Register"
|
|
setclrfld.long 0x00 7. -0x8 7. -0x4 7. " ETRGS ,External Trigger" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x8 6. -0x4 6. " LDRBS ,RB Loading" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x8 5. -0x4 5. " LDRAS ,RA Loading" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x8 4. -0x4 4. " CPCS ,RC Compare" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x8 3. -0x4 3. " CPBS ,RB Compare" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x8 2. -0x4 2. " CPAS ,RA Compare" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x8 1. -0x4 1. " LOVRS ,Load Overrun" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x8 0. -0x4 0. " COVFS ,Counter Overflow" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "TC4"
|
|
base 0xFFFD4040
|
|
width 0x8
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "TC_CCR,Channel Control Register"
|
|
bitfld.long 0x00 2. " SWTRG ,Software Trigger Command" "No effect,Triggered"
|
|
bitfld.long 0x00 1. " CLKDIS ,Counter Clock Disable Command" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLKEN ,Counter Clock Enable Command" "No effect,Enabled"
|
|
if (data.long(ad:0xFFFD4040+0x04)&0x00008000)==0x00000000
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TC_CMR,Channel Mode Register (Capture Mode)"
|
|
bitfld.long 0x00 18.--19. " LDRB ,RB Loading Selection" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 16.--17. " LDRA ,RA Loading Selection" "None,Rising edge,Falling edge,Each edge"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform"
|
|
bitfld.long 0x00 14. " CPCTRG ,RC Compare Trigger Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB External Trigger Selection" "TIOB,TIOA"
|
|
bitfld.long 0x00 8.--9. " ETRGEDG ,External Trigger Edge Selection" "None,Rising edge,Falling edge,Each edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LDBDIS ,Counter Clock Disable with RB Loading" "Not disabled,Disabled"
|
|
bitfld.long 0x00 6. " LDBSTOP ,Counter Clock Stopped with RB Loading" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed"
|
|
bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising edge,Falling edge"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "MCK/2,MCK/8,MCK/32,MCK/128,MCK/1024,XC0,XC1,XC2"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TC_CMR,Channel Mode Register (Waveform Mode)"
|
|
bitfld.long 0x00 30.--31. " BSWTRG ,Software Trigger Effect on TIOB" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 28.--29. " BEEVT ,External Event Effect on TIOB" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform"
|
|
bitfld.long 0x00 26.--27. " BCPC ,RC Compare Effect on TIOB" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BCPB ,RB Compare Effect on TIOB" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 22.--23. " ASWTRG ,Software Trigger Effect on TIOA" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " AEEVT ,External Event Effect on TIOA" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 18.--19. " ACPC ,RC Compare Effect on TIOA" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " ACPA ,RA Compare Effect on TIOA" "None,Set,Clear,Toggle"
|
|
sif (cpu()=="AT91M40800"||cpu()=="AT91R40008"||cpu()=="AT91R40807")
|
|
bitfld.long 0x00 14. " CPCTRG ,RC Compare Trigger Enable" "No effect,Enabled"
|
|
else
|
|
bitfld.long 0x00 13.--14. " WAVSEL ,Waveform Selection" "UP without automatic,UP with automatic,UPDOWN without automatic,UPDOWN with automatic"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 12. " ENETRG ,External Event Trigger Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 10.--11. " EEVT ,External Event Selection" "TIOB,XC0,XC1,XC2"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " EEVTEDG ,External Event Edge Selection" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 7. " CPCDIS ,Counter Clock Disable with RC Compare" "Not disabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CPCSTOP ,Counter Clock Stopped with RC Compare" "Not stopped,Stopped"
|
|
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "MCK/2,MCK/8,MCK/32,MCK/128,MCK/1024,XC0,XC1,XC2"
|
|
endif
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "TC_CVR,Counter Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CV ,Counter Value"
|
|
if (data.long(ad:0xFFFD4040+0x04)&0x00008000)==0x00000000
|
|
rgroup.long 0x14++0x07
|
|
line.long 0x00 "TC_RA,Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A"
|
|
line.long 0x04 "TC_RB,Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B"
|
|
else
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "TC_RA,Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A"
|
|
line.long 0x04 "TC_RB,Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B"
|
|
endif
|
|
group.long 0x1c++0x03
|
|
line.long 0x00 "TC_RC,Register C"
|
|
hexmask.long.word 0x00 0.--15. 1. " RC ,Register C"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "TC_SR,Status Register"
|
|
bitfld.long 0x00 18. " MTIOB ,TIOB Mirror" "Low,High"
|
|
bitfld.long 0x00 17. " MTIOA ,TIOA Mirror" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CLKSTA ,Clock Enabling Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ETRGS ,External Trigger Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 6. " LDRBS ,RB Loading Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " LDRAS ,RA Loading Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CPCS ,RC Compare Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " CPBS ,RB Compare Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CPAS ,RA Compare Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " LOVRS ,Load Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " COVFS ,Counter Overflow Status" "Not occurred,Occurred"
|
|
width 16.
|
|
group.long 0x2c++0x03
|
|
line.long 0x00 "TC_IMR_Set/Clr,Interrupt Mask Register"
|
|
setclrfld.long 0x00 7. -0x8 7. -0x4 7. " ETRGS ,External Trigger" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x8 6. -0x4 6. " LDRBS ,RB Loading" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x8 5. -0x4 5. " LDRAS ,RA Loading" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x8 4. -0x4 4. " CPCS ,RC Compare" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x8 3. -0x4 3. " CPBS ,RB Compare" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x8 2. -0x4 2. " CPAS ,RA Compare" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x8 1. -0x4 1. " LOVRS ,Load Overrun" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x8 0. -0x4 0. " COVFS ,Counter Overflow" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "TC5"
|
|
base 0xFFFD4080
|
|
width 0x8
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "TC_CCR,Channel Control Register"
|
|
bitfld.long 0x00 2. " SWTRG ,Software Trigger Command" "No effect,Triggered"
|
|
bitfld.long 0x00 1. " CLKDIS ,Counter Clock Disable Command" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLKEN ,Counter Clock Enable Command" "No effect,Enabled"
|
|
if (data.long(ad:0xFFFD4080+0x04)&0x00008000)==0x00000000
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TC_CMR,Channel Mode Register (Capture Mode)"
|
|
bitfld.long 0x00 18.--19. " LDRB ,RB Loading Selection" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 16.--17. " LDRA ,RA Loading Selection" "None,Rising edge,Falling edge,Each edge"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform"
|
|
bitfld.long 0x00 14. " CPCTRG ,RC Compare Trigger Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB External Trigger Selection" "TIOB,TIOA"
|
|
bitfld.long 0x00 8.--9. " ETRGEDG ,External Trigger Edge Selection" "None,Rising edge,Falling edge,Each edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LDBDIS ,Counter Clock Disable with RB Loading" "Not disabled,Disabled"
|
|
bitfld.long 0x00 6. " LDBSTOP ,Counter Clock Stopped with RB Loading" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed"
|
|
bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising edge,Falling edge"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "MCK/2,MCK/8,MCK/32,MCK/128,MCK/1024,XC0,XC1,XC2"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TC_CMR,Channel Mode Register (Waveform Mode)"
|
|
bitfld.long 0x00 30.--31. " BSWTRG ,Software Trigger Effect on TIOB" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 28.--29. " BEEVT ,External Event Effect on TIOB" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform"
|
|
bitfld.long 0x00 26.--27. " BCPC ,RC Compare Effect on TIOB" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BCPB ,RB Compare Effect on TIOB" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 22.--23. " ASWTRG ,Software Trigger Effect on TIOA" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " AEEVT ,External Event Effect on TIOA" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 18.--19. " ACPC ,RC Compare Effect on TIOA" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " ACPA ,RA Compare Effect on TIOA" "None,Set,Clear,Toggle"
|
|
sif (cpu()=="AT91M40800"||cpu()=="AT91R40008"||cpu()=="AT91R40807")
|
|
bitfld.long 0x00 14. " CPCTRG ,RC Compare Trigger Enable" "No effect,Enabled"
|
|
else
|
|
bitfld.long 0x00 13.--14. " WAVSEL ,Waveform Selection" "UP without automatic,UP with automatic,UPDOWN without automatic,UPDOWN with automatic"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 12. " ENETRG ,External Event Trigger Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 10.--11. " EEVT ,External Event Selection" "TIOB,XC0,XC1,XC2"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " EEVTEDG ,External Event Edge Selection" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 7. " CPCDIS ,Counter Clock Disable with RC Compare" "Not disabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CPCSTOP ,Counter Clock Stopped with RC Compare" "Not stopped,Stopped"
|
|
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "MCK/2,MCK/8,MCK/32,MCK/128,MCK/1024,XC0,XC1,XC2"
|
|
endif
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "TC_CVR,Counter Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CV ,Counter Value"
|
|
if (data.long(ad:0xFFFD4080+0x04)&0x00008000)==0x00000000
|
|
rgroup.long 0x14++0x07
|
|
line.long 0x00 "TC_RA,Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A"
|
|
line.long 0x04 "TC_RB,Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B"
|
|
else
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "TC_RA,Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A"
|
|
line.long 0x04 "TC_RB,Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B"
|
|
endif
|
|
group.long 0x1c++0x03
|
|
line.long 0x00 "TC_RC,Register C"
|
|
hexmask.long.word 0x00 0.--15. 1. " RC ,Register C"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "TC_SR,Status Register"
|
|
bitfld.long 0x00 18. " MTIOB ,TIOB Mirror" "Low,High"
|
|
bitfld.long 0x00 17. " MTIOA ,TIOA Mirror" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CLKSTA ,Clock Enabling Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ETRGS ,External Trigger Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 6. " LDRBS ,RB Loading Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " LDRAS ,RA Loading Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CPCS ,RC Compare Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " CPBS ,RB Compare Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CPAS ,RA Compare Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " LOVRS ,Load Overrun Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " COVFS ,Counter Overflow Status" "Not occurred,Occurred"
|
|
width 16.
|
|
group.long 0x2c++0x03
|
|
line.long 0x00 "TC_IMR_Set/Clr,Interrupt Mask Register"
|
|
setclrfld.long 0x00 7. -0x8 7. -0x4 7. " ETRGS ,External Trigger" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x8 6. -0x4 6. " LDRBS ,RB Loading" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x8 5. -0x4 5. " LDRAS ,RA Loading" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x8 4. -0x4 4. " CPCS ,RC Compare" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x8 3. -0x4 3. " CPBS ,RB Compare" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x8 2. -0x4 2. " CPAS ,RA Compare" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x8 1. -0x4 1. " LOVRS ,Load Overrun" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x8 0. -0x4 0. " COVFS ,Counter Overflow" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "TC block registers"
|
|
base 0xFFFD40C0
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "TC_BCR,TC Block Control Register"
|
|
bitfld.long 0x00 0. " SYNC ,Synchro Command" "No effect,SYNC"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TC_BMR,TC Block Mode Register"
|
|
bitfld.long 0x00 4.--5. " TC2XC2S ,External Clock Signal 2 Selection" "TCLK2,None,TIOA0,TIOA1"
|
|
bitfld.long 0x00 2.--3. " TC1XC1S ,External Clock Signal 1 Selection" "TCLK1,None,TIOA0,TIOA2"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " TC0XC0S ,External Clock Signal 0 Selection" "TCLK0,None,TIOA1,TIOA2"
|
|
tree.end
|
|
tree.end
|
|
tree.end
|
|
tree.open "Serial Peripheral Interface (SPI)"
|
|
tree "SPIA"
|
|
base 0xFFFC8000
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "SPI_CR,Control Register"
|
|
bitfld.long 0x00 7. " SWRST ,SPI Software Reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " SPIDIS ,SPI Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 0. " SPIEN ,SPI Enable" "No effect,Enabled"
|
|
if (data.long(ad:0xFFFE0004)&0x00000004)==0x00000000
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SPI_MR,Mode Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Delay Between Chip Selects"
|
|
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=0111,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,Forbidden"
|
|
bitfld.long 0x00 7. " LLB ,Local Loopback" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MCK32 ,Clock Selection" "CORECLK,CORECLK/32"
|
|
bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Direct,Decoder"
|
|
bitfld.long 0x00 1. " PS ,Peripheral Select" "Fix,Variable"
|
|
bitfld.long 0x00 0. " MSTR ,Master/Slave Mode" "Slave,Master"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SPI_MR,Mode Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Delay Between Chip Selects"
|
|
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "PCS0,PCS1,PCS2,PCS3,PCS4,PCS5,PCS6,PCS7,PCS8,PCS9,PCS10,PCS11,PCS12,PCS13,PCS14,PCS15"
|
|
bitfld.long 0x00 7. " LLB ,Local Loopback" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MCK32 ,Clock Selection" "CORECLK,CORECLK/32"
|
|
bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Direct,Decoder"
|
|
bitfld.long 0x00 1. " PS ,Peripheral Select" "Fix,Variable"
|
|
bitfld.long 0x00 0. " MSTR ,Master/Slave Mode" "Slave,Master"
|
|
endif
|
|
if (data.long(ad:0xFFFE0004)&0x00000004)==0x00000000
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "SPI_RDR,Receive Data Register"
|
|
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=0111,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,Forbidden"
|
|
hexmask.long.word 0x00 0.--15. 1. " RD ,Receive Data"
|
|
wgroup.long 0x0c++0x03
|
|
line.long 0x00 "SPI_TDR,Transmit Data Register"
|
|
bitfld.long 0x00 24. " LASTXFER ,Last Transfer" "No effect,TD transferred"
|
|
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=0111,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,Forbidden"
|
|
hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data"
|
|
else
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "SPI_RDR,Receive Data Register"
|
|
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "PCS0,PCS1,PCS2,PCS3,PCS4,PCS5,PCS6,PCS7,PCS8,PCS9,PCS10,PCS11,PCS12,PCS13,PCS14,PCS15"
|
|
hexmask.long.word 0x00 0.--15. 1. " RD ,Receive Data"
|
|
wgroup.long 0x0c++0x03
|
|
line.long 0x00 "SPI_TDR,Transmit Data Register"
|
|
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "PCS0,PCS1,PCS2,PCS3,PCS4,PCS5,PCS6,PCS7,PCS8,PCS9,PCS10,PCS11,PCS12,PCS13,PCS14,PCS15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data"
|
|
endif
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "SPI_SR,Status Register"
|
|
bitfld.long 0x00 16. " SPIENS ,SPI Enable Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SPENDTX ,End of Transmitter Transfer" "No end,End"
|
|
bitfld.long 0x00 4. " SPENDRX ,End of Receiver Transfer" "No end,End"
|
|
bitfld.long 0x00 3. " OVRES ,Overrun Error Status" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MODF ,Mode Fault Error" "No error,Error"
|
|
bitfld.long 0x00 1. " TDRE ,Transmit Data Register Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 0. " RDRF ,Receive Data Register Full" "Not full,Full"
|
|
wgroup.long 0x14++0x07
|
|
line.long 0x00 "SPI_IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 5. " SPENDTX ,End of Transmitter Transfer Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 4. " ENDRX ,End of Receiver Transfer Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 3. " OVRES ,Overrun Error Status Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 2. " MODF ,Mode Fault Error Interrupt Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TDRE ,Transmit Data Register Empty Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 0. " RDRF ,Receive Data Register Full Interrupt Enable" "No effect,Enabled"
|
|
line.long 0x04 "SPI_IDR,Interrupt Disable Register"
|
|
bitfld.long 0x04 5. " SPENDTX ,End of Transmitter Transfer Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 4. " SPENDRX ,End of Receiver Transfer Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 3. " OVRES ,Overrun Error Status Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 2. " MODF ,Mode Fault Error Interrupt Disable" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " TDRE ,Transmit Data Register Empty Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 0. " RDRF ,Receive Data Register Full Interrupt Disable" "No effect,Disabled"
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "SPI_IMR,Interrupt Mask Register"
|
|
bitfld.long 0x00 5. " SPENDTX ,End of Transmitter Transfer Interrupt Mask" "Not enabled,Enabled"
|
|
bitfld.long 0x00 4. " SPENDRX ,End of Receiver Transfer Interrupt Mask" "Not enabled,Enabled"
|
|
bitfld.long 0x00 3. " OVRES ,Overrun Error Status Interrupt Mask" "Not enabled,Enabled"
|
|
bitfld.long 0x00 2. " MODF ,Mode Fault Error Interrupt Mask" "Not enabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TDRE ,Transmit Data Register Empty Interrupt Mask" "Not enabled,Enabled"
|
|
bitfld.long 0x00 0. " RDRF ,Receive Data Register Full Interrupt Mask" "Not enabled,Enabled"
|
|
group.long 0x20--0x2f
|
|
line.long 0x00 "SP_RPR,Receive Pointer Register"
|
|
hexfld.long 0x00 " RXPTR ,Receive Pointer"
|
|
line.long 0x04 "SP_RCR,Receive Counter Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter"
|
|
line.long 0x08 "SP_TPR,Transmit Pointer Register"
|
|
hexfld.long 0x08 " TXPTR ,Transmit Pointer"
|
|
line.long 0x0c "SP_TCR,Transmit Counter Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " TXCTR ,Transmit Counter"
|
|
group.long 0x30--0x3f
|
|
line.long 0x00 "SPI_CSR0,Chip Select Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DLYBCT ,Delay Between Consecutive Transfers"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DLYBS ,Delay Before SPCK"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SCBR ,Serial Clock Baud Rate"
|
|
bitfld.long 0x00 4.--7. " BITS ,Bits per Transfer" "8,9,10,11,12,13,14,15,16,?..."
|
|
textline " "
|
|
bitfld.long 0x00 3. " CSAAT ,Chip Select Active After Transfer" "CSL rised,CSL not rised"
|
|
bitfld.long 0x00 1. " NCPHA ,Clock Phase" "Changed,Captured"
|
|
bitfld.long 0x00 0. " CPOL ,Clock Polarity" "0,1"
|
|
line.long 0x04 "SPI_CSR1,Chip Select Register 1"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DLYBCT ,Delay Between Consecutive Transfers"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DLYBS ,Delay Before SPCK"
|
|
hexmask.long.byte 0x04 8.--15. 1. " SCBR ,Serial Clock Baud Rate"
|
|
bitfld.long 0x04 4.--7. " BITS ,Bits per Transfer" "8,9,10,11,12,13,14,15,16,?..."
|
|
textline " "
|
|
bitfld.long 0x04 3. " CSAAT ,Chip Select Active After Transfer" "CSL rised,CSL not rised"
|
|
bitfld.long 0x04 1. " NCPHA ,Clock Phase" "Changed,Captured"
|
|
bitfld.long 0x04 0. " CPOL ,Clock Polarity" "0,1"
|
|
line.long 0x08 "SPI_CSR2,Chip Select Register 2"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DLYBCT ,Delay Between Consecutive Transfers"
|
|
hexmask.long.byte 0x08 16.--23. 1. " DLYBS ,Delay Before SPCK"
|
|
hexmask.long.byte 0x08 8.--15. 1. " SCBR ,Serial Clock Baud Rate"
|
|
bitfld.long 0x08 4.--7. " BITS ,Bits per Transfer" "8,9,10,11,12,13,14,15,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 3. " CSAAT ,Chip Select Active After Transfer" "CSL rised,CSL not rised"
|
|
bitfld.long 0x08 1. " NCPHA ,Clock Phase" "Changed,Captured"
|
|
bitfld.long 0x08 0. " CPOL ,Clock Polarity" "0,1"
|
|
line.long 0x0c "SPI_CSR3,Chip Select Register 3"
|
|
hexmask.long.byte 0x0c 24.--31. 1. " DLYBCT ,Delay Between Consecutive Transfers"
|
|
hexmask.long.byte 0x0c 16.--23. 1. " DLYBS ,Delay Before SPCK"
|
|
hexmask.long.byte 0x0c 8.--15. 1. " SCBR ,Serial Clock Baud Rate"
|
|
bitfld.long 0x0c 4.--7. " BITS ,Bits per Transfer" "8,9,10,11,12,13,14,15,16,?..."
|
|
textline " "
|
|
bitfld.long 0x0c 3. " CSAAT ,Chip Select Active After Transfer" "CSL rised,CSL not rised"
|
|
bitfld.long 0x0c 1. " NCPHA ,Clock Phase" "Changed,Captured"
|
|
bitfld.long 0x0c 0. " CPOL ,Clock Polarity" "0,1"
|
|
tree.end
|
|
tree "SPIB"
|
|
base 0xFFFCC000
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "SPI_CR,Control Register"
|
|
bitfld.long 0x00 7. " SWRST ,SPI Software Reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " SPIDIS ,SPI Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 0. " SPIEN ,SPI Enable" "No effect,Enabled"
|
|
if (data.long(ad:0xFFFE0004)&0x00000004)==0x00000000
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SPI_MR,Mode Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Delay Between Chip Selects"
|
|
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=0111,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,Forbidden"
|
|
bitfld.long 0x00 7. " LLB ,Local Loopback" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MCK32 ,Clock Selection" "CORECLK,CORECLK/32"
|
|
bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Direct,Decoder"
|
|
bitfld.long 0x00 1. " PS ,Peripheral Select" "Fix,Variable"
|
|
bitfld.long 0x00 0. " MSTR ,Master/Slave Mode" "Slave,Master"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SPI_MR,Mode Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Delay Between Chip Selects"
|
|
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "PCS0,PCS1,PCS2,PCS3,PCS4,PCS5,PCS6,PCS7,PCS8,PCS9,PCS10,PCS11,PCS12,PCS13,PCS14,PCS15"
|
|
bitfld.long 0x00 7. " LLB ,Local Loopback" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MCK32 ,Clock Selection" "CORECLK,CORECLK/32"
|
|
bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Direct,Decoder"
|
|
bitfld.long 0x00 1. " PS ,Peripheral Select" "Fix,Variable"
|
|
bitfld.long 0x00 0. " MSTR ,Master/Slave Mode" "Slave,Master"
|
|
endif
|
|
if (data.long(ad:0xFFFE0004)&0x00000004)==0x00000000
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "SPI_RDR,Receive Data Register"
|
|
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=0111,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,Forbidden"
|
|
hexmask.long.word 0x00 0.--15. 1. " RD ,Receive Data"
|
|
wgroup.long 0x0c++0x03
|
|
line.long 0x00 "SPI_TDR,Transmit Data Register"
|
|
bitfld.long 0x00 24. " LASTXFER ,Last Transfer" "No effect,TD transferred"
|
|
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=0111,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,Forbidden"
|
|
hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data"
|
|
else
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "SPI_RDR,Receive Data Register"
|
|
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "PCS0,PCS1,PCS2,PCS3,PCS4,PCS5,PCS6,PCS7,PCS8,PCS9,PCS10,PCS11,PCS12,PCS13,PCS14,PCS15"
|
|
hexmask.long.word 0x00 0.--15. 1. " RD ,Receive Data"
|
|
wgroup.long 0x0c++0x03
|
|
line.long 0x00 "SPI_TDR,Transmit Data Register"
|
|
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "PCS0,PCS1,PCS2,PCS3,PCS4,PCS5,PCS6,PCS7,PCS8,PCS9,PCS10,PCS11,PCS12,PCS13,PCS14,PCS15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data"
|
|
endif
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "SPI_SR,Status Register"
|
|
bitfld.long 0x00 16. " SPIENS ,SPI Enable Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SPENDTX ,End of Transmitter Transfer" "No end,End"
|
|
bitfld.long 0x00 4. " SPENDRX ,End of Receiver Transfer" "No end,End"
|
|
bitfld.long 0x00 3. " OVRES ,Overrun Error Status" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MODF ,Mode Fault Error" "No error,Error"
|
|
bitfld.long 0x00 1. " TDRE ,Transmit Data Register Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 0. " RDRF ,Receive Data Register Full" "Not full,Full"
|
|
wgroup.long 0x14++0x07
|
|
line.long 0x00 "SPI_IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 5. " SPENDTX ,End of Transmitter Transfer Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 4. " ENDRX ,End of Receiver Transfer Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 3. " OVRES ,Overrun Error Status Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 2. " MODF ,Mode Fault Error Interrupt Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TDRE ,Transmit Data Register Empty Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 0. " RDRF ,Receive Data Register Full Interrupt Enable" "No effect,Enabled"
|
|
line.long 0x04 "SPI_IDR,Interrupt Disable Register"
|
|
bitfld.long 0x04 5. " SPENDTX ,End of Transmitter Transfer Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 4. " SPENDRX ,End of Receiver Transfer Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 3. " OVRES ,Overrun Error Status Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 2. " MODF ,Mode Fault Error Interrupt Disable" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " TDRE ,Transmit Data Register Empty Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 0. " RDRF ,Receive Data Register Full Interrupt Disable" "No effect,Disabled"
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "SPI_IMR,Interrupt Mask Register"
|
|
bitfld.long 0x00 5. " SPENDTX ,End of Transmitter Transfer Interrupt Mask" "Not enabled,Enabled"
|
|
bitfld.long 0x00 4. " SPENDRX ,End of Receiver Transfer Interrupt Mask" "Not enabled,Enabled"
|
|
bitfld.long 0x00 3. " OVRES ,Overrun Error Status Interrupt Mask" "Not enabled,Enabled"
|
|
bitfld.long 0x00 2. " MODF ,Mode Fault Error Interrupt Mask" "Not enabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TDRE ,Transmit Data Register Empty Interrupt Mask" "Not enabled,Enabled"
|
|
bitfld.long 0x00 0. " RDRF ,Receive Data Register Full Interrupt Mask" "Not enabled,Enabled"
|
|
group.long 0x20--0x2f
|
|
line.long 0x00 "SP_RPR,Receive Pointer Register"
|
|
hexfld.long 0x00 " RXPTR ,Receive Pointer"
|
|
line.long 0x04 "SP_RCR,Receive Counter Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter"
|
|
line.long 0x08 "SP_TPR,Transmit Pointer Register"
|
|
hexfld.long 0x08 " TXPTR ,Transmit Pointer"
|
|
line.long 0x0c "SP_TCR,Transmit Counter Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " TXCTR ,Transmit Counter"
|
|
group.long 0x30--0x3f
|
|
line.long 0x00 "SPI_CSR0,Chip Select Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DLYBCT ,Delay Between Consecutive Transfers"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DLYBS ,Delay Before SPCK"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SCBR ,Serial Clock Baud Rate"
|
|
bitfld.long 0x00 4.--7. " BITS ,Bits per Transfer" "8,9,10,11,12,13,14,15,16,?..."
|
|
textline " "
|
|
bitfld.long 0x00 3. " CSAAT ,Chip Select Active After Transfer" "CSL rised,CSL not rised"
|
|
bitfld.long 0x00 1. " NCPHA ,Clock Phase" "Changed,Captured"
|
|
bitfld.long 0x00 0. " CPOL ,Clock Polarity" "0,1"
|
|
line.long 0x04 "SPI_CSR1,Chip Select Register 1"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DLYBCT ,Delay Between Consecutive Transfers"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DLYBS ,Delay Before SPCK"
|
|
hexmask.long.byte 0x04 8.--15. 1. " SCBR ,Serial Clock Baud Rate"
|
|
bitfld.long 0x04 4.--7. " BITS ,Bits per Transfer" "8,9,10,11,12,13,14,15,16,?..."
|
|
textline " "
|
|
bitfld.long 0x04 3. " CSAAT ,Chip Select Active After Transfer" "CSL rised,CSL not rised"
|
|
bitfld.long 0x04 1. " NCPHA ,Clock Phase" "Changed,Captured"
|
|
bitfld.long 0x04 0. " CPOL ,Clock Polarity" "0,1"
|
|
line.long 0x08 "SPI_CSR2,Chip Select Register 2"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DLYBCT ,Delay Between Consecutive Transfers"
|
|
hexmask.long.byte 0x08 16.--23. 1. " DLYBS ,Delay Before SPCK"
|
|
hexmask.long.byte 0x08 8.--15. 1. " SCBR ,Serial Clock Baud Rate"
|
|
bitfld.long 0x08 4.--7. " BITS ,Bits per Transfer" "8,9,10,11,12,13,14,15,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 3. " CSAAT ,Chip Select Active After Transfer" "CSL rised,CSL not rised"
|
|
bitfld.long 0x08 1. " NCPHA ,Clock Phase" "Changed,Captured"
|
|
bitfld.long 0x08 0. " CPOL ,Clock Polarity" "0,1"
|
|
line.long 0x0c "SPI_CSR3,Chip Select Register 3"
|
|
hexmask.long.byte 0x0c 24.--31. 1. " DLYBCT ,Delay Between Consecutive Transfers"
|
|
hexmask.long.byte 0x0c 16.--23. 1. " DLYBS ,Delay Before SPCK"
|
|
hexmask.long.byte 0x0c 8.--15. 1. " SCBR ,Serial Clock Baud Rate"
|
|
bitfld.long 0x0c 4.--7. " BITS ,Bits per Transfer" "8,9,10,11,12,13,14,15,16,?..."
|
|
textline " "
|
|
bitfld.long 0x0c 3. " CSAAT ,Chip Select Active After Transfer" "CSL rised,CSL not rised"
|
|
bitfld.long 0x0c 1. " NCPHA ,Clock Phase" "Changed,Captured"
|
|
bitfld.long 0x0c 0. " CPOL ,Clock Polarity" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree.open "Universal Synchronous/Asynchronous Receiver/Transmitter (USART)"
|
|
tree "USART0"
|
|
base 0xFFFC0000
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "US_CR,Control Register"
|
|
bitfld.long 0x00 12. " SENDA ,Send Address" "No effect,Sent"
|
|
bitfld.long 0x00 11. " STTTO ,Start Time-out" "No effect,Started"
|
|
bitfld.long 0x00 10. " STPBRK ,Stop Break" "No effect,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 9. " STTBRK ,Start Break" "No effect,Started"
|
|
bitfld.long 0x00 8. " RSTSTA ,Reset Status Bits" "No effect,Reset"
|
|
bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 3. " RSTTX ,Reset Transmitter" "No effect,Reset"
|
|
bitfld.long 0x00 2. " RSTRX ,Reset Receiver" "No effect,Reset"
|
|
if (data.long(ad:0xFFFC0000+0x04)&0x00000100)==0x00000100
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "US_MR,Mode Register"
|
|
bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK"
|
|
textline " "
|
|
bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit"
|
|
bitfld.long 0x00 16. " MSBF ,Bit Order" "Least Significant,Most Significant"
|
|
bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal Mode,Automatic Echo,Local Loopback,Remote Loopback"
|
|
bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,Reserved,2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,No parity,Multidrop,Multidrop"
|
|
bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous"
|
|
bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits"
|
|
bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK /8,SCK,SCK"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "US_MR,Mode Register"
|
|
bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK"
|
|
textline " "
|
|
bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit"
|
|
bitfld.long 0x00 16. " MSBF ,Bit Order" "Least Significant,Most Significant"
|
|
bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal Mode,Automatic Echo,Local Loopback,Remote Loopback"
|
|
bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,1.5,2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,No parity,Multidrop,Multidrop"
|
|
bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous"
|
|
bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits"
|
|
bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK /8,SCK,SCK"
|
|
endif
|
|
wgroup.long 0x08++0x07
|
|
line.long 0x00 "US_IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 9. " TXEMPTY ,TXEMPTY Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 8. " TIMEOUT ,Time-out Interrupt Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PARE ,Parity Error Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 6. " FRAME ,Framing Error Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 5. " OVRE ,Overrun Error Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 4. " ENDTX ,End of Transmit Interrupt Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ENDRX ,End of Receive Transfer Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 2. " RXBRK ,Receiver Break Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 1. " TXRDY ,TXRDY Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 0. " RXRDY ,RXRDY Interrupt Enable" "No effect,Enabled"
|
|
line.long 0x04 "US_IDR,Interrupt Disable Register"
|
|
bitfld.long 0x04 9. " TXEMPTY ,TXEMPTY Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 8. " TIMEOUT ,Time-out Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 7. " PARE ,Parity Error Interrupt Disable" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 6. " FRAME ,Framing Error Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 5. " OVRE ,Overrun Error Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 4. " ENDTX ,End of Transmit Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 3. " ENDRX ,End of Receive Transfer Interrupt Disable" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " RXBRK ,Receiver Break Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 1. " TXRDY ,TXRDY Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 0. " RXRDY ,RXRDY Interrupt Disable" "No effect,Disabled"
|
|
rgroup.long 0x10--0x1b
|
|
line.long 0x00 "US_IMR,Interrupt Mask Register"
|
|
bitfld.long 0x00 9. " TXEMPTY ,TXEMPTY Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " TIMEOUT ,Time-out Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " PARE ,Parity Error Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " FRAME ,Framing Error Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OVRE ,Overrun Error Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " ENDTX ,End of Transmit Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ENDRX ,End of Receive Transfer Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RXBRK ,Receiver Break Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TXRDY ,TXRDY Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RXRDY ,RXRDY Interrupt Mask" "Disabled,Enabled"
|
|
line.long 0x04 "US_CSR,Channel Status Register"
|
|
bitfld.long 0x04 9. " TXEMPTY ,Transmitter Empty" "Not empty,Empty"
|
|
bitfld.long 0x04 8. " TIMEOUT ,Receiver Time-out" "No time-out,Time-out"
|
|
textline " "
|
|
bitfld.long 0x04 7. " PARE ,Parity Error" "No error,Error"
|
|
bitfld.long 0x04 6. " FRAME ,Framing Error" "No error,Error"
|
|
bitfld.long 0x04 5. " OVRE ,Overrun Error" "No error,Error"
|
|
bitfld.long 0x04 4. " ENDTX ,End of Transmiter Transfer" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x04 3. " ENDRX ,End of Receiver Transfer" "Not ended,Ended"
|
|
bitfld.long 0x04 2. " RXBRK ,Break Received/End of Break" "No break,Break"
|
|
bitfld.long 0x04 1. " TXRDY ,Transmitter Ready" "Ready,Not ready"
|
|
bitfld.long 0x04 0. " RXRDY ,Receiver Ready" "Not ready,Ready"
|
|
line.long 0x08 "US_RHR,Receiver Holding Register"
|
|
hexmask.long.word 0x08 0.--8. 1. " RXCHR ,Received Character"
|
|
wgroup.long 0x1c++0x03
|
|
line.long 0x00 "US_THR,Transmitter Holding Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " TXCHR ,Character to be Transmitted"
|
|
group.long 0x20--0x2b
|
|
line.long 0x00 "US_BRGR,Baud Rate Generator Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divider"
|
|
line.long 0x04 "US_RTOR,Receiver Time-out Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TO ,Time-out Value"
|
|
line.long 0x08 "US_TTGR,Transmitter Timeguard Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " TG ,Timeguard Value"
|
|
group.long 0x30--0x3f
|
|
line.long 0x00 "US_RPR,Receive Pointer Register"
|
|
hexfld.long 0x00 " RXPTR ,Receive Pointer"
|
|
line.long 0x04 "US_RCR,Receive Counter Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter"
|
|
line.long 0x08 "US_TPR,Transmit Pointer Register"
|
|
hexfld.long 0x00 " TXPTR ,Transmit Pointer"
|
|
line.long 0x0c "US_TCR,Transmit Counter Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " TXCTR ,Transmit Counter"
|
|
tree.end
|
|
tree "USART1"
|
|
base 0xFFFC4000
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "US_CR,Control Register"
|
|
bitfld.long 0x00 12. " SENDA ,Send Address" "No effect,Sent"
|
|
bitfld.long 0x00 11. " STTTO ,Start Time-out" "No effect,Started"
|
|
bitfld.long 0x00 10. " STPBRK ,Stop Break" "No effect,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 9. " STTBRK ,Start Break" "No effect,Started"
|
|
bitfld.long 0x00 8. " RSTSTA ,Reset Status Bits" "No effect,Reset"
|
|
bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 3. " RSTTX ,Reset Transmitter" "No effect,Reset"
|
|
bitfld.long 0x00 2. " RSTRX ,Reset Receiver" "No effect,Reset"
|
|
if (data.long(ad:0xFFFC4000+0x04)&0x00000100)==0x00000100
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "US_MR,Mode Register"
|
|
bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK"
|
|
textline " "
|
|
bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit"
|
|
bitfld.long 0x00 16. " MSBF ,Bit Order" "Least Significant,Most Significant"
|
|
bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal Mode,Automatic Echo,Local Loopback,Remote Loopback"
|
|
bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,Reserved,2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,No parity,Multidrop,Multidrop"
|
|
bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous"
|
|
bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits"
|
|
bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK /8,SCK,SCK"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "US_MR,Mode Register"
|
|
bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK"
|
|
textline " "
|
|
bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit"
|
|
bitfld.long 0x00 16. " MSBF ,Bit Order" "Least Significant,Most Significant"
|
|
bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal Mode,Automatic Echo,Local Loopback,Remote Loopback"
|
|
bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,1.5,2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,No parity,Multidrop,Multidrop"
|
|
bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous"
|
|
bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits"
|
|
bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK /8,SCK,SCK"
|
|
endif
|
|
wgroup.long 0x08++0x07
|
|
line.long 0x00 "US_IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 9. " TXEMPTY ,TXEMPTY Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 8. " TIMEOUT ,Time-out Interrupt Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PARE ,Parity Error Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 6. " FRAME ,Framing Error Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 5. " OVRE ,Overrun Error Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 4. " ENDTX ,End of Transmit Interrupt Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ENDRX ,End of Receive Transfer Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 2. " RXBRK ,Receiver Break Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 1. " TXRDY ,TXRDY Interrupt Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 0. " RXRDY ,RXRDY Interrupt Enable" "No effect,Enabled"
|
|
line.long 0x04 "US_IDR,Interrupt Disable Register"
|
|
bitfld.long 0x04 9. " TXEMPTY ,TXEMPTY Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 8. " TIMEOUT ,Time-out Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 7. " PARE ,Parity Error Interrupt Disable" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 6. " FRAME ,Framing Error Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 5. " OVRE ,Overrun Error Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 4. " ENDTX ,End of Transmit Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 3. " ENDRX ,End of Receive Transfer Interrupt Disable" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " RXBRK ,Receiver Break Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 1. " TXRDY ,TXRDY Interrupt Disable" "No effect,Disabled"
|
|
bitfld.long 0x04 0. " RXRDY ,RXRDY Interrupt Disable" "No effect,Disabled"
|
|
rgroup.long 0x10--0x1b
|
|
line.long 0x00 "US_IMR,Interrupt Mask Register"
|
|
bitfld.long 0x00 9. " TXEMPTY ,TXEMPTY Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " TIMEOUT ,Time-out Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " PARE ,Parity Error Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " FRAME ,Framing Error Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " OVRE ,Overrun Error Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " ENDTX ,End of Transmit Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ENDRX ,End of Receive Transfer Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RXBRK ,Receiver Break Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TXRDY ,TXRDY Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RXRDY ,RXRDY Interrupt Mask" "Disabled,Enabled"
|
|
line.long 0x04 "US_CSR,Channel Status Register"
|
|
bitfld.long 0x04 9. " TXEMPTY ,Transmitter Empty" "Not empty,Empty"
|
|
bitfld.long 0x04 8. " TIMEOUT ,Receiver Time-out" "No time-out,Time-out"
|
|
textline " "
|
|
bitfld.long 0x04 7. " PARE ,Parity Error" "No error,Error"
|
|
bitfld.long 0x04 6. " FRAME ,Framing Error" "No error,Error"
|
|
bitfld.long 0x04 5. " OVRE ,Overrun Error" "No error,Error"
|
|
bitfld.long 0x04 4. " ENDTX ,End of Transmiter Transfer" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x04 3. " ENDRX ,End of Receiver Transfer" "Not ended,Ended"
|
|
bitfld.long 0x04 2. " RXBRK ,Break Received/End of Break" "No break,Break"
|
|
bitfld.long 0x04 1. " TXRDY ,Transmitter Ready" "Ready,Not ready"
|
|
bitfld.long 0x04 0. " RXRDY ,Receiver Ready" "Not ready,Ready"
|
|
line.long 0x08 "US_RHR,Receiver Holding Register"
|
|
hexmask.long.word 0x08 0.--8. 1. " RXCHR ,Received Character"
|
|
wgroup.long 0x1c++0x03
|
|
line.long 0x00 "US_THR,Transmitter Holding Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " TXCHR ,Character to be Transmitted"
|
|
group.long 0x20--0x2b
|
|
line.long 0x00 "US_BRGR,Baud Rate Generator Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divider"
|
|
line.long 0x04 "US_RTOR,Receiver Time-out Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TO ,Time-out Value"
|
|
line.long 0x08 "US_TTGR,Transmitter Timeguard Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " TG ,Timeguard Value"
|
|
group.long 0x30--0x3f
|
|
line.long 0x00 "US_RPR,Receive Pointer Register"
|
|
hexfld.long 0x00 " RXPTR ,Receive Pointer"
|
|
line.long 0x04 "US_RCR,Receive Counter Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter"
|
|
line.long 0x08 "US_TPR,Transmit Pointer Register"
|
|
hexfld.long 0x00 " TXPTR ,Transmit Pointer"
|
|
line.long 0x0c "US_TCR,Transmit Counter Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " TXCTR ,Transmit Counter"
|
|
tree.end
|
|
tree.end
|
|
endif
|
|
tree "Special Function Registers (SF)"
|
|
base 0xFFF00000
|
|
width 0x9
|
|
rgroup.long 0x0++3
|
|
line.long 0x00 "SF_CIDR,Chip ID Register"
|
|
bitfld.long 0x00 31. " EXT ,Extension Flag" "Not extended,Extended"
|
|
sif (cpu()=="AT91M40800"||cpu()=="AT91R40008"||cpu()=="AT91FR4042"||cpu()=="AT91FR40162"||cpu()=="AT91R40807")
|
|
bitfld.long 0x00 28.--30. " NVPTYP ,Nonvolatile Program Memory Type" "Reserved,F Series,Reserved,Reserved,R Series,?..."
|
|
endif
|
|
sif (cpu()=="AT91M42800A"||cpu()=="AT91M55800A")
|
|
bitfld.long 0x00 28.--30. " NVPTYP ,Nonvolatile Program Memory Type" "Reserved,M/F Series,Reserved,Reserved,R Series,?..."
|
|
endif
|
|
hexmask.long.byte 0x00 20.--27. 1. " ARCH ,Chip Architecture"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " VDSIZ ,Volatille Data Memory Size" "None,1K bytes,2K bytes,Reserved,4K bytes,Reserved,Reserved,Reserved,8K bytes,?..."
|
|
bitfld.long 0x00 12.--15. " NVDSIZ ,Non Volatille Data Memory Size" "None,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " NVPSIZ ,Non Volatille Program Memory Size" "None,Reserved,Reserved,32K bytes,Reserved,64K bytes,Reserved,128K bytes,Reserved,256K bytes,?..."
|
|
hexmask.long.byte 0x00 0.--4. 1. " VERSION ,Version of Chip"
|
|
hgroup.long 0x04++3
|
|
hide.long 0x0 "SF_EXID,Chip ID Extension Register (RESERVED)"
|
|
rgroup.long 0x08++3
|
|
line.long 0x0 "SF_RSR,Reset Status Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. " RESET ,Reset Status Information"
|
|
sif (cpu()=="AT91R40807")
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "SF_MMR,Memory Mode Register"
|
|
bitfld.long 0x00 0. " RAMWU ,Internal Extended RAM Write Detection" "Aborted,Allowed"
|
|
endif
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "SF_PMR,Protect Mode Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " PMRKEY ,Protect Mode Register Key"
|
|
bitfld.long 0x00 5. " AIC ,AIC Protect Mode Enable" "Normal,Protect"
|
|
width 0xb
|
|
tree.end
|
|
width 8.
|
|
group ice:0x8--0x0d "Watchpoint 0"
|
|
line.long 0x0 "AV,Address Value"
|
|
line.long 0x4 "AM,Address Mask"
|
|
line.long 0x8 "DV,Data Value"
|
|
line.long 0x0c "DM,Data Mask"
|
|
line.long 0x10 "CV,Control Value"
|
|
bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
|
|
bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
|
|
bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
|
|
bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
|
|
bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
|
|
bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
|
|
bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
|
|
bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,W"
|
|
line.long 0x14 "CM,Control Mask"
|
|
bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
|
|
bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
|
|
bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
|
|
bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
|
|
bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
|
|
bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
|
|
bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
|
|
group ice:0x10--0x15 "Watchpoint 1"
|
|
line.long 0x0 "AV,Address Value"
|
|
line.long 0x4 "AM,Address Mask"
|
|
line.long 0x8 "DV,Data Value"
|
|
line.long 0x0c "DM,Data Mask"
|
|
line.long 0x10 "CV,Control Value"
|
|
bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
|
|
bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
|
|
bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
|
|
bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
|
|
bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
|
|
bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
|
|
bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
|
|
bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,w"
|
|
line.long 0x14 "CM,Control Mask"
|
|
bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
|
|
bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
|
|
bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
|
|
bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
|
|
bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
|
|
bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
|
|
bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
|
|
textline ""
|