Files
Gen4_R-Car_Trace32/2_Trunk/perarm9t.per
2025-10-14 09:52:32 +09:00

108 lines
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; --------------------------------------------------------------------------------
; @Title: ARM9TDMI on chip peripherals
; @Props:
; @Author: -
; @Changelog:
; @Manufacturer:
; @Doc:
; @Core:
; @Chiplist: ARM7EJS, ARM9E-S, ARM9EJ, ARM9TDMI, SC200, SC210
; @Copyright: (C) 1989-2014 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: perarm9t.per 16305 2023-06-28 11:47:37Z pegold $
config 16. 8.
width 8.
ASSERT VERSION.BUILD.BASE()>=80109.
sif PER.isNOTIFICATION()
base AVM:0x00000000
wgroup AVM:0x00++0
textline " Peripheral File Notification - "
button "show missing files" "DIALOG.MESSAGE ""Please check your installation for the possibly missing files:""+CONV.CHAR(0xa)+PER.NOTIFICATION.MISSINGFILES()"
textline " ---------------------------------------------------------------"
textline " The peripheral file for this SoC cannot be displayed. "
textline " Possible reasons are: "
textline " - it is missing in the local installation or under development "
textline " - it is confidential "
textline " "
textline " As fallback only the core registers are shown. "
textline " Please check www.lauterbach.com/scripts.html "
textline " or contact support@lauterbach.com . "
textline " "
endif
;begin include file arm/icebreaker9.ph
;parameters:
tree "ICEBreaker"
group ice:0x0--0x5 "Debug Control"
line.long 0x0 "DBGCTRL,Debug Control Register"
bitfld.long 0x0 0x3 "STEP ,Single Step" "disabled,enabled"
bitfld.long 0x0 0x2 " INTDIS ,Interrupts Disable" "enabled,disabled"
bitfld.long 0x0 0x1 " DBGRQ ,Debug Request" "no,yes"
bitfld.long 0x0 0x0 " DBGACK ,Debug Acknowledge" "no,yes"
line.long 0x4 "DBGSTAT,Debug Status Register"
bitfld.long 0x4 0x4 "ITBIT ,ITBIT" "0,1"
bitfld.long 0x4 0x3 " SYSCOMP ,SYSCOMP" "0,1"
bitfld.long 0x4 0x2 " IFEN ,Interrupts Enable" "disabled,enabled"
bitfld.long 0x4 0x1 " DBGRQ ,Debug Request" "no,yes"
bitfld.long 0x4 0x0 " DBGACK ,Debug Acknowledge" "no,yes"
line.long 0x8 "VECTOR,Vector Catch Register"
bitfld.long 0x8 0x7 "FIQ ,FIQ" "dis,ena"
bitfld.long 0x8 0x6 " IRQ ,IRQ" "dis,ena"
bitfld.long 0x8 0x4 " D_ABO ,D_ABORT" "dis,ena"
bitfld.long 0x8 0x3 " P_ABO ,P_ABORT" "dis,ena"
bitfld.long 0x8 0x2 " SWI ,SWI" "dis,ena"
bitfld.long 0x8 0x1 " UND ,UNDEF" "dis,ena"
bitfld.long 0x8 0x0 " RES ,RESET" "dis,ena"
line.long 0x10 "COMCTRL,Debug Communication Control Register"
bitfld.long 0x10 28.--31. "VERSION ,Version Number" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
bitfld.long 0x10 0x1 " WRITE ,Write Register Free" "idle,pend"
bitfld.long 0x10 0x0 " READ ,Read Register Free" "idle,pend"
line.long 0x14 "COMDATA,Debug Communication Data Register"
group ice:0x8--0x0d "Watchpoint 0"
line.long 0x0 "AV,Address Value"
line.long 0x4 "AM,Address Mask"
line.long 0x8 "DV,Data Value"
line.long 0x0c "DM,Data Mask"
line.long 0x10 "CV,Control Value"
bitfld.long 0x10 0x8 "ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,W"
line.long 0x14 "CM,Control Mask"
bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
group ice:0x10--0x15 "Watchpoint 1"
line.long 0x0 "AV,Address Value"
line.long 0x4 "AM,Address Mask"
line.long 0x8 "DV,Data Value"
line.long 0x0c "DM,Data Mask"
line.long 0x10 "CV,Control Value"
bitfld.long 0x10 0x8 "ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,w"
line.long 0x14 "CM,Control Mask"
bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
tree.end
;end include file arm/icebreaker9.ph