120 lines
6.4 KiB
Plaintext
120 lines
6.4 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: ARM1020E on chip peripherals (MMU)
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; @Props:
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; @Author: -
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; @Changelog:
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; @Manufacturer:
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; @Doc:
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; @Core:
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; @Chiplist: ARM1020E, ARM1022E, ARM1026EJ-S
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; @Copyright: (C) 1989-2014 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: pera1020m.per 5553 2014-09-09 14:43:30Z jerzy $
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config 16. 8.
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width 8.
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;begin include file arm/arm10cp15.ph
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;parameters:
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config 16. 8.
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width 8.
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group c15:0x0--0x0 "CP15"
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line.long 0x0 "ID,Identity Code"
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hexmask.long.byte 0x0 24.--31. 0x1 "IMPL ,Implementor"
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hexmask.long.byte 0x0 16.--23. 0x1 " ARCH ,Architecture"
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hexmask.long.word 0x0 4.--15. 0x1 " PARTNUM ,Part Number"
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hexmask.long.byte 0x0 0.--3. 0x1 " REV ,Revision"
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group c15:0x100--0x100
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line.long 0x0 "CTYPE,Cache Type"
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bitfld.long 0x0 25.--28. "CLASS ,Cache Class" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
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bitfld.long 0x0 24. " H ,Cache Havardness" "no,yes"
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textline " "
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bitfld.long 0x0 18.--20. "DSIZE ,Data Cache Size" "512,1k,2k,4k,8k,16k,32k,64k"
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bitfld.long 0x0 15.--17. " DASS ,Data Cache Associativity" "dir,2,4,8,16,32,64,128"
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bitfld.long 0x0 14. " DM ,Data Cache Parameters" "0,1"
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bitfld.long 0x0 12.--13. " DLENGTH ,Data Cache Line Length" "2,4,8,16"
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textline " "
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bitfld.long 0x0 6.--8. "ISIZE ,Instruction Cache Size" "512,1k,2k,4k,8k,16k,32k,64k"
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bitfld.long 0x0 3.--5. " IASS ,Instruction Cache Associativity" "dir,2,4,8,16,32,64,128"
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bitfld.long 0x0 2. " IM ,Instruction Cache Parameters" "0,1"
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bitfld.long 0x0 0.--1. " ILENGTH ,Instruction Cache Line Length" "2,4,8,16"
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group c15:0x1--0x1
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line.long 0x0 "CR,Control Register"
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bitfld.long 0x0 21. "FI ,Fast Interrupt" "no,yes"
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bitfld.long 0x0 15. " L4 ,Compatible to Software Version 4" "no,yes"
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bitfld.long 0x0 14. " RR ,Round Robin Replacement" "random,round robin"
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bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "00000000,FFFF0000"
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textline " "
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bitfld.long 0x0 12. "I ,Instruction Cache" "off,on"
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bitfld.long 0x0 11. " Z ,Branch Prediction" "off,on"
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bitfld.long 0x0 0x9 " R ,ROM Protection" "off,on"
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bitfld.long 0x0 0x8 " S ,System Protection" "off,on"
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bitfld.long 0x0 0x7 " B ,Endianism" "little,big"
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bitfld.long 0x0 0x3 " W ,Write Buffer" "off,on"
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bitfld.long 0x0 0x2 " C ,Data Cache" "off,on"
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bitfld.long 0x0 0x1 " A ,Alignment Fault Check" "off,on"
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bitfld.long 0x0 0x0 " M ,MMU" "off,on"
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group c15:0x2--0x2
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line.long 0x0 "TTB,Translation Table Base Register"
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hexmask.long 0x0 14.--31. 0x4000 "TTBA ,Translation Table Base Address"
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group c15:0x3--0x3
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line.long 0x0 "DAC,Domain Access Control Register"
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bitfld.long 0x0 30.--31. "D15 ,Domain Access 15" "no access,client,reserved,manager"
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bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "no access,client,reserved,manager"
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bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "no access,client,reserved,manager"
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bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "no access,client,reserved,manager"
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textline " "
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bitfld.long 0x0 22.--23. "D11 ,Domain Access 11" "no access,client,reserved,manager"
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bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "no access,client,reserved,manager"
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bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "no access,client,reserved,manager"
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bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "no access,client,reserved,manager"
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textline " "
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bitfld.long 0x0 14.--15. "D7 ,Domain Access 7" "no access,client,reserved,manager"
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bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "no access,client,reserved,manager"
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bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "no access,client,reserved,manager"
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bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "no access,client,reserved,manager"
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textline " "
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bitfld.long 0x0 6.--7. "D3 ,Domain Access 3" "no access,client,reserved,manager"
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bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "no access,client,reserved,manager"
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bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "no access,client,reserved,manager"
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bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "no access,client,reserved,manager"
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group c15:0x105--0x105
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line.long 0x0 "IFSR,Instruction Fault Status Register"
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bitfld.long 0x0 0x4--0x7 "DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "TLB miss,alignment,debug event,reserved,reserved,reserved,reserved,translation page,reserved,domain section,external abort,domain page,ext_abort_on_trans_l1,reserved,translation section,permission page"
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group c15:0x106--0x106
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line.long 0x0 "IFAR,Instruction Fault Address Register"
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group c15:0x5--0x5
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line.long 0x0 "DFSR,Data Fault Status Register"
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bitfld.long 0x0 0x4--0x7 "DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "TLB miss,alignment,debug event,reserved,reserved,reserved,reserved,translation page,reserved,domain section,external abort,domain page,ext_abort_on_trans_l1,reserved,translation section,permission page"
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group c15:0x6--0x6
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line.long 0x0 "DFAR,Data Fault Address Register"
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group c15:0x0d--0x0d
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line.long 0x0 "PID,Process Identifier"
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group c15:0x10d--0x10d
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line.long 0x0 "CID,Context Identifier"
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group c15:0xcf--0xcf
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line.long 0x0 "PLLCR,PLL Configuration"
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bitfld.long 0x0 16. "PD ,Power Down" "no,yes"
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bitfld.long 0x0 14.--15. " BY ,Controls the Selects for the GCLK, HCL, VCO Multiplexors" "00,01,10,11"
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hexmask.long.byte 0x0 4.--11. 0x1 " MDIV ,PLL Feedback Divider"
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bitfld.long 0x0 0.--3. " HDIV ,AHB Clock Divider" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
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group c15:0xef--0xef
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line.long 0x0 "PMSR,Power Manager Status"
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bitfld.long 0x0 28.--31. "V ,Version" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
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bitfld.long 0x0 1. " W ,Transmit Channel" "idle,busy"
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bitfld.long 0x0 0. " R ,Receive Channel" "empty,full"
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group c15:0x1ef--0x1ef
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line.long 0x0 "PMRDR,Power Manager Receive Data"
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bitfld.long 0x0 31. "E ,Emulation" "normal,emulation"
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bitfld.long 0x0 4.--7. " STATE ,System Power State" "off,hibernate,coma,sleep,nap,nap,nap,nap,idle,idle,slow,slow,normal,normal,turbo,?..."
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group c15:0xbf--0xbf
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line.long 0x0 "CR2,Control Register 2"
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bitfld.long 0x0 4. "ST ,CP15 Soft TLB Enable" "disabled,enabled"
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bitfld.long 0x0 3. " IC ,CP15 Instruction Cachable" "no,yes"
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bitfld.long 0x0 2. " IB ,CP15 Instruction Bufferable" "no,yes"
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bitfld.long 0x0 1. " DC ,CP15 Data Cachable" "no,yes"
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bitfld.long 0x0 0. " DB ,CP15 Data Bufferable" "no,yes"
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;end include file arm/arm10cp15.ph
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textline ""
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