561 lines
30 KiB
Plaintext
561 lines
30 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: RCARE2 Specific Menu
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; @Props: Released
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; @Author: ASK, PBU, GAJ, KKW
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; @Changelog: 2015-05-13 PBU
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; @Manufacturer: RENESAS - Renesas Technology, Corp.
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; @Core: Cortex-A7MPCore
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; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menrcare2.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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popup "[:chip]Core Registers (Cortex-A7MPCore)"
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(
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menuitem "[:chip]ID Registers" "per , ""Core Registers (Cortex-A7MPCore),ID Registers"""
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menuitem "[:chip]System Control and Configuration" "per , ""Core Registers (Cortex-A7MPCore),System Control and Configuration"""
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menuitem "[:chip]Memory Management Unit" "per , ""Core Registers (Cortex-A7MPCore),Memory Management Unit"""
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menuitem "[:chip]Virtualization Extensions" "per , ""Core Registers (Cortex-A7MPCore),Virtualization Extensions"""
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menuitem "[:chip]Cache Control and Configuration" "per , ""Core Registers (Cortex-A7MPCore),Cache Control and Configuration"""
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menuitem "[:chip]System Performance Monitor" "per , ""Core Registers (Cortex-A7MPCore),System Performance Monitor"""
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menuitem "[:chip]System Timer Register" "per , ""Core Registers (Cortex-A7MPCore),System Timer Register"""
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separator
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menuitem "[:chip]Debug Registers" "per , ""Core Registers (Cortex-A7MPCore),Debug Registers"""
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menuitem "[:chip]Breakpoint Registers" "per , ""Core Registers (Cortex-A7MPCore),Breakpoint Registers"""
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menuitem "[:chip]Watchpoint Control Registers" "per , ""Core Registers (Cortex-A7MPCore),Watchpoint Control Registers"""
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separator
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menuitem "[:chip]Interrupt Controller" "per , ""Core Registers (Cortex-A7MPCore),Interrupt Controller"""
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)
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separator
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menuitem "PFC;Pin Function Controller" " per , ""PFC (Pin Function Controller)"""
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popup "GPIO;General Purpose Input/Output"
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(
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menuitem "GPIO 0" " per , ""GPIO,GPIO 0"""
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menuitem "GPIO 1" " per , ""GPIO,GPIO 1"""
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menuitem "GPIO 2" " per , ""GPIO,GPIO 2"""
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menuitem "GPIO 3" " per , ""GPIO,GPIO 3"""
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menuitem "GPIO 4" " per , ""GPIO,GPIO 4"""
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menuitem "GPIO 5" " per , ""GPIO,GPIO 5"""
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menuitem "GPIO 6" " per , ""GPIO,GPIO 6"""
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)
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menuitem "CPG;Clock Pulse Generator" " per , ""CPG (Clock Pulse Generator)"""
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menuitem "MSSR;Module Standby, Software Reset" " per , ""Module Standby, Software Reset"""
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menuitem "APMU;Advanced Power Management Unit for AP-System Core" " per , ""APMU (Advanced Power Management Unit for AP-System Core)"""
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menuitem "RST;Reset" " per , ""RST (RESET)"""
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menuitem "INTC-SYS;Interrupt controller for AP-System" " per , ""INTC-SYS (Interrupt Controller)"""
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menuitem "INTC-RT;Interrupt Controller for external NMI/IRQ inputs" " per , ""INTC-RT (Interrupt Controller)"""
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menuitem "MFIS;Multifunctional Interface" " per , ""MFIS (Multifunctional Interface)"""
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popup "IPMMU;Memory management unit"
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(
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menuitem "IPMMU-SY0" " per , ""IPMMU,IPMMU-SY0"""
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menuitem "IPMMU-SY1" " per , ""IPMMU,IPMMU-SY1"""
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menuitem "IPMMU-DS" " per , ""IPMMU,IPMMU-DS"""
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menuitem "IPMMU-MP" " per , ""IPMMU,IPMMU-MP"""
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menuitem "IPMMU-MX" " per , ""IPMMU,IPMMU-MX"""
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menuitem "IPMMU-GP" " per , ""IPMMU,IPMMU-GP"""
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)
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menuitem "LBSC;Local Bus State Controller" " per , ""LBSC within Bus Bridge"""
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popup "DBSC3;External Bus Controller for DDR3-SDRAM"
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(
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menuitem "DBSC3 0" " per , ""DBSC3 (DDR3-SDRAM Interface),DBSC3 0"""
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menuitem "DBSC3 1" " per , ""DBSC3 (DDR3-SDRAM Interface),DBSC3 1"""
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)
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menuitem "S3CTRL;S3 Cache Controller" " per , ""S3CTRL"""
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popup "SYS-DMAC;System Direct Memory Access Controller"
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(
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menuitem "Lower channels" " per , ""SYS-DMAC (System Direct Memory Access Controller),Lower channels"""
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menuitem "Upper channels" " per , ""SYS-DMAC (System Direct Memory Access Controller),Upper channels"""
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)
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popup "LBSC-DMAC"
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(
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menuitem "LBSC Common Registers" " per , ""LBSC-DMAC,LBSC Common Registers"""
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menuitem "Channel 0" " per , ""LBSC-DMAC,Channel 0"""
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menuitem "Channel 1" " per , ""LBSC-DMAC,Channel 1"""
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menuitem "Channel 2" " per , ""LBSC-DMAC,Channel 2"""
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menuitem "Channel 3" " per , ""LBSC-DMAC,Channel 3"""
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menuitem "Channel 4" " per , ""LBSC-DMAC,Channel 4"""
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menuitem "Channel 5" " per , ""LBSC-DMAC,Channel 5"""
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menuitem "Channel 6" " per , ""LBSC-DMAC,Channel 6"""
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menuitem "Channel 7" " per , ""LBSC-DMAC,Channel 7"""
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menuitem "Channel 8" " per , ""LBSC-DMAC,Channel 8"""
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menuitem "Channel 9" " per , ""LBSC-DMAC,Channel 9"""
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menuitem "Channel 10" " per , ""LBSC-DMAC,Channel 10"""
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menuitem "Channel 11" " per , ""LBSC-DMAC,Channel 11"""
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menuitem "Channel 12" " per , ""LBSC-DMAC,Channel 12"""
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menuitem "Channel 13" " per , ""LBSC-DMAC,Channel 13"""
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menuitem "Channel 14" " per , ""LBSC-DMAC,Channel 14"""
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menuitem "Channel 15" " per , ""LBSC-DMAC,Channel 15"""
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menuitem "Channel 16" " per , ""LBSC-DMAC,Channel 16"""
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menuitem "Channel 17" " per , ""LBSC-DMAC,Channel 17"""
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menuitem "Channel 18" " per , ""LBSC-DMAC,Channel 18"""
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menuitem "Channel 19" " per , ""LBSC-DMAC,Channel 19"""
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menuitem "Channel 20" " per , ""LBSC-DMAC,Channel 20"""
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menuitem "Channel 21" " per , ""LBSC-DMAC,Channel 21"""
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menuitem "Channel 22" " per , ""LBSC-DMAC,Channel 22"""
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menuitem "Channel 23" " per , ""LBSC-DMAC,Channel 23"""
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menuitem "Channel 24" " per , ""LBSC-DMAC,Channel 24"""
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menuitem "Channel 25" " per , ""LBSC-DMAC,Channel 25"""
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menuitem "Channel 26" " per , ""LBSC-DMAC,Channel 26"""
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menuitem "Channel 27" " per , ""LBSC-DMAC,Channel 27"""
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menuitem "Channel 28" " per , ""LBSC-DMAC,Channel 28"""
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menuitem "Channel 29" " per , ""LBSC-DMAC,Channel 29"""
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menuitem "Channel 30" " per , ""LBSC-DMAC,Channel 30"""
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menuitem "Channel 31" " per , ""LBSC-DMAC,Channel 31"""
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menuitem "Channel 32" " per , ""LBSC-DMAC,Channel 32"""
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menuitem "Channel 33" " per , ""LBSC-DMAC,Channel 33"""
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menuitem "Channel 34" " per , ""LBSC-DMAC,Channel 34"""
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menuitem "Channel 35" " per , ""LBSC-DMAC,Channel 35"""
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menuitem "Channel 36" " per , ""LBSC-DMAC,Channel 36"""
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menuitem "Channel 37" " per , ""LBSC-DMAC,Channel 37"""
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menuitem "Channel 38" " per , ""LBSC-DMAC,Channel 38"""
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menuitem "Channel 39" " per , ""LBSC-DMAC,Channel 39"""
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menuitem "Channel 40" " per , ""LBSC-DMAC,Channel 40"""
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menuitem "Channel 41" " per , ""LBSC-DMAC,Channel 41"""
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menuitem "Channel 42" " per , ""LBSC-DMAC,Channel 42"""
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)
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popup "DU;Display Unit"
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(
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menuitem "DU 0" " per , ""DU (Display Unit),DU 0"""
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menuitem "DU 1" " per , ""DU (Display Unit),DU 1"""
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)
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popup "CMM;Image enhancement module"
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(
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menuitem "CMM 0" " per , ""CMM,CMM 0"""
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menuitem "CMM 1" " per , ""CMM,CMM 1"""
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)
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popup "VIN;Video Input Module"
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(
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menuitem "Channel 0" " per , ""VIN (Video Input Module),Channel 0"""
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menuitem "Channel 1" " per , ""VIN (Video Input Module),Channel 1"""
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)
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menuitem "IMR-LSX2;Distortion Correction Engine" " per , ""IMR-LSX2 (Distortion Correction Engine)"""
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menuitem "VPC;Video Processing Unit Cache" " per , ""VPC (Video Processing Unit Cache)"""
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menuitem "FDP1;Fine Display Processor" " per , ""FDP1 (Fine Display Processor)"""
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popup "VSP1;Video signal processor 1"
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(
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menuitem "VSPS" " per , ""VSP1,VSPS"""
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menuitem "VSPD 0" " per , ""VSP1,VSPD 0"""
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)
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popup "2D-DMAC;Image Extraction Direct Memory Access Controller"
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(
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menuitem "2D-DMAC 0" " per , ""2D-DMAC (Image Extraction Direct Memory Access Controller),2D-DMAC 0"""
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menuitem "2D-DMAC 1" " per , ""2D-DMAC (Image Extraction Direct Memory Access Controller),2D-DMAC 1"""
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menuitem "2D-DMAC 2" " per , ""2D-DMAC (Image Extraction Direct Memory Access Controller),2D-DMAC 2"""
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menuitem "2D-DMAC 3" " per , ""2D-DMAC (Image Extraction Direct Memory Access Controller),2D-DMAC 3"""
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menuitem "2D-DMAC 4" " per , ""2D-DMAC (Image Extraction Direct Memory Access Controller),2D-DMAC 4"""
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menuitem "2D-DMAC 5" " per , ""2D-DMAC (Image Extraction Direct Memory Access Controller),2D-DMAC 5"""
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menuitem "2D-DMAC 6" " per , ""2D-DMAC (Image Extraction Direct Memory Access Controller),2D-DMAC 6"""
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menuitem "2D-DMAC 7" " per , ""2D-DMAC (Image Extraction Direct Memory Access Controller),2D-DMAC 7"""
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menuitem "2D-DMAC Interrupt Clear Register" " per , ""2D-DMAC (Image Extraction Direct Memory Access Controller),2D-DMAC Interrupt Clear Register"""
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)
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popup "SSIU;Serial Sound Interface Unit"
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(
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menuitem "BUSIF 0" " per , ""SSIU (Serial Sound Interface Unit),BUSIF 0"""
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menuitem "BUSIF 1" " per , ""SSIU (Serial Sound Interface Unit),BUSIF 1"""
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menuitem "BUSIF 2" " per , ""SSIU (Serial Sound Interface Unit),BUSIF 2"""
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menuitem "BUSIF 3" " per , ""SSIU (Serial Sound Interface Unit),BUSIF 3"""
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menuitem "BUSIF 4" " per , ""SSIU (Serial Sound Interface Unit),BUSIF 4"""
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menuitem "BUSIF 5" " per , ""SSIU (Serial Sound Interface Unit),BUSIF 5"""
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menuitem "BUSIF 6" " per , ""SSIU (Serial Sound Interface Unit),BUSIF 6"""
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menuitem "BUSIF 7" " per , ""SSIU (Serial Sound Interface Unit),BUSIF 7"""
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menuitem "BUSIF 8" " per , ""SSIU (Serial Sound Interface Unit),BUSIF 8"""
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menuitem "BUSIF 9" " per , ""SSIU (Serial Sound Interface Unit),BUSIF 9"""
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menuitem "SSIU" " per , ""SSIU (Serial Sound Interface Unit),SSIU"""
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)
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popup "SSI;Serial Sound Interface"
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(
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menuitem "Channel 0" " per , ""SSI (Serial Sound Interface),Channel 0"""
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menuitem "Channel 1" " per , ""SSI (Serial Sound Interface),Channel 1"""
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menuitem "Channel 2" " per , ""SSI (Serial Sound Interface),Channel 2"""
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menuitem "Channel 3" " per , ""SSI (Serial Sound Interface),Channel 3"""
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menuitem "Channel 4" " per , ""SSI (Serial Sound Interface),Channel 4"""
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menuitem "Channel 5" " per , ""SSI (Serial Sound Interface),Channel 5"""
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menuitem "Channel 6" " per , ""SSI (Serial Sound Interface),Channel 6"""
|
|
menuitem "Channel 7" " per , ""SSI (Serial Sound Interface),Channel 7"""
|
|
menuitem "Channel 8" " per , ""SSI (Serial Sound Interface),Channel 8"""
|
|
menuitem "Channel 9" " per , ""SSI (Serial Sound Interface),Channel 9"""
|
|
)
|
|
menuitem "ADG;Audio Clock Generator" " per , ""ADG (Audio Clock Generator)"""
|
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menuitem "SCU;Sampling Rate Converter Unit" " per , ""SCU (Sampling Rate Converter Unit)"""
|
|
menuitem "Audio DMAC;Audio-Direct Memory Access Controller" " per , ""Audio-DMAC (Audio-Direct Memory Access Controller)"""
|
|
menuitem "Audio DMAC-P-P;Audio DMAC-Peripheral-Peripheral" " per , ""Audio DMAC-Peripheral-Peripheral"""
|
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menuitem "Ether;Ethernet MAC Controller" " per , ""Ether (Ethernet MAC Controller)"""
|
|
menuitem "EthernetAVB" " per , ""EthernetAVB"""
|
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popup "CAN;Controller Area Network"
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|
(
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menuitem "Channel 0" " per , ""CAN (Controller Area Network),Channel 0"""
|
|
menuitem "Channel 1" " per , ""CAN (Controller Area Network),Channel 1"""
|
|
)
|
|
menuitem "MLP;MediaLB+" " per , ""MLP (MediaLB+)"""
|
|
menuitem "MLM;MediaLB+ Local Memory" " per , ""MLM (MediaLB+ Local Memory)"""
|
|
menuitem "IEB;IE Bus" " per , ""IEB (IE Bus)"""
|
|
popup "SCIF;Serial Communication Interface with FIFO"
|
|
(
|
|
popup "Channel 0"
|
|
(
|
|
menuitem "SCIF" " per , ""SCIF (Serial Communication Interface with FIFO),Channel 0,SCIF"""
|
|
menuitem "SCIF A (CPU)" " per , ""SCIF (Serial Communication Interface with FIFO),Channel 0,SCIF A (CPU)"""
|
|
menuitem "SCIF A (DMA)" " per , ""SCIF (Serial Communication Interface with FIFO),Channel 0,SCIF A (DMA)"""
|
|
menuitem "SCIF B (CPU)" " per , ""SCIF (Serial Communication Interface with FIFO),Channel 0,SCIF B (CPU)"""
|
|
menuitem "SCIF B (DMA)" " per , ""SCIF (Serial Communication Interface with FIFO),Channel 0,SCIF B (DMA)"""
|
|
)
|
|
popup "Channel 1"
|
|
(
|
|
menuitem "SCIF" " per , ""SCIF (Serial Communication Interface with FIFO),Channel 1,SCIF"""
|
|
menuitem "SCIF A (CPU)" " per , ""SCIF (Serial Communication Interface with FIFO),Channel 1,SCIF A (CPU)"""
|
|
menuitem "SCIF A (DMA)" " per , ""SCIF (Serial Communication Interface with FIFO),Channel 1,SCIF A (DMA)"""
|
|
menuitem "SCIF B (CPU)" " per , ""SCIF (Serial Communication Interface with FIFO),Channel 1,SCIF B (CPU)"""
|
|
menuitem "SCIF B (DMA)" " per , ""SCIF (Serial Communication Interface with FIFO),Channel 1,SCIF B (DMA)"""
|
|
)
|
|
popup "Channel 2"
|
|
(
|
|
menuitem "SCIF" " per , ""SCIF (Serial Communication Interface with FIFO),Channel 2,SCIF"""
|
|
menuitem "SCIF A (CPU)" " per , ""SCIF (Serial Communication Interface with FIFO),Channel 2,SCIF A (CPU)"""
|
|
menuitem "SCIF A (DMA)" " per , ""SCIF (Serial Communication Interface with FIFO),Channel 2,SCIF A (DMA)"""
|
|
menuitem "SCIF B (CPU)" " per , ""SCIF (Serial Communication Interface with FIFO),Channel 2,SCIF B (CPU)"""
|
|
menuitem "SCIF B (DMA)" " per , ""SCIF (Serial Communication Interface with FIFO),Channel 2,SCIF B (DMA)"""
|
|
)
|
|
popup "Channel 3"
|
|
(
|
|
menuitem "SCIF" " per , ""SCIF (Serial Communication Interface with FIFO),Channel 3,SCIF"""
|
|
menuitem "SCIF A (CPU)" " per , ""SCIF (Serial Communication Interface with FIFO),Channel 3,SCIF A (CPU)"""
|
|
menuitem "SCIF A (DMA)" " per , ""SCIF (Serial Communication Interface with FIFO),Channel 3,SCIF A (DMA)"""
|
|
)
|
|
popup "Channel 4"
|
|
(
|
|
menuitem "SCIF" " per , ""SCIF (Serial Communication Interface with FIFO),Channel 4,SCIF"""
|
|
menuitem "SCIF A (CPU)" " per , ""SCIF (Serial Communication Interface with FIFO),Channel 4,SCIF A (CPU)"""
|
|
menuitem "SCIF A (DMA)" " per , ""SCIF (Serial Communication Interface with FIFO),Channel 4,SCIF A (DMA)"""
|
|
)
|
|
popup "Channel 5"
|
|
(
|
|
menuitem "SCIF" " per , ""SCIF (Serial Communication Interface with FIFO),Channel 5,SCIF"""
|
|
menuitem "SCIF A (CPU)" " per , ""SCIF (Serial Communication Interface with FIFO),Channel 5,SCIF A (CPU)"""
|
|
menuitem "SCIF A (DMA)" " per , ""SCIF (Serial Communication Interface with FIFO),Channel 5,SCIF A (DMA)"""
|
|
)
|
|
)
|
|
popup "HSCIF;High Speed Serial Communication Interface with FIFO"
|
|
(
|
|
menuitem "Channel 0" " per , ""HSCIF (High Speed Serial Communication Interface with FIFO),Channel 0"""
|
|
menuitem "Channel 1" " per , ""HSCIF (High Speed Serial Communication Interface with FIFO),Channel 1"""
|
|
menuitem "Channel 2" " per , ""HSCIF (High Speed Serial Communication Interface with FIFO),Channel 2"""
|
|
)
|
|
popup "I2C;I2C Bus Interface"
|
|
(
|
|
menuitem "Channel 0" " per , ""I2C Bus Interface,Channel 0"""
|
|
menuitem "Channel 1" " per , ""I2C Bus Interface,Channel 1"""
|
|
menuitem "Channel 2" " per , ""I2C Bus Interface,Channel 2"""
|
|
menuitem "Channel 3" " per , ""I2C Bus Interface,Channel 3"""
|
|
menuitem "Channel 4" " per , ""I2C Bus Interface,Channel 4"""
|
|
menuitem "Channel 5" " per , ""I2C Bus Interface,Channel 5"""
|
|
)
|
|
popup "IIC-typeB;I2C Bus Interface - typeB"
|
|
(
|
|
menuitem "IIC 0" " per , ""IIC-typeB (I2C Bus Interface),IIC 0"""
|
|
menuitem "IIC 1" " per , ""IIC-typeB (I2C Bus Interface),IIC 1"""
|
|
)
|
|
popup "MSIOF;Clock-Synchronized Serial Interface with FIFO"
|
|
(
|
|
menuitem "MSIOF 0 (CPU)" " per , ""MSIOF (Clock-Synchronized Serial Interface with FIFO),MSIOF 0 (CPU)"""
|
|
menuitem "MSIOF 0 (DMA)" " per , ""MSIOF (Clock-Synchronized Serial Interface with FIFO),MSIOF 0 (DMA)"""
|
|
menuitem "MSIOF 1 (CPU)" " per , ""MSIOF (Clock-Synchronized Serial Interface with FIFO),MSIOF 1 (CPU)"""
|
|
menuitem "MSIOF 1 (DMA)" " per , ""MSIOF (Clock-Synchronized Serial Interface with FIFO),MSIOF 1 (DMA)"""
|
|
menuitem "MSIOF 2 (CPU)" " per , ""MSIOF (Clock-Synchronized Serial Interface with FIFO),MSIOF 2 (CPU)"""
|
|
menuitem "MSIOF 2 (DMA)" " per , ""MSIOF (Clock-Synchronized Serial Interface with FIFO),MSIOF 2 (DMA)"""
|
|
)
|
|
menuitem "QSPI;Quad Serial Peripheral Interface" " per , ""QSPI (Quad Serial Peripheral Interface)"""
|
|
popup "MMC;Multi Media Card Interface"
|
|
(
|
|
menuitem "MMC 0" " per , ""MMC (Multi Media Card interface),MMC 0"""
|
|
menuitem "MMC 1" " per , ""MMC (Multi Media Card interface),MMC 1"""
|
|
)
|
|
popup "EHCI/OHCI USB2.0 Host"
|
|
(
|
|
menuitem "Channel 0" " per , ""EHCI/OHCI USB2.0 Host,Channel 0"""
|
|
menuitem "Channel 1" " per , ""EHCI/OHCI USB2.0 Host,Channel 1"""
|
|
menuitem "OHCI" " per , ""EHCI/OHCI USB2.0 Host,OHCI"""
|
|
menuitem "EHCI" " per , ""EHCI/OHCI USB2.0 Host,EHCI"""
|
|
menuitem "AHB" " per , ""EHCI/OHCI USB2.0 Host,AHB"""
|
|
)
|
|
menuitem "HS-USB;High Speed USB" " per , ""HS-USB (High Speed USB)"""
|
|
popup "USB DMAC;USB High-Speed DMAC"
|
|
(
|
|
menuitem "USB DMAC 0" " per , ""USB DMAC (USB High-Speed DMAC),USB DMAC 0"""
|
|
menuitem "USB DMAC 1" " per , ""USB DMAC (USB High-Speed DMAC),USB DMAC 1"""
|
|
menuitem "DDM" " per , ""USB DMAC (USB High-Speed DMAC),DDM (Descriptor DMAC)"""
|
|
)
|
|
menuitem "RWDT;RCLK Watchdog Timer" " per , ""RWDT (RCLK Watchdog Timer)"""
|
|
popup "TPU;16-Bit Timer Pulse Unit"
|
|
(
|
|
menuitem "TPU-CPU" " per , ""TPU (16-Bit Timer Pulse Unit),TPU-CPU"""
|
|
menuitem "TPU-DMAC" " per , ""TPU (16-Bit Timer Pulse Unit),TPU-DMAC"""
|
|
)
|
|
popup "CMT;Compare Match Timer"
|
|
(
|
|
menuitem "CMT 0" " per , ""CMT (Compare Match Timer),CMT 0"""
|
|
menuitem "CMT 1" " per , ""CMT (Compare Match Timer),CMT 1"""
|
|
)
|
|
popup "TMU;Timer Unit"
|
|
(
|
|
menuitem "Timer 0" " per , ""TMU (Timer Unit),Timer 0"""
|
|
menuitem "Timer 1" " per , ""TMU (Timer Unit),Timer 1"""
|
|
menuitem "Timer 2" " per , ""TMU (Timer Unit),Timer 2"""
|
|
menuitem "Timer 3" " per , ""TMU (Timer Unit),Timer 3"""
|
|
)
|
|
popup "PWM Timer"
|
|
(
|
|
menuitem "Channel 0" " per , ""PWM Timer,Channel 0"""
|
|
menuitem "Channel 1" " per , ""PWM Timer,Channel 1"""
|
|
menuitem "Channel 2" " per , ""PWM Timer,Channel 2"""
|
|
menuitem "Channel 3" " per , ""PWM Timer,Channel 3"""
|
|
menuitem "Channel 4" " per , ""PWM Timer,Channel 4"""
|
|
menuitem "Channel 5" " per , ""PWM Timer,Channel 5"""
|
|
menuitem "Channel 6" " per , ""PWM Timer,Channel 6"""
|
|
)
|
|
menuitem "IR;IR Receiver" " per , ""IR (IR Receiver)"""
|
|
menuitem "THS/TSC;Thermal Sensor" " per , ""THS/TSC (Thermal Sensor)"""
|
|
menuitem "SYSC;System Controller" " per , ""SYSC (System Controller)"""
|
|
menuitem "H-UDI;User Debugging Interface" " per , ""H-UDI (User Debugging Interface)"""
|
|
menuitem "PRR;Product Register" " per , ""PRR (Product Register)"""
|
|
)
|
|
)
|