396 lines
13 KiB
Plaintext
396 lines
13 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: Kinetis K30 Specific Menu
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; @Props: Released
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; @Author: KRW, KAO, PBU, ZUO, BCA, RMG, TRJ
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; @Changelog: 2014-01-23 KRW
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; 2014-10-23 KAO
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; 2015-08-25 ZUO
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; 2018-07-04 BCA
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; @Manufacturer: NXP - NXP Semiconductors
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; @Core: Cortex-M4
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; @Chip: MK30DN512VMD10, MK30DN512VLQ10, MK30DX256VMD10, MK30DX256VLQ10,
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; MK30DX128VMD10, MK30DX128VLQ10, MK30DN512VLK10, MK30DN512VMB10,
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; MK30DN512VMC10, MK30DN512VLL10, MK30DX64VLH7, MK30DX128VLH7,
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; MK30DX256VLH7, MK30DX64VLK7, MK30DX128VLK7, MK30DX256VLK7,
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; MK30DX128VLL7, MK30DX256VLL7, MK30DX64VMC7, MK30DX128VMC7,
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; MK30DX256VMC7, MK30DN512ZVLK10, MK30DN512ZVLQ10, MK30DX256ZVLQ10,
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; MK30DN512ZVLQ10R, MK30DX256VLL7R
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; @Copyright: (C) 1989-2018 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menk30.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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if CORENAME()=="CORTEXM4F"
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(
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popup "[:chip]Core Registers (Cortex-M4F)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M4F),System Control"""
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menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M4F),Memory Protection Unit"""
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menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M4F),Nested Vectored Interrupt Controller"""
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menuitem "[:chip]FPU;Floating-point Unit" "per , ""Core Registers (Cortex-M4F),Floating-point Unit"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M4F),Debug,Core Debug"""
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menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M4F),Debug,Flash Patch and Breakpoint Unit (FPB)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M4F),Debug,Data Watchpoint and Trace Unit (DWT)"""
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)
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)
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)
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else
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(
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popup "[:chip]Core Registers (Cortex-M4)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M4),System Control"""
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menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M4),Memory Protection Unit"""
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menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M4),Nested Vectored Interrupt Controller"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M4),Debug,Core Debug"""
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menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M4),Debug,Flash Patch and Breakpoint Unit (FPB)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M4),Debug,Data Watchpoint and Trace Unit (DWT)"""
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)
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)
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)
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separator
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popup "Ports"
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(
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menuitem "PORTA" "per , ""PORT (Pin control and interrupts),PORTA"""
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menuitem "PORTB" "per , ""PORT (Pin control and interrupts),PORTB"""
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menuitem "PORTC" "per , ""PORT (Pin control and interrupts),PORTC"""
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menuitem "PORTD" "per , ""PORT (Pin control and interrupts),PORTD"""
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menuitem "PORTE" "per , ""PORT (Pin control and interrupts),PORTE"""
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)
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popup "System Modules"
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(
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menuitem "SIM" "per , ""System Modules,SIM (System Integration Module)"""
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if !cpuis("MK30DN512ZVLK10")&&!cpuis("MK30DN512ZVLQ10")&&!cpuis("MK30DX256ZVLQ10")&&!cpuis("MK30DN512ZVLQ10R")
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(
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menuitem "RCM" "per , ""System Modules,RCM (Reset Control Module)"""
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menuitem "SMC" "per , ""System Modules,SMC (System Mode Controller)"""
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)
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if !cpuis("MK30DX256VLL7R")
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(
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menuitem "MC" "per , ""System Modules,MC (Mode Controller)"""
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)
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menuitem "PMC" "per , ""System Modules,PMC (Power Management Controller)"""
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menuitem "LLWU" "per , ""System Modules,LLWU (Low-Leakage Wake-up Unit)"""
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menuitem "MCM" "per , ""System Modules,MCM (Miscellaneous Control Module)"""
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menuitem "AXBS" "per , ""System Modules,AXBS (Crossbar Switch)"""
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if cpuis("MK30D*10")
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(
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menuitem "MPU" "per , ""System Modules,MPU (Memory Protection Unit)"""
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)
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menuitem "PB" "per , ""System Modules,Peripheral Bridge"""
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menuitem "DMAMUX" "per , ""System Modules,DMAMUX (Direct Memory Access Multiplexer)"""
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menuitem "eDMA" "per , ""System Modules,eDMA (Enhanced Direct Memory Access)"""
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menuitem "EWM" "per , ""System Modules,EWM (External Watchdog Monitor)"""
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menuitem "WDOG" "per , ""System Modules,WDOG (Watchdog Timer)"""
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)
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popup "Clock Modules"
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(
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menuitem "MCG" "per , ""Clock Modules,MCG (Multipurpose Clock Generator)"""
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menuitem "OSC" "per , ""Clock Modules,OSC (Oscillator)"""
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)
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popup "Memories and Memory Interfaces"
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(
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menuitem "FMC" "per , ""Memories and Memory Interfaces,FMC (Flash Memory Controller)"""
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menuitem "FTFL" "per , ""Memories and Memory Interfaces,FTFL (Flash Memory Module)"""
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if !(cpuis("MK30DX256VLL7*"))
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(
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if cpuis("?????X*")||cpuis("MK30D????ZVLQ*")
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(
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menuitem "FLEXBUS" "per , ""Memories and Memory Interfaces,FLEXBUS (External Bus Interface)"""
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)
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)
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)
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menuitem "Security" "per , ""Security and integrity modules"""
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popup "Analog Modules"
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(
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menuitem "ADC" "per , ""Analog Modules,ADC (Analog-to-Digital Converter)"""
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menuitem "HSCMP" "per , ""Analog Modules,HSCMP (Comparator/6-bit DAC Converter)"""
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menuitem "DAC" "per , ""Analog Modules,DAC (12-bit Digital-to-Analog Converter)"""
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menuitem "VREFV1" "per , ""Analog Modules,VREFV1 (Voltage Reference)"""
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)
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popup "Timers"
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(
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menuitem "PDB" "per , ""Timers,PDB (Programmable Delay Block)"""
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menuitem "FTM" "per , ""Timers,FTM (FlexTimer)"""
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menuitem "PIT" "per , ""Timers,PIT (Periodic Interrupt Timer)"""
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menuitem "LPT" "per , ""Timers,LPT (Low Power Timer)"""
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menuitem "CMT" "per , ""Timers,CMT (Carrier Modulator Transmitter)"""
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menuitem "RTC" "per , ""Timers,RTC (Real Time Clock)"""
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)
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popup "Communication Interfaces"
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(
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menuitem "CAN" "per , ""Communication Interfaces,CAN (FlexCAN)"""
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menuitem "SPI" "per , ""Communication Interfaces,SPI (Serial Peripheral Interface)"""
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menuitem "I2C" "per , ""Communication Interfaces,I2C (Inter-Integrated Circuit)"""
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menuitem "UART" "per , ""Communication Interfaces,UART (Universal asynchronous receiver/transmitter)"""
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if cpuis("MK30D*10*")
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(
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menuitem "SDHC" "per , ""Communication Interfaces,SDHC (Secured digital host controller)"""
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)
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if (cpu()!="MK30DN512ZVLK10")&&!(cpuis("MK30D????ZVLQ*"))
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(
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menuitem "SDHC" "per , ""Communication Interfaces,I2S/SAI"""
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)
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if (cpu()=="MK30DN512ZVLK10")||(cpuis("MK30D????ZVLQ*"))
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(
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menuitem "I2S" "per , ""Communication Interfaces,I2S"""
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)
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)
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popup "Human-Machine Interfaces"
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(
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menuitem "SLCD" "per , ""Human-Machine Interfaces,SLCD (LCD Controller)"""
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menuitem "TSI" "per , ""Human-Machine Interfaces,TSI (Touch sense input)"""
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popup "GPIO (GPIO Controller)"
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(
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menuitem "GPIO_A" "per , ""Human-Machine Interfaces,GPIO (GPIO Controller),GPIO_A"""
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menuitem "GPIO_B" "per , ""Human-Machine Interfaces,GPIO (GPIO Controller),GPIO_B"""
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menuitem "GPIO_C" "per , ""Human-Machine Interfaces,GPIO (GPIO Controller),GPIO_C"""
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menuitem "GPIO_D" "per , ""Human-Machine Interfaces,GPIO (GPIO Controller),GPIO_D"""
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menuitem "GPIO_E" "per , ""Human-Machine Interfaces,GPIO (GPIO Controller),GPIO_E"""
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)
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)
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)
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)
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