302 lines
9.4 KiB
Plaintext
302 lines
9.4 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: Generic script for ST STR91x internal flash
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;
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; @Description:
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;
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; Example script for flash declaration and programming of ST STR91x internal
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; flash.
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;
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; Script arguments:
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;
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; DO str91x [PREPAREONLY] [CPU=<cpu>] [BOOTBANK=<addr>] [NONBOOTBANK=<addr>]
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; [BOOT=<bank>]
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;
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; PREPAREONLY only declares flash but does not execute flash programming
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;
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; CPU=<cpu> selects CPU derivative <cpu>
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;
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; BOOTBANK=<addr> configures flash base address of boot bank.
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; Default base address is read from FMI_BBADR configuration register.
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;
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; NONBOOTBANK=<addr> configures flash base address of non boot bank.
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; Default base address is
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; read from FMI_NBBADR configuration register.
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;
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; BOOT=<bank> setups flash boot bank. <bank> can be BANK0 or BANK1.
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;
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; For example:
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;
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; DO ~~/demo/arm/flash/str91x CPU=STR912FAW44 PREPAREONLY
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;
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; List of STR91x derivatives and their configuration:
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;
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; CPU-Type FlashBank0 FlashBank1 SRAM size
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; (kByte) (kByte) (kByte)
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; --------------------------------------------------------------------------------
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; STR910FM32 256 32 64
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; STR910FW32 256 32 64
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; STR910FAM32 256 32 64
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; STR910FAW32 256 32 64
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; STR910FAZ32 256 32 64
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; --------------------------------------------------------------------------------
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; STR911FM42 256 32 96
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; STR911FM44 512 32 96
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; STR911FAM42 256 32 96
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; STR911FAW42 256 32 96
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; STR911FAM44 512 32 96
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; STR911FAW44 512 32 96
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; STR911FAM46 1024 128 96
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; STR911FAW46 1024 128 96
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; STR911FAM47 2048 128 96
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; STR911FAW47 2048 128 96
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; --------------------------------------------------------------------------------
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; STR912FW42 256 32 96
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; STR912FW44 512 32 96
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; STR912FAW32 256 32 64
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; STR912FAW42 256 32 96
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; STR912FAZ42 256 32 96
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; STR912FAW44 512 32 96
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; STR912FAZ44 512 32 96
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; STR912FAW46 1024 128 96
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; STR912FAZ46 1024 128 96
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; STR912FAW47 2048 128 96
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; STR912FAZ47 2048 128 96
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;
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; Flash base addresses have to programmed in xBBADR FMI registers.
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;
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; SRAM base address is 0x4000000.
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;
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; @Chip: STR91*
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; @Keywords: ST
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; @Author: WRD
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Rev: 10516 $
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; $Id: str91x.cmm 10516 2022-02-02 11:39:30Z bschroefel $
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;
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LOCAL ¶meters
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ENTRY %LINE ¶meters
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LOCAL ¶m_prepareonly ¶m_cpu ¶m_bootbank ¶m_nonbootbank ¶m_boot
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¶m_prepareonly=(STRing.SCAN(STRing.UPpeR("¶meters"),"PREPAREONLY",0)!=-1)
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IF VERSION.BUILD()>=29755.
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(
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¶m_cpu=STRing.SCANAndExtract(STRing.UPpeR("¶meters"),"CPU=","")
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¶m_bootbank=STRing.SCANAndExtract(STRing.UPpeR("¶meters"),"BOOTBANK=","")
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¶m_nonbootbank=STRing.SCANAndExtract(STRing.UPpeR("¶meters"),"NONBOOTBANK=","")
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¶m_boot=STRing.SCANAndExtract(STRing.UPpeR("¶meters"),"BOOT=","")
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)
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; ------------------------------------------------------------------------------
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; Setup CPU
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LOCAL &Bank0Size &Bank1Size
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LOCAL &Bank0Addr &Bank1Addr
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LOCAL &BootBankSize &NonBootBankSize
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LOCAL &BootBankAddr &NonBootBankAddr
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IF SYStem.MODE()<5
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(
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SYStem.RESet
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IF "¶m_cpu"!=""
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SYStem.CPU ¶m_cpu
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IF VERSION.BUILD()>=37389.
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(
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IF !CPUIS(STR91*)
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SYStem.CPU STR91*
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)
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IF VERSION.BUILD()<16863.&&(SYStem.CPU()!="STR910")&&(SYStem.CPU()!="STR911")&&(SYStem.CPU()!="STR912")
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(
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; For older Trace32 software versions setup CPU selection here
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SYStem.CPU STR912
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)
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SYStem.JtagClock RTCK
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SYStem.Up
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)
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; ------------------------------------------------------------------------------
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; Setup flash configuration
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IF (SYStem.CPU()=="STR910")||(SYStem.CPU()=="STR911")||(SYStem.CPU()=="STR912")
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(
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; For older Trace32 software versions.
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; Setup the configuration information out of the table above.
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; Example for STR912FAW47:
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&Bank0Size=2048.
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&Bank1Size=128.
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&BootBankAddr=0x00000000
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&NonBootBankAddr=0x00200000
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)
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ELSE
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(
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&BootBankAddr=0x00000000
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IF "¶m_Bank0Addr"!=""
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&BootBankAddr=¶m_bootbank
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&NonBootBankAddr=0x00200000
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IF "¶m_Bank1Addr"!=""
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&NonBootBankAddr=¶m_nonbootbank
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IF CPUIS(STR91*2)
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(
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&Bank0Size=256.
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&Bank1Size=32.
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)
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ELSE IF CPUIS(STR91*4)
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(
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&Bank0Size=512.
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&Bank1Size=32.
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)
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ELSE IF CPUIS(STR91*6)
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(
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&Bank0Size=1024.
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&Bank1Size=128.
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)
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ELSE IF CPUIS(STR91*7)
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(
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&Bank0Size=2048.
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&Bank1Size=128.
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)
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)
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; Swap Boot Bank
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IF (((Data.Quad(DBG:0x520000)&0x0001000000000000)==0)&&("¶m_boot"=="BANK1"))||(((Data.Quad(DBG:0x520000)&0x0001000000000000)==0x0001000000000000)&&("¶m_boot"=="BANK0"))
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(
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GOSUB swapBootBank
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SYStem.Up
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)
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IF (Data.Quad(DBG:0x520000)&0x0001000000000000)==0
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(
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; Boot from flash bank 0
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&BootBankSize=&Bank0Size
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&Bank0Addr=&BootBankAddr
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&NonBootBankSize=&Bank1Size
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&Bank1Addr=&NonBootBankAddr
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)
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ELSE
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(
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; Boot from flash bank 1
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&BootBankSize=&Bank1Size
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&Bank1Addr=&BootBankAddr
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&NonBootBankSize=&Bank0Size
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&Bank0Addr=&NonBootBankAddr
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)
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IF &BootBankSize==32.
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Data.Set SD:0x54000000 %Long 0x00 ; FMI_BBSR = 32 kByte
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ELSE IF &BootBankSize==128.
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Data.Set SD:0x54000000 %Long 0x02 ; FMI_BBSR = 128 kByte
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ELSE IF &BootBankSize==256.
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Data.Set SD:0x54000000 %Long 0x03 ; FMI_BBSR = 256 kByte
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ELSE IF &BootBankSize==512.
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Data.Set SD:0x54000000 %Long 0x04 ; FMI_BBSR = 512 kByte
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ELSE IF &BootBankSize==1024.
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Data.Set SD:0x54000000 %Long 0x05 ; FMI_BBSR = 1 MByte
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ELSE IF &BootBankSize==2048.
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Data.Set SD:0x54000000 %Long 0x06 ; FMI_BBSR = 2 MByte
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IF &NonBootBankSize==32.
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Data.Set SD:0x54000004 %Long 0x02 ; FMI_NBBSR = 32 kByte
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ELSE IF &NonBootBankSize==128.
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Data.Set SD:0x54000004 %Long 0x04 ; FMI_NBBSR = 128 kByte
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ELSE IF &NonBootBankSize==256.
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Data.Set SD:0x54000004 %Long 0x05 ; FMI_NBBSR = 256 kByte
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ELSE IF &NonBootBankSize==512.
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Data.Set SD:0x54000004 %Long 0x06 ; FMI_NBBSR = 512 kByte
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ELSE IF &NonBootBankSize==1024.
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Data.Set SD:0x54000004 %Long 0x07 ; FMI_NBBSR = 1 MByte
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ELSE IF &NonBootBankSize==2048.
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Data.Set SD:0x54000004 %Long 0x08 ; FMI_NBBSR = 2 MByte
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Data.Set SD:0x5400000C %Long &BootBankAddr>>2 ; FMI_BBADR
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Data.Set SD:0x54000010 %Long &NonBootBankAddr>>2 ; FMI_NBBADR
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Data.Set SD:0x54000018 %Long Data.Long(SD:0x54000018)|0x18 ; FMI_CR enable Bank1
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Data.Set SD:0x5C002034 %Long Data.Long(SD:0x5C002034)&0xFFFFFFFE ; Disable PFQBC
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; In this example script SCU_CLKCNTR is set to the reset value to ensure
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; flash programming. But also other SCU_CLKCNTR configuration is possible
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; and may provide better performance.
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Data.Set SD:0x5C002000 %Long 0x00020002 ; SCU_CLKCNTR reset value
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; ------------------------------------------------------------------------------
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; Flash declaration
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FLASH.RESet
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; Bank 0
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FLASH.Create 1. &Bank0Addr++(&Bank0Size*0x400-0x01) 0x10000 TARGET Word
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; Bank 1
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IF &Bank1Size==32.
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FLASH.Create 2. &Bank1Addr++(&Bank1Size*0x400-0x01) 0x2000 TARGET Word
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ELSE IF &Bank1Size==128.
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FLASH.Create 2. &Bank1Addr++(&Bank1Size*0x400-0x01) 0x4000 TARGET Word
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IF SYStem.BIGENDIAN()
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FLASH.TARGET 0x40000000 ESD:0x40001000 0x2000 ~~/demo/arm/flash/word_be/str9.bin
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ELSE
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FLASH.TARGET 0x40000000 ESD:0x40001000 0x2000 ~~/demo/arm/flash/word/str9.bin
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; Flash script ends here if called with parameter PREPAREONLY
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IF ¶m_prepareonly
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ENDDO PREPAREDONE
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; ------------------------------------------------------------------------------
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; Flash programming example
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DIALOG.YESNO "Program flash memory?"
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ENTRY &progflash
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IF &progflash
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(
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FLASH.UNLOCK.ALL
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FLASH.ReProgram.ALL /Erase
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Data.LOAD.auto *
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FLASH.ReProgram.off
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; Data.LOAD * /ComPare
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)
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ENDDO
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; --------------------------------------------------------------------------------
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; Swap flash boot bank
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swapBootBank:
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SYStem.Down
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SYStem.JtagClock 1MHz
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SYStem.Mode.Prepare
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; Print ID code register of the flash TAP #3
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PRINT "Flash TAP #3 ID code is 0x" Data.Long(DBG:0x00600000)
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; Read out configuration sector and invert bit CSX to swap boot flash
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; bank selection.
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LOCAL &configuration
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&configuration=Data.Quad(DBG:0x520000)^0x0001000000000000
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; Erase configuration sector
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Data.Set DBG:0x600010 %Quad 0x0002000000000000
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; Program configuration sector
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Data.Set DBG:0x520000 %Quad &configuration
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IF (Data.Quad(DBG:0x520000)&0x0001000000000000)==0
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PRINT "Flash Bank 0 ist selected for boot"
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ELSE
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PRINT "Flash Bank 1 ist selected for boot"
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SYStem.Down
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SYStem.JtagClock RTCK
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RETURN
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