1321 lines
31 KiB
C
1321 lines
31 KiB
C
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/**************************************************************************
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Benchmarking routines for the Data.BENCHMARK command
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Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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NOTE: Benchmarking is done by comparing the run times of
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two similar functions. Make sure that the code generated
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by the compiler is REALLY similar (even the alignment
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of code to internal buses may effect runtime).
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The modification of the formula for the return value can
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be used to trim the functions for proper alignment.
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The optimization level should be not too high to
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prevent the side effects of unwanted optimisation.
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**************************************************************************/
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#define SIMPLEINSTLEN 4 /* length of basic instruction used for I-Cache testing */
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#define CACHE_LINESIZE 0x20 /* maximum length of a cache line in bytes */
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typedef unsigned long TESTDATA; /* data type for bandwidth testing */
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typedef unsigned long TESTDATAWIDE;
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typedef unsigned char TESTDATA2; /* data type for random and latency testing */
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typedef struct
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{
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TESTDATA x0;
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TESTDATA x1;
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TESTDATA x2;
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TESTDATA x3;
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}
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TESTSTRUCT;
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/**************************************************************************
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Data structure for passing parameters to routines
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**************************************************************************/
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typedef struct
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{
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volatile TESTDATA * memory; /* data memory address */
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int reserved;
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int size; /* memory size in bytes */
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int test; /* test number */
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int count; /* repeat count */
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int latency; /* used in latency test function to wait till next cycle */
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int reserved2;
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int offset; /* offset to second memory block for copy/random tests, offset for latency */
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}
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TESTPARAMETER;
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void BenchmarkTest(TESTPARAMETER * params);
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static int FetchBandwidthTest1(volatile TESTDATA * memory, int count);
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static int FetchBandwidthTest2(volatile TESTDATA * memory, int count);
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static int ReadBandwidthTest1(volatile TESTDATAWIDE * memory, int count);
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static int ReadBandwidthTest2(volatile TESTDATAWIDE * memory, int count);
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static int WriteBandwidthTest1(volatile TESTDATAWIDE * memory, int count);
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static int WriteBandwidthTest2(volatile TESTDATAWIDE * memory, int count);
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static int CopyBandwidthTest1(volatile TESTDATAWIDE * memory, int count, int offset);
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static int CopyBandwidthTest2(volatile TESTDATAWIDE * memory, int count, int offset);
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static int ReadRandomTest1(volatile TESTDATA2 * memory, int count);
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static int ReadRandomTest2(volatile TESTDATA2 * memory, int count);
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static int WriteRandomTest1(volatile TESTDATA2 * memory, int count);
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static int WriteRandomTest2(volatile TESTDATA2 * memory, int count);
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static int CopyRandomTest1(volatile TESTDATA2 * memory, int count, int offset);
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static int CopyRandomTest2(volatile TESTDATA2 * memory, int count, int offset);
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static int ReadLatencyTestNear1(volatile TESTDATA2 * memory, int count, int latencymax, int offset);
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static int ReadLatencyTestNear2(volatile TESTDATA2 * memory, int count, int latencymax, int offset);
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static int ReadLatencyTestFar1(volatile TESTDATA2 * memory, int count, int latencymax, int offset);
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static int ReadLatencyTestFar2(volatile TESTDATA2 * memory, int count, int latencymax, int offset);
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extern int DhryStoneTest(unsigned char * memory, int count);
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/**************************************************************************
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Main test entry
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**************************************************************************/
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void BenchmarkTest(TESTPARAMETER * params)
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{
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int i, x, test, size, count, latency, offset;
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volatile TESTDATA *memory;
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volatile TESTDATA2 *memory2;
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volatile TESTDATAWIDE *memorywide;
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memory = params->memory;
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memorywide = (TESTDATAWIDE *) memory;
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memory2 = (TESTDATA2 *) memory;
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size = params->size;
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test = params->test;
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count = params->count;
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latency = params->latency;
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offset = params->offset;
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x = 0;
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switch (test) {
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case 1:
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/* D-Cache Read test */
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for (i = 0; i < count; i++) {
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x += ReadBandwidthTest1(memorywide, size / sizeof(TESTDATAWIDE));
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}
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break;
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case 2:
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/* D-Cache Read test reference */
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for (i = 0; i < count; i++) {
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x += ReadBandwidthTest2(memorywide, size / sizeof(TESTDATAWIDE));
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}
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break;
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case 3:
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/* D-Cache Write test */
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for (i = 0; i < count; i++) {
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x += WriteBandwidthTest1(memorywide, size / sizeof(TESTDATAWIDE));
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}
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break;
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case 4:
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/* D-Cache Write test reference */
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for (i = 0; i < count; i++) {
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x += WriteBandwidthTest2(memorywide, size / sizeof(TESTDATAWIDE));
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}
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break;
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case 5:
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/* D-Cache Copy test */
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for (i = 0; i < count; i++) {
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x += CopyBandwidthTest1(memorywide, size / sizeof(TESTDATAWIDE), offset / sizeof(TESTDATAWIDE));
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}
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break;
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case 6:
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/* D-Cache Copy test reference */
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for (i = 0; i < count; i++) {
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x += CopyBandwidthTest2(memorywide, size / sizeof(TESTDATAWIDE), offset / sizeof(TESTDATAWIDE));
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}
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break;
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case 7:
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/* D-Cache Random Read test */
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for (i = 0; i < count; i++) {
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x += ReadRandomTest1(memory2, size / sizeof(TESTDATA2));
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}
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#if CACHE_LINESIZE < 0x40
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params->size = (size / 0x400) * 32; /* number of reads done */
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#else
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params->size = (size / 0x400) * 16; /* number of reads done */
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#endif
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break;
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case 8:
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/* D-Cache Random Read test reference */
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for (i = 0; i < count; i++) {
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x += ReadRandomTest2(memory2, size / sizeof(TESTDATA2));
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}
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break;
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case 9:
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/* D-Cache Random Write test */
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for (i = 0; i < count; i++) {
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x += WriteRandomTest1(memory2, size / sizeof(TESTDATA2));
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}
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break;
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case 10:
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/* D-Cache Random Write test reference */
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for (i = 0; i < count; i++) {
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x += WriteRandomTest2(memory2, size / sizeof(TESTDATA2));
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}
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break;
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case 11:
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/* D-Cache Random Copy test */
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for (i = 0; i < count; i++) {
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x += CopyRandomTest1(memory2, size / sizeof(TESTDATA2), offset / sizeof(TESTDATA2));
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}
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break;
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case 12:
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/* D-Cache Random Copy test reference */
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for (i = 0; i < count; i++) {
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x += CopyRandomTest2(memory2, size / sizeof(TESTDATA2), offset / sizeof(TESTDATA2));
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}
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break;
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case 13:
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/* D-Cache Latency test */
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for (i = 0; i < count; i++) {
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x += ReadLatencyTestFar1(memory2, size / sizeof(TESTDATA2), latency, offset / sizeof(TESTDATA2));
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}
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break;
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case 14:
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/* D-Cache Latency test reference */
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for (i = 0; i < count; i++) {
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x += ReadLatencyTestFar2(memory2, size / sizeof(TESTDATA2), latency, offset / sizeof(TESTDATA2));
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}
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break;
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case 15:
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/* D-Cache Latency test */
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for (i = 0; i < count; i++) {
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x += ReadLatencyTestNear1(memory2, size / sizeof(TESTDATA2), latency, offset / sizeof(TESTDATA2));
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}
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break;
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case 16:
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/* D-Cache Latency test reference */
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for (i = 0; i < count; i++) {
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x += ReadLatencyTestNear2(memory2, size / sizeof(TESTDATA2), latency, offset / sizeof(TESTDATA2));
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}
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break;
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case 0x101:
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/* I-Cache Fetch test */
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for (i = 0; i < count; i++) {
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x += FetchBandwidthTest1(memory, size / SIMPLEINSTLEN);
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}
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params->size = size / SIMPLEINSTLEN; /* number of instructions
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* executed */
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break;
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case 0x102:
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/* I-Cache Fetch test reference */
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for (i = 0; i < count; i++) {
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x += FetchBandwidthTest2(memory, size / SIMPLEINSTLEN);
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}
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break;
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case 0x200:
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/* Dhrystone benchmark */
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x = DhryStoneTest(((unsigned char *) params)+0x100, count);
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break;
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case 0x303:
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/* D-Cache Write test via libc */
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for (i = 0; i < count; i++) {
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memset(memory, 0, size);
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}
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break;
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case 0x304:
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/* D-Cache Write test reference via libc */
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for (i = 0; i < count; i++) {
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memset(memory, 0, size / 2);
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}
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break;
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case 0x305:
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/* D-Cache Copy test via libc */
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for (i = 0; i < count; i++) {
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memcpy(memory, memory + offset / sizeof(TESTDATA), size);
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}
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break;
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case 0x306:
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/* D-Cache Copy test reference via libc */
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for (i = 0; i < count; i++) {
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memcpy(memory, memory + offset / sizeof(TESTDATA), size / 2);
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}
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break;
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default:
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return;
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}
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params->reserved = x;
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params->test = 0;
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}
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/**************************************************************************
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I-Cache and Peak MIPS test functions
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**************************************************************************/
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static int FetchBandwidthTest1(volatile TESTDATA * memory, int count)
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{
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register TESTDATA x0, x1, x2, x3, x4, x5, x6, x7;
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x0 = memory[0];
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x1 = memory[1];
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x2 = memory[2];
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x3 = memory[3];
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x4 = 0;
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x5 = 0;
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x6 = 0;
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x7 = 0;
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while (count > 0) {
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x0 = x0 << 1;
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x1 = x1 >> 1;
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x2 = x2 << 1;
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x3 = x3 >> 1;
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x4 |= x0;
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x5 |= x1;
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x6 |= x2;
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x7 |= x3;
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x0 = x0 << 1;
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x1 = x1 >> 1;
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x2 = x2 << 1;
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x3 = x3 >> 1;
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x4 |= x0;
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x5 |= x1;
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x6 |= x2;
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x7 |= x3;
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x0 = x0 << 1;
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x1 = x1 >> 1;
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x2 = x2 << 1;
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x3 = x3 >> 1;
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x4 |= x0;
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x5 |= x1;
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x6 |= x2;
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x7 |= x3;
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x0 = x0 << 1;
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x1 = x1 >> 1;
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x2 = x2 << 1;
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x3 = x3 >> 1;
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x4 |= x0;
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x5 |= x1;
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x6 |= x2;
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x7 |= x3;
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x0 = x0 << 1;
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x1 = x1 >> 1;
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x2 = x2 << 1;
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x3 = x3 >> 1;
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x4 |= x0;
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x5 |= x1;
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x6 |= x2;
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x7 |= x3;
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x0 = x0 << 1;
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x1 = x1 >> 1;
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x2 = x2 << 1;
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x3 = x3 >> 1;
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x4 |= x0;
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x5 |= x1;
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x6 |= x2;
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x7 |= x3;
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x0 = x0 << 1;
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x1 = x1 >> 1;
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x2 = x2 << 1;
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x3 = x3 >> 1;
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x4 |= x0;
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x5 |= x1;
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x6 |= x2;
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x7 |= x3;
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x0 = x0 << 1;
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x1 = x1 >> 1;
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x2 = x2 << 1;
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x3 = x3 >> 1;
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x4 |= x0;
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x5 |= x1;
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x6 |= x2;
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x7 |= x3;
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count -= 64;
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}
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return x0 + x1 + x2 + x4 + x5 + x6 + x7;
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}
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static int FetchBandwidthTest2(volatile TESTDATA * memory, int count)
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{
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register TESTDATA x0, x1, x2, x3, x4, x5, x6, x7;
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x0 = memory[0];
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x1 = memory[1];
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x2 = memory[2];
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x3 = memory[3];
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x4 = 0;
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x5 = 0;
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x6 = 0;
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x7 = 0;
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while (count > 0) {
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x0 = x0 << 1;
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x1 = x1 >> 1;
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x2 = x2 << 1;
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x3 = x3 >> 1;
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x4 |= x0;
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x5 |= x1;
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x6 |= x2;
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x7 |= x3;
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x0 = x0 << 1;
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x1 = x1 >> 1;
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x2 = x2 << 1;
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x3 = x3 >> 1;
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x4 |= x0;
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x5 |= x1;
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x6 |= x2;
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x7 |= x3;
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x0 = x0 << 1;
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x1 = x1 >> 1;
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x2 = x2 << 1;
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x3 = x3 >> 1;
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x4 |= x0;
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x5 |= x1;
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x6 |= x2;
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x7 |= x3;
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x0 = x0 << 1;
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x1 = x1 >> 1;
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x2 = x2 << 1;
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x3 = x3 >> 1;
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x4 |= x0;
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x5 |= x1;
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x6 |= x2;
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x7 |= x3;
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count -= 64;
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}
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return x0 + x1 + x2 + x4 + x5 + x6 + x7;
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}
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/**************************************************************************
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Block Read test functions
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**************************************************************************/
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#ifdef STRUCT_COPY
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static int ReadBandwidthTest1(volatile TESTDATAWIDE * memory, int count)
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{
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register TESTSTRUCT x;
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while (count > 0) {
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x = *((volatile TESTSTRUCT *) memory);
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x = *((volatile TESTSTRUCT *) memory);
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x = *((volatile TESTSTRUCT *) memory);
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x = *((volatile TESTSTRUCT *) memory);
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x = *((volatile TESTSTRUCT *) memory);
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x = *((volatile TESTSTRUCT *) memory);
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x = *((volatile TESTSTRUCT *) memory);
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x = *((volatile TESTSTRUCT *) memory);
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memory += 8 * sizeof(TESTSTRUCT) / sizeof(TESTDATA);
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count -= 8 * sizeof(TESTSTRUCT) / sizeof(TESTDATA);
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}
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return (int) memory;
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}
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static int ReadBandwidthTest2(volatile TESTDATA * memory, int count)
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{
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register TESTSTRUCT x;
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while (count > 0) {
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x = *((volatile TESTSTRUCT *) memory);
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x = *((volatile TESTSTRUCT *) memory);
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x = *((volatile TESTSTRUCT *) memory);
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x = *((volatile TESTSTRUCT *) memory);
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memory += 8 * sizeof(TESTSTRUCT) / sizeof(TESTDATA);
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count -= 8 * sizeof(TESTSTRUCT) / sizeof(TESTDATA);
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}
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return (int) memory;
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}
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#else
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static int ReadBandwidthTest1(volatile TESTDATAWIDE * memory, int count)
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{
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register TESTDATAWIDE x0 = 0;
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register TESTDATAWIDE x1 = 0;
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register TESTDATAWIDE x2 = 0;
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register TESTDATAWIDE x3 = 0;
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while (count > 0) {
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x0 = memory[0];
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x1 = memory[1];
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x2 = memory[2];
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x3 = memory[3];
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x0 = memory[4];
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x1 = memory[5];
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x2 = memory[6];
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x3 = memory[7];
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x0 = memory[8];
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x1 = memory[9];
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x2 = memory[10];
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x3 = memory[11];
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x0 = memory[12];
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x1 = memory[13];
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x2 = memory[14];
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x3 = memory[15];
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x0 = memory[16];
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x1 = memory[17];
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x2 = memory[18];
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x3 = memory[19];
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x0 = memory[20];
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x1 = memory[21];
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x2 = memory[22];
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x3 = memory[23];
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x0 = memory[24];
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x1 = memory[25];
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x2 = memory[26];
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x3 = memory[27];
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x0 = memory[28];
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x1 = memory[29];
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x2 = memory[30];
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x3 = memory[31];
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x0 = memory[32];
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x1 = memory[33];
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x2 = memory[34];
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x3 = memory[35];
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x0 = memory[36];
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x1 = memory[37];
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x2 = memory[38];
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x3 = memory[39];
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x0 = memory[40];
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x1 = memory[41];
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x2 = memory[42];
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x3 = memory[43];
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x0 = memory[44];
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x1 = memory[45];
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x2 = memory[46];
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x3 = memory[47];
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x0 = memory[48];
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x1 = memory[49];
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x2 = memory[50];
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x3 = memory[51];
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x0 = memory[52];
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x1 = memory[53];
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x2 = memory[54];
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x3 = memory[55];
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x0 = memory[56];
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x1 = memory[57];
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x2 = memory[58];
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x3 = memory[59];
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x0 = memory[60];
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x1 = memory[61];
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x2 = memory[62];
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x3 = memory[63];
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memory += 64;
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count -= 64;
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}
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return (int) (memory) + count + x0 + x1 + x2 + x3;
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}
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static int ReadBandwidthTest2(volatile TESTDATAWIDE * memory, int count)
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{
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register TESTDATAWIDE x0 = 0;
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register TESTDATAWIDE x1 = 0;
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register TESTDATAWIDE x2 = 0;
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register TESTDATAWIDE x3 = 0;
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while (count > 0) {
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x0 = memory[0];
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x1 = memory[1];
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x2 = memory[2];
|
|
x3 = memory[3];
|
|
x0 = memory[4];
|
|
x1 = memory[5];
|
|
x2 = memory[6];
|
|
x3 = memory[7];
|
|
x0 = memory[8];
|
|
x1 = memory[9];
|
|
x2 = memory[10];
|
|
x3 = memory[11];
|
|
x0 = memory[12];
|
|
x1 = memory[13];
|
|
x2 = memory[14];
|
|
x3 = memory[15];
|
|
x0 = memory[16];
|
|
x1 = memory[17];
|
|
x2 = memory[18];
|
|
x3 = memory[19];
|
|
x0 = memory[20];
|
|
x1 = memory[21];
|
|
x2 = memory[22];
|
|
x3 = memory[23];
|
|
x0 = memory[24];
|
|
x1 = memory[25];
|
|
x2 = memory[26];
|
|
x3 = memory[27];
|
|
x0 = memory[28];
|
|
x1 = memory[29];
|
|
x2 = memory[30];
|
|
x3 = memory[31];
|
|
memory += 64;
|
|
count -= 64;
|
|
}
|
|
|
|
return (int) (memory) + count + x0 + x1 + x2 + x3;
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
/**************************************************************************
|
|
|
|
Block Write test functions
|
|
|
|
**************************************************************************/
|
|
|
|
static int WriteBandwidthTest1(volatile TESTDATAWIDE * memory, int count)
|
|
{
|
|
register TESTDATAWIDE x;
|
|
|
|
x = 0;
|
|
while (count > 0) {
|
|
memory[0] = x;
|
|
memory[1] = x;
|
|
memory[2] = x;
|
|
memory[3] = x;
|
|
memory[4] = x;
|
|
memory[5] = x;
|
|
memory[6] = x;
|
|
memory[7] = x;
|
|
memory[8] = x;
|
|
memory[9] = x;
|
|
memory[10] = x;
|
|
memory[11] = x;
|
|
memory[12] = x;
|
|
memory[13] = x;
|
|
memory[14] = x;
|
|
memory[15] = x;
|
|
memory[16] = x;
|
|
memory[17] = x;
|
|
memory[18] = x;
|
|
memory[19] = x;
|
|
memory[20] = x;
|
|
memory[21] = x;
|
|
memory[22] = x;
|
|
memory[23] = x;
|
|
memory[24] = x;
|
|
memory[25] = x;
|
|
memory[26] = x;
|
|
memory[27] = x;
|
|
memory[28] = x;
|
|
memory[29] = x;
|
|
memory[30] = x;
|
|
memory[31] = x;
|
|
memory[32] = x;
|
|
memory[33] = x;
|
|
memory[34] = x;
|
|
memory[35] = x;
|
|
memory[36] = x;
|
|
memory[37] = x;
|
|
memory[38] = x;
|
|
memory[39] = x;
|
|
memory[40] = x;
|
|
memory[41] = x;
|
|
memory[42] = x;
|
|
memory[43] = x;
|
|
memory[44] = x;
|
|
memory[45] = x;
|
|
memory[46] = x;
|
|
memory[47] = x;
|
|
memory[48] = x;
|
|
memory[49] = x;
|
|
memory[50] = x;
|
|
memory[51] = x;
|
|
memory[52] = x;
|
|
memory[53] = x;
|
|
memory[54] = x;
|
|
memory[55] = x;
|
|
memory[56] = x;
|
|
memory[57] = x;
|
|
memory[58] = x;
|
|
memory[59] = x;
|
|
memory[60] = x;
|
|
memory[61] = x;
|
|
memory[62] = x;
|
|
memory[63] = x;
|
|
memory += 64;
|
|
count -= 64;
|
|
}
|
|
|
|
return (int) memory + x;
|
|
}
|
|
|
|
|
|
static int WriteBandwidthTest2(volatile TESTDATAWIDE * memory, int count)
|
|
{
|
|
register TESTDATAWIDE x;
|
|
|
|
x = 0;
|
|
while (count > 0) {
|
|
memory[0] = x;
|
|
memory[1] = x;
|
|
memory[2] = x;
|
|
memory[3] = x;
|
|
memory[4] = x;
|
|
memory[5] = x;
|
|
memory[6] = x;
|
|
memory[7] = x;
|
|
memory[8] = x;
|
|
memory[9] = x;
|
|
memory[10] = x;
|
|
memory[11] = x;
|
|
memory[12] = x;
|
|
memory[13] = x;
|
|
memory[14] = x;
|
|
memory[15] = x;
|
|
memory[16] = x;
|
|
memory[17] = x;
|
|
memory[18] = x;
|
|
memory[19] = x;
|
|
memory[20] = x;
|
|
memory[21] = x;
|
|
memory[22] = x;
|
|
memory[23] = x;
|
|
memory[24] = x;
|
|
memory[25] = x;
|
|
memory[26] = x;
|
|
memory[27] = x;
|
|
memory[28] = x;
|
|
memory[29] = x;
|
|
memory[30] = x;
|
|
memory[31] = x;
|
|
memory += 64;
|
|
count -= 64;
|
|
}
|
|
|
|
return (int) memory + x;
|
|
}
|
|
|
|
|
|
|
|
/**************************************************************************
|
|
|
|
Block copy test functions
|
|
|
|
**************************************************************************/
|
|
|
|
static int CopyBandwidthTest1(volatile TESTDATAWIDE * memory, int count, int offset)
|
|
{
|
|
register TESTDATAWIDE x0, x1, x2, x3, x4, x5, x6, x7;
|
|
volatile TESTDATAWIDE *memory2;
|
|
|
|
memory2 = memory + offset;
|
|
while (count > 0) {
|
|
x0 = memory[0];
|
|
x1 = memory[1];
|
|
x2 = memory[2];
|
|
x3 = memory[3];
|
|
x4 = memory[4];
|
|
x5 = memory[5];
|
|
x6 = memory[6];
|
|
x7 = memory[7];
|
|
memory2[0] = x0;
|
|
memory2[1] = x1;
|
|
memory2[2] = x2;
|
|
memory2[3] = x3;
|
|
memory2[4] = x4;
|
|
memory2[5] = x5;
|
|
memory2[6] = x6;
|
|
memory2[7] = x7;
|
|
x0 = memory[8];
|
|
x1 = memory[9];
|
|
x2 = memory[10];
|
|
x3 = memory[11];
|
|
x4 = memory[12];
|
|
x5 = memory[13];
|
|
x6 = memory[14];
|
|
x7 = memory[15];
|
|
memory2[8] = x0;
|
|
memory2[9] = x1;
|
|
memory2[10] = x2;
|
|
memory2[11] = x3;
|
|
memory2[12] = x4;
|
|
memory2[13] = x5;
|
|
memory2[14] = x6;
|
|
memory2[15] = x7;
|
|
x0 = memory[16];
|
|
x1 = memory[17];
|
|
x2 = memory[18];
|
|
x3 = memory[19];
|
|
x4 = memory[20];
|
|
x5 = memory[21];
|
|
x6 = memory[22];
|
|
x7 = memory[23];
|
|
memory2[16] = x0;
|
|
memory2[17] = x1;
|
|
memory2[18] = x2;
|
|
memory2[19] = x3;
|
|
memory2[20] = x4;
|
|
memory2[21] = x5;
|
|
memory2[22] = x6;
|
|
memory2[23] = x7;
|
|
x0 = memory[24];
|
|
x1 = memory[25];
|
|
x2 = memory[26];
|
|
x3 = memory[27];
|
|
x4 = memory[28];
|
|
x5 = memory[29];
|
|
x6 = memory[30];
|
|
x7 = memory[31];
|
|
memory2[24] = x0;
|
|
memory2[25] = x1;
|
|
memory2[26] = x2;
|
|
memory2[27] = x3;
|
|
memory2[28] = x4;
|
|
memory2[29] = x5;
|
|
memory2[30] = x6;
|
|
memory2[31] = x7;
|
|
memory += 32;
|
|
count -= 32;
|
|
}
|
|
|
|
return (int) (memory) + (int) memory2 + offset + x0 + x1;
|
|
}
|
|
|
|
|
|
static int CopyBandwidthTest2(volatile TESTDATAWIDE * memory, int count, int offset)
|
|
{
|
|
register TESTDATAWIDE x0, x1, x2, x3, x4, x5, x6, x7;
|
|
volatile TESTDATAWIDE *memory2;
|
|
|
|
memory2 = memory + offset;
|
|
while (count > 0) {
|
|
x0 = memory[0];
|
|
x1 = memory[1];
|
|
x2 = memory[2];
|
|
x3 = memory[3];
|
|
x4 = memory[4];
|
|
x5 = memory[5];
|
|
x6 = memory[6];
|
|
x7 = memory[7];
|
|
memory2[0] = x0;
|
|
memory2[1] = x1;
|
|
memory2[2] = x2;
|
|
memory2[3] = x3;
|
|
memory2[4] = x4;
|
|
memory2[5] = x5;
|
|
memory2[6] = x6;
|
|
memory2[7] = x7;
|
|
x0 = memory[8];
|
|
x1 = memory[9];
|
|
x2 = memory[10];
|
|
x3 = memory[11];
|
|
x4 = memory[12];
|
|
x5 = memory[13];
|
|
x6 = memory[14];
|
|
x7 = memory[15];
|
|
memory2[8] = x0;
|
|
memory2[9] = x1;
|
|
memory2[10] = x2;
|
|
memory2[11] = x3;
|
|
memory2[12] = x4;
|
|
memory2[13] = x5;
|
|
memory2[14] = x6;
|
|
memory2[15] = x7;
|
|
memory += 32;
|
|
count -= 32;
|
|
}
|
|
|
|
return (int) (memory) + (int) memory2 + offset + x0 + x1;
|
|
}
|
|
|
|
|
|
|
|
/**************************************************************************
|
|
|
|
Random Read test functions
|
|
|
|
**************************************************************************/
|
|
|
|
static int ReadRandomTest1(volatile TESTDATA2 * memory, int count)
|
|
{
|
|
register TESTDATA x0 = 0;
|
|
register TESTDATA x1 = 0;
|
|
register TESTDATA x2 = 0;
|
|
register TESTDATA x3 = 0;
|
|
volatile TESTDATA2 *memory2 = memory + count;
|
|
|
|
count /= 2;
|
|
|
|
while (count > 0) {
|
|
memory2 -= 0x200 / sizeof(TESTDATA2);
|
|
x0 = memory[0x000 / sizeof(TESTDATA2)];
|
|
x1 = memory2[0x1ff / sizeof(TESTDATA2)];
|
|
x2 = memory[0x041 / sizeof(TESTDATA2)];
|
|
x3 = memory2[0x1be / sizeof(TESTDATA2)];
|
|
x0 = memory[0x082 / sizeof(TESTDATA2)];
|
|
x1 = memory2[0x17d / sizeof(TESTDATA2)];
|
|
x2 = memory[0x0c3 / sizeof(TESTDATA2)];
|
|
x3 = memory2[0x13c / sizeof(TESTDATA2)];
|
|
x0 = memory[0x104 / sizeof(TESTDATA2)];
|
|
x1 = memory2[0x0fb / sizeof(TESTDATA2)];
|
|
x2 = memory[0x145 / sizeof(TESTDATA2)];
|
|
x3 = memory2[0x0ba / sizeof(TESTDATA2)];
|
|
x0 = memory[0x186 / sizeof(TESTDATA2)];
|
|
x1 = memory2[0x079 / sizeof(TESTDATA2)];
|
|
x2 = memory[0x1c7 / sizeof(TESTDATA2)];
|
|
x3 = memory2[0x038 / sizeof(TESTDATA2)];
|
|
#if CACHE_LINESIZE < 0x40
|
|
x0 = memory[0x020 / sizeof(TESTDATA2)];
|
|
x1 = memory2[0x1df / sizeof(TESTDATA2)];
|
|
x2 = memory[0x061 / sizeof(TESTDATA2)];
|
|
x3 = memory2[0x19e / sizeof(TESTDATA2)];
|
|
x0 = memory[0x0a2 / sizeof(TESTDATA2)];
|
|
x1 = memory2[0x15d / sizeof(TESTDATA2)];
|
|
x2 = memory[0x0e3 / sizeof(TESTDATA2)];
|
|
x3 = memory2[0x11c / sizeof(TESTDATA2)];
|
|
x0 = memory[0x124 / sizeof(TESTDATA2)];
|
|
x1 = memory2[0x0db / sizeof(TESTDATA2)];
|
|
x2 = memory[0x165 / sizeof(TESTDATA2)];
|
|
x3 = memory2[0x09a / sizeof(TESTDATA2)];
|
|
x0 = memory[0x1a6 / sizeof(TESTDATA2)];
|
|
x1 = memory2[0x059 / sizeof(TESTDATA2)];
|
|
x2 = memory[0x1e7 / sizeof(TESTDATA2)];
|
|
x3 = memory2[0x018 / sizeof(TESTDATA2)];
|
|
#endif
|
|
memory += 0x200 / sizeof(TESTDATA2);
|
|
count -= 0x200 / sizeof(TESTDATA2);
|
|
}
|
|
|
|
return (int) memory + count + x0 + x1 + x2 + x3;
|
|
}
|
|
|
|
|
|
static int ReadRandomTest2(volatile TESTDATA2 * memory, int count)
|
|
{
|
|
register TESTDATA x0 = 0;
|
|
register TESTDATA x1 = 0;
|
|
register TESTDATA x2 = 0;
|
|
register TESTDATA x3 = 0;
|
|
volatile TESTDATA2 *memory2 = memory + count;
|
|
|
|
count /= 2;
|
|
|
|
while (count > 0) {
|
|
memory2 -= 0x200 / sizeof(TESTDATA2);
|
|
x0 = memory[0x000 / sizeof(TESTDATA2)];
|
|
x1 = memory2[0x1ff / sizeof(TESTDATA2)];
|
|
x2 = memory[0x041 / sizeof(TESTDATA2)];
|
|
x3 = memory2[0x1be / sizeof(TESTDATA2)];
|
|
x0 = memory[0x082 / sizeof(TESTDATA2)];
|
|
x1 = memory2[0x17d / sizeof(TESTDATA2)];
|
|
x2 = memory[0x0c3 / sizeof(TESTDATA2)];
|
|
x3 = memory2[0x13c / sizeof(TESTDATA2)];
|
|
#if CACHE_LINESIZE < 0x40
|
|
x0 = memory[0x020 / sizeof(TESTDATA2)];
|
|
x1 = memory2[0x1df / sizeof(TESTDATA2)];
|
|
x2 = memory[0x061 / sizeof(TESTDATA2)];
|
|
x3 = memory2[0x19e / sizeof(TESTDATA2)];
|
|
x0 = memory[0x0a2 / sizeof(TESTDATA2)];
|
|
x1 = memory2[0x15d / sizeof(TESTDATA2)];
|
|
x2 = memory[0x0e3 / sizeof(TESTDATA2)];
|
|
x3 = memory2[0x11c / sizeof(TESTDATA2)];
|
|
#endif
|
|
memory += 0x200 / sizeof(TESTDATA2);
|
|
count -= 0x200 / sizeof(TESTDATA2);
|
|
}
|
|
|
|
return (int) memory + count + x0 + x1 + x2 + x3;
|
|
}
|
|
|
|
|
|
/**************************************************************************
|
|
|
|
Random Write test functions
|
|
|
|
**************************************************************************/
|
|
|
|
static int WriteRandomTest1(volatile TESTDATA2 * memory, int count)
|
|
{
|
|
register TESTDATA x0 = 0;
|
|
register TESTDATA x1 = 0;
|
|
register TESTDATA x2 = 0;
|
|
register TESTDATA x3 = 0;
|
|
volatile TESTDATA2 *memory2 = memory + count;
|
|
|
|
count /= 2;
|
|
|
|
while (count > 0) {
|
|
memory2 -= 0x200 / sizeof(TESTDATA2);
|
|
memory[0x000 / sizeof(TESTDATA2)] = x0;
|
|
memory2[0x1ff / sizeof(TESTDATA2)] = x1;
|
|
memory[0x041 / sizeof(TESTDATA2)] = x2;
|
|
memory2[0x1be / sizeof(TESTDATA2)] = x3;
|
|
memory[0x082 / sizeof(TESTDATA2)] = x0;
|
|
memory2[0x17d / sizeof(TESTDATA2)] = x1;
|
|
memory[0x0c3 / sizeof(TESTDATA2)] = x2;
|
|
memory2[0x13c / sizeof(TESTDATA2)] = x3;
|
|
memory[0x104 / sizeof(TESTDATA2)] = x0;
|
|
memory2[0x0fb / sizeof(TESTDATA2)] = x1;
|
|
memory[0x145 / sizeof(TESTDATA2)] = x2;
|
|
memory2[0x0ba / sizeof(TESTDATA2)] = x3;
|
|
memory[0x186 / sizeof(TESTDATA2)] = x0;
|
|
memory2[0x079 / sizeof(TESTDATA2)] = x1;
|
|
memory[0x1c7 / sizeof(TESTDATA2)] = x2;
|
|
memory2[0x038 / sizeof(TESTDATA2)] = x3;
|
|
#if CACHE_LINESIZE < 0x40
|
|
memory[0x020 / sizeof(TESTDATA2)] = x0;
|
|
memory2[0x1df / sizeof(TESTDATA2)] = x1;
|
|
memory[0x061 / sizeof(TESTDATA2)] = x2;
|
|
memory2[0x19e / sizeof(TESTDATA2)] = x3;
|
|
memory[0x0a2 / sizeof(TESTDATA2)] = x0;
|
|
memory2[0x15d / sizeof(TESTDATA2)] = x1;
|
|
memory[0x0e3 / sizeof(TESTDATA2)] = x2;
|
|
memory2[0x11c / sizeof(TESTDATA2)] = x3;
|
|
memory[0x124 / sizeof(TESTDATA2)] = x0;
|
|
memory2[0x0db / sizeof(TESTDATA2)] = x1;
|
|
memory[0x165 / sizeof(TESTDATA2)] = x2;
|
|
memory2[0x09a / sizeof(TESTDATA2)] = x3;
|
|
memory[0x1a6 / sizeof(TESTDATA2)] = x0;
|
|
memory2[0x059 / sizeof(TESTDATA2)] = x1;
|
|
memory[0x1e7 / sizeof(TESTDATA2)] = x2;
|
|
memory2[0x018 / sizeof(TESTDATA2)] = x3;
|
|
#endif
|
|
memory += 0x200 / sizeof(TESTDATA2);
|
|
count -= 0x200 / sizeof(TESTDATA2);
|
|
}
|
|
|
|
return (int) (memory) + x0;
|
|
}
|
|
|
|
static int WriteRandomTest2(volatile TESTDATA2 * memory, int count)
|
|
{
|
|
register TESTDATA x0 = 0;
|
|
register TESTDATA x1 = 0;
|
|
register TESTDATA x2 = 0;
|
|
register TESTDATA x3 = 0;
|
|
volatile TESTDATA2 *memory2 = memory + count;
|
|
|
|
count /= 2;
|
|
|
|
while (count > 0) {
|
|
memory2 -= 0x200 / sizeof(TESTDATA2);
|
|
memory[0x000 / sizeof(TESTDATA2)] = x0;
|
|
memory2[0x1ff / sizeof(TESTDATA2)] = x1;
|
|
memory[0x041 / sizeof(TESTDATA2)] = x2;
|
|
memory2[0x1be / sizeof(TESTDATA2)] = x3;
|
|
memory[0x186 / sizeof(TESTDATA2)] = x0;
|
|
memory2[0x079 / sizeof(TESTDATA2)] = x1;
|
|
memory[0x1c7 / sizeof(TESTDATA2)] = x2;
|
|
memory2[0x038 / sizeof(TESTDATA2)] = x3;
|
|
#if CACHE_LINESIZE < 0x40
|
|
memory[0x020 / sizeof(TESTDATA2)] = x0;
|
|
memory2[0x1df / sizeof(TESTDATA2)] = x1;
|
|
memory[0x061 / sizeof(TESTDATA2)] = x2;
|
|
memory2[0x19e / sizeof(TESTDATA2)] = x3;
|
|
memory[0x0a2 / sizeof(TESTDATA2)] = x0;
|
|
memory2[0x15d / sizeof(TESTDATA2)] = x1;
|
|
memory[0x0e3 / sizeof(TESTDATA2)] = x2;
|
|
memory2[0x11c / sizeof(TESTDATA2)] = x3;
|
|
#endif
|
|
memory += 0x200 / sizeof(TESTDATA2);
|
|
count -= 0x200 / sizeof(TESTDATA2);
|
|
}
|
|
|
|
return (int) (memory) + x0;
|
|
}
|
|
|
|
|
|
|
|
/**************************************************************************
|
|
|
|
Random Copy test functions
|
|
|
|
**************************************************************************/
|
|
|
|
static int CopyRandomTest1(volatile TESTDATA2 * memory, int count, int offset)
|
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{
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register TESTDATA x0 = 0;
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register TESTDATA x1 = 0;
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register TESTDATA x2 = 0;
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register TESTDATA x3 = 0;
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volatile TESTDATA2 *memory2 = memory + offset + count;
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while (count > 0) {
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memory2 -= 0x200 / sizeof(TESTDATA2);
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x0 = memory[0x000 / sizeof(TESTDATA2)];
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memory2[0x1ff / sizeof(TESTDATA2)] = x0;
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x1 = memory[0x041 / sizeof(TESTDATA2)];
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memory2[0x1be / sizeof(TESTDATA2)] = x1;
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x2 = memory[0x082 / sizeof(TESTDATA2)];
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memory2[0x17d / sizeof(TESTDATA2)] = x2;
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x3 = memory[0x0c3 / sizeof(TESTDATA2)];
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memory2[0x13c / sizeof(TESTDATA2)] = x3;
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x0 = memory[0x104 / sizeof(TESTDATA2)];
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memory2[0x0fb / sizeof(TESTDATA2)] = x0;
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x1 = memory[0x145 / sizeof(TESTDATA2)];
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memory2[0x0ba / sizeof(TESTDATA2)] = x1;
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x2 = memory[0x186 / sizeof(TESTDATA2)];
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memory2[0x079 / sizeof(TESTDATA2)] = x2;
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x3 = memory[0x1c7 / sizeof(TESTDATA2)];
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memory2[0x038 / sizeof(TESTDATA2)] = x3;
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#if CACHE_LINESIZE < 0x40
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x0 = memory[0x020 / sizeof(TESTDATA2)];
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memory2[0x1df / sizeof(TESTDATA2)] = x0;
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x1 = memory[0x061 / sizeof(TESTDATA2)];
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memory2[0x19e / sizeof(TESTDATA2)] = x1;
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x2 = memory[0x0a2 / sizeof(TESTDATA2)];
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memory2[0x15d / sizeof(TESTDATA2)] = x2;
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x3 = memory[0x0e3 / sizeof(TESTDATA2)];
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memory2[0x11c / sizeof(TESTDATA2)] = x3;
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x0 = memory[0x124 / sizeof(TESTDATA2)];
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memory2[0x0db / sizeof(TESTDATA2)] = x0;
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x1 = memory[0x165 / sizeof(TESTDATA2)];
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memory2[0x09a / sizeof(TESTDATA2)] = x1;
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x2 = memory[0x1a6 / sizeof(TESTDATA2)];
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memory2[0x059 / sizeof(TESTDATA2)] = x2;
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x3 = memory[0x1e7 / sizeof(TESTDATA2)];
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memory2[0x018 / sizeof(TESTDATA2)] = x3;
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#endif
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memory += 0x200 / sizeof(TESTDATA2);
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count -= 0x200 / sizeof(TESTDATA2);
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}
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return (int) memory + (int) memory2 + count + x0 + x1 + x2 + x3;
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}
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static int CopyRandomTest2(volatile TESTDATA2 * memory, int count, int offset)
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{
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register TESTDATA x0 = 0;
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register TESTDATA x1 = 0;
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register TESTDATA x2 = 0;
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register TESTDATA x3 = 0;
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volatile TESTDATA2 *memory2 = memory + offset + count;
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while (count > 0) {
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memory2 -= 0x200 / sizeof(TESTDATA2);
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x0 = memory[0x000 / sizeof(TESTDATA2)];
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memory2[0x1ff / sizeof(TESTDATA2)] = x0;
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x1 = memory[0x041 / sizeof(TESTDATA2)];
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memory2[0x1be / sizeof(TESTDATA2)] = x1;
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x2 = memory[0x186 / sizeof(TESTDATA2)];
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memory2[0x079 / sizeof(TESTDATA2)] = x2;
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x3 = memory[0x1c7 / sizeof(TESTDATA2)];
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memory2[0x038 / sizeof(TESTDATA2)] = x3;
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#if CACHE_LINESIZE < 0x40
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x0 = memory[0x020 / sizeof(TESTDATA2)];
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memory2[0x1df / sizeof(TESTDATA2)] = x0;
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x1 = memory[0x061 / sizeof(TESTDATA2)];
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memory2[0x19e / sizeof(TESTDATA2)] = x1;
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x2 = memory[0x0a2 / sizeof(TESTDATA2)];
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memory2[0x15d / sizeof(TESTDATA2)] = x2;
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x3 = memory[0x0e3 / sizeof(TESTDATA2)];
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memory2[0x11c / sizeof(TESTDATA2)] = x3;
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#endif
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memory += 0x200 / sizeof(TESTDATA2);
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count -= 0x200 / sizeof(TESTDATA2);
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}
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return (int) memory + (int) memory2 + count + x0 + x1 + x2 + x3;
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}
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/**************************************************************************
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Read Latency test functions
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Latency is determined by comparing the runtime of a function
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with a memory access with the same function without memory access.
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Near/Far latency is meassured by two function sets.
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The symmetry of the two functions is very critical.
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**************************************************************************/
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static int ReadLatencyTestNear1(volatile TESTDATA2 * memory, int count, int latencymax, int offset)
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{
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int i;
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register TESTDATA x, x0, x1, x2, x3;
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volatile TESTDATA2 *memory2 = memory + count;
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x0 = 1;
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x1 = offset;
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x2 = count;
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x3 = latencymax;
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while (count > 0) {
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x = memory[0];
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x0 |= x;
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if (!x0) {
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x1 = x1 >> 1;
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x2 = x2 << 1;
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x0 |= x1 | x2;
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}
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if (offset) {
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for (i = 0; i < latencymax; i++) {
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x1 = x1 >> 1;
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x2 = x2 << 1;
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x0 |= x1 | x2;
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}
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}
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memory += offset;
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count -= offset;
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}
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return (int) memory + (int) memory2 + x0 + x1 + x2 + x3 + offset;
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}
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static int ReadLatencyTestNear2(volatile TESTDATA2 * memory, int count, int latencymax, int offset)
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{
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int i;
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register TESTDATA x, x0, x1, x2, x3;
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volatile TESTDATA2 *memory2 = memory + count;
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x0 = 1;
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x1 = offset;
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x2 = count;
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x3 = latencymax;
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while (count > 0) {
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x = (int) memory + x0;
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x0 |= x;
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if (!x0) {
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x1 = x1 >> 1;
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x2 = x2 << 1;
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x0 |= x1 | x2;
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}
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if (offset) {
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for (i = 0; i < latencymax; i++) {
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x1 = x1 >> 1;
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x2 = x2 << 1;
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x0 |= x1 | x2;
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}
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}
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memory += offset;
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count -= offset;
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}
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return (int) memory + (int) memory2 + x0 + x1 + x2 + x3 + offset;
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}
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static int ReadLatencyTestFar1(volatile TESTDATA2 * memory, int count, int latencymax, int offset)
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{
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int i;
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register TESTDATA x, x0, x1, x2, x3;
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volatile TESTDATA2 *memory2 = memory + count - offset;
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x = 0;
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x0 = 1;
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x1 = offset;
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x2 = count;
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x3 = latencymax;
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count /= 2;
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while (count > 0) {
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x = memory[0];
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x0 |= x;
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if (!x0) {
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x1 = x1 >> 1;
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x2 = x2 << 1;
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x0 |= x1 | x2;
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}
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if (offset) {
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for (i = 0; i < latencymax; i++) {
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x1 = x1 >> 1;
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x2 = x2 << 1;
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x0 |= x1 | x2;
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}
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}
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x = memory2[0];
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x0 |= x;
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if (!x0) {
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x1 = x1 >> 1;
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x2 = x2 << 1;
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x0 |= x1 | x2;
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}
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if (offset) {
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for (i = 0; i < latencymax; i++) {
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x1 = x1 >> 1;
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x2 = x2 << 1;
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x0 |= x1 | x2;
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}
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}
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memory += offset;
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memory2 -= offset;
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count -= offset;
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}
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return (int) memory + (int) memory2 + x + x0 + x1 + x2;
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}
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static int ReadLatencyTestFar2(volatile TESTDATA2 * memory, int count, int latencymax, int offset)
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{
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int i;
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register TESTDATA x, x0, x1, x2, x3;
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volatile TESTDATA2 *memory2 = memory + count - offset;
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x = 0;
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x0 = 1;
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x1 = offset;
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x2 = count;
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x3 = latencymax;
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count /= 2;
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while (count > 0) {
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x = (int) memory + x0;
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x0 |= x;
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if (!x0) {
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x1 = x1 >> 1;
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x2 = x2 << 1;
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x0 |= x1 | x2;
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}
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if (offset) {
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for (i = 0; i < latencymax; i++) {
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x1 = x1 >> 1;
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x2 = x2 << 1;
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x0 |= x1 | x2;
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}
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}
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x = (int) memory2 + x0;
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x0 |= x;
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if (!x0) {
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x1 = x1 >> 1;
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x2 = x2 << 1;
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x0 |= x1 | x2;
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}
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if (offset) {
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for (i = 0; i < latencymax; i++) {
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x1 = x1 >> 1;
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x2 = x2 << 1;
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x0 |= x1 | x2;
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}
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}
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memory += offset;
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memory2 -= offset;
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|
count -= offset;
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}
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return (int) memory + (int) memory2 + x + x0 + x1 + x2;
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}
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