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Gen4_R-Car_Trace32/2_Trunk/pers3c44.per
woody d411edd9b4 add Trace32 File
2025-10-14 09:52:32 +09:00

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; --------------------------------------------------------------------------------
; @Title: tbd.
; @Props:
; @Author: -
; @Changelog:
; @Manufacturer:
; @Doc:
; @Core:
; @Chip:
; @Copyright: (C) 1989-2014 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: pers3c44.per 12685 2020-12-22 12:37:17Z pegold $
config 16. 8.
width 8.
tree "Memory Controller"
group ad:0x01C80000++3
line.long 0x0 "BWSCON,Bus Width & Wait Status Control Register"
bitfld.long 0x0 31. "ST7 ,Determines SRAM for using UB/LB for bank 7" "No,Yes"
bitfld.long 0x0 30. " WS7 ,Wait status for bank 7" "No,Yes"
bitfld.long 0x0 28.--29. " DW7 ,Determines SRAM for using UB/LB for bank 6" "8-bit, 16-bit, 32-bit,-"
bitfld.long 0x0 27. " ST6 ,Determines SRAM for using UB/LB for bank 6" "No,Yes"
bitfld.long 0x0 26. " WS6 ,Determines WAIT status for bank 6" "No,Yes"
bitfld.long 0x0 24.--25. " DW6 ,Determines data bus width for bank 6" "8-bit, 16-bit, 32-bit,?..."
textline " "
bitfld.long 0x0 23. " ST5 ,Determines SRAM for using UB/LB for bank 5" "No,Yes"
bitfld.long 0x0 22. " WS5 , Determines WAIT status for bank 5" "Dis,Ena"
bitfld.long 0x0 20.--21. " DW5 ,Determines data bus width for bank 5" "8-bit, 16-bit, 32-bit,?..."
bitfld.long 0x0 19. " ST4 ,Determines SRAM for using UB/LB for bank 4" "No,Yes"
bitfld.long 0x0 18. " WS4 ,Determines WAIT status for bank 4" "No,Yes"
bitfld.long 0x0 16.--17. " DW4 ,Determines data bus width for bank 4" "8-bit, 16-bit, 32-bit,?..."
textline " "
bitfld.long 0x0 15. " ST3 ,Determines SRAM for using UB/LB for bank3" "No,Yes"
bitfld.long 0x0 14. " WS3 ,Determines WAIT status for bank 3" "Dis,Ena"
bitfld.long 0x0 12.--13. " DW3 ,Determines data bus width for bank 3" "8-bit, 16-bit, 32-bit,?..."
bitfld.long 0x0 11. " ST2 ,Determines SRAM for using UB/LB for bank 2" "No,Yes"
bitfld.long 0x0 10. " WS2 ,Determines WAIT status for bank 2" "Dis,Ena"
bitfld.long 0x0 8.--9. " DW2 ,Determines data bus width for bank 2" "8-bit, 16-bit, 32-bit,?..."
textline " "
bitfld.long 0x0 7. " ST1 ,Determines SRAM for using UB/LB for bank 1" "No,Yes"
bitfld.long 0x0 6. " WS1 ,Determines WAIT status for bank 1" "Dis,Ena"
bitfld.long 0x0 4.--5. " DW1 ,Determines data bus width for bank 1" "8-bit, 16-bit, 32-bit,?..."
bitfld.long 0x0 1.--2. " DW0 ,Indicates data bus width for bank 0 (read only)" "8-bit, 16-bit, 32-bit,?..."
bitfld.long 0x0 0. " ENDIAN ,Indicates endian mode (read only)" "Little,Big"
group ad:0x01C80004++3
line.long 0x0 "BANKCO0,Bank 0 control register"
bitfld.long 0x0 13.--14. "Tacs ,Address set-up before nGCSn" "0 clock,1 clock,2 clocks,4 clocks"
bitfld.long 0x0 11.--12. " Tcos ,Chip selection set-up nOE" "0 clock,1 clock,2 clocks,4 clocks"
bitfld.long 0x0 8.--10. " Tacc ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,6 clocks,8 clocks,10 clocks,14 clocks"
bitfld.long 0x0 6.--7. " Toch ,Chip selection hold on nOE" "0 clock,1 clock,2 clocks,4 clocks"
textline " "
bitfld.long 0x0 4.--5. " Tcah ,Address holding time after nGCSn" "0 clock,1 clock,2 clocks,4 clocks"
bitfld.long 0x0 2.--3. " Tpac ,Page mode access cycle @ Page mode" "2 clock,3 clock,4 clocks,6 clocks"
bitfld.long 0x0 0.--1. " PMC ,Page mode configuration" "1 data,4 data,8 data,16 data"
group ad:0x01C80008++3
line.long 0x0 "BANKCO1,Bank 1 control register"
bitfld.long 0x0 13.--14. "Tacs ,Address set-up before nGCSn" "0 clock,1 clock,2 clocks,4 clocks"
bitfld.long 0x0 11.--12. " Tcos ,Chip selection set-up nOE" "0 clock,1 clock,2 clocks,4 clocks"
bitfld.long 0x0 8.--10. " Tacc ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,6 clocks,8 clocks,10 clocks,14 clocks"
bitfld.long 0x0 6.--7. " Toch ,Chip selection hold on nOE" "0 clock,1 clock,2 clocks,4 clocks"
textline " "
bitfld.long 0x0 4.--5. " Tcah ,Address holding time after nGCSn" "0 clock,1 clock,2 clocks,4 clocks"
bitfld.long 0x0 2.--3. " Tpac ,Page mode access cycle @ Page mode" "2 clock,3 clock,4 clocks,6 clocks"
bitfld.long 0x0 0.--1. " PMC ,Page mode configuration" "1 data,4 data,8 data,16 data"
group ad:0x01C8000C++3
line.long 0x0 "BANKCO2,Bank 2 control register"
bitfld.long 0x0 13.--14. "Tacs ,Address set-up before nGCSn" "0 clock,1 clock,2 clocks,4 clocks"
bitfld.long 0x0 11.--12. " Tcos ,Chip selection set-up nOE" "0 clock,1 clock,2 clocks,4 clocks"
bitfld.long 0x0 8.--10. " Tacc ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,6 clocks,8 clocks,10 clocks,14 clocks"
bitfld.long 0x0 6.--7. " Toch ,Chip selection hold on nOE" "0 clock,1 clock,2 clocks,4 clocks"
textline " "
bitfld.long 0x0 4.--5. " Tcah ,Address holding time after nGCSn" "0 clock,1 clock,2 clocks,4 clocks"
bitfld.long 0x0 2.--3. " Tpac ,Page mode access cycle @ Page mode" "2 clock,3 clock,4 clocks,6 clocks"
bitfld.long 0x0 0.--1. " PMC ,Page mode configuration" "1 data,4 data,8 data,16 data"
group ad:0x01C80010++3
line.long 0x0 "BANKCO3,Bank 3 control register"
bitfld.long 0x0 13.--14. "Tacs ,Address set-up before nGCSn" "0 clock,1 clock,2 clocks,4 clocks"
bitfld.long 0x0 11.--12. " Tcos ,Chip selection set-up nOE" "0 clock,1 clock,2 clocks,4 clocks"
bitfld.long 0x0 8.--10. " Tacc ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,6 clocks,8 clocks,10 clocks,14 clocks"
bitfld.long 0x0 6.--7. " Toch ,Chip selection hold on nOE" "0 clock,1 clock,2 clocks,4 clocks"
textline " "
bitfld.long 0x0 4.--5. " Tcah ,Address holding time after nGCSn" "0 clock,1 clock,2 clocks,4 clocks"
bitfld.long 0x0 2.--3. " Tpac ,Page mode access cycle @ Page mode" "2 clock,3 clock,4 clocks,6 clocks"
bitfld.long 0x0 0.--1. " PMC ,Page mode configuration" "1 data,4 data,8 data,16 data"
group ad:0x01C80014++3
line.long 0x0 "BANKCO4,Bank 4 control register"
bitfld.long 0x0 13.--14. "Tacs ,Address set-up before nGCSn" "0 clock,1 clock,2 clocks,4 clocks"
bitfld.long 0x0 11.--12. " Tcos ,Chip selection set-up nOE" "0 clock,1 clock,2 clocks,4 clocks"
bitfld.long 0x0 8.--10. " Tacc ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,6 clocks,8 clocks,10 clocks,14 clocks"
bitfld.long 0x0 6.--7. " Toch ,Chip selection hold on nOE" "0 clock,1 clock,2 clocks,4 clocks"
textline " "
bitfld.long 0x0 4.--5. " Tcah ,Address holding time after nGCSn" "0 clock,1 clock,2 clocks,4 clocks"
bitfld.long 0x0 2.--3. " Tpac ,Page mode access cycle @ Page mode" "2 clock,3 clock,4 clocks,6 clocks"
bitfld.long 0x0 0.--1. " PMC ,Page mode configuration" "1 data,4 data,8 data,16 data"
group ad:0x01C80018++3
line.long 0x0 "BANKCO5,Bank 5 control register"
bitfld.long 0x0 13.--14. "Tacs ,Address set-up before nGCSn" "0 clock,1 clock,2 clocks,4 clocks"
bitfld.long 0x0 11.--12. " Tcos ,Chip selection set-up nOE" "0 clock,1 clock,2 clocks,4 clocks"
bitfld.long 0x0 8.--10. " Tacc ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,6 clocks,8 clocks,10 clocks,14 clocks"
bitfld.long 0x0 6.--7. " Toch ,Chip selection hold on nOE" "0 clock,1 clock,2 clocks,4 clocks"
textline " "
bitfld.long 0x0 4.--5. " Tcah ,Address holding time after nGCSn" "0 clock,1 clock,2 clocks,4 clocks"
bitfld.long 0x0 2.--3. " Tpac ,Page mode access cycle @ Page mode" "2 clock,3 clock,4 clocks,6 clocks"
bitfld.long 0x0 0.--1. " PMC ,Page mode configuration" "1 data,4 data,8 data,16 data"
if (d.l(d:0x01C8001C)&0x00018000)==0x0
group ad:0x01C8001C++3
line.long 0x0 "BANKCO6,Bank 6 control register"
bitfld.long 0x0 15.--16. "MT , Determine the memory type for bank 6" "ROMorSRAM,FPDRAM,EDODRAM,SyncDRAM"
textline " "
bitfld.long 0x0 13.--14. "Tacs ,Address set-up before nGCSn" "0 clock,1 clock,2 clocks,4 clocks"
bitfld.long 0x0 11.--12. " Tcos ,Chip selection set-up nOE" "0 clock,1 clock,2 clocks,4 clocks"
bitfld.long 0x0 8.--10. " Tacc ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,6 clocks,8 clocks,10 clocks,14 clocks"
bitfld.long 0x0 6.--7. "Toch ,Chip selection hold on nOE" "0 clock,1 clock,2 clocks,4 clocks"
textline " "
bitfld.long 0x0 4.--5. " Tcah ,Address holding time after nGCSn" "0 clock,1 clock,2 clocks,4 clocks"
bitfld.long 0x0 2.--3. " Tpac ,Page mode access cycle @ Page mode" "2 clock,3 clock,4 clocks,6 clocks"
bitfld.long 0x0 0.--1. " PMC ,Page mode configuration" "1 data,4 data,8 data,16 data"
elif (d.l(d:0x01C8001C)&0x00008000)==0x8000
group ad:0x01C8001C++3
line.long 0x0 "BANKCO6,Bank 6 control register"
bitfld.long 0x0 15.--16. "MT , Determine the memory type for bank 6" "ROMorSRAM,FPDRAM,EDODRAM,SyncDRAM"
textline " "
bitfld.long 0x0 4.--5. "Trcd ,RAS to CAS delay" "1 clock,2 clocks, 3 clocks,4 clocks"
bitfld.long 0x0 3. " Tcas ,CAS pulse width" "1 clock,2 clocks"
bitfld.long 0x0 2. " Tcp ,CAS pre-charge" "1 clock,2 clocks"
bitfld.long 0x0 0.--1. " CAN ,Column address number" "8-bit,9-bit,10-bit,11-bit"
elif (d.l(d:0x01C8001C)&0x00010000)==0x10000
group ad:0x01C8001C++3
line.long 0x0 "BANKCO6,Bank 6 control register"
bitfld.long 0x0 15.--16. "MT , Determine the memory type for bank 6" "ROMorSRAM,FPDRAM,EDODRAM,SyncDRAM"
textline " "
bitfld.long 0x0 4.--5. "Trcd ,RAS to CAS delay" "1 clock,2 clocks, 3 clocks,4 clocks"
bitfld.long 0x0 3. " Tcas ,CAS pulse width" "1 clock,2 clocks"
bitfld.long 0x0 2. " Tcp ,CAS pre-charge" "1 clock,2 clocks"
bitfld.long 0x0 0.--1. " CAN ,Column address number" "8-bit,9-bit,10-bit,11-bit"
else
group ad:0x1C8001C++3
line.long 0x0 "BANKCO6,Bank 6 control register"
bitfld.long 0x0 15.--16. "MT , Determine the memory type for bank 6" "ROMorSRAM,FPDRAM,EDODRAM,SyncDRAM"
textline " "
bitfld.long 0x0 2.--3. "Trcd, RAS to CAS delay" "2 clocks,3 clocks,4 clocks,?..."
bitfld.long 0x0 0.--1. "SCAN, Column address number" "8-bit,9-bit,10-bit,?..."
endif
if (d.l(d:0x01C8001C)&0x00018000)==0x0
group ad:0x01C8001C++3
line.long 0x0 "BANKCO7,Bank 7 control register"
bitfld.long 0x0 15.--16. "MT , Determine the memory type for bank 7" "ROMorSRAM,FPDRAM,EDODRAM,SyncDRAM"
textline " "
bitfld.long 0x0 13.--14. "Tacs ,Address set-up before nGCSn" "0 clock,1 clock,2 clocks,4 clocks"
bitfld.long 0x0 11.--12. " Tcos ,Chip selection set-up nOE" "0 clock,1 clock,2 clocks,4 clocks"
bitfld.long 0x0 8.--10. " Tacc ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,6 clocks,8 clocks,10 clocks,14 clocks"
bitfld.long 0x0 6.--7. "Toch ,Chip selection hold on nOE" "0 clock,1 clock,2 clocks,4 clocks"
textline " "
bitfld.long 0x0 4.--5. " Tcah ,Address holding time after nGCSn" "0 clock,1 clock,2 clocks,4 clocks"
bitfld.long 0x0 2.--3. " Tpac ,Page mode access cycle @ Page mode" "2 clock,3 clock,4 clocks,6 clocks"
bitfld.long 0x0 0.--1. " PMC ,Page mode configuration" "1 data,4 data,8 data,16 data"
elif (d.l(d:0x01C8001C)&0x00008000)==0x8000
group ad:0x01C8001C++3
line.long 0x0 "BANKCO7,Bank 7 control register"
bitfld.long 0x0 15.--16. "MT , Determine the memory type for bank 7" "ROMorSRAM,FPDRAM,EDODRAM,SyncDRAM"
textline " "
bitfld.long 0x0 4.--5. "Trcd ,RAS to CAS delay" "1 clock,2 clocks,3 clocks,4 clocks"
bitfld.long 0x0 3. " Tcas ,CAS pulse width" "1 clock,2 clocks"
bitfld.long 0x0 2. " Tcp ,CAS pre-charge" "1 clock,2 clocks"
bitfld.long 0x0 0.--1. " CAN ,Column address number" "8-bit,9-bit,10-bit,11-bit"
elif (d.l(d:0x01C8001C)&0x00010000)==0x10000
group ad:0x01C8001C++3
line.long 0x0 "BANKCO7,Bank 7 control register"
bitfld.long 0x0 15.--16. "MT , Determine the memory type for bank 7" "ROMorSRAM,FPDRAM,EDODRAM,SyncDRAM"
textline " "
bitfld.long 0x0 4.--5. "Trcd ,RAS to CAS delay" "1 clock,2 clocks, 3 clocks,4 clocks"
bitfld.long 0x0 3. " Tcas ,CAS pulse width" "1 clock,2 clocks"
bitfld.long 0x0 2. " Tcp ,CAS pre-charge" "1 clock,2 clocks"
bitfld.long 0x0 0.--1. " CAN ,Column address number" "8-bit,9-bit,10-bit,11-bit"
else
group ad:0x1C8001C++3
line.long 0x0 "BANKCO7,Bank 7 control register"
bitfld.long 0x0 15.--16. "MT , Determine the memory type for bank 7" "ROMorSRAM,FPDRAM,EDODRAM,SyncDRAM"
textline " "
bitfld.long 0x0 2.--3. "Trcd, RAS to CAS delay" "2 clocks,3 clocks,4 clocks,?..."
bitfld.long 0x0 0.--1. "SCAN, Column address number" "8-bit,9-bit,10-bit,?..."
endif
group ad:0x01C80024++3
line.long 0x0 "REFRESH ,DRAM/SDRAM refresh control register"
bitfld.long 0x0 23. "REFEN ,DRAM/SDRAM Refresh Enable" "Dis,Ena"
bitfld.long 0x0 22. " TREFMD ,DRAM/SDRAM Refresh Mode" "CBR/Auto,Self"
bitfld.long 0x0 20.--21. " Trp ,DRAM/SDRAM RAS pre-charge time" "1.5 clocks,2.5 clocks,3.5 clocks,4.5 clocks"
bitfld.long 0x0 18.--19. " Trc ,SDRAM RC minimum time" "4 clocks,5 clocks,6 clocks,7 clocks"
textline " "
bitfld.long 0x0 16.--17. " Tchr ,CAS Hold Time(DRAM)" "1 clock,2 clocks,3 clocks,4 clocks"
hexmask.long.word 0x0 0.--10. 1. " RFRCNT ,DRAM/SDRAMrefresh count value"
group ad:0x01C80028++3
line.long 0x0 "BANKSIZE, Flexible bank size register"
bitfld.long 0x0 4. "SCLK , System clock setting" "Normal,Reduced"
bitfld.long 0x0 0.--2. " BK76MAP ,Bank6/7 memory map" "32M/32M,001,010,011,2M/2M,4M/4M,8M/8M,16M/16M"
group ad:0x01C8002C++3
line.long 0x0 "MRSRB6, Mode register set register bank6"
bitfld.long 0x0 9. "WBL ,Write burst length" "0,1"
bitfld.long 0x0 7.--8. " TM ,Test mode" "Set,-,-,-"
bitfld.long 0x0 4.--6. " CL ,CAS latency" "1 clock,001,2 clocks,3 clocks,100,101,110,111"
bitfld.long 0x0 3. " BT ,Burst type" "Seq,N/A"
bitfld.long 0x0 0.--2. " BL ,Burst length" "1,N/A,N/A,N/A,N/A,N/A,N/A,N/A"
group ad:0x01C80030++3
line.long 0x0 "MRSRB7, Mode register set register bank7"
bitfld.long 0x0 9. "WBL ,Write burst length" "0,1"
bitfld.long 0x0 7.--8. " TM ,Test mode" "Set,-,-,-"
bitfld.long 0x0 4.--6. " CL ,CAS latency" "1 clock,-,2 clocks,3 clocks,-,-,-,-"
bitfld.long 0x0 3. " BT ,Burst type" "Seq,N/A"
bitfld.long 0x0 0.--2. " BL ,Burst length" "1,N/A,N/A,N/A,N/A,N/A,N/A,N/A"
tree.end
tree "Clock Generator & Power Management Special Registers"
group ad:0x01D80000++3
line.long 0x0 "PLLCON, PLL configuration register"
hexmask.long.byte 0x0 12.--19. 1. "MDIV ,Main divider control"
hexmask.long.byte 0x0 4.--9. 1. " PDIV ,Pre divider control"
bitfld.long 0x0 0.--1. " SDIV ,Post divider control" "00,01,10,11"
group ad:0x01D80004++3
line.long 0x0 "CLKCON, Clock generator control Register"
bitfld.long 0x0 14. "IIS ,Controls MCLK into IIS block" "Dis,Ena"
bitfld.long 0x0 13. " IIC ,Controls MCLK into IIC block" "Dis,Ena"
bitfld.long 0x0 12. " ADC ,Controls MCLK into ADC block" "Dis,Ena"
bitfld.long 0x0 11. " RTC ,Controls MCLK into RTC block" "Dis,Ena"
bitfld.long 0x0 10. " GPIO ,Controls MCLK into GPIO block" "Dis,Ena"
bitfld.long 0x0 9. " UART1 ,Controls MCLK into UART1 block" "Dis,Ena"
textline " "
bitfld.long 0x0 8. "UART0 ,Controls MCLK into UART0 block" "Dis,Ena"
bitfld.long 0x0 7. " BDMA0/1 ,Controls MCLK into BDMA block" "Dis,Ena"
bitfld.long 0x0 6. " LCDC ,Controls MCLK into LCDC block" "Dis,Ena"
bitfld.long 0x0 5. " SIO ,Controls MCLK into SIO block" "Dis,Ena"
bitfld.long 0x0 4. " ZDMA0/1 ,Controls MCLK into ZDMA block" "Dis,Ena"
textline " "
bitfld.long 0x0 3. "PWMTIMER ,Controls MCLK into PWMTIMER block" "Dis,Ena"
bitfld.long 0x0 2. " IDLEBIT , Enters IDLE mode" "Dis,IDLE"
bitfld.long 0x0 1. " SL_IDLE , SL_IDLE mode option" "Dis,SL_IDLE"
bitfld.long 0x0 0. " STOP_BIT , Enters STOP mode" "Dis,STOP"
group ad:0x01D80008++3
line.long 0x0 "CLKSLOW,Slow clock control register"
bitfld.long 0x0 5. "PLL_OFF ,PLL on/off" "On,Off"
bitfld.long 0x0 4. " SLOW_BIT ,Slowing bit" "PLL,SLOW_VAL"
hexmask.long.byte 0x0 0.--3. 1. " SLOW_VAL ,Divider value for the slow clock"
group ad:0x01D8000C++3
line.long 0x0 "LOCKTIME, PLL lock time count register"
hexmask.long.word 0x0 0.--11. 1. "LTIME CNT ,PLL lock time count value"
tree.end
tree "CPU Wrapper Special Registers"
group ad:0x01C00000++3
line.long 0x0 "SYSCFG,System Cofiguration Register"
bitfld.long 0x0 5. " DA ,DATA ABORT controls" "Ena,Dis"
bitfld.long 0x0 4. " RSE ,Enable read stall option" "Ena,Dis"
bitfld.long 0x0 3. " WE ,Write buffer enable/disable" "Dis,Ena"
bitfld.long 0x0 1.--2. " CM ,Cache mode" "Dis,Half,RSRVD,Full"
bitfld.long 0x0 0. " SE , Stall option" "Dis,Ena"
group ad:0x01C00004++3
line.long 0x0 "NCACHBE0,Start address & end address of non-cacheable area 0"
hexmask.long.word 0x0 16.--31. 1. "SE0 ,End address of non-cacheable area 0"
hexmask.long.word 0x0 0.--15. 1. " SA0 ,Start address of non-cacheable area 0"
group ad:0x01C00008++3
line.long 0x0 "NCACHBE1,Start address & end address of non-cacheable area 1"
hexmask.long.word 0x0 16.--31. 1. "SE1 ,End address of non-cacheable area 1"
hexmask.long.word 0x0 0.--15. 1. " SA1 ,Start address of non-cacheable area 1"
tree.end
tree "Bus Priority Special Register"
group ad:0x01C40000++3
line.long 0x0 "SBUSCON,Determines the bus priorities among the bus masters"
bitfld.long 0x0 31. "FIX , Priorities" "rnd-rob,fixed"
bitfld.long 0x0 14.--15. " S_LCD_DMA ,LCD_DMA bus priority" "1st,2nd,3rd,4th"
bitfld.long 0x0 12.--13. " S_ZDMA ,ZDMA bus priority" "1st,2nd,3rd,4th"
bitfld.long 0x0 10.--11. " S_BDMA ,BDMA bus priority" "1st,2nd,3rd,4th"
textline " "
bitfld.long 0x0 8.--9. "S_nBREQ ,S_nBREQ bus priority" "1st,2nd,3rd,4th"
bitfld.long 0x0 6.--7. " LCD_DMA ,LCD_DMA bus priority" "1st,2nd,3rd,4th"
bitfld.long 0x0 4.--5. " ZDMA ,ZDMA bus priority" "1st,2nd,3rd,4th"
bitfld.long 0x0 2.--3. " BDMA ,BDMA bus priority" "1st,2nd,3rd,4th"
bitfld.long 0x0 0.--1. " nBREQ ,nBREQ bus priority" "1st,2nd,3rd,4th"
tree.end
tree "Direct Memory Access (DMA) Special Registers"
group ad:0x01E80000++3
line.long 0x0 "ZDCON0,ZDMA 0 Control Register"
bitfld.long 0x0 6.--7. "INT , Reserved" "00,01,10,11"
bitfld.long 0x0 4.--5. " STE ,Status of DMA channel" "Ready,Not TC,TermCnt,N/A"
bitfld.long 0x0 2.--3. " QDS ,External DMA request" "Ena,Dis,?..."
bitfld.long 0x0 0.--1. " CMD ,Software commands" "NoCMD,DMAStart,DMAPSE,DMACNCL"
group ad:0x01E80020++3
line.long 0x0 "ZDCON1,ZDMA 1 Control Register"
bitfld.long 0x0 6.--7. "INT , Reserved" "00,01,10,11"
bitfld.long 0x0 4.--5. " STE ,Status of DMA channel" "Ready,Not TC,TermCnt,N/A"
bitfld.long 0x0 2.--3. " QDS ,External DMA request" "Ena,Dis,?..."
bitfld.long 0x0 0.--1. " CMD ,Software commands" "NoCMD,DMAStart,DMAPSE,DMACNCL"
;ZDMA initial source and destination registers and current source and destination registers
group ad:0x01E80004++3
line.long 0x0 "ZDISRC0 ,ZDMA 0 initial source address"
bitfld.long 0x0 30.--31. "DST ,Data size for transfer" "Byte,HlfWrd,Word,NtUsd"
bitfld.long 0x0 28.--29. " DAL ,Direction of address for load" "N/A,Inc,Dec,Fix"
hexmask.long 0x0 0.--27. 1. " ISADDR ,Initial source address"
group ad:0x01E80008++3
line.long 0x0 "ZDIDEX0 ,ZDMA 0 initial destination address"
bitfld.long 0x0 30.--31. "OPT ,DMA internal options" "00,01,10,11"
bitfld.long 0x0 28.--29. " DAS ,Direction of address to store" "N/A,Inc,Dec,Fix"
hexmask.long 0x0 0.--27. 1. " IDADDR ,Initial destination address for ZDMA0"
group ad:0x01E8000C++3
line.long 0x0 "ZDICNT0,ZDMA 0 initial count register"
bitfld.long 0x0 30.--31. "QSC ,DREQ(DMA request) source selection" "nXDREQ0,nXDREQ1,N/A,N/A"
bitfld.long 0x0 28.--29. " QTY ,DREQ protocol" "Handshake,SingleStp,WholeSrv,Denamd"
bitfld.long 0x0 26.--27. " TMD ,Transfer mode" "NotUsd,UntTrsfrMd,BlkTrsfrMd,OnTheFly"
bitfld.long 0x0 24.--25. " OTF ,On the fly mode" "N/A,N/A,RdTmeOthFly,WrTmeOthFly"
textline " "
bitfld.long 0x0 22.--23. "INTS ,Interrupt mode set" "Polling,N/A,I-Trans,I-Term"
bitfld.long 0x0 21. " AR ,Auto-reload and auto-start after DMA count are 0" "Dis,Ena"
bitfld.long 0x0 20. " EN ,DMA H/W" "Dis,Ena"
hexmask.long 0x0 0.--19. 1. " ICNT ,Initial/current transfer count"
rgroup ad:0x01E80010++3
line.long 0x0 "ZDCSRC0 ,ZDMA 0 current source address"
bitfld.long 0x0 30.--31. "DST ,Data size for transfer" "Byte,HlfWrd,Word,NtUsd"
bitfld.long 0x0 28.--29. " DAL ,Direction of address for load" "N/A,Inc,Dec,Fix"
hexmask.long 0x0 0.--27. 1. " CSADDR ,Current source address"
rgroup ad:0x01E80014++3
line.long 0x0 "ZDCDEX0,ZDMA 0 current destination address"
bitfld.long 0x0 30.--31. "OPT ,DMA internal options" "00,01,10,11"
bitfld.long 0x0 28.--29. " DAS ,Direction of address to store" "N/A,Inc,Dec,Fix"
hexmask.long 0x0 0.--27. 1. " CDADDR ,Current destination address for ZDMA0"
rgroup ad:0x01E80018++3
line.long 0x0 "ZDCCNT0,ZDMA 0 current count register"
bitfld.long 0x0 30.--31. "QSC ,DREQ(DMA request) source selection" "nXDREQ0,nXDREQ1,N/A,N/A"
bitfld.long 0x0 28.--29. " QTY ,DREQ protocol" "Handshake,SingleStp,WholeSrv,Denamd"
bitfld.long 0x0 26.--27. " TMD ,Transfer mode" "NotUsd,UntTrsfrMd,BlkTrsfrMd,OnTheFly"
bitfld.long 0x0 24.--25. " OTF ,On the fly mode" "N/A,N/A,RdTmeOthFly,WrTmeOthFly"
textline " "
bitfld.long 0x0 22.--23. "INTS ,Interrupt mode set" "Polling,N/A,I-Trans,I-Term"
bitfld.long 0x0 21. " AR ,Auto-reload and auto-start after DMA count are 0" "Dis,Ena"
bitfld.long 0x0 20. " EN ,DMA H/W" "Dis,Ena"
hexmask.long 0x0 0.--19. 1. " ICNT ,Initial/current transfer count"
; ZDMA1 Register
group ad:0x01E80024++3
line.long 0x0 "ZDISRC1 ,ZDMA 1 initial source address"
bitfld.long 0x0 30.--31. "DST ,Data size for transfer" "Byte,HlfWrd,Word,NtUsd"
bitfld.long 0x0 28.--29. " DAL ,Direction of address for load" "N/A,Inc,Dec,Fix"
hexmask.long 0x0 0.--27. 1. " ISADDR ,Initial source address"
group ad:0x01E80028++3
line.long 0x0 "ZDIDEX1 ,ZDMA 1 initial destination address"
bitfld.long 0x0 30.--31. "OPT ,DMA internal options" "00,01,10,11"
bitfld.long 0x0 28.--29. " DAS ,Direction of address to store" "N/A,Inc,Dec,Fix"
hexmask.long 0x0 0.--27. 1. " IDADDR ,Initial destination address for ZDMA0"
group ad:0x01E8002C++3
line.long 0x0 "ZDICNT1,ZDMA 1 initial count register"
bitfld.long 0x0 30.--31. "QSC ,DREQ(DMA request) source selection" "nXDREQ0,nXDREQ1,N/A,N/A"
bitfld.long 0x0 28.--29. " QTY ,DREQ protocol" "Handshake,SingleStp,WholeSrv,Denamd"
bitfld.long 0x0 26.--27. " TMD ,Transfer mode" "NotUsd,UntTrsfrMd,BlkTrsfrMd,OnTheFly"
bitfld.long 0x0 24.--25. " OTF ,On the fly mode" "N/A,N/A,RdTmeOthFly,WrTmeOthFly"
textline " "
bitfld.long 0x0 22.--23. "INTS ,Interrupt mode set" "Polling,N/A,I-Trans,I-Term"
bitfld.long 0x0 21. " AR ,Auto-reload and auto-start after DMA count are 0" "Dis,Ena"
bitfld.long 0x0 20. " EN ,DMA H/W" "Dis,Ena"
hexmask.long 0x0 0.--19. 1. " ICNT ,Initial/current transfer count"
rgroup ad:0x01E80030++3
line.long 0x0 "ZDCSRC1 ,ZDMA 1 current source address"
bitfld.long 0x0 30.--31. "DST ,Data size for transfer" "Byte,HlfWrd,Word,NtUsd"
bitfld.long 0x0 28.--29. " DAL ,Direction of address for load" "N/A,Inc,Dec,Fix"
hexmask.long 0x0 0.--27. 1. " CSADDR ,Current source address"
rgroup ad:0x01E80034++3
line.long 0x0 "ZDCDEX1,ZDMA 1 current destination address"
bitfld.long 0x0 30.--31. "OPT ,DMA internal options" "00,01,10,11"
bitfld.long 0x0 28.--29. " DAS ,Direction of address to store" "N/A,Inc,Dec,Fix"
hexmask.long 0x0 0.--27. 1. " CDADDR ,Current destination address for ZDMA0"
rgroup ad:0x01E80038++3
line.long 0x0 "ZDCCNT1,ZDMA 1 current count register"
bitfld.long 0x0 30.--31. "QSC ,DREQ(DMA request) source selection" "nXDREQ0,nXDREQ1,N/A,N/A"
bitfld.long 0x0 28.--29. " QTY ,DREQ protocol" "Handshake,SingleStp,WholeSrv,Denamd"
bitfld.long 0x0 26.--27. " TMD ,Transfer mode" "NotUsd,UntTrsfrMd,BlkTrsfrMd,OnTheFly"
bitfld.long 0x0 24.--25. " OTF ,On the fly mode" "N/A,N/A,RdTmeOthFly,WrTmeOthFly"
textline " "
bitfld.long 0x0 22.--23. "INTS ,Interrupt mode set" "Polling,N/A,I-Trans,I-Term"
bitfld.long 0x0 21. " AR ,Auto-reload and auto-start after DMA count are 0" "Dis,Ena"
bitfld.long 0x0 20. " EN ,DMA H/W" "Dis,Ena"
hexmask.long 0x0 0.--19. 1. " ICNT ,Initial/current transfer count"
group ad:0x01F80000++3
line.long 0x0 "BDCON0,BDMA0 CONTROL REGISTER"
bitfld.long 0x0 6.--7. "INT ,Reserved" "00,01,10,11"
bitfld.long 0x0 4.--5. " STE ,Status of DMA" "RDY,NotTC,TC,N/A"
bitfld.long 0x0 2.--3. " QDS ,External/internal DMA" "Ena,Dis,Dis,Dis"
bitfld.long 0x0 0.--1. " CMD ,Software commands" "NC,AW,AW,AW"
group ad:0x01F80020++3
line.long 0x0 "BDCON1,BDMA1 CONTROL REGISTER"
bitfld.long 0x0 6.--7. "INT ,Reserved" "00,01,10,11"
bitfld.long 0x0 4.--5. " STE ,Status of DMA" "RDY,NotTC,TC,N/A"
bitfld.long 0x0 2.--3. " QDS ,External/internal DMA" "Ena,Dis,Dis,Dis"
bitfld.long 0x0 0.--1. " CMD ,Software commands" "NC,AW,AW,AW"
group ad:0x01F80004++3
line.long 0x0 "BDISRC0,BDMA 0 initial source address"
bitfld.long 0x0 30.--31. "DST ,Data size for transfer" "Byte,HlfWord,Word,NU"
bitfld.long 0x0 28.--29. " DAL ,Direction of address for load" "N/A,Inc,Dec,Per"
hexmask.long 0x0 0.--27. 1. " ISADDR ,Initial source address"
group ad:0x01F80008++3
line.long 0x0 "BDIDES0,BDMA 0 initial destination address"
bitfld.long 0x0 30.--31. "TDM ,Transfer direction mode" "RSRVD,M2IO,IO2M,IO2IO"
bitfld.long 0x0 28.--29. " DAS ,Direction of address for store" "N/A,Inc,Dec,Per"
hexmask.long 0x0 0.--27. 1. " IDADDR ,Initial destination address"
group ad:0x01F8000C++3
line.long 0x0 "BDICNT0,BDMA 0 initial count address"
bitfld.long 0x0 30.--31. "QSC ,DMA request selection" "N/A,IIS,UART0,SIO"
;bitfld.long 0x0 28.--29. " RSRVD ,Reserved" "Handshake,Rsrvd,Rsrvd,Rsrvd"
;bitfld.long 0x0 26.--27. " RSRVD ,Reserved" "Rsrvd,UntTrMd,Rsrvd,Rsrvd"
;bitfld.long 0x0 24.--25. " RSRVD ,Reserved" "NOTF,Rsrvd,Rsrvd,Rsrvd"
textline " "
bitfld.long 0x0 22.--23. "INTS ,Interrupt mode set" "Pol,N/A,Tra,Ter"
bitfld.long 0x0 21. " AR ,Auto reload and auto start after DNA count are 0" "Dis,Ena"
bitfld.long 0x0 20. " EN ,DMA H/W" "Dis,Ena"
hexmask.long 0x0 0.--19. 1. " ICNT ,Transfer count"
rgroup ad:0x01F80010++3
line.long 0x0 "BDCSRC0,BDMA 0 current source address"
bitfld.long 0x0 30.--31. "DST ,Data size for transfer" "Byte,HlfWord,Word,NU"
bitfld.long 0x0 28.--29. " DAL ,Direction of address for load" "N/A,Inc,Dec,Per"
hexmask.long 0x0 0.--27. 1. " CSADDR ,Current source address"
rgroup ad:0x01F80014++3
line.long 0x0 "BDCDES0,BDMA 0 current destination address"
bitfld.long 0x0 30.--31. "TDM ,Transfer direction mode" "RSRVD,M2IO,IO2M,IO2IO"
bitfld.long 0x0 28.--29. " DAS ,Direction of address for store" "N/A,Inc,Dec,Per"
hexmask.long 0x0 0.--27. 1. " CDADDR ,Current destination address"
rgroup ad:0x01F80018++3
line.long 0x0 "BDCCNT0,BDMA 0 current count address"
bitfld.long 0x0 30.--31. "QSC ,DMA request selection" "N/A,IIS,UART0,SIO"
;bitfld.long 0x0 28.--29. " RSRVD ,Reserved" "Handshake,Rsrvd,Rsrvd,Rsrvd"
;bitfld.long 0x0 26.--27. " RSRVD ,Reserved" "Rsrvd,UntTrMd,Rsrvd,Rsrvd"
;bitfld.long 0x0 24.--25. " RSRVD ,Reserved" "NOTF,Rsrvd,Rsrvd,Rsrvd"
textline " "
bitfld.long 0x0 22.--23. "INTS ,Interrupt mode set" "Pol,N/A,Tra,Ter"
bitfld.long 0x0 21. " AR ,Auto reload and auto start after DNA count are 0" "Dis,Ena"
bitfld.long 0x0 20. " EN ,DMA H/W" "Dis,Ena"
hexmask.long 0x0 0.--19. 1. " CCNT ,Transfer count"
;BDMA1
group ad:0x01F80004++3
line.long 0x0 "BDISRC1,BDMA 1 initial source address"
bitfld.long 0x0 30.--31. "DST ,Data size for transfer" "Byte,HlfWord,Word,NU"
bitfld.long 0x0 28.--29. " DAL ,Direction of address for load" "N/A,Inc,Dec,Per"
hexmask.long 0x0 0.--27. 1. " ISADDR ,Initial source address"
group ad:0x01F80008++3
line.long 0x0 "BDIDES1,BDMA 1 initial destination address"
bitfld.long 0x0 30.--31. "TDM ,Transfer direction mode" "RSRVD,M2IO,IO2M,IO2IO"
bitfld.long 0x0 28.--29. " DAS ,Direction of address for store" "N/A,Inc,Dec,Per"
hexmask.long 0x0 0.--27. 1. " IDADDR ,Initial destination address"
group ad:0x01F8000C++3
line.long 0x0 "BDICNT1,BDMA 1 initial count address"
bitfld.long 0x0 30.--31. "QSC ,DMA request selection" "N/A,IIS,UART0,SIO"
;bitfld.long 0x0 28.--29. " RSRVD ,Reserved" "Handshake,Rsrvd,Rsrvd,Rsrvd"
;bitfld.long 0x0 26.--27. " RSRVD ,Reserved" "Rsrvd,UntTrMd,Rsrvd,Rsrvd"
;bitfld.long 0x0 24.--25. " RSRVD ,Reserved" "NOTF,Rsrvd,Rsrvd,Rsrvd"
textline " "
bitfld.long 0x0 22.--23. "INTS ,Interrupt mode set" "Pol,N/A,Tra,Ter"
bitfld.long 0x0 21. " AR ,Auto reload and auto start after DNA count are 0" "Dis,Ena"
bitfld.long 0x0 20. " EN ,DMA H/W" "Dis,Ena"
hexmask.long 0x0 0.--19. 1. " ICNT ,Transfer count"
rgroup ad:0x01F80010++3
line.long 0x0 "BDCSRC1,BDMA 1 current source address"
bitfld.long 0x0 30.--31. "DST ,Data size for transfer" "Byte,HlfWord,Word,NU"
bitfld.long 0x0 28.--29. " DAL ,Direction of address for load" "N/A,Inc,Dec,Per"
hexmask.long 0x0 0.--27. 1. " CSADDR ,Current source address"
rgroup ad:0x01F80014++3
line.long 0x0 "BDCDES1,BDMA 1 current destination address"
bitfld.long 0x0 30.--31. "TDM ,Transfer direction mode" "RSRVD,M2IO,IO2M,IO2IO"
bitfld.long 0x0 28.--29. " DAS ,Direction of address for store" "N/A,Inc,Dec,Per"
hexmask.long 0x0 0.--27. 1. " CDADDR ,Current destination address"
rgroup ad:0x01F80018++3
line.long 0x0 "BDCCNT1,BDMA 1 current count address"
bitfld.long 0x0 30.--31. "QSC ,DMA request selection" "N/A,IIS,UART0,SIO"
;bitfld.long 0x0 28.--29. " RSRVD ,Reserved" "Handshake,Rsrvd,Rsrvd,Rsrvd"
;bitfld.long 0x0 26.--27. " RSRVD ,Reserved" "Rsrvd,UntTrMd,Rsrvd,Rsrvd"
;bitfld.long 0x0 24.--25. " RSRVD ,Reserved" "NOTF,Rsrvd,Rsrvd,Rsrvd"
textline " "
bitfld.long 0x0 22.--23. "INTS ,Interrupt mode set" "Pol,N/A,Tra,Ter"
bitfld.long 0x0 21. " AR ,Auto reload and auto start after DNA count are 0" "Dis,Ena"
bitfld.long 0x0 20. " EN ,DMA H/W" "Dis,Ena"
hexmask.long 0x0 0.--19. 1. " CCNT ,Transfer count"
tree.end
;Chapter 8 I/O-Ports
tree "I/O-Ports"
group ad:0x01D20000++3
line.long 0x0 "PCONA,Configures the pins of port A"
bitfld.long 0x0 9. "PA9 ,PortA 9" "Out,In"
bitfld.long 0x0 8. " PA8 ,PortA 8" "Out,In"
bitfld.long 0x0 7. " PA7 ,PortA 7" "Out,In"
bitfld.long 0x0 6. " PA6 ,PortA 6" "Out,In"
bitfld.long 0x0 5. " PA5 ,PortA 5" "Out,In"
bitfld.long 0x0 4. " PA4 ,PortA 4" "Out,In"
bitfld.long 0x0 3. " PA3 ,PortA 3" "Out,In"
textline " "
bitfld.long 0x0 2. "PA2 ,PortA 2" "Out,In"
bitfld.long 0x0 1. " PA1 ,PortA 1" "Out,In"
bitfld.long 0x0 0. " PA0 ,PortA 0" "Out,In"
group ad:0x01D20004++3
line.long 0x0 "PDATA,Data register for port A"
bitfld.long 0x0 9. "PDA9 ,PortA 9" "0,1"
bitfld.long 0x0 8. " PDA8 ,PortA 8" "0,1"
bitfld.long 0x0 7. " PDA7 ,PortA 7" "0,1"
bitfld.long 0x0 6. " PDA6 ,PortA 6" "0,1"
bitfld.long 0x0 5. " PDA5 ,PortA 5" "0,1"
bitfld.long 0x0 4. " PDA4 ,PortA 4" "0,1"
bitfld.long 0x0 3. " PDA3 ,PortA 3" "0,1"
textline " "
bitfld.long 0x0 2. "PDA2 ,PortA 2" "0,1"
bitfld.long 0x0 1. " PDA1 ,PortA 1" "0,1"
bitfld.long 0x0 0. " PDA0 ,PortA 0" "0,1"
group ad:0x01D20008++3
line.long 0x0 "PCONB,Configures the pins of port B"
bitfld.long 0x0 10. "PB10 ,PortB10" "Out,nGCS5"
bitfld.long 0x0 9. " PB9 ,PortB 9" "Out,nGCS4"
bitfld.long 0x0 8. " PB8 ,PortB 8" "Out,nGCS3"
bitfld.long 0x0 7. " PB7 ,PortB 7" "Out,nGCS2"
bitfld.long 0x0 6. " PB6 ,PortB 6" "Out,nGCS1"
bitfld.long 0x0 5. " PB5 ,PortB 5" "Out,nWBE3"
textline " "
bitfld.long 0x0 4. "PB4 ,PortB 4" "Out,nWBE2"
bitfld.long 0x0 3. " PB3 ,PortB 3" "Out,nSRASIn"
bitfld.long 0x0 2. "PB2 ,PortB 2" "Out,nSCAS"
bitfld.long 0x0 1. " PB1 ,PortB 1" "Out,SCLK"
bitfld.long 0x0 0. " PB0 ,PortB 0" "Out,SCKE"
group ad:0x01D2000C++3
line.long 0x0 "PDATB,Data register for port B"
bitfld.long 0x0 10. "PDB10 ,PortB 10" "0,1"
bitfld.long 0x0 9. " PDB9 ,PortB 9" "0,1"
bitfld.long 0x0 8. " PDB8 ,PortB 8" "0,1"
bitfld.long 0x0 7. " PDB7 ,PortB 7" "0,1"
bitfld.long 0x0 6. " PDB6 ,PortB 6" "0,1"
bitfld.long 0x0 5. " PDB5 ,PortB 5" "0,1"
bitfld.long 0x0 4. " PDB4 ,PortB 4" "0,1"
bitfld.long 0x0 3. " PDB3 ,PortB 3" "0,1"
textline " "
bitfld.long 0x0 2. "PDB2 ,PortB 2" "0,1"
bitfld.long 0x0 1. " PDB1 ,PortB 1" "0,1"
bitfld.long 0x0 0. " PDB0 ,PortB 0" "0,1"
group ad:0x01D20010++3
line.long 0x0 "PCONC,Configures the pins of port C"
bitfld.long 0x0 30.--31. "PC15 , PortC 15" "Input,Output,DATA31,nCTS0"
bitfld.long 0x0 28.--29. " PC14 , PortC 14" "Input,Output,DATA30,nRTS0"
bitfld.long 0x0 26.--27. " PC13 , PortC 13" "Input,Output,DATA29,RxD1"
bitfld.long 0x0 24.--25. " PC12 , PortC 12" "Input,Output,DATA28,TxD1"
bitfld.long 0x0 22.--23. " PC11 , PortC 11" "Input,Output,DATA27,nCTS1"
textline " "
bitfld.long 0x0 20.--21. "PC10 , PortC 10" "Input,Output,DATA26,nRTS1"
bitfld.long 0x0 18.--19. " PC9 , PortC 9" "Input,Output,DATA25,nXDREQ1"
bitfld.long 0x0 16.--17. " PC8 , PortC 8" "Input,Output,DATA24,nXDACK1"
bitfld.long 0x0 14.--15. " PC7 , PortC 7" "Input,Output,DATA23,VD4"
bitfld.long 0x0 12.--13. " PC6 , PortC 6" "Input,Output,DATA22,VD5"
textline " "
bitfld.long 0x0 10.--11. "PC5 , PortC 5" "Input,Output,DATA21,VD6"
bitfld.long 0x0 8.--9. " PC4 , PortC 4" "Input,Output,DATA20,VD7"
bitfld.long 0x0 6.--7. " PC3 , PortC 3" "Input,Output,DATA19,IISLCK"
bitfld.long 0x0 4.--5. " PC2 , PortC 2" "Input,Output,DATA18,IISDI"
bitfld.long 0x0 2.--3. " PC1 , PortC 1" "Input,Output,DATA17,IISDO"
textline " "
bitfld.long 0x0 0.--1. "PC0 , PortC 0" "Input,Output,DATA16,IISLRCK"
group ad:0x01D20014++3
line.long 0x0 "PDATC,The data register for port C"
bitfld.long 0x0 15. "PDC 15 ,Port 15 Data" "0,1"
bitfld.long 0x0 14. " PDC 14 ,Port 14 Data" "0,1"
bitfld.long 0x0 13. " PDC 13 ,Port 13 Data" "0,1"
bitfld.long 0x0 12. " PDC 12 ,Port 12 Data" "0,1"
bitfld.long 0x0 11. " PDC 11 ,Port 11 Data" "0,1"
bitfld.long 0x0 10. " PDC 10 ,Port 10 Data" "0,1"
textline " "
bitfld.long 0x0 9. "PDC 9 ,Port 9 Data" "0,1"
bitfld.long 0x0 8. " PDC 8 ,Port 8 Data" "0,1"
bitfld.long 0x0 7. " PDC 7 ,Port 7 Data" "0,1"
bitfld.long 0x0 6. " PDC 6 ,Port 6 Data" "0,1"
bitfld.long 0x0 5. " PDC 5 ,Port 5 Data" "0,1"
bitfld.long 0x0 4. " PDC 4 ,Port 4 Data" "0,1"
textline " "
bitfld.long 0x0 3. "PDC 3 ,Port 3 Data" "0,1"
bitfld.long 0x0 2. " PDC 2 ,Port 2 Data" "0,1"
bitfld.long 0x0 1. " PDC 1 ,Port 1 Data" "0,1"
bitfld.long 0x0 0. " PDC 0 ,Port 0 Data" "0,1"
group ad:0x01D20018++3
line.long 0x0 "PUPC,Pull-up disable register for port C"
bitfld.long 0x0 15. "PPC 15 ,Port 15 pull up" "Ena,Dis"
bitfld.long 0x0 14. " PPC 14 ,Port 14 pull up" "Ena,Dis"
bitfld.long 0x0 13. " PPC 13 ,Port 13 pull up" "Ena,Dis"
bitfld.long 0x0 12. " PPC 12 ,Port 12 pull up" "Ena,Dis"
bitfld.long 0x0 11. " PPC 11 ,Port 11 pull up" "Ena,Dis"
textline " "
bitfld.long 0x0 10. "PPC 10 ,Port 10 pull up" "Ena,Dis"
bitfld.long 0x0 9. " PPC 9 ,Port 9 pull up" "Ena,Dis"
bitfld.long 0x0 8. " PPC 8 ,Port 8 pull up" "Ena,Dis"
bitfld.long 0x0 7. " PPC 7 ,Port 7 pull up" "Ena,Dis"
bitfld.long 0x0 6. " PPC 6 ,Port 6 pull up" "Ena,Dis"
textline " "
bitfld.long 0x0 5. "PPC 5 ,Port 5 pull up" "Ena,Dis"
bitfld.long 0x0 4. " PPC 4 ,Port 4 pull up" "Ena,Dis"
bitfld.long 0x0 3. " PPC 3 ,Port 3 pull up" "Ena,Dis"
bitfld.long 0x0 2. " PPC 2 ,Port 2 pull up" "Ena,Dis"
bitfld.long 0x0 1. " PPC 1 ,Port 1 pull up" "Ena,Dis"
textline " "
bitfld.long 0x0 0. "PPC 0 ,Port 0 pull up" "Ena,Dis"
group ad:0x01D2001C++3
line.long 0x0 "PCOND,Configures the pins of port D"
bitfld.long 0x0 14.--15. "PD7 ,Port D 7 config" "Input,Output,VFRAME,RSRVD"
bitfld.long 0x0 12.--13. " PD6 ,Port D 6 config" "Input,Output,VM,RSRVD"
bitfld.long 0x0 10.--11. " PD5 ,Port D 5 config" "Input,Output,VLINE,RSRVD"
bitfld.long 0x0 8.--9. " PD4 ,Port D 4 config" "Input,Output,VCLK,RSRVD"
bitfld.long 0x0 6.--7. " PD3 ,Port D 3 config" "Input,Output,VD3,RSRVD"
textline " "
bitfld.long 0x0 4.--5. "PD2 ,Port D 2 config" "Input,Output,VD2,RSRVD"
bitfld.long 0x0 2.--3. " PD1 ,Port D 1 config" "Input,Output,VD1,RSRVD"
bitfld.long 0x0 0.--1. " PD0 ,Port D 0 config" "Input,Output,VD0,RSRVD"
group ad:0x01D20020++3
line.long 0x0 "PDATD,The data register for port D"
bitfld.long 0x0 7. "PDD 7 ,PortD 7 Data" "0,1"
bitfld.long 0x0 6. " PDD 6 ,PortD 6 Data" "0,1"
bitfld.long 0x0 5. " PDD 5 ,PortD 5 Data" "0,1"
bitfld.long 0x0 4. " PDD 4 ,PortD 4 Data" "0,1"
textline " "
bitfld.long 0x0 3. "PDD 3 ,PortD 3 Data" "0,1"
bitfld.long 0x0 2. " PDD 2 ,PortD 2 Data" "0,1"
bitfld.long 0x0 1. " PDD 1 ,PortD 1 Data" "0,1"
bitfld.long 0x0 0. " PDD 0 ,PortD 0 Data" "0,1"
group ad:0x01D20024++3
line.long 0x0 "PUPD,Pull up disable register for port D"
bitfld.long 0x0 7. "PPD 7 ,PortD 7 pull up" "Ena,Dis"
bitfld.long 0x0 6. " PPD 6 ,PortD 6 pull up" "Ena,Dis"
bitfld.long 0x0 5. " PPD 5 ,PortD 5 pull up" "Ena,Dis"
bitfld.long 0x0 4. " PPD 4 ,PortD 4 pull up" "Ena,Dis"
bitfld.long 0x0 3. " PPD 3 ,PortD 3 pull up" "Ena,Dis"
bitfld.long 0x0 2. " PPD 2 ,PortD 2 pull up" "Ena,Dis"
textline " "
bitfld.long 0x0 1. "PPD 1 ,PortD 1 pull up" "Ena,Dis"
bitfld.long 0x0 0. " PPD 0 ,PortD 0 pull up" "Ena,Dis"
group ad:0x01D20028++3
line.long 0x0 "PCONE,Configures the pins of port E"
bitfld.long 0x0 16.--17. "PE8 , PortE 8" "ENDIAN,Output,CODECLK,RSRVD"
bitfld.long 0x0 14.--15. " PE7 , PortE 7" "Input,Output,TOUT4,VD7"
bitfld.long 0x0 12.--13. " PE6 , PortE 6" "Input,Output,TOUT3,VD6"
bitfld.long 0x0 10.--11. " PE5 , PortE 5" "Input,Output,TOUT2,TCLKin"
bitfld.long 0x0 8.--9. " PE4 , PortE 4" "Input,Output,TOUT1,TCLKin"
textline " "
bitfld.long 0x0 6.--7. "PE3 , PortE 3" "Input,Output,TOUT0,RSRVD"
bitfld.long 0x0 4.--5. " PE2 , PortE 2" "Input,Output,RxD0,RSRVD"
bitfld.long 0x0 2.--3. " PE1 , PortE 1" "Input,Output,TxD0,RSRVD"
bitfld.long 0x0 0.--1. " PE0 , PortE 0" "Input,Output,Fpllo out,Fout out"
group ad:0x01D2002C++3
line.long 0x0 "PDATE,The data register for port E"
bitfld.long 0x0 8. "PDE 8 ,PortE 8 Data" "0,1"
bitfld.long 0x0 7. " PDE 7 ,PortE 7 Data" "0,1"
bitfld.long 0x0 6. " PDE 6 ,PortE 6 Data" "0,1"
bitfld.long 0x0 5. " PDE 5 ,PortE 5 Data" "0,1"
bitfld.long 0x0 4. " PDE 4 ,PortE 4 Data" "0,1"
textline " "
bitfld.long 0x0 3. "PDE 3 ,PortE 3 Data" "0,1"
bitfld.long 0x0 2. " PDE 2 ,PortE 2 Data" "0,1"
bitfld.long 0x0 1. " PDE 1 ,PortE 1 Data" "0,1"
bitfld.long 0x0 0. " PDE 0 ,PortE 0 Data" "0,1"
group ad:0x01D20030++3
line.long 0x0 "PUPE,Pull up disable register for port E"
bitfld.long 0x0 7. "PPE 7 ,PortE 7 pull up" "Ena,Dis"
bitfld.long 0x0 6. " PPE 6 ,PortE 6 pull up" "Ena,Dis"
bitfld.long 0x0 5. " PPE 5 ,PortE 5 pull up" "Ena,Dis"
bitfld.long 0x0 4. " PPE 4 ,PortE 4 pull up" "Ena,Dis"
bitfld.long 0x0 3. " PPE 3 ,PortE 3 pull up" "Ena,Dis"
bitfld.long 0x0 2. " PPE 2 ,PortE 2 pull up" "Ena,Dis"
textline " "
bitfld.long 0x0 1. "PPE 1 ,PortE 1 pull up" "Ena,Dis"
bitfld.long 0x0 0. " PPE 0 ,PortE 0 pull up" "Ena,Dis"
group ad:0x01D20034++3
line.long 0x0 "PCONF,Configures the pins of port F"
bitfld.long 0x0 19.--21. "PF8 ,PortF 8 config" "Input,Output,nCTS1,SIOCLK,IISCLK,RSRVD,RSRVD,RSRVD"
bitfld.long 0x0 16.--18. " PF7 ,PortF 7 config" "Input,Output,RxD1,SIORxD,IISDI,RSRVD,RSRVD,RSRVD"
bitfld.long 0x0 13.--15. " PF6 ,PortF 6 config" "Input,Output,TxD1,SIORDY,IISDO,RSRVD,RSRVD,RSRVD"
bitfld.long 0x0 10.--12. " PF5 ,PortF 5 config" "Input,Output,nRTS1,SIOTxD,IISLRCK,RSRVD,RSRVD,RSRVD"
bitfld.long 0x0 8.--9. " PF4 ,PortF 4 config" "Input,Output,nXBREQ,nXDREQ0"
textline " "
bitfld.long 0x0 6.--7. "PF3 ,PortF 3 config" "Input,Output,nXBACK,nXDACK0"
bitfld.long 0x0 4.--5. " PF2 ,PortF 2 config" "Input,Output,nWAIT,RSRVD"
bitfld.long 0x0 2.--3. " PF1 ,PortF 1 config" "Input,Output,IICSDA,RSRVD"
bitfld.long 0x0 0.--1. " PF0 ,PortF 0 config" "Input,Output,IICSCL,RSRVD"
group ad:0x1D20038++3
line.long 0x0 "PDATF,The data register for port F"
bitfld.long 0x0 8. "PDF 8 ,PortF 8 Data" "0,1"
bitfld.long 0x0 7. " PDF 7 ,PortF 7 Data" "0,1"
bitfld.long 0x0 6. " PDF 6 ,PortF 6 Data" "0,1"
bitfld.long 0x0 5. " PDF 5 ,PortF 5 Data" "0,1"
bitfld.long 0x0 4. " PDF 4 ,PortF 4 Data" "0,1"
textline " "
bitfld.long 0x0 3. "PDF 3 ,PortF 3 Data" "0,1"
bitfld.long 0x0 2. " PDF 2 ,PortF 2 Data" "0,1"
bitfld.long 0x0 1. " PDF 1 ,PortF 1 Data" "0,1"
bitfld.long 0x0 0. " PDF 0 ,PortF 0 Data" "0,1"
group ad:0x01D2003C++3
line.long 0x0 "PUPF,Pull up disable register for port F"
bitfld.long 0x0 8. "PPF 8 ,PortF 8 pull up" "Ena,Dis"
bitfld.long 0x0 7. " PPF 7 ,PortF 7 pull up" "Ena,Dis"
bitfld.long 0x0 6. " PPF 6 ,PortF 6 pull up" "Ena,Dis"
bitfld.long 0x0 5. " PPF 5 ,PortF 5 pull up" "Ena,Dis"
bitfld.long 0x0 4. " PPF 4 ,PortF 4 pull up" "Ena,Dis"
bitfld.long 0x0 3. " PPF 3 ,PortF 3 pull up" "Ena,Dis"
textline " "
bitfld.long 0x0 2. "PPF 2 ,PortF 2 pull up" "Ena,Dis"
bitfld.long 0x0 1. " PPF 1 ,PortF 1 pull up" "Ena,Dis"
bitfld.long 0x0 0. " PPF 0 ,PortF 0 pull up" "Ena,Dis"
group ad:0x01D20040++3
line.long 0x0 "PCONG,Configures the pins of port G"
bitfld.long 0x0 14.--15. "PG7 ,Port G 7 config" "Input,Output,IISLRCK,EINT7"
bitfld.long 0x0 12.--13. " PG6 ,Port G 6 config" "Input,Output,IISDO,EINT6"
bitfld.long 0x0 10.--11. " PG5 ,Port G 5 config" "Input,Output,IISDI,EINT5"
bitfld.long 0x0 8.--9. " PG4 ,Port G 4 config" "Input,Output,IISCLK,EINT4"
bitfld.long 0x0 6.--7. " PG3 ,Port G 3 config" "Input,Output,nRTS0,EINT3"
textline " "
bitfld.long 0x0 4.--5. "PG2 ,Port G 2 config" "Input,Output,nCTS0,EINT2"
bitfld.long 0x0 2.--3. " PG1 ,Port G 1 config" "Input,Output,VD5,EINT1"
bitfld.long 0x0 0.--1. " PG0 ,Port G 0 config" "Input,Output,VD4,EINT0"
group ad:0x01D20044++3
line.long 0x0 "PDATG,The data register for port G"
bitfld.long 0x0 7. "PGD 7 ,PortG 7 Data" "0,1"
bitfld.long 0x0 6. " PGD 6 ,PortG 6 Data" "0,1"
bitfld.long 0x0 5. " PGD 5 ,PortG 5 Data" "0,1"
bitfld.long 0x0 4. " PGD 4 ,PortG 4 Data" "0,1"
textline " "
bitfld.long 0x0 3. "PGD 3 ,PortG 3 Data" "0,1"
bitfld.long 0x0 2. " PGD 2 ,PortG 2 Data" "0,1"
bitfld.long 0x0 1. " PGD 1 ,PortG 1 Data" "0,1"
bitfld.long 0x0 0. " PGD 0 ,PortG 0 Data" "0,1"
group ad:0x01D20048++3
line.long 0x0 "PUPG,Pull up disable register for port G"
bitfld.long 0x0 7. "PPG 7 ,PortG 7 pull up" "Ena,Dis"
bitfld.long 0x0 6. " PPG 6 ,PortG 6 pull up" "Ena,Dis"
bitfld.long 0x0 5. " PPG 5 ,PortG 5 pull up" "Ena,Dis"
bitfld.long 0x0 4. " PPG 4 ,PortG 4 pull up" "Ena,Dis"
bitfld.long 0x0 3. " PPG 3 ,PortG 3 pull up" "Ena,Dis"
bitfld.long 0x0 2. " PPG 2 ,PortG 2 pull up" "Ena,Dis"
textline " "
bitfld.long 0x0 1. "PPG 1 ,PortG 1 pull up" "Ena,Dis"
bitfld.long 0x0 0. " PPG 0 ,PortG 0 pull up" "Ena,Dis"
group ad:0x01D2004C++3
line.long 0x0 "SPUCR,Special Pull-up register"
bitfld.long 0x0 2. "HZ@STOP ,Pull up control 0" "PAD,HZstop"
bitfld.long 0x0 1. " SPUCR1 ,Special pull up control 1" "Ena,Dis"
bitfld.long 0x0 0. " SPUCR0 ,Special pull up control 0" "Ena,Dis"
group ad:0x01D20050++3
line.long 0x0 "EXTINT,External Interrupt control Register"
bitfld.long 0x0 28.--30. "EINT7 ,External interrupt control 7" "LLI,HLI,FET,FET,RET,RET,BET,BET"
bitfld.long 0x0 24.--26. " EINT6 ,External interrupt control 6" "LLI,HLI,FET,FET,RET,RET,BET,BET"
bitfld.long 0x0 20.--22. " EINT5 ,External interrupt control 5" "LLI,HLI,FET,FET,RET,RET,BET,BET"
bitfld.long 0x0 16.--18. " EINT4 ,External interrupt control 4" "LLI,HLI,FET,FET,RET,RET,BET,BET"
bitfld.long 0x0 12.--14. " EINT3 ,External interrupt control 3" "LLI,HLI,FET,FET,RET,RET,BET,BET"
textline " "
bitfld.long 0x0 8.--10. "EINT2 ,External interrupt control 2" "LLI,HLI,FET,FET,RET,RET,BET,BET"
bitfld.long 0x0 4.--6. " EINT1 ,External interrupt control 1" "LLI,HLI,FET,FET,RET,RET,BET,BET"
bitfld.long 0x0 0.--2. " EINT0 ,External interrupt control 0" "LLI,HLI,FET,FET,RET,RET,BET,BET"
group ad:0x01D20054++3
line.long 0x0 "EINTPND,External interrupt pending Register"
bitfld.long 0x0 3. "EXTINTPND3 ,External interrupt control 3" "Act,Dea"
bitfld.long 0x0 2. " EXTINTPND2 ,External interrupt control 2" "Act,Dea"
bitfld.long 0x0 1. " EXTINTPND1 ,External interrupt control 1" "Act,Dea"
bitfld.long 0x0 0. " EXTINTPND0 ,External interrupt control 0" "Act,Dea"
tree.end
tree "Pulse Width Modulation (PWM) Timer"
group ad:0x01D50000++3
line.long 0x0 "TCFG0,Configures the three 8-bit prescalers"
hexmask.long.byte 0x0 24.--31. 1. "DZL ,Dead zone length"
hexmask.long.byte 0x0 16.--23. 1. " PRES2 ,Prescaler value for timer 4 & 5"
hexmask.long.byte 0x0 8.--15. 1. " PRES1 ,Prescaler value for timer 2 & 3"
hexmask.long.byte 0x0 0.--7. 1. " PRES0 ,Prescaler value for timer 0 & 1"
group ad:0x01D50004++3
line.long 0x0 "TCFG1,6-MUX & DMA mode selecton register"
bitfld.long 0x0 24.--27. "DMAmd ,Select DMA request channel" "NoSelect,Timer0,Timer1,Timer2,Timer3,Timer4,Timer5,RSRVD,?..."
bitfld.long 0x0 20.--23. " MUX5 ,Select MUX input for PWM timer 5" "1/2,1/4,1/8,1/16,EXTCLK,?..."
bitfld.long 0x0 16.--19. " MUX4 ,Select MUX input for PWM timer 4" "1/2,1/4,1/8,1/16,TCLK,?..."
bitfld.long 0x0 12.--15. " MUX3 ,Select MUX input for PWM timer 3" "1/2,1/4,1/8,1/16,1/32,?..."
bitfld.long 0x0 8.--11. " MUX2 ,Select MUX input for PWM timer 2" "1/2,1/4,1/8,1/16,1/32,?..."
textline " "
bitfld.long 0x0 4.--7. "MUX1 ,Select MUX input for PWM timer 1" "1/2,1/4,1/8,1/16,1/32,?..."
bitfld.long 0x0 0.--3. " MUX0 ,Select MUX input for PWM timer 0" "1/2,1/4,1/8,1/16,1/32,?..."
group ad:0x01D50008++3
line.long 0x0 "TCON,Timer control register"
bitfld.long 0x0 26. "T5AR ,Timer 5 auto reload" "Off,On"
bitfld.long 0x0 25. " T5MU ,Timer 5 manual update" "NoOp,Updt"
bitfld.long 0x0 24. " T5SS ,Timer 5 start/stop" "Stop,Start"
bitfld.long 0x0 23. " T4AR ,Timer 4 auto reload" "Off,On"
bitfld.long 0x0 22. " T4OI ,Timer 4 Output inverter" "Off,On"
bitfld.long 0x0 21. " T4MU ,Timer 4 manual update" "NoOp,Updt"
textline " "
bitfld.long 0x0 20. "T4SS ,Timer 4 start/stop" "Stop,Start"
bitfld.long 0x0 19. " T3AR ,Timer 3 auto reload" "Off,On"
bitfld.long 0x0 18. " T3OI ,Timer 3 Output inverter" "Off,On"
bitfld.long 0x0 17. " T3MU ,Timer 3 manual update" "NoOp,Updt"
bitfld.long 0x0 16. " T3SS ,Timer 3 start/stop" "Stop,Start"
bitfld.long 0x0 15. " T2AR ,Timer 2 auto reload" "Off,On"
textline " "
bitfld.long 0x0 14. "T2OI ,Timer 2 Output inverter" "Off,On"
bitfld.long 0x0 13. " T2MU ,Timer 2 manual update" "NoOp,Updt"
bitfld.long 0x0 12. " T2SS ,Timer 2 manual update" "Stop,Start"
bitfld.long 0x0 11. " T1AR ,Timer 1 auto reload" "Off,On"
bitfld.long 0x0 10. " T1OI ,Timer 1 Output inverter" "Off,On"
bitfld.long 0x0 9. " T1MU ,Timer 1 manual update" "NoOp,Updt"
textline " "
bitfld.long 0x0 8. "T1SS ,Timer 1 manual update" "Stop,Start"
bitfld.long 0x0 4. " DZE ,Determines the dead zone operation" "Dis,Ena"
bitfld.long 0x0 3. " T0AR ,Timer 0 auto reload" "Off,On"
bitfld.long 0x0 2. " T0OI ,Timer 0 Output inverter" "Off,On"
bitfld.long 0x0 1. " T0MU ,Timer 0 manual update" "NoOp,Updt"
bitfld.long 0x0 0. " T0SS ,Timer 0 manual update" "Stop,Start"
group ad:0x01D5000C++3
line.long 0x0 "TCNTB0,Timer 0 count buffer register"
hexmask.long.word 0x0 0.--15. 1. "T0CBR , Count buffer value for Timer 0"
group ad:0x01D50010++3
line.long 0x0 "TCMPB0,Timer 0 compare buffer register"
hexmask.long.word 0x0 0.--15. 1. "T0CBR , Compare buffer value for Timer 0"
group ad:0x01D50014++3
line.long 0x0 "TCNT0,Timer 0 observation register"
hexmask.long.word 0x0 0.--15. 1. "T0OR , Observation value for Timer 0"
group ad:0x01D50018++3
line.long 0x0 "TCNTB1,Timer 1 count buffer register"
hexmask.long.word 0x0 0.--15. 1. "T1CBR , Count buffer value for Timer 1"
group ad:0x01D5001C++3
line.long 0x0 "TCMPB1,Timer 1 compare buffer register"
hexmask.long.word 0x0 0.--15. 1. "T1CBR , Compare buffer value for Timer 1"
group ad:0x01D50020++3
line.long 0x0 "TCNTO1,Timer 1 observation register"
hexmask.long.word 0x0 0.--15. 1. "T1OR , Observation value for Timer 1"
group ad:0x01D50024++3
line.long 0x0 "TCNTB2,Timer 2 count buffer register"
hexmask.long.word 0x0 0.--15. 1. "T2CBR , Count buffer value for Timer 2"
group ad:0x01D50028++3
line.long 0x0 "TCMPB2,Timer 2 compare buffer register"
hexmask.long.word 0x0 0.--15. 1. "T2CBR , Compare buffer value for Timer 2"
group ad:0x01D5002C++3
line.long 0x0 "TCNTO2,Timer 2 observation register"
hexmask.long.word 0x0 0.--15. 1. "T2OR , Observation value for Timer 2"
group ad:0x01D50030++3
line.long 0x0 "TCNTB3,Timer 3 count buffer register"
hexmask.long.word 0x0 0.--15. 1. "T3CBR , Count buffer value for Timer 3"
group ad:0x01D50034++3
line.long 0x0 "TCMPB3,Timer 3 compare buffer register"
hexmask.long.word 0x0 0.--15. 1. "T3CBR , Compare buffer value for Timer 3"
group ad:0x01D50038++3
line.long 0x0 "TCNTO3,Timer 3 observation register"
hexmask.long.word 0x0 0.--15. 1. "T3OR , Observation value for Timer 3"
group ad:0x01D50030++3
line.long 0x0 "TCNTB4,Timer 4 count buffer register"
hexmask.long.word 0x0 0.--15. 1. "T4CBR , Count buffer value for Timer 4"
group ad:0x01D50034++3
line.long 0x0 "TCMPB4,Timer 4 compare buffer register"
hexmask.long.word 0x0 0.--15. 1. "T4CBR , Compare buffer value for Timer 4"
group ad:0x01D50038++3
line.long 0x0 "TCNTO4,Timer 4 observation register"
hexmask.long.word 0x0 0.--15. 1. "T4OR , Observation value for Timer 4"
group ad:0x01D50030++3
line.long 0x0 "TCNTB5,Timer 5 count buffer register"
hexmask.long.word 0x0 0.--15. 1. "T4CBR , Count buffer value for Timer 5"
group ad:0x01D50034++3
line.long 0x0 "TCMPB5,Timer 5 compare buffer register"
hexmask.long.word 0x0 0.--15. 1. "T4CBR , Compare buffer value for Timer 5"
group ad:0x01D50038++3
line.long 0x0 "TCNTO5,Timer 5 observation register"
hexmask.long.word 0x0 0.--15. 1. "T4OR , Observation value for Timer 5"
tree.end
tree "Universal Asynchronous Receiver and Transmitter (UART)"
group ad:0x01D00000++3
line.long 0x0 "ULCON0,UART channel 0 line control register"
;bitfld.long 0x0 7. "RSRVD ,Reserved" "0,1"
bitfld.long 0x0 6. "IRMd ,Infra red mode" "Nor,IR"
bitfld.long 0x0 3.--5. " PM ,Parity Mode" "NoPar,NoPar,NoPar,NoPar,Odd,Even,1,0"
bitfld.long 0x0 2. " NST ,Number of stop bits" "One,Two"
bitfld.long 0x0 0.--1. " WL ,Word length" "5bits,6bits,7bits,8bits"
group ad:0x01D00004++3
line.long 0x0 "UCON0,UART channel 0 control register"
bitfld.long 0x0 9. "TxIT ,Interrupt request type" "Pulse,Level"
bitfld.long 0x0 8. " RxIT ,Interrupt request type" "Pulse,Level"
bitfld.long 0x0 7. " RxTOE ,Enable/Disable Rx time out interrupt" "Dis,Ena"
bitfld.long 0x0 6. " RxESI ,Enable/Disable UART exception interrupt" "Dis,Ena"
bitfld.long 0x0 5. " LBMd ,UAR loop back mode" "Dis,Ena"
bitfld.long 0x0 4. " SBS ,Send break during 1 frame time" "Dis,Ena"
textline " "
bitfld.long 0x0 2.--3. "TM ,Function able to write Tx data" "Dis,IRq,BDMA0,BDMA1"
bitfld.long 0x0 0.--1. " RM ,Function able to read from UART buffer" "Dis,IRq,BDMA0,BDMA1"
group ad:0x01D00008++3
line.long 0x0 "UFCON0,UART channel 0 FIFO control register"
bitfld.long 0x0 6.--7. "TxFIFOTL ,Determine the trigger level of transmit FIFO" "Empty,4Byte,8Byte,12Byte"
bitfld.long 0x0 4.--5. " RxFIFOTL ,Determine the trigger level of receive FIFO" "4Byte,8Byte,12Byte,16Byte"
bitfld.long 0x0 2. " TxFIFOR ,Tx FIFO reseted" "Norm,Reset"
bitfld.long 0x0 1. " RxFIFOR ,Rx FIFO reseted" "Norm,Reset"
textline " "
bitfld.long 0x0 0. "FE ,FIFO enabled/disabled" "Dis,Ena"
group ad:0x01D0000C++3
line.long 0x0 "UMCON0,UART channel 0 Modem control register"
bitfld.long 0x0 4. "AFC ,Auto flow control" "Dis,Ena"
bitfld.long 0x0 0. " RTS ,nRTS signal" "Dis,Ena"
group ad:0x01D00010++3
line.long 0x0 "UTRSTA0,UART channel 0 Tx/Rx status register"
bitfld.long 0x0 2. "TSE ,Transmit shift register empty" "No,Yes"
bitfld.long 0x0 1. " TBE ,Transmit buffer empty" "No,Yes"
bitfld.long 0x0 0. " RBDR ,receive buffer data ready" "No,Yes"
group ad:0x01D00014++3
line.long 0x0 "UERSTA0,UART channel 0 Rx error status register"
bitfld.long 0x0 3. "BD ,Break detected" "No,Yes"
bitfld.long 0x0 2. " FE ,Frame error" "No,Yes"
bitfld.long 0x0 1. " PE ,Parity error" "No,Yes"
bitfld.long 0x0 0. " OE ,Overrun error" "No,Yes"
group ad:0x01D00018++3
line.long 0x0 "UFSTAT0,UART channel 0 FIFO status register"
bitfld.long 0x0 9. "TxFF ,Tx-FIFO full" "No,Yes"
bitfld.long 0x0 8. " RxFF ,Rx-FIFO full" "No,Yes"
hexmask.long.byte 0x0 4.--7. 1. " TxFIFO , Number of data in Tx FIFO"
hexmask.long.byte 0x0 0.--3. 1. " RxFIFO ,Number of data in Rx FIFO"
group ad:0x01D0001C++3
line.long 0x0 "UMSTAT0,UART channel 0 Modem status register"
bitfld.long 0x0 4. "DCTS ,nCTS changed since last time read" "No,Yes"
bitfld.long 0x0 0. "CTS ,CTS active" "No,Yes"
; UART1
group ad:0x01D04000++3
line.long 0x0 "ULCON1,UART channel 1 line control register"
;bitfld.long 0x0 7. "RSRVD ,Reserved" "0,1"
bitfld.long 0x0 6. "IRMd ,Infra red mode" "Nor,IR"
bitfld.long 0x0 3.--5. " PM ,Parity Mode" "NoPar,NoPar,NoPar,NoPar,Odd,Even,1,0"
bitfld.long 0x0 2. " NST ,Number of stop bits" "One,Two"
bitfld.long 0x0 0.--1. " WL ,Word length" "5bits,6bits,7bits,8bits"
group ad:0x01D04004++3
line.long 0x0 "UCON1,UART channel 1 control register"
bitfld.long 0x0 9. "TxIT ,Interrupt request type" "Pulse,Level"
bitfld.long 0x0 8. " RxIT ,Interrupt request type" "Pulse,Level"
bitfld.long 0x0 7. " RxTOE ,Enable/Disable Rx time out interrupt" "Dis,Ena"
bitfld.long 0x0 6. " RxESI ,Enable/Disable UART exception interrupt" "Dis,Ena"
bitfld.long 0x0 5. " LBMd ,UAR loop back mode" "Dis,Ena"
bitfld.long 0x0 4. " SBS ,Send break during 1 frame time" "Dis,Ena"
textline " "
bitfld.long 0x0 2.--3. "TM ,Function able to write Tx data" "Dis,IRq,BDMA0,BDMA1"
bitfld.long 0x0 0.--1. " RM ,Function able to read from UART buffer" "Dis,IRq,BDMA0,BDMA1"
group ad:0x01D04008++3
line.long 0x0 "UFCON1,UART channel 1 FIFO control register"
bitfld.long 0x0 6.--7. "TxFIFOTL ,Determine the trigger level of transmit FIFO" "Empty,4Byte,8Byte,12Byte"
bitfld.long 0x0 4.--5. " RxFIFOTL ,Determine the trigger level of receive FIFO" "4Byte,8Byte,12Byte,16Byte"
bitfld.long 0x0 2. " TxFIFOR ,Tx FIFO reseted" "Norm,Reset"
bitfld.long 0x0 1. " RxFIFOR ,Rx FIFO reseted" "Norm,Reset"
textline " "
bitfld.long 0x0 0. "FE ,FIFO enabled/disabled" "Dis,Ena"
group ad:0x01D0400C++3
line.long 0x0 "UMCON1,UART channel 1 Modem control register"
bitfld.long 0x0 4. "AFC ,Auto flow control" "Dis,Ena"
bitfld.long 0x0 0. " RTS ,nRTS signal" "Dis,Ena"
group ad:0x01D04010++3
line.long 0x0 "UTRSTA1,UART channel 1 Tx/Rx status register"
bitfld.long 0x0 2. "TSE ,Transmit shift register empty" "No,Yes"
bitfld.long 0x0 1. " TBE ,Transmit buffer empty" "No,Yes"
bitfld.long 0x0 0. " RBDR ,receive buffer data ready" "No,Yes"
group ad:0x01D04014++3
line.long 0x0 "UERSTA1,UART channel 1 Rx error status register"
bitfld.long 0x0 3. "BD ,Break detected" "No,Yes"
bitfld.long 0x0 2. " FE ,Frame error" "No,Yes"
bitfld.long 0x0 1. " PE ,Parity error" "No,Yes"
bitfld.long 0x0 0. " OE ,Overrun error" "No,Yes"
group ad:0x01D04018++3
line.long 0x0 "UFSTAT1,UART channel 1 FIFO status register"
bitfld.long 0x0 9. "TxFF ,Tx-FIFO full" "No,Yes"
bitfld.long 0x0 8. " RxFF ,Rx-FIFO full" "No,Yes"
hexmask.long.byte 0x0 4.--7. 1. " TxFIFO , Number of data in Tx FIFO"
hexmask.long.byte 0x0 0.--3. 1. " RxFIFO ,Number of data in Rx FIFO"
group ad:0x01D0401C++3
line.long 0x0 "UMSTAT1,UART channel 1 Modem status register"
bitfld.long 0x0 4. "DCTS ,nCTS changed since last time read" "No,Yes"
bitfld.long 0x0 0. "CTS ,CTS active" "No,Yes"
if (d.l(d:0x01C80000)&0x00000001)==0x0
group ad:0x01D00020--d:0x01D00020
line.byte 0x0 "UTXH0,UART channel 0 transmit holding register(Little endian mode)"
hexmask.byte 0x0 0.--7. 1. "TXDATA0 ,Transmit data for UART0"
group ad:0x01D04020--d:0x01D04020
line.byte 0x0 "UTXH1,UART channel 1 transmit holding register(Little endian mode)"
hexmask.byte 0x0 0.--7. 1. "TXDATA1 ,Transmit data for UART1"
group ad:0x01D00024--d:0x01D00024
hide.byte 0x0 "URXH0,UART channel 0 receive buffer register(Little endian mode)"
in
group ad:0x01D04024--d:0x01D04024
hide.byte 0x0 "URXH1,UART channel 1 receive buffer register(Little endian mode)"
in
else
group ad:0x01D00023++0
line.byte 0x0 "UTXH0,UART channel 0 transmit holding register(Big endian mode)"
hexmask.byte 0x0 0.--7. 1. "TXDATA0 ,Transmit data for UART0"
group ad:0x01D04023++0
line.byte 0x0 "UTXH1,UART channel 1 transmit holding register(Big endian mode)"
hexmask.byte 0x0 0.--7. 1. "TXDATA1 ,Transmit data for UART1"
group ad:0x01D00027++0
line.byte 0x0 "URXH0,UART channel 0 receive buffer register(Big endian mode)"
hexmask.byte 0x0 0.--7. 1. "RXDATA0 ,Receive data for UART0"
group ad:0x01D04027++0
line.byte 0x0 "URXH1,UART channel 1 receive buffer register(Big endian mode)"
hexmask.byte 0x0 0.--7. 1. "RXDATA1 ,Receive data for UART1"
endif
group ad:0x01D00028++3
line.long 0x0 "UBRDIV0,Baud rate divisior register 0"
hexmask.long.word 0x0 0.--15. 1. "UBRDIV ,Baud rate division value"
group ad:0x01D04028++3
line.long 0x0 "UBRDIV1,Baud rate divisior register 1"
hexmask.long.word 0x0 0.--15. 1. "UBRDIV ,Baud rate division value"
tree.end
;Interrupt Controller
tree "Interrupt Controller"
group ad:0x01E00000++3
line.long 0x0 "INTCON,Interrupt control Register"
bitfld.long 0x0 2. "V ,Vector mode for IRQ" "Ena,Dis"
bitfld.long 0x0 1. " I ,IRQ interrupt request line to CPU" "Ena,Dis"
bitfld.long 0x0 0. " F ,FIQ interrupt request line to CPU" "Ena,Dis"
group ad:0x01E00004++3
line.long 0x0 "INTPND,Indicates the interrupt request status"
bitfld.long 0x0 25. "EINT0 ,Interrupt 0 requested" "No,Yes"
bitfld.long 0x0 24. " EINT1 ,Interrupt 1 requested" "No,Yes"
bitfld.long 0x0 23. " EINT2 ,Interrupt 2 requested" "No,Yes"
bitfld.long 0x0 22. " EINT3 ,Interrupt 3 requested" "No,Yes"
bitfld.long 0x0 21. " EINT4567 ,Interrupt 4/5/6/7 requested" "No,Yes"
textline " "
bitfld.long 0x0 20. "INT_TICK ,Interrupt requested" "No,Yes"
bitfld.long 0x0 19. " INT_ZDMA0 ,Interrupt requested" "No,Yes"
bitfld.long 0x0 18. " INT_ZDMA1 ,Interrupt requested" "No,Yes"
bitfld.long 0x0 17. " INT_BDMA0 ,Interrupt requested" "No,Yes"
textline " "
bitfld.long 0x0 16. "INT_BDMA1 ,Interrupt requested" "No,Yes"
bitfld.long 0x0 15. " INT_WDT ,Interrupt requested" "No,Yes"
bitfld.long 0x0 14. " INT_UERR0/1 ,Interrupt requested" "No,Yes"
bitfld.long 0x0 13. " INT_TIMER0 ,Interrupt requested" "No,Yes"
textline " "
bitfld.long 0x0 12. "INT_TIMER1 ,Interrupt requested" "No,Yes"
bitfld.long 0x0 11. " INT_TIMER2 ,Interrupt requested" "No,Yes"
bitfld.long 0x0 10. " INT_TIMER3 ,Interrupt requested" "No,Yes"
bitfld.long 0x0 9. " INT_TIMER4 ,Interrupt requested" "No,Yes"
textline " "
bitfld.long 0x0 8. "INT_TIMER5 ,Interrupt requested" "No,Yes"
bitfld.long 0x0 7. " INT_URXD0 ,Interrupt requested" "No,Yes"
bitfld.long 0x0 6. " INT_URXD1 ,Interrupt requested" "No,Yes"
bitfld.long 0x0 5. " INT_IIC ,Interrupt requested" "No,Yes"
textline " "
bitfld.long 0x0 4. "INT_SIO ,Interrupt requested" "No,Yes"
bitfld.long 0x0 3. " INT_UTXD0 ,Interrupt requested" "No,Yes"
bitfld.long 0x0 2. " INT_UTXD1 ,Interrupt requested" "No,Yes"
bitfld.long 0x0 1. " INT_RTC ,Interrupt requested" "No,Yes"
textline " "
bitfld.long 0x0 0. "INT_ADC ,Interrupt requested" "No,Yes"
group ad:0x01E00008++3
line.long 0x0 "INTMOD,Interrupt mode register"
bitfld.long 0x0 25. "EINT0 ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x0 24. " EINT1 ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x0 23. " EINT2 ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x0 22. " EINT3 ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x0 21. " EINT4567 ,Interrupt 4/5/6/7 mode" "IRQ,FIQ"
textline " "
bitfld.long 0x0 20. "INT_TICK ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x0 19. " INT_ZDMA0 ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x0 18. " INT_ZDMA1 ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x0 17. " INT_BDMA0 ,Interrupt mode" "IRQ,FIQ"
textline " "
bitfld.long 0x0 16. "INT_BDMA1 ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x0 15. " INT_WDT ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x0 14. " INT_UERR0/1 ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x0 13. " INT_TIMER0 ,Interrupt mode" "IRQ,FIQ"
textline " "
bitfld.long 0x0 12. "INT_TIMER1 ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x0 11. " INT_TIMER2 ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x0 10. " INT_TIMER3 ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x0 9. " INT_TIMER4 ,Interrupt mode" "IRQ,FIQ"
textline " "
bitfld.long 0x0 8. "INT_TIMER5 ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x0 7. " INT_URXD0 ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x0 6. " INT_URXD1 ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x0 5. " INT_IIC ,Interrupt mode" "IRQ,FIQ"
textline " "
bitfld.long 0x0 4. "INT_SIO ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x0 3. " INT_UTXD0 ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x0 2. " INT_UTXD1 ,Interrupt mode" "IRQ,FIQ"
bitfld.long 0x0 1. " INT_RTC ,Interrupt mode" "IRQ,FIQ"
textline " "
bitfld.long 0x0 0. "INT_ADC ,Interrupt mode" "IRQ,FIQ"
group ad:0x01E0000C++3
line.long 0x0 "INTMSK,Interrupt mask register"
bitfld.long 0x0 26. "Global ,Global interrupt mask" "Avail,Masked"
bitfld.long 0x0 25. " EINT0 ,Interrupt mask" "Avail,Maked"
bitfld.long 0x0 24. " EINT1 ,Interrupt mask" "Avail,Maked"
bitfld.long 0x0 23. " EINT2 ,Interrupt mask" "Avail,Maked"
bitfld.long 0x0 22. " EINT3 ,Interrupt mask" "Avail,Maked"
textline " "
bitfld.long 0x0 21. "EINT4567 ,Interrupt 4/5/6/7 mask" "Avail,Maked"
bitfld.long 0x0 20. " INT_TICK ,Interrupt mask" "Avail,Maked"
bitfld.long 0x0 19. " INT_ZDMA0 ,Interrupt mask" "Avail,Maked"
bitfld.long 0x0 18. " INT_ZDMA1 ,Interrupt mask" "Avail,Maked"
textline " "
bitfld.long 0x0 17. "INT_BDMA0 ,Interrupt mask" "Avail,Maked"
bitfld.long 0x0 16. " INT_BDMA1 ,Interrupt mask" "Avail,Maked"
bitfld.long 0x0 15. " INT_WDT ,Interrupt mask" "Avail,Maked"
bitfld.long 0x0 14. " INT_UERR0/1 ,Interrupt mask" "Avail,Maked"
textline " "
bitfld.long 0x0 13. "INT_TIMER0 ,Interrupt mask" "Avail,Maked"
bitfld.long 0x0 12. " INT_TIMER1 ,Interrupt mask" "Avail,Maked"
bitfld.long 0x0 11. " INT_TIMER2 ,Interrupt mask" "Avail,Maked"
bitfld.long 0x0 10. " INT_TIMER3 ,Interrupt mask" "Avail,Maked"
textline " "
bitfld.long 0x0 9. "INT_TIMER4 ,Interrupt mask" "Avail,Maked"
bitfld.long 0x0 8. " INT_TIMER5 ,Interrupt mask" "Avail,Maked"
bitfld.long 0x0 7. " INT_URXD0 ,Interrupt mask" "Avail,Maked"
bitfld.long 0x0 6. " INT_URXD1 ,Interrupt mask" "Avail,Maked"
textline " "
bitfld.long 0x0 5. "INT_IIC ,Interrupt mask" "Avail,Maked"
bitfld.long 0x0 4. " INT_SIO ,Interrupt mask" "Avail,Maked"
bitfld.long 0x0 3. " INT_UTXD0 ,Interrupt mask" "Avail,Maked"
bitfld.long 0x0 2. " INT_UTXD1 ,Interrupt mask" "Avail,Maked"
textline " "
bitfld.long 0x0 1. "INT_RTC ,Interrupt mask" "Avail,Maked"
bitfld.long 0x0 0. " INT_ADC ,Interrupt mask" "Avail,Maked"
group ad:0x01E00010++3
line.long 0x0 "I_PSLV,IRQ priority of slave register"
bitfld.long 0x0 30.--31. "sGAEINT0 ,priorities sGA" "1st,2nd,3rd,4th"
bitfld.long 0x0 28.--29. " sGBEINT1 ,priorities sGB" "1st,2nd,3rd,4th"
bitfld.long 0x0 26.--27. " sGCEINT2 ,priorities sGC" "1st,2nd,3rd,4th"
bitfld.long 0x0 24.--25. " sGDEINT3 ,priorities sGD" "1st,2nd,3rd,4th"
textline " "
bitfld.long 0x0 22.--23. "sGAZDMA0 ,priorities sGA" "1st,2nd,3rd,4th"
bitfld.long 0x0 20.--21. " sGBZDMA1 ,priorities sGB" "1st,2nd,3rd,4th"
bitfld.long 0x0 18.--19. " sGCBDMA0 ,priorities sGC" "1st,2nd,3rd,4th"
bitfld.long 0x0 16.--17. " sGDBDMA1 ,priorities sGD" "1st,2nd,3rd,4th"
textline " "
bitfld.long 0x0 14.--15. "sGATIM0 ,priorities sGA" "1st,2nd,3rd,4th"
bitfld.long 0x0 12.--13. " sGBTIM1 ,priorities sGB" "1st,2nd,3rd,4th"
bitfld.long 0x0 10.--11. " sGCTIM2 ,priorities sGC" "1st,2nd,3rd,4th"
bitfld.long 0x0 8.--9. " sGDTIM3 ,priorities sGD" "1st,2nd,3rd,4th"
textline " "
bitfld.long 0x0 6.--7. "sGAURXD0 ,priorities sGA" "1st,2nd,3rd,4th"
bitfld.long 0x0 4.--5. " sGBURXD1 ,priorities sGB" "1st,2nd,3rd,4th"
bitfld.long 0x0 2.--3. " sGCIIC ,priorities sGC" "1st,2nd,3rd,4th"
bitfld.long 0x0 0.--1. " sGDSIO3 ,priorities sGD" "1st,2nd,3rd,4th"
group ad:0x01E00014++3
line.long 0x0 "I_PMST,IRQ priority of master register"
bitfld.long 0x0 12. "M ,Master operation mode" "RndRob,Fixed"
bitfld.long 0x0 11. " FxmGA ,Operation mode of slave unit mGA" "RndRob,Fixed"
bitfld.long 0x0 10. " FxmGB ,Operation mode of slave unit mGB" "RndRob,Fixed"
bitfld.long 0x0 9. " FxmGC ,Operation mode of slave unit mGC" "RndRob,Fixed"
bitfld.long 0x0 8. " FxmGD ,Operation mode of slave unit mGD" "RndRob,Fixed"
textline " "
bitfld.long 0x0 6.--7. "PMmGA ,priorities mGA" "1st,2nd,3rd,4th"
bitfld.long 0x0 4.--5. " PMmGB ,priorities mGB" "1st,2nd,3rd,4th"
bitfld.long 0x0 2.--3. " PMmGC ,priorities mGC" "1st,2nd,3rd,4th"
bitfld.long 0x0 0.--1. " PMmGD ,priorities mGD" "1st,2nd,3rd,4th"
group ad:0x01E00018++3
line.long 0x0 "I_CSLV,Current IRQ priorities of slave register"
bitfld.long 0x0 30.--31. "sGAEINT0 ,priorities sGA" "1st,2nd,3rd,4th"
bitfld.long 0x0 28.--29. " sGBEINT1 ,priorities sGB" "1st,2nd,3rd,4th"
bitfld.long 0x0 26.--27. " sGCEINT2 ,priorities sGC" "1st,2nd,3rd,4th"
bitfld.long 0x0 24.--25. " sGDEINT3 ,priorities sGD" "1st,2nd,3rd,4th"
textline " "
bitfld.long 0x0 22.--23. "sGAZDMA0 ,priorities sGA" "1st,2nd,3rd,4th"
bitfld.long 0x0 20.--21. " sGBZDMA1 ,priorities sGB" "1st,2nd,3rd,4th"
bitfld.long 0x0 18.--19. " sGCBDMA0 ,priorities sGC" "1st,2nd,3rd,4th"
bitfld.long 0x0 16.--17. " sGDBDMA1 ,priorities sGD" "1st,2nd,3rd,4th"
textline " "
bitfld.long 0x0 14.--15. "sGATIM0 ,priorities sGA" "1st,2nd,3rd,4th"
bitfld.long 0x0 12.--13. " sGBTIM1 ,priorities sGB" "1st,2nd,3rd,4th"
bitfld.long 0x0 10.--11. " sGCTIM2 ,priorities sGC" "1st,2nd,3rd,4th"
bitfld.long 0x0 8.--9. " sGDTIM3 ,priorities sGD" "1st,2nd,3rd,4th"
textline " "
bitfld.long 0x0 6.--7. "sGAURXD0 ,priorities sGA" "1st,2nd,3rd,4th"
bitfld.long 0x0 4.--5. " sGBURXD1 ,priorities sGB" "1st,2nd,3rd,4th"
bitfld.long 0x0 2.--3. " sGCIIC ,priorities sGC" "1st,2nd,3rd,4th"
bitfld.long 0x0 0.--1. " sGDSIO3 ,priorities sGD" "1st,2nd,3rd,4th"
group ad:0x01E0001C++3
line.long 0x0 "I_CMST,Current IRQ priority of master register"
hexmask.long.byte 0x0 8.--13. 1. "VECTOR ,The lower 6 bits of corresponding branch machine code"
bitfld.long 0x0 6.--7. "CMmGA ,priorities mGA" "1st,2nd,3rd,4th"
bitfld.long 0x0 4.--5. " CMmGB ,priorities mGB" "1st,2nd,3rd,4th"
bitfld.long 0x0 2.--3. " CMmGC ,priorities mGC" "1st,2nd,3rd,4th"
bitfld.long 0x0 0.--1. " CMmGD ,priorities mGD" "1st,2nd,3rd,4th"
group ad:0x01E00020++3
line.long 0x0 "I_ISPR,IRQ interrupt service pending register"
bitfld.long 0x0 25. "EINT0 ,Interrupt 0 serviced" "No,Yes"
bitfld.long 0x0 24. " EINT1 ,Interrupt 1 serviced" "No,Yes"
bitfld.long 0x0 23. " EINT2 ,Interrupt 2 serviced" "No,Yes"
bitfld.long 0x0 22. " EINT3 ,Interrupt 3 serviced" "No,Yes"
bitfld.long 0x0 21. " EINT4567 ,Interrupt 4/5/6/7 serviced" "No,Yes"
textline " "
bitfld.long 0x0 20. "INT_TICK ,Interrupt serviced" "No,Yes"
bitfld.long 0x0 19. " INT_ZDMA0 ,Interrupt serviced" "No,Yes"
bitfld.long 0x0 18. " INT_ZDMA1 ,Interrupt serviced" "No,Yes"
bitfld.long 0x0 17. " INT_BDMA0 ,Interrupt serviced" "No,Yes"
textline " "
bitfld.long 0x0 16. "INT_BDMA1 ,Interrupt serviced" "No,Yes"
bitfld.long 0x0 15. " INT_WDT ,Interrupt serviced" "No,Yes"
bitfld.long 0x0 14. " INT_UERR0/1 ,Interrupt serviced" "No,Yes"
bitfld.long 0x0 13. " INT_TIMER0 ,Interrupt serviced" "No,Yes"
textline " "
bitfld.long 0x0 12. "INT_TIMER1 ,Interrupt serviced" "No,Yes"
bitfld.long 0x0 11. " INT_TIMER2 ,Interrupt serviced" "No,Yes"
bitfld.long 0x0 10. " INT_TIMER3 ,Interrupt serviced" "No,Yes"
bitfld.long 0x0 9. " INT_TIMER4 ,Interrupt serviced" "No,Yes"
textline " "
bitfld.long 0x0 8. "INT_TIMER5 ,Interrupt serviced" "No,Yes"
bitfld.long 0x0 7. " INT_URXD0 ,Interrupt serviced" "No,Yes"
bitfld.long 0x0 6. " INT_URXD1 ,Interrupt serviced" "No,Yes"
bitfld.long 0x0 5. " INT_IIC ,Interrupt serviced" "No,Yes"
textline " "
bitfld.long 0x0 4. "INT_SIO ,Interrupt serviced" "No,Yes"
bitfld.long 0x0 3. " INT_UTXD0 ,Interrupt serviced" "No,Yes"
bitfld.long 0x0 2. " INT_UTXD1 ,Interrupt serviced" "No,Yes"
bitfld.long 0x0 1. " INT_RTC ,Interrupt serviced" "No,Yes"
textline " "
bitfld.long 0x0 0. "INT_ADC ,Interrupt serviced" "No,Yes"
group ad:0x01E00024++3
line.long 0x0 "I_ISPC,IRQ interrupt service pending clear register"
bitfld.long 0x0 25. "EINT0 ,Interrupt 0 clear service bit" "No,Yes"
bitfld.long 0x0 24. " EINT1 ,Interrupt 1 clear service bit" "No,Yes"
bitfld.long 0x0 23. " EINT2 ,Interrupt 2 clear service bit" "No,Yes"
bitfld.long 0x0 22. " EINT3 ,Interrupt 3 clear service bit" "No,Yes"
bitfld.long 0x0 21. " EINT4567 ,Interrupt 4/5/6/7 clear service bit" "No,Yes"
textline " "
bitfld.long 0x0 20. "INT_TICK ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 19. " INT_ZDMA0 ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 18. " INT_ZDMA1 ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 17. " INT_BDMA0 ,Interrupt clear service bit" "No,Yes"
textline " "
bitfld.long 0x0 16. "INT_BDMA1 ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 15. " INT_WDT ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 14. " INT_UERR0/1 ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 13. " INT_TIMER0 ,Interrupt clear service bit" "No,Yes"
textline " "
bitfld.long 0x0 12. "INT_TIMER1 ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 11. " INT_TIMER2 ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 10. " INT_TIMER3 ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 9. " INT_TIMER4 ,Interrupt clear service bit" "No,Yes"
textline " "
bitfld.long 0x0 8. "INT_TIMER5 ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 7. " INT_URXD0 ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 6. " INT_URXD1 ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 5. " INT_IIC ,Interrupt clear service bit" "No,Yes"
textline " "
bitfld.long 0x0 4. "INT_SIO ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 3. " INT_UTXD0 ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 2. " INT_UTXD1 ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 1. " INT_RTC ,Interrupt clear service bit" "No,Yes"
textline " "
bitfld.long 0x0 0. "INT_ADC ,Interrupt clear service bit" "No,Yes"
group ad:0x01E0003C++3
line.long 0x0 "F_ISPC,FIQ interrupt service pending clear register"
bitfld.long 0x0 25. "EINT0 ,Interrupt 0 clear service bit" "No,Yes"
bitfld.long 0x0 24. " EINT1 ,Interrupt 1 clear service bit" "No,Yes"
bitfld.long 0x0 23. " EINT2 ,Interrupt 2 clear service bit" "No,Yes"
bitfld.long 0x0 22. " EINT3 ,Interrupt 3 clear service bit" "No,Yes"
bitfld.long 0x0 21. " EINT4567 ,Interrupt 4/5/6/7 clear service bit" "No,Yes"
textline " "
bitfld.long 0x0 20. "INT_TICK ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 19. " INT_ZDMA0 ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 18. " INT_ZDMA1 ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 17. " INT_BDMA0 ,Interrupt clear service bit" "No,Yes"
textline " "
bitfld.long 0x0 16. "INT_BDMA1 ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 15. " INT_WDT ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 14. " INT_UERR0/1 ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 13. " INT_TIMER0 ,Interrupt clear service bit" "No,Yes"
textline " "
bitfld.long 0x0 12. "INT_TIMER1 ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 11. " INT_TIMER2 ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 10. " INT_TIMER3 ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 9. " INT_TIMER4 ,Interrupt clear service bit" "No,Yes"
textline " "
bitfld.long 0x0 8. "INT_TIMER5 ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 7. " INT_URXD0 ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 6. " INT_URXD1 ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 5. " INT_IIC ,Interrupt clear service bit" "No,Yes"
textline " "
bitfld.long 0x0 4. "INT_SIO ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 3. " INT_UTXD0 ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 2. " INT_UTXD1 ,Interrupt clear service bit" "No,Yes"
bitfld.long 0x0 1. " INT_RTC ,Interrupt clear service bit" "No,Yes"
textline " "
bitfld.long 0x0 0. "INT_ADC ,Interrupt clear service bit" "No,Yes"
tree.end
; LCD-Controller
tree "Liquid Crystal Display (LCD) Controller"
rgroup ad:0x01F00000++3
line.long 0x0 "LDCON11,LCD control 1 register part 1"
hexmask.long.word 0x0 22.--31. 1. "LINECNT ,Status of the linecounter"
group ad:0x01F00000++3
line.long 0x0 "LDCON12,LCD control 1 register part 2"
hexmask.long.word 0x0 12.--21. 1. "CLKVAL ,Rate of VCLK"
bitfld.long 0x0 10.--11. " WLH ,VLINE pulse's high level width" "4clock,8clock,12clock,16clock"
bitfld.long 0x0 8.--9. " WDLY ,Delay between VLINE and VCLK" "4clock,8clock,12clock,16clock"
bitfld.long 0x0 7. " MMODE ,Delay between VLINE and VCLK" "Each,MVAL"
textline " "
bitfld.long 0x0 5.--6. "DISMODE ,Select the display mode." "4bitdual,4bitsingl,8bitsingle,NU"
bitfld.long 0x0 4. " INVCLK ,controls the polarity of the VCLK active edge" "Falling,Rising"
bitfld.long 0x0 3. " INVLINE ,Indicates the line pulse polarity" "Normal,Inverted"
textline " "
bitfld.long 0x0 2. "INVFRAME ,Indicates the frame pulse polarity" "Normal,Inverted"
bitfld.long 0x0 1. " INVVD ,Indicates the video data polarity" "Normal,Inverted"
bitfld.long 0x0 0. " ENVID ,LCD video output and the logic enable/disable" "Dis,Ena"
group ad:0x01F00004++3
line.long 0x0 "LDCON2,LCD control 2 register"
hexmask.long.word 0x0 22.--31. 1. "LINEBLANK ,Status of the linecounter"
hexmask.long.word 0x0 10.--20. 1. " HOZVAL ,Horizontal size of the LCD panel"
hexmask.long.word 0x0 0.--9. 1. " LINEVAL ,Determine the vertical size of LCD panel"
group ad:0x01F00040++3
line.long 0x0 "LDCON3,LCD control 3 register"
bitfld.long 0x0 0. "SELFREF ,LCD self refresh mode enable bit" "Dis,Ena"
group ad:0x01F00008++3
line.long 0x0 "LCDSADR1,Frame buffer start address 1 register"
bitfld.long 0x0 27.--28. "MODESEL ,Select the monochrome, gray, or color mode" "mono,4lvlgray,16lvlgray,color"
hexmask.long.byte 0x0 21.--26. 1. " LCDBANK ,Indicate A[27:22] of the bank location for video"
hexmask.long 0x0 0.--20. 1. " LCDBASEU ,Indicate A[21:1] of the start address of the upper address counter"
group ad:0x01F0000C++3
line.long 0x0 "LCDSADR2,Frame buffer start address 2 register"
bitfld.long 0x0 29. "BSWP ,Byte swap control bit" "Ena,Dis"
hexmask.long.byte 0x0 21.--28. 1. " MVAL ,Define the rate at which the VM signal will toggle"
hexmask.long 0x0 0.--20. 1. " LCDBASEL ,Indicate A[21:1] of the start address of the lower address counter"
group ad:0x01F00010++3
line.long 0x0 "LCDSADR2,Virtual screen address set"
hexmask.long.word 0x0 9.--19. 1. "OFFSIZE ,Virtual screen offset size"
hexmask.long.word 0x0 0.--8. 1. " PAGEWIDTH ,Virtual screen page width"
group ad:0x01F00014++3
line.long 0x0 "REDLUT,Red lookup table register"
hexmask.long 0x0 0.--31. 1. "REDVAL ,Define which of the 16 shades each of the 8 possible red combinations will choose"
group ad:0x01F00018++3
line.long 0x0 "GREENLUT,Green lookup table register"
hexmask.long 0x0 0.--31. 1. "GREENVAL ,Define which of the 16 shades each of the 8 possible green combinations will choose"
group ad:0x01F0001C++3
line.long 0x0 "BLUELUT,Blue lookup table register"
hexmask.long.word 0x0 0.--15. 1. "BLUEVAL ,Define which of the 16 shades each of the 8 possible blue combinations will choose"
group ad:0x01F00020++3
line.long 0x0 "DP1_2,Dithering pattern duty 1/2 register"
;hexmask.long.word 0x0 0.--15. 1. "DP1_2 ,Dithering pattern duty"
group ad:0x01F00024++3
line.long 0x0 "DP4_7,Dithering pattern duty 4/7 register"
;hexmask.long 0x0 0.--27. 1. "DP4_7 ,Dithering pattern duty"
group ad:0x01F00028++3
line.long 0x0 "DP3_5,Dithering pattern duty 3/5 register"
;hexmask.long 0x0 0.--19. 1. "DP3_5 ,Dithering pattern duty"
group ad:0x01F0002C++3
line.long 0x0 "DP2_3,Dithering pattern duty 2/3 register"
;hexmask.long.word 0x0 0.--11. 1. "DP2_3 ,Dithering pattern duty"
group ad:0x01F00030++3
line.long 0x0 "DP5_7,Dithering pattern duty 5/7 register"
;hexmask.long 0x0 0.--27. 1. "DP5_7 ,Dithering pattern duty"
group ad:0x01F00034++3
line.long 0x0 "DP3_4,Dithering pattern duty 3/4 register"
;hexmask.long.word 0x0 0.--15. 1. "DP3_4 ,Dithering pattern duty"
group ad:0x01F00038++3
line.long 0x0 "DP4_5,Dithering pattern duty 4/5 register"
;hexmask.long.word 0x0 0.--19. 1. "DP4_5 ,Dithering pattern duty"
group ad:0x01F0003C++3
line.long 0x0 "DP6_7,Dithering pattern duty 6/7 register"
;hexmask.long 0x0 0.--27. 1. "DP6_7 ,Dithering pattern duty"
group ad:0x01F00044++3
line.long 0x0 "DITHMODE,Dithering Mode Register"
;hexmask.long 0x0 0.--18. 1. "DITHMODE ,Dithering mode value"
tree.end
; A/D-Converter
tree "Analogue/Digital (A/D) Converter"
group ad:0x01D40000++1
line.word 0x0 "ADCCON1 ,A/D Converter control Register part 1"
bitfld.word 0x0 6. "FLAG ,A/D converter state flag" "Prc,End"
bitfld.word 0x0 5. " SLEEP ,System power down" "Norm,Sleep"
bitfld.word 0x0 2.--4. " INPUTSELECT ,Clock source select" "AIN0,AIN1,AIN2,AIN3,AIN4,AIN5,AIN6,AIN7"
bitfld.word 0x0 1. " READ_START ,A/D conversion start by read" "Dis,Ena"
textline " "
bitfld.word 0x0 0. "ENABLE_START ,A/D conversion start by enable" "NoOp,Start"
group ad:0x01D40004++1
line.word 0x0 "ADCPSR1,A/D Converter prescaler Register"
hexmask.word.byte 0x0 0.--7. 1. "PRESCALER , Prescaler value"
group ad:0x01D40008++1
line.word 0x0 "ADCDAT1,A/D converter data register"
hexmask.word 0x0 0.--9. 1. "ADCDAT ,A/D converter data register"
tree.end
; Real Time Clock
tree "Real Time Clock (RTC)"
if (d.l(d:0x01C80000)&0x00000001)==0x0
group ad:0x01D70040++0
line.byte 0x0 "RTCCON,RTC control Register"
bitfld.byte 0x0 3. "CLKRST ,RTC clock count reset" "No,Yes"
bitfld.byte 0x0 2. " CNTSEL ,BCD count select" "Merge,Separate"
bitfld.byte 0x0 1. " CLKSEL ,BCD clock speed" "XTAL1/2,XTAL"
bitfld.byte 0x0 0. " RTCEN ,RTC read/write enable" "Dis,Ena"
group ad:0x01D70050++0
line.byte 0x0 "RTCCALM,RTC alarm control Register"
bitfld.byte 0x0 6. "ALMEN ,Alarm global enable " "Dis,Ena"
bitfld.byte 0x0 5. " YEAREN ,Year alarm enable" "Dis,Ena"
bitfld.byte 0x0 4. " MONEN ,Month alarm enable" "Dis,Ena"
bitfld.byte 0x0 3. " DAYEN ,Day alarm enable" "Dis,Ena"
textline " "
bitfld.byte 0x0 2. "HOUREN ,Hour alarm enable" "Dis,Ena"
bitfld.byte 0x0 1. " MINEN ,Minute alarm enable" "Dis,Ena"
bitfld.byte 0x0 0. " SECEN ,Second alarm enable" "Dis,Ena"
group ad:0x01D70054++0
line.byte 0x0 "ALMSEC,Alarm second data register"
bitfld.byte 0x0 4.--6. "SECDATA ,BCD value for alarm second 0 to 5" "000,001,010,011,100,101,110,111"
bitfld.byte 0x0 0.--3. " SECDATA2 ,BCD value for alarm second 0 to 9" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
group ad:0x01D70058++0
line.byte 0x0 "ALMMIN,Alarm minute data register"
bitfld.byte 0x0 4.--6. "MINDATA , BCD value for alarm minute 0 to 5" "000,001,010,011,100,101,110,111"
bitfld.byte 0x0 0.--3. " MINDATA2 ,BCD value for alarm minute 0 to 9" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
group ad:0x01D7005C++0
line.byte 0x0 "ALMHOUR,Alarm hour data register"
bitfld.byte 0x0 4.--5. "HOURDATA ,BCD value for alarm hour 0 to 2" "00,01,10,11"
bitfld.byte 0x0 0.--3. " HOURATA2 ,BCD value for alarm hour 0 to 9" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
group ad:0x01D70060++0
line.byte 0x0 "ALMDAY,Alarm day data register"
bitfld.byte 0x0 4.--5. "DAYDATA ,BCD value for alarm day 0 to 3" "00,01,10,11"
bitfld.byte 0x0 0.--3. " DAYDATA2 ,BCD value for alarm day 0 to 9" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
group ad:0x01D70064++0
line.byte 0x0 "ALMMON,Alarm month data register"
bitfld.byte 0x0 4. "MONATA ,BCD value for alarm month 0 to 1" "0,1"
bitfld.byte 0x0 0.--3. " MONDATA2 ,BCD value for alarm month 0 to 9" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
group ad:0x01D70068++0
line.byte 0x0 "ALMYEAR,Alarm year data register"
hexmask.byte 0x0 0.--7. 1. "YEARDATA ,BCD value for alarm year 00 to 99"
group ad:0x01D7006C++0
line.byte 0x0 "RTCRST,RTC round reset Register"
bitfld.byte 0x0 3. "SRSTEN ,Round second reset enable" "Dis,Ena"
bitfld.byte 0x0 0.--2. " SECCR , Round boundary for second carry generation" "-,-,-,30s,40s,50s,-,-"
group ad:0x01D70070++0
line.byte 0x0 "BCDSEC,BCD second register"
bitfld.byte 0x0 4.--6. "SECDATA , BCD value for second 0 to 5" "000,001,010,011,100,101,110,111"
bitfld.byte 0x0 0.--3. " SECATA2 ,BCD value for second 0 to 9" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
group ad:0x01D70074++0
line.byte 0x0 "BCDMIN,BCD minute data register"
bitfld.byte 0x0 4.--6. "MINDATA , BCD value for minute 0 to 5" "000,001,010,011,100,101,110,111"
bitfld.byte 0x0 0.--3. " MINDATA2 ,BCD value for minute 0 to 9" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
group ad:0x01D70078++0
line.byte 0x0 "BCDHOUR,BCD hour data register"
bitfld.byte 0x0 4.--5. "HOURDATA ,BCD value for hour 0 to 2" "00,01,10,11"
bitfld.byte 0x0 0.--3. " HOURATA2 ,BCD value for hour 0 to 9" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
group ad:0x01D7007C++0
line.byte 0x0 "BCDDAY,BCD day data register"
bitfld.byte 0x0 4.--5. "DAYDATA ,BCD value for day 0 to 3" "00,01,10,11"
bitfld.byte 0x0 0.--3. " DAYDATA2 ,BCD value for day 0 to 9" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
group ad:0x01D70080++0
line.byte 0x0 "BCDDATE,BCD date data register"
bitfld.byte 0x0 0.--2. "DATEDATA ,BCD value for date 0 to 7" "000,001,010,011,100,101,110,111"
group ad:0x01D70084++0
line.byte 0x0 "BCDMON,BCD month data register"
bitfld.byte 0x0 4. "MONATA ,BCD value for month 0 to 1" "0,1"
bitfld.byte 0x0 0.--3. " MONDATA2 ,BCD value for month 0 to 9" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
group ad:0x01D70088++3
line.byte 0x0 "BCDYEAR,BCD year data register"
hexmask.byte 0x0 0.--7. 1. "BCDDATA ,BCD value for year 00 to 99"
group ad:0x01D7008C++3
line.byte 0x0 "TICNT,Tick time count register"
bitfld.byte 0x0 7. "TICKINTE ,Tick time interrupt enable" "Dis,Ena"
hexmask.byte 0x0 0.--6. 1. " TICKTMCNT ,Tick time count value 1-127"
else
group ad:0x01D70043++0
line.byte 0x0 "RTCCON,RTC control Register"
bitfld.byte 0x0 3. "CLKRST ,RTC clock count reset" "No,Yes"
bitfld.byte 0x0 2. " CNTSEL ,BCD count select" "Merge,Separate"
bitfld.byte 0x0 1. " CLKSEL ,BCD clock speed" "XTAL1/2,XTAL"
bitfld.byte 0x0 0. " RTCEN ,RTC read/write enable" "Dis,Ena"
group ad:0x01D70053++0
line.byte 0x0 "RTCCALM,RTC alarm control Register"
bitfld.byte 0x0 6. "ALMEN ,Alarm global enable " "Dis,Ena"
bitfld.byte 0x0 5. " YEAREN ,Year alarm enable" "Dis,Ena"
bitfld.byte 0x0 4. " MONEN ,Month alarm enable" "Dis,Ena"
bitfld.byte 0x0 3. " DAYEN ,Day alarm enable" "Dis,Ena"
textline " "
bitfld.byte 0x0 2. "HOUREN ,Hour alarm enable" "Dis,Ena"
bitfld.byte 0x0 1. " MINEN ,Minute alarm enable" "Dis,Ena"
bitfld.byte 0x0 0. " SECEN ,Second alarm enable" "Dis,Ena"
group ad:0x01D70057++0
line.byte 0x0 "ALMSEC,Alarm second data register"
bitfld.byte 0x0 4.--6. "SECDATA ,BCD value for alarm second 0 to 5" "000,001,010,011,100,101,110,111"
bitfld.byte 0x0 0.--3. " SECDATA2 ,BCD value for alarm second 0 to 9" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
group ad:0x01D7005B++0
line.byte 0x0 "ALMMIN,Alarm minute data register"
bitfld.byte 0x0 4.--6. "MINDATA , BCD value for alarm minute 0 to 5" "000,001,010,011,100,101,110,111"
bitfld.byte 0x0 0.--3. " MINDATA2 ,BCD value for alarm minute 0 to 9" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
group ad:0x01D7005F++0
line.byte 0x0 "ALMHOUR,Alarm hour data register"
bitfld.byte 0x0 4.--5. "HOURDATA ,BCD value for alarm hour 0 to 2" "00,01,10,11"
bitfld.byte 0x0 0.--3. " HOURATA2 ,BCD value for alarm hour 0 to 9" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
group ad:0x01D70063++0
line.byte 0x0 "ALMDAY,Alarm day data register"
bitfld.byte 0x0 4.--5. "DAYDATA ,BCD value for alarm day 0 to 3" "00,01,10,11"
bitfld.byte 0x0 0.--3. " DAYDATA2 ,BCD value for alarm day 0 to 9" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
group ad:0x01D70067++0
line.byte 0x0 "ALMMON,Alarm month data register"
bitfld.byte 0x0 4. "MONATA ,BCD value for alarm month 0 to 1" "0,1"
bitfld.byte 0x0 0.--3. " MONDATA2 ,BCD value for alarm month 0 to 9" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
group ad:0x01D7006B++0
line.byte 0x0 "ALMYEAR,Alarm year data register"
hexmask.byte 0x0 0.--7. 1. "YEARDATA ,BCD value for alarm year 00 to 99"
group ad:0x01D7006F++0
line.byte 0x0 "RTCRST,RTC round reset Register"
bitfld.byte 0x0 3. "SRSTEN ,Round second reset enable" "Dis,Ena"
bitfld.byte 0x0 0.--2. " SECCR , Round boundary for second carry generation" "-,-,-,30s,40s,50s,-,-"
group ad:0x01D70073++0
line.byte 0x0 "BCDSEC,BCD second register"
bitfld.byte 0x0 4.--6. "SECDATA , BCD value for second 0 to 5" "000,001,010,011,100,101,110,111"
bitfld.byte 0x0 0.--3. " SECATA2 ,BCD value for second 0 to 9" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
group ad:0x01D70077++0
line.byte 0x0 "BCDMIN,BCD minute data register"
bitfld.byte 0x0 4.--6. "MINDATA , BCD value for minute 0 to 5" "000,001,010,011,100,101,110,111"
bitfld.byte 0x0 0.--3. " MINDATA2 ,BCD value for minute 0 to 9" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
group ad:0x01D7007B++0
line.byte 0x0 "BCDHOUR,BCD hour data register"
bitfld.byte 0x0 4.--5. "HOURDATA ,BCD value for hour 0 to 2" "00,01,10,11"
bitfld.byte 0x0 0.--3. " HOURATA2 ,BCD value for hour 0 to 9" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
group ad:0x01D7007F++0
line.byte 0x0 "BCDDAY,BCD day data register"
bitfld.byte 0x0 4.--5. "DAYDATA ,BCD value for day 0 to 3" "00,01,10,11"
bitfld.byte 0x0 0.--3. " DAYDATA2 ,BCD value for day 0 to 9" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
group ad:0x01D70083++0
line.byte 0x0 "BCDDATE,BCD date data register"
bitfld.byte 0x0 0.--2. "DATEDATA ,BCD value for date 0 to 7" "000,001,010,011,100,101,110,111"
group ad:0x01D70087++0
line.byte 0x0 "BCDMON,BCD month data register"
bitfld.byte 0x0 4. "MONATA ,BCD value for month 0 to 1" "0,1"
bitfld.byte 0x0 0.--3. " MONDATA2 ,BCD value for month 0 to 9" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
group ad:0x01D7008B++0
line.byte 0x0 "BCDYEAR,BCD year data register"
hexmask.byte 0x0 0.--7. 1. "BCDDATA ,BCD value for year 00 to 99"
group ad:0x01D7008F++0
line.byte 0x0 "TICNT,Tick time count register"
bitfld.byte 0x0 7. "TICKINTE ,Tick time interrupt enable" "Dis,Ena"
hexmask.byte 0x0 0.--6. 1. " TICKTMCNT ,Tick time count value 1-127"
endif
tree.end
;Watchdog timer
tree "Watchdog Timer"
group ad:0x01D30000++3
line.long 0x0 "WTCON,Watchdog timer control register"
hexmask.long.byte 0x0 8.--15. 1. "PV ,Prescaler value"
bitfld.long 0x0 5. " WTED ,Enable or disable watchdog timer" "Dis,Ena"
bitfld.long 0x0 3.--4. " CS ,Clock division factor" "1/16,1/32,1/64,1/128"
bitfld.long 0x0 2. " IED ,Enable or disable interrupt" "Dis,Ena"
bitfld.long 0x0 0. " RED ,Enable or disable reset" "Dis,Ena"
group ad:0x01D3004++3
line.long 0x0 "WTDAT,Watchdog timer data register"
hexmask.long.word 0x0 0.--15. 1. "CRV ,Watchdog timer count value for reload"
group ad:0x01D3008++3
line.long 0x0 "WTCNT,Watchdog timer count register"
hexmask.long.word 0x0 0.--15. 1. "CV ,Watchdog timer current count value"
tree.end
;IIC-Bus interface
tree "IIC-Bus Interface"
group ad:0x01D60000++3
line.long 0x0 "IICCON,IIC-Bus control register"
bitfld.long 0x0 7. "AE ,IIC-Bus acknowledge enable bit" "Dis,Ena"
bitfld.long 0x0 6. " TxCSS ,Source clock of IIC-Bus transmit clock prescaler" "FMCLK/16,FMCLK/512"
bitfld.long 0x0 5. " TxRxIE ,IIC-Bus Tx/Rx interrupt enable bit" "Dis,Ena"
bitfld.long 0x0 4. " IPF ,IIC-Bus Tx/Rx interrupt pending flag" "NoPending,Pending"
bitfld.long 0x0 0.--3. " TCV ,IIC-Bus transmit clock prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group ad:0x001D60004++3
line.long 0x0 "IICSTAT,IIC-Bus control/status register"
bitfld.long 0x0 6.--7. "MODE ,IIC-Bus master/slave Tx/Rx mode select" "SlRcv,SlTrm,MaRcv,MaTrm"
bitfld.long 0x0 5. " BSSSSC ,IIC-Bus busy signal status" "NrBsy,Bsy"
textline " "
bitfld.long 0x0 4. "SOE ,IIC-Bus data output enable/disable bit" "Dis,Ena"
bitfld.long 0x0 3. " ASF ,IIC-Bus arbitration procedure status flag" "Suc,Fail"
bitfld.long 0x0 2. " ASSF ,IIC-Bus address as slave status flag" "Clrd,Rcvd"
bitfld.long 0x0 1. " AZSF ,IIC-Bus address zero status flag" "Clrd,Rcvd"
bitfld.long 0x0 0. " LRB ,IIC-Bus last received status flag" "Rcvd,NotRcvd"
group ad:0x01D60008++3
line.long 0x0 "IICADD,IIC-Bus address register"
hexmask.long.byte 0x0 0.--7. 1. "SA ,7-bit slave address"
group ad:0x01D6000C++3
line.long 0x0 "IICDS,IIC-Bus transmit/receive data shift register"
hexmask.long.byte 0x0 0.--7. 1. "DS ,8-bit data shift register for IIC-Bus"
tree.end
;IIS-Bus interface
tree "IIS-Bus Interface"
group ad:0x01D18000++1
line.word 0x0 "IISCON,IIS control register"
bitfld.word 0x0 8. "LRCI ,Channel index" "Left,Right"
bitfld.word 0x0 7. " TFIFORF ,Transmit FIFO ready flag" "NotRdy,Rdy"
bitfld.word 0x0 6. " RFIFORF ,Receive FIFO ready flag" "NotRdy,Rdy"
bitfld.word 0x0 5. " TDSRE ,Transmit DMA service request enable" "Dis,Ena"
bitfld.word 0x0 4. " RDSRE ,Receive DMA service request enable" "Dis,Ena"
textline " "
bitfld.word 0x0 3. "TCIC ,Transmit channel idle command" "IISLRCK,NtIISLRCK"
bitfld.word 0x0 2. " RCIC ,Receive channel idle command" "IISLRCK,NtIISLRCK"
bitfld.word 0x0 1. " IISPE ,IIS prescaler endable" "Dis,Ena"
bitfld.word 0x0 0. " IISIE ,IIS interface enable" "Dis,Ena"
group ad:0x1D18004++1
line.word 0x0 "IISMOD,IIS mode register"
bitfld.word 0x0 8. "MSMS ,Master/slave mode select" "Master,Slave"
bitfld.word 0x0 6.--7. " TRMS ,Transmit/receive mode select" "NoTrsf,RcvMd,TrMd,TrARcvMd"
bitfld.word 0x0 5. " ALLRC ,Active level of left/right channel" "Low,High"
bitfld.word 0x0 4. " SIF ,Serial interface format" "IIS,MSB"
bitfld.word 0x0 3. " SDBPC ,Serial data bit per channel" "8bit,16bit"
textline " "
bitfld.word 0x0 2. "MCFS ,Master clock frequency select" "256fs,384fs"
bitfld.word 0x0 0.--1. " SBCFS ,Serial bit clock frequency select" "16fs,32fs,48fs,N/A"
group ad:0x01D18008++1
line.word 0x0 "IISPSR,IIS prescaler register"
bitfld.word 0x0 4.--7. "PVA ,Prescaler division factor for the prescaler A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.word 0x0 0.--3. "PVB ,Prescaler division factor for the prescaler B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group ad:0x01D1800C++1
line.word 0x0 "IISFCON,IIS FIFO interface register"
bitfld.word 0x0 11. "TFAMS ,Transmit FIFO access mode select" "Norm,DMA"
bitfld.word 0x0 10. " RFAMS ,Receive FIFO access mode select" "Norm,DMA"
bitfld.word 0x0 9. " TFE ,Transmit FIFO enable" "Dis,Ena"
bitfld.word 0x0 8. " RFE ,Receive FIFO enable" "Dis,Ena"
bitfld.word 0x0 4.--7. " TFDC ,Transmit FIFO data count" "0,1,2,3,4,5,6,7,8,-,-,-,-,-,-,-"
bitfld.word 0x0 0.--3. " RFDC ,Receive FIFO data count" "0,1,2,3,4,5,6,7,8,-,-,-,-,-,-,-"
if (d.l(d:0x01C80000)&0x00000001)==0x0
group ad:0x01D18010++1
line.word 0x0 "IISFIF,IIS FIFO register(Little endian)"
hexmask.word 0x0 0.--15. 1. "FENTRY ,Transmit/Receive data for IIS"
else
group ad:0x01D18012++1
line.word 0x0 "IISFIF,IIS FIFO register(Big endian)"
hexmask.word 0x0 0.--15. 1. "FENTRY ,Transmit/Receive data for IIS"
endif
tree.end
;Synchronous I/O
tree "Synchronous I/O"
group ad:0x01D14000++3
line.long 0x0 "SIOCON,SIO control register"
bitfld.long 0x0 7. "CSS ,SIO shift control select" "Int,Ext"
bitfld.long 0x0 6. " DD ,MSB or LSB transmitted first" "MSB,LSB"
bitfld.long 0x0 5. " TxRxSEL ,Transmit selection enabled" "Rcv,Trm"
bitfld.long 0x0 4. " CES ,Determines the clock to be used for serial transmit or receive operation" "Falling,Rising"
bitfld.long 0x0 3. " SIOS ,SIO function running or stopped" "Falling,Rising"
textline " "
bitfld.long 0x0 2. "SO ,Determines SIO shift operation" "NoAct,Clear"
bitfld.long 0x0 0.--1. " SIOMS ,Determines how and by what SIODATA read/written" "NoOp,IRQ,?..."
group ad:0x01D14004++3
line.long 0x0 "SIODAT,SIO data register"
hexmask.long.byte 0x0 0.--7. 1. "SIODATA ,Data to be transmitted or received"
group ad:0x01D14008++3
line.long 0x0 "SBRDR,SIO baud rate prescaler register"
hexmask.long.word 0x0 0.--11. 1. "SBRDR ,Contains the prescaler value for the baud rate"
group ad:0x01D1400C++3
line.long 0x0 "IVTCNT,SIO interval counter register"
hexmask.long.byte 0x0 0.--7. 1. "IVTCNT ,SIO interval counter register"
group ad:0x01D14010++3
line.long 0x0 "DCNTZ,SIO dma count zero register"
bitfld.long 0x0 1. "DCNTZ1 ,SIO BDMA1 service request" "Ena,Dis"
bitfld.long 0x0 0. " DCNTZ0 ,SIO BDMA0 service request" "Ena,Dis"
tree.end
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