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Gen4_R-Car_Trace32/2_Trunk/peromap5910a.per
woody d411edd9b4 add Trace32 File
2025-10-14 09:52:32 +09:00

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; --------------------------------------------------------------------------------
; @Title: OMAP5910 On-Chip Peripherals
; @Props: Released
; @Author: WOJ
; @Changelog: 2006-01-18 WOJ
; @Manufacturer: TI - Texas Instruments
; @Doc: SPRS197D.pdf; omap5910.pdf
; @Core: ARM, TI925T
; @Chip: OMAP5910
; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: peromap5910a.per 7592 2017-02-18 13:54:14Z askoncej $
config 16. 8.
base ad:0x00000000
tree "ARM Core Registers"
width 8.
tree "ID Registers"
group c15:0x0000--0x0000
line.long 0x0 "MIDR,Identity Code"
hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer"
hexmask.long.byte 0x0 20.--23. 0x1 " SPEC ,Specification Revision"
hexmask.long.byte 0x0 16.--19. 0x1 " ARCH ,Architecture Version"
hexmask.long.word 0x0 4.--15. 0x1 " PARTNUM ,Part Number"
hexmask.long.byte 0x0 0.--3. 0x01 " REV ,Layout Revision"
group c15:0x0100--0x0100
line.long 0x0 "CTR,Cache Type"
bitfld.long 0x0 25.--28. " CLASS ,Cache Class" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
bitfld.long 0x0 24. " H ,Cache Havardness" "no,yes"
textline " "
bitfld.long 0x0 18.--21. " DSIZE ,Data Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..."
bitfld.long 0x0 15.--17. " DASS ,Data Cache Associativity" "dir,2,4,8,16,32,64,128"
bitfld.long 0x0 14. " DM ,Data Cache Multiplier Bit" "0,1"
bitfld.long 0x0 12.--13. " DLENGTH ,Data Cache Line Length" "2,4,8,16"
textline " "
bitfld.long 0x0 6.--9. " ISIZE ,Instruction Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..."
bitfld.long 0x0 3.--5. " IASS ,Instruction Cache Associativity" "dir,2,4,8,16,32,64,128"
bitfld.long 0x0 2. " IM ,Instruction Cache Multiplier Bit" "0,1"
bitfld.long 0x0 0.--1. " ILENGTH ,Instruction Cache Line Length" "2,4,8,16"
tree.end
tree "MMU Control and Configuration"
width 8.
group c15:0x1--0x1
line.long 0x0 "CR,Control Register"
bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
textline " "
bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disable,Enable"
bitfld.long 0x0 0x9 " R ,ROM Protection" "Disable,Enable"
bitfld.long 0x0 0x8 " S ,System Protection" "Disable,Enable"
bitfld.long 0x0 0x7 " B ,Endianism" "Little,Big"
textline " "
bitfld.long 0x0 0x3 " W ,Write Buffer" "Disable,Enable"
bitfld.long 0x0 0x2 " C ,Cache" "Disable,Enable"
bitfld.long 0x0 0x1 " A ,Alignment Fault" "Disable,Enable"
bitfld.long 0x0 0x0 " M ,MMU" "Disable,Enable"
textline " "
group c15:0x2--0x2
line.long 0x0 "TTBR,Translation Table Base Register"
hexmask.long 0x0 14.--31. 0x4000 " TTBA ,Translation Table Base Address"
textline " "
group c15:0x3--0x3
line.long 0x0 "DACR,Domain Access Control Register"
bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager"
textline " "
bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager"
textline " "
bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager"
textline " "
bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager"
textline " "
group c15:0x5--0x5
line.long 0x0 "FSR,Fault Status Register"
bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page"
group c15:0x6--0x6
line.long 0x0 "FAR,Fault Address Register"
textline " "
group c15:0x0d--0x0d
line.long 0x0 "PID,Process Identifier"
group c15:0x4f--0x4f
line.long 0x0 "TID,Thread ID"
tree.end
tree "Cache Control and Configuration"
group c15:0x1f--0x1f
line.long 0x0 "CONFIG,ARM 925T Configuration"
bitfld.long 0x0 0x7 " S ,Instruction Cache Streaming" "streaming,non-streaming"
bitfld.long 0x0 0x5 " O ,OS configuration" "WinCE,ARM915T"
bitfld.long 0x0 0x2 " C ,D-Cache clean and flush entry mode" "no,yes"
bitfld.long 0x0 0x1 " T ,Transparent Mode" "no,yes"
bitfld.long 0x0 0x0 " L ,Lock enable" "no,yes"
group c15:0x3f--0x3f
line.long 0x0 "I_MIN,D-Cache Min dirty index"
group c15:0x2f--0x2f
line.long 0x0 "I_MAX,D-Cache Max dirty index"
wgroup c15:0x8f--0x8f
line.long 0x0 "STATUS,ARM 925T Status"
in
tree.end
tree "ICEbreaker"
width 8.
group ice:0x0--0x5 "Debug Control"
line.long 0x0 "DBGCTRL,Debug Control Register"
bitfld.long 0x0 0x5 " ICE ,EmbeddedICE Disable" "enabled,disabled"
bitfld.long 0x0 0x4 " MONITOR ,Monitor Mode Enable" "disabled,enabled"
textline " "
bitfld.long 0x0 0x3 " STEP ,Single Step" "disabled,enabled"
bitfld.long 0x0 0x2 " INTDIS ,Interrupts Disable" "enabled,disabled"
bitfld.long 0x0 0x1 " DBGRQ ,Debug Request" "no,yes"
bitfld.long 0x0 0x0 " DBGACK ,Debug Acknowledge" "no,yes"
line.long 0x4 "DBGSTAT,Debug Status Register"
bitfld.long 0x4 0x6--0x9 " MOE ,Method of Entry" "no,BP0,BP1,BPsoft,Vector,BPext,WP0,WP1,WPext,AsyncInt,AsyncExt,Reentry,res,res,res,res"
bitfld.long 0x4 0x5 " IJBIT ,IJBIT" "0,java"
bitfld.long 0x4 0x4 " ITBIT ,ITBIT" "0,thumb"
bitfld.long 0x4 0x3 " SYSCOMP ,SYSCOMP" "0,1"
bitfld.long 0x4 0x2 " IFEN ,Interrupts Enable" "disabled,enabled"
bitfld.long 0x4 0x1 " DBGRQ ,Debug Request" "no,yes"
bitfld.long 0x4 0x0 " DBGACK ,Debug Acknowledge" "no,yes"
line.long 0x8 "VECTOR,Vector Catch Register"
bitfld.long 0x8 0x7 " FIQ ,FIQ" "dis,ena"
bitfld.long 0x8 0x6 " IRQ ,IRQ" "dis,ena"
bitfld.long 0x8 0x4 " D_ABO ,D_ABORT" "dis,ena"
bitfld.long 0x8 0x3 " P_ABO ,P_ABORT" "dis,ena"
bitfld.long 0x8 0x2 " SWI ,SWI" "dis,ena"
bitfld.long 0x8 0x1 " UND ,UNDEF" "dis,ena"
bitfld.long 0x8 0x0 " RES ,RESET" "dis,ena"
line.long 0x10 "COMCTRL,Debug Communication Control Register"
bitfld.long 0x10 28.--31. " VERSION ,Version Number" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
bitfld.long 0x10 0x1 " WRITE ,Write Register Free" "idle,pend"
bitfld.long 0x10 0x0 " READ ,Read Register Free" "idle,pend"
line.long 0x14 "COMDATA,Debug Communication Data Register"
group ice:0x8--0x0d "Watchpoint 0"
line.long 0x0 "AV,Address Value"
line.long 0x4 "AM,Address Mask"
line.long 0x8 "DV,Data Value"
line.long 0x0c "DM,Data Mask"
line.long 0x10 "CV,Control Value"
bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,W"
line.long 0x14 "CM,Control Mask"
bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
group ice:0x10--0x15 "Watchpoint 1"
line.long 0x0 "AV,Address Value"
line.long 0x4 "AM,Address Mask"
line.long 0x8 "DV,Data Value"
line.long 0x0c "DM,Data Mask"
line.long 0x10 "CV,Control Value"
bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,w"
line.long 0x14 "CM,Control Mask"
bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
tree.end
tree.end
tree "MPU Subsystem"
tree "MPU Interface Registers"
width 16.
base ad:0xfffec900
group 0x00++0x3
line.long 0x00 "CTRL_REG,Control"
bitfld.long 0x00 21.--22. " WORD_SWAP_CTL ,Control word swap on the MPU/IDSP for a 32-bit access" "All,Non-APIMEM only,APIMEM only,None"
bitfld.long 0x00 18.--20. " ACCESS_PRIORITY ,MPUIF access priority between MPU, reserved port and DMA requests" "MPU-1/DMA-2/ResPort-3,MPU-1/DMA-3/ResPort-2,MPU-2/DMA-1/ResPort-3,MPU-2/DMA-3/ResPort-1,MPU-2/DMA-1/ResPort-2,MPU-3/DMA-2/ResPort-1,MPU-2/DMA-1/ResPort-2,MPU-3/DMA-2/ResPort-1"
textline " "
bitfld.long 0x00 16.--17. " BYTE_SWAP_CTL ,Control byte swap on the MPUI/DSP interface" "None,Non-APIMEM only,All,APIMEM only"
hexmask.long.byte 0x00 8.--15. 1. " TIMEOUT ,MPUI bus access time-out"
textline " "
bitfld.long 0x00 4.--7. " ACCESS_FACTOR ,Division factor of APIF_HNSTROBE" "Reserved,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 3. " IRQ_ABORT_EN ,Enables sending IRQ_ABORT interrupt" "Disabled,Enabled"
textline " "
bitfld.long 0x00 1. " TIMEOUT_EN ,Enables the time-out feature" "Disabled,Enabled"
bitfld.long 0x00 0. " FREQ_MODE ,Frequency mode" "Low,High"
rgroup 0x04++0x13
line.long 0x00 "DEBUG_ADDR,Debug address"
hexmask.long.tbyte 0x00 0.--23. 1. " ADR_SAV ,Bits of address bus from MPU/DMA interface"
line.long 0x04 "DEBUG_DATA,Debug data"
line.long 0x08 "DEBUG_FLAG,Debug flag"
bitfld.long 0x08 11.--12. " ACCESS_MODE ,Encoded access mode for MPUI" "SAM_M / SAM_R,SAM_M / HOM_R,HOM_M / SAM_R,HOM_M / HOM_R"
bitfld.long 0x08 9.--10. " CS ,Chip-select" "Reserved,Memory access,Per. bus / CTRL_REG,?..."
textline " "
bitfld.long 0x08 6.--8. " BURST_SIZE ,Burst size saved on abort" "0,1,2,3,4,5,6,7"
bitfld.long 0x08 5. " RNW ,Read not write on MPUI bus" "Write,Read"
textline " "
bitfld.long 0x08 4. " ACCESS_SIZE ,Access size saved on abort" "Not 32 bits,32 bits"
bitfld.long 0x08 3. " BURST_SIZE ,Burst size saved on abort" "000,Not 000"
textline " "
bitfld.long 0x08 2. " INT_TIMEOUT ,MPUIF access aborted by internal time-out" "Not by time-out,By time-out"
bitfld.long 0x08 1. " MPUI_ABORT ,MPUI aborts access" "Not MPUI,MPUI"
textline " "
bitfld.long 0x08 0. " DSP_ABORT ,MPUI port on DSP subsystem aborts the access" "Not MPUI port,MPUI port"
line.long 0x0c "STATUS_REG,MPUIF status"
bitfld.long 0x0c 11.--12. " ACCESS_STATUS ,Current access in progress is" "MPU,DMA,Reserved,None"
hexmask.long.byte 0x0c 3.--10. 1. " TIMEOUT_VAL ,Current value of time-out counter"
textline " "
bitfld.long 0x0c 2. " CS_EN ,Chip-select enable" "Forced inactive,Enabled"
bitfld.long 0x0c 1. " ACCESS_DONE ,MPUIF access status" "Accessing,Not accessing"
textline " "
bitfld.long 0x0c 0. " HOMNSAM_FLAG ,Current/Lats access mode" "SAM,HOM"
line.long 0x10 "DSP_STATUS_REG,Current DSP status"
bitfld.long 0x10 11. " DSP_HOMSAM ,HOM or SAM for accessing DSP peripherals" "SAM,HOM"
bitfld.long 0x10 10. " MPUI_HOMSAM ,HOM or SAM for accessing MPUI peripherals" "SAM,HOM"
textline " "
bitfld.long 0x10 9. " EMUL_RESET ,Asynchronous reset controlled by emulation" "No reset,Reset"
bitfld.long 0x10 8. " PERIDLE7 ,Idle peripherals. ISTR[7]" "Functional,Idle"
textline " "
bitfld.long 0x10 7. " PERIDLE6 ,Idle peripherals. ISTR[6]" "Functional,Idle"
bitfld.long 0x10 6. " PERIDLE4 ,Idle peripherals. ISTR[4]" "Functional,Idle"
textline " "
bitfld.long 0x10 5. " PERIDLE3 ,Idle peripherals. ISTR[3]" "Functional,Idle"
bitfld.long 0x10 4. " INT_ACK ,Interrupt acknowledged by the DSP" "Not acknowledged,Acknowledged"
textline " "
bitfld.long 0x10 3. " CPUAVIS ,Output of TMS320C55x CPU ST3 register" "Low,High"
bitfld.long 0x10 2. " CPUXF ,Reflects level of XF output from (DSP_STATUS)" "Low,High"
textline " "
bitfld.long 0x10 1. " RESET_MCU ,Reset signal from MPU to DSP" "No reset,Reset"
bitfld.long 0x10 0. " RESET ,Master reset" "Reset,No reset"
group 0x18++0x07
line.long 0x00 "DSP_BOOT_CONFIG,Boot DSP configuration"
bitfld.long 0x00 0.--3. " DSP_BOOT_MODE ,DSP boot mode inputs" "None,None,DSP into IDLE,16-bit,32-bit,MPUI,Internal,Internal,Internal,Internal,Internal,Internal,Internal,Internal,Internal,Internal"
line.long 0x04 "DSP_API_CONFIG,MPUI size information"
hexmask.long.word 0x04 0.--15. 1. " API_SIZE ,Grants the MPUI exclusive access to the specified portion of DSP SARAM in HOM"
tree.end
tree "MPU TI Peripheral Bus Bridge Registers (Private)"
width 19.
base ad:0xfffeca00
group 0x00++0x0d
line.word 0x00 "TIPB_CNTL,TIPB control"
hexmask.word.byte 0x00 8.--15. 1. " TIMEOUT ,TIPB bus access time-out"
bitfld.word 0x00 4.--7. " ACCESS_FACTOR1 ,Clock period multiplication factor for TIPB strobe 1" "x2,x2,x4,x6,x8,x10,x12,x14,x16,x18,x20,x22,x24,x26,x28,x30"
textline " "
bitfld.word 0x00 0.--3. " ACCESS_FACTOR0 ,Clock period multiplication factor for TIPB strobe 0" "x2,x2,x4,x6,x8,x10,x12,x14,x16,x18,x20,x22,x24,x26,x28,x30"
line.word 0x04 "TIPB_BUS_ALLOC,TIPB bus allocation"
bitfld.word 0x04 3. " PRIORITY_ENABLE ,MPU has higher priority than DMA" "Normal,MPU over DMA"
bitfld.word 0x04 0.--2. " TIPB_PRIORITY ,Defines TIPB priority between MPU and DMA" "MPU over DMA,DMA over MPU,?..."
line.word 0x08 "MPU_TIPB_CNTL,MPU TIPB control"
bitfld.word 0x08 1. " W_BUF_EN_1 ,Posted write buffer enable for TIPB strobe 1" "Bypassed,Enabled"
bitfld.word 0x08 0. " W_BUF_EN_0 ,Posted write buffer enable for TIPB strobe 0" "Bypassed,Enabled"
line.word 0x0c "ENHANCED_TIPB_CNTL,Enhanced TIPB control"
bitfld.word 0x0c 3. " ABORT_SB ,Tc_abort is sent back to the MPU when MPU TIPB access is timed out" "Sent back,Not sent back"
bitfld.word 0x0c 2. " CLK_EN ,Clock incoming signals from MPU and DMA" "Not clocked,Clocked"
textline " "
bitfld.word 0x0c 1. " MASK_IT ,Send interrupt on write access abort" "Sent,Masked"
bitfld.word 0x0c 0. " TIMEOUT_EN ,Enable the TIMEOUT feature" "Disabled,Enabled"
rgroup 0x10++0x0d
line.word 0x00 "ADDRESS_DBG,Debug address"
line.word 0x04 "DATA_DEBUG_LOW,Debug data LSB"
line.word 0x08 "DATA_DEBUG_HIGH,Debug data MSB"
line.word 0x0c "DEBUG_CNTR_SIG,Debug control signals"
bitfld.word 0x0c 8. " BURST_ACC ,Indicates single or burst access on the TIPB; saved when abort or access size mismatch occurs" "Single,Burst"
bitfld.word 0x0c 6.--7. " DBG_PERHMAS ,Peripheral memory access size on TIPB; saved when abort or access size mismatch occurs" "8 bits,16 bits,32 bits,32 bits"
textline " "
bitfld.word 0x0c 4.--5. " DBG_MAS ,Memory access size on TIPB; saved when abort or access size mismatch occurs" "8 bits,16 bits,32 bits,32 bits"
bitfld.word 0x0c 3. " DBG_NSUPV ,Indicates supervisor mode status of MPU; saved when abort or access size mismatch occurs" "Supervisor,User"
textline " "
bitfld.word 0x0c 2. " DBG_RNW ,Indicates read or write transaction on the TIPB; saved when abort or access size mismatch occurs" "Write,Read"
bitfld.word 0x0c 1. " WR_SIZE_FLAG ,Mismatch between memory access size and peripheral memory access size" "No mismatch,Mismatch"
textline " "
bitfld.word 0x0c 0. " ABORT_FLAG ,TIPB access is aborted" "Not aborted,Aborted"
tree.end
tree "MPU TI Peripheral Bus Bridge Registers (Public)"
width 19.
base ad:0xfffed300
group 0x00++0x0d
line.word 0x00 "TIPB_CNTL,TIPB control"
hexmask.word.byte 0x00 8.--15. 1. " TIMEOUT ,TIPB bus access time-out"
bitfld.word 0x00 4.--7. " ACCESS_FACTOR1 ,Clock period multiplication factor for TIPB strobe 1" "x2,x2,x4,x6,x8,x10,x12,x14,x16,x18,x20,x22,x24,x26,x28,x30"
textline " "
bitfld.word 0x00 0.--3. " ACCESS_FACTOR0 ,Clock period multiplication factor for TIPB strobe 0" "x2,x2,x4,x6,x8,x10,x12,x14,x16,x18,x20,x22,x24,x26,x28,x30"
line.word 0x04 "TIPB_BUS_ALLOC,TIPB bus allocation"
bitfld.word 0x04 3. " PRIORITY_ENABLE ,MPU has higher priority than DMA" "Normal,MPU over DMA"
bitfld.word 0x04 0.--2. " TIPB_PRIORITY ,Defines TIPB priority between MPU and DMA" "MPU over DMA,DMA over MPU,?..."
line.word 0x08 "MPU_TIPB_CNTL,MPU TIPB control"
bitfld.word 0x08 1. " W_BUF_EN_1 ,Posted write buffer enable for TIPB strobe 1" "Bypassed,Enabled"
bitfld.word 0x08 0. " W_BUF_EN_0 ,Posted write buffer enable for TIPB strobe 0" "Bypassed,Enabled"
line.word 0x0c "ENHANCED_TIPB_CNTL,Enhanced TIPB control"
bitfld.word 0x0c 3. " ABORT_SB ,Tc_abort is sent back to the MPU when MPU TIPB access is timed out" "Sent back,Not sent back"
bitfld.word 0x0c 2. " CLK_EN ,Clock incoming signals from MPU and DMA" "Not clocked,Clocked"
textline " "
bitfld.word 0x0c 1. " MASK_IT ,Send interrupt on write access abort" "Sent,Masked"
bitfld.word 0x0c 0. " TIMEOUT_EN ,Enable the TIMEOUT feature" "Disabled,Enabled"
rgroup 0x10++0x0d
line.word 0x00 "ADDRESS_DBG,Debug address"
line.word 0x04 "DATA_DEBUG_LOW,Debug data LSB"
line.word 0x08 "DATA_DEBUG_HIGH,Debug data MSB"
line.word 0x0c "DEBUG_CNTR_SIG,Debug control signals"
bitfld.word 0x0c 8. " BURST_ACC ,Indicates single or burst access on the TIPB; saved when abort or access size mismatch occurs" "Single,Burst"
bitfld.word 0x0c 6.--7. " DBG_PERHMAS ,Peripheral memory access size on TIPB; saved when abort or access size mismatch occurs" "8 bits,16 bits,32 bits,32 bits"
textline " "
bitfld.word 0x0c 4.--5. " DBG_MAS ,Memory access size on TIPB; saved when abort or access size mismatch occurs" "8 bits,16 bits,32 bits,32 bits"
bitfld.word 0x0c 3. " DBG_NSUPV ,Indicates supervisor mode status of MPU; saved when abort or access size mismatch occurs" "Supervisor,User"
textline " "
bitfld.word 0x0c 2. " DBG_RNW ,Indicates read or write transaction on the TIPB; saved when abort or access size mismatch occurs" "Write,Read"
bitfld.word 0x0c 1. " WR_SIZE_FLAG ,Mismatch between memory access size and peripheral memory access size" "No mismatch,Mismatch"
textline " "
bitfld.word 0x0c 0. " ABORT_FLAG ,TIPB access is aborted" "Not aborted,Aborted"
tree.end
tree.end
tree "Traffic Controller Memory Interface Registers"
width 21.
base ad:0xfffecc00
rgroup 0x00++0x0b
line.long 0x00 "IMIF_PRIO,IMIF priority register"
line.long 0x04 "EMIFS_PRIO,EMIF slow priority register"
line.long 0x08 "EMIFF_PRIO,EMIF fast priority register"
group 0x0c++0x17
line.long 0x00 "EMIFS_CONFIG_REG,EMIF slow interface configuration Register"
bitfld.long 0x00 4. " FR ,Ready signal" "Low,High"
bitfld.long 0x00 3. " PDE ,Global power-down enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 2. " PWD_EN ,IMIF power-down enable" "Disabled,Enabled"
bitfld.long 0x00 1. " BM ,MPU Boot mode" "Not swapped,Swapped"
textline " "
bitfld.long 0x00 0. " WP ,Write protect bit" "Low,High"
line.long 0x04 "EMIFS_CS0_CONFIG,EMIF slow interface chip-select configuration register nCS0"
bitfld.long 0x04 21. " FL ,Specifies how EMIFS handles addressing when performing 32-bit writes to the OMAP5910 16-bit data bus" "Incremented,Not incremented"
bitfld.long 0x04 20. " BW ,Controls the data bus width used for this CS" "16b,?..."
textline " "
bitfld.long 0x04 16.--18. " RDMODE ,Read mode select" "Asynchronous,Page ROM - 4 words,Page ROM - 8 words,Page ROM - 16 words,Synchronous burst,?..."
bitfld.long 0x04 12.--15. " PGWST/WELEN ,R: number of wait states; W: length of /WE pulse duration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x04 8.--11. " WRWST ,Number of wait states for write operation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 4.--7. " RDWST ,Number of wait states for asychronous read operation" "2,3,4,5,6,7,?..."
textline " "
bitfld.long 0x04 2. " RT ,Retiming control register" "Non retimed,Retimed"
bitfld.long 0x04 0.--1. " FCLKDIV ,EMIFS internal reference clock divider" "1,2,4,6"
line.long 0x08 "EMIFS_CS1_CONFIG,EMIF slow interface chip-select configuration register nCS1"
bitfld.long 0x08 21. " FL ,Specifies how EMIFS handles addressing when performing 32-bit writes to the OMAP5910 16-bit data bus" "Incremented,Not incremented"
bitfld.long 0x08 20. " BW ,Controls the data bus width used for this CS" "16b,32b"
textline " "
bitfld.long 0x08 16.--18. " RDMODE ,Read mode select" "Asynchronous,Page ROM - 4 words,Page ROM - 8 words,Page ROM - 16 words,Synchronous burst,?..."
bitfld.long 0x08 12.--15. " PGWST/WELEN ,R: number of wait states; W: length of /WE pulse duration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x08 8.--11. " WRWST ,Number of wait states for write operation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 4.--7. " RDWST ,Number of wait states for asychronous read operation" "2,3,4,5,6,7,?..."
textline " "
bitfld.long 0x08 2. " RT ,Retiming control register" "Non retimed,Retimed"
bitfld.long 0x08 0.--1. " FCLKDIV ,EMIFS internal reference clock divider" "1,2,4,6"
line.long 0x0c "EMIFS_CS2_CONFIG,EMIF slow interface chip-select configuration register nCS2"
bitfld.long 0x0c 21. " FL ,Specifies how EMIFS handles addressing when performing 32-bit writes to the OMAP5910 16-bit data bus" "Incremented,Not incremented"
bitfld.long 0x0c 20. " BW ,Controls the data bus width used for this CS" "16b,32b"
textline " "
bitfld.long 0x0c 16.--18. " RDMODE ,Read mode select" "Asynchronous,Page ROM - 4 words,Page ROM - 8 words,Page ROM - 16 words,Synchronous burst,?..."
bitfld.long 0x0c 12.--15. " PGWST/WELEN ,R: number of wait states; W: length of /WE pulse duration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x0c 8.--11. " WRWST ,Number of wait states for write operation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0c 4.--7. " RDWST ,Number of wait states for asychronous read operation" "2,3,4,5,6,7,?..."
textline " "
bitfld.long 0x0c 2. " RT ,Retiming control register" "Non retimed,Retimed"
bitfld.long 0x0c 0.--1. " FCLKDIV ,EMIFS internal reference clock divider" "1,2,4,6"
line.long 0x10 "EMIFS_CS3_CONFIG,EMIF slow interface chip-select configuration register nCS3"
bitfld.long 0x10 21. " FL ,Specifies how EMIFS handles addressing when performing 32-bit writes to the OMAP5910 16-bit data bus" "Incremented,Not incremented"
bitfld.long 0x10 20. " BW ,Controls the data bus width used for this CS" "16b,32b"
textline " "
bitfld.long 0x10 16.--18. " RDMODE ,Read mode select" "Asynchronous,Page ROM - 4 words,Page ROM - 8 words,Page ROM - 16 words,Synchronous burst,?..."
bitfld.long 0x10 12.--15. " PGWST/WELEN ,R: number of wait states; W: length of /WE pulse duration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x10 8.--11. " WRWST ,Number of wait states for write operation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 4.--7. " RDWST ,Number of wait states for asychronous read operation" "2,3,4,5,6,7,?..."
textline " "
bitfld.long 0x10 2. " RT ,Retiming control register" "Non retimed,Retimed"
bitfld.long 0x10 0.--1. " FCLKDIV ,EMIFS internal reference clock divider" "1,2,4,6"
line.long 0x14 "EMIFF_SDRAM_CONFIG,EMIF fast interface SDRAM configuration register"
bitfld.long 0x14 27. " CLK ,SDRAM clock disable" "Enabled,Disabled"
bitfld.long 0x14 26. " PWD ,SDRAM power-down enable" "Disabled,Enabled"
textline " "
bitfld.long 0x14 24.--25. " SDRAM_FREQUENCY ,SDRAM frequency range" "SDF0,SDF1,SDF2,SDF3"
hexmask.long.word 0x14 8.--23. 1. " ARCV ,Autorefresh counter register value"
textline " "
bitfld.long 0x14 6.--7. " SDRAM_TYPE[2:3] ,Set the SDRAM internal organization (Memory Size)" "16,64,128,256"
bitfld.long 0x14 5. " SDRAM_TYPE[1] ,Set the SDRAM internal organization (Size Of Data Bus)" "8,16"
textline " "
bitfld.long 0x14 4. " SDRAM_TYPE[0] ,Set the SDRAM internal organization (Number Of Banks)" "2,4"
bitfld.long 0x14 2.--3. " ARE ,Autorefresh enable" "Disabled,Enabled,Burst of 4 cmds,Burst of 8 cmds"
textline " "
bitfld.long 0x14 1. " SD_RET ,SDRAM retiming" "Single buffering,Double buffering"
bitfld.long 0x14 0. " SLRF ,Self-refresh mode enable" "Disabled,Enabled"
if (d.l(ad:0xfffe1080)&0x2000)==0x0000
group 0x24++0x03
line.long 0x00 "EMIFF_MRS,EMIF fast interface SDRAM MRS register"
bitfld.long 0x00 9. " WBST ,Write burst (must be 0)" "Low,High"
bitfld.long 0x00 4.--6. " CASL ,CAS latency" "Reserved,1,2,3,?..."
textline " "
bitfld.long 0x00 3. " S/I ,Serial/Interleave" "Serial,Interleave"
bitfld.long 0x00 0.--2. " PGBL ,Page burst length to be programmed into SDRAM MRS configuration register" "0,1,2,3,4,5,6,7"
else
group 0x24++0x03
line.long 0x00 "EMIFF_MRS,EMIF fast interface SDRAM MRS register"
bitfld.long 0x00 3.--4. " TCSR ,SDRAM EMRS register temperature compensated self-refresh setting" "70 deg C,45 deg C,15 deg C,85 deg C"
bitfld.long 0x00 0.--2. " PASR ,SDRAM EMRS register partial array self-refresh coverage setting" "All banks,Half array,Quarter array,?..."
endif
group 0x28++0x1b
line.long 0x00 "TIMEOUT1,Time-out 1"
hexmask.long.byte 0x00 0.--7. 1. " DMA ,"
line.long 0x04 "TIMEOUT2,Time-out 2"
hexmask.long.byte 0x04 16.--23. 1. " DSP ,"
hexmask.long.byte 0x04 0.--7. 1. " LCD ,"
line.long 0x08 "TIMEOUT3,Time-out 3"
line.long 0x0c "ENDIANISM,Endianism"
bitfld.long 0x0c 1. " SWAP ,Byte/Word Swap" "Byte,Word"
bitfld.long 0x0c 0. " EN ,Enable endianism conversion" "Disabled,Enabled"
line.long 0x14 "EMIFF_SDRAM_CONFIG_2,EMIF fast interface SDRAM configuration register 2"
bitfld.long 0x14 1. " RFRSH_RST ,SDRAM self-refresh on warm reset" "Not in self-refresh,In self-refresh"
bitfld.long 0x14 0. " RFRSH_STBY ,SDRAM self-refresh on standby" "Entered,Not entered"
line.long 0x18 "EMIFS_CFG_DYN_WAIT,EMIFS Dynamic Wait-States Register"
bitfld.long 0x18 3. " DYNW_CS3 ,Specifies function of FLASH.RDY for CS3" "Classic,Dynamic"
bitfld.long 0x18 2. " DYNW_CS2 ,Specifies function of FLASH.RDY for CS2" "Classic,Dynamic"
textline " "
bitfld.long 0x18 1. " DYNW_CS1 ,Specifies function of FLASH.RDY for CS1" "Classic,Dynamic"
bitfld.long 0x18 0. " DYNW_CS0 ,Specifies function of FLASH.RDY for CS0" "Classic,Dynamic"
tree.end
tree "System DMA Controller"
base ad:0xfffed000
width 8.
group 0xc00++0x03 "Global registers"
line.word 0x00 "DMA_GCR,DMA global control"
bitfld.word 0x00 3. " AUTOGATING_ON ,DMA clock autogating" "Reserved,Enabled"
bitfld.word 0x00 2. " FREE ,DMA reaction to the suspend signal" "Suspend,Continue"
width 16.
tree "Channel 0 registers"
group 0x800++0x05
line.word 0x00 "DMA_CSDP_CH0,Channel 0 source destination parameters"
bitfld.word 0x00 14.--15. " DST_BURST_EN ,Destination burst enable" "Single access,Single access,Burst 4,?..."
bitfld.word 0x00 13. " DST_PACK ,Destination packing" "Disabled,Enabled"
textline " "
bitfld.word 0x00 9.--12. " DST ,Transfer destination" "EMIFF,EMIF,IMIF,TIPB,Local,TIPB_MPUI,?..."
bitfld.word 0x00 7.--8. " SRC_BURST_EN ,Source burst enable" "Single access,Single access,Burst 4,?..."
textline " "
bitfld.word 0x00 6. " SRC_PACK ,Source packing" "Disabled,Enabled"
bitfld.word 0x00 2.--5. " SRC ,Transfer source" "EMIFF,EMIF,IMIF,TIPB,Local,TIPB_MPUI,?..."
textline " "
bitfld.word 0x00 0.--1. " DATA_TYPE ,Defines the type of the data moved in the channel" "8-bit scalar,16-bit scalar,32-bit scalar,?..."
line.word 0x02 "DMA_CCR_CH0,Channel 0 control"
bitfld.word 0x02 14.--15. " DST_AMODE ,Destination addressing mode" "Const addr,Post-inc addr,Single index,Double index"
bitfld.word 0x02 12.--13. " SRC_AMODE ,Source addressing mode" "Const addr,Post-inc addr,Single index,Double index"
textline " "
bitfld.word 0x02 11. " END_PROG ,End of programming" "Not ended,Ended"
bitfld.word 0x02 9. " REPEAT ,Repetitive operations" "Disabled,Enabled"
textline " "
bitfld.word 0x02 8. " AUTO_INIT ,Autoinitialization at the end of the transfer" "Disabled,Enabled"
bitfld.word 0x02 7. " EN ,Transfer Enable" "Disabled,Enabled"
textline " "
bitfld.word 0x02 6. " PRIO ,Channel priority" "Low,High"
bitfld.word 0x02 5. " FS ,Frame synchronization" "Element,Frame"
textline " "
bitfld.word 0x02 0.--4. " SYNC ,Synchronization control" "Disabled,MCSI1 TX,MSCI1 RX,I2C RX,I2C TX,/EXT_DMA_REQ0,/EXT_DMA_REQ1,MicroWire Tx,McBSP1 TX,McBSP1 RX,McBSP3 TX,McBSP3 RX,UART1 TX,UART1 RX,UART2 TX,UART2 RX,McBSP2 TX,McBSP2 RX,UART3 TX,UART3 RX,Camera RX,MMC TX,MMC RX,Reserved,Reserved,Reserved,USB function RX0,USB function RX1,USB function RX2,USB function TX0,USB function TX1,USB function TX2"
line.word 0x04 "DMA_CICR_CH0,Channel 0 interrupt control"
bitfld.word 0x04 5. " BLOCK_IE ,End block interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 4. " LAST_IE ,Last frame interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x04 3. " FRAME_IE ,Frame interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 2. " HALF_IE ,Half frame interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x04 1. " DROP_IE ,Synchronization event drop interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 0. " TOUT_IE ,Time-out interrupt enable" "Disabled,Enabled"
rgroup (0x800+0x06)++0x01
line.word 0x00 "DMA_CSR_CH0,Channel 0 status"
bitfld.word 0x00 13. " ALT_SYNC ,Synchronization status" "No DMA request,DMA request"
bitfld.word 0x00 12. " ALT_BLOCK ,End block" "Not finished,Finished"
textline " "
bitfld.word 0x00 11. " ALT_LAST ,Last frame" "Not started,Started"
bitfld.word 0x00 10. " ALT_FRAME ,Frame" "In progress,Transferred"
textline " "
bitfld.word 0x00 9. " ALT_HALF ,Half frame" "Not transferred,Transferred"
bitfld.word 0x00 8. " ALT_DROP ,Event drop" "No event drop,Event drop"
textline " "
bitfld.word 0x00 7. " ALT_TOUT ,Time-out in the channel" "No time-out,Time-out"
bitfld.word 0x00 6. " SYNC ,Synchronization status" "No DMA request,DMA request"
textline " "
bitfld.word 0x00 5. " BLOCK ,End block" "Not finished,Finished"
bitfld.word 0x00 4. " LAST ,Last frame" "Not started,Started"
textline " "
bitfld.word 0x00 3. " FRAME ,Frame" "In progress,Transferred"
bitfld.word 0x00 2. " HALF ,Half frame" "Not transferred,Transferred"
textline " "
bitfld.word 0x00 1. " DROP ,Event drop" "No event drop,Event drop"
bitfld.word 0x00 0. " TOUT ,Time-out in the channel" "No time-out,Time-out"
group (0x800+0x08)++0x11
line.word 0x00 "DMA_CSSA_L_CH0,Channel 0 source start address - lower bits"
line.word 0x02 "DMA_CSSA_U_CH0,Channel 0 source start address - upper bits"
line.word 0x04 "DMA_CDSA_L_CH0,Channel 0 destination start address - lower bits"
line.word 0x06 "DMA_CDSA_U_CH0,Channel 0 destination start address - upper bits"
line.word 0x08 "DMA_CEN_CH0,Channel 0 element number"
line.word 0x0a "DMA_CFN_CH0,Channel 0 frame number"
line.word 0x0c "DMA_CFI_CH0,Channel 0 frame index"
line.word 0x0e "DMA_CEI_CH0,Channel 0 element index"
line.word 0x10 "DMA_CPC_CH0,Channel 0 channel progress counter"
tree.end
tree "Channel 1 registers"
group 0x840++0x05
line.word 0x00 "DMA_CSDP_CH1,Channel 1 source destination parameters"
bitfld.word 0x00 14.--15. " DST_BURST_EN ,Destination burst enable" "Single access,Single access,Burst 4,?..."
bitfld.word 0x00 13. " DST_PACK ,Destination packing" "Disabled,Enabled"
textline " "
bitfld.word 0x00 9.--12. " DST ,Transfer destination" "EMIFF,EMIF,IMIF,TIPB,Local,TIPB_MPUI,?..."
bitfld.word 0x00 7.--8. " SRC_BURST_EN ,Source burst enable" "Single access,Single access,Burst 4,?..."
textline " "
bitfld.word 0x00 6. " SRC_PACK ,Source packing" "Disabled,Enabled"
bitfld.word 0x00 2.--5. " SRC ,Transfer source" "EMIFF,EMIF,IMIF,TIPB,Local,TIPB_MPUI,?..."
textline " "
bitfld.word 0x00 0.--1. " DATA_TYPE ,Defines the type of the data moved in the channel" "8-bit scalar,16-bit scalar,32-bit scalar,?..."
line.word 0x02 "DMA_CCR_CH1,Channel 1 control"
bitfld.word 0x02 14.--15. " DST_AMODE ,Destination addressing mode" "Const addr,Post-inc addr,Single index,Double index"
bitfld.word 0x02 12.--13. " SRC_AMODE ,Source addressing mode" "Const addr,Post-inc addr,Single index,Double index"
textline " "
bitfld.word 0x02 11. " END_PROG ,End of programming" "Not ended,Ended"
bitfld.word 0x02 9. " REPEAT ,Repetitive operations" "Disabled,Enabled"
textline " "
bitfld.word 0x02 8. " AUTO_INIT ,Autoinitialization at the end of the transfer" "Disabled,Enabled"
bitfld.word 0x02 7. " EN ,Transfer Enable" "Disabled,Enabled"
textline " "
bitfld.word 0x02 6. " PRIO ,Channel priority" "Low,High"
bitfld.word 0x02 5. " FS ,Frame synchronization" "Element,Frame"
textline " "
bitfld.word 0x02 0.--4. " SYNC ,Synchronization control" "Disabled,MCSI1 TX,MSCI1 RX,I2C RX,I2C TX,/EXT_DMA_REQ0,/EXT_DMA_REQ1,MicroWire Tx,McBSP1 TX,McBSP1 RX,McBSP3 TX,McBSP3 RX,UART1 TX,UART1 RX,UART2 TX,UART2 RX,McBSP2 TX,McBSP2 RX,UART3 TX,UART3 RX,Camera RX,MMC TX,MMC RX,Reserved,Reserved,Reserved,USB function RX0,USB function RX1,USB function RX2,USB function TX0,USB function TX1,USB function TX2"
line.word 0x04 "DMA_CICR_CH1,Channel 1 interrupt control"
bitfld.word 0x04 5. " BLOCK_IE ,End block interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 4. " LAST_IE ,Last frame interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x04 3. " FRAME_IE ,Frame interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 2. " HALF_IE ,Half frame interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x04 1. " DROP_IE ,Synchronization event drop interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 0. " TOUT_IE ,Time-out interrupt enable" "Disabled,Enabled"
rgroup (0x840+0x06)++0x01
line.word 0x00 "DMA_CSR_CH1,Channel 1 status"
bitfld.word 0x00 13. " ALT_SYNC ,Synchronization status" "No DMA request,DMA request"
bitfld.word 0x00 12. " ALT_BLOCK ,End block" "Not finished,Finished"
textline " "
bitfld.word 0x00 11. " ALT_LAST ,Last frame" "Not started,Started"
bitfld.word 0x00 10. " ALT_FRAME ,Frame" "In progress,Transferred"
textline " "
bitfld.word 0x00 9. " ALT_HALF ,Half frame" "Not transferred,Transferred"
bitfld.word 0x00 8. " ALT_DROP ,Event drop" "No event drop,Event drop"
textline " "
bitfld.word 0x00 7. " ALT_TOUT ,Time-out in the channel" "No time-out,Time-out"
bitfld.word 0x00 6. " SYNC ,Synchronization status" "No DMA request,DMA request"
textline " "
bitfld.word 0x00 5. " BLOCK ,End block" "Not finished,Finished"
bitfld.word 0x00 4. " LAST ,Last frame" "Not started,Started"
textline " "
bitfld.word 0x00 3. " FRAME ,Frame" "In progress,Transferred"
bitfld.word 0x00 2. " HALF ,Half frame" "Not transferred,Transferred"
textline " "
bitfld.word 0x00 1. " DROP ,Event drop" "No event drop,Event drop"
bitfld.word 0x00 0. " TOUT ,Time-out in the channel" "No time-out,Time-out"
group (0x840+0x08)++0x11
line.word 0x00 "DMA_CSSA_L_CH1,Channel 1 source start address - lower bits"
line.word 0x02 "DMA_CSSA_U_CH1,Channel 1 source start address - upper bits"
line.word 0x04 "DMA_CDSA_L_CH1,Channel 1 destination start address - lower bits"
line.word 0x06 "DMA_CDSA_U_CH1,Channel 1 destination start address - upper bits"
line.word 0x08 "DMA_CEN_CH1,Channel 1 element number"
line.word 0x0a "DMA_CFN_CH1,Channel 1 frame number"
line.word 0x0c "DMA_CFI_CH1,Channel 1 frame index"
line.word 0x0e "DMA_CEI_CH1,Channel 1 element index"
line.word 0x10 "DMA_CPC_CH1,Channel 1 channel progress counter"
tree.end
tree "Channel 2 registers"
group 0x880++0x05
line.word 0x00 "DMA_CSDP_CH2,Channel 2 source destination parameters"
bitfld.word 0x00 14.--15. " DST_BURST_EN ,Destination burst enable" "Single access,Single access,Burst 4,?..."
bitfld.word 0x00 13. " DST_PACK ,Destination packing" "Disabled,Enabled"
textline " "
bitfld.word 0x00 9.--12. " DST ,Transfer destination" "EMIFF,EMIF,IMIF,TIPB,Local,TIPB_MPUI,?..."
bitfld.word 0x00 7.--8. " SRC_BURST_EN ,Source burst enable" "Single access,Single access,Burst 4,?..."
textline " "
bitfld.word 0x00 6. " SRC_PACK ,Source packing" "Disabled,Enabled"
bitfld.word 0x00 2.--5. " SRC ,Transfer source" "EMIFF,EMIF,IMIF,TIPB,Local,TIPB_MPUI,?..."
textline " "
bitfld.word 0x00 0.--1. " DATA_TYPE ,Defines the type of the data moved in the channel" "8-bit scalar,16-bit scalar,32-bit scalar,?..."
line.word 0x02 "DMA_CCR_CH2,Channel 2 control"
bitfld.word 0x02 14.--15. " DST_AMODE ,Destination addressing mode" "Const addr,Post-inc addr,Single index,Double index"
bitfld.word 0x02 12.--13. " SRC_AMODE ,Source addressing mode" "Const addr,Post-inc addr,Single index,Double index"
textline " "
bitfld.word 0x02 11. " END_PROG ,End of programming" "Not ended,Ended"
bitfld.word 0x02 9. " REPEAT ,Repetitive operations" "Disabled,Enabled"
textline " "
bitfld.word 0x02 8. " AUTO_INIT ,Autoinitialization at the end of the transfer" "Disabled,Enabled"
bitfld.word 0x02 7. " EN ,Transfer Enable" "Disabled,Enabled"
textline " "
bitfld.word 0x02 6. " PRIO ,Channel priority" "Low,High"
bitfld.word 0x02 5. " FS ,Frame synchronization" "Element,Frame"
textline " "
bitfld.word 0x02 0.--4. " SYNC ,Synchronization control" "Disabled,MCSI1 TX,MSCI1 RX,I2C RX,I2C TX,/EXT_DMA_REQ0,/EXT_DMA_REQ1,MicroWire Tx,McBSP1 TX,McBSP1 RX,McBSP3 TX,McBSP3 RX,UART1 TX,UART1 RX,UART2 TX,UART2 RX,McBSP2 TX,McBSP2 RX,UART3 TX,UART3 RX,Camera RX,MMC TX,MMC RX,Reserved,Reserved,Reserved,USB function RX0,USB function RX1,USB function RX2,USB function TX0,USB function TX1,USB function TX2"
line.word 0x04 "DMA_CICR_CH2,Channel 2 interrupt control"
bitfld.word 0x04 5. " BLOCK_IE ,End block interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 4. " LAST_IE ,Last frame interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x04 3. " FRAME_IE ,Frame interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 2. " HALF_IE ,Half frame interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x04 1. " DROP_IE ,Synchronization event drop interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 0. " TOUT_IE ,Time-out interrupt enable" "Disabled,Enabled"
rgroup (0x880+0x06)++0x01
line.word 0x00 "DMA_CSR_CH2,Channel 2 status"
bitfld.word 0x00 13. " ALT_SYNC ,Synchronization status" "No DMA request,DMA request"
bitfld.word 0x00 12. " ALT_BLOCK ,End block" "Not finished,Finished"
textline " "
bitfld.word 0x00 11. " ALT_LAST ,Last frame" "Not started,Started"
bitfld.word 0x00 10. " ALT_FRAME ,Frame" "In progress,Transferred"
textline " "
bitfld.word 0x00 9. " ALT_HALF ,Half frame" "Not transferred,Transferred"
bitfld.word 0x00 8. " ALT_DROP ,Event drop" "No event drop,Event drop"
textline " "
bitfld.word 0x00 7. " ALT_TOUT ,Time-out in the channel" "No time-out,Time-out"
bitfld.word 0x00 6. " SYNC ,Synchronization status" "No DMA request,DMA request"
textline " "
bitfld.word 0x00 5. " BLOCK ,End block" "Not finished,Finished"
bitfld.word 0x00 4. " LAST ,Last frame" "Not started,Started"
textline " "
bitfld.word 0x00 3. " FRAME ,Frame" "In progress,Transferred"
bitfld.word 0x00 2. " HALF ,Half frame" "Not transferred,Transferred"
textline " "
bitfld.word 0x00 1. " DROP ,Event drop" "No event drop,Event drop"
bitfld.word 0x00 0. " TOUT ,Time-out in the channel" "No time-out,Time-out"
group (0x880+0x08)++0x11
line.word 0x00 "DMA_CSSA_L_CH2,Channel 2 source start address - lower bits"
line.word 0x02 "DMA_CSSA_U_CH2,Channel 2 source start address - upper bits"
line.word 0x04 "DMA_CDSA_L_CH2,Channel 2 destination start address - lower bits"
line.word 0x06 "DMA_CDSA_U_CH2,Channel 2 destination start address - upper bits"
line.word 0x08 "DMA_CEN_CH2,Channel 2 element number"
line.word 0x0a "DMA_CFN_CH2,Channel 2 frame number"
line.word 0x0c "DMA_CFI_CH2,Channel 2 frame index"
line.word 0x0e "DMA_CEI_CH2,Channel 2 element index"
line.word 0x10 "DMA_CPC_CH2,Channel 2 channel progress counter"
tree.end
tree "Channel 3 registers"
group 0x8C0++0x05
line.word 0x00 "DMA_CSDP_CH3,Channel 3 source destination parameters"
bitfld.word 0x00 14.--15. " DST_BURST_EN ,Destination burst enable" "Single access,Single access,Burst 4,?..."
bitfld.word 0x00 13. " DST_PACK ,Destination packing" "Disabled,Enabled"
textline " "
bitfld.word 0x00 9.--12. " DST ,Transfer destination" "EMIFF,EMIF,IMIF,TIPB,Local,TIPB_MPUI,?..."
bitfld.word 0x00 7.--8. " SRC_BURST_EN ,Source burst enable" "Single access,Single access,Burst 4,?..."
textline " "
bitfld.word 0x00 6. " SRC_PACK ,Source packing" "Disabled,Enabled"
bitfld.word 0x00 2.--5. " SRC ,Transfer source" "EMIFF,EMIF,IMIF,TIPB,Local,TIPB_MPUI,?..."
textline " "
bitfld.word 0x00 0.--1. " DATA_TYPE ,Defines the type of the data moved in the channel" "8-bit scalar,16-bit scalar,32-bit scalar,?..."
line.word 0x02 "DMA_CCR_CH3,Channel 3 control"
bitfld.word 0x02 14.--15. " DST_AMODE ,Destination addressing mode" "Const addr,Post-inc addr,Single index,Double index"
bitfld.word 0x02 12.--13. " SRC_AMODE ,Source addressing mode" "Const addr,Post-inc addr,Single index,Double index"
textline " "
bitfld.word 0x02 11. " END_PROG ,End of programming" "Not ended,Ended"
bitfld.word 0x02 9. " REPEAT ,Repetitive operations" "Disabled,Enabled"
textline " "
bitfld.word 0x02 8. " AUTO_INIT ,Autoinitialization at the end of the transfer" "Disabled,Enabled"
bitfld.word 0x02 7. " EN ,Transfer Enable" "Disabled,Enabled"
textline " "
bitfld.word 0x02 6. " PRIO ,Channel priority" "Low,High"
bitfld.word 0x02 5. " FS ,Frame synchronization" "Element,Frame"
textline " "
bitfld.word 0x02 0.--4. " SYNC ,Synchronization control" "Disabled,MCSI1 TX,MSCI1 RX,I2C RX,I2C TX,/EXT_DMA_REQ0,/EXT_DMA_REQ1,MicroWire Tx,McBSP1 TX,McBSP1 RX,McBSP3 TX,McBSP3 RX,UART1 TX,UART1 RX,UART2 TX,UART2 RX,McBSP2 TX,McBSP2 RX,UART3 TX,UART3 RX,Camera RX,MMC TX,MMC RX,Reserved,Reserved,Reserved,USB function RX0,USB function RX1,USB function RX2,USB function TX0,USB function TX1,USB function TX2"
line.word 0x04 "DMA_CICR_CH3,Channel 3 interrupt control"
bitfld.word 0x04 5. " BLOCK_IE ,End block interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 4. " LAST_IE ,Last frame interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x04 3. " FRAME_IE ,Frame interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 2. " HALF_IE ,Half frame interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x04 1. " DROP_IE ,Synchronization event drop interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 0. " TOUT_IE ,Time-out interrupt enable" "Disabled,Enabled"
rgroup (0x8C0+0x06)++0x01
line.word 0x00 "DMA_CSR_CH3,Channel 3 status"
bitfld.word 0x00 13. " ALT_SYNC ,Synchronization status" "No DMA request,DMA request"
bitfld.word 0x00 12. " ALT_BLOCK ,End block" "Not finished,Finished"
textline " "
bitfld.word 0x00 11. " ALT_LAST ,Last frame" "Not started,Started"
bitfld.word 0x00 10. " ALT_FRAME ,Frame" "In progress,Transferred"
textline " "
bitfld.word 0x00 9. " ALT_HALF ,Half frame" "Not transferred,Transferred"
bitfld.word 0x00 8. " ALT_DROP ,Event drop" "No event drop,Event drop"
textline " "
bitfld.word 0x00 7. " ALT_TOUT ,Time-out in the channel" "No time-out,Time-out"
bitfld.word 0x00 6. " SYNC ,Synchronization status" "No DMA request,DMA request"
textline " "
bitfld.word 0x00 5. " BLOCK ,End block" "Not finished,Finished"
bitfld.word 0x00 4. " LAST ,Last frame" "Not started,Started"
textline " "
bitfld.word 0x00 3. " FRAME ,Frame" "In progress,Transferred"
bitfld.word 0x00 2. " HALF ,Half frame" "Not transferred,Transferred"
textline " "
bitfld.word 0x00 1. " DROP ,Event drop" "No event drop,Event drop"
bitfld.word 0x00 0. " TOUT ,Time-out in the channel" "No time-out,Time-out"
group (0x8C0+0x08)++0x11
line.word 0x00 "DMA_CSSA_L_CH3,Channel 3 source start address - lower bits"
line.word 0x02 "DMA_CSSA_U_CH3,Channel 3 source start address - upper bits"
line.word 0x04 "DMA_CDSA_L_CH3,Channel 3 destination start address - lower bits"
line.word 0x06 "DMA_CDSA_U_CH3,Channel 3 destination start address - upper bits"
line.word 0x08 "DMA_CEN_CH3,Channel 3 element number"
line.word 0x0a "DMA_CFN_CH3,Channel 3 frame number"
line.word 0x0c "DMA_CFI_CH3,Channel 3 frame index"
line.word 0x0e "DMA_CEI_CH3,Channel 3 element index"
line.word 0x10 "DMA_CPC_CH3,Channel 3 channel progress counter"
tree.end
tree "Channel 4 registers"
group 0x900++0x05
line.word 0x00 "DMA_CSDP_CH4,Channel 4 source destination parameters"
bitfld.word 0x00 14.--15. " DST_BURST_EN ,Destination burst enable" "Single access,Single access,Burst 4,?..."
bitfld.word 0x00 13. " DST_PACK ,Destination packing" "Disabled,Enabled"
textline " "
bitfld.word 0x00 9.--12. " DST ,Transfer destination" "EMIFF,EMIF,IMIF,TIPB,Local,TIPB_MPUI,?..."
bitfld.word 0x00 7.--8. " SRC_BURST_EN ,Source burst enable" "Single access,Single access,Burst 4,?..."
textline " "
bitfld.word 0x00 6. " SRC_PACK ,Source packing" "Disabled,Enabled"
bitfld.word 0x00 2.--5. " SRC ,Transfer source" "EMIFF,EMIF,IMIF,TIPB,Local,TIPB_MPUI,?..."
textline " "
bitfld.word 0x00 0.--1. " DATA_TYPE ,Defines the type of the data moved in the channel" "8-bit scalar,16-bit scalar,32-bit scalar,?..."
line.word 0x02 "DMA_CCR_CH4,Channel 4 control"
bitfld.word 0x02 14.--15. " DST_AMODE ,Destination addressing mode" "Const addr,Post-inc addr,Single index,Double index"
bitfld.word 0x02 12.--13. " SRC_AMODE ,Source addressing mode" "Const addr,Post-inc addr,Single index,Double index"
textline " "
bitfld.word 0x02 11. " END_PROG ,End of programming" "Not ended,Ended"
bitfld.word 0x02 9. " REPEAT ,Repetitive operations" "Disabled,Enabled"
textline " "
bitfld.word 0x02 8. " AUTO_INIT ,Autoinitialization at the end of the transfer" "Disabled,Enabled"
bitfld.word 0x02 7. " EN ,Transfer Enable" "Disabled,Enabled"
textline " "
bitfld.word 0x02 6. " PRIO ,Channel priority" "Low,High"
bitfld.word 0x02 5. " FS ,Frame synchronization" "Element,Frame"
textline " "
bitfld.word 0x02 0.--4. " SYNC ,Synchronization control" "Disabled,MCSI1 TX,MSCI1 RX,I2C RX,I2C TX,/EXT_DMA_REQ0,/EXT_DMA_REQ1,MicroWire Tx,McBSP1 TX,McBSP1 RX,McBSP3 TX,McBSP3 RX,UART1 TX,UART1 RX,UART2 TX,UART2 RX,McBSP2 TX,McBSP2 RX,UART3 TX,UART3 RX,Camera RX,MMC TX,MMC RX,Reserved,Reserved,Reserved,USB function RX0,USB function RX1,USB function RX2,USB function TX0,USB function TX1,USB function TX2"
line.word 0x04 "DMA_CICR_CH4,Channel 4 interrupt control"
bitfld.word 0x04 5. " BLOCK_IE ,End block interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 4. " LAST_IE ,Last frame interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x04 3. " FRAME_IE ,Frame interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 2. " HALF_IE ,Half frame interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x04 1. " DROP_IE ,Synchronization event drop interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 0. " TOUT_IE ,Time-out interrupt enable" "Disabled,Enabled"
rgroup (0x900+0x06)++0x01
line.word 0x00 "DMA_CSR_CH4,Channel 4 status"
bitfld.word 0x00 13. " ALT_SYNC ,Synchronization status" "No DMA request,DMA request"
bitfld.word 0x00 12. " ALT_BLOCK ,End block" "Not finished,Finished"
textline " "
bitfld.word 0x00 11. " ALT_LAST ,Last frame" "Not started,Started"
bitfld.word 0x00 10. " ALT_FRAME ,Frame" "In progress,Transferred"
textline " "
bitfld.word 0x00 9. " ALT_HALF ,Half frame" "Not transferred,Transferred"
bitfld.word 0x00 8. " ALT_DROP ,Event drop" "No event drop,Event drop"
textline " "
bitfld.word 0x00 7. " ALT_TOUT ,Time-out in the channel" "No time-out,Time-out"
bitfld.word 0x00 6. " SYNC ,Synchronization status" "No DMA request,DMA request"
textline " "
bitfld.word 0x00 5. " BLOCK ,End block" "Not finished,Finished"
bitfld.word 0x00 4. " LAST ,Last frame" "Not started,Started"
textline " "
bitfld.word 0x00 3. " FRAME ,Frame" "In progress,Transferred"
bitfld.word 0x00 2. " HALF ,Half frame" "Not transferred,Transferred"
textline " "
bitfld.word 0x00 1. " DROP ,Event drop" "No event drop,Event drop"
bitfld.word 0x00 0. " TOUT ,Time-out in the channel" "No time-out,Time-out"
group (0x900+0x08)++0x11
line.word 0x00 "DMA_CSSA_L_CH4,Channel 4 source start address - lower bits"
line.word 0x02 "DMA_CSSA_U_CH4,Channel 4 source start address - upper bits"
line.word 0x04 "DMA_CDSA_L_CH4,Channel 4 destination start address - lower bits"
line.word 0x06 "DMA_CDSA_U_CH4,Channel 4 destination start address - upper bits"
line.word 0x08 "DMA_CEN_CH4,Channel 4 element number"
line.word 0x0a "DMA_CFN_CH4,Channel 4 frame number"
line.word 0x0c "DMA_CFI_CH4,Channel 4 frame index"
line.word 0x0e "DMA_CEI_CH4,Channel 4 element index"
line.word 0x10 "DMA_CPC_CH4,Channel 4 channel progress counter"
tree.end
tree "Channel 5 registers"
group 0x940++0x05
line.word 0x00 "DMA_CSDP_CH5,Channel 5 source destination parameters"
bitfld.word 0x00 14.--15. " DST_BURST_EN ,Destination burst enable" "Single access,Single access,Burst 4,?..."
bitfld.word 0x00 13. " DST_PACK ,Destination packing" "Disabled,Enabled"
textline " "
bitfld.word 0x00 9.--12. " DST ,Transfer destination" "EMIFF,EMIF,IMIF,TIPB,Local,TIPB_MPUI,?..."
bitfld.word 0x00 7.--8. " SRC_BURST_EN ,Source burst enable" "Single access,Single access,Burst 4,?..."
textline " "
bitfld.word 0x00 6. " SRC_PACK ,Source packing" "Disabled,Enabled"
bitfld.word 0x00 2.--5. " SRC ,Transfer source" "EMIFF,EMIF,IMIF,TIPB,Local,TIPB_MPUI,?..."
textline " "
bitfld.word 0x00 0.--1. " DATA_TYPE ,Defines the type of the data moved in the channel" "8-bit scalar,16-bit scalar,32-bit scalar,?..."
line.word 0x02 "DMA_CCR_CH5,Channel 5 control"
bitfld.word 0x02 14.--15. " DST_AMODE ,Destination addressing mode" "Const addr,Post-inc addr,Single index,Double index"
bitfld.word 0x02 12.--13. " SRC_AMODE ,Source addressing mode" "Const addr,Post-inc addr,Single index,Double index"
textline " "
bitfld.word 0x02 11. " END_PROG ,End of programming" "Not ended,Ended"
bitfld.word 0x02 9. " REPEAT ,Repetitive operations" "Disabled,Enabled"
textline " "
bitfld.word 0x02 8. " AUTO_INIT ,Autoinitialization at the end of the transfer" "Disabled,Enabled"
bitfld.word 0x02 7. " EN ,Transfer Enable" "Disabled,Enabled"
textline " "
bitfld.word 0x02 6. " PRIO ,Channel priority" "Low,High"
bitfld.word 0x02 5. " FS ,Frame synchronization" "Element,Frame"
textline " "
bitfld.word 0x02 0.--4. " SYNC ,Synchronization control" "Disabled,MCSI1 TX,MSCI1 RX,I2C RX,I2C TX,/EXT_DMA_REQ0,/EXT_DMA_REQ1,MicroWire Tx,McBSP1 TX,McBSP1 RX,McBSP3 TX,McBSP3 RX,UART1 TX,UART1 RX,UART2 TX,UART2 RX,McBSP2 TX,McBSP2 RX,UART3 TX,UART3 RX,Camera RX,MMC TX,MMC RX,Reserved,Reserved,Reserved,USB function RX0,USB function RX1,USB function RX2,USB function TX0,USB function TX1,USB function TX2"
line.word 0x04 "DMA_CICR_CH5,Channel 5 interrupt control"
bitfld.word 0x04 5. " BLOCK_IE ,End block interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 4. " LAST_IE ,Last frame interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x04 3. " FRAME_IE ,Frame interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 2. " HALF_IE ,Half frame interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x04 1. " DROP_IE ,Synchronization event drop interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 0. " TOUT_IE ,Time-out interrupt enable" "Disabled,Enabled"
rgroup (0x940+0x06)++0x01
line.word 0x00 "DMA_CSR_CH5,Channel 5 status"
bitfld.word 0x00 13. " ALT_SYNC ,Synchronization status" "No DMA request,DMA request"
bitfld.word 0x00 12. " ALT_BLOCK ,End block" "Not finished,Finished"
textline " "
bitfld.word 0x00 11. " ALT_LAST ,Last frame" "Not started,Started"
bitfld.word 0x00 10. " ALT_FRAME ,Frame" "In progress,Transferred"
textline " "
bitfld.word 0x00 9. " ALT_HALF ,Half frame" "Not transferred,Transferred"
bitfld.word 0x00 8. " ALT_DROP ,Event drop" "No event drop,Event drop"
textline " "
bitfld.word 0x00 7. " ALT_TOUT ,Time-out in the channel" "No time-out,Time-out"
bitfld.word 0x00 6. " SYNC ,Synchronization status" "No DMA request,DMA request"
textline " "
bitfld.word 0x00 5. " BLOCK ,End block" "Not finished,Finished"
bitfld.word 0x00 4. " LAST ,Last frame" "Not started,Started"
textline " "
bitfld.word 0x00 3. " FRAME ,Frame" "In progress,Transferred"
bitfld.word 0x00 2. " HALF ,Half frame" "Not transferred,Transferred"
textline " "
bitfld.word 0x00 1. " DROP ,Event drop" "No event drop,Event drop"
bitfld.word 0x00 0. " TOUT ,Time-out in the channel" "No time-out,Time-out"
group (0x940+0x08)++0x11
line.word 0x00 "DMA_CSSA_L_CH5,Channel 5 source start address - lower bits"
line.word 0x02 "DMA_CSSA_U_CH5,Channel 5 source start address - upper bits"
line.word 0x04 "DMA_CDSA_L_CH5,Channel 5 destination start address - lower bits"
line.word 0x06 "DMA_CDSA_U_CH5,Channel 5 destination start address - upper bits"
line.word 0x08 "DMA_CEN_CH5,Channel 5 element number"
line.word 0x0a "DMA_CFN_CH5,Channel 5 frame number"
line.word 0x0c "DMA_CFI_CH5,Channel 5 frame index"
line.word 0x0e "DMA_CEI_CH5,Channel 5 element index"
line.word 0x10 "DMA_CPC_CH5,Channel 5 channel progress counter"
tree.end
tree "Channel 6 registers"
group 0x980++0x05
line.word 0x00 "DMA_CSDP_CH6,Channel 6 source destination parameters"
bitfld.word 0x00 14.--15. " DST_BURST_EN ,Destination burst enable" "Single access,Single access,Burst 4,?..."
bitfld.word 0x00 13. " DST_PACK ,Destination packing" "Disabled,Enabled"
textline " "
bitfld.word 0x00 9.--12. " DST ,Transfer destination" "EMIFF,EMIF,IMIF,TIPB,Local,TIPB_MPUI,?..."
bitfld.word 0x00 7.--8. " SRC_BURST_EN ,Source burst enable" "Single access,Single access,Burst 4,?..."
textline " "
bitfld.word 0x00 6. " SRC_PACK ,Source packing" "Disabled,Enabled"
bitfld.word 0x00 2.--5. " SRC ,Transfer source" "EMIFF,EMIF,IMIF,TIPB,Local,TIPB_MPUI,?..."
textline " "
bitfld.word 0x00 0.--1. " DATA_TYPE ,Defines the type of the data moved in the channel" "8-bit scalar,16-bit scalar,32-bit scalar,?..."
line.word 0x02 "DMA_CCR_CH6,Channel 6 control"
bitfld.word 0x02 14.--15. " DST_AMODE ,Destination addressing mode" "Const addr,Post-inc addr,Single index,Double index"
bitfld.word 0x02 12.--13. " SRC_AMODE ,Source addressing mode" "Const addr,Post-inc addr,Single index,Double index"
textline " "
bitfld.word 0x02 11. " END_PROG ,End of programming" "Not ended,Ended"
bitfld.word 0x02 9. " REPEAT ,Repetitive operations" "Disabled,Enabled"
textline " "
bitfld.word 0x02 8. " AUTO_INIT ,Autoinitialization at the end of the transfer" "Disabled,Enabled"
bitfld.word 0x02 7. " EN ,Transfer Enable" "Disabled,Enabled"
textline " "
bitfld.word 0x02 6. " PRIO ,Channel priority" "Low,High"
bitfld.word 0x02 5. " FS ,Frame synchronization" "Element,Frame"
textline " "
bitfld.word 0x02 0.--4. " SYNC ,Synchronization control" "Disabled,MCSI1 TX,MSCI1 RX,I2C RX,I2C TX,/EXT_DMA_REQ0,/EXT_DMA_REQ1,MicroWire Tx,McBSP1 TX,McBSP1 RX,McBSP3 TX,McBSP3 RX,UART1 TX,UART1 RX,UART2 TX,UART2 RX,McBSP2 TX,McBSP2 RX,UART3 TX,UART3 RX,Camera RX,MMC TX,MMC RX,Reserved,Reserved,Reserved,USB function RX0,USB function RX1,USB function RX2,USB function TX0,USB function TX1,USB function TX2"
line.word 0x04 "DMA_CICR_CH6,Channel 6 interrupt control"
bitfld.word 0x04 5. " BLOCK_IE ,End block interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 4. " LAST_IE ,Last frame interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x04 3. " FRAME_IE ,Frame interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 2. " HALF_IE ,Half frame interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x04 1. " DROP_IE ,Synchronization event drop interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 0. " TOUT_IE ,Time-out interrupt enable" "Disabled,Enabled"
rgroup (0x980+0x06)++0x01
line.word 0x00 "DMA_CSR_CH6,Channel 6 status"
bitfld.word 0x00 13. " ALT_SYNC ,Synchronization status" "No DMA request,DMA request"
bitfld.word 0x00 12. " ALT_BLOCK ,End block" "Not finished,Finished"
textline " "
bitfld.word 0x00 11. " ALT_LAST ,Last frame" "Not started,Started"
bitfld.word 0x00 10. " ALT_FRAME ,Frame" "In progress,Transferred"
textline " "
bitfld.word 0x00 9. " ALT_HALF ,Half frame" "Not transferred,Transferred"
bitfld.word 0x00 8. " ALT_DROP ,Event drop" "No event drop,Event drop"
textline " "
bitfld.word 0x00 7. " ALT_TOUT ,Time-out in the channel" "No time-out,Time-out"
bitfld.word 0x00 6. " SYNC ,Synchronization status" "No DMA request,DMA request"
textline " "
bitfld.word 0x00 5. " BLOCK ,End block" "Not finished,Finished"
bitfld.word 0x00 4. " LAST ,Last frame" "Not started,Started"
textline " "
bitfld.word 0x00 3. " FRAME ,Frame" "In progress,Transferred"
bitfld.word 0x00 2. " HALF ,Half frame" "Not transferred,Transferred"
textline " "
bitfld.word 0x00 1. " DROP ,Event drop" "No event drop,Event drop"
bitfld.word 0x00 0. " TOUT ,Time-out in the channel" "No time-out,Time-out"
group (0x980+0x08)++0x11
line.word 0x00 "DMA_CSSA_L_CH6,Channel 6 source start address - lower bits"
line.word 0x02 "DMA_CSSA_U_CH6,Channel 6 source start address - upper bits"
line.word 0x04 "DMA_CDSA_L_CH6,Channel 6 destination start address - lower bits"
line.word 0x06 "DMA_CDSA_U_CH6,Channel 6 destination start address - upper bits"
line.word 0x08 "DMA_CEN_CH6,Channel 6 element number"
line.word 0x0a "DMA_CFN_CH6,Channel 6 frame number"
line.word 0x0c "DMA_CFI_CH6,Channel 6 frame index"
line.word 0x0e "DMA_CEI_CH6,Channel 6 element index"
line.word 0x10 "DMA_CPC_CH6,Channel 6 channel progress counter"
tree.end
tree "Channel 7 registers"
group 0x9C0++0x05
line.word 0x00 "DMA_CSDP_CH7,Channel 7 source destination parameters"
bitfld.word 0x00 14.--15. " DST_BURST_EN ,Destination burst enable" "Single access,Single access,Burst 4,?..."
bitfld.word 0x00 13. " DST_PACK ,Destination packing" "Disabled,Enabled"
textline " "
bitfld.word 0x00 9.--12. " DST ,Transfer destination" "EMIFF,EMIF,IMIF,TIPB,Local,TIPB_MPUI,?..."
bitfld.word 0x00 7.--8. " SRC_BURST_EN ,Source burst enable" "Single access,Single access,Burst 4,?..."
textline " "
bitfld.word 0x00 6. " SRC_PACK ,Source packing" "Disabled,Enabled"
bitfld.word 0x00 2.--5. " SRC ,Transfer source" "EMIFF,EMIF,IMIF,TIPB,Local,TIPB_MPUI,?..."
textline " "
bitfld.word 0x00 0.--1. " DATA_TYPE ,Defines the type of the data moved in the channel" "8-bit scalar,16-bit scalar,32-bit scalar,?..."
line.word 0x02 "DMA_CCR_CH7,Channel 7 control"
bitfld.word 0x02 14.--15. " DST_AMODE ,Destination addressing mode" "Const addr,Post-inc addr,Single index,Double index"
bitfld.word 0x02 12.--13. " SRC_AMODE ,Source addressing mode" "Const addr,Post-inc addr,Single index,Double index"
textline " "
bitfld.word 0x02 11. " END_PROG ,End of programming" "Not ended,Ended"
bitfld.word 0x02 9. " REPEAT ,Repetitive operations" "Disabled,Enabled"
textline " "
bitfld.word 0x02 8. " AUTO_INIT ,Autoinitialization at the end of the transfer" "Disabled,Enabled"
bitfld.word 0x02 7. " EN ,Transfer Enable" "Disabled,Enabled"
textline " "
bitfld.word 0x02 6. " PRIO ,Channel priority" "Low,High"
bitfld.word 0x02 5. " FS ,Frame synchronization" "Element,Frame"
textline " "
bitfld.word 0x02 0.--4. " SYNC ,Synchronization control" "Disabled,MCSI1 TX,MSCI1 RX,I2C RX,I2C TX,/EXT_DMA_REQ0,/EXT_DMA_REQ1,MicroWire Tx,McBSP1 TX,McBSP1 RX,McBSP3 TX,McBSP3 RX,UART1 TX,UART1 RX,UART2 TX,UART2 RX,McBSP2 TX,McBSP2 RX,UART3 TX,UART3 RX,Camera RX,MMC TX,MMC RX,Reserved,Reserved,Reserved,USB function RX0,USB function RX1,USB function RX2,USB function TX0,USB function TX1,USB function TX2"
line.word 0x04 "DMA_CICR_CH7,Channel 7 interrupt control"
bitfld.word 0x04 5. " BLOCK_IE ,End block interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 4. " LAST_IE ,Last frame interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x04 3. " FRAME_IE ,Frame interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 2. " HALF_IE ,Half frame interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x04 1. " DROP_IE ,Synchronization event drop interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 0. " TOUT_IE ,Time-out interrupt enable" "Disabled,Enabled"
rgroup (0x9C0+0x06)++0x01
line.word 0x00 "DMA_CSR_CH7,Channel 7 status"
bitfld.word 0x00 13. " ALT_SYNC ,Synchronization status" "No DMA request,DMA request"
bitfld.word 0x00 12. " ALT_BLOCK ,End block" "Not finished,Finished"
textline " "
bitfld.word 0x00 11. " ALT_LAST ,Last frame" "Not started,Started"
bitfld.word 0x00 10. " ALT_FRAME ,Frame" "In progress,Transferred"
textline " "
bitfld.word 0x00 9. " ALT_HALF ,Half frame" "Not transferred,Transferred"
bitfld.word 0x00 8. " ALT_DROP ,Event drop" "No event drop,Event drop"
textline " "
bitfld.word 0x00 7. " ALT_TOUT ,Time-out in the channel" "No time-out,Time-out"
bitfld.word 0x00 6. " SYNC ,Synchronization status" "No DMA request,DMA request"
textline " "
bitfld.word 0x00 5. " BLOCK ,End block" "Not finished,Finished"
bitfld.word 0x00 4. " LAST ,Last frame" "Not started,Started"
textline " "
bitfld.word 0x00 3. " FRAME ,Frame" "In progress,Transferred"
bitfld.word 0x00 2. " HALF ,Half frame" "Not transferred,Transferred"
textline " "
bitfld.word 0x00 1. " DROP ,Event drop" "No event drop,Event drop"
bitfld.word 0x00 0. " TOUT ,Time-out in the channel" "No time-out,Time-out"
group (0x9C0+0x08)++0x11
line.word 0x00 "DMA_CSSA_L_CH7,Channel 7 source start address - lower bits"
line.word 0x02 "DMA_CSSA_U_CH7,Channel 7 source start address - upper bits"
line.word 0x04 "DMA_CDSA_L_CH7,Channel 7 destination start address - lower bits"
line.word 0x06 "DMA_CDSA_U_CH7,Channel 7 destination start address - upper bits"
line.word 0x08 "DMA_CEN_CH7,Channel 7 element number"
line.word 0x0a "DMA_CFN_CH7,Channel 7 frame number"
line.word 0x0c "DMA_CFI_CH7,Channel 7 frame index"
line.word 0x0e "DMA_CEI_CH7,Channel 7 element index"
line.word 0x10 "DMA_CPC_CH7,Channel 7 channel progress counter"
tree.end
tree "Channel 8 registers"
group 0xA00++0x05
line.word 0x00 "DMA_CSDP_CH8,Channel 8 source destination parameters"
bitfld.word 0x00 14.--15. " DST_BURST_EN ,Destination burst enable" "Single access,Single access,Burst 4,?..."
bitfld.word 0x00 13. " DST_PACK ,Destination packing" "Disabled,Enabled"
textline " "
bitfld.word 0x00 9.--12. " DST ,Transfer destination" "EMIFF,EMIF,IMIF,TIPB,Local,TIPB_MPUI,?..."
bitfld.word 0x00 7.--8. " SRC_BURST_EN ,Source burst enable" "Single access,Single access,Burst 4,?..."
textline " "
bitfld.word 0x00 6. " SRC_PACK ,Source packing" "Disabled,Enabled"
bitfld.word 0x00 2.--5. " SRC ,Transfer source" "EMIFF,EMIF,IMIF,TIPB,Local,TIPB_MPUI,?..."
textline " "
bitfld.word 0x00 0.--1. " DATA_TYPE ,Defines the type of the data moved in the channel" "8-bit scalar,16-bit scalar,32-bit scalar,?..."
line.word 0x02 "DMA_CCR_CH8,Channel 8 control"
bitfld.word 0x02 14.--15. " DST_AMODE ,Destination addressing mode" "Const addr,Post-inc addr,Single index,Double index"
bitfld.word 0x02 12.--13. " SRC_AMODE ,Source addressing mode" "Const addr,Post-inc addr,Single index,Double index"
textline " "
bitfld.word 0x02 11. " END_PROG ,End of programming" "Not ended,Ended"
bitfld.word 0x02 9. " REPEAT ,Repetitive operations" "Disabled,Enabled"
textline " "
bitfld.word 0x02 8. " AUTO_INIT ,Autoinitialization at the end of the transfer" "Disabled,Enabled"
bitfld.word 0x02 7. " EN ,Transfer Enable" "Disabled,Enabled"
textline " "
bitfld.word 0x02 6. " PRIO ,Channel priority" "Low,High"
bitfld.word 0x02 5. " FS ,Frame synchronization" "Element,Frame"
textline " "
bitfld.word 0x02 0.--4. " SYNC ,Synchronization control" "Disabled,MCSI1 TX,MSCI1 RX,I2C RX,I2C TX,/EXT_DMA_REQ0,/EXT_DMA_REQ1,MicroWire Tx,McBSP1 TX,McBSP1 RX,McBSP3 TX,McBSP3 RX,UART1 TX,UART1 RX,UART2 TX,UART2 RX,McBSP2 TX,McBSP2 RX,UART3 TX,UART3 RX,Camera RX,MMC TX,MMC RX,Reserved,Reserved,Reserved,USB function RX0,USB function RX1,USB function RX2,USB function TX0,USB function TX1,USB function TX2"
line.word 0x04 "DMA_CICR_CH8,Channel 8 interrupt control"
bitfld.word 0x04 5. " BLOCK_IE ,End block interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 4. " LAST_IE ,Last frame interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x04 3. " FRAME_IE ,Frame interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 2. " HALF_IE ,Half frame interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x04 1. " DROP_IE ,Synchronization event drop interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 0. " TOUT_IE ,Time-out interrupt enable" "Disabled,Enabled"
rgroup (0xA00+0x06)++0x01
line.word 0x00 "DMA_CSR_CH8,Channel 8 status"
bitfld.word 0x00 13. " ALT_SYNC ,Synchronization status" "No DMA request,DMA request"
bitfld.word 0x00 12. " ALT_BLOCK ,End block" "Not finished,Finished"
textline " "
bitfld.word 0x00 11. " ALT_LAST ,Last frame" "Not started,Started"
bitfld.word 0x00 10. " ALT_FRAME ,Frame" "In progress,Transferred"
textline " "
bitfld.word 0x00 9. " ALT_HALF ,Half frame" "Not transferred,Transferred"
bitfld.word 0x00 8. " ALT_DROP ,Event drop" "No event drop,Event drop"
textline " "
bitfld.word 0x00 7. " ALT_TOUT ,Time-out in the channel" "No time-out,Time-out"
bitfld.word 0x00 6. " SYNC ,Synchronization status" "No DMA request,DMA request"
textline " "
bitfld.word 0x00 5. " BLOCK ,End block" "Not finished,Finished"
bitfld.word 0x00 4. " LAST ,Last frame" "Not started,Started"
textline " "
bitfld.word 0x00 3. " FRAME ,Frame" "In progress,Transferred"
bitfld.word 0x00 2. " HALF ,Half frame" "Not transferred,Transferred"
textline " "
bitfld.word 0x00 1. " DROP ,Event drop" "No event drop,Event drop"
bitfld.word 0x00 0. " TOUT ,Time-out in the channel" "No time-out,Time-out"
group (0xA00+0x08)++0x11
line.word 0x00 "DMA_CSSA_L_CH8,Channel 8 source start address - lower bits"
line.word 0x02 "DMA_CSSA_U_CH8,Channel 8 source start address - upper bits"
line.word 0x04 "DMA_CDSA_L_CH8,Channel 8 destination start address - lower bits"
line.word 0x06 "DMA_CDSA_U_CH8,Channel 8 destination start address - upper bits"
line.word 0x08 "DMA_CEN_CH8,Channel 8 element number"
line.word 0x0a "DMA_CFN_CH8,Channel 8 frame number"
line.word 0x0c "DMA_CFI_CH8,Channel 8 frame index"
line.word 0x0e "DMA_CEI_CH8,Channel 8 element index"
line.word 0x10 "DMA_CPC_CH8,Channel 8 channel progress counter"
tree.end
width 17.
tree "LCD registers"
group 0xb00++0x1
line.word 0x00 "DMA_LCD_CTRL,LCD control"
bitfld.word 0x00 6. " LCD_SOURCE ,Memory source for the LCD channel" "EMIFF,IMIF"
bitfld.word 0x00 5. " BUS_ERROR_IT_COND ,Status LCD channel register" "No error,Error"
textline " "
bitfld.word 0x00 4. " FRAME_2_IT_COND ,Status LCD channel register" "No error,Error"
bitfld.word 0x00 3. " FRAME_1_IT_COND ,Status LCD channel register" "No error,Error"
textline " "
bitfld.word 0x00 2. " BUS_ERROR_IT_IE ,Bus error interrupt enable" "Disabled,Enabled"
bitfld.word 0x00 1. " FRAME_IT_IE ,End frame interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x00 0. " FRAME_MODE ,Kind of frame used for LCD transfer" "One buffer,Two buffers"
group 0xB02++0x07
line.word 0x00 "DMA_LCD_TOP_F1_L,LCD top address for frame buffer 1 lower bits"
line.word 0x02 "DMA_LCD_TOP_F1_U,LCD top address for frame buffer 1 upper bits"
line.word 0x04 "DMA_LCD_BOT_F1_L,LCD bottom address for frame buffer 1 lower bits"
line.word 0x06 "DMA_LCD_BOT_F1_U,LCD bottom address for frame buffer 1 upper bits"
group 0xB0A++0x07
line.word 0x00 "DMA_LCD_TOP_F2_L,LCD top address for frame buffer 2 lower bits"
line.word 0x02 "DMA_LCD_TOP_F2_U,LCD top address for frame buffer 2 upper bits"
line.word 0x04 "DMA_LCD_BOT_F2_L,LCD bottom address for frame buffer 2 lower bits"
line.word 0x06 "DMA_LCD_BOT_F2_U,LCD bottom address for frame buffer 2 upper bits"
tree.end
tree.end
tree "MPU Private Peripherals"
tree "Timer Registers"
base ad:0xfffec000
width 11.
group 0x500++0x03 "Timer 1 registers"
line.long 0x00 "CNTL_TIMER,Control timer"
bitfld.long 0x00 6. " FREE ,FREE bit (continue counting in suspend mode)" "Stopped,Running"
bitfld.long 0x00 5. " CLOCK_ENABLE ,External timer clock enable" "Disabled,Enabled"
bitfld.long 0x00 2.--4. " PTV ,Prescale clock timer value" "2,4,8,16,32,64,128,256"
bitfld.long 0x00 1. " AR ,Autoreload" "One-shot,Autoreload"
bitfld.long 0x00 0. " ST ,Start/Stop timer" "Stop,Start"
group 0x508++0x03
line.long 0x00 "LR_TIM,Load/Read timer"
group 0x600++0x03 "Timer 2 registers"
line.long 0x00 "CNTL_TIMER,Control timer"
bitfld.long 0x00 6. " FREE ,FREE bit (continue counting in suspend mode)" "Stopped,Running"
bitfld.long 0x00 5. " CLOCK_ENABLE ,External timer clock enable" "Disabled,Enabled"
bitfld.long 0x00 2.--4. " PTV ,Prescale clock timer value" "2,4,8,16,32,64,128,256"
bitfld.long 0x00 1. " AR ,Autoreload" "One-shot,Autoreload"
bitfld.long 0x00 0. " ST ,Start/Stop timer" "Stop,Start"
group 0x608++0x03
line.long 0x00 "LR_TIM,Load/Read timer"
group 0x700++0x03 "Timer 3 registers"
line.long 0x00 "CNTL_TIMER,Control timer"
bitfld.long 0x00 6. " FREE ,FREE bit (continue counting in suspend mode)" "Stopped,Running"
bitfld.long 0x00 5. " CLOCK_ENABLE ,External timer clock enable" "Disabled,Enabled"
bitfld.long 0x00 2.--4. " PTV ,Prescale clock timer value" "2,4,8,16,32,64,128,256"
bitfld.long 0x00 1. " AR ,Autoreload" "One-shot,Autoreload"
bitfld.long 0x00 0. " ST ,Start/Stop timer" "Stop,Start"
group 0x708++0x03
line.long 0x00 "LR_TIM,Load/Read timer"
tree.end
tree "Watchdog Timer Registers"
width 11.
base ad:0xfffec800
group 0x00++0x01
line.word 0x00 "CNTL_TIMER,Control timer"
bitfld.word 0x000 9.--11. " PTV ,Prescale clock timer value" "2,4,8,16,32,64,128,256"
bitfld.word 0x00 8. " AR ,Autoreload timer" "One-shot,Autoreload"
bitfld.word 0x00 7. " ST ,Start/Stop timer" "Stop,Start"
bitfld.word 0x00 1. " FREE ,Free run enable" "Suspend,Free run"
group 0x04++0x01
line.word 0x00 "LR_TIM,Load/Read timer"
group 0x08++0x01
line.word 0x00 "TIMER_MODE,Timer mode"
eventfld.word 0x00 15. " WATCHDOG ,Switchback timer mode to watchdog" "No effect,Switch"
hexmask.word.byte 0x00 0.--7. 1. " WATCHDOG_DIS ,Disable watchdog"
tree.end
tree "Interrupt Handler Level 1 Registers"
base ad:0xfffe0000+0xcb00
width 13.
group 0x00++0x07
line.long 0x00 "ITR,Interrupt input"
bitfld.long 0x00 31. " IRQ_31 ,Interrupt 31 request" "Not requested,Requested"
bitfld.long 0x00 30. " IRQ_30 ,Interrupt 30 request" "Not requested,Requested"
bitfld.long 0x00 29. " IRQ_29 ,Interrupt 29 request" "Not requested,Requested"
textline " "
bitfld.long 0x00 28. " IRQ_28 ,Interrupt 28 request" "Not requested,Requested"
bitfld.long 0x00 27. " IRQ_27 ,Interrupt 27 request" "Not requested,Requested"
bitfld.long 0x00 26. " IRQ_26 ,Interrupt 26 request" "Not requested,Requested"
textline " "
bitfld.long 0x00 25. " IRQ_25 ,Interrupt 25 request" "Not requested,Requested"
bitfld.long 0x00 24. " IRQ_24 ,Interrupt 24 request" "Not requested,Requested"
bitfld.long 0x00 23. " IRQ_23 ,Interrupt 23 request" "Not requested,Requested"
textline " "
bitfld.long 0x00 22. " IRQ_22 ,Interrupt 22 request" "Not requested,Requested"
bitfld.long 0x00 21. " IRQ_21 ,Interrupt 21 request" "Not requested,Requested"
bitfld.long 0x00 20. " IRQ_20 ,Interrupt 20 request" "Not requested,Requested"
textline " "
bitfld.long 0x00 19. " IRQ_19 ,Interrupt 19 request" "Not requested,Requested"
bitfld.long 0x00 18. " IRQ_18 ,Interrupt 18 request" "Not requested,Requested"
bitfld.long 0x00 17. " IRQ_17 ,Interrupt 17 request" "Not requested,Requested"
textline " "
bitfld.long 0x00 16. " IRQ_16 ,Interrupt 16 request" "Not requested,Requested"
bitfld.long 0x00 15. " IRQ_15 ,Interrupt 15 request" "Not requested,Requested"
bitfld.long 0x00 14. " IRQ_14 ,Interrupt 14 request" "Not requested,Requested"
textline " "
bitfld.long 0x00 13. " IRQ_13 ,Interrupt 13 request" "Not requested,Requested"
bitfld.long 0x00 12. " IRQ_12 ,Interrupt 12 request" "Not requested,Requested"
bitfld.long 0x00 11. " IRQ_11 ,Interrupt 11 request" "Not requested,Requested"
textline " "
bitfld.long 0x00 10. " IRQ_10 ,Interrupt 10 request" "Not requested,Requested"
bitfld.long 0x00 9. " IRQ_9 ,Interrupt 9 request" "Not requested,Requested"
bitfld.long 0x00 8. " IRQ_8 ,Interrupt 8 request" "Not requested,Requested"
textline " "
bitfld.long 0x00 7. " IRQ_7 ,Interrupt 7 request" "Not requested,Requested"
bitfld.long 0x00 6. " IRQ_6 ,Interrupt 6 request" "Not requested,Requested"
bitfld.long 0x00 5. " IRQ_5 ,Interrupt 5 request" "Not requested,Requested"
textline " "
bitfld.long 0x00 4. " IRQ_4 ,Interrupt 4 request" "Not requested,Requested"
bitfld.long 0x00 3. " IRQ_3 ,Interrupt 3 request" "Not requested,Requested"
bitfld.long 0x00 2. " IRQ_2 ,Interrupt 2 request" "Not requested,Requested"
textline " "
bitfld.long 0x00 1. " IRQ_1 ,Interrupt 1 request" "Not requested,Requested"
bitfld.long 0x00 0. " IRQ_0 ,Interrupt 0 request" "Not requested,Requested"
line.long 0x04 "MIR,Mask interrupt"
bitfld.long 0x04 31. " IRQ_31 ,Interrupt 31 mask" "Not masked,Masked"
bitfld.long 0x04 30. " IRQ_30 ,Interrupt 30 mask" "Not masked,Masked"
bitfld.long 0x04 29. " IRQ_29 ,Interrupt 29 mask" "Not masked,Masked"
textline " "
bitfld.long 0x04 28. " IRQ_28 ,Interrupt 28 mask" "Not masked,Masked"
bitfld.long 0x04 27. " IRQ_27 ,Interrupt 27 mask" "Not masked,Masked"
bitfld.long 0x04 26. " IRQ_26 ,Interrupt 26 mask" "Not masked,Masked"
textline " "
bitfld.long 0x04 25. " IRQ_25 ,Interrupt 25 mask" "Not masked,Masked"
bitfld.long 0x04 24. " IRQ_24 ,Interrupt 24 mask" "Not masked,Masked"
bitfld.long 0x04 23. " IRQ_23 ,Interrupt 23 mask" "Not masked,Masked"
textline " "
bitfld.long 0x04 22. " IRQ_22 ,Interrupt 22 mask" "Not masked,Masked"
bitfld.long 0x04 21. " IRQ_21 ,Interrupt 21 mask" "Not masked,Masked"
bitfld.long 0x04 20. " IRQ_20 ,Interrupt 20 mask" "Not masked,Masked"
textline " "
bitfld.long 0x04 19. " IRQ_19 ,Interrupt 19 mask" "Not masked,Masked"
bitfld.long 0x04 18. " IRQ_18 ,Interrupt 18 mask" "Not masked,Masked"
bitfld.long 0x04 17. " IRQ_17 ,Interrupt 17 mask" "Not masked,Masked"
textline " "
bitfld.long 0x04 16. " IRQ_16 ,Interrupt 16 mask" "Not masked,Masked"
bitfld.long 0x04 15. " IRQ_15 ,Interrupt 15 mask" "Not masked,Masked"
bitfld.long 0x04 14. " IRQ_14 ,Interrupt 14 mask" "Not masked,Masked"
textline " "
bitfld.long 0x04 13. " IRQ_13 ,Interrupt 13 mask" "Not masked,Masked"
bitfld.long 0x04 12. " IRQ_12 ,Interrupt 12 mask" "Not masked,Masked"
bitfld.long 0x04 11. " IRQ_11 ,Interrupt 11 mask" "Not masked,Masked"
textline " "
bitfld.long 0x04 10. " IRQ_10 ,Interrupt 10 mask" "Not masked,Masked"
bitfld.long 0x04 9. " IRQ_9 ,Interrupt 9 mask" "Not masked,Masked"
bitfld.long 0x04 8. " IRQ_8 ,Interrupt 8 mask" "Not masked,Masked"
textline " "
bitfld.long 0x04 7. " IRQ_7 ,Interrupt 7 mask" "Not masked,Masked"
bitfld.long 0x04 6. " IRQ_6 ,Interrupt 6 mask" "Not masked,Masked"
bitfld.long 0x04 5. " IRQ_5 ,Interrupt 5 mask" "Not masked,Masked"
textline " "
bitfld.long 0x04 4. " IRQ_4 ,Interrupt 4 mask" "Not masked,Masked"
bitfld.long 0x04 3. " IRQ_3 ,Interrupt 3 mask" "Not masked,Masked"
bitfld.long 0x04 2. " IRQ_2 ,Interrupt 2 mask" "Not masked,Masked"
textline " "
bitfld.long 0x04 1. " IRQ_1 ,Interrupt 1 mask" "Not masked,Masked"
bitfld.long 0x04 0. " IRQ_0 ,Interrupt 0 mask" "Not masked,Masked"
rgroup 0x10++0x07
line.long 0x00 "SIR_IRQ_CODE,Interrupt encoded source (IRQ)"
bitfld.long 0x00 0.--4. " IRQ_NUM ,IRQ interrupt currently being serviced" "IRQ0,IRQ1,IRQ2,IRQ3,IRQ4,IRQ5,IRQ6,IRQ7,IRQ8,IRQ9,IRQ10,IRQ11,IRQ12,IRQ13,IRQ14,IRQ15,IRQ16,IRQ17,IRQ18,IRQ19,IRQ20,IRQ21,IRQ22,IRQ23,IRQ24,IRQ25,IRQ26,IRQ27,IRQ28,IRQ29,IRQ30,IRQ31"
line.long 0x04 "SIR_FIQ_CODE,Interrupt encoded source (FIQ)"
bitfld.long 0x04 0.--4. " FIQ_NUM ,FIQ interrupt currently being serviced" "IRQ0,IRQ1,IRQ2,IRQ3,IRQ4,IRQ5,IRQ6,IRQ7,IRQ8,IRQ9,IRQ10,IRQ11,IRQ12,IRQ13,IRQ14,IRQ15,IRQ16,IRQ17,IRQ18,IRQ19,IRQ20,IRQ21,IRQ22,IRQ23,IRQ24,IRQ25,IRQ26,IRQ27,IRQ28,IRQ29,IRQ30,IRQ31"
group 0x18++0x87
line.long 0x00 "CONTROL_REG,Interrupt control register"
eventfld.long 0x00 1. " NEW_FIQ_REG ,New FIQ agreement" "Disabled,Enabled"
eventfld.long 0x00 0. " NEW_IRQ_REG ,New IRQ agreement" "Disabled,Enabled"
line.long 0x4 "ILR0,Interrupt priority level for IRQ 0"
bitfld.long 0x4 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x4 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x4 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x8 "ILR1,Interrupt priority level for IRQ 1"
bitfld.long 0x8 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x8 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x8 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0xC "ILR2,Interrupt priority level for IRQ 2"
bitfld.long 0xC 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0xC 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0xC 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x10 "ILR3,Interrupt priority level for IRQ 3"
bitfld.long 0x10 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x10 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x10 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x14 "ILR4,Interrupt priority level for IRQ 4"
bitfld.long 0x14 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x14 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x14 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x18 "ILR5,Interrupt priority level for IRQ 5"
bitfld.long 0x18 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x18 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x18 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x1C "ILR6,Interrupt priority level for IRQ 6"
bitfld.long 0x1C 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x1C 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x1C 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x20 "ILR7,Interrupt priority level for IRQ 7"
bitfld.long 0x20 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x20 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x20 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x24 "ILR8,Interrupt priority level for IRQ 8"
bitfld.long 0x24 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x24 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x24 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x28 "ILR9,Interrupt priority level for IRQ 9"
bitfld.long 0x28 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x28 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x28 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x2C "ILR10,Interrupt priority level for IRQ 10"
bitfld.long 0x2C 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x2C 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x2C 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x30 "ILR11,Interrupt priority level for IRQ 11"
bitfld.long 0x30 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x30 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x30 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x34 "ILR12,Interrupt priority level for IRQ 12"
bitfld.long 0x34 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x34 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x34 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x38 "ILR13,Interrupt priority level for IRQ 13"
bitfld.long 0x38 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x38 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x38 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x3C "ILR14,Interrupt priority level for IRQ 14"
bitfld.long 0x3C 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x3C 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x3C 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x40 "ILR15,Interrupt priority level for IRQ 15"
bitfld.long 0x40 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x40 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x40 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x44 "ILR16,Interrupt priority level for IRQ 16"
bitfld.long 0x44 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x44 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x44 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x48 "ILR17,Interrupt priority level for IRQ 17"
bitfld.long 0x48 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x48 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x48 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x4C "ILR18,Interrupt priority level for IRQ 18"
bitfld.long 0x4C 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x4C 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x4C 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x50 "ILR19,Interrupt priority level for IRQ 19"
bitfld.long 0x50 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x50 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x50 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x54 "ILR20,Interrupt priority level for IRQ 20"
bitfld.long 0x54 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x54 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x54 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x58 "ILR21,Interrupt priority level for IRQ 21"
bitfld.long 0x58 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x58 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x58 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x5C "ILR22,Interrupt priority level for IRQ 22"
bitfld.long 0x5C 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x5C 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x5C 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x60 "ILR23,Interrupt priority level for IRQ 23"
bitfld.long 0x60 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x60 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x60 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x64 "ILR24,Interrupt priority level for IRQ 24"
bitfld.long 0x64 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x64 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x64 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x68 "ILR25,Interrupt priority level for IRQ 25"
bitfld.long 0x68 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x68 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x68 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x6C "ILR26,Interrupt priority level for IRQ 26"
bitfld.long 0x6C 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x6C 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x6C 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x70 "ILR27,Interrupt priority level for IRQ 27"
bitfld.long 0x70 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x70 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x70 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x74 "ILR28,Interrupt priority level for IRQ 28"
bitfld.long 0x74 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x74 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x74 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x78 "ILR29,Interrupt priority level for IRQ 29"
bitfld.long 0x78 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x78 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x78 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x7C "ILR30,Interrupt priority level for IRQ 30"
bitfld.long 0x7C 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x7C 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x7C 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x80 "ILR31,Interrupt priority level for IRQ 31"
bitfld.long 0x80 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x80 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x80 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x84 "ISR,Software interrupt set register"
bitfld.long 0x84 31. " SWI31 ,Software interrupt 31 set register" "Not set,Set"
bitfld.long 0x84 30. " SWI30 ,Software interrupt 30 set register" "Not set,Set"
bitfld.long 0x84 29. " SWI29 ,Software interrupt 29 set register" "Not set,Set"
textline " "
bitfld.long 0x84 28. " SWI28 ,Software interrupt 28 set register" "Not set,Set"
bitfld.long 0x84 27. " SWI27 ,Software interrupt 27 set register" "Not set,Set"
bitfld.long 0x84 26. " SWI26 ,Software interrupt 26 set register" "Not set,Set"
textline " "
bitfld.long 0x84 25. " SWI25 ,Software interrupt 25 set register" "Not set,Set"
bitfld.long 0x84 24. " SWI24 ,Software interrupt 24 set register" "Not set,Set"
bitfld.long 0x84 23. " SWI23 ,Software interrupt 23 set register" "Not set,Set"
textline " "
bitfld.long 0x84 22. " SWI22 ,Software interrupt 22 set register" "Not set,Set"
bitfld.long 0x84 21. " SWI21 ,Software interrupt 21 set register" "Not set,Set"
bitfld.long 0x84 20. " SWI20 ,Software interrupt 20 set register" "Not set,Set"
textline " "
bitfld.long 0x84 19. " SWI19 ,Software interrupt 19 set register" "Not set,Set"
bitfld.long 0x84 18. " SWI18 ,Software interrupt 18 set register" "Not set,Set"
bitfld.long 0x84 17. " SWI17 ,Software interrupt 17 set register" "Not set,Set"
textline " "
bitfld.long 0x84 16. " SWI16 ,Software interrupt 16 set register" "Not set,Set"
bitfld.long 0x84 15. " SWI15 ,Software interrupt 15 set register" "Not set,Set"
bitfld.long 0x84 14. " SWI14 ,Software interrupt 14 set register" "Not set,Set"
textline " "
bitfld.long 0x84 13. " SWI13 ,Software interrupt 13 set register" "Not set,Set"
bitfld.long 0x84 12. " SWI12 ,Software interrupt 12 set register" "Not set,Set"
bitfld.long 0x84 11. " SWI11 ,Software interrupt 11 set register" "Not set,Set"
textline " "
bitfld.long 0x84 10. " SWI10 ,Software interrupt 10 set register" "Not set,Set"
bitfld.long 0x84 9. " SWI9 ,Software interrupt 9 set register" "Not set,Set"
bitfld.long 0x84 8. " SWI8 ,Software interrupt 8 set register" "Not set,Set"
textline " "
bitfld.long 0x84 7. " SWI7 ,Software interrupt 7 set register" "Not set,Set"
bitfld.long 0x84 6. " SWI6 ,Software interrupt 6 set register" "Not set,Set"
bitfld.long 0x84 5. " SWI5 ,Software interrupt 5 set register" "Not set,Set"
textline " "
bitfld.long 0x84 4. " SWI4 ,Software interrupt 4 set register" "Not set,Set"
bitfld.long 0x84 3. " SWI3 ,Software interrupt 3 set register" "Not set,Set"
bitfld.long 0x84 2. " SWI2 ,Software interrupt 2 set register" "Not set,Set"
textline " "
bitfld.long 0x84 1. " SWI1 ,Software interrupt 1 set register" "Not set,Set"
bitfld.long 0x84 0. " SWI0 ,Software interrupt 0 set register" "Not set,Set"
tree.end
tree "Interrupt Handler Level 2 Registers"
base ad:0xfffe0000+0x0000
width 13.
group 0x00++0x07
line.long 0x00 "ITR,Interrupt input"
bitfld.long 0x00 31. " IRQ_31 ,Interrupt 31 request" "Not requested,Requested"
bitfld.long 0x00 30. " IRQ_30 ,Interrupt 30 request" "Not requested,Requested"
bitfld.long 0x00 29. " IRQ_29 ,Interrupt 29 request" "Not requested,Requested"
textline " "
bitfld.long 0x00 28. " IRQ_28 ,Interrupt 28 request" "Not requested,Requested"
bitfld.long 0x00 27. " IRQ_27 ,Interrupt 27 request" "Not requested,Requested"
bitfld.long 0x00 26. " IRQ_26 ,Interrupt 26 request" "Not requested,Requested"
textline " "
bitfld.long 0x00 25. " IRQ_25 ,Interrupt 25 request" "Not requested,Requested"
bitfld.long 0x00 24. " IRQ_24 ,Interrupt 24 request" "Not requested,Requested"
bitfld.long 0x00 23. " IRQ_23 ,Interrupt 23 request" "Not requested,Requested"
textline " "
bitfld.long 0x00 22. " IRQ_22 ,Interrupt 22 request" "Not requested,Requested"
bitfld.long 0x00 21. " IRQ_21 ,Interrupt 21 request" "Not requested,Requested"
bitfld.long 0x00 20. " IRQ_20 ,Interrupt 20 request" "Not requested,Requested"
textline " "
bitfld.long 0x00 19. " IRQ_19 ,Interrupt 19 request" "Not requested,Requested"
bitfld.long 0x00 18. " IRQ_18 ,Interrupt 18 request" "Not requested,Requested"
bitfld.long 0x00 17. " IRQ_17 ,Interrupt 17 request" "Not requested,Requested"
textline " "
bitfld.long 0x00 16. " IRQ_16 ,Interrupt 16 request" "Not requested,Requested"
bitfld.long 0x00 15. " IRQ_15 ,Interrupt 15 request" "Not requested,Requested"
bitfld.long 0x00 14. " IRQ_14 ,Interrupt 14 request" "Not requested,Requested"
textline " "
bitfld.long 0x00 13. " IRQ_13 ,Interrupt 13 request" "Not requested,Requested"
bitfld.long 0x00 12. " IRQ_12 ,Interrupt 12 request" "Not requested,Requested"
bitfld.long 0x00 11. " IRQ_11 ,Interrupt 11 request" "Not requested,Requested"
textline " "
bitfld.long 0x00 10. " IRQ_10 ,Interrupt 10 request" "Not requested,Requested"
bitfld.long 0x00 9. " IRQ_9 ,Interrupt 9 request" "Not requested,Requested"
bitfld.long 0x00 8. " IRQ_8 ,Interrupt 8 request" "Not requested,Requested"
textline " "
bitfld.long 0x00 7. " IRQ_7 ,Interrupt 7 request" "Not requested,Requested"
bitfld.long 0x00 6. " IRQ_6 ,Interrupt 6 request" "Not requested,Requested"
bitfld.long 0x00 5. " IRQ_5 ,Interrupt 5 request" "Not requested,Requested"
textline " "
bitfld.long 0x00 4. " IRQ_4 ,Interrupt 4 request" "Not requested,Requested"
bitfld.long 0x00 3. " IRQ_3 ,Interrupt 3 request" "Not requested,Requested"
bitfld.long 0x00 2. " IRQ_2 ,Interrupt 2 request" "Not requested,Requested"
textline " "
bitfld.long 0x00 1. " IRQ_1 ,Interrupt 1 request" "Not requested,Requested"
bitfld.long 0x00 0. " IRQ_0 ,Interrupt 0 request" "Not requested,Requested"
line.long 0x04 "MIR,Mask interrupt"
bitfld.long 0x04 31. " IRQ_31 ,Interrupt 31 mask" "Not masked,Masked"
bitfld.long 0x04 30. " IRQ_30 ,Interrupt 30 mask" "Not masked,Masked"
bitfld.long 0x04 29. " IRQ_29 ,Interrupt 29 mask" "Not masked,Masked"
textline " "
bitfld.long 0x04 28. " IRQ_28 ,Interrupt 28 mask" "Not masked,Masked"
bitfld.long 0x04 27. " IRQ_27 ,Interrupt 27 mask" "Not masked,Masked"
bitfld.long 0x04 26. " IRQ_26 ,Interrupt 26 mask" "Not masked,Masked"
textline " "
bitfld.long 0x04 25. " IRQ_25 ,Interrupt 25 mask" "Not masked,Masked"
bitfld.long 0x04 24. " IRQ_24 ,Interrupt 24 mask" "Not masked,Masked"
bitfld.long 0x04 23. " IRQ_23 ,Interrupt 23 mask" "Not masked,Masked"
textline " "
bitfld.long 0x04 22. " IRQ_22 ,Interrupt 22 mask" "Not masked,Masked"
bitfld.long 0x04 21. " IRQ_21 ,Interrupt 21 mask" "Not masked,Masked"
bitfld.long 0x04 20. " IRQ_20 ,Interrupt 20 mask" "Not masked,Masked"
textline " "
bitfld.long 0x04 19. " IRQ_19 ,Interrupt 19 mask" "Not masked,Masked"
bitfld.long 0x04 18. " IRQ_18 ,Interrupt 18 mask" "Not masked,Masked"
bitfld.long 0x04 17. " IRQ_17 ,Interrupt 17 mask" "Not masked,Masked"
textline " "
bitfld.long 0x04 16. " IRQ_16 ,Interrupt 16 mask" "Not masked,Masked"
bitfld.long 0x04 15. " IRQ_15 ,Interrupt 15 mask" "Not masked,Masked"
bitfld.long 0x04 14. " IRQ_14 ,Interrupt 14 mask" "Not masked,Masked"
textline " "
bitfld.long 0x04 13. " IRQ_13 ,Interrupt 13 mask" "Not masked,Masked"
bitfld.long 0x04 12. " IRQ_12 ,Interrupt 12 mask" "Not masked,Masked"
bitfld.long 0x04 11. " IRQ_11 ,Interrupt 11 mask" "Not masked,Masked"
textline " "
bitfld.long 0x04 10. " IRQ_10 ,Interrupt 10 mask" "Not masked,Masked"
bitfld.long 0x04 9. " IRQ_9 ,Interrupt 9 mask" "Not masked,Masked"
bitfld.long 0x04 8. " IRQ_8 ,Interrupt 8 mask" "Not masked,Masked"
textline " "
bitfld.long 0x04 7. " IRQ_7 ,Interrupt 7 mask" "Not masked,Masked"
bitfld.long 0x04 6. " IRQ_6 ,Interrupt 6 mask" "Not masked,Masked"
bitfld.long 0x04 5. " IRQ_5 ,Interrupt 5 mask" "Not masked,Masked"
textline " "
bitfld.long 0x04 4. " IRQ_4 ,Interrupt 4 mask" "Not masked,Masked"
bitfld.long 0x04 3. " IRQ_3 ,Interrupt 3 mask" "Not masked,Masked"
bitfld.long 0x04 2. " IRQ_2 ,Interrupt 2 mask" "Not masked,Masked"
textline " "
bitfld.long 0x04 1. " IRQ_1 ,Interrupt 1 mask" "Not masked,Masked"
bitfld.long 0x04 0. " IRQ_0 ,Interrupt 0 mask" "Not masked,Masked"
rgroup 0x10++0x07
line.long 0x00 "SIR_IRQ_CODE,Interrupt encoded source (IRQ)"
bitfld.long 0x00 0.--4. " IRQ_NUM ,IRQ interrupt currently being serviced" "IRQ0,IRQ1,IRQ2,IRQ3,IRQ4,IRQ5,IRQ6,IRQ7,IRQ8,IRQ9,IRQ10,IRQ11,IRQ12,IRQ13,IRQ14,IRQ15,IRQ16,IRQ17,IRQ18,IRQ19,IRQ20,IRQ21,IRQ22,IRQ23,IRQ24,IRQ25,IRQ26,IRQ27,IRQ28,IRQ29,IRQ30,IRQ31"
line.long 0x04 "SIR_FIQ_CODE,Interrupt encoded source (FIQ)"
bitfld.long 0x04 0.--4. " FIQ_NUM ,FIQ interrupt currently being serviced" "IRQ0,IRQ1,IRQ2,IRQ3,IRQ4,IRQ5,IRQ6,IRQ7,IRQ8,IRQ9,IRQ10,IRQ11,IRQ12,IRQ13,IRQ14,IRQ15,IRQ16,IRQ17,IRQ18,IRQ19,IRQ20,IRQ21,IRQ22,IRQ23,IRQ24,IRQ25,IRQ26,IRQ27,IRQ28,IRQ29,IRQ30,IRQ31"
group 0x18++0x87
line.long 0x00 "CONTROL_REG,Interrupt control register"
eventfld.long 0x00 1. " NEW_FIQ_REG ,New FIQ agreement" "Disabled,Enabled"
eventfld.long 0x00 0. " NEW_IRQ_REG ,New IRQ agreement" "Disabled,Enabled"
line.long 0x4 "ILR0,Interrupt priority level for IRQ 0"
bitfld.long 0x4 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x4 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x4 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x8 "ILR1,Interrupt priority level for IRQ 1"
bitfld.long 0x8 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x8 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x8 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0xC "ILR2,Interrupt priority level for IRQ 2"
bitfld.long 0xC 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0xC 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0xC 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x10 "ILR3,Interrupt priority level for IRQ 3"
bitfld.long 0x10 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x10 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x10 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x14 "ILR4,Interrupt priority level for IRQ 4"
bitfld.long 0x14 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x14 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x14 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x18 "ILR5,Interrupt priority level for IRQ 5"
bitfld.long 0x18 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x18 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x18 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x1C "ILR6,Interrupt priority level for IRQ 6"
bitfld.long 0x1C 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x1C 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x1C 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x20 "ILR7,Interrupt priority level for IRQ 7"
bitfld.long 0x20 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x20 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x20 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x24 "ILR8,Interrupt priority level for IRQ 8"
bitfld.long 0x24 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x24 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x24 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x28 "ILR9,Interrupt priority level for IRQ 9"
bitfld.long 0x28 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x28 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x28 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x2C "ILR10,Interrupt priority level for IRQ 10"
bitfld.long 0x2C 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x2C 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x2C 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x30 "ILR11,Interrupt priority level for IRQ 11"
bitfld.long 0x30 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x30 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x30 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x34 "ILR12,Interrupt priority level for IRQ 12"
bitfld.long 0x34 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x34 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x34 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x38 "ILR13,Interrupt priority level for IRQ 13"
bitfld.long 0x38 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x38 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x38 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x3C "ILR14,Interrupt priority level for IRQ 14"
bitfld.long 0x3C 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x3C 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x3C 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x40 "ILR15,Interrupt priority level for IRQ 15"
bitfld.long 0x40 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x40 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x40 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x44 "ILR16,Interrupt priority level for IRQ 16"
bitfld.long 0x44 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x44 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x44 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x48 "ILR17,Interrupt priority level for IRQ 17"
bitfld.long 0x48 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x48 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x48 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x4C "ILR18,Interrupt priority level for IRQ 18"
bitfld.long 0x4C 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x4C 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x4C 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x50 "ILR19,Interrupt priority level for IRQ 19"
bitfld.long 0x50 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x50 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x50 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x54 "ILR20,Interrupt priority level for IRQ 20"
bitfld.long 0x54 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x54 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x54 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x58 "ILR21,Interrupt priority level for IRQ 21"
bitfld.long 0x58 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x58 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x58 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x5C "ILR22,Interrupt priority level for IRQ 22"
bitfld.long 0x5C 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x5C 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x5C 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x60 "ILR23,Interrupt priority level for IRQ 23"
bitfld.long 0x60 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x60 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x60 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x64 "ILR24,Interrupt priority level for IRQ 24"
bitfld.long 0x64 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x64 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x64 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x68 "ILR25,Interrupt priority level for IRQ 25"
bitfld.long 0x68 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x68 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x68 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x6C "ILR26,Interrupt priority level for IRQ 26"
bitfld.long 0x6C 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x6C 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x6C 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x70 "ILR27,Interrupt priority level for IRQ 27"
bitfld.long 0x70 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x70 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x70 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x74 "ILR28,Interrupt priority level for IRQ 28"
bitfld.long 0x74 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x74 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x74 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x78 "ILR29,Interrupt priority level for IRQ 29"
bitfld.long 0x78 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x78 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x78 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x7C "ILR30,Interrupt priority level for IRQ 30"
bitfld.long 0x7C 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x7C 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x7C 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x80 "ILR31,Interrupt priority level for IRQ 31"
bitfld.long 0x80 2.--6. " PRIORITY ,Priority level" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0"
bitfld.long 0x80 1. " SENS_EDGE ,Edge/Level triggering" "Falling edge,Low level"
bitfld.long 0x80 0. " FIQ ,Interrupt routing" "IRQ,FIQ"
line.long 0x84 "ISR,Software interrupt set register"
bitfld.long 0x84 31. " SWI31 ,Software interrupt 31 set register" "Not set,Set"
bitfld.long 0x84 30. " SWI30 ,Software interrupt 30 set register" "Not set,Set"
bitfld.long 0x84 29. " SWI29 ,Software interrupt 29 set register" "Not set,Set"
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bitfld.long 0x84 28. " SWI28 ,Software interrupt 28 set register" "Not set,Set"
bitfld.long 0x84 27. " SWI27 ,Software interrupt 27 set register" "Not set,Set"
bitfld.long 0x84 26. " SWI26 ,Software interrupt 26 set register" "Not set,Set"
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bitfld.long 0x84 25. " SWI25 ,Software interrupt 25 set register" "Not set,Set"
bitfld.long 0x84 24. " SWI24 ,Software interrupt 24 set register" "Not set,Set"
bitfld.long 0x84 23. " SWI23 ,Software interrupt 23 set register" "Not set,Set"
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bitfld.long 0x84 22. " SWI22 ,Software interrupt 22 set register" "Not set,Set"
bitfld.long 0x84 21. " SWI21 ,Software interrupt 21 set register" "Not set,Set"
bitfld.long 0x84 20. " SWI20 ,Software interrupt 20 set register" "Not set,Set"
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bitfld.long 0x84 19. " SWI19 ,Software interrupt 19 set register" "Not set,Set"
bitfld.long 0x84 18. " SWI18 ,Software interrupt 18 set register" "Not set,Set"
bitfld.long 0x84 17. " SWI17 ,Software interrupt 17 set register" "Not set,Set"
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bitfld.long 0x84 16. " SWI16 ,Software interrupt 16 set register" "Not set,Set"
bitfld.long 0x84 15. " SWI15 ,Software interrupt 15 set register" "Not set,Set"
bitfld.long 0x84 14. " SWI14 ,Software interrupt 14 set register" "Not set,Set"
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bitfld.long 0x84 13. " SWI13 ,Software interrupt 13 set register" "Not set,Set"
bitfld.long 0x84 12. " SWI12 ,Software interrupt 12 set register" "Not set,Set"
bitfld.long 0x84 11. " SWI11 ,Software interrupt 11 set register" "Not set,Set"
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bitfld.long 0x84 10. " SWI10 ,Software interrupt 10 set register" "Not set,Set"
bitfld.long 0x84 9. " SWI9 ,Software interrupt 9 set register" "Not set,Set"
bitfld.long 0x84 8. " SWI8 ,Software interrupt 8 set register" "Not set,Set"
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bitfld.long 0x84 7. " SWI7 ,Software interrupt 7 set register" "Not set,Set"
bitfld.long 0x84 6. " SWI6 ,Software interrupt 6 set register" "Not set,Set"
bitfld.long 0x84 5. " SWI5 ,Software interrupt 5 set register" "Not set,Set"
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bitfld.long 0x84 4. " SWI4 ,Software interrupt 4 set register" "Not set,Set"
bitfld.long 0x84 3. " SWI3 ,Software interrupt 3 set register" "Not set,Set"
bitfld.long 0x84 2. " SWI2 ,Software interrupt 2 set register" "Not set,Set"
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bitfld.long 0x84 1. " SWI1 ,Software interrupt 1 set register" "Not set,Set"
bitfld.long 0x84 0. " SWI0 ,Software interrupt 0 set register" "Not set,Set"
tree.end
tree "OMAP5910 Configuration Registers"
base ad:0xfffe1000
width 17.
group 0x00++0x53
line.long 0x00 "FUNC_MUX_CTRL_0,Functional multiplexing control 0"
bitfld.long 0x00 31. " CTRL_288_1 ,Control mode 288_1" "Functional,Debug"
bitfld.long 0x00 22. " LB_RESET_DISABLE ,OMAP local bus reset input active" "0,USB_HHC"
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bitfld.long 0x00 20. " LRU_SEL ,OMAP traffic controller arbitration algorithm" "LRU priority,Fixed priority"
bitfld.long 0x00 19. " VBUS_CTRL ,External USB insertion/disconnection" "Disconnected,Inserted"
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bitfld.long 0x00 18. " VBUS_MODE ,USB vbus_ctrl input source" "HW detection,VBUS_CTRL"
bitfld.long 0x00 14. " NRESET_ENABLE ,Allows AND gating of OMAP5910 outputs with the OMAP CHIP_NRESET_OUT" "Disabled,Allowed"
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bitfld.long 0x00 13. " PWR_MASK_IN ,Allows AND gating of OMAP5910 inputs with COM_PWR_REQ (GPIO9) and COM_STS (ARMIO3) OMAP5910 input pins" "Disallowed,Allowed"
bitfld.long 0x00 12. " PWR_MASK_OUT ,Allows AND gating of OMAP5910 outputs with COM_PWR_REQ (GPIO9) and COM_STS (ARMIO3) OMAP5910 input pins" "Disallowed,Allowed"
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bitfld.long 0x00 11. " BVLZ_MASK_IN ,Allows AND gating of OMAP5910 inputs with BFAIL / /EXT_FIQ OMAP5910 input pin" "Disallowed,Allowed"
bitfld.long 0x00 10. " BVLZ_MASK_OUT ,Allows AND gating of OMAP5910 outputs with BFAIL / /EXT_FIQ OMAP5910 input pin" "Disallowed,Allowed"
line.long 0x04 "FUNC_MUX_CTRL_1,Functional multiplexing control 1 (reserved)"
line.long 0x08 "FUNC_MUX_CTRL_2,Functional multiplexing control 2"
hexmask.long.byte 0x08 13.--18. 1. " DMAREQ_OBS ,Can be used to control the DMA requests observability mux"
hexmask.long.byte 0x08 6.--12. 1. " IT_OBS ,Can be used to control the interrupt observability mux"
line.long 0x0c "COMP_MODE_CTRL_0,Compatibility mode control 0"
hexmask.long.word 0x0c 0.--15. 1. " CONF_COMPATIBILITY_R ,Write 0x0000EAEF to enable OMAP5910 configuration bits ad offset 0x10 and above"
line.long 0x10 "FUNC_MUX_CTRL_3,Functional multiplexing control 3"
line.long 0x14 "FUNC_MUX_CTRL_4,Functional multiplexing control 4"
bitfld.long 0x14 27.--29. " CONF_CAM_D_7_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to CAM.D[7] at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x14 24.--26. " CONF_CAM_LCLK_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to CAM.CLK at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
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bitfld.long 0x14 21.--23. " CONF_CAM_EXCLK_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to CAM.EXCLK at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x14 15.--17. " CONF_MCBSP1_DOUT_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to MSBSP1.DX at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
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bitfld.long 0x14 12.--14. " CONF_MCBSP1_SYNC_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to MSBSP1.FSX at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
line.long 0x18 "FUNC_MUX_CTRL_5,Functional multiplexing control 5"
bitfld.long 0x18 27.--29. " CONF_CAM_RSTZ_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to CAM.RSTZ at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x18 24.--26. " CONF_CAM_HS_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to CAM.HS at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
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bitfld.long 0x18 21.--23. " CONF_CAM_VS_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to CAM.VS at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x18 18.--20. " CONF_CAM_D_0_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to CAM.D[0] at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
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bitfld.long 0x18 15.--17. " CONF_CAM_D_1_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to CAM.D[1] at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x18 12.--14. " CONF_CAM_D_2_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to CAM.D[2] at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
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bitfld.long 0x18 9.--11. " CONF_CAM_D_3_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to CAM.D[3] at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x18 6.--8. " CONF_CAM_D_4_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to CAM.D[4] at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
textline " "
bitfld.long 0x18 3.--5. " CONF_CAM_D_5_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to CAM.D[5] at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x18 0.--2. " CONF_CAM_D_6_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to CAM.D[6] at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
line.long 0x1c "FUNC_MUX_CTRL_6,Functional multiplexing control 6"
bitfld.long 0x1c 27.--29. " CONF_GPIO_4_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to GPIO4 at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x1c 24.--26. " CONF_GPIO_6_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to GPIO6 at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
textline " "
bitfld.long 0x1c 21.--23. " CONF_GPIO_7_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to GPIO7 at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x1c 18.--20. " CONF_GPIO_11_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to GPIO11 at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
textline " "
bitfld.long 0x1c 15.--17. " CONF_GPIO_12_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to GPIO12 at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x1c 12.--14. " CONF_GPIO_13_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to GPIO13 at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
textline " "
bitfld.long 0x1c 9.--11. " CONF_GPIO_14_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to GPIO14 at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x1c 6.--8. " CONF_GPIO_15_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to GPIO15 at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
textline " "
bitfld.long 0x1c 3.--5. " CONF_RX3_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to UART3.RX at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x1c 0.--2. " CONF_TX3_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to UART3.TX at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
line.long 0x20 "FUNC_MUX_CTRL_7,Functional multiplexing control 7"
bitfld.long 0x20 18.--20. " CONF_ARMIO_2_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to MPUIO2 at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x20 15.--17. " CONF_ARMIO_4_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to MPUIO4 at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
textline " "
bitfld.long 0x20 12.--14. " CONF_ARMIO_5_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to MPUIO5 at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x20 9.--11. " CONF_GPIO_0_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to GPIO0 at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
textline " "
bitfld.long 0x20 6.--8. " CONF_GPIO_1_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to GPIO1 at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x20 3.--5. " CONF_GPIO_2_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to GPIO2 at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
textline " "
bitfld.long 0x20 0.--2. " CONF_GPIO_3_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to GPIO3 at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
line.long 0x24 "FUNC_MUX_CTRL_8,Functional multiplexing control 8"
bitfld.long 0x24 27.--29. " CONF_ARM_BOOT_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to MPU_BOOT at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x24 12.--14. " CONF_WIRE_NSCS3_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to /UWIRE.CS3 at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
textline " "
bitfld.long 0x24 9.--11. " CONF_WIRE_NSCS0_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to /UWIRE.CS0 at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x24 6.--8. " CONF_WIRE_SCLK_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to UWIRE.SCLK at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
textline " "
bitfld.long 0x24 3.--5. " CONF_WIRE_SDO_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to UWIRE.SDO at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x24 0.--2. " CONF_WIRE_SDI_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to UWIRE.SDI at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
line.long 0x28 "FUNC_MUX_CTRL_9,Functional multiplexing control 9"
bitfld.long 0x28 27.--29. " CONF_UARTS_CLKREQ_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to UART3.CLKREQ at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x28 24.--26. " CONF_MCSI1_DOUT_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to MCSI3.DOUT at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
textline " "
bitfld.long 0x28 21.--23. " CONF_TX1_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to UART1.TX at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x28 12.--14. " CONF_RTS1_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to UART1.RTS at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
textline " "
bitfld.long 0x28 3.--5. " CONF_MCBSP3_CLK_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to MCBSP3.CLKX at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x28 0.--2. " CONF_COM_SHUTDOWN_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to RST_HOST_OUT at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
line.long 0x2c "FUNC_MUX_CTRL_A,Functional multiplexing control A"
bitfld.long 0x2c 24.--26. " CONF_MMC_DAT1_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to MMC.DAT1 at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x2c 18.--20. " CONF_MMC_DAT2_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to MMC.DAT2 at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
textline " "
bitfld.long 0x2c 12.--14. " CONF_CLK32K_OUT_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to CLK32K_OUT at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x2c 9.--11. " CONF_MCSI1_DIN_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to MCSI1.DIN at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
textline " "
bitfld.long 0x2c 6.--8. " CONF_MCSI1_BCLK_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to MCSI1.CLK at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x2c 3.--5. " CONF_MCSI1_SYNC_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to MCSI1.SYNC at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
textline " "
bitfld.long 0x2c 0.--2. " CONF_UARTS_CLKIO_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to BCLK at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
line.long 0x30 "FUNC_MUX_CTRL_B,Functional multiplexing control B"
bitfld.long 0x30 18.--20. " CONF_COM_MCLK_REQ_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to UART2.CLKREQ at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x30 12.--14. " CONF_MCSI2_SYNC_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to MCSI2.SYNC at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
textline " "
bitfld.long 0x30 9.--11. " CONF_MCSI2_DOUT_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to MCSI2.DOUT at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x30 6.--8. " CONF_MCSI2_DIN_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to MCSI2.DIN at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
textline " "
bitfld.long 0x30 3.--5. " CONF_MCSI2_CLK_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to MCSI2.CLK at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
line.long 0x34 "FUNC_MUX_CTRL_C,Functional multiplexing control C"
bitfld.long 0x34 27.--29. " CONF_TX2_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to UART2.TX at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x34 24.--26. " CONF_RTS2_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to UART2.RTS at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
textline " "
bitfld.long 0x34 21.--23. " CONF_CTS2_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to UART2.CTS at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x34 18.--20. " CONF_RX2_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to UART2.RX at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
textline " "
bitfld.long 0x34 15.--17. " CONF_MCBSP2_DOUT_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to MCBSP2.DOUT at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x34 12.--14. " CONF_MCBSP2_RSYNC_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to MCBSP2.FSR at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
textline " "
bitfld.long 0x34 6.--8. " CONF_MCBSP2_CLKR_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to MCBSP2.CLKR at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x34 0.--2. " CONF_MCBSP2_DIN_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to MCBSP2.DR at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
line.long 0x38 "FUNC_MUX_CTRL_D,Functional multiplexing control D"
bitfld.long 0x38 12.--14. " CONF_MMC_DAT3_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to MMC.DAT3 at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
bitfld.long 0x38 6.--8. " CONF_NFCS2_R ,Controls the multiplexing on the OMAP5910 I/O, which defaults to /FLASH.CS2 at reset" "Func. mux 0,Func. mux 1,Func. mux 2,Func. mux 3,Func. mux 4,Func. mux 5,Func. mux 6,Func. mux 7"
line.long 0x40 "PULL_DWN_CTRL_0,Pull-down control 0"
bitfld.long 0x40 28. " CONF_PDEN_CAM_HS_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to CAM.HS at reset" "Enabled,Disabled"
bitfld.long 0x40 24. " CONF_PDEN_CAM_D_2_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to CAM.D[2] at reset" "Enabled,Disabled"
textline " "
bitfld.long 0x40 23. " CONF_PDEN_CAM_D_3_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to CAM.D[3] at reset" "Enabled,Disabled"
bitfld.long 0x40 21. " CONF_PDEN_CAM_D_5_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to CAM.D[5] at reset" "Enabled,Disabled"
textline " "
bitfld.long 0x40 15. " CONF_PDEN_MCBSP1_DIN_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to MCBSP1.DR at reset" "Enabled,Disabled"
line.long 0x44 "PULL_DWN_CTRL_1,Pull-down control 1"
bitfld.long 0x44 29. " CONF_PDEN_MCBSP3_CLK_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to MCBSP3.CLKX at reset" "Enabled,Disabled"
bitfld.long 0x44 27. " CONF_PDEN_ARM_BOOT_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to MPU_BOOT at reset" "Enabled,Disabled"
textline " "
bitfld.long 0x44 26. " CONF_PDEN_NEMU1_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to EMU1 at reset" "Enabled,Disabled"
bitfld.long 0x44 25. " CONF_PDEN_NEMU0_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to EMU0 at reset" "Enabled,Disabled"
textline " "
bitfld.long 0x44 18. " CONF_PDEN_WIRE_SDI_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to UWIRE.SDI at reset" "Enabled,Disabled"
bitfld.long 0x44 14. " CONF_PDEN_ARMIO_2_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to MPUIO2 at reset" "Enabled,Disabled"
textline " "
bitfld.long 0x44 13. " CONF_PDEN_ARMIO_4_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to MPUIO4 at reset" "Enabled,Disabled"
bitfld.long 0x44 12. " CONF_PDEN_ARMIO_5_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to MPUIO5 at reset" "Enabled,Disabled"
textline " "
bitfld.long 0x44 11. " CONF_PDEN_GPIO_0_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to GPIO0 at reset" "Enabled,Disabled"
bitfld.long 0x44 10. " CONF_PDEN_GPIO_1_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to GPIO1 at reset" "Enabled,Disabled"
textline " "
bitfld.long 0x44 9. " CONF_PDEN_GPIO_2_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to GPIO2 at reset" "Enabled,Disabled"
bitfld.long 0x44 8. " CONF_PDEN_GPIO_3_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to GPIO3 at reset" "Enabled,Disabled"
textline " "
bitfld.long 0x44 7. " CONF_PDEN_GPIO_4_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to GPIO4 at reset" "Enabled,Disabled"
bitfld.long 0x44 5. " CONF_PDEN_GPIO_7_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to GPIO7 at reset" "Enabled,Disabled"
textline " "
bitfld.long 0x44 4. " CONF_PDEN_GPIO_11_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to GPIO11 at reset" "Enabled,Disabled"
bitfld.long 0x44 3. " CONF_PDEN_GPIO_12_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to GPIO12 at reset" "Enabled,Disabled"
textline " "
bitfld.long 0x44 2. " CONF_PDEN_GPIO_13_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to GPIO13 at reset" "Enabled,Disabled"
bitfld.long 0x44 1. " CONF_PDEN_GPIO_14_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to GPIO14 at reset" "Enabled,Disabled"
textline " "
bitfld.long 0x44 0. " CONF_PDEN_GPIO_15_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to GPIO15 at reset" "Enabled,Disabled"
line.long 0x48 "PULL_DWN_CTRL_2,Pull-down control 2"
bitfld.long 0x48 31. " CONF_PDEN_MCBSP2_DOUT_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to MCBSP2.DX at reset" "Enabled,Disabled"
bitfld.long 0x48 30. " CONF_PDEN_MCBSP2_RSYNC_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to MCBSP2.FSR at reset" "Enabled,Disabled"
textline " "
bitfld.long 0x48 29. " CONF_PDEN_MCBSP2_CLKX_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to MCBSP2.CLKX at reset" "Enabled,Disabled"
bitfld.long 0x48 28. " CONF_PDEN_MCBSP2_CLKR_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to MCBSP2.CLKR at reset" "Enabled,Disabled"
textline " "
bitfld.long 0x48 27. " CONF_PDEN_MCBSP2_XSYNC_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to MCBSP2.FSX at reset" "Enabled,Disabled"
bitfld.long 0x48 26. " CONF_PDEN_MCBSP2_DIN_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to MCBSP2.DR at reset" "Enabled,Disabled"
textline " "
bitfld.long 0x48 25. " CONF_PDEN_ARMIO_3_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to MPUIO3 at reset" "Enabled,Disabled"
bitfld.long 0x48 24. " CONF_PDEN_GPIO_8_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to GPIO8 at reset" "Enabled,Disabled"
textline " "
bitfld.long 0x48 23. " CONF_PDEN_GPIO_9_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to GPIO9 at reset" "Enabled,Disabled"
bitfld.long 0x48 22. " CONF_PDEN_COM_MCLK_REQ_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to UART2.CLKREQ at reset" "Enabled,Disabled"
textline " "
bitfld.long 0x48 20. " CONF_PDEN_MCSI2_SYNC_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to MCSI2.SYNC at reset" "Enabled,Disabled"
bitfld.long 0x48 18. " CONF_PDEN_MCSI2_DIN_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to MCSI2.DIN at reset" "Enabled,Disabled"
textline " "
bitfld.long 0x48 17. " CONF_PDEN_MCSI2_CLK_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to MCSI2.CLK at reset" "Enabled,Disabled"
bitfld.long 0x48 16. " CONF_PDEN_MMC_DAT0_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to MMC.DAT0 at reset" "Enabled,Disabled"
textline " "
bitfld.long 0x48 15. " CONF_PDEN_MMC_CMD_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to MMC.DMD_SPI.DO at reset" "Enabled,Disabled"
bitfld.long 0x48 14. " CONF_PDEN_MMC_DAT1_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to MMC.DAT1 at reset" "Enabled,Disabled"
textline " "
bitfld.long 0x48 12. " CONF_PDEN_MMC_DAT2_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to MMC.DAT2 at reset" "Enabled,Disabled"
bitfld.long 0x48 9. " CONF_PDEN_MCSI1_DIN_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to MCSI1.DIN at reset" "Enabled,Disabled"
textline " "
bitfld.long 0x48 8. " CONF_PDEN_MCSI1_BCLK_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to MCSI1.CLK at reset" "Enabled,Disabled"
bitfld.long 0x48 7. " CONF_PDEN_MCSI1_SYNC_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to MCSI1.SYNC at reset" "Enabled,Disabled"
textline " "
bitfld.long 0x48 5. " CONF_PDEN_UARTS_CLKREQ_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to UART3.CLKREQ at reset" "Enabled,Disabled"
bitfld.long 0x48 2. " CONF_PDEN_RX1_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to UART1.RX at reset" "Enabled,Disabled"
textline " "
bitfld.long 0x48 1. " CONF_PDEN_R_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to UART1.CTS at reset" "Enabled,Disabled"
line.long 0x4c "PULL_DWN_CTRL_3,Pull-down control 3"
bitfld.long 0x4c 13. " CONF_PDEN_NTRST_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to /TRST at reset" "Enabled,Disabled"
bitfld.long 0x4c 12. " CONF_PDEN_TCK_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to TCK at reset" "Enabled,Disabled"
textline " "
bitfld.long 0x4c 11. " CONF_PDEN_TMS_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to TMS at reset" "Enabled,Disabled"
bitfld.long 0x4c 10. " CONF_PDEN_TDI_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to TDI at reset" "Enabled,Disabled"
textline " "
bitfld.long 0x4c 9. " CONF_PDEN_CONF_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to CONF at reset" "Enabled,Disabled"
bitfld.long 0x4c 8. " CONF_PDEN_MMC_DAT3_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to MMC.DAT3 at reset" "Enabled,Disabled"
textline " "
bitfld.long 0x4c 1. " CONF_PDEN_CTS2_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to UART2.CTS at reset" "Enabled,Disabled"
bitfld.long 0x4c 0. " CONF_PDEN_RX2_R ,Controls the pull-down enable on the OMAP5910 I/O, which defaults to UART2.RX at reset" "Enabled,Disabled"
line.long 0x50 "GATE_INH_CTRL_0,Gate and inhibit control 0"
bitfld.long 0x50 3. " CONF_HIGH_IMP3 ,Controls high impedance on MCSI1.DOUT" "Normal,Hi-Z"
bitfld.long 0x50 2. " CONF_SOFTWARE_PWR_R ,Controls software gating and inhibiting of the OMAP5910 I/O, which are gated or inhibited by COM_PWR status" "Disabled,Enabled"
textline " "
bitfld.long 0x50 1. " CONF_SOFTWARE_BVLZ_R ,Controls software gating and inhibiting of the OMAP5910 I/O, which are gated or inhibited by BFAIL / /EXT_FIQ status" "Disabled,Enabled"
bitfld.long 0x50 0. " CONF_SOFTWARE_GATE_ENA_R ,Controls software gating and inhibiting of the OMAP5910 I/O, which are gated or inhibited" "Disabled,Enabled"
group 0x60++0x03
line.long 0x00 "VOLTAGE_CTRL_0,Voltage control 0"
bitfld.long 0x00 2. " CONF_VOLTAGE_COMIF_R ,Controls the drive strength of the OMAP5910 communication processor interface I/O" "1.80 V,2.75 V"
bitfld.long 0x00 1. " CONF_VOLTAGE_SDRAM_R ,Controls the drive strength of the OMAP5910 SDRAM interface I/O" "1.80 V,2.75 V"
textline " "
bitfld.long 0x00 0. " CONF_VOLTAGE_FLASH_R ,Controls the drive strength of the OMAP5910 flash interface I/O" "1.80 V,2.75 V"
group 0x70++0x03
line.long 0x00 "TEST_DBG_CTRL_0,Test debug control 0"
group 0x80++0x03
line.long 0x00 "MOD_CONF_CTRL_0,Module configuration control 0"
bitfld.long 0x00 31. " CONF_MOD_UART3_CLK_MODE_R ,Determines the clock source of UART3 on the OMAP5910 device" "12 MHz,48 MHz"
textline " "
bitfld.long 0x00 30. " CONF_MOD_UART2_CLK_MODE_R ,Determines the clock source of UART2 on the OMAP5910 device" "12 MHz,48 MHz"
textline " "
bitfld.long 0x00 29. " CONF_MOD_UART1_CLK_MODE_R ,Determines the clock source of UART1 on the OMAP5910 device" "12 MHz,48 MHz"
textline " "
bitfld.long 0x00 28. " MOD_MCBSP3_MODE_R ,Determines the method of frame synchronization wrap-around used on MCBSP3" "External HW,Disabled"
textline " "
bitfld.long 0x00 24.--27. " MOD_32KOSC_SW_R ,Determines th configuration of the 32-kHz oscillator" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Lowest-power,Reserved,Reserved,Fast start-up,?..."
textline " "
bitfld.long 0x00 23. " CONF_MOD_MMC_SD_CLK_REQ_R ,Functional 48-MHz clock request for the OMAP5910 device MMC/SD interface" "No request,Request"
textline " "
bitfld.long 0x00 22. " CONF_MOD_DPRAM_ENABLE_R ,Controls the DPRAM I/F of the OMAP5910 device" "Normal,/FLASH.CS2"
textline " "
bitfld.long 0x00 21. " CONF_MOD_MSMMC_VSS_HIZ_OVERRIDE ,Disables the forced Hi-Z on the MMC.DAT2 pin of the device" "Enabled,Disabled"
textline " "
bitfld.long 0x00 20. " CONF_MOD_MCBSP3_AUXON ,Enables the McBSP3 AUXON functionality" "Disabled,Enabled"
textline " "
bitfld.long 0x00 19. " CONF_MOD_MCBSP2_AUXON ,Enables the McBSP2 AUXON functionality" "Disabled,Enabled"
textline " "
bitfld.long 0x00 18. " CONF_MOD_MCBSP1_AUXON ,Enables the McBSP1 AUXON functionality" "Disabled,Enabled"
textline " "
bitfld.long 0x00 17. " CONF_MOD_USB_W2FC_VBUS_MODE_R ,Determines what hardware method is used for USB.VBUS detection" "GPIO0 input,I/O cell"
textline " "
bitfld.long 0x00 16. " CONF_MOD_I2C_SELECT_R ,Selects the I2C module compatibility mode" "Standard,Compatibility"
textline " "
bitfld.long 0x00 13. " CONF_MOD_SDRAM_EMRS_BA1_CTRL ,Allows the user to force the SDRAM SDRAM.BA[1] pin to a high" "Disallowed,Allowed"
textline " "
bitfld.long 0x00 12. " CONF_MOD_COM_MCLK_12_48_SEL_R ,Determines if the UART2.CLKREQ output of the OMAP5910 device is 12 MHz or 48 MHz" "12 MHz,48 MHz"
textline " "
bitfld.long 0x00 11. " CONF_MOD_USB_HOST_UART_SELECT_R ,Enables the multiplexing of UART1.CTS, UART1.RX and UART1.TX" "Standard source,USB_HMC"
textline " "
bitfld.long 0x00 9. " CONF_MOD_USB_HOST_HHC_UHOST_EN_R ,Enable input for functional-mode clocking of USB_HHC" "Disabled,Enabled"
textline " "
bitfld.long 0x00 8. " CONF_MOD_USB_HOST_HMC_TLL_SPEED_R ,Transceiverless link logic (TLL) USB speed control" "Low speed,Full speed"
textline " "
bitfld.long 0x00 7. " CONF_MOD_USB_HOST_HMC_TLL_ATTACH_R ,Transceiverless link logic (TLL) USB attach control" "Not attached,Attached"
textline " "
bitfld.long 0x00 1.--6. " CONF_MOD_USB_HOST_HMC_MODE_R ,USB_HHC port multiplexing control" "0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f"
tree.end
tree "Device Identification"
width 7.
base ad:0xfffed400
rgroup 0x04++0x03
line.long 0x00 "IDCODE,ID Code Register"
hexmask.long.byte 0x00 28.--31. 1. " VN ,Version number"
hexmask.long.word 0x00 12.--27. 1. " PN ,Part number"
hexmask.long.word 0x00 1.--11. 1. " MI ,Manufacturer identity"
bitfld.long 0x00 0. " FL ,Fixed LSB" "0,1"
base ad:0xfffe1800
rgroup 0x00++0x07
line.quad 0x00 "ID,Die Identifiation"
tree.end
tree "DSP MMU Registers"
base 0xFFFED200
width 0xC
group 0x00++0x01
line.word 0x00 "PREFETCH, Prefetch Register"
bitfld.word 0x00 14. " DATA ,Data to Prefetch" "Program,Data"
hexmask.word.word 0x00 0.--13. 1. " MSB ,MSB of virtual address tag of the TLB entry to be prefetched"
rgroup 0x04++0x01
line.word 0x00 "WALK_ST,Prefetch Status Register"
bitfld.word 0x00 1. " TAB_WALK ,Table walking" "Stopped,Run"
bitfld.word 0x00 0. " PREF_STAT ,Prefetch Status Bit" "Low,High"
group 0x08++0x01
line.word 0x00 "CNTL,Control Register"
bitfld.word 0x00 5. " BURST_EN ,Enables the 16-bit burst management" "Disabled,Enabled"
bitfld.word 0x00 2. " WALKT_EN ,Enables the walking table logic" "Disabled,Enabled"
textline " "
bitfld.word 0x00 1. " MMU_EN ,Enables MMU" "Disabled,Enabled"
bitfld.word 0x00 0. " RESET ,Resets module" "Reset,No reset"
rgroup 0x0C++0x9
line.word 0x00 "FAULT_AD_H,Fault Address Register MSB"
bitfld.word 0x00 8. " FAULTTYPE ,The access that generated a permission fault" "Program,Data"
hexmask.byte.byte 0x00 0.--7. 1. " ADDR_MSB ,MSB of virtual address of the access that generated a permission fault"
line.word 0x04 "FAULT_AD_L,Fault Address Register LSB"
hexmask.word.word 0x04 7.--15. 1. " ADDR_LSB ,LSB of virtual address of the access that generated a permission fault"
line.word 0x08 "F_ST,Fault Status Register"
bitfld.word 0x08 3. " ERROR_PREF ,Error during a prefetch" "Not occured,Occured"
bitfld.word 0x08 2. " PERM_FAULT ,Permission fault" "No error,Error"
textline " "
bitfld.word 0x08 1. " TLB_M ,TLB miss" "Not missed,Missed"
bitfld.word 0x08 0. " TRANSL_F ,Translation fault" "No error,Error"
wgroup 0x18++0x1
line.word 0x00 "IT_ACK,Interrupt Acknowledge Register"
eventfld.word 0x00 0. " ACKINT ,Acknowledge the interrupt" "No effect,Acknowledged"
rgroup 0x1C++0x5
line.word 0x00 "TTB_H,TTB Register MSB"
line.word 0x04 "TTB_L,TTB Register LSB"
hexmask.word.word 0x00 7.--15. 1. " LSB_TSB ,"
group 0x24++0x35
line.word 0x00 "LOCK,Lock Counter"
hexmask.word.word 0x00 10.--15. 1. " BASE_VALUE ,Locked entries base value"
hexmask.word.word 0x00 4.--9. 1. " CEP ,Current entry pointed by the WTL"
line.word 0x04 "LD_TLB,Load Entry in TLB"
bitfld.word 0x04 1. " RTLB ,Read data in TLB" "No effect,Read"
bitfld.word 0x04 1. " LTLB ,Load data in TLB" "No effect,Load"
line.word 0x08 "CAM_H,CAM Entry Register MSB"
hexmask.word.word 0x08 0.--5. 1. " TABL1MSB ,Table index level 1 MSB"
line.word 0x0C "CAM_L,CAM Entry Register LSB"
hexmask.word.word 0x0C 10.--15. 1. " TABL1LSB ,Table index level 1 LSB"
hexmask.word.word 0x0C 4.--9. 1. " PAGEBITS ,Page Bits"
bitfld.word 0x0C 3. " PRESERV ,CAM entry preserved bit" "Not Preserved,Preserved"
textline " "
bitfld.word 0x0C 2. " VALID ,CAM entry valid bit" "Not valid,Valid"
bitfld.word 0x0C 0.--1. " PAGES ,Pages size" "Section(1MB),Large(64KB),Small(2KB),Tiny(1KB)"
line.word 0x10 "RAM_H,RAM Entry Register MSB"
line.word 0x14 "RAM_L,RAM Entry Register LSB"
hexmask.word.word 0x14 10.--15. 1. " LSB ,LSB physical address"
bitfld.word 0x14 8.--9. " ACCPERM ,Access permission" "00,01,10,11"
hide.word 0x18 "GFLUSH,Global Flush Register"
in
line.word 0x1C "FLUSH_ENTRY,Individual Flush Register"
bitfld.word 0x1C 0. " TOGGLE ," "Low,High"
line.word 0x20 "READ_CAM_H,Read CAM MSB"
hexmask.word.word 0x20 0.--9. 1. " TABL1MSB ,Table index level 1 MSB"
line.word 0x24 "READ_CAM_L,Read CAM LSB"
hexmask.word.word 0x24 10.--15. 1. " TABL1LSB ,Table index level 1 LSB"
hexmask.word.word 0x24 4.--9. 1. " PAGEBITS ,Page Bits"
bitfld.word 0x24 3. " PRESERV ,CAM entry preserved bit" "Not Preserved,Preserved"
textline " "
bitfld.word 0x24 2. " VALID ,CAM entry valid bit" "Not valid,Valid"
bitfld.word 0x24 0.--1. " PAGES ,Pages size" "Section(1MB),Large(64KB),Small(2KB),Tiny(1KB)"
line.word 0x28 "READ_RAM_H,Read RAM MSB"
line.word 0x2C "READ_RAM_L,Read RAM LSB"
hexmask.word.word 0x2C 10.--15. 1. " LSB ,LSB physical address"
bitfld.word 0x2C 8.--9. " ACCPERM ,Access permission" "00,01,10,11"
tree.end
width 0x11
base 0xFFFEC100
tree "Local Bus Control Registers"
group 0x00++0x0F
line.long 0x00 "LB_MPU_TIMEOUT,LB MPU time-out"
hexmask.long.byte 0x00 0.--7. 1. " TIMEOUT ,Local bus slave access time-out"
line.long 0x04 "LB_HOLD_TIMER,LB hold timer"
bitfld.long 0x04 9. " BREQ_TIMER_EN ,Local bus request timer enable" "Disabled,Enabled"
bitfld.long 0x04 8. " HOLD_TIMER_EN ,Local bus hold timer enable" "Disabled,Enabled"
textline " "
hexmask.long.byte 0x04 0.--7. 1. " HOLD_TIMER ,Local bus hold timer value"
line.long 0x08 "LB_PRIORITY_REG,LB priority (Reserved)"
line.long 0x0C "LB_CLOCK_DIV,LB clock divider"
bitfld.long 0x0C 7. " LB_ABORT_MASK ,Local bus abort interrupt mask" "Not masked,Masked"
bitfld.long 0x0C 6. " LB_IRQ_IN_MASK[3] ,Local bus interrupt input mask" "Not masked,Masked"
textline " "
bitfld.long 0x0C 5. " LB_IRQ_IN_MASK[2] ,Local bus interrupt input mask" "Not masked,Masked"
bitfld.long 0x0C 4. " LB_IRQ_IN_MASK[1] ,Local bus interrupt input mask" "Not masked,Masked"
textline " "
bitfld.long 0x0C 3. " LB_IRQ_IN_MASK[0] ,Local bus interrupt input mask" "Not masked,Masked"
bitfld.long 0x0C 0.--2. " LB_CLK_DIV ,Local bus clock divisor" "Reserved,Reserved,Div by 2,Reserved,Div by 4,Reserved,Div by 6,?..."
rgroup 0x10++0x13
line.long 0x00 "LB_ABORT_ADD,LB abort address"
line.long 0x04 "LB_ABORT_DATA,LB abort data"
line.long 0x08 "LB_ABORT_STATUS,LB abort status"
bitfld.long 0x08 7. " LB_BE[3] ,Byte enables from aborted local bus access" "Enabled,Disabled"
bitfld.long 0x08 6. " LB_BE[2] ,Byte enables from aborted local bus access" "Enabled,Disabled"
textline " "
bitfld.long 0x08 5. " LB_BE[1] ,Byte enables from aborted local bus access" "Enabled,Disabled"
bitfld.long 0x08 4. " LB_BE[0] ,Byte enables from aborted local bus access" "Enabled,Disabled"
textline " "
bitfld.long 0x08 3. " LB_RD ,Cycle type from aborted local bus access" "Write,Read"
bitfld.long 0x08 2. " LB_DMA ,DMA sourced aborted local bus access" "No effect,DMA controller"
textline " "
bitfld.long 0x08 1. " LB_DSP ,DSP sourced aborted local bus access" "No effect,DSP"
bitfld.long 0x08 0. " LB_MPU ,MPU sourced aborted local bus access" "No effect,MPU"
line.long 0xC "LB_IRQ_OUTPUT,LB IRQ output (Reserved)"
line.long 0x10 "LB_IRQ_INPUT,LB IRQ input"
bitfld.long 0x10 4. " ABORT_STAT ,Local bus abort status" "Occured,Not occured"
tree.end
width 0x14
base 0xFFFEC200
tree "Local Bus MMU Registers"
group 0x00++0x0B
line.word 0x04 "LB_MMU_WALKING_ST,LB MMU walking status"
bitfld.word 0x04 1. " WTL_WORKING ,Walking table" "Not avtivated,Activated"
line.word 0x08 "LB_MMU_CNTL,LB MMU control"
bitfld.word 0x08 5. " BURST_16_EN ,Enables 16 bit burst access management" "Disabled,Enabled"
bitfld.word 0x08 2. " WTL_EN ,Enables the walking table logic" "Disabled,Enabled"
textline " "
bitfld.word 0x08 1. " MMU_EN ,Local bus MMU enabled" "Disabled,Enabled"
bitfld.word 0x08 0. " RESET_SW ,Local bus MMU reset" "Reset,No Reset"
rgroup 0x0C++0x0B
line.word 0x00 "LB_MMU_FAULT_AD_H,LB MMU fault address high"
line.word 0x04 "LB_MMU_FAULT_AD_L,LB MMU fault address low"
line.word 0x08 "LB_MMU_FAULT_ST,LB MMU fault status"
bitfld.word 0x08 2. " PERM_FAULT ,Permission fault" "No error,Error"
bitfld.word 0x08 1. " TLB_MISS ,TLB miss" "Not missed,Missed"
textline " "
bitfld.word 0x08 0. " TRANS_FAULT ,Translation fault" "No error,Error"
wgroup 0x18++0x03
line.word 0x00 "LB_MMU_IT_ACK,LB MMU interrupt acknowledge"
eventfld.word 0x00 0. " IT_ACK ,Acknowledge interrupt" "No effect,Acknowledged"
group 0x1C++0x37
line.word 0x00 "LB_MMU_TTB_H,LB MMU TTB high"
line.word 0x04 "LB_MMU_TTB_L,LB MMU TTB low"
line.word 0x08 "LB_MMU_LOCK,LB MMU lock counter"
hexmask.word.word 0x08 10.--15. 1. " BASE_VALUE ,Locked entries base value"
hexmask.word.word 0x08 4.--9. 1. " CURRENT_VICTIM ,Current entry pointed to by the WTL"
line.word 0x0C "LB_MMU_LD_TLB,LB MMU TLB load/read"
bitfld.word 0x0C 1. " RD_TLB_ITEM ,TLB data pointed to be read" "No effect,Pointed"
bitfld.word 0x0C 1. " LD_TLB_ITEM ,TLB data pointed to be written" "No effect,Pointed"
line.word 0x10 "LB_MMU_CAM_H,LB MMU CAM high"
hexmask.word.word 0x10 0.--5. 1. " VA_TAG_L1_H ,MSB of the local bus virtual address level 1"
line.word 0x14 "LB_MMU_CAM_L,LB MMU CAM low"
hexmask.word.word 0x14 14.--15. 1. " VA_TAG_L1_L ,LSB of the local bus virtual address level 1"
hexmask.word.word 0x14 4.--13. 1. " VA_TAG_L2 ,Bits of the local bus virtual address level 2"
textline " "
bitfld.word 0x14 3. " P ,CAM entry preserved bit" "Not preserved,Preserved"
bitfld.word 0x14 2. " V ,CAM entry valid bit" "Not valid,Valid"
textline " "
bitfld.word 0x14 0.--1. " SLST ,Page size associated with CAM entry" "Section(1MB),Large(64KB),Small(2KB),Tiny(1KB)"
line.word 0x18 "LB_MMU_RAM_H,LB MMU RAM high"
line.word 0x1C "LB_MMU_RAM_L,LB MMU RAM low"
hexmask.word.word 0x1C 10.--15. 1. " RAM_LSB ,LSB of the physical address that corresponds to a local bus virtual address"
bitfld.word 0x1C 8.--9. " AP ,Access permission" "No access,No access,Read,Full"
line.word 0x20 "LB_MMU_GFLUSH,LB MMU global flush"
bitfld.word 0x20 0. " GFLUSH ,Flush non-protected TLB entries" "No flushed,Flushed"
line.word 0x24 "LB_MMU_FLUSH_ENTRY,LB MMU flush entry"
bitfld.word 0x24 0. " FLUSH_ENTRY ,Flush TLB entry" "No flushed,Flushed"
line.word 0x28 "LB_MMU_READ_CAM_H,LB MMU CAM read high"
hexmask.word.word 0x10 0.--5. 1. " VA_TAG_L1_H ,MSB of the local bus virtual address level 1"
line.word 0x2C "LB_MMU_READ_CAM_L,LB MMU CAM read low"
hexmask.word.word 0x2C 14.--15. 1. " VA_TAG_L1_L ,LSB of the local bus virtual address level 1"
hexmask.word.word 0x2C 4.--13. 1. " VA_TAG_L2 ,Bits of the local bus virtual address level 2"
textline " "
bitfld.word 0x2C 3. " P ,CAM entry preserved bit" "Not preserved,Preserved"
bitfld.word 0x2C 2. " V ,CAM entry valid bit" "Not valid,Valid"
textline " "
bitfld.word 0x2C 0.--1. " SLST ,Page size associated with CAM entry" "Section(1MB),Large(64KB),Small(2KB),Tiny(1KB)"
line.word 0x30 "LB_MMU_READ_RAM_H,LB MMU RAM read high"
line.word 0x34 "LB_MMU_READ_RAM_L,LB MMU RAM read low"
hexmask.word.word 0x34 10.--15. 1. " RAM_LSB ,LSB of the physical address that corresponds to a local bus virtual address"
bitfld.word 0x34 8.--9. " AP ,Access permission" "No access,No access,Read,Full"
tree.end
tree.end
tree "MPU Public Peripherals"
tree "Camera Interface Registers"
width 13.
base ad:0xfffb6800
group 0x00++0x03
line.long 0x00 "CTRLCLOCK,Clock control"
bitfld.long 0x00 7. " LCLK_EN ,Enables incoming CAM.LCLK" "Disabled,Enabled"
bitfld.long 0x00 6. " DPLL_EN ,Enables DPLL source (48 MHz)" "Disabled,Enabled"
bitfld.long 0x00 5. " MCLK_EN ,Enabled internal clock of interface" "Disabled,Enabled"
textline " "
bitfld.long 0x00 4. " CAMEXCLK_EN ,Enables CAM.EXCLK" "Disabled,Enabled"
bitfld.long 0x00 3. " POLCLK ,Sets polarity of CAM.CLK" "Rising edge,Falling edge"
bitfld.long 0x00 0.--2. " FOSCMOD ,Sets the frequency of the CAM.EXCLK clock" "12 MHz,Reserved,6 MHz,Reserved,9.6 MHz,24 MHz,8 MHz,?..."
rgroup 0x04++0x03
hide.long 0x00 "IT_STATUS,Interrupt source status"
textfld " "
in
group 0x08++0x03
line.long 0x00 "MODE,Camera interface mode configuration"
bitfld.long 0x00 18. " RAZ_FIFO ,Clears data in the FIFO; reinitializes read and write pointers; clears FIFO full interrupt, FIFO peak counter and resynchronizes" "No reset,Reset"
bitfld.long 0x00 17. " EN_FIFO_FULL ,Enables interrupt on FIFO_FULL" "Disabled,Enabled"
bitfld.long 0x00 16. " EN_IRQ ,Enables data transfer interrupt" "Disabled,Enabled"
textline " "
hexmask.long.byte 0x00 9.--15. 1. " THRESHOLD ,Programmable DMA request trigger value"
bitfld.long 0x00 8. " DMA ,Enables DMA mode" "Disabled,Enabled"
bitfld.long 0x00 7. " EN_H_DOWN ,Enables interrupt on HSYNC falling edge" "Disabled,Enabled"
textline " "
bitfld.long 0x00 6. " EN_H_UP ,Enables interrupt on HSYNC rising edge" "Disabled,Enabled"
bitfld.long 0x00 5. " EN_V_DOWN ,Enables interrupt on VSYNC falling edge" "Disabled,Enabled"
bitfld.long 0x00 4. " EN_V_UP ,Enables interrupt on VSYNC rising edge" "Disabled,Enabled"
textline " "
bitfld.long 0x00 3. " ORDERCAMD ,Sets order of 2 consecutive bytes received from camera" "Not swapped,Swapped"
bitfld.long 0x00 1.--2. " IMGSIZE ,Sets image size" "CIF,QCIF,VGA,QVGA"
bitfld.long 0x00 0. " CAMOSC ,Set synchronous/asynchronous mode" "Synchronous,Asynchronous"
rgroup 0x0c++0x07
line.long 0x00 "STATUS,Status"
bitfld.long 0x00 1. " HSTATUS ,CAM_HS status (edge detection)" "Not detected,Detected"
bitfld.long 0x00 0. " VSTATUS ,CAM_VS status (edge detection)" "Not detected,Detected"
line.long 0x04 "CAMDATA,Image data"
group 0x14++0x07
line.long 0x00 "GPIO,Camera interface GPIO"
bitfld.long 0x00 0. " CAM_RST ,Reset for camera module" "No reset,Reset"
line.long 0x04 "PEAK_COUNTER,FIFO peak counter"
hexmask.long 0x04 0.--6. 1. " PEAK_COUNTER ,Maximum number of words written to FIFO during the transfer since the last clear to zero"
tree.end
tree "MPU I/O Registers"
width 20.
base ad:0xfffb5000
rgroup 0x00++0x01
line.word 0x00 "INPUT_LATCH,General-purpose input"
group 0x04++0x05
line.word 0x00 "OUTPUT_REG,Output"
line.word 0x04 "IO_CNTL,Input/Output control"
bitfld.word 0x04 15. " IO_CNTL15 ,In/out control for general-purpose I/O 15" "Output,Input"
bitfld.word 0x04 14. " IO_CNTL14 ,In/out control for general-purpose I/O 14" "Output,Input"
textline " "
bitfld.word 0x04 13. " IO_CNTL13 ,In/out control for general-purpose I/O 13" "Output,Input"
bitfld.word 0x04 12. " IO_CNTL12 ,In/out control for general-purpose I/O 12" "Output,Input"
textline " "
bitfld.word 0x04 11. " IO_CNTL11 ,In/out control for general-purpose I/O 11" "Output,Input"
bitfld.word 0x04 10. " IO_CNTL10 ,In/out control for general-purpose I/O 10" "Output,Input"
textline " "
bitfld.word 0x04 9. " IO_CNTL9 ,In/out control for general-purpose I/O 9" "Output,Input"
bitfld.word 0x04 8. " IO_CNTL8 ,In/out control for general-purpose I/O 8" "Output,Input"
textline " "
bitfld.word 0x04 7. " IO_CNTL7 ,In/out control for general-purpose I/O 7" "Output,Input"
bitfld.word 0x04 6. " IO_CNTL6 ,In/out control for general-purpose I/O 6" "Output,Input"
textline " "
bitfld.word 0x04 5. " IO_CNTL5 ,In/out control for general-purpose I/O 5" "Output,Input"
bitfld.word 0x04 4. " IO_CNTL4 ,In/out control for general-purpose I/O 4" "Output,Input"
textline " "
bitfld.word 0x04 3. " IO_CNTL3 ,In/out control for general-purpose I/O 3" "Output,Input"
bitfld.word 0x04 2. " IO_CNTL2 ,In/out control for general-purpose I/O 2" "Output,Input"
textline " "
bitfld.word 0x04 1. " IO_CNTL1 ,In/out control for general-purpose I/O 1" "Output,Input"
bitfld.word 0x04 0. " IO_CNTL0 ,In/out control for general-purpose I/O 0" "Output,Input"
rgroup 0x10++0x01
line.word 0x00 "KBR_LATCH,Keyboard row inputs"
hexmask.word.byte 0x00 0.--4. 1. " KBR_LATCH ,Keyboard row inputs"
group 0x14++0x09
line.word 0x00 "KBC_REG,Keyboard column outputs"
hexmask.long.byte 0x00 0.--7. 1. " KBC_REG ,Keyboard column outputs"
line.word 0x04 "GPIO_EVENT_MODE_REG,GPIO event mode"
bitfld.word 0x04 1.--4. " PIN_SELECT ,Select MPUI/O_IN[15:0] pin to be the GPIO_CLK event" "Pin 0,Pin 1,Pin 2,Pin 3,Pin 4,Pin 5,Pin 6,Pin 7,Pin 8,Pin 9,Pin 10,Pin 11,Pin 12,Pin 13,Pin 14,Pin 15"
bitfld.word 0x04 0. " SET_GPIO_EVENT_MODE ,GPIO event mode enable" "Disabled,Enabled"
line.word 0x08 "GPIO_INT_EDGE_REG,GPIO interrupt edge"
bitfld.word 0x08 15. " EDGE_SELECT15 ,Set interrupt on falling/rising edge" "Falling,Rising"
bitfld.word 0x08 14. " EDGE_SELECT14 ,Set interrupt on falling/rising edge" "Falling,Rising"
textline " "
bitfld.word 0x08 13. " EDGE_SELECT13 ,Set interrupt on falling/rising edge" "Falling,Rising"
bitfld.word 0x08 12. " EDGE_SELECT12 ,Set interrupt on falling/rising edge" "Falling,Rising"
textline " "
bitfld.word 0x08 11. " EDGE_SELECT11 ,Set interrupt on falling/rising edge" "Falling,Rising"
bitfld.word 0x08 10. " EDGE_SELECT10 ,Set interrupt on falling/rising edge" "Falling,Rising"
textline " "
bitfld.word 0x08 9. " EDGE_SELECT9 ,Set interrupt on falling/rising edge" "Falling,Rising"
bitfld.word 0x08 8. " EDGE_SELECT8 ,Set interrupt on falling/rising edge" "Falling,Rising"
textline " "
bitfld.word 0x08 7. " EDGE_SELECT7 ,Set interrupt on falling/rising edge" "Falling,Rising"
bitfld.word 0x08 6. " EDGE_SELECT6 ,Set interrupt on falling/rising edge" "Falling,Rising"
textline " "
bitfld.word 0x08 5. " EDGE_SELECT5 ,Set interrupt on falling/rising edge" "Falling,Rising"
bitfld.word 0x08 4. " EDGE_SELECT4 ,Set interrupt on falling/rising edge" "Falling,Rising"
textline " "
bitfld.word 0x08 3. " EDGE_SELECT3 ,Set interrupt on falling/rising edge" "Falling,Rising"
bitfld.word 0x08 2. " EDGE_SELECT2 ,Set interrupt on falling/rising edge" "Falling,Rising"
textline " "
bitfld.word 0x08 1. " EDGE_SELECT1 ,Set interrupt on falling/rising edge" "Falling,Rising"
bitfld.word 0x08 0. " EDGE_SELECT0 ,Set interrupt on falling/rising edge" "Falling,Rising"
rgroup 0x20++0x05
line.word 0x00 "KBD_INT,Keyboard interrupt"
bitfld.word 0x00 0. " KBD_INT ,Keyboard interrupt" "Interrupt,No interrupt"
hide.word 0x04 "GPIO_INT,GPIO interrupt"
in
group 0x28++0x09
line.word 0x00 "KBD_MASKIT,Keyboard mask interrupt"
bitfld.word 0x00 0. " KBD_MASKIT ,Keyboard mask interrupt" "Not masked,Masked"
line.word 0x04 "GPIO_MASKIT,GPIO mask interrupt"
bitfld.word 0x04 15. " GPIO_MASKIT15 ,GPIO mask interrupt 15" "Not masked,Masked"
bitfld.word 0x04 14. " GPIO_MASKIT14 ,GPIO mask interrupt 14" "Not masked,Masked"
textline " "
bitfld.word 0x04 13. " GPIO_MASKIT13 ,GPIO mask interrupt 13" "Not masked,Masked"
bitfld.word 0x04 12. " GPIO_MASKIT12 ,GPIO mask interrupt 12" "Not masked,Masked"
textline " "
bitfld.word 0x04 11. " GPIO_MASKIT11 ,GPIO mask interrupt 11" "Not masked,Masked"
bitfld.word 0x04 10. " GPIO_MASKIT10 ,GPIO mask interrupt 10" "Not masked,Masked"
textline " "
bitfld.word 0x04 9. " GPIO_MASKIT9 ,GPIO mask interrupt 9" "Not masked,Masked"
bitfld.word 0x04 8. " GPIO_MASKIT8 ,GPIO mask interrupt 8" "Not masked,Masked"
textline " "
bitfld.word 0x04 7. " GPIO_MASKIT7 ,GPIO mask interrupt 7" "Not masked,Masked"
bitfld.word 0x04 6. " GPIO_MASKIT6 ,GPIO mask interrupt 6" "Not masked,Masked"
textline " "
bitfld.word 0x04 5. " GPIO_MASKIT5 ,GPIO mask interrupt 5" "Not masked,Masked"
bitfld.word 0x04 4. " GPIO_MASKIT4 ,GPIO mask interrupt 4" "Not masked,Masked"
textline " "
bitfld.word 0x04 3. " GPIO_MASKIT3 ,GPIO mask interrupt 3" "Not masked,Masked"
bitfld.word 0x04 2. " GPIO_MASKIT2 ,GPIO mask interrupt 2" "Not masked,Masked"
textline " "
bitfld.word 0x04 1. " GPIO_MASKIT1 ,GPIO mask interrupt 1" "Not masked,Masked"
bitfld.word 0x04 0. " GPIO_MASKIT0 ,GPIO mask interrupt 0" "Not masked,Masked"
line.word 0x08 "GPIO_DEBOUNCING_REG,GPIO debouncing"
hexmask.word 0x08 0.--8. 1. " GPIO_DEBOUNCING_REG ,GPIO debouncing"
rgroup 0x34++0x01
line.word 0x00 "GPIO_LATCH_REG,GPIO latch"
tree.end
tree "MicroWire Registers"
width 8.
base sd:0xfffb3000
group 0x00++0x01
line.word 0x00 "TDR/RDR,Transmit/Receive data"
group 0x04++0x01
line.word 0x00 "CSR,Control and status"
bitfld.word 0x00 15. " RDRB ,RDR is full" "Not full,Full"
bitfld.word 0x00 14. " CSRB ,CSR ready to receive new data" "Ready,Not ready"
bitfld.word 0x00 13. " START ,Start a write and/or read process" "Not started,Started"
textline " "
bitfld.word 0x00 12. " CS_CMD ,Set the chip-select of the selected device to its active level" "Inactive,Active"
bitfld.word 0x00 10.--11. " INDEX ,Intex of the external device" "CS0,Reserved,Reserved,CS3"
bitfld.word 0x00 5.--9. " NB_BITS_WR ,Number of bits to transmit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline " "
bitfld.word 0x00 0.--4. " NB_BITS_RD ,Number of bits to receive" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
if ((d.w(ad:0xfffb3004)&0x0c00)==0x0000)&&((d.w(ad:0xfffb3014)&0x0001)==0x0000)
group 0x08++0x01
line.word 0x00 "SR1,Setup 1"
bitfld.word 0x00 5. " CS0_CHK ,Before activating a write process, checks if external device is ready" "Not checked,Checked"
bitfld.word 0x00 3.--4. " CS0_FRQ ,Defines the frequency of the serial clock SCLK" "F_INT/2,F_INT/4,F_INT/8,Undefined"
bitfld.word 0x00 2. " CS0CS_LVL ,Defines the active level of the chip-select by CS0" "Low,High"
textline " "
bitfld.word 0x00 1. " CS0_EDGE_WR ,Defines the active edge of the serial clock SCLK used to write data to the serial input D0" "Falling,Rising"
bitfld.word 0x00 0. " CS0_EDGE_RD ,Defines the active edge of the serial clock SCLK used to read data to the serial input D0" "Falling,Rising"
rgroup 0x0c++0x01
hide.word 0x00 "SR2,Setup 2"
elif (d.w(ad:0xfffb3004)&0x0c00)==0x0000
group 0x08++0x01
line.word 0x00 "SR1,Setup 1"
bitfld.word 0x00 5. " CS0_CHK ,Before activating a write process, checks if external device is ready" "Not checked,Checked"
bitfld.word 0x00 3.--4. " CS0_FRQ ,Defines the frequency of the serial clock SCLK" "F_INT/2,F_INT/4,F_INT/8,Undefined"
bitfld.word 0x00 2. " CS0CS_LVL ,Defines the active level of the chip-select by CS0" "Low,High"
textline " "
bitfld.word 0x00 1. " CS0_EDGE_WR ,Defines the active edge of the serial clock SCLK used to write data to the serial input D0" "Rising,Falling"
bitfld.word 0x00 0. " CS0_EDGE_RD ,Defines the active edge of the serial clock SCLK used to read data to the serial input D0" "Rising,Falling"
rgroup 0x0c++0x01
hide.word 0x00 "SR2,Setup 2"
elif ((d.w(ad:0xfffb3004)&0x0c00)==0x0c00)&&((d.w(ad:0xfffb3014)&0x0001)==0x0000)
rgroup 0x08++0x01
hide.word 0x00 "SR1,Setup 1"
group 0x0c++0x01
line.word 0x00 "SR2,Setup 2"
bitfld.word 0x00 11. " CS3_CHK ,Before activating a write process, checks if external device is ready" "Not checked,Checked"
bitfld.word 0x00 9.--10. " CS3_FRQ ,Defines the frequency of the serial clock SCLK" "F_INT/2,F_INT/4,F_INT/8,Undefined"
bitfld.word 0x00 8. " CS3CS_LVL ,Defines the active level of the chip-select by CS3" "Low,High"
textline " "
bitfld.word 0x00 7. " CS3_EDGE_WR ,Defines the active edge of the serial clock SCLK used to write data to the serial input D0" "Falling,Rising"
bitfld.word 0x00 6. " CS3_EDGE_RD ,Defines the active edge of the serial clock SCLK used to read data to the serial input D0" "Falling,Rising"
elif (d.w(ad:0xfffb3004)&0x0c00)==0x0c00
rgroup 0x08++0x01
hide.word 0x00 "SR1,Setup 1"
group 0x0c++0x01
line.word 0x00 "SR2,Setup 2"
bitfld.word 0x00 11. " CS3_CHK ,Before activating a write process, checks if external device is ready" "Not checked,Checked"
bitfld.word 0x00 9.--10. " CS3_FRQ ,Defines the frequency of the serial clock SCLK" "F_INT/2,F_INT/4,F_INT/8,Undefined"
bitfld.word 0x00 8. " CS3CS_LVL ,Defines the active level of the chip-select by CS3" "Low,High"
textline " "
bitfld.word 0x00 7. " CS3_EDGE_WR ,Defines the active edge of the serial clock SCLK used to write data to the serial input D0" "Rising,Falling"
bitfld.word 0x00 6. " CS3_EDGE_RD ,Defines the active edge of the serial clock SCLK used to read data to the serial input D0" "Rising,Falling"
else
rgroup 0x08++0x06
hide.word 0x00 "SR1,Setup 1"
hide.word 0x04 "SR2,Setup 2"
endif
group 0x10++0x09
line.word 0x00 "SR3,Setup 3"
bitfld.word 0x00 1.--2. " CK_FREQ ,Defines the frequency of the internal clock F_INT" "ARMOXR_CK/2,ARMOXR_CK/4,ARMOXR_CK/7,ARMOXR_CK/10"
bitfld.word 0x00 0. " CLK_EN ,Switch on the clock" "Off,On"
line.word 0x04 "SR4,Setup 4"
bitfld.word 0x04 0. " CLK_IN ,Invert serial clock" "Not inverted,Inverted"
line.word 0x08 "SR5,Setup 5"
bitfld.word 0x08 3. " CS_TOGGLE_TX_EN ,Enable CS_toggle transmit mode" "Disabled,Enabled"
bitfld.word 0x08 2. " AUTO_TX_EN ,Enable autotransmit mode" "Disabled,Enabled"
bitfld.word 0x08 1. " IT_EN ,Enable IT mode" "Disabled,Enabled"
textline " "
bitfld.word 0x08 0. " DMA_TX_EN ,ENable DMA transmit mode" "Disabled,Enabled"
tree.end
tree "32-kHz Timer Registers"
width 6.
base ad:0xfffb9000
group 0x08++0x03
line.long 0x00 "CR,Timer control"
bitfld.long 0x00 3. " ARL ,Autoreload/start" "One-shot,Autorestart"
bitfld.long 0x00 2. " IT_ENA ,Interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 1. " TRB ,Timer reload bit" "No reload,Reload"
bitfld.long 0x00 0. " TSS ,Timer start/stop" "Stopped,Started"
group 0x00++0x03
line.long 0x00 "TVR,Tick value"
hexmask.long.tbyte 0x00 0.--23. 1. " TICK_VALUE_REG ,This value is loaded when timer passes through 0 or when it starts"
rgroup 0x04++0x03
line.long 0x00 "TVC,Tick counter"
hexmask.long.tbyte 0x00 0.--23. 1. " TICK_COUNTER_REG ,Value of timer"
tree.end
tree "Pseudonoise Pulse-Width Light Modulator Registers"
width 10.
base ad:0xfffb5800
group 0x00++0x04
line.byte 0x00 "PWL_LEVEL,PWL-level"
line.byte 0x04 "PWL_CTRL,PWL control"
bitfld.byte 0x04 0. " CLK_ENABLE ,Enable internal clock" "Disabled,Enabled"
tree.end
tree "Pulse-Width Tone Registers"
width 6.
base ad:0xfffb6000
if (d.b(ad:0xfffb6000)&0x03)==0x00
group 0x00++0x00
line.byte 0x00 "FRC,PWT frequency control"
bitfld.byte 0x00 2.--5. " FRQ ,Frequency selection" "4868 Hz,4595 Hz,4337 Hz,4093 Hz,3864 Hz,3647 Hz,3442 Hz,3249 Hz,3066 Hz,2894 Hz,2732 Hz,2579 Hz,Disallowed,Disallowed,Disallowed,Disallowed"
bitfld.byte 0x00 0.--1. " OCT ,Octave selection" "00,01,10,11"
elif (d.b(ad:0xfffb6000)&0x03)==0x01
group 0x00++0x00
line.byte 0x00 "FRC,PWT frequency control"
bitfld.byte 0x00 2.--5. " FRQ ,Frequency selection" "2434 Hz,2297 Hz,2168 Hz,2046 Hz,1932 Hz,1824 Hz,1721 Hz,1624 Hz,1533 Hz,1447 Hz,1366 Hz,1289 Hz,Disallowed,Disallowed,Disallowed,Disallowed"
bitfld.byte 0x00 0.--1. " OCT ,Octave selection" "00,01,10,11"
elif (d.b(ad:0xfffb6000)&0x03)==0x02
group 0x00++0x00
line.byte 0x00 "FRC,PWT frequency control"
bitfld.byte 0x00 2.--5. " FRQ ,Frequency selection" "1217 Hz,1149 Hz,1084 Hz,1023 Hz,966 Hz,912 Hz,860 Hz,812 Hz,767 Hz,723 Hz,683 Hz,644 Hz,Disallowed,Disallowed,Disallowed,Disallowed"
bitfld.byte 0x00 0.--1. " OCT ,Octave selection" "00,01,10,11"
elif (d.b(ad:0xfffb6000)&0x03)==0x03
group 0x00++0x00
line.byte 0x00 "FRC,PWT frequency control"
bitfld.byte 0x00 2.--5. " FRQ ,Frequency selection" "608 Hz,574 Hz,541 Hz,511 Hz,483 Hz,456 Hz,430 Hz,406 Hz,383 Hz,361 Hz,341 Hz,322 Hz,Disallowed,Disallowed,Disallowed,Disallowed"
bitfld.byte 0x00 0.--1. " OCT ,Octave selection" "00,01,10,11"
endif
group 0x04++0x04
line.byte 0x00 "VRC,PWT volume control"
bitfld.byte 0x00 1.--6. " VOL ,Volume selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.byte 0x00 0. " ONOFF ,Switch ON/OFF tone" "Off,On"
line.byte 0x04 "GCR,PWT general control"
bitfld.byte 0x04 1. " TESTIN ,Divider 1/154 switched ON/OFF" "Off,On"
bitfld.byte 0x04 0. " CLK_EN ,PWT clock enable" "Disabled,Enabled"
tree.end
tree "Inter-Integrated Circuit Registers"
width 12.
base ad:0xfffb3800
rgroup 0x00++0x01
line.word 0x00 "I2C_REV,I2C module revision"
hexmask.word.byte 0x00 0.--7. 1. " REV ,Module version number"
group 0x04++0x01
line.word 0x00 "I2C_IE,I2C interrupt enable"
bitfld.word 0x00 4. " XRDY_IE ,Transmit data ready interrupt enable" "Disabled,Enabled"
bitfld.word 0x00 3. " RRDY_IE ,Receive data ready interrupt enable" "Disabled,Enabled"
bitfld.word 0x00 2. " ARDY_IE ,Register access ready interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x00 1. " NACK_IE ,No acknowledgement interrupt enable" "Disabled,Enabled"
bitfld.word 0x00 0. " AL_IE ,Arbitration lost interrupt enable" "Disabled,Enabled"
rgroup 0x08++0x05
line.word 0x00 "I2C_STAT,I2C status"
bitfld.word 0x00 15. " SBD ,Single byte data" "No action,Valid byte"
bitfld.word 0x00 12. " BB ,Bus busy" "Free,Occupied"
bitfld.word 0x00 11. " ROVR ,Receive overrun" "No overrun,overrun"
textline " "
bitfld.word 0x00 10. " XUDF ,Transmit underflow" "No underflow,Underflow"
bitfld.word 0x00 9. " AAS ,Address as slave" "No action,Slave"
bitfld.word 0x00 8. " AD0 ,Address zero" "No action,General call"
textline " "
bitfld.word 0x00 4. " XRDY ,Transmit data ready" "Buffer full,Ready"
bitfld.word 0x00 3. " RRDY ,Receive data ready" "Buffer empty,Ready"
bitfld.word 0x00 2. " ARDY ,Register access ready" "No action,Ready"
textline " "
bitfld.word 0x00 1. " NACK ,No acknowledgement interrupt" "No action,NACK"
bitfld.word 0x00 0. " AL ,Arbitration lost interrupt" "No action,Arbitration lost"
hide.word 0x04 "I2C_IV,I2C interrupt vector"
in
group 0x14++0x05
line.word 0x00 "I2C_BUF,I2C buffer configuration"
bitfld.word 0x00 15. " RDMA_EN ,Receive DMA channel enable" "Disabled,Enabled"
bitfld.word 0x00 7. " XDMA_EN ,Transmit DMA channel enable" "Disabled,Enabled"
line.word 0x04 "I2C_CNT,I2C data counter"
hgroup 0x1C++0x01
hide.word 0x00 "I2C_DATA,I2C data access"
in
if (d.w(ad:0xfffb3824)&0x0400)==0x0000
group 0x24++0x01
line.word 0x00 "I2C_CON,I2C configuration"
bitfld.word 0x00 15. " I2C_EN ,I2C module enable" "Reset,Enabled"
bitfld.word 0x00 14. " BE ,Big endian mode" "Little endian,Big endian"
textline " "
bitfld.word 0x00 10. " MST ,Master/slave mode" "Slave,Master"
bitfld.word 0x00 8. " XA ,Expand address" "7-bit,10-bit"
else
group 0x24++0x01
line.word 0x00 "I2C_CON,I2C configuration"
bitfld.word 0x00 15. " I2C_EN ,I2C module enable" "Reset,Enabled"
bitfld.word 0x00 14. " BE ,Big endian mode" "Little endian,Big endian"
bitfld.word 0x00 11. " STB ,Start byte mode" "Normal,Start byte"
textline " "
bitfld.word 0x00 10. " MST ,Master/slave mode" "Slave,Master"
bitfld.word 0x00 9. " TRX ,Transmitter/receiver mode" "Receiver,Transmitter"
bitfld.word 0x00 8. " XA ,Expand address" "7-bit,10-bit"
textline " "
bitfld.word 0x00 2. " RM ,Repeat mode" "Normal,Repeat"
bitfld.word 0x00 1. " STP ,Stop condition" "Not detected,Detected"
bitfld.word 0x00 0. " STT ,Start condition" "Not generated,Generated"
endif
group 0x28++0x15
line.word 0x00 "I2C_OA,I2C own address"
hexmask.word 0x00 0.--9. 1. " OA ,Own address"
line.word 0x04 "I2C_SA,I2C slave address"
hexmask.word 0x04 0.--9. 1. " SA ,Slave address"
line.word 0x08 "I2C_PSC,I2C clock prescaler"
hexmask.word.byte 0x08 0.--7. 1. " PSC ,Prescale sampling clock divider value"
line.word 0x0c "I2C_SCLL,P2C SCL low time control"
hexmask.word 0x0c 0.--7. 1. 6. " SCLL ,SCL low time value"
line.word 0x10 "I2C_SCLH,I2C SCL high time control"
hexmask.word 0x10 0.--7. 1. 6. " SCLH ,SCL high time value"
line.word 0x14 "I2C_SYSTEST,I2C system test"
bitfld.word 0x14 15. " ST_EN ,System test enable" "Disabled,Enabled"
bitfld.word 0x14 14. " FREE ,Free running mode" "Stop mode,Free-running mode"
bitfld.word 0x14 12.--13. " TMODE ,Test mode select" "Functional,Reserved,SCL counters,Loopback + IO"
textline " "
bitfld.word 0x14 3. " SCL_I ,SCL line sense input value" "Low,High"
bitfld.word 0x14 2. " SCL_O ,SCL line drive output value" "Low,Hi-Z"
bitfld.word 0x14 1. " SDA_I ,SDA line sense input value" "Low,High"
textline " "
bitfld.word 0x14 0. " SDA_O ,SDA line drive output value" "Low,Hi-Z"
tree.end
tree "LED Pulse Generator 1 Registers"
width 6.
base ad:0xfffb0000+0xd000
group 0x00++0x04
line.byte 0x00 "LCR,LPG control"
bitfld.byte 0x00 7. " PERM_ON ,Force permanent light on" "Not permanent,Permanent"
bitfld.byte 0x00 6. " LPGRES ,LPG counter reset" "Reset,No reset"
bitfld.byte 0x00 3.--5. " ONCTRL ,Time LED is on parameter" "3.889 ms,7.789 ms,15.59 ms,31.39 ms,46.59 ms,62.59 ms,78.39 ms,93.59 ms"
bitfld.byte 0x00 0.--2. " PERCONTROL ,LED blink period" "125 ms,250 ms,500 ms,1 s,1.5 s,2 s,2.5 s,3 s"
line.byte 0x04 "PWR,Power management"
bitfld.byte 0x04 0. " CLK_EN ,Functional clock enable" "Disabled,Enabled"
tree.end
tree "LED Pulse Generator 2 Registers"
width 6.
base ad:0xfffb0000+0xd800
group 0x00++0x04
line.byte 0x00 "LCR,LPG control"
bitfld.byte 0x00 7. " PERM_ON ,Force permanent light on" "Not permanent,Permanent"
bitfld.byte 0x00 6. " LPGRES ,LPG counter reset" "Reset,No reset"
bitfld.byte 0x00 3.--5. " ONCTRL ,Time LED is on parameter" "3.889 ms,7.789 ms,15.59 ms,31.39 ms,46.59 ms,62.59 ms,78.39 ms,93.59 ms"
bitfld.byte 0x00 0.--2. " PERCONTROL ,LED blink period" "125 ms,250 ms,500 ms,1 s,1.5 s,2 s,2.5 s,3 s"
line.byte 0x04 "PWR,Power management"
bitfld.byte 0x04 0. " CLK_EN ,Functional clock enable" "Disabled,Enabled"
tree.end
tree "Multichannel Buffered Serial Port (McBSP) 2 Registers"
width 6.
base ad:0xfffb1000
group 0x00++0x17
line.word 0x02 "DRR1,Data receive register 1"
line.word 0x00 "DRR2,Data receive register 2"
line.word 0x06 "DXR1,Data transmit register 1"
line.word 0x04 "DXR2,Data transmit register 2"
line.word 0x0a "SPCR1,Serial port control register 1"
bitfld.word 0x0a 15. " DLB ,Digital loopback mode bit" "Disabled,Enabled"
bitfld.word 0x0a 13.--14. " RJUST ,Receive sign-extension and justification mode bits" "Right / zero-fill,Right / sing-ext,Left / zero-fill,?..."
textline " "
bitfld.word 0x0a 11.--12. " CLKSTP ,Clock stop mode bits" "Disabled,Disabled,Enabled / no delay,Enabled / half-cycle delay"
bitfld.word 0x0a 7. " DXENA ,DX delay enabler mode bit" "Off,On"
textline " "
bitfld.word 0x0a 4.--5. " RINTM ,Receive interrupt mode bits" "On RRDY rise,After every 16-channel block,On frame-sync pulse,On RSYNCERR"
bitfld.word 0x0a 3. " RSYNCERR ,Receive frame-sync error bit" "No error,Error"
textline " "
bitfld.word 0x0a 2. " RFULL ,Receiver full bit" "Not full,Full"
bitfld.word 0x0a 1. " RRDY ,Receiver ready bit" "Not ready,Ready"
textline " "
bitfld.word 0x0a 0. " RRST ,Receiver reset bit" "Reset,Enabled"
line.word 0x08 "SPCR2,Serial port control register 2"
bitfld.word 0x08 9. " FREE ,Free run bit" "SOFT dependent,Free run"
bitfld.word 0x08 8. " SOFT ,Soft stop bit" "Hard stop,Soft stop"
textline " "
bitfld.word 0x08 7. " FRST ,Frame-sync logic reset bit" "Reset,Enabled"
bitfld.word 0x08 6. " GRST ,Sample rate generator reset bit" "Reset,Enabled"
textline " "
bitfld.word 0x08 4.--5. " XINTM ,Transmit interrupt mode bits" "On XRDY rise,After every 16-channel block,On frame-sync pulse,On XSYNCERR"
bitfld.word 0x08 3. " SXYNCERR ,Transmit frame-sync error bit" "No error,Error"
textline " "
bitfld.word 0x08 2. " XEMPTY ,Transmitter empty bit" "Empty,Not empty"
bitfld.word 0x08 1. " XRDY ,Transmitter ready bit" "Not ready,Ready"
textline " "
bitfld.word 0x08 0. " XRST ,Transmitter reset bit" "Reset,Enabled"
line.word 0x0e "RCR1,Receive control register 1"
hexmask.word.byte 0x0e 8.--14. 1. 1. " RFRLEN1 ,Receive frame length 1 bits"
bitfld.word 0x0e 5.--7. " RWDLEN1 ,Receive word length 1 bits" "8 bits,12 bits,16 bits,20 bits,24 bits,32 bits,?..."
line.word 0x0c "RCR2,Receive control register 2"
bitfld.word 0x0c 15. " RPHASE ,Receive phase number bit" "Single,Dual"
hexmask.word.byte 0x0c 8.--14. 1. 1. " RFRLEN2 ,Receive frame length 2 bits"
textline " "
bitfld.word 0x0c 5.--7. " RWDLEN2 ,Receive word length 2 bits" "8 bits,12 bits,16 bits,20 bits,24 bits,32 bits,?..."
bitfld.word 0x0c 3.--4. " RCOMPAND ,Receive companding mode bits" "No companding / any size / MSB first,No companding / 8-bit / LSB first,u-law companding / 8-bit / MSB first,A-law companding / 8-bit / MSB first"
textline " "
bitfld.word 0x0c 2. " RFIG ,Receive frame-sync ignore bits" "Not ignored,Ignored"
bitfld.word 0x0c 0.--1. " RDATDLY ,Receive data delay bits" "0-bit,1-bit,2-bit,?..."
line.word 0x12 "XCR1,Transmit control register 1"
hexmask.word.byte 0x12 8.--14. 1. 1. " XFRLEN1 ,Transmit frame length 1 bits"
bitfld.word 0x12 5.--7. " XWDLEN1 ,Transmit word length 1 bits" "8 bits,12 bits,16 bits,20 bits,24 bits,32 bits,?..."
line.word 0x10 "XCR2,Transmit control register 2"
bitfld.word 0x10 15. " XPHASE ,Receive phase number bit" "Single,Dual"
hexmask.word.byte 0x10 8.--14. 1. 1. " XFRLEN2 ,Transmit frame length 2 bits"
textline " "
bitfld.word 0x10 5.--7. " XWDLEN2 ,Transmit word length 2 bits" "8 bits,12 bits,16 bits,20 bits,24 bits,32 bits,?..."
bitfld.word 0x10 3.--4. " XCOMPAND ,Transmit companding mode bits" "No companding / any size / MSB first,No companding / 8-bit / LSB first,u-law companding / 8-bit / MSB first,A-law companding / 8-bit / MSB first"
textline " "
bitfld.word 0x10 2. " XFIG ,Transmit frame-sync ignore bits" "Not ignored,Ignored"
bitfld.word 0x10 0.--1. " XDATDLY ,Transmit data delay bits" "0-bit,1-bit,2-bit,?..."
line.word 0x16 "SRGR1,Sample rate generator register 1"
hexmask.word 0x16 8.--15. 1. 1. " FWID ,Frame-sync pulse width bits for FSG"
hexmask.word 0x16 0.--7. 1. 1. " CLKGDV ,Divide-down value for CLKG"
if (d.w(ad:0xfffb1000+0x24)&0x0080)==0x0000
group 0x14++0x03
line.word 0x00 "SRGR2,Sample rate generator register 2"
bitfld.word 0x00 15. " GSYNC ,Clock synchronization mode bit for CLKG" "Disabled,Enabled"
bitfld.word 0x00 14. " CLKSP ,CLKS pin polarity bit" "Rising edge,Falling edge"
textline " "
bitfld.word 0x00 13. " CLKSM ,Sample rate generator input clock mode bit" "CLKS pin,McBSP internal"
bitfld.word 0x00 12. " FSGM ,Sample rate generator transmit frame-sync mode bit" "McBSP,Sample rate generator"
textline " "
hexmask.word 0x00 0.--11. 1. 1. " FPER ,Frame-sync period bits for FSG"
else
group 0x14++0x03
line.word 0x00 "SRGR2,Sample rate generator register 2"
bitfld.word 0x00 15. " GSYNC ,Clock synchronization mode bit for CLKG" "Disabled,Enabled"
bitfld.word 0x00 14. " CLKSP ,CLKS pin polarity bit" "Rising edge,Falling edge"
textline " "
bitfld.word 0x00 13. " CLKSM ,Sample rate generator input clock mode bit" "CLKR pin,CLKX pin"
bitfld.word 0x00 12. " FSGM ,Sample rate generator transmit frame-sync mode bit" "McBSP,Sample rate generator"
textline " "
hexmask.word 0x00 0.--11. 1. 1. " FPER ,Frame-sync period bits for FSG"
endif
if (d.w(ad:0xfffb1000+0x1a)&0x0201)==0x0001
group 0x1a++0x01
line.word 0x00 "MCR1,Multichannel register 1"
bitfld.word 0x00 9. " RMCME ,Receive multichannel partition mode bit" "2-partition,8-partition"
textline " "
bitfld.word 0x00 7.--8. " RPBBLK ,Receive partition B block bits" "Block 1 [16..31],Block 3 [48..63],Block 5 [80..95],Block 7 [112..127]"
bitfld.word 0x00 5.--6. " RPABLK ,Receive partition A block bits" "Block 0 [0..15],Block 2 [32..47],Block 4 [64..79],Block 6 [96..111]"
textline " "
bitfld.word 0x00 2.--4. " RCBLK ,Receive current block indicator" "Block 0 [0..15],Block 1 [16..31],Block 2 [32..47],Block 3 [48..63],Block 4 [64..79],Block 5 [80..95],Block 6 [96..111],Block 7 [112..127]"
bitfld.word 0x00 0. " RMCM ,Receive multichannel selection mode bit" "All 128 channels,Multichannel selection"
elif (d.w(ad:0xfffb1000+0x1a)&0x0001)==0x0001
group 0x1a++0x01
line.word 0x00 "MCR1,Multichannel register 1"
bitfld.word 0x00 9. " RMCME ,Receive multichannel partition mode bit" "2-partition,8-partition"
textline " "
textline " "
bitfld.word 0x00 2.--4. " RCBLK ,Receive current block indicator" "Block 0 [0..15],Block 1 [16..31],Block 2 [32..47],Block 3 [48..63],Block 4 [64..79],Block 5 [80..95],Block 6 [96..111],Block 7 [112..127]"
bitfld.word 0x00 0. " RMCM ,Receive multichannel selection mode bit" "All 128 channels,Multichannel selection"
else
group 0x1a++0x01
line.word 0x00 "MCR1,Multichannel register 1"
textline " "
textline " "
bitfld.word 0x00 2.--4. " RCBLK ,Receive current block indicator" "Block 0 [0..15],Block 1 [16..31],Block 2 [32..47],Block 3 [48..63],Block 4 [64..79],Block 5 [80..95],Block 6 [96..111],Block 7 [112..127]"
bitfld.word 0x00 0. " RMCM ,Receive multichannel selection mode bit" "All 128 channels,Multichannel selection"
endif
if ((d.w(ad:0xfffb1000+0x18)&0x0200)==0x0000)&&((d.w(ad:0xfffb1000+0x18)&0x0003)!=0x0000)
group 0x18++0x01
line.word 0x00 "MCR2,Multichannel register 2"
bitfld.word 0x00 9. " XMCME ,Transmit multichannel partition mode bit" "2-partition,8-partition"
textline " "
bitfld.word 0x00 7.--8. " XPBBLK ,Transmit partition B block bits" "Block 1 [16..31],Block 3 [48..63],Block 5 [80..95],Block 7 [112..127]"
bitfld.word 0x00 5.--6. " XPABLK ,Transmit partition A block bits" "Block 0 [0..15],Block 2 [32..47],Block 4 [64..79],Block 6 [96..111]"
textline " "
bitfld.word 0x00 2.--4. " XCBLK ,Transmit current block indicator" "Block 0 [0..15],Block 1 [16..31],Block 2 [32..47],Block 3 [48..63],Block 4 [64..79],Block 5 [80..95],Block 6 [96..111],Block 7 [112..127]"
bitfld.word 0x00 0.--1. " XMCM ,Transmit multichannel selection mode bit" "Multichannel selection off,All channels disabled,All channels enabled,Symmetric TX/RX"
elif (d.w(ad:0xfffb1000+0x18)&0x0003)!=0x0000
group 0x18++0x01
line.word 0x00 "MCR2,Multichannel register 2"
bitfld.word 0x00 9. " XMCME ,Transmit multichannel partition mode bit" "2-partition,8-partition"
textline " "
textline " "
bitfld.word 0x00 2.--4. " XCBLK ,Transmit current block indicator" "Block 0 [0..15],Block 1 [16..31],Block 2 [32..47],Block 3 [48..63],Block 4 [64..79],Block 5 [80..95],Block 6 [96..111],Block 7 [112..127]"
bitfld.word 0x00 0.--1. " XMCM ,Transmit multichannel selection mode bit" "Multichannel selection off,All channels disabled,All channels enabled,Symmetric TX/RX"
else
group 0x18++0x01
line.word 0x00 "MCR2,Multichannel register 2"
textline " "
textline " "
bitfld.word 0x00 2.--4. " XCBLK ,Transmit current block indicator" "Block 0 [0..15],Block 1 [16..31],Block 2 [32..47],Block 3 [48..63],Block 4 [64..79],Block 5 [80..95],Block 6 [96..111],Block 7 [112..127]"
bitfld.word 0x00 0.--1. " XMCM ,Transmit multichannel selection mode bit" "Multichannel selection off,All channels disabled,All channels enabled,Symmetric TX/RX"
endif
if ((d.w(ad:0xfffb1000+0x0a)&0x9000)==0x0000)&&((d.w(ad:0xfffb1000+0x14)&0x2000)==0x0000)
group 0x24++0x19
line.word 0x00 "PCR0,Pin control register"
bitfld.word 0x00 14. " IDLEEN ,Idle enable" "Disabled,Enabled"
bitfld.word 0x00 13. " XIOEN ,Transmit I/O enable bit" "Serial port,GPIO"
textline " "
bitfld.word 0x00 12. " RIOEN ,Receive I/O enable bit" "Serial port,GPIO"
bitfld.word 0x00 11. " FSXM ,Transmit frame-sync mode bit" "External source,SRGR2[FSGM]"
textline " "
bitfld.word 0x00 10. " FSRM ,Receive frame-sync mode bit" "External source,Sample rate generator"
bitfld.word 0x00 9. " CLKXM ,Transmit clock mode bit" "External source,Sample rate generator"
textline " "
bitfld.word 0x00 8. " CLKRM ,Receive clock mode bit" "Input pin,Output pin"
bitfld.word 0x00 7. " SCLKME ,Sample rate generator input clock mode bit" "CLKS pin,CLKR pin"
textline " "
bitfld.word 0x00 6. " CLKSSTAT ,CLKS pin status bit" "Low,High"
bitfld.word 0x00 5. " DXSTAT ,DX pin status bit" "Low,High"
textline " "
bitfld.word 0x00 4. " DRSTAT ,DR pin status bit" "Low,High"
bitfld.word 0x00 3. " FSXP ,Transmit frame-sync polarity bit" "Active high,Active low"
textline " "
bitfld.word 0x00 2. " FSRP ,Receive frame-sync polarity bit" "Active high,Active low"
bitfld.word 0x00 1. " CLKXP ,Transmit clock polarity bit" "Rising edge,Falling edge"
textline " "
bitfld.word 0x00 0. " CLKRP ,Receiver clock polarity bit" "Not inverted,Inverted"
elif (d.w(ad:0xfffb1000+0x0a)&0x9000)==0x0000
group 0x24++0x19
line.word 0x00 "PCR0,Pin control register"
bitfld.word 0x00 14. " IDLEEN ,Idle enable" "Disabled,Enabled"
bitfld.word 0x00 13. " XIOEN ,Transmit I/O enable bit" "Serial port,GPIO"
textline " "
bitfld.word 0x00 12. " RIOEN ,Receive I/O enable bit" "Serial port,GPIO"
bitfld.word 0x00 11. " FSXM ,Transmit frame-sync mode bit" "External source,SRGR2[FSGM]"
textline " "
bitfld.word 0x00 10. " FSRM ,Receive frame-sync mode bit" "External source,Sample rate generator"
bitfld.word 0x00 9. " CLKXM ,Transmit clock mode bit" "External source,Sample rate generator"
textline " "
bitfld.word 0x00 8. " CLKRM ,Receive clock mode bit" "Input pin,Output pin"
bitfld.word 0x00 7. " SCLKME ,Sample rate generator input clock mode bit" "McBSP internal,CLKX pin"
textline " "
bitfld.word 0x00 6. " CLKSSTAT ,CLKS pin status bit" "Low,High"
bitfld.word 0x00 5. " DXSTAT ,DX pin status bit" "Low,High"
textline " "
bitfld.word 0x00 4. " DRSTAT ,DR pin status bit" "Low,High"
bitfld.word 0x00 3. " FSXP ,Transmit frame-sync polarity bit" "Active high,Active low"
textline " "
bitfld.word 0x00 2. " FSRP ,Receive frame-sync polarity bit" "Active high,Active low"
bitfld.word 0x00 1. " CLKXP ,Transmit clock polarity bit" "Rising edge,Falling edge"
textline " "
bitfld.word 0x00 0. " CLKRP ,Receiver clock polarity bit" "Not inverted,Inverted"
elif ((d.w(ad:0xfffb1000+0x0a)&0x9000)==0x1000)&&((d.w(ad:0xfffb1000+0x14)&0x2000)==0x0000)
group 0x24++0x19
line.word 0x00 "PCR0,Pin control register"
bitfld.word 0x00 14. " IDLEEN ,Idle enable" "Disabled,Enabled"
bitfld.word 0x00 13. " XIOEN ,Transmit I/O enable bit" "Serial port,GPIO"
textline " "
bitfld.word 0x00 12. " RIOEN ,Receive I/O enable bit" "Serial port,GPIO"
bitfld.word 0x00 11. " FSXM ,Transmit frame-sync mode bit" "External source,SRGR2[FSGM]"
textline " "
bitfld.word 0x00 10. " FSRM ,Receive frame-sync mode bit" "External source,Sample rate generator"
bitfld.word 0x00 9. " CLKXM ,Transmit clock mode bit" "External source,Sample rate generator"
textline " "
bitfld.word 0x00 8. " CLKRM ,Receive clock mode bit" "Hi-Z,CLKX"
bitfld.word 0x00 7. " SCLKME ,Sample rate generator input clock mode bit" "CLKS pin,CLKR pin"
textline " "
bitfld.word 0x00 6. " CLKSSTAT ,CLKS pin status bit" "Low,High"
bitfld.word 0x00 5. " DXSTAT ,DX pin status bit" "Low,High"
textline " "
bitfld.word 0x00 4. " DRSTAT ,DR pin status bit" "Low,High"
bitfld.word 0x00 3. " FSXP ,Transmit frame-sync polarity bit" "Active high,Active low"
textline " "
bitfld.word 0x00 2. " FSRP ,Receive frame-sync polarity bit" "Active high,Active low"
bitfld.word 0x00 1. " CLKXP ,Transmit clock polarity bit" "Rising edge,Falling edge"
textline " "
bitfld.word 0x00 0. " CLKRP ,Receiver clock polarity bit" "Not inverted,Inverted"
elif (d.w(ad:0xfffb1000+0x0a)&0x9000)==0x1000
group 0x24++0x19
line.word 0x00 "PCR0,Pin control register"
bitfld.word 0x00 14. " IDLEEN ,Idle enable" "Disabled,Enabled"
bitfld.word 0x00 13. " XIOEN ,Transmit I/O enable bit" "Serial port,GPIO"
textline " "
bitfld.word 0x00 12. " RIOEN ,Receive I/O enable bit" "Serial port,GPIO"
bitfld.word 0x00 11. " FSXM ,Transmit frame-sync mode bit" "External source,SRGR2[FSGM]"
textline " "
bitfld.word 0x00 10. " FSRM ,Receive frame-sync mode bit" "External source,Sample rate generator"
bitfld.word 0x00 9. " CLKXM ,Transmit clock mode bit" "External source,Sample rate generator"
textline " "
bitfld.word 0x00 8. " CLKRM ,Receive clock mode bit" "Hi-Z,CLKX"
bitfld.word 0x00 7. " SCLKME ,Sample rate generator input clock mode bit" "McBSP internal,CLKX pin"
textline " "
bitfld.word 0x00 6. " CLKSSTAT ,CLKS pin status bit" "Low,High"
bitfld.word 0x00 5. " DXSTAT ,DX pin status bit" "Low,High"
textline " "
bitfld.word 0x00 4. " DRSTAT ,DR pin status bit" "Low,High"
bitfld.word 0x00 3. " FSXP ,Transmit frame-sync polarity bit" "Active high,Active low"
textline " "
bitfld.word 0x00 2. " FSRP ,Receive frame-sync polarity bit" "Active high,Active low"
bitfld.word 0x00 1. " CLKXP ,Transmit clock polarity bit" "Rising edge,Falling edge"
textline " "
bitfld.word 0x00 0. " CLKRP ,Receiver clock polarity bit" "Not inverted,Inverted"
elif ((d.w(ad:0xfffb1000+0x0a)&0x9000)==0x8000)&&((d.w(ad:0xfffb1000+0x14)&0x2000)==0x0000)
group 0x24++0x19
line.word 0x00 "PCR0,Pin control register"
bitfld.word 0x00 14. " IDLEEN ,Idle enable" "Disabled,Enabled"
bitfld.word 0x00 13. " XIOEN ,Transmit I/O enable bit" "Serial port,GPIO"
textline " "
bitfld.word 0x00 12. " RIOEN ,Receive I/O enable bit" "Serial port,GPIO"
bitfld.word 0x00 11. " FSXM ,Transmit frame-sync mode bit" "External source,SRGR2[FSGM]"
textline " "
bitfld.word 0x00 10. " FSRM ,Receive frame-sync mode bit" "External source,Sample rate generator"
bitfld.word 0x00 9. " CLKXM ,Transmit clock mode bit" "SPI slave,SPI master"
textline " "
bitfld.word 0x00 8. " CLKRM ,Receive clock mode bit" "Input pin,Output pin"
bitfld.word 0x00 7. " SCLKME ,Sample rate generator input clock mode bit" "CLKS pin,CLKR pin"
textline " "
bitfld.word 0x00 6. " CLKSSTAT ,CLKS pin status bit" "Low,High"
bitfld.word 0x00 5. " DXSTAT ,DX pin status bit" "Low,High"
textline " "
bitfld.word 0x00 4. " DRSTAT ,DR pin status bit" "Low,High"
bitfld.word 0x00 3. " FSXP ,Transmit frame-sync polarity bit" "Active high,Active low"
textline " "
bitfld.word 0x00 2. " FSRP ,Receive frame-sync polarity bit" "Active high,Active low"
bitfld.word 0x00 1. " CLKXP ,Transmit clock polarity bit" "Rising edge,Falling edge"
textline " "
bitfld.word 0x00 0. " CLKRP ,Receiver clock polarity bit" "Not inverted,Inverted"
elif (d.w(ad:0xfffb1000+0x0a)&0x9000)==0x8000
group 0x24++0x19
line.word 0x00 "PCR0,Pin control register"
bitfld.word 0x00 14. " IDLEEN ,Idle enable" "Disabled,Enabled"
bitfld.word 0x00 13. " XIOEN ,Transmit I/O enable bit" "Serial port,GPIO"
textline " "
bitfld.word 0x00 12. " RIOEN ,Receive I/O enable bit" "Serial port,GPIO"
bitfld.word 0x00 11. " FSXM ,Transmit frame-sync mode bit" "External source,SRGR2[FSGM]"
textline " "
bitfld.word 0x00 10. " FSRM ,Receive frame-sync mode bit" "External source,Sample rate generator"
bitfld.word 0x00 9. " CLKXM ,Transmit clock mode bit" "SPI slave,SPI master"
textline " "
bitfld.word 0x00 8. " CLKRM ,Receive clock mode bit" "Input pin,Output pin"
bitfld.word 0x00 7. " SCLKME ,Sample rate generator input clock mode bit" "McBSP internal,CLKX pin"
textline " "
bitfld.word 0x00 6. " CLKSSTAT ,CLKS pin status bit" "Low,High"
bitfld.word 0x00 5. " DXSTAT ,DX pin status bit" "Low,High"
textline " "
bitfld.word 0x00 4. " DRSTAT ,DR pin status bit" "Low,High"
bitfld.word 0x00 3. " FSXP ,Transmit frame-sync polarity bit" "Active high,Active low"
textline " "
bitfld.word 0x00 2. " FSRP ,Receive frame-sync polarity bit" "Active high,Active low"
bitfld.word 0x00 1. " CLKXP ,Transmit clock polarity bit" "Rising edge,Falling edge"
textline " "
bitfld.word 0x00 0. " CLKRP ,Receiver clock polarity bit" "Not inverted,Inverted"
elif ((d.w(ad:0xfffb1000+0x0a)&0x9000)==0x9000)&&((d.w(ad:0xfffb1000+0x14)&0x2000)==0x0000)
group 0x24++0x19
line.word 0x00 "PCR0,Pin control register"
bitfld.word 0x00 14. " IDLEEN ,Idle enable" "Disabled,Enabled"
bitfld.word 0x00 13. " XIOEN ,Transmit I/O enable bit" "Serial port,GPIO"
textline " "
bitfld.word 0x00 12. " RIOEN ,Receive I/O enable bit" "Serial port,GPIO"
bitfld.word 0x00 11. " FSXM ,Transmit frame-sync mode bit" "External source,SRGR2[FSGM]"
textline " "
bitfld.word 0x00 10. " FSRM ,Receive frame-sync mode bit" "External source,Sample rate generator"
bitfld.word 0x00 9. " CLKXM ,Transmit clock mode bit" "SPI slave,SPI master"
textline " "
bitfld.word 0x00 8. " CLKRM ,Receive clock mode bit" "Hi-Z,CLKX"
bitfld.word 0x00 7. " SCLKME ,Sample rate generator input clock mode bit" "CLKS pin,CLKR pin"
textline " "
bitfld.word 0x00 6. " CLKSSTAT ,CLKS pin status bit" "Low,High"
bitfld.word 0x00 5. " DXSTAT ,DX pin status bit" "Low,High"
textline " "
bitfld.word 0x00 4. " DRSTAT ,DR pin status bit" "Low,High"
bitfld.word 0x00 3. " FSXP ,Transmit frame-sync polarity bit" "Active high,Active low"
textline " "
bitfld.word 0x00 2. " FSRP ,Receive frame-sync polarity bit" "Active high,Active low"
bitfld.word 0x00 1. " CLKXP ,Transmit clock polarity bit" "Rising edge,Falling edge"
textline " "
bitfld.word 0x00 0. " CLKRP ,Receiver clock polarity bit" "Not inverted,Inverted"
else
group 0x24++0x19
line.word 0x00 "PCR0,Pin control register"
bitfld.word 0x00 14. " IDLEEN ,Idle enable" "Disabled,Enabled"
bitfld.word 0x00 13. " XIOEN ,Transmit I/O enable bit" "Serial port,GPIO"
textline " "
bitfld.word 0x00 12. " RIOEN ,Receive I/O enable bit" "Serial port,GPIO"
bitfld.word 0x00 11. " FSXM ,Transmit frame-sync mode bit" "External source,SRGR2[FSGM]"
textline " "
bitfld.word 0x00 10. " FSRM ,Receive frame-sync mode bit" "External source,Sample rate generator"
bitfld.word 0x00 9. " CLKXM ,Transmit clock mode bit" "SPI slave,SPI master"
textline " "
bitfld.word 0x00 8. " CLKRM ,Receive clock mode bit" "Hi-Z,CLKX"
bitfld.word 0x00 7. " SCLKME ,Sample rate generator input clock mode bit" "McBSP internal,CLKX pin"
textline " "
bitfld.word 0x00 6. " CLKSSTAT ,CLKS pin status bit" "Low,High"
bitfld.word 0x00 5. " DXSTAT ,DX pin status bit" "Low,High"
textline " "
bitfld.word 0x00 4. " DRSTAT ,DR pin status bit" "Low,High"
bitfld.word 0x00 3. " FSXP ,Transmit frame-sync polarity bit" "Active high,Active low"
textline " "
bitfld.word 0x00 2. " FSRP ,Receive frame-sync polarity bit" "Active high,Active low"
bitfld.word 0x00 1. " CLKXP ,Transmit clock polarity bit" "Rising edge,Falling edge"
textline " "
bitfld.word 0x00 0. " CLKRP ,Receiver clock polarity bit" "Not inverted,Inverted"
endif
tree "Receive channel enable registers"
width 6.
if (d.w(ad:0xfffb1000+0x1a)&0x0001)==0x0000
rgroup 0x1c++0x01
hide.word 0x00 "RCERA,Receive channel enable register partition A"
elif ((d.w(ad:0xfffb1000+0x1a)&0x0200)==0x0200)||((d.w(ad:0xfffb1000+0x1a)&0x0260)==0x0000)
group 0x1c++0x01
line.word 0x00 "RCERA,Receive channel enable register partition A"
bitfld.word 0x00 15. " RCE15 ,Receive channel 15 enable bit" "Disabled,Enabled"
bitfld.word 0x00 14. " RCE14 ,Receive channel 14 enable bit" "Disabled,Enabled"
bitfld.word 0x00 13. " RCE13 ,Receive channel 13 enable bit" "Disabled,Enabled"
bitfld.word 0x00 12. " RCE12 ,Receive channel 12 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 11. " RCE11 ,Receive channel 11 enable bit" "Disabled,Enabled"
bitfld.word 0x00 10. " RCE10 ,Receive channel 10 enable bit" "Disabled,Enabled"
bitfld.word 0x00 9. " RCE9 ,Receive channel 9 enable bit" "Disabled,Enabled"
bitfld.word 0x00 8. " RCE8 ,Receive channel 8 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 7. " RCE7 ,Receive channel 7 enable bit" "Disabled,Enabled"
bitfld.word 0x00 6. " RCE6 ,Receive channel 6 enable bit" "Disabled,Enabled"
bitfld.word 0x00 5. " RCE5 ,Receive channel 5 enable bit" "Disabled,Enabled"
bitfld.word 0x00 4. " RCE4 ,Receive channel 4 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 3. " RCE3 ,Receive channel 3 enable bit" "Disabled,Enabled"
bitfld.word 0x00 2. " RCE2 ,Receive channel 2 enable bit" "Disabled,Enabled"
bitfld.word 0x00 1. " RCE1 ,Receive channel 1 enable bit" "Disabled,Enabled"
bitfld.word 0x00 0. " RCE0 ,Receive channel 0 enable bit" "Disabled,Enabled"
elif (d.w(ad:0xfffb1000+0x1a)&0x0260)==0x0020
group 0x1c++0x01
line.word 0x00 "RCERA,Receive channel enable register partition A"
bitfld.word 0x00 15. " RCE47 ,Receive channel 47 enable bit" "Disabled,Enabled"
bitfld.word 0x00 14. " RCE46 ,Receive channel 46 enable bit" "Disabled,Enabled"
bitfld.word 0x00 13. " RCE45 ,Receive channel 45 enable bit" "Disabled,Enabled"
bitfld.word 0x00 12. " RCE44 ,Receive channel 44 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 11. " RCE43 ,Receive channel 43 enable bit" "Disabled,Enabled"
bitfld.word 0x00 10. " RCE42 ,Receive channel 42 enable bit" "Disabled,Enabled"
bitfld.word 0x00 9. " RCE41 ,Receive channel 41 enable bit" "Disabled,Enabled"
bitfld.word 0x00 8. " RCE40 ,Receive channel 40 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 7. " RCE39 ,Receive channel 39 enable bit" "Disabled,Enabled"
bitfld.word 0x00 6. " RCE38 ,Receive channel 38 enable bit" "Disabled,Enabled"
bitfld.word 0x00 5. " RCE37 ,Receive channel 37 enable bit" "Disabled,Enabled"
bitfld.word 0x00 4. " RCE36 ,Receive channel 36 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 3. " RCE35 ,Receive channel 35 enable bit" "Disabled,Enabled"
bitfld.word 0x00 2. " RCE34 ,Receive channel 34 enable bit" "Disabled,Enabled"
bitfld.word 0x00 1. " RCE33 ,Receive channel 33 enable bit" "Disabled,Enabled"
bitfld.word 0x00 0. " RCE32 ,Receive channel 32 enable bit" "Disabled,Enabled"
elif (d.w(ad:0xfffb1000+0x1a)&0x0260)==0x0040
group 0x1c++0x01
line.word 0x00 "RCERA,Receive channel enable register partition A"
bitfld.word 0x00 15. " RCE79 ,Receive channel 79 enable bit" "Disabled,Enabled"
bitfld.word 0x00 14. " RCE78 ,Receive channel 78 enable bit" "Disabled,Enabled"
bitfld.word 0x00 13. " RCE77 ,Receive channel 77 enable bit" "Disabled,Enabled"
bitfld.word 0x00 12. " RCE76 ,Receive channel 76 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 11. " RCE75 ,Receive channel 75 enable bit" "Disabled,Enabled"
bitfld.word 0x00 10. " RCE74 ,Receive channel 74 enable bit" "Disabled,Enabled"
bitfld.word 0x00 9. " RCE73 ,Receive channel 73 enable bit" "Disabled,Enabled"
bitfld.word 0x00 8. " RCE72 ,Receive channel 72 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 7. " RCE71 ,Receive channel 71 enable bit" "Disabled,Enabled"
bitfld.word 0x00 6. " RCE70 ,Receive channel 70 enable bit" "Disabled,Enabled"
bitfld.word 0x00 5. " RCE69 ,Receive channel 69 enable bit" "Disabled,Enabled"
bitfld.word 0x00 4. " RCE68 ,Receive channel 68 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 3. " RCE67 ,Receive channel 67 enable bit" "Disabled,Enabled"
bitfld.word 0x00 2. " RCE66 ,Receive channel 66 enable bit" "Disabled,Enabled"
bitfld.word 0x00 1. " RCE65 ,Receive channel 65 enable bit" "Disabled,Enabled"
bitfld.word 0x00 0. " RCE64 ,Receive channel 64 enable bit" "Disabled,Enabled"
elif (d.w(ad:0xfffb1000+0x1a)&0x0260)==0x0060
group 0x1c++0x01
line.word 0x00 "RCERA,Receive channel enable register partition A"
bitfld.word 0x00 15. " RCE111 ,Receive channel 111 enable bit" "Disabled,Enabled"
bitfld.word 0x00 14. " RCE110 ,Receive channel 110 enable bit" "Disabled,Enabled"
bitfld.word 0x00 13. " RCE109 ,Receive channel 109 enable bit" "Disabled,Enabled"
bitfld.word 0x00 12. " RCE108 ,Receive channel 108 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 11. " RCE107 ,Receive channel 107 enable bit" "Disabled,Enabled"
bitfld.word 0x00 10. " RCE106 ,Receive channel 106 enable bit" "Disabled,Enabled"
bitfld.word 0x00 9. " RCE105 ,Receive channel 105 enable bit" "Disabled,Enabled"
bitfld.word 0x00 8. " RCE104 ,Receive channel 104 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 7. " RCE103 ,Receive channel 103 enable bit" "Disabled,Enabled"
bitfld.word 0x00 6. " RCE102 ,Receive channel 102 enable bit" "Disabled,Enabled"
bitfld.word 0x00 5. " RCE101 ,Receive channel 101 enable bit" "Disabled,Enabled"
bitfld.word 0x00 4. " RCE100 ,Receive channel 100 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 3. " RCE99 ,Receive channel 99 enable bit" "Disabled,Enabled"
bitfld.word 0x00 2. " RCE98 ,Receive channel 98 enable bit" "Disabled,Enabled"
bitfld.word 0x00 1. " RCE97 ,Receive channel 97 enable bit" "Disabled,Enabled"
bitfld.word 0x00 0. " RCE96 ,Receive channel 96 enable bit" "Disabled,Enabled"
endif
if (d.w(ad:0xfffb1000+0x1a)&0x0001)==0x0000
rgroup 0x1e++0x01
hide.word 0x00 "RCERB,Receive channel enable register partition B"
elif ((d.w(ad:0xfffb1000+0x1a)&0x0200)==0x0200)||((d.w(ad:0xfffb1000+0x1a)&0x0380)==0x0000)
group 0x1e++0x01
line.word 0x00 "RCERB,Receive channel enable register partition B"
bitfld.word 0x00 15. " RCE31 ,Receive channel 31 enable bit" "Disabled,Enabled"
bitfld.word 0x00 14. " RCE30 ,Receive channel 30 enable bit" "Disabled,Enabled"
bitfld.word 0x00 13. " RCE29 ,Receive channel 29 enable bit" "Disabled,Enabled"
bitfld.word 0x00 12. " RCE28 ,Receive channel 28 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 11. " RCE27 ,Receive channel 27 enable bit" "Disabled,Enabled"
bitfld.word 0x00 10. " RCE26 ,Receive channel 26 enable bit" "Disabled,Enabled"
bitfld.word 0x00 9. " RCE25 ,Receive channel 25 enable bit" "Disabled,Enabled"
bitfld.word 0x00 8. " RCE24 ,Receive channel 24 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 7. " RCE23 ,Receive channel 23 enable bit" "Disabled,Enabled"
bitfld.word 0x00 6. " RCE22 ,Receive channel 22 enable bit" "Disabled,Enabled"
bitfld.word 0x00 5. " RCE21 ,Receive channel 21 enable bit" "Disabled,Enabled"
bitfld.word 0x00 4. " RCE20 ,Receive channel 20 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 3. " RCE19 ,Receive channel 19 enable bit" "Disabled,Enabled"
bitfld.word 0x00 2. " RCE18 ,Receive channel 18 enable bit" "Disabled,Enabled"
bitfld.word 0x00 1. " RCE17 ,Receive channel 17 enable bit" "Disabled,Enabled"
bitfld.word 0x00 0. " RCE16 ,Receive channel 16 enable bit" "Disabled,Enabled"
elif (d.w(ad:0xfffb1000+0x1a)&0x0380)==0x0080
group 0x1e++0x01
line.word 0x00 "RCERB,Receive channel enable register partition B"
bitfld.word 0x00 15. " RCE63 ,Receive channel 63 enable bit" "Disabled,Enabled"
bitfld.word 0x00 14. " RCE62 ,Receive channel 62 enable bit" "Disabled,Enabled"
bitfld.word 0x00 13. " RCE61 ,Receive channel 61 enable bit" "Disabled,Enabled"
bitfld.word 0x00 12. " RCE60 ,Receive channel 60 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 11. " RCE59 ,Receive channel 59 enable bit" "Disabled,Enabled"
bitfld.word 0x00 10. " RCE58 ,Receive channel 58 enable bit" "Disabled,Enabled"
bitfld.word 0x00 9. " RCE57 ,Receive channel 57 enable bit" "Disabled,Enabled"
bitfld.word 0x00 8. " RCE56 ,Receive channel 56 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 7. " RCE55 ,Receive channel 55 enable bit" "Disabled,Enabled"
bitfld.word 0x00 6. " RCE54 ,Receive channel 54 enable bit" "Disabled,Enabled"
bitfld.word 0x00 5. " RCE53 ,Receive channel 53 enable bit" "Disabled,Enabled"
bitfld.word 0x00 4. " RCE52 ,Receive channel 52 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 3. " RCE51 ,Receive channel 51 enable bit" "Disabled,Enabled"
bitfld.word 0x00 2. " RCE50 ,Receive channel 50 enable bit" "Disabled,Enabled"
bitfld.word 0x00 1. " RCE49 ,Receive channel 49 enable bit" "Disabled,Enabled"
bitfld.word 0x00 0. " RCE48 ,Receive channel 48 enable bit" "Disabled,Enabled"
elif (d.w(ad:0xfffb1000+0x1a)&0x0380)==0x0100
group 0x1e++0x01
line.word 0x00 "RCERB,Receive channel enable register partition B"
bitfld.word 0x00 15. " RCE95 ,Receive channel 95 enable bit" "Disabled,Enabled"
bitfld.word 0x00 14. " RCE94 ,Receive channel 94 enable bit" "Disabled,Enabled"
bitfld.word 0x00 13. " RCE93 ,Receive channel 93 enable bit" "Disabled,Enabled"
bitfld.word 0x00 12. " RCE92 ,Receive channel 92 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 11. " RCE91 ,Receive channel 91 enable bit" "Disabled,Enabled"
bitfld.word 0x00 10. " RCE90 ,Receive channel 90 enable bit" "Disabled,Enabled"
bitfld.word 0x00 9. " RCE89 ,Receive channel 89 enable bit" "Disabled,Enabled"
bitfld.word 0x00 8. " RCE88 ,Receive channel 88 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 7. " RCE87 ,Receive channel 87 enable bit" "Disabled,Enabled"
bitfld.word 0x00 6. " RCE86 ,Receive channel 86 enable bit" "Disabled,Enabled"
bitfld.word 0x00 5. " RCE85 ,Receive channel 85 enable bit" "Disabled,Enabled"
bitfld.word 0x00 4. " RCE84 ,Receive channel 84 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 3. " RCE83 ,Receive channel 83 enable bit" "Disabled,Enabled"
bitfld.word 0x00 2. " RCE82 ,Receive channel 82 enable bit" "Disabled,Enabled"
bitfld.word 0x00 1. " RCE81 ,Receive channel 81 enable bit" "Disabled,Enabled"
bitfld.word 0x00 0. " RCE80 ,Receive channel 80 enable bit" "Disabled,Enabled"
elif (d.w(ad:0xfffb1000+0x1a)&0x0380)==0x0180
group 0x1e++0x01
line.word 0x00 "RCERB,Receive channel enable register partition B"
bitfld.word 0x00 15. " RCE127 ,Receive channel 127 enable bit" "Disabled,Enabled"
bitfld.word 0x00 14. " RCE126 ,Receive channel 126 enable bit" "Disabled,Enabled"
bitfld.word 0x00 13. " RCE125 ,Receive channel 125 enable bit" "Disabled,Enabled"
bitfld.word 0x00 12. " RCE124 ,Receive channel 124 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 11. " RCE123 ,Receive channel 123 enable bit" "Disabled,Enabled"
bitfld.word 0x00 10. " RCE122 ,Receive channel 122 enable bit" "Disabled,Enabled"
bitfld.word 0x00 9. " RCE121 ,Receive channel 121 enable bit" "Disabled,Enabled"
bitfld.word 0x00 8. " RCE120 ,Receive channel 120 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 7. " RCE119 ,Receive channel 119 enable bit" "Disabled,Enabled"
bitfld.word 0x00 6. " RCE118 ,Receive channel 118 enable bit" "Disabled,Enabled"
bitfld.word 0x00 5. " RCE117 ,Receive channel 117 enable bit" "Disabled,Enabled"
bitfld.word 0x00 4. " RCE116 ,Receive channel 116 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 3. " RCE115 ,Receive channel 115 enable bit" "Disabled,Enabled"
bitfld.word 0x00 2. " RCE114 ,Receive channel 114 enable bit" "Disabled,Enabled"
bitfld.word 0x00 1. " RCE113 ,Receive channel 113 enable bit" "Disabled,Enabled"
bitfld.word 0x00 0. " RCE112 ,Receive channel 112 enable bit" "Disabled,Enabled"
endif
if (d.w(ad:0xfffb1000+0x1a)&0x0201)==0x0201
group 0x26++0x13
line.word 0x00 "RCERC,Receive channel enable register partition C"
bitfld.word 0x00 15. " RCE47 ,Receive channel 47 enable bit" "Disabled,Enabled"
bitfld.word 0x00 14. " RCE46 ,Receive channel 46 enable bit" "Disabled,Enabled"
bitfld.word 0x00 13. " RCE45 ,Receive channel 45 enable bit" "Disabled,Enabled"
bitfld.word 0x00 12. " RCE44 ,Receive channel 44 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 11. " RCE43 ,Receive channel 43 enable bit" "Disabled,Enabled"
bitfld.word 0x00 10. " RCE42 ,Receive channel 42 enable bit" "Disabled,Enabled"
bitfld.word 0x00 9. " RCE41 ,Receive channel 41 enable bit" "Disabled,Enabled"
bitfld.word 0x00 8. " RCE40 ,Receive channel 40 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 7. " RCE39 ,Receive channel 39 enable bit" "Disabled,Enabled"
bitfld.word 0x00 6. " RCE38 ,Receive channel 38 enable bit" "Disabled,Enabled"
bitfld.word 0x00 5. " RCE37 ,Receive channel 37 enable bit" "Disabled,Enabled"
bitfld.word 0x00 4. " RCE36 ,Receive channel 36 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 3. " RCE35 ,Receive channel 35 enable bit" "Disabled,Enabled"
bitfld.word 0x00 2. " RCE34 ,Receive channel 34 enable bit" "Disabled,Enabled"
bitfld.word 0x00 1. " RCE33 ,Receive channel 33 enable bit" "Disabled,Enabled"
bitfld.word 0x00 0. " RCE32 ,Receive channel 32 enable bit" "Disabled,Enabled"
line.word 0x02 "RCERD,Receive channel enable register partition D"
bitfld.word 0x02 15. " RCE63 ,Receive channel 63 enable bit" "Disabled,Enabled"
bitfld.word 0x02 14. " RCE62 ,Receive channel 62 enable bit" "Disabled,Enabled"
bitfld.word 0x02 13. " RCE61 ,Receive channel 61 enable bit" "Disabled,Enabled"
bitfld.word 0x02 12. " RCE60 ,Receive channel 60 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x02 11. " RCE59 ,Receive channel 59 enable bit" "Disabled,Enabled"
bitfld.word 0x02 10. " RCE58 ,Receive channel 58 enable bit" "Disabled,Enabled"
bitfld.word 0x02 9. " RCE57 ,Receive channel 57 enable bit" "Disabled,Enabled"
bitfld.word 0x02 8. " RCE56 ,Receive channel 56 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x02 7. " RCE55 ,Receive channel 55 enable bit" "Disabled,Enabled"
bitfld.word 0x02 6. " RCE54 ,Receive channel 54 enable bit" "Disabled,Enabled"
bitfld.word 0x02 5. " RCE53 ,Receive channel 53 enable bit" "Disabled,Enabled"
bitfld.word 0x02 4. " RCE52 ,Receive channel 52 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x02 3. " RCE51 ,Receive channel 51 enable bit" "Disabled,Enabled"
bitfld.word 0x02 2. " RCE50 ,Receive channel 50 enable bit" "Disabled,Enabled"
bitfld.word 0x02 1. " RCE49 ,Receive channel 49 enable bit" "Disabled,Enabled"
bitfld.word 0x02 0. " RCE48 ,Receive channel 48 enable bit" "Disabled,Enabled"
line.word 0x08 "RCERE,Receive channel enable register partition E"
bitfld.word 0x08 15. " RCE79 ,Receive channel 79 enable bit" "Disabled,Enabled"
bitfld.word 0x08 14. " RCE78 ,Receive channel 78 enable bit" "Disabled,Enabled"
bitfld.word 0x08 13. " RCE77 ,Receive channel 77 enable bit" "Disabled,Enabled"
bitfld.word 0x08 12. " RCE76 ,Receive channel 76 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x08 11. " RCE75 ,Receive channel 75 enable bit" "Disabled,Enabled"
bitfld.word 0x08 10. " RCE74 ,Receive channel 74 enable bit" "Disabled,Enabled"
bitfld.word 0x08 9. " RCE73 ,Receive channel 73 enable bit" "Disabled,Enabled"
bitfld.word 0x08 8. " RCE72 ,Receive channel 72 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x08 7. " RCE71 ,Receive channel 71 enable bit" "Disabled,Enabled"
bitfld.word 0x08 6. " RCE70 ,Receive channel 70 enable bit" "Disabled,Enabled"
bitfld.word 0x08 5. " RCE69 ,Receive channel 69 enable bit" "Disabled,Enabled"
bitfld.word 0x08 4. " RCE68 ,Receive channel 68 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x08 3. " RCE67 ,Receive channel 67 enable bit" "Disabled,Enabled"
bitfld.word 0x08 2. " RCE66 ,Receive channel 66 enable bit" "Disabled,Enabled"
bitfld.word 0x08 1. " RCE65 ,Receive channel 65 enable bit" "Disabled,Enabled"
bitfld.word 0x08 0. " RCE64 ,Receive channel 64 enable bit" "Disabled,Enabled"
line.word 0x0a "RCERF,Receive channel enable register partition F"
bitfld.word 0x0a 15. " RCE95 ,Receive channel 95 enable bit" "Disabled,Enabled"
bitfld.word 0x0a 14. " RCE94 ,Receive channel 94 enable bit" "Disabled,Enabled"
bitfld.word 0x0a 13. " RCE93 ,Receive channel 93 enable bit" "Disabled,Enabled"
bitfld.word 0x0a 12. " RCE92 ,Receive channel 92 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x0a 11. " RCE91 ,Receive channel 91 enable bit" "Disabled,Enabled"
bitfld.word 0x0a 10. " RCE90 ,Receive channel 90 enable bit" "Disabled,Enabled"
bitfld.word 0x0a 9. " RCE89 ,Receive channel 89 enable bit" "Disabled,Enabled"
bitfld.word 0x0a 8. " RCE88 ,Receive channel 88 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x0a 7. " RCE87 ,Receive channel 87 enable bit" "Disabled,Enabled"
bitfld.word 0x0a 6. " RCE86 ,Receive channel 86 enable bit" "Disabled,Enabled"
bitfld.word 0x0a 5. " RCE85 ,Receive channel 85 enable bit" "Disabled,Enabled"
bitfld.word 0x0a 4. " RCE84 ,Receive channel 84 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x0a 3. " RCE83 ,Receive channel 83 enable bit" "Disabled,Enabled"
bitfld.word 0x0a 2. " RCE82 ,Receive channel 82 enable bit" "Disabled,Enabled"
bitfld.word 0x0a 1. " RCE81 ,Receive channel 81 enable bit" "Disabled,Enabled"
bitfld.word 0x0a 0. " RCE80 ,Receive channel 80 enable bit" "Disabled,Enabled"
line.word 0x10 "RCERG,Receive channel enable register partition G"
bitfld.word 0x10 15. " RCE111 ,Receive channel 111 enable bit" "Disabled,Enabled"
bitfld.word 0x10 14. " RCE110 ,Receive channel 110 enable bit" "Disabled,Enabled"
bitfld.word 0x10 13. " RCE109 ,Receive channel 109 enable bit" "Disabled,Enabled"
bitfld.word 0x10 12. " RCE108 ,Receive channel 108 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x10 11. " RCE107 ,Receive channel 107 enable bit" "Disabled,Enabled"
bitfld.word 0x10 10. " RCE106 ,Receive channel 106 enable bit" "Disabled,Enabled"
bitfld.word 0x10 9. " RCE105 ,Receive channel 105 enable bit" "Disabled,Enabled"
bitfld.word 0x10 8. " RCE104 ,Receive channel 104 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x10 7. " RCE103 ,Receive channel 103 enable bit" "Disabled,Enabled"
bitfld.word 0x10 6. " RCE102 ,Receive channel 102 enable bit" "Disabled,Enabled"
bitfld.word 0x10 5. " RCE101 ,Receive channel 101 enable bit" "Disabled,Enabled"
bitfld.word 0x10 4. " RCE100 ,Receive channel 100 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x10 3. " RCE99 ,Receive channel 99 enable bit" "Disabled,Enabled"
bitfld.word 0x10 2. " RCE98 ,Receive channel 98 enable bit" "Disabled,Enabled"
bitfld.word 0x10 1. " RCE97 ,Receive channel 97 enable bit" "Disabled,Enabled"
bitfld.word 0x10 0. " RCE96 ,Receive channel 96 enable bit" "Disabled,Enabled"
line.word 0x12 "RCERH,Receive channel enable register partition H"
bitfld.word 0x12 15. " RCE127 ,Receive channel 127 enable bit" "Disabled,Enabled"
bitfld.word 0x12 14. " RCE126 ,Receive channel 126 enable bit" "Disabled,Enabled"
bitfld.word 0x12 13. " RCE125 ,Receive channel 125 enable bit" "Disabled,Enabled"
bitfld.word 0x12 12. " RCE124 ,Receive channel 124 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x12 11. " RCE123 ,Receive channel 123 enable bit" "Disabled,Enabled"
bitfld.word 0x12 10. " RCE122 ,Receive channel 122 enable bit" "Disabled,Enabled"
bitfld.word 0x12 9. " RCE121 ,Receive channel 121 enable bit" "Disabled,Enabled"
bitfld.word 0x12 8. " RCE120 ,Receive channel 120 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x12 7. " RCE119 ,Receive channel 119 enable bit" "Disabled,Enabled"
bitfld.word 0x12 6. " RCE118 ,Receive channel 118 enable bit" "Disabled,Enabled"
bitfld.word 0x12 5. " RCE117 ,Receive channel 117 enable bit" "Disabled,Enabled"
bitfld.word 0x12 4. " RCE116 ,Receive channel 116 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x12 3. " RCE115 ,Receive channel 115 enable bit" "Disabled,Enabled"
bitfld.word 0x12 2. " RCE114 ,Receive channel 114 enable bit" "Disabled,Enabled"
bitfld.word 0x12 1. " RCE113 ,Receive channel 113 enable bit" "Disabled,Enabled"
bitfld.word 0x12 0. " RCE112 ,Receive channel 112 enable bit" "Disabled,Enabled"
else
rgroup 0x26++0x13
hide.word 0x00 "RCERC,Receive channel enable register partition C"
textline " "
textline " "
textline " "
hide.word 0x02 "RCERD,Receive channel enable register partition D"
textline " "
textline " "
textline " "
hide.word 0x08 "RCERE,Receive channel enable register partition E"
textline " "
textline " "
textline " "
hide.word 0x0a "RCERF,Receive channel enable register partition F"
textline " "
textline " "
textline " "
hide.word 0x10 "RCERG,Receive channel enable register partition G"
textline " "
textline " "
textline " "
hide.word 0x12 "RCERH,Receive channel enable register partition H"
endif
tree.end
tree "Transmit channel enable registers"
width 6.
if (d.w(ad:0xfffb1000+0x18)&0x0003)==0x0000
rgroup 0x20++0x01
hide.word 0x00 "XCERA,Trasmit channel enable register partition A"
elif ((d.w(ad:0xfffb1000+0x18)&0x0200)==0x0200)||((d.w(ad:0xfffb1000+0x18)&0x0260)==0x0000)
group 0x20++0x01
line.word 0x00 "XCERA,Trasmit channel enable register partition A"
bitfld.word 0x00 15. " XCE15 ,Transmit channel 15 enable bit" "Disabled,Enabled"
bitfld.word 0x00 14. " XCE14 ,Transmit channel 14 enable bit" "Disabled,Enabled"
bitfld.word 0x00 13. " XCE13 ,Transmit channel 13 enable bit" "Disabled,Enabled"
bitfld.word 0x00 12. " XCE12 ,Transmit channel 12 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 11. " XCE11 ,Transmit channel 11 enable bit" "Disabled,Enabled"
bitfld.word 0x00 10. " XCE10 ,Transmit channel 10 enable bit" "Disabled,Enabled"
bitfld.word 0x00 9. " XCE9 ,Transmit channel 9 enable bit" "Disabled,Enabled"
bitfld.word 0x00 8. " XCE8 ,Transmit channel 8 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 7. " XCE7 ,Transmit channel 7 enable bit" "Disabled,Enabled"
bitfld.word 0x00 6. " XCE6 ,Transmit channel 6 enable bit" "Disabled,Enabled"
bitfld.word 0x00 5. " XCE5 ,Transmit channel 5 enable bit" "Disabled,Enabled"
bitfld.word 0x00 4. " XCE4 ,Transmit channel 4 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 3. " XCE3 ,Transmit channel 3 enable bit" "Disabled,Enabled"
bitfld.word 0x00 2. " XCE2 ,Transmit channel 2 enable bit" "Disabled,Enabled"
bitfld.word 0x00 1. " XCE1 ,Transmit channel 1 enable bit" "Disabled,Enabled"
bitfld.word 0x00 0. " XCE0 ,Transmit channel 0 enable bit" "Disabled,Enabled"
elif (d.w(ad:0xfffb1000+0x18)&0x0260)==0x0020
group 0x20++0x01
line.word 0x00 "XCERA,Trasmit channel enable register partition A"
bitfld.word 0x00 15. " XCE47 ,Transmit channel 47 enable bit" "Disabled,Enabled"
bitfld.word 0x00 14. " XCE46 ,Transmit channel 46 enable bit" "Disabled,Enabled"
bitfld.word 0x00 13. " XCE45 ,Transmit channel 45 enable bit" "Disabled,Enabled"
bitfld.word 0x00 12. " XCE44 ,Transmit channel 44 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 11. " XCE43 ,Transmit channel 43 enable bit" "Disabled,Enabled"
bitfld.word 0x00 10. " XCE42 ,Transmit channel 42 enable bit" "Disabled,Enabled"
bitfld.word 0x00 9. " XCE41 ,Transmit channel 41 enable bit" "Disabled,Enabled"
bitfld.word 0x00 8. " XCE40 ,Transmit channel 40 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 7. " XCE39 ,Transmit channel 39 enable bit" "Disabled,Enabled"
bitfld.word 0x00 6. " XCE38 ,Transmit channel 38 enable bit" "Disabled,Enabled"
bitfld.word 0x00 5. " XCE37 ,Transmit channel 37 enable bit" "Disabled,Enabled"
bitfld.word 0x00 4. " XCE36 ,Transmit channel 36 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 3. " XCE35 ,Transmit channel 35 enable bit" "Disabled,Enabled"
bitfld.word 0x00 2. " XCE34 ,Transmit channel 34 enable bit" "Disabled,Enabled"
bitfld.word 0x00 1. " XCE33 ,Transmit channel 33 enable bit" "Disabled,Enabled"
bitfld.word 0x00 0. " XCE32 ,Transmit channel 32 enable bit" "Disabled,Enabled"
elif (d.w(ad:0xfffb1000+0x18)&0x0260)==0x0040
group 0x20++0x01
line.word 0x00 "XCERA,Trasmit channel enable register partition A"
bitfld.word 0x00 15. " XCE79 ,Transmit channel 79 enable bit" "Disabled,Enabled"
bitfld.word 0x00 14. " XCE78 ,Transmit channel 78 enable bit" "Disabled,Enabled"
bitfld.word 0x00 13. " XCE77 ,Transmit channel 77 enable bit" "Disabled,Enabled"
bitfld.word 0x00 12. " XCE76 ,Transmit channel 76 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 11. " XCE75 ,Transmit channel 75 enable bit" "Disabled,Enabled"
bitfld.word 0x00 10. " XCE74 ,Transmit channel 74 enable bit" "Disabled,Enabled"
bitfld.word 0x00 9. " XCE73 ,Transmit channel 73 enable bit" "Disabled,Enabled"
bitfld.word 0x00 8. " XCE72 ,Transmit channel 72 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 7. " XCE71 ,Transmit channel 71 enable bit" "Disabled,Enabled"
bitfld.word 0x00 6. " XCE70 ,Transmit channel 70 enable bit" "Disabled,Enabled"
bitfld.word 0x00 5. " XCE69 ,Transmit channel 69 enable bit" "Disabled,Enabled"
bitfld.word 0x00 4. " XCE68 ,Transmit channel 68 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 3. " XCE67 ,Transmit channel 67 enable bit" "Disabled,Enabled"
bitfld.word 0x00 2. " XCE66 ,Transmit channel 66 enable bit" "Disabled,Enabled"
bitfld.word 0x00 1. " XCE65 ,Transmit channel 65 enable bit" "Disabled,Enabled"
bitfld.word 0x00 0. " XCE64 ,Transmit channel 64 enable bit" "Disabled,Enabled"
elif (d.w(ad:0xfffb1000+0x18)&0x0260)==0x0060
group 0x20++0x01
line.word 0x00 "XCERA,Trasmit channel enable register partition A"
bitfld.word 0x00 15. " XCE111 ,Transmit channel 111 enable bit" "Disabled,Enabled"
bitfld.word 0x00 14. " XCE110 ,Transmit channel 110 enable bit" "Disabled,Enabled"
bitfld.word 0x00 13. " XCE109 ,Transmit channel 109 enable bit" "Disabled,Enabled"
bitfld.word 0x00 12. " XCE108 ,Transmit channel 108 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 11. " XCE107 ,Transmit channel 107 enable bit" "Disabled,Enabled"
bitfld.word 0x00 10. " XCE106 ,Transmit channel 106 enable bit" "Disabled,Enabled"
bitfld.word 0x00 9. " XCE105 ,Transmit channel 105 enable bit" "Disabled,Enabled"
bitfld.word 0x00 8. " XCE104 ,Transmit channel 104 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 7. " XCE103 ,Transmit channel 103 enable bit" "Disabled,Enabled"
bitfld.word 0x00 6. " XCE102 ,Transmit channel 102 enable bit" "Disabled,Enabled"
bitfld.word 0x00 5. " XCE101 ,Transmit channel 101 enable bit" "Disabled,Enabled"
bitfld.word 0x00 4. " XCE100 ,Transmit channel 100 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 3. " XCE99 ,Transmit channel 99 enable bit" "Disabled,Enabled"
bitfld.word 0x00 2. " XCE98 ,Transmit channel 98 enable bit" "Disabled,Enabled"
bitfld.word 0x00 1. " XCE97 ,Transmit channel 97 enable bit" "Disabled,Enabled"
bitfld.word 0x00 0. " XCE96 ,Transmit channel 96 enable bit" "Disabled,Enabled"
endif
if (d.w(ad:0xfffb1000+0x18)&0x0003)==0x0000
rgroup 0x22++0x01
hide.word 0x00 "XCERB,Trasmit channel enable register partition B"
elif ((d.w(ad:0xfffb1000+0x18)&0x0200)==0x0200)||((d.w(ad:0xfffb1000+0x18)&0x0380)==0x0000)
group 0x22++0x01
line.word 0x00 "XCERB,Trasmit channel enable register partition B"
bitfld.word 0x00 15. " XCE31 ,Transmit channel 31 enable bit" "Disabled,Enabled"
bitfld.word 0x00 14. " XCE30 ,Transmit channel 30 enable bit" "Disabled,Enabled"
bitfld.word 0x00 13. " XCE29 ,Transmit channel 29 enable bit" "Disabled,Enabled"
bitfld.word 0x00 12. " XCE28 ,Transmit channel 28 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 11. " XCE27 ,Transmit channel 27 enable bit" "Disabled,Enabled"
bitfld.word 0x00 10. " XCE26 ,Transmit channel 26 enable bit" "Disabled,Enabled"
bitfld.word 0x00 9. " XCE25 ,Transmit channel 25 enable bit" "Disabled,Enabled"
bitfld.word 0x00 8. " XCE24 ,Transmit channel 24 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 7. " XCE23 ,Transmit channel 23 enable bit" "Disabled,Enabled"
bitfld.word 0x00 6. " XCE22 ,Transmit channel 22 enable bit" "Disabled,Enabled"
bitfld.word 0x00 5. " XCE21 ,Transmit channel 21 enable bit" "Disabled,Enabled"
bitfld.word 0x00 4. " XCE20 ,Transmit channel 20 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 3. " XCE19 ,Transmit channel 19 enable bit" "Disabled,Enabled"
bitfld.word 0x00 2. " XCE18 ,Transmit channel 18 enable bit" "Disabled,Enabled"
bitfld.word 0x00 1. " XCE17 ,Transmit channel 17 enable bit" "Disabled,Enabled"
bitfld.word 0x00 0. " XCE16 ,Transmit channel 16 enable bit" "Disabled,Enabled"
elif (d.w(ad:0xfffb1000+0x18)&0x0380)==0x0080
group 0x22++0x01
line.word 0x00 "XCERB,Trasmit channel enable register partition B"
bitfld.word 0x00 15. " XCE63 ,Transmit channel 63 enable bit" "Disabled,Enabled"
bitfld.word 0x00 14. " XCE62 ,Transmit channel 62 enable bit" "Disabled,Enabled"
bitfld.word 0x00 13. " XCE61 ,Transmit channel 61 enable bit" "Disabled,Enabled"
bitfld.word 0x00 12. " XCE60 ,Transmit channel 60 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 11. " XCE59 ,Transmit channel 59 enable bit" "Disabled,Enabled"
bitfld.word 0x00 10. " XCE58 ,Transmit channel 58 enable bit" "Disabled,Enabled"
bitfld.word 0x00 9. " XCE57 ,Transmit channel 57 enable bit" "Disabled,Enabled"
bitfld.word 0x00 8. " XCE56 ,Transmit channel 56 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 7. " XCE55 ,Transmit channel 55 enable bit" "Disabled,Enabled"
bitfld.word 0x00 6. " XCE54 ,Transmit channel 54 enable bit" "Disabled,Enabled"
bitfld.word 0x00 5. " XCE53 ,Transmit channel 53 enable bit" "Disabled,Enabled"
bitfld.word 0x00 4. " XCE52 ,Transmit channel 52 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 3. " XCE51 ,Transmit channel 51 enable bit" "Disabled,Enabled"
bitfld.word 0x00 2. " XCE50 ,Transmit channel 50 enable bit" "Disabled,Enabled"
bitfld.word 0x00 1. " XCE49 ,Transmit channel 49 enable bit" "Disabled,Enabled"
bitfld.word 0x00 0. " XCE48 ,Transmit channel 48 enable bit" "Disabled,Enabled"
elif (d.w(ad:0xfffb1000+0x18)&0x0380)==0x0100
group 0x22++0x01
line.word 0x00 "XCERB,Trasmit channel enable register partition B"
bitfld.word 0x00 15. " XCE95 ,Transmit channel 95 enable bit" "Disabled,Enabled"
bitfld.word 0x00 14. " XCE94 ,Transmit channel 94 enable bit" "Disabled,Enabled"
bitfld.word 0x00 13. " XCE93 ,Transmit channel 93 enable bit" "Disabled,Enabled"
bitfld.word 0x00 12. " XCE92 ,Transmit channel 92 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 11. " XCE91 ,Transmit channel 91 enable bit" "Disabled,Enabled"
bitfld.word 0x00 10. " XCE90 ,Transmit channel 90 enable bit" "Disabled,Enabled"
bitfld.word 0x00 9. " XCE89 ,Transmit channel 89 enable bit" "Disabled,Enabled"
bitfld.word 0x00 8. " XCE88 ,Transmit channel 88 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 7. " XCE87 ,Transmit channel 87 enable bit" "Disabled,Enabled"
bitfld.word 0x00 6. " XCE86 ,Transmit channel 86 enable bit" "Disabled,Enabled"
bitfld.word 0x00 5. " XCE85 ,Transmit channel 85 enable bit" "Disabled,Enabled"
bitfld.word 0x00 4. " XCE84 ,Transmit channel 84 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 3. " XCE83 ,Transmit channel 83 enable bit" "Disabled,Enabled"
bitfld.word 0x00 2. " XCE82 ,Transmit channel 82 enable bit" "Disabled,Enabled"
bitfld.word 0x00 1. " XCE81 ,Transmit channel 81 enable bit" "Disabled,Enabled"
bitfld.word 0x00 0. " XCE80 ,Transmit channel 80 enable bit" "Disabled,Enabled"
elif (d.w(ad:0xfffb1000+0x18)&0x0380)==0x0180
group 0x22++0x01
line.word 0x00 "XCERB,Trasmit channel enable register partition B"
bitfld.word 0x00 15. " XCE127 ,Transmit channel 127 enable bit" "Disabled,Enabled"
bitfld.word 0x00 14. " XCE126 ,Transmit channel 126 enable bit" "Disabled,Enabled"
bitfld.word 0x00 13. " XCE125 ,Transmit channel 125 enable bit" "Disabled,Enabled"
bitfld.word 0x00 12. " XCE124 ,Transmit channel 124 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 11. " XCE123 ,Transmit channel 123 enable bit" "Disabled,Enabled"
bitfld.word 0x00 10. " XCE122 ,Transmit channel 122 enable bit" "Disabled,Enabled"
bitfld.word 0x00 9. " XCE121 ,Transmit channel 121 enable bit" "Disabled,Enabled"
bitfld.word 0x00 8. " XCE120 ,Transmit channel 120 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 7. " XCE119 ,Transmit channel 119 enable bit" "Disabled,Enabled"
bitfld.word 0x00 6. " XCE118 ,Transmit channel 118 enable bit" "Disabled,Enabled"
bitfld.word 0x00 5. " XCE117 ,Transmit channel 117 enable bit" "Disabled,Enabled"
bitfld.word 0x00 4. " XCE116 ,Transmit channel 116 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 3. " XCE115 ,Transmit channel 115 enable bit" "Disabled,Enabled"
bitfld.word 0x00 2. " XCE114 ,Transmit channel 114 enable bit" "Disabled,Enabled"
bitfld.word 0x00 1. " XCE113 ,Transmit channel 113 enable bit" "Disabled,Enabled"
bitfld.word 0x00 0. " XCE112 ,Transmit channel 112 enable bit" "Disabled,Enabled"
endif
if ((d.w(ad:0xfffb1000+0x18)&0x0200)==0x0200)&&((d.w(ad:0xfffb1000+0x18)&0x0003)!=0x0000)
group 0x2a++0x13
line.word 0x00 "XCERC,Trasmit channel enable register partition C"
bitfld.word 0x00 15. " XCE47 ,Transmit channel 47 enable bit" "Disabled,Enabled"
bitfld.word 0x00 14. " XCE46 ,Transmit channel 46 enable bit" "Disabled,Enabled"
bitfld.word 0x00 13. " XCE45 ,Transmit channel 45 enable bit" "Disabled,Enabled"
bitfld.word 0x00 12. " XCE44 ,Transmit channel 44 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 11. " XCE43 ,Transmit channel 43 enable bit" "Disabled,Enabled"
bitfld.word 0x00 10. " XCE42 ,Transmit channel 42 enable bit" "Disabled,Enabled"
bitfld.word 0x00 9. " XCE41 ,Transmit channel 41 enable bit" "Disabled,Enabled"
bitfld.word 0x00 8. " XCE40 ,Transmit channel 40 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 7. " XCE39 ,Transmit channel 39 enable bit" "Disabled,Enabled"
bitfld.word 0x00 6. " XCE38 ,Transmit channel 38 enable bit" "Disabled,Enabled"
bitfld.word 0x00 5. " XCE37 ,Transmit channel 37 enable bit" "Disabled,Enabled"
bitfld.word 0x00 4. " XCE36 ,Transmit channel 36 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x00 3. " XCE35 ,Transmit channel 35 enable bit" "Disabled,Enabled"
bitfld.word 0x00 2. " XCE34 ,Transmit channel 34 enable bit" "Disabled,Enabled"
bitfld.word 0x00 1. " XCE33 ,Transmit channel 33 enable bit" "Disabled,Enabled"
bitfld.word 0x00 0. " XCE32 ,Transmit channel 32 enable bit" "Disabled,Enabled"
line.word 0x02 "XCERD,Trasmit channel enable register partition D"
bitfld.word 0x02 15. " XCE63 ,Transmit channel 63 enable bit" "Disabled,Enabled"
bitfld.word 0x02 14. " XCE62 ,Transmit channel 62 enable bit" "Disabled,Enabled"
bitfld.word 0x02 13. " XCE61 ,Transmit channel 61 enable bit" "Disabled,Enabled"
bitfld.word 0x02 12. " XCE60 ,Transmit channel 60 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x02 11. " XCE59 ,Transmit channel 59 enable bit" "Disabled,Enabled"
bitfld.word 0x02 10. " XCE58 ,Transmit channel 58 enable bit" "Disabled,Enabled"
bitfld.word 0x02 9. " XCE57 ,Transmit channel 57 enable bit" "Disabled,Enabled"
bitfld.word 0x02 8. " XCE56 ,Transmit channel 56 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x02 7. " XCE55 ,Transmit channel 55 enable bit" "Disabled,Enabled"
bitfld.word 0x02 6. " XCE54 ,Transmit channel 54 enable bit" "Disabled,Enabled"
bitfld.word 0x02 5. " XCE53 ,Transmit channel 53 enable bit" "Disabled,Enabled"
bitfld.word 0x02 4. " XCE52 ,Transmit channel 52 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x02 3. " XCE51 ,Transmit channel 51 enable bit" "Disabled,Enabled"
bitfld.word 0x02 2. " XCE50 ,Transmit channel 50 enable bit" "Disabled,Enabled"
bitfld.word 0x02 1. " XCE49 ,Transmit channel 49 enable bit" "Disabled,Enabled"
bitfld.word 0x02 0. " XCE48 ,Transmit channel 48 enable bit" "Disabled,Enabled"
line.word 0x08 "XCERE,Trasmit channel enable register partition E"
bitfld.word 0x08 15. " XCE79 ,Transmit channel 79 enable bit" "Disabled,Enabled"
bitfld.word 0x08 14. " XCE78 ,Transmit channel 78 enable bit" "Disabled,Enabled"
bitfld.word 0x08 13. " XCE77 ,Transmit channel 77 enable bit" "Disabled,Enabled"
bitfld.word 0x08 12. " XCE76 ,Transmit channel 76 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x08 11. " XCE75 ,Transmit channel 75 enable bit" "Disabled,Enabled"
bitfld.word 0x08 10. " XCE74 ,Transmit channel 74 enable bit" "Disabled,Enabled"
bitfld.word 0x08 9. " XCE73 ,Transmit channel 73 enable bit" "Disabled,Enabled"
bitfld.word 0x08 8. " XCE72 ,Transmit channel 72 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x08 7. " XCE71 ,Transmit channel 71 enable bit" "Disabled,Enabled"
bitfld.word 0x08 6. " XCE70 ,Transmit channel 70 enable bit" "Disabled,Enabled"
bitfld.word 0x08 5. " XCE69 ,Transmit channel 69 enable bit" "Disabled,Enabled"
bitfld.word 0x08 4. " XCE68 ,Transmit channel 68 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x08 3. " XCE67 ,Transmit channel 67 enable bit" "Disabled,Enabled"
bitfld.word 0x08 2. " XCE66 ,Transmit channel 66 enable bit" "Disabled,Enabled"
bitfld.word 0x08 1. " XCE65 ,Transmit channel 65 enable bit" "Disabled,Enabled"
bitfld.word 0x08 0. " XCE64 ,Transmit channel 64 enable bit" "Disabled,Enabled"
line.word 0x0a "XCERF,Trasmit channel enable register partition F"
bitfld.word 0x0a 15. " XCE95 ,Transmit channel 95 enable bit" "Disabled,Enabled"
bitfld.word 0x0a 14. " XCE94 ,Transmit channel 94 enable bit" "Disabled,Enabled"
bitfld.word 0x0a 13. " XCE93 ,Transmit channel 93 enable bit" "Disabled,Enabled"
bitfld.word 0x0a 12. " XCE92 ,Transmit channel 92 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x0a 11. " XCE91 ,Transmit channel 91 enable bit" "Disabled,Enabled"
bitfld.word 0x0a 10. " XCE90 ,Transmit channel 90 enable bit" "Disabled,Enabled"
bitfld.word 0x0a 9. " XCE89 ,Transmit channel 89 enable bit" "Disabled,Enabled"
bitfld.word 0x0a 8. " XCE88 ,Transmit channel 88 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x0a 7. " XCE87 ,Transmit channel 87 enable bit" "Disabled,Enabled"
bitfld.word 0x0a 6. " XCE86 ,Transmit channel 86 enable bit" "Disabled,Enabled"
bitfld.word 0x0a 5. " XCE85 ,Transmit channel 85 enable bit" "Disabled,Enabled"
bitfld.word 0x0a 4. " XCE84 ,Transmit channel 84 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x0a 3. " XCE83 ,Transmit channel 83 enable bit" "Disabled,Enabled"
bitfld.word 0x0a 2. " XCE82 ,Transmit channel 82 enable bit" "Disabled,Enabled"
bitfld.word 0x0a 1. " XCE81 ,Transmit channel 81 enable bit" "Disabled,Enabled"
bitfld.word 0x0a 0. " XCE80 ,Transmit channel 80 enable bit" "Disabled,Enabled"
line.word 0x10 "XCERG,Trasmit channel enable register partition G"
bitfld.word 0x10 15. " XCE111 ,Transmit channel 111 enable bit" "Disabled,Enabled"
bitfld.word 0x10 14. " XCE110 ,Transmit channel 110 enable bit" "Disabled,Enabled"
bitfld.word 0x10 13. " XCE109 ,Transmit channel 109 enable bit" "Disabled,Enabled"
bitfld.word 0x10 12. " XCE108 ,Transmit channel 108 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x10 11. " XCE107 ,Transmit channel 107 enable bit" "Disabled,Enabled"
bitfld.word 0x10 10. " XCE106 ,Transmit channel 106 enable bit" "Disabled,Enabled"
bitfld.word 0x10 9. " XCE105 ,Transmit channel 105 enable bit" "Disabled,Enabled"
bitfld.word 0x10 8. " XCE104 ,Transmit channel 104 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x10 7. " XCE103 ,Transmit channel 103 enable bit" "Disabled,Enabled"
bitfld.word 0x10 6. " XCE102 ,Transmit channel 102 enable bit" "Disabled,Enabled"
bitfld.word 0x10 5. " XCE101 ,Transmit channel 101 enable bit" "Disabled,Enabled"
bitfld.word 0x10 4. " XCE100 ,Transmit channel 100 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x10 3. " XCE99 ,Transmit channel 99 enable bit" "Disabled,Enabled"
bitfld.word 0x10 2. " XCE98 ,Transmit channel 98 enable bit" "Disabled,Enabled"
bitfld.word 0x10 1. " XCE97 ,Transmit channel 97 enable bit" "Disabled,Enabled"
bitfld.word 0x10 0. " XCE96 ,Transmit channel 96 enable bit" "Disabled,Enabled"
line.word 0x12 "XCERH,Trasmit channel enable register partition H"
bitfld.word 0x12 15. " XCE127 ,Transmit channel 127 enable bit" "Disabled,Enabled"
bitfld.word 0x12 14. " XCE126 ,Transmit channel 126 enable bit" "Disabled,Enabled"
bitfld.word 0x12 13. " XCE125 ,Transmit channel 125 enable bit" "Disabled,Enabled"
bitfld.word 0x12 12. " XCE124 ,Transmit channel 124 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x12 11. " XCE123 ,Transmit channel 123 enable bit" "Disabled,Enabled"
bitfld.word 0x12 10. " XCE122 ,Transmit channel 122 enable bit" "Disabled,Enabled"
bitfld.word 0x12 9. " XCE121 ,Transmit channel 121 enable bit" "Disabled,Enabled"
bitfld.word 0x12 8. " XCE120 ,Transmit channel 120 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x12 7. " XCE119 ,Transmit channel 119 enable bit" "Disabled,Enabled"
bitfld.word 0x12 6. " XCE118 ,Transmit channel 118 enable bit" "Disabled,Enabled"
bitfld.word 0x12 5. " XCE117 ,Transmit channel 117 enable bit" "Disabled,Enabled"
bitfld.word 0x12 4. " XCE116 ,Transmit channel 116 enable bit" "Disabled,Enabled"
textline " "
bitfld.word 0x12 3. " XCE115 ,Transmit channel 115 enable bit" "Disabled,Enabled"
bitfld.word 0x12 2. " XCE114 ,Transmit channel 114 enable bit" "Disabled,Enabled"
bitfld.word 0x12 1. " XCE113 ,Transmit channel 113 enable bit" "Disabled,Enabled"
bitfld.word 0x12 0. " XCE112 ,Transmit channel 112 enable bit" "Disabled,Enabled"
else
group 0x2a++0x13
hide.word 0x00 "XCERC,Trasmit channel enable register partition C"
textline " "
textline " "
textline " "
hide.word 0x02 "XCERD,Trasmit channel enable register partition D"
textline " "
textline " "
textline " "
hide.word 0x08 "XCERE,Trasmit channel enable register partition E"
textline " "
textline " "
textline " "
hide.word 0x0a "XCERF,Trasmit channel enable register partition F"
textline " "
textline " "
textline " "
hide.word 0x10 "XCERG,Trasmit channel enable register partition G"
textline " "
textline " "
textline " "
hide.word 0x12 "XCERH,Trasmit channel enable register partition H"
endif
tree.end
tree.end
tree "MMC/SD Registers"
width 9.
base ad:0xfffb7800
if (d.w(ad:0xfffb7800)&0x3000)==0x0000
group 0x00++0x01
line.word 0x00 "MMC_CMD,MMC command"
bitfld.word 0x00 15. " DDIR ,Data direction" "Data write,Data read"
bitfld.word 0x00 14. " SHR ,Stream command or broadcast host response" "Normal mode,Host response"
textline " "
bitfld.word 0x00 12.--13. " TYPE ,Command types" "Broadcast - no response,Broadcast with response,Addressed - no data transfer,Addressed with data transfer"
bitfld.word 0x00 11. " BUSY ,Command with busy response" "Without busy,With busy"
textline " "
bitfld.word 0x00 8.--10. " RESPONSE ,Command responses" "No response,Normal response,CID/CSD registers,OCR register,Fast I/O,Interrupt request,Published RCA response,?..."
bitfld.word 0x00 7. " INIT ,Send initialization stream" "Not sent,Sent"
textline " "
bitfld.word 0x00 6. " OD ,Card open drain mode" "Push/pull,Open drain"
bitfld.word 0x00 0.--5. " CMD_INDEX ,Command index" "CMD0,CMD1,CMD2,CMD3,CMD4,CMD5,CMD6,CMD7,CMD8,CMD9,CMD10,CMD11,CMD12,CMD13,CMD14,CMD15,CMD16,CMD17,CMD18,CMD19,CMD20,CMD21,CMD22,CMD23,CMD24,CMD25,CMD26,CMD27,CMD28,CMD29,CMD30,CMD31,CMD32,CMD33,CMD34,CMD35,CMD36,CMD37,CMD38,CMD39,CMD40,CMD41,CMD42,CMD43,CMD44,CMD45,CMD46,CMD47,CMD48,CMD49,CMD50,CMD51,CMD52,CMD53,CMD54,CMD55,CMD56,CMD57,CMD58,CMD59,CMD60,CMD61,CMD62,CMD63"
elif (d.w(ad:0xfffb7800)&0x3000)==0x3000
group 0x00++0x01
line.word 0x00 "MMC_CMD,MMC command"
bitfld.word 0x00 15. " DDIR ,Data direction" "Data write,Data read"
bitfld.word 0x00 14. " SHR ,Stream command or broadcast host response" "Normal mode,Stream mode"
textline " "
bitfld.word 0x00 12.--13. " TYPE ,Command types" "Broadcast - no response,Broadcast with response,Addressed - no data transfer,Addressed with data transfer"
bitfld.word 0x00 11. " BUSY ,Command with busy response" "Without busy,With busy"
textline " "
bitfld.word 0x00 8.--10. " RESPONSE ,Command responses" "No response,Normal response,CID/CSD registers,OCR register,Fast I/O,Interrupt request,Published RCA response,?..."
bitfld.word 0x00 7. " INIT ,Send initialization stream" "Not sent,Sent"
textline " "
bitfld.word 0x00 6. " OD ,Card open drain mode" "Push/pull,Open drain"
bitfld.word 0x00 0.--5. " CMD_INDEX ,Command index" "CMD0,CMD1,CMD2,CMD3,CMD4,CMD5,CMD6,CMD7,CMD8,CMD9,CMD10,CMD11,CMD12,CMD13,CMD14,CMD15,CMD16,CMD17,CMD18,CMD19,CMD20,CMD21,CMD22,CMD23,CMD24,CMD25,CMD26,CMD27,CMD28,CMD29,CMD30,CMD31,CMD32,CMD33,CMD34,CMD35,CMD36,CMD37,CMD38,CMD39,CMD40,CMD41,CMD42,CMD43,CMD44,CMD45,CMD46,CMD47,CMD48,CMD49,CMD50,CMD51,CMD52,CMD53,CMD54,CMD55,CMD56,CMD57,CMD58,CMD59,CMD60,CMD61,CMD62,CMD63"
else
group 0x00++0x01
line.word 0x00 "MMC_CMD,MMC command"
bitfld.word 0x00 15. " DDIR ,Data direction" "Data write,Data read"
bitfld.word 0x00 14. " SHR ,Stream command or broadcast host response" "Normal mode,?..."
textline " "
bitfld.word 0x00 12.--13. " TYPE ,Command types" "Broadcast - no response,Broadcast with response,Addressed - no data transfer,Addressed with data transfer"
bitfld.word 0x00 11. " BUSY ,Command with busy response" "Without busy,With busy"
textline " "
bitfld.word 0x00 8.--10. " RESPONSE ,Command responses" "No response,Normal response,CID/CSD registers,OCR register,Fast I/O,Interrupt request,Published RCA response,?..."
bitfld.word 0x00 7. " INIT ,Send initialization stream" "Not sent,Sent"
textline " "
bitfld.word 0x00 6. " OD ,Card open drain mode" "Push/pull,Open drain"
bitfld.word 0x00 0.--5. " CMD_INDEX ,Command index" "CMD0,CMD1,CMD2,CMD3,CMD4,CMD5,CMD6,CMD7,CMD8,CMD9,CMD10,CMD11,CMD12,CMD13,CMD14,CMD15,CMD16,CMD17,CMD18,CMD19,CMD20,CMD21,CMD22,CMD23,CMD24,CMD25,CMD26,CMD27,CMD28,CMD29,CMD30,CMD31,CMD32,CMD33,CMD34,CMD35,CMD36,CMD37,CMD38,CMD39,CMD40,CMD41,CMD42,CMD43,CMD44,CMD45,CMD46,CMD47,CMD48,CMD49,CMD50,CMD51,CMD52,CMD53,CMD54,CMD55,CMD56,CMD57,CMD58,CMD59,CMD60,CMD61,CMD62,CMD63"
endif
group 0x04++0x35
line.word 0x00 "MMC_ARGL,MMC argument low"
line.word 0x04 "MMC_ARGH,MMC argument high"
line.word 0x08 "MMC_CON,MMC system configuration"
bitfld.word 0x08 15. " DW ,Data bus width" "1 bit,4 bits"
bitfld.word 0x08 12.--13. " MODE ,Operating mode select" "MMC/SD mode,SPI mode 1,SYSTEST mode,SPI mode 2"
textline " "
bitfld.word 0x08 11. " POWER_UP ,Power-up control" "Power-down,Power-up"
hexmask.word.byte 0x08 0.--7. 1. " CLK_DIV ,Clock divider"
line.word 0x0c "MMC_STAT,MMC status"
eventfld.word 0x0c 14. " CARD_ERR ,Card status error in response" "No error,Error"
eventfld.word 0x0c 13. " CARD_IRQ ,Card IRQ received" "Idle,IRQ exit"
textline " "
eventfld.word 0x0c 12. " OCR_BUSY ,OCR busy" "Not busy,Busy"
eventfld.word 0x0c 11. " A_EMPTY ,Buffer almost empty" "Not empty,Almost empty"
textline " "
eventfld.word 0x0c 10. " A_FULL ,Buffer almost full" "Not full,Almost full"
eventfld.word 0x0c 8. " CMD_CRC ,Command CRC error" "No error,Error"
textline " "
eventfld.word 0x0c 7. " CMD_TIMEOUT ,Command response time-out" "No time-out,Time-out"
eventfld.word 0x0c 6. " DATA_CRC ,Data CRC error" "No error,Error"
textline " "
eventfld.word 0x0c 5. " DATA_TIMEOUT ,Data response time-out" "No time-out,Time-out"
eventfld.word 0x0c 4. " EOF_BUSY ,Card exit busy state" "No exit,Exit"
textline " "
eventfld.word 0x0c 3. " BLOCK_RS ,Block received/sent" "Not received/sent,Received/Sent"
eventfld.word 0x0c 2. " CARD_BUSY ,Card enter busy state" "No enter,Enter"
textline " "
eventfld.word 0x0c 0. " END_OF_CMD ,End of command phase" "No end,End"
line.word 0x10 "MMC_IE,MMC system interrupt enable"
bitfld.word 0x10 14. " CARD_ERRIE ,Card status error interrupt enable" "Disabled,Enabled"
bitfld.word 0x10 13. " CARD_IRQ_IE ,Card IRQ interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x10 12. " OCR_BUSY_IE ,OCR busy interrupt enable" "Disabled,Enabled"
bitfld.word 0x10 11. " A_EMPTY_IE ,Buffer almost empty interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x10 10. " A_FULL_IE ,Buffer almost full interrupt enable" "Disabled,Enabled"
bitfld.word 0x10 8. " CMD_CRC_IE ,Command CRC error interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x10 7. " CMD_TIMEOUT_IE ,Command response time-out interrupt enable" "Disabled,Enabled"
bitfld.word 0x10 6. " DATA_CRC_IE ,Data CRC error interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x10 5. " DATA_TIMEOUT_IE ,Data response time-out interrupt enable" "Disabled,Enabled"
bitfld.word 0x10 4. " EOF_BUSY_IE ,Card exit busy state interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x10 3. " BLOCK_RS_IE ,Block received/sent interrupt enable" "Disabled,Enabled"
bitfld.word 0x10 2. " CARD_BUSY_IE ,Card enter busy state interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x10 0. " END_OF_CMD_IE ,End of command interrupt enable" "Disabled,Enabled"
line.word 0x14 "MMC_CTO,MMC command time-out"
hexmask.word.byte 0x14 0.--7. 1. " CTO ,MMC command time-out value"
line.word 0x18 "MMC_DTO,MMC data time-out"
line.word 0x1c "MMC_DATA,MMC TX/RX FIFO data"
line.word 0x20 "MMC_BLEN,MMC block length"
hexmask.word 0x20 0.--10. 1. 1. " BLEN ,Block length value"
line.word 0x24 "MMC_NBLK,MMC number of blocks"
hexmask.word 0x24 0.--10. 1. 1. " NBLK ,Number of blocks value"
line.word 0x28 "MMC_BUF,MMC buffer configuration"
bitfld.word 0x28 15. " RX_DMA_EN ,Receive DMA channel enable" "Disabled,Enabled"
bitfld.word 0x28 8.--12. " AF_LEVEL ,Buffer almost full level" "1 word,2 word,3 word,4 word,5 word,6 word,7 word,8 word,9 word,10 word,11 word,12 word,13 word,14 word,15 word,16 word,17 word,18 word,19 word,20 word,21 word,22 word,23 word,24 word,25 word,26 word,27 word,28 word,29 word,30 word,31 word,32 word"
textline " "
bitfld.word 0x28 7. " TX_DMA_EN ,Transmit DMA channel enable" "Disabled,Enabled"
bitfld.word 0x28 0.--4. " AE_LEVEL ,Buffer almost empty level" "0 word,1 word,2 word,3 word,4 word,5 word,6 word,7 word,8 word,9 word,10 word,11 word,12 word,13 word,14 word,15 word,16 word,17 word,18 word,19 word,20 word,21 word,22 word,23 word,24 word,25 word,26 word,27 word,28 word,29 word,30 word,31 word"
line.word 0x2c "MMC_SPI,MMC serial port interface"
bitfld.word 0x2c 15. " START ,Start SPI transfer" "Not started,Started"
bitfld.word 0x2c 14. " WNR ,Write/not read" "DEC on byte RX,DEC on byte TX"
textline " "
bitfld.word 0x2c 10.--11. " TCSH ,Chip-select hold time control" "Min. 0.5 cycle,Min. 1.5 cycles,Min. 2.5 cycles,Min. 3.5 cycles"
bitfld.word 0x2c 8.--9. " TCSS ,Chip-select setup time control" "Min. 1 cycle,Min. 2 cycles,Min. 3 cycles,Min. 4 cycles"
textline " "
bitfld.word 0x2c 4.--5. " CS ,Chip-select control" "Reserved,C/S 1,C/S 2,C/S 3"
bitfld.word 0x2c 3. " CSM ,Chip-select mode" "Automatic,Manual"
textline " "
bitfld.word 0x2c 2. " CSD ,Chip-select disable" "Enabled,Disabled"
bitfld.word 0x2c 1. " PHA ,Phase control" "Phase 0,Phase 1"
textline " "
bitfld.word 0x2c 0. " POL ,Polarity control" "Rising edge,Falling edge"
line.word 0x30 "MMC_SDIO,MMC SDIO mode configuration"
bitfld.word 0x30 13. " CER1_3_EN ,Card status error on bit 3 of response 1 enable" "Disabled,Enabled"
bitfld.word 0x30 5. " DTO_PS_EN ,Data time-out prescaler enable" "Disabled,Enabled"
line.word 0x34 "MMC_SYST,MMC system test"
bitfld.word 0x34 13. " RDY_DAT ,Read/busy input signal data value" "Low,High"
bitfld.word 0x34 12. " DAT_DIR ,DAT[3:0] signals direction" "Input,Output"
textline " "
bitfld.word 0x34 11. " DAT3_DAT ,DAT3 input/output signal data value" "Low,High"
bitfld.word 0x34 10. " DAT2_DAT ,DAT2 input/output signal data value" "Low,High"
textline " "
bitfld.word 0x34 9. " DAT1_DAT ,DAT1 input/output signal data value" "Low,High"
bitfld.word 0x34 8. " DAT0_DAT ,DAT0 input/output signal data value" "Low,High"
textline " "
bitfld.word 0x34 7. " CMD_DIR ,CMD/SO signal direction" "Input,Output"
bitfld.word 0x34 6. " CMD_DAT ,CMD/SO input/output signal data value" "Low,High"
textline " "
bitfld.word 0x34 5. " MMC_CK_DAT ,MMC clock output signal data value" "Low,High"
bitfld.word 0x34 4. " SPI_CK_DAT ,SPI clock output signal data value" "Low,High"
textline " "
bitfld.word 0x34 3. " CS3_DAT ,C/S3 output signal data value" "Low,High"
bitfld.word 0x34 2. " CS2_DAT ,C/S2 output signal data value" "Low,High"
textline " "
bitfld.word 0x34 1. " CS1_DAT ,C/S1 output signal data value" "Low,High"
rgroup 0x3c++0x21
line.word 0x00 "MMC_REV,MMC module revision"
hexmask.word.byte 0x00 0.--7. 1. " REV ,Module revision number"
line.word 0x04 "MMC_RSP0,MMC command response 0"
hexmask.word.word 0x04 0.--15. 1. " RESP0 ,CMD response (R2[15:0])"
line.word 0x08 "MMC_RSP1,MMC command response 1"
hexmask.word.word 0x08 0.--15. 1. " RESP1 ,CMD response (R2[31:16])"
line.word 0x0c "MMC_RSP2,MMC command response 2"
hexmask.word.word 0x0C 0.--15. 1. " RESP2 ,CMD response (R2[47:32])"
line.word 0x10 "MMC_RSP3,MMC command response 3"
hexmask.word.word 0x10 0.--15. 1. " RESP3 ,CMD response (R2[63:48])"
line.word 0x14 "MMC_RSP4,MMC command response 4"
hexmask.word.word 0x14 0.--15. 1. " RESP4 ,CMD response (R2[79:64])"
line.word 0x18 "MMC_RSP5,MMC command response 5"
hexmask.word.word 0x18 0.--15. 1. " RESP5 ,CMD response (R2[95:80])"
line.word 0x1c "MMC_RSP6,MMC command response 6"
hexmask.word.word 0x1C 0.--15. 1. " RESP6 ,CMD response (R2[111:96], R1/R1b/R3/R4/R5/R6[23:8])"
line.word 0x20 "MMC_RSP7,MMC command response 7"
hexmask.word.word 0x20 0.--15. 1. " RESP7 ,CMD response (R2[127:112], R1/R1b/R3/R4/R5/R6[39:24])"
tree.end
tree "Real-Time Clock Registers"
width 19.
base ad:0xfffb4800
if (d.b(ad:0xfffb4800)&0x60)==0x60
group 0x00++0x00
line.byte 0x00 "SECOND_REG,Seconds"
bitfld.byte 0x00 4.--6. " SEC ,2nd digit of seconds" "0,1,2,3,4,5,X,X"
bitfld.byte 0x00 0.--3. " ,1st digit of seconds" "X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X"
else
group 0x00++0x00
line.byte 0x00 "SECOND_REG,Seconds"
bitfld.byte 0x00 4.--6. " SEC ,2nd digit of seconds" "0,1,2,3,4,5,X,X"
bitfld.byte 0x00 0.--3. " ,1st digit of seconds" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
endif
if (d.b(ad:0xfffb4804)&0x60)==0x60
group 0x04++0x00
line.byte 0x00 "MINUTES_REG,Minutes"
bitfld.byte 0x00 4.--6. " MIN ,2nd digit of minutes" "0,1,2,3,4,5,X,X"
bitfld.byte 0x00 0.--3. " ,1st digit of minutes" "X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X"
else
group 0x04++0x00
line.byte 0x00 "MINUTES_REG,Minutes"
bitfld.byte 0x00 4.--6. " MIN ,2nd digit of minutes" "0,1,2,3,4,5,X,X"
bitfld.byte 0x00 0.--3. " ,1st digit of minutes" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
endif
if ((d.b(ad:0xfffb4840)&0x08)==0x00)&&((d.b(ad:0xfffb4808)&0x30)==0x30)
group 0x08++0x00
line.byte 0x00 "HOURS_REG,Hours"
bitfld.byte 0x00 4.--5. " HOUR ,2nd digit of hours" "0,1,2,X"
bitfld.byte 0x00 0.--3. " ,1st digit of hours" "X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X"
elif ((d.b(ad:0xfffb4840)&0x08)==0x00)&&((d.b(ad:0xfffb4808)&0x30)==0x20)
group 0x08++0x00
line.byte 0x00 "HOURS_REG,Hours"
bitfld.byte 0x00 4.--5. " HOUR ,2nd digit of hours" "0,1,2,X"
bitfld.byte 0x00 0.--3. " ,1st digit of hours" "0,1,2,3,X,X,X,X,X,X,X,X,X,X,X,X"
elif (d.b(ad:0xfffb4840)&0x08)==0x00
group 0x08++0x00
line.byte 0x00 "HOURS_REG,Hours"
bitfld.byte 0x00 4.--5. " HOUR ,2nd digit of hours" "0,1,2,X"
bitfld.byte 0x00 0.--3. " ,1st digit of hours" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
elif (d.b(ad:0xfffb4808)&0x20)==0x20
group 0x08++0x00
line.byte 0x00 "HOURS_REG,Hours"
bitfld.byte 0x00 4.--5. " HOUR ,2nd digit of hours" "0,1,X,X"
bitfld.byte 0x00 0.--3. " ,1st digit of hours" "X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X"
bitfld.byte 0x00 7. " ," "AM,PM"
elif (d.b(ad:0xfffb4808)&0x10)==0x10
group 0x08++0x00
line.byte 0x00 "HOURS_REG,Hours"
bitfld.byte 0x00 4.--5. " HOUR ,2nd digit of hours" "0,1,X,X"
bitfld.byte 0x00 0.--3. " ,1st digit of hours" "0,1,X,X,X,X,X,X,X,X,X,X,X,X,X,X"
bitfld.byte 0x00 7. " ," "AM,PM"
else
group 0x08++0x00
line.byte 0x00 "HOURS_REG,Hours"
bitfld.byte 0x00 4.--5. " HOUR ,2nd digit of hours" "0,1,X,X"
bitfld.byte 0x00 0.--3. " ,1st digit of hours" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
bitfld.byte 0x00 7. " ," "AM,PM"
endif
if (d.b(ad:0xfffb480c)&0x30)==0x30
group 0x0c++0x00
line.byte 0x00 "DAYS_REG,Days"
bitfld.byte 0x00 4.--5. " DAY ,2nd digit of days" "0,1,2,3"
bitfld.byte 0x00 0.--3. " ,1st digit of days" "0,1,X,X,X,X,X,X,X,X,X,X,X,X,X,X"
else
group 0x0c++0x00
line.byte 0x00 "DAYS_REG,Days"
bitfld.byte 0x00 4.--5. " DAY ,2nd digit of days" "0,1,2,3"
bitfld.byte 0x00 0.--3. " ,1st digit of days" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
endif
if (d.b(ad:0xfffb4810)&0x10)==0x10
group 0x10++0x00
line.byte 0x00 "MONTHS_REG,Months"
bitfld.byte 0x00 4. " MONTH ,2nd digit of months" "0,1"
bitfld.byte 0x00 0.--3. " ,1st digit of months" "0,1,2,X,X,X,X,X,X,X,X,X,X,X,X,X"
else
group 0x10++0x00
line.byte 0x00 "MONTHS_REG,Months"
bitfld.byte 0x00 4. " MONTH ,2nd digit of months" "0,1"
bitfld.byte 0x00 0.--3. " ,1st digit of months" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
endif
if ((d.b(ad:0xfffb4814)&0xe0)==0xa0)||((d.b(ad:0xfffb4814)&0xc0)==0xc0)
group 0x14++0x00
line.byte 0x00 "YERS_REG,Years"
bitfld.byte 0x00 4.--7. " YEAR ,2nd digit of years" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
bitfld.byte 0x00 0.--3. " ,1st digit of years" "X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X"
else
group 0x14++0x00
line.byte 0x00 "YERS_REG,Years"
bitfld.byte 0x00 4.--7. " YEAR ,2nd digit of years" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
bitfld.byte 0x00 0.--3. " ,1st digit of years" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
endif
group 0x18++0x00
line.byte 0x00 "WEEK_REG,Weeks"
bitfld.byte 0x00 0.--2. " WEEK ,1st digit of days in a week" "0,1,2,3,4,5,6,X"
if (d.b(ad:0xfffb4820)&0x60)==0x60
group 0x20++0x00
line.byte 0x00 "ALARM_SECONDS_REG,Alarm seconds"
bitfld.byte 0x00 4.--6. " ALARM_SEC ,2nd digit of seconds" "0,1,2,3,4,5,X,X"
bitfld.byte 0x00 0.--3. " ,1st digit of seconds" "X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X"
else
group 0x20++0x00
line.byte 0x00 "ALARM_SECONDS_REG,Alarm seconds"
bitfld.byte 0x00 4.--6. " ALARM_SEC ,2nd digit of seconds" "0,1,2,3,4,5,X,X"
bitfld.byte 0x00 0.--3. " ,1st digit of seconds" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
endif
if (d.b(ad:0xfffb4824)&0x60)==0x60
group 0x24++0x00
line.byte 0x00 "ALARM_MINUTES_REG,Alarm minutes"
bitfld.byte 0x00 4.--6. " ALARM_MIN ,2nd digit of minutes" "0,1,2,3,4,5,X,X"
bitfld.byte 0x00 0.--3. " ,1st digit of minutes" "X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X"
else
group 0x24++0x00
line.byte 0x00 "ALARM_MINUTES_REG,Alarm minutes"
bitfld.byte 0x00 4.--6. " ALARM_MIN ,2nd digit of minutes" "0,1,2,3,4,5,X,X"
bitfld.byte 0x00 0.--3. " ,1st digit of minutes" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
endif
if ((d.b(ad:0xfffb4840)&0x08)==0x00)&&((d.b(ad:0xfffb4828)&0x30)==0x30)
group 0x28++0x00
line.byte 0x00 "ALARM_HOURS_REG,Hours"
bitfld.byte 0x00 4.--5. " ALARM_HOUR ,2nd digit of hours" "0,1,2,X"
bitfld.byte 0x00 0.--3. " ,1st digit of hours" "X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X"
elif ((d.b(ad:0xfffb4840)&0x08)==0x00)&&((d.b(ad:0xfffb4828)&0x30)==0x20)
group 0x28++0x00
line.byte 0x00 "ALARM_HOURS_REG,Hours"
bitfld.byte 0x00 4.--5. " ALARM_HOUR ,2nd digit of hours" "0,1,2,X"
bitfld.byte 0x00 0.--3. " ,1st digit of hours" "0,1,2,3,X,X,X,X,X,X,X,X,X,X,X,X"
elif (d.b(ad:0xfffb4840)&0x08)==0x00
group 0x28++0x00
line.byte 0x00 "ALARM_HOURS_REG,Hours"
bitfld.byte 0x00 4.--5. " ALARM_HOUR ,2nd digit of hours" "0,1,2,X"
bitfld.byte 0x00 0.--3. " ,1st digit of hours" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
elif (d.b(ad:0xfffb4828)&0x20)==0x20
group 0x28++0x00
line.byte 0x00 "ALARM_HOURS_REG,Hours"
bitfld.byte 0x00 4.--5. " ALARM_HOUR ,2nd digit of hours" "0,1,X,X"
bitfld.byte 0x00 0.--3. " ,1st digit of hours" "X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X"
bitfld.byte 0x00 7. " ," "AM,PM"
elif (d.b(ad:0xfffb4828)&0x10)==0x10
group 0x28++0x00
line.byte 0x00 "ALARM_HOURS_REG,Hours"
bitfld.byte 0x00 4.--5. " ALARM_HOUR ,2nd digit of hours" "0,1,X,X"
bitfld.byte 0x00 0.--3. " ,1st digit of hours" "0,1,X,X,X,X,X,X,X,X,X,X,X,X,X,X"
bitfld.byte 0x00 7. " ," "AM,PM"
else
group 0x28++0x00
line.byte 0x00 "ALARM_HOURS_REG,Hours"
bitfld.byte 0x00 4.--5. " ALARM_HOUR ,2nd digit of hours" "0,1,X,X"
bitfld.byte 0x00 0.--3. " ,1st digit of hours" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
bitfld.byte 0x00 7. " ," "AM,PM"
endif
if (d.b(ad:0xfffb482c)&0x30)==0x30
group 0x2c++0x00
line.byte 0x00 "ALARM_DAYS_REG,Alarm days"
bitfld.byte 0x00 4.--5. " ALARM_DAY ,2nd digit of days" "0,1,2,3"
bitfld.byte 0x00 0.--3. " ,1st digit of days" "0,1,X,X,X,X,X,X,X,X,X,X,X,X,X,X"
else
group 0x2c++0x00
line.byte 0x00 "ALARM_DAYS_REG,Alarm days"
bitfld.byte 0x00 4.--5. " ALARM_DAY ,2nd digit of days" "0,1,2,3"
bitfld.byte 0x00 0.--3. " ,1st digit of days" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
endif
if (d.b(ad:0xfffb4830)&0x10)==0x10
group 0x30++0x00
line.byte 0x00 "ALARM_MONTHS_REG,Alarm months"
bitfld.byte 0x00 4. " ALARM_MONTH ,2nd digit of months" "0,1"
bitfld.byte 0x00 0.--3. " ,1st digit of months" "0,1,2,X,X,X,X,X,X,X,X,X,X,X,X,X"
else
group 0x30++0x00
line.byte 0x00 "ALARM_MONTHS_REG,Alarm months"
bitfld.byte 0x00 4. " ALARM_MONTH ,2nd digit of months" "0,1"
bitfld.byte 0x00 0.--3. " ,1st digit of months" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
endif
if ((d.b(ad:0xfffb4834)&0xe0)==0xa0)||((d.b(ad:0xfffb4834)&0xc0)==0xc0)
group 0x34++0x00
line.byte 0x00 "ALARM_YEARS_REG,Alarm years"
bitfld.byte 0x00 4.--7. " ALARM_YEAR ,2nd digit of years" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
bitfld.byte 0x00 0.--3. " ,1st digit of years" "X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X"
else
group 0x34++0x00
line.byte 0x00 "ALARM_YEARS_REG,Alarm years"
bitfld.byte 0x00 4.--7. " ALARM_YEAR ,2nd digit of years" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
bitfld.byte 0x00 0.--3. " ,1st digit of years" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
endif
group 0x40++0x10
line.byte 0x00 "RTC_CTRL_REG,RTC control"
bitfld.byte 0x00 6. " RTC_DISABLE ," "Enabled,Disabled"
bitfld.byte 0x00 5. " SET_32_COUNTER ,Sets the 32-kHz counter with COMP_REG (14:0) value" "Not set,Set"
bitfld.byte 0x00 4. " TEST_MODE ," "Functional,Test"
textline " "
bitfld.byte 0x00 3. " MODE_12_24 ," "24-hour,12-hour"
bitfld.byte 0x00 2. " AUTO_COMP ,Autocompensation enable" "Disabled,Enabled"
bitfld.byte 0x00 1. " ROUND_30S ,Rounding enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 0. " STOP_RTC ," "Frozen,Running"
line.byte 0x04 "RTC_STATUS_REG,RTC status"
eventfld.byte 0x04 7. " POWER_UP ,Indicates that a reset occured" "No reset,Reset"
bitfld.byte 0x04 6. " ALARM ,Indicates that an alarm interrupt has been generated" "No interrupt,Interrupt"
bitfld.byte 0x04 5. " 1D_EVENT ,One day has occured" "No event,Event"
textline " "
bitfld.byte 0x04 4. " 1H_EVENT ,One hour has occured" "No event,Event"
bitfld.byte 0x04 3. " 1M_EVENT ,One minute has occured" "No event,Event"
bitfld.byte 0x04 2. " 1S_EVENT ,One second has occured" "No event,Event"
textline " "
bitfld.byte 0x04 1. " RUN ," "Frozen,Running"
bitfld.byte 0x04 0. " BUSY ,Updating event" "Not busy,Busy"
line.byte 0x08 "RTC_INTERRUPTS_REG,RTC interrupts"
bitfld.byte 0x08 3. " IT_ALARM ,Enable one interrupt when the alarm value is reached" "Disabled,Enabled"
bitfld.byte 0x08 2. " IT_TIMER ,Enable periodic interrupt" "Disabled,Enabled"
bitfld.byte 0x08 0.--1. " EVERY ,Interrupt period" "Second,Minute,Hour,Day"
line.byte 0x0c "RTC_COMP_LSB_REG,RTC compensation LSB"
line.byte 0x10 "RTC_COMP_MSB_REG,RTC compensation MSB"
tree.end
tree "HDQ and 1-Wire Protocols Registers"
width 7.
base ad:0xfffbc000
group 0x00++0x03
line.long 0x00 "TXWD,TX write data"
hexmask.long.byte 0x00 0.--7. 1. " WD ,Write data"
rgroup 0x04++0x03
line.long 0x00 "RXRB,RX receive buffer"
hexmask.long.byte 0x00 0.--7. 1. " NRC ,Next received character"
if (d.l(ad:0xfffbc008)&0x01)==0x00
group 0x08++0x03
line.long 0x00 "CTRSTS,Control and status"
bitfld.long 0x00 6. " IM ,Interrupt mask" "Disabled,Enabled"
bitfld.long 0x00 5. " PD ,Power-down mode" "Disabled,Enabled"
textline " "
bitfld.long 0x00 4. " GB ,Go bit" "No action,Send commands"
bitfld.long 0x00 2. " IP ,Initialization pulse" "No pulse,Pulse"
bitfld.long 0x00 1. " RW ,R/W bit" "Write,Read"
bitfld.long 0x00 0. " MODE ,Mode" "HDQ,1-Wire"
else
group 0x08++0x03
line.long 0x00 "CTRSTS,Control and status"
bitfld.long 0x00 7. " SB1W ,Single-bit mode for 1-Wire" "Not single,Single"
bitfld.long 0x00 6. " IM ,Interrupt mask" "Disabled,Enabled"
bitfld.long 0x00 5. " PD ,Power-down mode" "Disabled,Enabled"
bitfld.long 0x00 4. " GB ,Go bit" "No action,Send commands"
textline " "
bitfld.long 0x00 3. " PDR ,Presence detect received" "Not detected,Detected"
bitfld.long 0x00 2. " IP ,Initialization pulse" "No pulse,Pulse"
bitfld.long 0x00 1. " RW ,R/W bit" "Write,Read"
bitfld.long 0x00 0. " MODE ,Mode" "HDQ,1-Wire"
endif
group 0x0c++0x03
hide.long 0x00 "IS,Interrupt status"
textfld " "
in
tree.end
tree "Frame Adjustment Counter Registers"
width 10.
base ad:0xfffba800
group 0x00++0x01
line.word 0x00 "FARC,Frame adjustment reference count"
rgroup 0x04++0x01
line.word 0x00 "FSC,Frame start count"
group 0x08++0x01
line.word 0x00 "CTRL,Control and configuration"
bitfld.word 0x00 2. " INT_ENABLE ,Generate interrupt when FSC is updated" "Disabled,Enabled"
bitfld.word 0x00 1. " RUN ,Enables operation of the counter" "Disabled,Enabled"
bitfld.word 0x00 0. " CNT ,Continuous mode" "Halt mode,Continuous mode"
rgroup 0x0c++0x09
line.word 0x00 "STATUS,Status"
bitfld.word 0x00 0. " FSC_FULL ,FSC updated" "Read/Disabled,Updated"
line.word 0x04 "SYNC_CNT,Frame synchronization counter"
line.word 0x08 "START_CNT,Frame start counter"
tree.end
tree.end
tree "MPU/DSP Shared Peripherals"
tree "Interprocessor Communication"
width 14.
base ad:0xfffcf000
group 0x00++0x05
line.word 0x00 "ARM2DSP1,"
line.word 0x04 "ARM2DSP1b,"
group 0x24++0x05
line.word 0x00 "ARM2DSP2,"
line.word 0x04 "ARM2DSP2b,"
rgroup 0x08++0x0d
line.word 0x00 "DSP2ARM1,"
line.word 0x04 "DSP2ARM1b,"
line.word 0x08 "DSP2ARM2,"
line.word 0x0c "DSP2ARM2b,"
rgroup 0x18++0x01
line.word 0x00 "ARM2DSP1_Flag,"
bitfld.word 0x00 0. " Flag ,ARM2DSP1 interrupt has been generated" "No interrupt,Interrupt"
rgroup 0x2c++0x01
line.word 0x00 "ARM2DSP2_Flag,"
bitfld.word 0x00 0. " Flag ,ARM2DSP2 interrupt has been generated" "No interrupt,Interrupt"
tree.end
tree "General-Purpose I/O"
width 22.
base ad:0xfffce000
rgroup 0x00++0x01
line.word 0x00 "DATA_INPUT_REG,Data input register"
bitfld.word 0x00 15. " RD15 ,Receive data bit 15" "Low,High"
bitfld.word 0x00 14. " RD14 ,Receive data bit 14" "Low,High"
bitfld.word 0x00 13. " RD13 ,Receive data bit 13" "Low,High"
textline " "
bitfld.word 0x00 12. " RD12 ,Receive data bit 12" "Low,High"
bitfld.word 0x00 11. " RD11 ,Receive data bit 11" "Low,High"
bitfld.word 0x00 10. " RD10 ,Receive data bit 10" "Low,High"
textline " "
bitfld.word 0x00 9. " RD9 ,Receive data bit 9" "Low,High"
bitfld.word 0x00 8. " RD8 ,Receive data bit 8" "Low,High"
bitfld.word 0x00 7. " RD7 ,Receive data bit 7" "Low,High"
textline " "
bitfld.word 0x00 6. " RD6 ,Receive data bit 6" "Low,High"
bitfld.word 0x00 5. " RD5 ,Receive data bit 5" "Low,High"
bitfld.word 0x00 4. " RD4 ,Receive data bit 4" "Low,High"
textline " "
bitfld.word 0x00 3. " RD3 ,Receive data bit 3" "Low,High"
bitfld.word 0x00 2. " RD2 ,Receive data bit 2" "Low,High"
bitfld.word 0x00 1. " RD1 ,Receive data bit 1" "Low,High"
textline " "
bitfld.word 0x00 0. " RD0 ,Receive data bit 0" "Low,High"
group 0x04++0x15
line.word 0x00 "DATA_OUTPUT_REG,Data output register"
bitfld.word 0x00 15. " DT15 ,Data to transmit bit 15" "Low,High"
bitfld.word 0x00 14. " DT14 ,Data to transmit bit 14" "Low,High"
bitfld.word 0x00 13. " DT13 ,Data to transmit bit 13" "Low,High"
textline " "
bitfld.word 0x00 12. " DT12 ,Data to transmit bit 12" "Low,High"
bitfld.word 0x00 11. " DT11 ,Data to transmit bit 11" "Low,High"
bitfld.word 0x00 10. " DT10 ,Data to transmit bit 10" "Low,High"
textline " "
bitfld.word 0x00 9. " DT9 ,Data to transmit bit 9" "Low,High"
bitfld.word 0x00 8. " DT8 ,Data to transmit bit 8" "Low,High"
bitfld.word 0x00 7. " DT7 ,Data to transmit bit 7" "Low,High"
textline " "
bitfld.word 0x00 6. " DT6 ,Data to transmit bit 6" "Low,High"
bitfld.word 0x00 5. " DT5 ,Data to transmit bit 5" "Low,High"
bitfld.word 0x00 4. " DT4 ,Data to transmit bit 4" "Low,High"
textline " "
bitfld.word 0x00 3. " DT3 ,Data to transmit bit 3" "Low,High"
bitfld.word 0x00 2. " DT2 ,Data to transmit bit 2" "Low,High"
bitfld.word 0x00 1. " DT1 ,Data to transmit bit 1" "Low,High"
textline " "
bitfld.word 0x00 0. " DT0 ,Data to transmit bit 0" "Low,High"
line.word 0x04 "DIRECTION_CONTROL_REG,Direction control register"
bitfld.word 0x04 15. " DIR15 ,Direction bit 15" "Output,Input"
bitfld.word 0x04 14. " DIR14 ,Direction bit 14" "Output,Input"
bitfld.word 0x04 13. " DIR13 ,Direction bit 13" "Output,Input"
textline " "
bitfld.word 0x04 12. " DIR12 ,Direction bit 12" "Output,Input"
bitfld.word 0x04 11. " DIR11 ,Direction bit 11" "Output,Input"
bitfld.word 0x04 10. " DIR10 ,Direction bit 10" "Output,Input"
textline " "
bitfld.word 0x04 9. " DIR9 ,Direction bit 9" "Output,Input"
bitfld.word 0x04 8. " DIR8 ,Direction bit 8" "Output,Input"
bitfld.word 0x04 7. " DIR7 ,Direction bit 7" "Output,Input"
textline " "
bitfld.word 0x04 6. " DIR6 ,Direction bit 6" "Output,Input"
bitfld.word 0x04 5. " DIR5 ,Direction bit 5" "Output,Input"
bitfld.word 0x04 4. " DIR4 ,Direction bit 4" "Output,Input"
textline " "
bitfld.word 0x04 3. " DIR3 ,Direction bit 3" "Output,Input"
bitfld.word 0x04 2. " DIR2 ,Direction bit 2" "Output,Input"
bitfld.word 0x04 1. " DIR1 ,Direction bit 1" "Output,Input"
textline " "
bitfld.word 0x04 0. " DIR0 ,Direction bit 0" "Output,Input"
line.word 0x08 "INTERRUPT_CONTROL_REG,Interrupt control register"
bitfld.word 0x08 15. " IC15 ,Select transition bit 15" "Falling,Rising"
bitfld.word 0x08 14. " IC14 ,Select transition bit 14" "Falling,Rising"
bitfld.word 0x08 13. " IC13 ,Select transition bit 13" "Falling,Rising"
textline " "
bitfld.word 0x08 12. " IC12 ,Select transition bit 12" "Falling,Rising"
bitfld.word 0x08 11. " IC11 ,Select transition bit 11" "Falling,Rising"
bitfld.word 0x08 10. " IC10 ,Select transition bit 10" "Falling,Rising"
textline " "
bitfld.word 0x08 9. " IC9 ,Select transition bit 9" "Falling,Rising"
bitfld.word 0x08 8. " IC8 ,Select transition bit 8" "Falling,Rising"
bitfld.word 0x08 7. " IC7 ,Select transition bit 7" "Falling,Rising"
textline " "
bitfld.word 0x08 6. " IC6 ,Select transition bit 6" "Falling,Rising"
bitfld.word 0x08 5. " IC5 ,Select transition bit 5" "Falling,Rising"
bitfld.word 0x08 4. " IC4 ,Select transition bit 4" "Falling,Rising"
textline " "
bitfld.word 0x08 3. " IC3 ,Select transition bit 3" "Falling,Rising"
bitfld.word 0x08 2. " IC2 ,Select transition bit 2" "Falling,Rising"
bitfld.word 0x08 1. " IC1 ,Select transition bit 1" "Falling,Rising"
textline " "
bitfld.word 0x08 0. " IC0 ,Select transition bit 0" "Falling,Rising"
line.word 0x0c "INTERRUPT_MASK_REG,Interrupt mask register"
bitfld.word 0x0c 15. " IM15 ,Enable interrupt bit 15" "Enabled,Disabled"
bitfld.word 0x0c 14. " IM14 ,Enable interrupt bit 14" "Enabled,Disabled"
bitfld.word 0x0c 13. " IM13 ,Enable interrupt bit 13" "Enabled,Disabled"
textline " "
bitfld.word 0x0c 12. " IM12 ,Enable interrupt bit 12" "Enabled,Disabled"
bitfld.word 0x0c 11. " IM11 ,Enable interrupt bit 11" "Enabled,Disabled"
bitfld.word 0x0c 10. " IM10 ,Enable interrupt bit 10" "Enabled,Disabled"
textline " "
bitfld.word 0x0c 9. " IM9 ,Enable interrupt bit 9" "Enabled,Disabled"
bitfld.word 0x0c 8. " IM8 ,Enable interrupt bit 8" "Enabled,Disabled"
bitfld.word 0x0c 7. " IM7 ,Enable interrupt bit 7" "Enabled,Disabled"
textline " "
bitfld.word 0x0c 6. " IM6 ,Enable interrupt bit 6" "Enabled,Disabled"
bitfld.word 0x0c 5. " IM5 ,Enable interrupt bit 5" "Enabled,Disabled"
bitfld.word 0x0c 4. " IM4 ,Enable interrupt bit 4" "Enabled,Disabled"
textline " "
bitfld.word 0x0c 3. " IM3 ,Enable interrupt bit 3" "Enabled,Disabled"
bitfld.word 0x0c 2. " IM2 ,Enable interrupt bit 2" "Enabled,Disabled"
bitfld.word 0x0c 1. " IM1 ,Enable interrupt bit 1" "Enabled,Disabled"
textline " "
bitfld.word 0x0c 0. " IM0 ,Enable interrupt bit 0" "Enabled,Disabled"
line.word 0x10 "INTERRUPT_STATUS_REG,Interrupt status register"
eventfld.word 0x10 15. " IS15 ,Interrupt request bit 15" "Not requested,Requested"
eventfld.word 0x10 14. " IS14 ,Interrupt request bit 14" "Not requested,Requested"
eventfld.word 0x10 13. " IS13 ,Interrupt request bit 13" "Not requested,Requested"
textline " "
eventfld.word 0x10 12. " IS12 ,Interrupt request bit 12" "Not requested,Requested"
eventfld.word 0x10 11. " IS11 ,Interrupt request bit 11" "Not requested,Requested"
eventfld.word 0x10 10. " IS10 ,Interrupt request bit 10" "Not requested,Requested"
textline " "
eventfld.word 0x10 9. " IS9 ,Interrupt request bit 9" "Not requested,Requested"
eventfld.word 0x10 8. " IS8 ,Interrupt request bit 8" "Not requested,Requested"
eventfld.word 0x10 7. " IS7 ,Interrupt request bit 7" "Not requested,Requested"
textline " "
eventfld.word 0x10 6. " IS6 ,Interrupt request bit 6" "Not requested,Requested"
eventfld.word 0x10 5. " IS5 ,Interrupt request bit 5" "Not requested,Requested"
eventfld.word 0x10 4. " IS4 ,Interrupt request bit 4" "Not requested,Requested"
textline " "
eventfld.word 0x10 3. " IS3 ,Interrupt request bit 3" "Not requested,Requested"
eventfld.word 0x10 2. " IS2 ,Interrupt request bit 2" "Not requested,Requested"
eventfld.word 0x10 1. " IS1 ,Interrupt request bit 1" "Not requested,Requested"
textline " "
eventfld.word 0x10 0. " IS0 ,Interrupt request bit 0" "Not requested,Requested"
line.word 0x14 "PIN_CONTROL_REG,Pin control register"
bitfld.word 0x14 15. " PC15 ,Pin control bit 15" "DSP,MPU"
bitfld.word 0x14 14. " PC14 ,Pin control bit 14" "DSP,MPU"
bitfld.word 0x14 13. " PC13 ,Pin control bit 13" "DSP,MPU"
textline " "
bitfld.word 0x14 12. " PC12 ,Pin control bit 12" "DSP,MPU"
bitfld.word 0x14 11. " PC11 ,Pin control bit 11" "DSP,MPU"
bitfld.word 0x14 10. " PC10 ,Pin control bit 10" "DSP,MPU"
textline " "
bitfld.word 0x14 9. " PC9 ,Pin control bit 9" "DSP,MPU"
bitfld.word 0x14 8. " PC8 ,Pin control bit 8" "DSP,MPU"
bitfld.word 0x14 7. " PC7 ,Pin control bit 7" "DSP,MPU"
textline " "
bitfld.word 0x14 6. " PC6 ,Pin control bit 6" "DSP,MPU"
bitfld.word 0x14 5. " PC5 ,Pin control bit 5" "DSP,MPU"
bitfld.word 0x14 4. " PC4 ,Pin control bit 4" "DSP,MPU"
textline " "
bitfld.word 0x14 3. " PC3 ,Pin control bit 3" "DSP,MPU"
bitfld.word 0x14 2. " PC2 ,Pin control bit 2" "DSP,MPU"
bitfld.word 0x14 1. " PC1 ,Pin control bit 1" "DSP,MPU"
textline " "
bitfld.word 0x14 0. " PC0 ,Pin control bit 0" "DSP,MPU"
tree.end
tree.end
tree "LCD Controller Registers"
width 12.
base ad:0xfffec000
group 0x00++0x17
line.long 0x00 "LCDCONTROL,LCD control"
bitfld.long 0x00 24. " 565_STN ,12 BPP (5-6-5) mode" "On,Off"
bitfld.long 0x00 23. " TFT_MAP ,TFT alternate signal mapping" "Right-aligned,565-converted"
bitfld.long 0x00 22. " LCDCB1 ,LCD control bit 1" "0,1"
textline " "
bitfld.long 0x00 20.--21. " PLM ,Palette loading mode" "Palette+data,Palette,Data,?..."
hexmask.long.byte 0x00 12.--19. 1. " FDD ,FIFO DMA request delay"
bitfld.long 0x00 9. " M8B ,Mono 8-bit mode" "4 lines,8 lines"
textline " "
bitfld.long 0x00 8. " LCDCB0 ,LCD control bit 0" "0,1"
bitfld.long 0x00 7. " LCDTFT ,LCD TFT" "Passive/STN,Active/TFT"
bitfld.long 0x00 4. " LOADMASK ,Load mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 3. " DONEMASK ,Done mask" "Masked,Not masked"
bitfld.long 0x00 1. " LCDBW ,LCD Monochrome" "Color,Monochrome"
bitfld.long 0x00 0. " LCDEN ,LCD controller enable" "Disabled,Enabled"
line.long 0x04 "LCDTIMING0,LCD timing 0"
hexmask.long.byte 0x04 24.--31. 1. 1. " HBP ,Horizontal back porch"
hexmask.long.byte 0x04 16.--23. 1. 1. " HFP ,Horizontal front porch"
hexmask.long.byte 0x04 10.--15. 1. 1. " HSW ,Horizontal synchronization pulse width"
textline " "
hexmask.long.word 0x04 0.--9. 1. 1. " PPL ,Pixels per line"
line.long 0x08 "LCDTIMING1,LCD timing 1"
hexmask.long.byte 0x08 24.--31. 1. " VBP ,Vertical back porch"
hexmask.long.byte 0x08 16.--23. 1. 1. " VFP ,Vertical front porch"
hexmask.long.byte 0x08 10.--15. 1. 1. " VSW ,Vertical synchronization pulse width"
textline " "
hexmask.long.word 0x08 0.--9. 1. 1. " LPP ,Lines per panel"
line.long 0x0c "LCDTIMING2,LCD timing 2"
bitfld.long 0x0c 25. " PHSVS_ON_OFF ,HSYNC/VSYNC pixel clock control on/off" "Off,On"
bitfld.long 0x0c 24. " PHSVSRF ,Program HSYNC/VSYNC rise and fall" "Falling edge,Rising edge"
bitfld.long 0x0c 23. " IEO ,Invert output enable" "Active high,Active low"
textline " "
bitfld.long 0x0c 22. " IPC ,Ivert pixel clock" "Rising edge,Falling edge"
bitfld.long 0x0c 21. " IHS ,Invert HSYNC" "Active high,Active low"
bitfld.long 0x0c 20. " IVS ,Invert VSYNC" "Active high,Active low"
textline " "
bitfld.long 0x0c 16.--19. " ACBI ,AC-bias line transitions per interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 8.--15. 1. " ACB ,AC-bias pin frequency"
hexmask.long.byte 0x00 0.--7. 1. " PCD ,Pixel clock divider"
line.long 0x10 "LCDSTATUS,LCD status"
eventfld.long 0x10 6. " PL ,Load palette" "Not loaded,Loaded"
eventfld.long 0x10 5. " FUF ,FIFO underflow status" "No underflow,Underflow"
eventfld.long 0x10 3. " ABC ,AC-bias count status" "Not zeroed,Zeroed"
textline " "
eventfld.long 0x10 2. " SYNC ,Synchronization lost" "Not lost,Lost"
eventfld.long 0x10 0. " DONE ,Frame done" "Not done,Done"
line.long 0x14 "LCDSUBPANEL,LCD subpanel display"
bitfld.long 0x14 31. " SPEN ,Subpanel enable" "Disabled,Enabled"
bitfld.long 0x14 29. " HOLS ,High or low signal" "High,Low"
hexmask.long.word 0x14 16.--25. 1. 1. " LPPT ,Line per panel threshold"
textline " "
hexmask.long.word 0x14 0.--15. 1. " DPD ,Default pixel data"
tree.end
tree "UART Devices"
tree "UART 1 Registers"
width 12.
base ad:0xfffb0000
if (d.b(ad:0xfffb0000+0x0c)&0x80)==0x00
rgroup 0x00++0x00
hide.byte 0x00 "RHR,Receive holding register"
in
wgroup 0x00++0x00
line.byte 0x00 "THR,Transmit holding register"
hexmask.byte.byte 0x00 0.--7. 1. " THR ,Transmit holding register"
wgroup 0x08++0x00
line.byte 0x00 "FCR,FIFO Control Register"
bitfld.byte 0x00 6.--7. " RX_FIFO_TRIG ,Sets the trigger level for the RX FIFO" "8 characters,16 characters,56 characters,60 characters"
bitfld.byte 0x00 4.--5. " TX_FIFO_TRIG ,Sets the trigger level for the TX FIFO" "8 characters,16 characters,56 characters,60 characters"
textline " "
bitfld.byte 0x00 3. " DMA_MODE ," "Mode 0,Mode 1"
bitfld.byte 0x00 2. " TX_FIFO_CLEAR ,Clears the transmit FIFO and resets its counter logic to zero" "Not cleared,Cleared"
textline " "
bitfld.byte 0x00 1. " RX_FIFO_CLEAR ,Clears the receive FIFO and resets its counter logic to zero" "Not cleared,Cleared"
bitfld.byte 0x00 0. " FIFO_EN ,Enable FIFOs" "Disabled,Enabled"
else
rgroup 0x00++0x00
hide.byte 0x00 "RHR,Receive holding register"
rgroup 0x00++0x00
hide.byte 0x00 "THR,Transmit holding register"
rgroup 0x08++0x00
hide.byte 0x00 "FCR,FIFO Control Register"
endif
group 0x40++0x00
line.byte 0x00 "SCR,Supplementary Control Register"
bitfld.byte 0x00 7. " RX_TRIG_GRANU1 ,Enables the granularity of 1 for trigger RX level" "Disabled,Enabled"
bitfld.byte 0x00 6. " TX_TRIG_GRANU1 ,Enables the granularity of 1 for trigger TX level" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 5. " DSR_IT ,Enables /DSR interrupt" "Disabled,Enabled"
bitfld.byte 0x00 4. " RX_CTS_DSR_WAKE_UP_ENABLE ,Waits for a falling edge of pins RX, /CTS or /DSR to generate an interrupt" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 3. " TX_EMPTY_CTL_IT ,Generate THR interrupt when TX FIFO and TX shift register are empty" "Disabled,Enabled"
bitfld.byte 0x00 1.--2. " DMA_MODE_2 ,Used to specify the DMA mode" "DMA mode 0,DMA mode 1,DMA mode 2,DMA mode 3"
textline " "
bitfld.byte 0x00 0. " DMA_MODE_CTL ,DMA configuration" "FCR0,SCR2:1"
if (d.b(ad:0xfffb0000+0x0c)&0x03)==0x00
group 0x0c++0x00
line.byte 0x00 "LCR,Line Control Register"
bitfld.byte 0x00 7. " DIV_EN ,Divisor latch enable" "Disabled,Enabled"
bitfld.byte 0x00 6. " BREAK_EN ,Break control bit" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 5. " PARITY_TYPE2 ,Selects the forced parity format" "Same,Opposed"
bitfld.byte 0x00 4. " PARITY_TYPE1 ,Parity to be generated" "Odd,Even"
textline " "
bitfld.byte 0x00 3. " PARITY_EN ,Parity generation/check enable" "Disabled,Enabled"
bitfld.byte 0x00 2. " NB_STOP ,Specifies the number of stop bits" "1 bit,1.5 bits"
textline " "
bitfld.byte 0x00 0.--1. " CHAR_LENGTH ,Specifies the word length to be transmitted or received" "5 bits,6 bits,7 bits,8 bits"
else
group 0x0c++0x00
line.byte 0x00 "LCR,Line Control Register"
bitfld.byte 0x00 7. " DIV_EN ,Divisor latch enable" "Disabled,Enabled"
bitfld.byte 0x00 6. " BREAK_EN ,Break control bit" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 5. " PARITY_TYPE2 ,Selects the forced parity format" "0,1"
bitfld.byte 0x00 4. " PARITY_TYPE1 ,Parity to be generated" "Odd,Even"
textline " "
bitfld.byte 0x00 3. " PARITY_EN ,Parity generation/check enable" "Disabled,Enabled"
bitfld.byte 0x00 2. " NB_STOP ,Specifies the number of stop bits" "1 bit,2 bits"
textline " "
bitfld.byte 0x00 0.--1. " CHAR_LENGTH ,Specifies the word length to be transmitted or received" "5 bits,6 bits,7 bits,8 bits"
endif
if d.b(ad:0xfffb0000+0x0c)!=0xbf
rgroup 0x14++0x00
line.byte 0x00 "LSR,UART Mode Line Status Register"
bitfld.byte 0x00 7. " RX_FIFO_STS ,At least one parity error, framing error or break indication in the receiver FIFO" "No error,Error"
bitfld.byte 0x00 6. " TX_SR_E ,Transmitter hold and shift registers are empty" "Not empty,Empty"
textline " "
bitfld.byte 0x00 5. " TX_FIFO_E ,Transmitter hold register is empty" "Not empty,Empty"
bitfld.byte 0x00 4. " RX_BI ,A break was detected while the data being read from the RX FIFO was being received" "No break,Break"
textline " "
bitfld.byte 0x00 3. " RX_FE ,Frame error occured in data being read from RX FIFO" "No error,Error"
bitfld.byte 0x00 2. " RX_PE ,Parity error in data being read from RX FIFO" "No error,Error"
textline " "
bitfld.byte 0x00 1. " RX_OE ,Overrun error has occured" "No error,Error"
bitfld.byte 0x00 0. " RX_FIFO_E ,At least one data character in the RX_FIFO" "Empty,Not empty"
else
rgroup 0x14++0x00
hide.byte 0x00 "LSR,UART Mode Line Status Register"
endif
rgroup 0x44++0x00
line.byte 0x00 "SSR,Supplementary Status Register"
bitfld.byte 0x00 1. " RX_CTS_DSR_WAKE_UP_STS ,A falling edge occured on RX, /CTS or /DSR" "No falling edge,Falling edge"
bitfld.byte 0x00 0. " TX_FIFO_FULL ,TX FIFO full" "Not full,Full"
if d.b(ad:0xfffb0000+0x0c)!=0xbf
group 0x10++0x00
line.byte 0x00 "MCR,Modem Control Register"
bitfld.byte 0x00 7. " CLKSEL ,Divide clock input by 4" "Not divided,Divided"
bitfld.byte 0x00 6. " TCR_TLR ,Enables access to the TCR and TLR registers" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 5. " XON_EN ,Enable XON any function" "Disabled,Enabled"
bitfld.byte 0x00 4. " LOOPBACK_EN ,Enable local loop-back mode (internal)" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 3. " CD_STS_CH ,In loopback mode forces IRQ output to inactive state" "Not forced,Forced"
bitfld.byte 0x00 1. " RTS ,Forces /RTS output to active" "Inactive,Active"
textline " "
bitfld.byte 0x00 0. " DTR ,Forces /DTR output to active" "Inactive,Active"
rgroup 0x18++0x00
line.byte 0x00 "MSR,Modem Status Register"
bitfld.byte 0x00 5. " NDSR_STS ,Complement of the /DSR input" "Low,High"
bitfld.byte 0x00 4. " NCTS_STS ,Complement of the /CTS input" "Low,High"
textline " "
bitfld.byte 0x00 1. " DSR_STS ,/DSR input has changed state" "Not changed,Changed"
bitfld.byte 0x00 0. " CTS_STS ,/CTS input has changed state" "Not changed,Changed"
else
rgroup 0x10++0x00
hide.byte 0x00 "MCR,Modem Control Register"
textline " "
textline " "
textline " "
rgroup 0x18++0x00
hide.byte 0x00 "MSR,Modem Status Register"
endif
if (d.b(ad:0xfffb0000+0x0c)&0x80)==0x00
group 0x04++0x00
line.byte 0x00 "IER,UART Mode Interrupt Enable Register"
bitfld.byte 0x00 7. " CTS_IT ,Enables the /CTS interrupt" "Disable,Enabled"
bitfld.byte 0x00 6. " RTS_IT ,Enables the /RTS interrupt" "Disable,Enabled"
textline " "
bitfld.byte 0x00 5. " XOFF_IT ,Enables the XOFF interrupt" "Disable,Enabled"
bitfld.byte 0x00 4. " SLEEP_MODE ,Enables sleep mode" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 3. " MODEM_STS_IT ,Enables the modem status register interrupt" "Disabled,Enabled"
bitfld.byte 0x00 2. " LINE_STS_IT ,Enables the receiver line status interrupt" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 1. " THR_IT ,Enables the THR interrupt" "Disabled,Enabled"
bitfld.byte 0x00 0. " RHR_IT ,Enables the RHR interrupt and time-out interrupt" "Disabled,Enabled"
rgroup 0x08++0x00
line.byte 0x00 "IIR,UART Mode Interrupt Identification Register"
bitfld.byte 0x00 6.--7. " FCR_MIRROR ,Mirror the contents of FCR[0] on both bits" "00,01,10,11"
bitfld.byte 0x00 1.--5. " IT_TYPE ," "0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f"
textline " "
bitfld.byte 0x00 0. " IT_PENDING ,An interrupt is pending" "Pending,Not pending"
else
rgroup 0x04++0x00
hide.byte 0x00 "IER,UART Mode Interrupt Enable Register"
textline " "
textline " "
textline " "
rgroup 0x08++0x00
hide.byte 0x00 "IIR,UART Mode Interrupt Identification Register"
endif
if d.b(ad:0xfffb0000+0x0c)==0xbf
group 0x08++0x00
line.byte 0x00 "EFR,Enhanced Feature Register"
bitfld.byte 0x00 7. " AUTO_CTS_EN ,Automatic CTS enable bit" "Disabled,Enabled"
bitfld.byte 0x00 6. " AUTO_RTS_EN ,Automatic RTS enable bit" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 5. " SPECIAL_CHAR_DETECT ,Special char detect enable" "Disabled,Enabled"
bitfld.byte 0x00 4. " ENHANCED_EN ,Enhanced functions write enable bit" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 2.--3. " SW_FLOW_CONTROL_TX ,Software flow control (TX)" "Disabled,XON/XOFF 2,XON/XOFF 1,XON/XOFF 1/2"
bitfld.byte 0x00 0.--1. " SW_FLOW_CONTROL_RX ,Software flow control (RX)" "Disabled,XON/XOFF 2,XON/XOFF 1,XON/XOFF 1/2"
group 0x10++0x0c
line.byte 0x00 "XON1,XON1 Register"
hexmask.byte.byte 0x00 0.--7. 1. " XON_WORD1 ,Used to store 8-bit XON1 character"
line.byte 0x04 "XON2,XON2 Register"
hexmask.byte.byte 0x04 0.--7. 1. " XON_WORD2 ,Used to store 8-bit XON2 character"
line.byte 0x08 "XOFF1,XOFF1 Register"
hexmask.byte.byte 0x08 0.--7. 1. " XOFF_WORD1 ,Used to store 8-bit XOFF1 character"
line.byte 0x0c "XOFF2,XOFF2 Register"
hexmask.byte.byte 0x0C 0.--7. 1. " XOFF_WORD2 ,Used to store 8-bit XOFF2 character"
else
rgroup 0x08++0x00
hide.byte 0x00 "EFR,Enhanced Feature Register"
textline " "
textline " "
rgroup 0x10++0x0c
hide.byte 0x00 "XON1,XON1 Register"
hide.byte 0x04 "XON2,XON2 Register"
hide.byte 0x08 "XOFF1,XOFF1 Register"
hide.byte 0x0c "XOFF2,XOFF2 Register"
endif
if d.b(ad:0xfffb0000+0x0c)!=0xbf
group 0x1c++0x00
line.byte 0x00 "SPR,Scratchpad Register"
hexmask.byte.byte 0x00 0.--7. 1. " SPR_WORD ,Scratchpad register"
else
rgroup 0x1c++0x00
hide.byte 0x00 "SPR,Scratchpad Register"
endif
if (d.b(ad:0xfffb0000+0x0c)&0x80)==0x80
group 0x00++0x04
line.byte 0x00 "DLL,Divisor Latch Low Register"
hexmask.byte.byte 0x00 0.--7. 1. " CLOCK_LSB ,Used to store 8-bit LSB divisor value"
line.byte 0x04 "DLH,Divisor Latch High Register"
hexmask.byte.byte 0x04 0.--7. 1. " CLOCK_MSB ,Used to store 8-bit MSB divisor value"
else
rgroup 0x00++0x04
hide.byte 0x00 "DLL,Divisor Latch Low Register"
hide.byte 0x04 "DLH,Divisor Latch High Register"
endif
group 0x18++0x08
line.byte 0x00 "TCR,Transmission Control Register"
bitfld.byte 0x00 4.--7. " RX_FIFO_TRIG_START ,RCV FIFO trigger level to RESTORE transmission" "0,4,8,12,16,20,24,28,32,36,40,44,48,52,56,60"
bitfld.byte 0x00 0.--3. " RX_FIFO_TRIG_HALT ,RCV FIFO trigger level to HALT transmission" "0,4,8,12,16,20,24,28,32,36,40,44,48,52,56,60"
line.byte 0x04 "TLR,Trigger Level Register"
bitfld.byte 0x04 4.--7. " RX_FIFO_TRIG_DMA ,Receive FIFO trigger level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.byte 0x04 0.--3. " TX_FIFO_TRIG_DMA ,Transmit FIFO trigger level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.byte 0x08 "MDR1,Mode Definition Register 1"
bitfld.byte 0x08 0.--2. " MODE_SELECT ," "UART,Reserved,UART/autobaud,Reserved,Reserved,Reserved,Reserved,Disabled"
if (d.b(ad:0xfffb0000+0x0c)&0x80)==0x80
group 0x38++0x00
line.byte 0x00 "UASR,Autobauding Status Register"
bitfld.byte 0x00 6.--7. " PARITY_TYPE ," "None,Space,Even,Odd"
bitfld.byte 0x00 5. " BIT_BY_CHAR ,8-bit character identified" "7-bit,8-bit"
textline " "
bitfld.byte 0x00 0.--4. " SPEED ,Used to report the speed identified" "None,115200 bauds,57600 bauds,38400 bauds,28800 bauds,19200 bauds,14400 bauds,9600 bauds,4800 bauds,2400 bauds,1200 bauds,?..."
else
rgroup 0x38++0x00
hide.byte 0x00 "UASR,Autobauding Status Register"
endif
if (d.b(ad:0xfffb0000+0x0c)&0x80)==0x00
wgroup 0x4c++0x00
line.byte 0x00 "OSC_12M_SEL,OSC_12_MHz Register Select"
bitfld.byte 0x00 0. " OSC_12M_SEL ,Selects 6.5 division factor with a 12-MHz system clock" "Not selected,Selected"
else
rgroup 0x4c++0x00
hide.byte 0x00 "OSC_12M_SEL,OSC_12_MHz Register Select"
endif
rgroup 0x50++0x00
line.byte 0x00 "MVR,Module Version Register"
hexmask.byte 0x00 4.--7. 1. " MAJOR_REV ,Major revision number of the module"
hexmask.byte 0x00 0.--3. 1. " MINOR_REV ,Minor revision number of the module"
tree.end
tree "UART 2 Registers"
width 12.
base ad:0xfffb0800
if (d.b(ad:0xfffb0800+0x0c)&0x80)==0x00
rgroup 0x00++0x00
hide.byte 0x00 "RHR,Receive holding register"
in
wgroup 0x00++0x00
line.byte 0x00 "THR,Transmit holding register"
hexmask.byte.byte 0x00 0.--7. 1. " THR ,Transmit holding register"
wgroup 0x08++0x00
line.byte 0x00 "FCR,FIFO Control Register"
bitfld.byte 0x00 6.--7. " RX_FIFO_TRIG ,Sets the trigger level for the RX FIFO" "8 characters,16 characters,56 characters,60 characters"
bitfld.byte 0x00 4.--5. " TX_FIFO_TRIG ,Sets the trigger level for the TX FIFO" "8 characters,16 characters,56 characters,60 characters"
textline " "
bitfld.byte 0x00 3. " DMA_MODE ," "Mode 0,Mode 1"
bitfld.byte 0x00 2. " TX_FIFO_CLEAR ,Clears the transmit FIFO and resets its counter logic to zero" "Not cleared,Cleared"
textline " "
bitfld.byte 0x00 1. " RX_FIFO_CLEAR ,Clears the receive FIFO and resets its counter logic to zero" "Not cleared,Cleared"
bitfld.byte 0x00 0. " FIFO_EN ,Enable FIFOs" "Disabled,Enabled"
else
rgroup 0x00++0x00
hide.byte 0x00 "RHR,Receive holding register"
rgroup 0x00++0x00
hide.byte 0x00 "THR,Transmit holding register"
rgroup 0x08++0x00
hide.byte 0x00 "FCR,FIFO Control Register"
endif
group 0x40++0x00
line.byte 0x00 "SCR,Supplementary Control Register"
bitfld.byte 0x00 7. " RX_TRIG_GRANU1 ,Enables the granularity of 1 for trigger RX level" "Disabled,Enabled"
bitfld.byte 0x00 6. " TX_TRIG_GRANU1 ,Enables the granularity of 1 for trigger TX level" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 5. " DSR_IT ,Enables /DSR interrupt" "Disabled,Enabled"
bitfld.byte 0x00 4. " RX_CTS_DSR_WAKE_UP_ENABLE ,Waits for a falling edge of pins RX, /CTS or /DSR to generate an interrupt" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 3. " TX_EMPTY_CTL_IT ,Generate THR interrupt when TX FIFO and TX shift register are empty" "Disabled,Enabled"
bitfld.byte 0x00 1.--2. " DMA_MODE_2 ,Used to specify the DMA mode" "DMA mode 0,DMA mode 1,DMA mode 2,DMA mode 3"
textline " "
bitfld.byte 0x00 0. " DMA_MODE_CTL ,DMA configuration" "FCR0,SCR2:1"
if (d.b(ad:0xfffb0800+0x0c)&0x03)==0x00
group 0x0c++0x00
line.byte 0x00 "LCR,Line Control Register"
bitfld.byte 0x00 7. " DIV_EN ,Divisor latch enable" "Disabled,Enabled"
bitfld.byte 0x00 6. " BREAK_EN ,Break control bit" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 5. " PARITY_TYPE2 ,Selects the forced parity format" "Same,Opposed"
bitfld.byte 0x00 4. " PARITY_TYPE1 ,Parity to be generated" "Odd,Even"
textline " "
bitfld.byte 0x00 3. " PARITY_EN ,Parity generation/check enable" "Disabled,Enabled"
bitfld.byte 0x00 2. " NB_STOP ,Specifies the number of stop bits" "1 bit,1.5 bits"
textline " "
bitfld.byte 0x00 0.--1. " CHAR_LENGTH ,Specifies the word length to be transmitted or received" "5 bits,6 bits,7 bits,8 bits"
else
group 0x0c++0x00
line.byte 0x00 "LCR,Line Control Register"
bitfld.byte 0x00 7. " DIV_EN ,Divisor latch enable" "Disabled,Enabled"
bitfld.byte 0x00 6. " BREAK_EN ,Break control bit" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 5. " PARITY_TYPE2 ,Selects the forced parity format" "0,1"
bitfld.byte 0x00 4. " PARITY_TYPE1 ,Parity to be generated" "Odd,Even"
textline " "
bitfld.byte 0x00 3. " PARITY_EN ,Parity generation/check enable" "Disabled,Enabled"
bitfld.byte 0x00 2. " NB_STOP ,Specifies the number of stop bits" "1 bit,2 bits"
textline " "
bitfld.byte 0x00 0.--1. " CHAR_LENGTH ,Specifies the word length to be transmitted or received" "5 bits,6 bits,7 bits,8 bits"
endif
if d.b(ad:0xfffb0800+0x0c)!=0xbf
rgroup 0x14++0x00
line.byte 0x00 "LSR,UART Mode Line Status Register"
bitfld.byte 0x00 7. " RX_FIFO_STS ,At least one parity error, framing error or break indication in the receiver FIFO" "No error,Error"
bitfld.byte 0x00 6. " TX_SR_E ,Transmitter hold and shift registers are empty" "Not empty,Empty"
textline " "
bitfld.byte 0x00 5. " TX_FIFO_E ,Transmitter hold register is empty" "Not empty,Empty"
bitfld.byte 0x00 4. " RX_BI ,A break was detected while the data being read from the RX FIFO was being received" "No break,Break"
textline " "
bitfld.byte 0x00 3. " RX_FE ,Frame error occured in data being read from RX FIFO" "No error,Error"
bitfld.byte 0x00 2. " RX_PE ,Parity error in data being read from RX FIFO" "No error,Error"
textline " "
bitfld.byte 0x00 1. " RX_OE ,Overrun error has occured" "No error,Error"
bitfld.byte 0x00 0. " RX_FIFO_E ,At least one data character in the RX_FIFO" "Empty,Not empty"
else
rgroup 0x14++0x00
hide.byte 0x00 "LSR,UART Mode Line Status Register"
endif
rgroup 0x44++0x00
line.byte 0x00 "SSR,Supplementary Status Register"
bitfld.byte 0x00 1. " RX_CTS_DSR_WAKE_UP_STS ,A falling edge occured on RX, /CTS or /DSR" "No falling edge,Falling edge"
bitfld.byte 0x00 0. " TX_FIFO_FULL ,TX FIFO full" "Not full,Full"
if d.b(ad:0xfffb0800+0x0c)!=0xbf
group 0x10++0x00
line.byte 0x00 "MCR,Modem Control Register"
bitfld.byte 0x00 7. " CLKSEL ,Divide clock input by 4" "Not divided,Divided"
bitfld.byte 0x00 6. " TCR_TLR ,Enables access to the TCR and TLR registers" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 5. " XON_EN ,Enable XON any function" "Disabled,Enabled"
bitfld.byte 0x00 4. " LOOPBACK_EN ,Enable local loop-back mode (internal)" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 3. " CD_STS_CH ,In loopback mode forces IRQ output to inactive state" "Not forced,Forced"
bitfld.byte 0x00 1. " RTS ,Forces /RTS output to active" "Inactive,Active"
textline " "
bitfld.byte 0x00 0. " DTR ,Forces /DTR output to active" "Inactive,Active"
rgroup 0x18++0x00
line.byte 0x00 "MSR,Modem Status Register"
bitfld.byte 0x00 5. " NDSR_STS ,Complement of the /DSR input" "Low,High"
bitfld.byte 0x00 4. " NCTS_STS ,Complement of the /CTS input" "Low,High"
textline " "
bitfld.byte 0x00 1. " DSR_STS ,/DSR input has changed state" "Not changed,Changed"
bitfld.byte 0x00 0. " CTS_STS ,/CTS input has changed state" "Not changed,Changed"
else
rgroup 0x10++0x00
hide.byte 0x00 "MCR,Modem Control Register"
textline " "
textline " "
textline " "
rgroup 0x18++0x00
hide.byte 0x00 "MSR,Modem Status Register"
endif
if (d.b(ad:0xfffb0800+0x0c)&0x80)==0x00
group 0x04++0x00
line.byte 0x00 "IER,UART Mode Interrupt Enable Register"
bitfld.byte 0x00 7. " CTS_IT ,Enables the /CTS interrupt" "Disable,Enabled"
bitfld.byte 0x00 6. " RTS_IT ,Enables the /RTS interrupt" "Disable,Enabled"
textline " "
bitfld.byte 0x00 5. " XOFF_IT ,Enables the XOFF interrupt" "Disable,Enabled"
bitfld.byte 0x00 4. " SLEEP_MODE ,Enables sleep mode" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 3. " MODEM_STS_IT ,Enables the modem status register interrupt" "Disabled,Enabled"
bitfld.byte 0x00 2. " LINE_STS_IT ,Enables the receiver line status interrupt" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 1. " THR_IT ,Enables the THR interrupt" "Disabled,Enabled"
bitfld.byte 0x00 0. " RHR_IT ,Enables the RHR interrupt and time-out interrupt" "Disabled,Enabled"
rgroup 0x08++0x00
line.byte 0x00 "IIR,UART Mode Interrupt Identification Register"
bitfld.byte 0x00 6.--7. " FCR_MIRROR ,Mirror the contents of FCR[0] on both bits" "00,01,10,11"
bitfld.byte 0x00 1.--5. " IT_TYPE ," "0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f"
textline " "
bitfld.byte 0x00 0. " IT_PENDING ,An interrupt is pending" "Pending,Not pending"
else
rgroup 0x04++0x00
hide.byte 0x00 "IER,UART Mode Interrupt Enable Register"
textline " "
textline " "
textline " "
rgroup 0x08++0x00
hide.byte 0x00 "IIR,UART Mode Interrupt Identification Register"
endif
if d.b(ad:0xfffb0800+0x0c)==0xbf
group 0x08++0x00
line.byte 0x00 "EFR,Enhanced Feature Register"
bitfld.byte 0x00 7. " AUTO_CTS_EN ,Automatic CTS enable bit" "Disabled,Enabled"
bitfld.byte 0x00 6. " AUTO_RTS_EN ,Automatic RTS enable bit" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 5. " SPECIAL_CHAR_DETECT ,Special char detect enable" "Disabled,Enabled"
bitfld.byte 0x00 4. " ENHANCED_EN ,Enhanced functions write enable bit" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 2.--3. " SW_FLOW_CONTROL_TX ,Software flow control (TX)" "Disabled,XON/XOFF 2,XON/XOFF 1,XON/XOFF 1/2"
bitfld.byte 0x00 0.--1. " SW_FLOW_CONTROL_RX ,Software flow control (RX)" "Disabled,XON/XOFF 2,XON/XOFF 1,XON/XOFF 1/2"
group 0x10++0x0c
line.byte 0x00 "XON1,XON1 Register"
hexmask.byte.byte 0x00 0.--7. 1. " XON_WORD1 ,Used to store 8-bit XON1 character"
line.byte 0x04 "XON2,XON2 Register"
hexmask.byte.byte 0x04 0.--7. 1. " XON_WORD2 ,Used to store 8-bit XON2 character"
line.byte 0x08 "XOFF1,XOFF1 Register"
hexmask.byte.byte 0x08 0.--7. 1. " XOFF_WORD1 ,Used to store 8-bit XOFF1 character"
line.byte 0x0c "XOFF2,XOFF2 Register"
hexmask.byte.byte 0x0C 0.--7. 1. " XOFF_WORD2 ,Used to store 8-bit XOFF2 character"
else
rgroup 0x08++0x00
hide.byte 0x00 "EFR,Enhanced Feature Register"
textline " "
textline " "
rgroup 0x10++0x0c
hide.byte 0x00 "XON1,XON1 Register"
hide.byte 0x04 "XON2,XON2 Register"
hide.byte 0x08 "XOFF1,XOFF1 Register"
hide.byte 0x0c "XOFF2,XOFF2 Register"
endif
if d.b(ad:0xfffb0800+0x0c)!=0xbf
group 0x1c++0x00
line.byte 0x00 "SPR,Scratchpad Register"
hexmask.byte.byte 0x00 0.--7. 1. " SPR_WORD ,Scratchpad register"
else
rgroup 0x1c++0x00
hide.byte 0x00 "SPR,Scratchpad Register"
endif
if (d.b(ad:0xfffb0800+0x0c)&0x80)==0x80
group 0x00++0x04
line.byte 0x00 "DLL,Divisor Latch Low Register"
hexmask.byte.byte 0x00 0.--7. 1. " CLOCK_LSB ,Used to store 8-bit LSB divisor value"
line.byte 0x04 "DLH,Divisor Latch High Register"
hexmask.byte.byte 0x04 0.--7. 1. " CLOCK_MSB ,Used to store 8-bit MSB divisor value"
else
rgroup 0x00++0x04
hide.byte 0x00 "DLL,Divisor Latch Low Register"
hide.byte 0x04 "DLH,Divisor Latch High Register"
endif
group 0x18++0x08
line.byte 0x00 "TCR,Transmission Control Register"
bitfld.byte 0x00 4.--7. " RX_FIFO_TRIG_START ,RCV FIFO trigger level to RESTORE transmission" "0,4,8,12,16,20,24,28,32,36,40,44,48,52,56,60"
bitfld.byte 0x00 0.--3. " RX_FIFO_TRIG_HALT ,RCV FIFO trigger level to HALT transmission" "0,4,8,12,16,20,24,28,32,36,40,44,48,52,56,60"
line.byte 0x04 "TLR,Trigger Level Register"
bitfld.byte 0x04 4.--7. " RX_FIFO_TRIG_DMA ,Receive FIFO trigger level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.byte 0x04 0.--3. " TX_FIFO_TRIG_DMA ,Transmit FIFO trigger level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.byte 0x08 "MDR1,Mode Definition Register 1"
bitfld.byte 0x08 0.--2. " MODE_SELECT ," "UART,Reserved,UART/autobaud,Reserved,Reserved,Reserved,Reserved,Disabled"
if (d.b(ad:0xfffb0800+0x0c)&0x80)==0x80
group 0x38++0x00
line.byte 0x00 "UASR,Autobauding Status Register"
bitfld.byte 0x00 6.--7. " PARITY_TYPE ," "None,Space,Even,Odd"
bitfld.byte 0x00 5. " BIT_BY_CHAR ,8-bit character identified" "7-bit,8-bit"
textline " "
bitfld.byte 0x00 0.--4. " SPEED ,Used to report the speed identified" "None,115200 bauds,57600 bauds,38400 bauds,28800 bauds,19200 bauds,14400 bauds,9600 bauds,4800 bauds,2400 bauds,1200 bauds,?..."
else
rgroup 0x38++0x00
hide.byte 0x00 "UASR,Autobauding Status Register"
endif
if (d.b(ad:0xfffb0800+0x0c)&0x80)==0x00
wgroup 0x4c++0x00
line.byte 0x00 "OSC_12M_SEL,OSC_12_MHz Register Select"
bitfld.byte 0x00 0. " OSC_12M_SEL ,Selects 6.5 division factor with a 12-MHz system clock" "Not selected,Selected"
else
rgroup 0x4c++0x00
hide.byte 0x00 "OSC_12M_SEL,OSC_12_MHz Register Select"
endif
rgroup 0x50++0x00
line.byte 0x00 "MVR,Module Version Register"
hexmask.byte 0x00 4.--7. 1. " MAJOR_REV ,Major revision number of the module"
hexmask.byte 0x00 0.--3. 1. " MINOR_REV ,Minor revision number of the module"
tree.end
tree "UART 3 Registers"
width 12.
base ad:0xfffb9800
if (d.b(ad:0xfffb9800+0x0c)&0x80)==0x00
rgroup 0x00++0x00
hide.byte 0x00 "RHR,Receive holding register"
in
wgroup 0x00++0x00
line.byte 0x00 "THR,Transmit holding register"
hexmask.byte.byte 0x00 0.--7. 1. " THR ,Transmit holding register"
wgroup 0x08++0x00
line.byte 0x00 "FCR,FIFO Control Register"
bitfld.byte 0x00 6.--7. " RX_FIFO_TRIG ,Sets the trigger level for the RX FIFO" "8 characters,16 characters,56 characters,60 characters"
textline " "
bitfld.byte 0x00 4.--5. " TX_FIFO_TRIG ,Sets the trigger level for the TX FIFO" "8 characters,16 characters,56 characters,60 characters"
bitfld.byte 0x00 3. " DMA_MODE ," "Mode 0,Mode 1"
textline " "
bitfld.byte 0x00 2. " TX_FIFO_CLEAR ,Clears the transmit FIFO and resets its counter logic to zero" "Not cleared,Cleared"
bitfld.byte 0x00 1. " RX_FIFO_CLEAR ,Clears the receive FIFO and resets its counter logic to zero" "Not cleared,Cleared"
textline " "
bitfld.byte 0x00 0. " FIFO_EN ,Enable FIFOs" "Disabled,Enabled"
else
rgroup 0x00++0x00
hide.byte 0x00 "RHR,Receive holding register"
rgroup 0x00++0x00
hide.byte 0x00 "THR,Transmit holding register"
rgroup 0x08++0x00
hide.byte 0x00 "FCR,FIFO Control Register"
endif
group 0x40++0x00
line.byte 0x00 "SCR,Supplementary Control Register"
bitfld.byte 0x00 7. " RX_TRIG_GRANU1 ,Enables the granularity of 1 for trigger RX level" "Disabled,Enabled"
bitfld.byte 0x00 6. " TX_TRIG_GRANU1 ,Enables the granularity of 1 for trigger TX level" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 5. " DSR_IT ,Enables /DSR interrupt" "Disabled,Enabled"
bitfld.byte 0x00 4. " RX_CTS_DSR_WAKE_UP_ENABLE ,Waits for a falling edge of pins RX, /CTS or /DSR to generate an interrupt" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 3. " TX_EMPTY_CTL_IT ,Generate THR interrupt when TX FIFO and TX shift register are empty" "Disabled,Enabled"
bitfld.byte 0x00 1.--2. " DMA_MODE_2 ,Used to specify the DMA mode" "DMA mode 0,DMA mode 1,DMA mode 2,DMA mode 3"
textline " "
bitfld.byte 0x00 0. " DMA_MODE_CTL ,DMA configuration" "FCR0,SCR2:1"
if (d.b(ad:0xfffb9800+0x0c)&0x03)==0x00
group 0x0c++0x00
line.byte 0x00 "LCR,Line Control Register"
bitfld.byte 0x00 7. " DIV_EN ,Divisor latch enable" "Disabled,Enabled"
bitfld.byte 0x00 6. " BREAK_EN ,Break control bit" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 5. " PARITY_TYPE2 ,Selects the forced parity format" "Same,Opposed"
bitfld.byte 0x00 4. " PARITY_TYPE1 ,Parity to be generated" "Odd,Even"
textline " "
bitfld.byte 0x00 3. " PARITY_EN ,Parity generation/check enable" "Disabled,Enabled"
bitfld.byte 0x00 2. " NB_STOP ,Specifies the number of stop bits" "1 bit,1.5 bits"
textline " "
bitfld.byte 0x00 0.--1. " CHAR_LENGTH ,Specifies the word length to be transmitted or received" "5 bits,6 bits,7 bits,8 bits"
else
group 0x0c++0x00
line.byte 0x00 "LCR,Line Control Register"
bitfld.byte 0x00 7. " DIV_EN ,Divisor latch enable" "Disabled,Enabled"
bitfld.byte 0x00 6. " BREAK_EN ,Break control bit" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 5. " PARITY_TYPE2 ,Selects the forced parity format" "0,1"
bitfld.byte 0x00 4. " PARITY_TYPE1 ,Parity to be generated" "Odd,Even"
textline " "
bitfld.byte 0x00 3. " PARITY_EN ,Parity generation/check enable" "Disabled,Enabled"
bitfld.byte 0x00 2. " NB_STOP ,Specifies the number of stop bits" "1 bit,2 bits"
textline " "
bitfld.byte 0x00 0.--1. " CHAR_LENGTH ,Specifies the word length to be transmitted or received" "5 bits,6 bits,7 bits,8 bits"
endif
if d.b(ad:0xfffb9800+0x0c)!=0xbf
rgroup 0x14++0x00
line.byte 0x00 "LSR,UART Mode Line Status Register"
bitfld.byte 0x00 7. " RX_FIFO_STS ,At least one parity error, framing error or break indication in the receiver FIFO" "No error,Error"
bitfld.byte 0x00 6. " TX_SR_E ,Transmitter hold and shift registers are empty" "Not empty,Empty"
textline " "
bitfld.byte 0x00 5. " TX_FIFO_E ,Transmitter hold register is empty" "Not empty,Empty"
bitfld.byte 0x00 4. " RX_BI ,A break was detected while the data being read from the RX FIFO was being received" "No break,Break"
textline " "
bitfld.byte 0x00 3. " RX_FE ,Frame error occured in data being read from RX FIFO" "No error,Error"
bitfld.byte 0x00 2. " RX_PE ,Parity error in data being read from RX FIFO" "No error,Error"
textline " "
bitfld.byte 0x00 1. " RX_OE ,Overrun error has occured" "No error,Error"
bitfld.byte 0x00 0. " RX_FIFO_E ,At least one data character in the RX_FIFO" "Empty,Not empty"
else
rgroup 0x14++0x00
hide.byte 0x00 "LSR,UART Mode Line Status Register"
endif
rgroup 0x44++0x00
line.byte 0x00 "SSR,Supplementary Status Register"
bitfld.byte 0x00 1. " RX_CTS_DSR_WAKE_UP_STS ,A falling edge occured on RX, /CTS or /DSR" "No falling edge,Falling edge"
bitfld.byte 0x00 0. " TX_FIFO_FULL ,TX FIFO full" "Not full,Full"
if d.b(ad:0xfffb9800+0x0c)!=0xbf
group 0x10++0x00
line.byte 0x00 "MCR,Modem Control Register"
bitfld.byte 0x00 7. " CLKSEL ,Divide clock input by 4" "Not divided,Divided"
bitfld.byte 0x00 6. " TCR_TLR ,Enables access to the TCR and TLR registers" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 5. " XON_EN ,Enable XON any function" "Disabled,Enabled"
bitfld.byte 0x00 4. " LOOPBACK_EN ,Enable local loop-back mode (internal)" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 3. " CD_STS_CH ,In loopback mode forces IRQ output to inactive state" "Not forced,Forced"
bitfld.byte 0x00 1. " RTS ,Forces /RTS output to active" "Inactive,Active"
textline " "
bitfld.byte 0x00 0. " DTR ,Forces /DTR output to active" "Inactive,Active"
rgroup 0x18++0x00
line.byte 0x00 "MSR,Modem Status Register"
bitfld.byte 0x00 5. " NDSR_STS ,Complement of the /DSR input" "Low,High"
bitfld.byte 0x00 4. " NCTS_STS ,Complement of the /CTS input" "Low,High"
textline " "
bitfld.byte 0x00 1. " DSR_STS ,/DSR input has changed state" "Not changed,Changed"
bitfld.byte 0x00 0. " CTS_STS ,/CTS input has changed state" "Not changed,Changed"
else
rgroup 0x10++0x00
hide.byte 0x00 "MCR,Modem Control Register"
textline " "
textline " "
textline " "
rgroup 0x18++0x00
hide.byte 0x00 "MSR,Modem Status Register"
endif
if ((d.b(ad:0xfffb9800+0x0c)&0x80)==0x00)&&((d.b(ad:0xfffb9800+0x20)&0x07)==0x00)
group 0x04++0x00
line.byte 0x00 "IER,UART Mode Interrupt Enable Register"
bitfld.byte 0x00 7. " CTS_IT ,Enables the /CTS interrupt" "Disable,Enabled"
bitfld.byte 0x00 6. " RTS_IT ,Enables the /RTS interrupt" "Disable,Enabled"
textline " "
bitfld.byte 0x00 5. " XOFF_IT ,Enables the XOFF interrupt" "Disable,Enabled"
bitfld.byte 0x00 4. " SLEEP_MODE ,Enables sleep mode" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 3. " MODEM_STS_IT ,Enables the modem status register interrupt" "Disabled,Enabled"
bitfld.byte 0x00 2. " LINE_STS_IT ,Enables the receiver line status interrupt" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 1. " THR_IT ,Enables the THR interrupt" "Disabled,Enabled"
bitfld.byte 0x00 0. " RHR_IT ,Enables the RHR interrupt and time-out interrupt" "Disabled,Enabled"
rgroup 0x08++0x00
line.byte 0x00 "IIR,UART Mode Interrupt Identification Register"
bitfld.byte 0x00 6.--7. " FCR_MIRROR ,Mirror the contents of FCR[0] on both bits" "00,01,10,11"
bitfld.byte 0x00 1.--5. " IT_TYPE ," "0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f"
textline " "
bitfld.byte 0x00 0. " IT_PENDING ,An interrupt is pending" "Pending,Not pending"
elif ((d.b(ad:0xfffb9800+0x0c)&0x80)==0x00)&&((d.b(ad:0xfffb9800+0x20)&0x07)==0x01)
group 0x04++0x00
line.byte 0x00 "IER,UART Mode Interrupt Enable Register"
bitfld.byte 0x00 7. " EOF_IT ,Enables the received EOF interrupt" "Disabled,Enabled"
bitfld.byte 0x00 6. " LINE_STS_IT ,Enables the receiver line status interrupt" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 5. " TX_UNDERRUN_IT ,Enables the TX underrun interrupt" "Disabled,Enabled"
bitfld.byte 0x00 4. " STS_FIFO_TRIG_IT ,Enables status FIFO trigger level interrupt" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 3. " RX_OVERRUN_IT ,Enables the RX overrun interrupt" "Disabled,Enabled"
bitfld.byte 0x00 2. " LAST_RX_BYTE_IT ,Enables the last byte of frame in RX FIFO interrupt" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 1. " THR_IT ,Enables the THR interrupt" "Disabled,Enabled"
bitfld.byte 0x00 0. " RHR_IT ,Enables the RHR interrupt and time-out interrupt" "Disabled,Enabled"
rgroup 0x08++0x00
line.byte 0x00 "IIR,UART Mode Interrupt Identification Register"
bitfld.byte 0x00 7. " EOF_IT ,Received EOF interrupt active" "Inactive,Active"
bitfld.byte 0x00 6. " LINE_STS_IT ,Receiver line status interrupt active" "Inactive,Active"
textline " "
bitfld.byte 0x00 5. " TX_UE_IT ,TX underrun interrupt active" "Inactive,Active"
bitfld.byte 0x00 4. " STS_FIFO_IT ,Status FIFO trigger level interrupt active" "Inactive,Active"
textline " "
bitfld.byte 0x00 3. " RX_OE_IT ,RX overrun interrupt active" "Inactive,Active"
bitfld.byte 0x00 2. " RX_FIFO_LAST_BYTE_IT ,Last byte of frame in RX FIFO interrupt active" "Inactive,Active"
textline " "
bitfld.byte 0x00 1. " THR_IT ,THR interrupt active" "Inactive,Active"
bitfld.byte 0x00 0. " RHR_IT ,RHR interrupt active" "Inactive,Active"
else
rgroup 0x04++0x00
hide.byte 0x00 "IER,UART Mode Interrupt Enable Register"
textline " "
textline " "
textline " "
rgroup 0x08++0x00
hide.byte 0x00 "IIR,UART Mode Interrupt Identification Register"
endif
if d.b(ad:0xfffb9800+0x0c)==0xbf
group 0x08++0x00
line.byte 0x00 "EFR,Enhanced Feature Register"
bitfld.byte 0x00 7. " AUTO_CTS_EN ,Automatic CTS enable bit" "Disabled,Enabled"
bitfld.byte 0x00 6. " AUTO_RTS_EN ,Automatic RTS enable bit" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 5. " SPECIAL_CHAR_DETECT ,Special char detect enable" "Disabled,Enabled"
bitfld.byte 0x00 4. " ENHANCED_EN ,Enhanced functions write enable bit" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 2.--3. " SW_FLOW_CONTROL_TX ,Software flow control (TX)" "Disabled,XON/XOFF 2,XON/XOFF 1,XON/XOFF 1/2"
bitfld.byte 0x00 0.--1. " SW_FLOW_CONTROL_RX ,Software flow control (RX)" "Disabled,XON/XOFF 2,XON/XOFF 1,XON/XOFF 1/2"
group 0x10++0x0c
line.byte 0x00 "XON1/ADDR1,XON/Address Register 1"
hexmask.byte.byte 0x00 0.--7. 1. " XON_WORD1 ,Used to store 8-bit XON1 character"
line.byte 0x04 "XON2/ADDR2,XON/Address Register 2"
hexmask.byte.byte 0x04 0.--7. 1. " XON_WORD2 ,Used to store 8-bit XON2 character"
line.byte 0x08 "XOFF1,XOFF1 Register"
hexmask.byte.byte 0x08 0.--7. 1. " XOFF_WORD1 ,Used to store 8-bit XOFF1 character"
line.byte 0x0c "XOFF2,XOFF2 Register"
hexmask.byte.byte 0x0C 0.--7. 1. " XOFF_WORD2 ,Used to store 8-bit XOFF2 character"
else
rgroup 0x08++0x00
hide.byte 0x00 "EFR,Enhanced Feature Register"
textline " "
textline " "
rgroup 0x10++0x0c
hide.byte 0x00 "XON1/ADDR1,XON/Address Register 1"
hide.byte 0x04 "XON2/ADDR2,XON/Address Register 2"
hide.byte 0x08 "XOFF1,XOFF1 Register"
hide.byte 0x0c "XOFF2,XOFF2 Register"
endif
if d.b(ad:0xfffb9800+0x0c)!=0xbf
group 0x1c++0x00
line.byte 0x00 "SPR,Scratchpad Register"
hexmask.byte.byte 0x00 0.--7. 1. " SPR_WORD ,Scratchpad register"
else
rgroup 0x1c++0x00
hide.byte 0x00 "SPR,Scratchpad Register"
endif
if (d.b(ad:0xfffb9800+0x0c)&0x80)==0x80
group 0x00++0x04
line.byte 0x00 "DLL,Divisor Latch Low Register"
hexmask.byte.byte 0x00 0.--7. 1. " CLOCK_LSB ,Used to store 8-bit LSB divisor value"
line.byte 0x04 "DLH,Divisor Latch High Register"
hexmask.byte.byte 0x04 0.--7. 1. " CLOCK_MSB ,Used to store 8-bit MSB divisor value"
else
rgroup 0x00++0x04
hide.byte 0x00 "DLL,Divisor Latch Low Register"
hide.byte 0x04 "DLH,Divisor Latch High Register"
endif
group 0x18++0x0c
line.byte 0x00 "TCR,Transmission Control Register"
bitfld.byte 0x00 4.--7. " RX_FIFO_TRIG_START ,RCV FIFO trigger level to RESTORE transmission" "0,4,8,12,16,20,24,28,32,36,40,44,48,52,56,60"
bitfld.byte 0x00 0.--3. " RX_FIFO_TRIG_HALT ,RCV FIFO trigger level to HALT transmission" "0,4,8,12,16,20,24,28,32,36,40,44,48,52,56,60"
line.byte 0x04 "TLR,Trigger Level Register"
bitfld.byte 0x04 4.--7. " RX_FIFO_TRIG_DMA ,Receive FIFO trigger level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.byte 0x04 0.--3. " TX_FIFO_TRIG_DMA ,Transmit FIFO trigger level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.byte 0x08 "MDR1,Mode Definition Register 1"
bitfld.byte 0x08 7. " FRAME_END_MODE ," "Frame-length,Set EOT bit"
bitfld.byte 0x08 5. " SCT ,Stores and controls the transmission" "On THR write,ACREG2 controlled"
textline " "
bitfld.byte 0x08 3. " IR_SLEEP ,Sleep mode enable" "Disabled,Enabled"
bitfld.byte 0x08 0.--2. " MODE_SELECT ," "UART,SIR,Reserved,Reserved,Reserved,Reserved,Reserved,Disabled"
line.byte 0x0c "MDR2,Mode Definition Register 2"
bitfld.byte 0x0c 3.--4. " DIV_1.6M ,MSB part of DIV_1.6" "0,1,2,3"
bitfld.byte 0x0c 1.--2. " STS_FIFO_TRIG ,Frame status FIFO threshold select" "1 entry,3 entry,7 entry,8 entry"
wgroup 0x28++0x0c
line.byte 0x00 "TXFLL,Transmit Frame Length Low Register"
hexmask.byte.byte 0x00 0.--7. 1. " TXFLL ,LSB register used to specify the frame length"
line.byte 0x04 "TXFLH,"
hexmask.byte 0x04 0.--4. 1. " TXFLH ,MSB register used to specify the frame length"
line.byte 0x08 "RXFLL,"
hexmask.byte.byte 0x08 0.--7. 1. " RXFLL ,LSB register used to specify the frame length in reception"
line.byte 0x0c "RXFLH,"
hexmask.byte 0x0c 0.--3. 1. " RXFLH ,MSB register used to specify the frame length in reception"
rgroup 0x28++0x0c
line.byte 0x00 "SFLSR,Status FIFO Line Status Register"
bitfld.byte 0x00 4. " OE_ERROR ,Overrun error in RX FIFO when frame at top of FIFO was received" "No error,Error"
bitfld.byte 0x00 3. " FRAME_LENGTH_ERROR ,Frame-length error in frame at top of FIFO" "No error,Error"
textline " "
bitfld.byte 0x00 2. " ABORT_DETECT ,Abort pattern detected in frame at top FIFO" "No abort,Abort"
bitfld.byte 0x00 1. " CRC_ERROR ,CRC error in frame at top of FIFO" "No error,Error"
hide.byte 0x04 "RESUME,Resume Register"
in
line.byte 0x08 "SFREGL,Status FIFO Register Low"
hexmask.byte.byte 0x08 0.--7. 1. " SFREGL ,LSB part of the frame length"
line.byte 0x0c "SFREGH,Status FIFO Register High"
hexmask.byte 0x0c 0.--3. 1. " SFREGH ,MSB part of the frame length"
if (d.b(ad:0xfffb9800+0x0c)&0x80)==0x00
group 0x38++0x00
line.byte 0x00 "BLR,BOF Control Register"
bitfld.byte 0x00 7. " STS_FIFO_RESET ,Status FIFO reset" "No reset,Reset"
bitfld.byte 0x00 6. " XBOF_TYPE ,SIR XBOF select" "0xFF,0xC0"
group 0x48++0x00
line.byte 0x00 "EBLR,BOF Length Register"
hexmask.byte.byte 0x00 0.--7. 1. " EBLR ,Allows definition of up to 176 XBOFs"
else
rgroup 0x38++0x00
hide.byte 0x00 "BLR,BOF Control Register"
rgroup 0x48++0x00
hide.byte 0x00 "EBLR,BOF Length Register"
endif
if (d.b(ad:0xfffb9800+0x0c)&0x80)==0x80
group 0x3c++0x00
line.byte 0x00 "DIV1.6,DIV1.6 Register"
hexmask.byte.byte 0x00 0.--7. 1. " DIV_1.6L ,Used to generate the 1.6-us pulse"
else
rgroup 0x3c++0x00
hide.byte 0x00 "DIV1.6,DIV1.6 Register"
endif
if (d.b(ad:0xfffb9800+0x0c)&0x80)==0x00
group 0x3c++0x00
line.byte 0x00 "ACREG,Auxiliary Control Register"
bitfld.byte 0x00 7. " PULSE_TYPE ,SIR pulse-width select" "3/16 pulse width,1.6 us"
bitfld.byte 0x00 6. " SD_MOD ,Primary output used to configure transceivers" "High,Low"
textline " "
bitfld.byte 0x00 5. " DIS_IR_RX ,Disables RXIR input for half-duplex purpose" "Enabled,Disabled"
bitfld.byte 0x00 4. " DIX_TX_UNDERRUN ,Long stop bits can be transmitted, TX underrun is disabled" "Enabled,Disabled"
textline " "
bitfld.byte 0x00 2. " SCTX_EN ,Store and controlled TX start" "No start,Start"
bitfld.byte 0x00 1. " ABORT_EN ,Frame abort" "No abort,Abort"
textline " "
bitfld.byte 0x00 0. " EOT_EN ,EOT (end of transmission) bit" "No EOT,EOT"
else
rgroup 0x3c++0x00
hide.byte 0x00 "ACREG,Auxiliary Control Register"
endif
if (d.b(ad:0xfffb9800+0x0c)&0x80)==0x00
wgroup 0x4c++0x00
line.byte 0x00 "OSC_12M_SEL,OSC_12_MHz Register Select"
bitfld.byte 0x00 0. " OSC_12M_SEL ,Selects 6.5 division factor with a 12-MHz system clock" "Not selected,Selected"
else
rgroup 0x4c++0x00
hide.byte 0x00 "OSC_12M_SEL,OSC_12_MHz Register Select"
endif
rgroup 0x50++0x00
line.byte 0x00 "MVR,Module Version Register"
hexmask.byte 0x00 4.--7. 1. " MAJOR_REV ,Major revision number of the module"
hexmask.byte 0x00 0.--3. 1. " MINOR_REV ,Minor revision number of the module"
tree.end
tree "TIPB Switch"
width 13.
base ad:0xfffbc800
group 0x0++0x05 "UART1"
line.word 0x00 "RHSW_ARM_CNF,TIPB switch configuration"
bitfld.word 0x00 1. " DSP_PERIPH_LOCK ," "No lock,DSP bus allocated"
bitfld.word 0x00 0. " ARM_PERIPH_LOCK ," "No lock,MPU bus allocated"
line.word 0x04 "RHSW_ARM_STA,TIPB switch status"
bitfld.word 0x04 3. " RHSW_BOTH_LCK_ERR ," "Normal operation,Lock error"
bitfld.word 0x04 2. " RHSW_ITPEND_ERR ," "Normal operation,DMA request error"
textline " "
bitfld.word 0x04 1. " RHSW_DMAREQ_ERR ," "Normal operation,IT pending error"
bitfld.word 0x04 0. " RHSW_ERR_NIRQ ,Clears IRQ line and all other status bits of register" "Cleared,Normal operation"
group 0x40++0x05 "UART2"
line.word 0x00 "RHSW_ARM_CNF,TIPB switch configuration"
bitfld.word 0x00 1. " DSP_PERIPH_LOCK ," "No lock,DSP bus allocated"
bitfld.word 0x00 0. " ARM_PERIPH_LOCK ," "No lock,MPU bus allocated"
line.word 0x04 "RHSW_ARM_STA,TIPB switch status"
bitfld.word 0x04 3. " RHSW_BOTH_LCK_ERR ," "Normal operation,Lock error"
bitfld.word 0x04 2. " RHSW_ITPEND_ERR ," "Normal operation,DMA request error"
textline " "
bitfld.word 0x04 1. " RHSW_DMAREQ_ERR ," "Normal operation,IT pending error"
bitfld.word 0x04 0. " RHSW_ERR_NIRQ ,Clears IRQ line and all other status bits of register" "Cleared,Normal operation"
group 0x80++0x05 "UART3"
line.word 0x00 "RHSW_ARM_CNF,TIPB switch configuration"
bitfld.word 0x00 1. " DSP_PERIPH_LOCK ," "No lock,DSP bus allocated"
bitfld.word 0x00 0. " ARM_PERIPH_LOCK ," "No lock,MPU bus allocated"
line.word 0x04 "RHSW_ARM_STA,TIPB switch status"
bitfld.word 0x04 3. " RHSW_BOTH_LCK_ERR ," "Normal operation,Lock error"
bitfld.word 0x04 2. " RHSW_ITPEND_ERR ," "Normal operation,DMA request error"
textline " "
bitfld.word 0x04 1. " RHSW_DMAREQ_ERR ," "Normal operation,IT pending error"
bitfld.word 0x04 0. " RHSW_ERR_NIRQ ,Clears IRQ line and all other status bits of register" "Cleared,Normal operation"
tree.end
tree.end
tree "Universal Serial Bus (USB) Function Module"
width 11.
base ad:0xfffb4000
rgroup 0x00++0x01
line.word 0x00 "REV,Revision"
hexmask.word.byte 0x00 0.--7. 1. " REV_NB ,Revision number"
group 0x04++0x01 "Endpoint"
line.word 0x00 "EP_NUM,Endpoint Selection Register"
bitfld.word 0x00 6. " SETUP_SEL ,Setup FIFO select" "No access,Access permitted"
bitfld.word 0x00 5. " EP_SEL ,TX/RX FIFO select" "No access,Access permitted"
textline " "
bitfld.word 0x00 0.--3. " EP_NUM ,Endpoint number" "EP0,EP1,EP2,EP3,EP4,EP5,EP6,EP7,EP8,EP9,EP10,EP11,EP12,EP13,EP14,EP15"
bitfld.word 0x00 4. " EP_DIR ,Endpoint direction" "OUT endpoint,IN endpoint"
hgroup 0x08++0x01
hide.word 0x00 "DATA,Data Register"
in
wgroup 0x0C++0x01
line.word 0x00 "CTRL,Control Register"
bitfld.word 0x00 7. " CLR_HALT ,Clear halt endpoint" "No action,Clear halt"
bitfld.word 0x00 6. " SET_HALT ,Set halt endpoint" "No action,Halt"
textline " "
bitfld.word 0x00 2. " SET_FIFO_EN ,Set FIFO enable" "No action,Enable"
bitfld.word 0x00 1. " CLR_EP ,Clear endpoint" "No action,Clear"
textline " "
bitfld.word 0x00 0. " RESET_EP ,Endpoint reset" "No action,Reset"
rgroup 0x10++0x05
line.word 0x00 "STAT_FLG,Status Register"
bitfld.word 0x00 14. " MISS_IN ,Isochronous missed IN token for the previous frame" "Received,Missed"
bitfld.word 0x00 13. " DATA_FLUSH ,Isochronous receive data flush" "Not significant,Flushed"
textline " "
bitfld.word 0x00 12. " ISO_ERR ,Isochronous receive data error" "Not significant,Error"
bitfld.word 0x00 9. " ISO_FIFO_EMPTY ,Isochronous FIFO empty" "Not empty,Empty"
textline " "
bitfld.word 0x00 8. " ISO_FIFO_FULL ,Isochronous FIFO full" "Not full,Full"
bitfld.word 0x00 6. " EP_HALTED ,Endpoint halted flag" "Not halted,Halted"
textline " "
bitfld.word 0x00 5. " STALL ,Transaction stall" "No STALL returned,STALL returned"
bitfld.word 0x00 4. " NAK ,Transaction non-acknowledge" "No NAK returned,NAK returned"
textline " "
bitfld.word 0x00 3. " ACK ,Transaction acknowledge" "No ACK returned,ACK returned"
bitfld.word 0x00 2. " FIFO_EN ,FIFO enable status" "Disabled,Enabled"
textline " "
bitfld.word 0x00 1. " NON_ISO_FIFO_EMPTY ,Non-isochronous FIFO empty" "Not empty,Empty"
bitfld.word 0x00 0. " NON_ISO_FIFO_FULL ,Non-isochronous FIFO full" "Not full,Full"
line.word 0x04 "RXFSTAT,Receive FIFO Status Register"
hexmask.word 0x04 0.--9. 1. " RXF_COUNT ,Receive FIFO byte count"
group 0x18++0x01
line.word 0x00 "SYSCON1,System configuration 1"
bitfld.word 0x00 8. " CFG_LOCK ,Device configuration locked" "Not locked,Locked"
bitfld.word 0x00 4. " NAK_EN ,NAK enable" "Disabled,Enabled"
textline " "
bitfld.word 0x00 2. " SELF_PWR ,Self-powered" "Bus-powered,Self-powered"
bitfld.word 0x00 1. " SOFF_DIS ,Shutoff disable" "Enabled,Disabled"
textline " "
bitfld.word 0x00 0. " PULLUP_EN ,External pullup enable" "Disabled,Enabled"
wgroup 0x1c++0x01
line.word 0x00 "SYSCON2,System configuration 2"
bitfld.word 0x00 6. " RMT_WKP ,Remote wake-up" "No action,Wake-up"
bitfld.word 0x00 5. " STALL_CMD ,Stall command" "No action,Stall"
textline " "
bitfld.word 0x00 3. " DEV_CFG ,Device configured" "No action,Allows CFG set"
bitfld.word 0x00 2. " CLR_CFG ,Clear configured" "No action,Allows CFG clear"
rgroup 0x20++0x05
line.word 0x00 "DEVSTAT,Device status"
bitfld.word 0x00 6. " R_WK_OK ,Remote wake-up granted" "Not significant,Granted"
bitfld.word 0x00 5. " USB_RESET ,USB reset signaling is active" "No reset,Reset"
textline " "
bitfld.word 0x00 4. " SUS ,Suspended state" "Not suspended,Suspended"
bitfld.word 0x00 3. " CFG ,Configured state" "Not configured,Configured"
textline " "
bitfld.word 0x00 2. " ADD ,Addressed state" "Not addressed,Addressed"
bitfld.word 0x00 1. " DEF ,Default state" "Not in default,Default"
textline " "
bitfld.word 0x00 0. " ATT ,Attached state" "Not attached,Attached"
line.word 0x04 "SOF,Start of frame"
bitfld.word 0x04 12. " FT_LOCK ,Frame timer locked" "Not locked,Locked"
bitfld.word 0x04 11. " TS_OK ,Time stamp OK" "Invalid,Valid"
textline " "
hexmask.word 0x04 0.--10. 1. " TS ,Time stamp number"
group 0x28++0x09
line.word 0x00 "IRQ_EN,Interrupt enable"
bitfld.word 0x00 7. " SOFT_IE ,Start-of-frame interrupt enable" "Disabled,Enabled"
bitfld.word 0x00 5. " EPn_RX_IE ,Receive endpoint n interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x00 4. " EPn_TX_IE ,Transmit endpoint n interrupt enable" "Disabled,Enabled"
bitfld.word 0x00 3. " DS_CHG_IE ,Device state changed interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x00 0. " EP0_IE ,EP0 transactions interrupt enable" "Disabled,Enabled"
line.word 0x04 "DMA_IRQ_EN,DMA interrupt enable"
bitfld.word 0x04 10. " TX2_DONE_IE ,Tranmit DMA channel 2 done interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 9. " RX2_CNT_IE ,Receivce DMA channel 2 transactions count interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x04 8. " RX2_EOT_IE ,Receive DMA channel 2 end of transfer interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 6. " TX1_DONE_IE ,Transmit DMA channel 1 done interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x04 5. " RX1_CNT_IE ,Receive DMA channel 1 transactions count interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 4. " RX1_EOT_IE ,Receive DMA channel 1 end of transfer interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x04 2. " TX0_DONE_IE ,Transmit DMA channel 0 done interrupt enable" "Disabled,Enabled"
bitfld.word 0x04 1. " RX0_CNT_IE ,Receive DMA channel 0 transactions count interrupt enable" "Disabled,Enabled"
textline " "
bitfld.word 0x04 0. " RX0_EOT_IE ,Receive DMA channel 0 end of transfer interrupt enable" "Disabled,Enabled"
line.word 0x08 "IRQ_SRC,Interrupt source"
eventfld.word 0x08 10. " TXn_DONE ,Transmit DMA channel n done interrupt flag" "No interrupt,Interrupt"
eventfld.word 0x08 9. " RXn_CNT ,Receive DMA channel n transactions count interrupt flag" "No interrupt,Interrupt"
textline " "
eventfld.word 0x08 7. " SOF ,Start-of-frame interrupt flag" "No interrupt,Interrupt"
eventfld.word 0x08 5. " EPn_RX ,EPn OUT transactions interrupt flag" "No interrupt,Interrupt"
textline " "
eventfld.word 0x08 4. " EPn_TX ,EPn IN transactions interrupt flag" "No interrupt,Interrupt"
eventfld.word 0x08 3. " DS_CHG ,Device state changed interrupt flag" "No interrupt,Interrupt"
textline " "
bitfld.word 0x08 2. " SETUP ,Setup transaction interrupt flag" "No interrupt,Interrupt"
eventfld.word 0x08 1. " EP0_RX ,EP0 OUT transactions interrupt flag" "No interrupt,Interrupt"
textline " "
eventfld.word 0x08 0. " EP0_TX ,EP0 IN transactions interrupt flag" "No interrupt,Interrupt"
rgroup 0x34++0x05
line.word 0x00 "EPN_STAT,Endpoint interrupt status"
bitfld.word 0x00 8.--11. " EPn_RX_IT_SRC ,Receive endpoint interrupt source" "None,EP1,EP2,EP3,EP4,EP5,EP6,EP7,EP8,EP9,EP10,EP11,EP12,EP13,EP14,EP15"
bitfld.word 0x00 0.--3. " EPn_TX_IT_SRC ,Transmit endpoint interrupt source" "None,EP1,EP2,EP3,EP4,EP5,EP6,EP7,EP8,EP9,EP10,EP11,EP12,EP13,EP14,EP15"
line.word 0x04 "DMAN_STAT,DMA endpoint interrupt status"
bitfld.word 0x04 12. " DMAn_RX_SB ,DMA receive single byte" "?..."
bitfld.word 0x04 8.--11. " DMAn_RX_IT_SRC ,DMA receive interrupt source" "None,EP1,EP2,EP3,EP4,EP5,EP6,EP7,EP8,EP9,EP10,EP11,EP12,EP13,EP14,EP15"
textline " "
bitfld.word 0x04 0.--3. " DMAn_TX_IT_SRC ,DMA transmit interrupt source" "None,EP1,EP2,EP3,EP4,EP5,EP6,EP7,EP8,EP9,EP10,EP11,EP12,EP13,EP14,EP15"
group 0x40++0x05 "DMA Configuration"
line.word 0x00 "RXDMA_CFG,Receive channels DMA configuration"
bitfld.word 0x00 8.--11. " RXDMA2_EP ,Receive endpoint number for DMA channel 2" "None,EP1,EP2,EP3,EP4,EP5,EP6,EP7,EP8,EP9,EP10,EP11,EP12,EP13,EP14,EP15"
bitfld.word 0x00 4.--7. " RXDMA1_EP ,Receive endpoint number for DMA channel 1" "None,EP1,EP2,EP3,EP4,EP5,EP6,EP7,EP8,EP9,EP10,EP11,EP12,EP13,EP14,EP15"
textline " "
bitfld.word 0x00 0.--3. " RXDMA0_EP ,Receive endpoint number for DMA channel 0" "None,EP1,EP2,EP3,EP4,EP5,EP6,EP7,EP8,EP9,EP10,EP11,EP12,EP13,EP14,EP15"
line.word 0x04 "TXDMA_CFG,Transmit channels DMA configuration"
bitfld.word 0x04 8.--11. " TXDMA2_EP ,Transmit endpoint number for DMA channel 2" "None,EP1,EP2,EP3,EP4,EP5,EP6,EP7,EP8,EP9,EP10,EP11,EP12,EP13,EP14,EP15"
bitfld.word 0x04 4.--7. " TXDMA1_EP ,Transmit endpoint number for DMA channel 1" "None,EP1,EP2,EP3,EP4,EP5,EP6,EP7,EP8,EP9,EP10,EP11,EP12,EP13,EP14,EP15"
textline " "
bitfld.word 0x04 0.--3. " TXDMA0_EP ,Transmit endpoint number for DMA channel 0" "None,EP1,EP2,EP3,EP4,EP5,EP6,EP7,EP8,EP9,EP10,EP11,EP12,EP13,EP14,EP15"
hgroup 0x48++0x1
hide.word 0x00 "DATA_DMA,DMA FIFO data"
in
group 0x50++0x19
line.word 0x0 "TXDMA0,Transmit DMA control 0"
bitfld.word 0x0 15. " TX0_EOT ,Transmit DMA channel 0 end of transfer" "Size in buffers,Size in bytes"
bitfld.word 0x0 14. " TX0_START ,Transmit DMA channel 0 start" "No action,Start"
textline " "
hexmask.word 0x0 0.--9. 1. " TX0_TSC ,Transmit DMA channel 0 transfer size counter"
line.word 0x4 "TXDMA1,Transmit DMA control 1"
bitfld.word 0x4 15. " TX1_EOT ,Transmit DMA channel 1 end of transfer" "Size in buffers,Size in bytes"
bitfld.word 0x4 14. " TX1_START ,Transmit DMA channel 1 start" "No action,Start"
textline " "
hexmask.word 0x4 0.--9. 1. " TX1_TSC ,Transmit DMA channel 1 transfer size counter"
line.word 0x8 "TXDMA2,Transmit DMA control 2"
bitfld.word 0x8 15. " TX2_EOT ,Transmit DMA channel 2 end of transfer" "Size in buffers,Size in bytes"
bitfld.word 0x8 14. " TX2_START ,Transmit DMA channel 2 start" "No action,Start"
textline " "
hexmask.word 0x8 0.--9. 1. " TX2_TSC ,Transmit DMA channel 2 transfer size counter"
line.word 0x10 "RXDMA0,Receive DMA control 0"
bitfld.word 0x10 15. " RX0_STOP ,Receive DMA channel 0 transfer stop" "No stop,Stop"
hexmask.word.byte 0x10 0.--7. 1. " RX0_TC ,Receive DMA channel 0 transactions count"
line.word 0x14 "RXDMA1,Receive DMA control 1"
bitfld.word 0x14 15. " RX1_STOP ,Receive DMA channel 1 transfer stop" "No stop,Stop"
hexmask.word.byte 0x14 0.--7. 1. " RX1_TC ,Receive DMA channel 1 transactions count"
line.word 0x18 "RXDMA2,Receive DMA control 2"
bitfld.word 0x18 15. " RX2_STOP ,Receive DMA channel 2 transfer stop" "No stop,Stop"
hexmask.word.byte 0x18 0.--7. 1. " RX2_TC ,Receive DMA channel 2 transactions count"
group 0x80++0x01 "Endpoint Configuration"
line.word 0x00 "EP0,Endpoint configuration 0"
bitfld.word 0x00 12.--13. " EP0_SIZE ,Endpoint 0 FIFO size" "8 bytes,16 bytes,32 bytes,64 bytes"
hexmask.word 0x00 0.--10. 1. " EP0_PTR ,Endpoint 0 pointer"
if (d.w(ad:0xfffb4000+0x84)&0x0800)==0x0000
group 0x84++0x01
line.word 0x00 "EP1_RX,Receive endpoint configuration 1"
bitfld.word 0x00 15. " EP1_RX_VALID ,Receive endpoint 1 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP1_RX_SIZE ,Receive endpoint 1 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP1_RX_ISO ,Receive isochronous endpoint 1" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP1_RX_PTR ,Receive endpoint $n pointer"
else
group 0x84++0x01
line.word 0x00 "EP1_RX,Receive endpoint configuration 1"
bitfld.word 0x00 15. " EP1_RX_VALID ,Receive endpoint 1 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP1_RX_DB ,Receive non-isochronous endpoint 1 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP1_RX_SIZE ,Receive endpoint 1 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP1_RX_ISO ,Receive isochronous endpoint 1" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP1_RX_PTR ,Receive endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0x88)&0x0800)==0x0000
group 0x88++0x01
line.word 0x00 "EP2_RX,Receive endpoint configuration 2"
bitfld.word 0x00 15. " EP2_RX_VALID ,Receive endpoint 2 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP2_RX_SIZE ,Receive endpoint 2 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP2_RX_ISO ,Receive isochronous endpoint 2" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP2_RX_PTR ,Receive endpoint $n pointer"
else
group 0x88++0x01
line.word 0x00 "EP2_RX,Receive endpoint configuration 2"
bitfld.word 0x00 15. " EP2_RX_VALID ,Receive endpoint 2 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP2_RX_DB ,Receive non-isochronous endpoint 2 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP2_RX_SIZE ,Receive endpoint 2 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP2_RX_ISO ,Receive isochronous endpoint 2" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP2_RX_PTR ,Receive endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0x8C)&0x0800)==0x0000
group 0x8C++0x01
line.word 0x00 "EP3_RX,Receive endpoint configuration 3"
bitfld.word 0x00 15. " EP3_RX_VALID ,Receive endpoint 3 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP3_RX_SIZE ,Receive endpoint 3 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP3_RX_ISO ,Receive isochronous endpoint 3" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP3_RX_PTR ,Receive endpoint $n pointer"
else
group 0x8C++0x01
line.word 0x00 "EP3_RX,Receive endpoint configuration 3"
bitfld.word 0x00 15. " EP3_RX_VALID ,Receive endpoint 3 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP3_RX_DB ,Receive non-isochronous endpoint 3 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP3_RX_SIZE ,Receive endpoint 3 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP3_RX_ISO ,Receive isochronous endpoint 3" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP3_RX_PTR ,Receive endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0x90)&0x0800)==0x0000
group 0x90++0x01
line.word 0x00 "EP4_RX,Receive endpoint configuration 4"
bitfld.word 0x00 15. " EP4_RX_VALID ,Receive endpoint 4 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP4_RX_SIZE ,Receive endpoint 4 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP4_RX_ISO ,Receive isochronous endpoint 4" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP4_RX_PTR ,Receive endpoint $n pointer"
else
group 0x90++0x01
line.word 0x00 "EP4_RX,Receive endpoint configuration 4"
bitfld.word 0x00 15. " EP4_RX_VALID ,Receive endpoint 4 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP4_RX_DB ,Receive non-isochronous endpoint 4 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP4_RX_SIZE ,Receive endpoint 4 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP4_RX_ISO ,Receive isochronous endpoint 4" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP4_RX_PTR ,Receive endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0x94)&0x0800)==0x0000
group 0x94++0x01
line.word 0x00 "EP5_RX,Receive endpoint configuration 5"
bitfld.word 0x00 15. " EP5_RX_VALID ,Receive endpoint 5 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP5_RX_SIZE ,Receive endpoint 5 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP5_RX_ISO ,Receive isochronous endpoint 5" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP5_RX_PTR ,Receive endpoint $n pointer"
else
group 0x94++0x01
line.word 0x00 "EP5_RX,Receive endpoint configuration 5"
bitfld.word 0x00 15. " EP5_RX_VALID ,Receive endpoint 5 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP5_RX_DB ,Receive non-isochronous endpoint 5 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP5_RX_SIZE ,Receive endpoint 5 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP5_RX_ISO ,Receive isochronous endpoint 5" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP5_RX_PTR ,Receive endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0x98)&0x0800)==0x0000
group 0x98++0x01
line.word 0x00 "EP6_RX,Receive endpoint configuration 6"
bitfld.word 0x00 15. " EP6_RX_VALID ,Receive endpoint 6 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP6_RX_SIZE ,Receive endpoint 6 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP6_RX_ISO ,Receive isochronous endpoint 6" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP6_RX_PTR ,Receive endpoint $n pointer"
else
group 0x98++0x01
line.word 0x00 "EP6_RX,Receive endpoint configuration 6"
bitfld.word 0x00 15. " EP6_RX_VALID ,Receive endpoint 6 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP6_RX_DB ,Receive non-isochronous endpoint 6 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP6_RX_SIZE ,Receive endpoint 6 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP6_RX_ISO ,Receive isochronous endpoint 6" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP6_RX_PTR ,Receive endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0x9C)&0x0800)==0x0000
group 0x9C++0x01
line.word 0x00 "EP7_RX,Receive endpoint configuration 7"
bitfld.word 0x00 15. " EP7_RX_VALID ,Receive endpoint 7 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP7_RX_SIZE ,Receive endpoint 7 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP7_RX_ISO ,Receive isochronous endpoint 7" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP7_RX_PTR ,Receive endpoint $n pointer"
else
group 0x9C++0x01
line.word 0x00 "EP7_RX,Receive endpoint configuration 7"
bitfld.word 0x00 15. " EP7_RX_VALID ,Receive endpoint 7 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP7_RX_DB ,Receive non-isochronous endpoint 7 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP7_RX_SIZE ,Receive endpoint 7 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP7_RX_ISO ,Receive isochronous endpoint 7" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP7_RX_PTR ,Receive endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0xA0)&0x0800)==0x0000
group 0xA0++0x01
line.word 0x00 "EP8_RX,Receive endpoint configuration 8"
bitfld.word 0x00 15. " EP8_RX_VALID ,Receive endpoint 8 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP8_RX_SIZE ,Receive endpoint 8 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP8_RX_ISO ,Receive isochronous endpoint 8" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP8_RX_PTR ,Receive endpoint $n pointer"
else
group 0xA0++0x01
line.word 0x00 "EP8_RX,Receive endpoint configuration 8"
bitfld.word 0x00 15. " EP8_RX_VALID ,Receive endpoint 8 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP8_RX_DB ,Receive non-isochronous endpoint 8 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP8_RX_SIZE ,Receive endpoint 8 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP8_RX_ISO ,Receive isochronous endpoint 8" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP8_RX_PTR ,Receive endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0xA4)&0x0800)==0x0000
group 0xA4++0x01
line.word 0x00 "EP9_RX,Receive endpoint configuration 9"
bitfld.word 0x00 15. " EP9_RX_VALID ,Receive endpoint 9 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP9_RX_SIZE ,Receive endpoint 9 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP9_RX_ISO ,Receive isochronous endpoint 9" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP9_RX_PTR ,Receive endpoint $n pointer"
else
group 0xA4++0x01
line.word 0x00 "EP9_RX,Receive endpoint configuration 9"
bitfld.word 0x00 15. " EP9_RX_VALID ,Receive endpoint 9 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP9_RX_DB ,Receive non-isochronous endpoint 9 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP9_RX_SIZE ,Receive endpoint 9 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP9_RX_ISO ,Receive isochronous endpoint 9" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP9_RX_PTR ,Receive endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0xA8)&0x0800)==0x0000
group 0xA8++0x01
line.word 0x00 "EP10_RX,Receive endpoint configuration 10"
bitfld.word 0x00 15. " EP10_RX_VALID ,Receive endpoint 10 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP10_RX_SIZE ,Receive endpoint 10 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP10_RX_ISO ,Receive isochronous endpoint 10" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP10_RX_PTR ,Receive endpoint $n pointer"
else
group 0xA8++0x01
line.word 0x00 "EP10_RX,Receive endpoint configuration 10"
bitfld.word 0x00 15. " EP10_RX_VALID ,Receive endpoint 10 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP10_RX_DB ,Receive non-isochronous endpoint 10 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP10_RX_SIZE ,Receive endpoint 10 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP10_RX_ISO ,Receive isochronous endpoint 10" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP10_RX_PTR ,Receive endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0xAC)&0x0800)==0x0000
group 0xAC++0x01
line.word 0x00 "EP11_RX,Receive endpoint configuration 11"
bitfld.word 0x00 15. " EP11_RX_VALID ,Receive endpoint 11 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP11_RX_SIZE ,Receive endpoint 11 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP11_RX_ISO ,Receive isochronous endpoint 11" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP11_RX_PTR ,Receive endpoint $n pointer"
else
group 0xAC++0x01
line.word 0x00 "EP11_RX,Receive endpoint configuration 11"
bitfld.word 0x00 15. " EP11_RX_VALID ,Receive endpoint 11 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP11_RX_DB ,Receive non-isochronous endpoint 11 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP11_RX_SIZE ,Receive endpoint 11 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP11_RX_ISO ,Receive isochronous endpoint 11" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP11_RX_PTR ,Receive endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0xB0)&0x0800)==0x0000
group 0xB0++0x01
line.word 0x00 "EP12_RX,Receive endpoint configuration 12"
bitfld.word 0x00 15. " EP12_RX_VALID ,Receive endpoint 12 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP12_RX_SIZE ,Receive endpoint 12 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP12_RX_ISO ,Receive isochronous endpoint 12" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP12_RX_PTR ,Receive endpoint $n pointer"
else
group 0xB0++0x01
line.word 0x00 "EP12_RX,Receive endpoint configuration 12"
bitfld.word 0x00 15. " EP12_RX_VALID ,Receive endpoint 12 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP12_RX_DB ,Receive non-isochronous endpoint 12 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP12_RX_SIZE ,Receive endpoint 12 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP12_RX_ISO ,Receive isochronous endpoint 12" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP12_RX_PTR ,Receive endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0xB4)&0x0800)==0x0000
group 0xB4++0x01
line.word 0x00 "EP13_RX,Receive endpoint configuration 13"
bitfld.word 0x00 15. " EP13_RX_VALID ,Receive endpoint 13 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP13_RX_SIZE ,Receive endpoint 13 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP13_RX_ISO ,Receive isochronous endpoint 13" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP13_RX_PTR ,Receive endpoint $n pointer"
else
group 0xB4++0x01
line.word 0x00 "EP13_RX,Receive endpoint configuration 13"
bitfld.word 0x00 15. " EP13_RX_VALID ,Receive endpoint 13 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP13_RX_DB ,Receive non-isochronous endpoint 13 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP13_RX_SIZE ,Receive endpoint 13 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP13_RX_ISO ,Receive isochronous endpoint 13" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP13_RX_PTR ,Receive endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0xB8)&0x0800)==0x0000
group 0xB8++0x01
line.word 0x00 "EP14_RX,Receive endpoint configuration 14"
bitfld.word 0x00 15. " EP14_RX_VALID ,Receive endpoint 14 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP14_RX_SIZE ,Receive endpoint 14 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP14_RX_ISO ,Receive isochronous endpoint 14" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP14_RX_PTR ,Receive endpoint $n pointer"
else
group 0xB8++0x01
line.word 0x00 "EP14_RX,Receive endpoint configuration 14"
bitfld.word 0x00 15. " EP14_RX_VALID ,Receive endpoint 14 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP14_RX_DB ,Receive non-isochronous endpoint 14 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP14_RX_SIZE ,Receive endpoint 14 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP14_RX_ISO ,Receive isochronous endpoint 14" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP14_RX_PTR ,Receive endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0xBC)&0x0800)==0x0000
group 0xBC++0x01
line.word 0x00 "EP15_RX,Receive endpoint configuration 15"
bitfld.word 0x00 15. " EP15_RX_VALID ,Receive endpoint 15 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP15_RX_SIZE ,Receive endpoint 15 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP15_RX_ISO ,Receive isochronous endpoint 15" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP15_RX_PTR ,Receive endpoint $n pointer"
else
group 0xBC++0x01
line.word 0x00 "EP15_RX,Receive endpoint configuration 15"
bitfld.word 0x00 15. " EP15_RX_VALID ,Receive endpoint 15 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP15_RX_DB ,Receive non-isochronous endpoint 15 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP15_RX_SIZE ,Receive endpoint 15 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP15_RX_ISO ,Receive isochronous endpoint 15" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP15_RX_PTR ,Receive endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0xC4)&0x0800)==0x0000
group 0xC4++0x01
line.word 0x00 "EP1_TX,Transmit endpoint configuration 1"
bitfld.word 0x00 15. " EP1_TX_VALID ,Transmit endpoint 1 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP1_TX_SIZE ,Transmit endpoint 1 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP1_TX_ISO ,Transmit isochronous endpoint 1" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP1_TX_PTR ,Transmit endpoint $n pointer"
else
group 0xC4++0x01
line.word 0x00 "EP1_TX,Transmit endpoint configuration 1"
bitfld.word 0x00 15. " EP1_TX_VALID ,Transmit endpoint 1 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP1_TX_DB ,Transmit non-isochronous endpoint 1 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP1_TX_SIZE ,Transmit endpoint 1 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP1_TX_ISO ,Transmit isochronous endpoint 1" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP1_TX_PTR ,Transmit endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0xC8)&0x0800)==0x0000
group 0xC8++0x01
line.word 0x00 "EP2_TX,Transmit endpoint configuration 2"
bitfld.word 0x00 15. " EP2_TX_VALID ,Transmit endpoint 2 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP2_TX_SIZE ,Transmit endpoint 2 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP2_TX_ISO ,Transmit isochronous endpoint 2" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP2_TX_PTR ,Transmit endpoint $n pointer"
else
group 0xC8++0x01
line.word 0x00 "EP2_TX,Transmit endpoint configuration 2"
bitfld.word 0x00 15. " EP2_TX_VALID ,Transmit endpoint 2 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP2_TX_DB ,Transmit non-isochronous endpoint 2 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP2_TX_SIZE ,Transmit endpoint 2 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP2_TX_ISO ,Transmit isochronous endpoint 2" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP2_TX_PTR ,Transmit endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0xCC)&0x0800)==0x0000
group 0xCC++0x01
line.word 0x00 "EP3_TX,Transmit endpoint configuration 3"
bitfld.word 0x00 15. " EP3_TX_VALID ,Transmit endpoint 3 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP3_TX_SIZE ,Transmit endpoint 3 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP3_TX_ISO ,Transmit isochronous endpoint 3" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP3_TX_PTR ,Transmit endpoint $n pointer"
else
group 0xCC++0x01
line.word 0x00 "EP3_TX,Transmit endpoint configuration 3"
bitfld.word 0x00 15. " EP3_TX_VALID ,Transmit endpoint 3 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP3_TX_DB ,Transmit non-isochronous endpoint 3 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP3_TX_SIZE ,Transmit endpoint 3 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP3_TX_ISO ,Transmit isochronous endpoint 3" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP3_TX_PTR ,Transmit endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0xD0)&0x0800)==0x0000
group 0xD0++0x01
line.word 0x00 "EP4_TX,Transmit endpoint configuration 4"
bitfld.word 0x00 15. " EP4_TX_VALID ,Transmit endpoint 4 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP4_TX_SIZE ,Transmit endpoint 4 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP4_TX_ISO ,Transmit isochronous endpoint 4" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP4_TX_PTR ,Transmit endpoint $n pointer"
else
group 0xD0++0x01
line.word 0x00 "EP4_TX,Transmit endpoint configuration 4"
bitfld.word 0x00 15. " EP4_TX_VALID ,Transmit endpoint 4 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP4_TX_DB ,Transmit non-isochronous endpoint 4 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP4_TX_SIZE ,Transmit endpoint 4 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP4_TX_ISO ,Transmit isochronous endpoint 4" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP4_TX_PTR ,Transmit endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0xD4)&0x0800)==0x0000
group 0xD4++0x01
line.word 0x00 "EP5_TX,Transmit endpoint configuration 5"
bitfld.word 0x00 15. " EP5_TX_VALID ,Transmit endpoint 5 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP5_TX_SIZE ,Transmit endpoint 5 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP5_TX_ISO ,Transmit isochronous endpoint 5" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP5_TX_PTR ,Transmit endpoint $n pointer"
else
group 0xD4++0x01
line.word 0x00 "EP5_TX,Transmit endpoint configuration 5"
bitfld.word 0x00 15. " EP5_TX_VALID ,Transmit endpoint 5 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP5_TX_DB ,Transmit non-isochronous endpoint 5 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP5_TX_SIZE ,Transmit endpoint 5 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP5_TX_ISO ,Transmit isochronous endpoint 5" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP5_TX_PTR ,Transmit endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0xD8)&0x0800)==0x0000
group 0xD8++0x01
line.word 0x00 "EP6_TX,Transmit endpoint configuration 6"
bitfld.word 0x00 15. " EP6_TX_VALID ,Transmit endpoint 6 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP6_TX_SIZE ,Transmit endpoint 6 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP6_TX_ISO ,Transmit isochronous endpoint 6" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP6_TX_PTR ,Transmit endpoint $n pointer"
else
group 0xD8++0x01
line.word 0x00 "EP6_TX,Transmit endpoint configuration 6"
bitfld.word 0x00 15. " EP6_TX_VALID ,Transmit endpoint 6 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP6_TX_DB ,Transmit non-isochronous endpoint 6 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP6_TX_SIZE ,Transmit endpoint 6 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP6_TX_ISO ,Transmit isochronous endpoint 6" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP6_TX_PTR ,Transmit endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0xDC)&0x0800)==0x0000
group 0xDC++0x01
line.word 0x00 "EP7_TX,Transmit endpoint configuration 7"
bitfld.word 0x00 15. " EP7_TX_VALID ,Transmit endpoint 7 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP7_TX_SIZE ,Transmit endpoint 7 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP7_TX_ISO ,Transmit isochronous endpoint 7" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP7_TX_PTR ,Transmit endpoint $n pointer"
else
group 0xDC++0x01
line.word 0x00 "EP7_TX,Transmit endpoint configuration 7"
bitfld.word 0x00 15. " EP7_TX_VALID ,Transmit endpoint 7 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP7_TX_DB ,Transmit non-isochronous endpoint 7 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP7_TX_SIZE ,Transmit endpoint 7 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP7_TX_ISO ,Transmit isochronous endpoint 7" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP7_TX_PTR ,Transmit endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0xE0)&0x0800)==0x0000
group 0xE0++0x01
line.word 0x00 "EP8_TX,Transmit endpoint configuration 8"
bitfld.word 0x00 15. " EP8_TX_VALID ,Transmit endpoint 8 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP8_TX_SIZE ,Transmit endpoint 8 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP8_TX_ISO ,Transmit isochronous endpoint 8" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP8_TX_PTR ,Transmit endpoint $n pointer"
else
group 0xE0++0x01
line.word 0x00 "EP8_TX,Transmit endpoint configuration 8"
bitfld.word 0x00 15. " EP8_TX_VALID ,Transmit endpoint 8 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP8_TX_DB ,Transmit non-isochronous endpoint 8 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP8_TX_SIZE ,Transmit endpoint 8 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP8_TX_ISO ,Transmit isochronous endpoint 8" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP8_TX_PTR ,Transmit endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0xE4)&0x0800)==0x0000
group 0xE4++0x01
line.word 0x00 "EP9_TX,Transmit endpoint configuration 9"
bitfld.word 0x00 15. " EP9_TX_VALID ,Transmit endpoint 9 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP9_TX_SIZE ,Transmit endpoint 9 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP9_TX_ISO ,Transmit isochronous endpoint 9" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP9_TX_PTR ,Transmit endpoint $n pointer"
else
group 0xE4++0x01
line.word 0x00 "EP9_TX,Transmit endpoint configuration 9"
bitfld.word 0x00 15. " EP9_TX_VALID ,Transmit endpoint 9 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP9_TX_DB ,Transmit non-isochronous endpoint 9 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP9_TX_SIZE ,Transmit endpoint 9 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP9_TX_ISO ,Transmit isochronous endpoint 9" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP9_TX_PTR ,Transmit endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0xE8)&0x0800)==0x0000
group 0xE8++0x01
line.word 0x00 "EP10_TX,Transmit endpoint configuration 10"
bitfld.word 0x00 15. " EP10_TX_VALID ,Transmit endpoint 10 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP10_TX_SIZE ,Transmit endpoint 10 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP10_TX_ISO ,Transmit isochronous endpoint 10" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP10_TX_PTR ,Transmit endpoint $n pointer"
else
group 0xE8++0x01
line.word 0x00 "EP10_TX,Transmit endpoint configuration 10"
bitfld.word 0x00 15. " EP10_TX_VALID ,Transmit endpoint 10 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP10_TX_DB ,Transmit non-isochronous endpoint 10 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP10_TX_SIZE ,Transmit endpoint 10 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP10_TX_ISO ,Transmit isochronous endpoint 10" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP10_TX_PTR ,Transmit endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0xEC)&0x0800)==0x0000
group 0xEC++0x01
line.word 0x00 "EP11_TX,Transmit endpoint configuration 11"
bitfld.word 0x00 15. " EP11_TX_VALID ,Transmit endpoint 11 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP11_TX_SIZE ,Transmit endpoint 11 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP11_TX_ISO ,Transmit isochronous endpoint 11" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP11_TX_PTR ,Transmit endpoint $n pointer"
else
group 0xEC++0x01
line.word 0x00 "EP11_TX,Transmit endpoint configuration 11"
bitfld.word 0x00 15. " EP11_TX_VALID ,Transmit endpoint 11 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP11_TX_DB ,Transmit non-isochronous endpoint 11 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP11_TX_SIZE ,Transmit endpoint 11 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP11_TX_ISO ,Transmit isochronous endpoint 11" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP11_TX_PTR ,Transmit endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0xF0)&0x0800)==0x0000
group 0xF0++0x01
line.word 0x00 "EP12_TX,Transmit endpoint configuration 12"
bitfld.word 0x00 15. " EP12_TX_VALID ,Transmit endpoint 12 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP12_TX_SIZE ,Transmit endpoint 12 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP12_TX_ISO ,Transmit isochronous endpoint 12" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP12_TX_PTR ,Transmit endpoint $n pointer"
else
group 0xF0++0x01
line.word 0x00 "EP12_TX,Transmit endpoint configuration 12"
bitfld.word 0x00 15. " EP12_TX_VALID ,Transmit endpoint 12 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP12_TX_DB ,Transmit non-isochronous endpoint 12 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP12_TX_SIZE ,Transmit endpoint 12 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP12_TX_ISO ,Transmit isochronous endpoint 12" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP12_TX_PTR ,Transmit endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0xF4)&0x0800)==0x0000
group 0xF4++0x01
line.word 0x00 "EP13_TX,Transmit endpoint configuration 13"
bitfld.word 0x00 15. " EP13_TX_VALID ,Transmit endpoint 13 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP13_TX_SIZE ,Transmit endpoint 13 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP13_TX_ISO ,Transmit isochronous endpoint 13" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP13_TX_PTR ,Transmit endpoint $n pointer"
else
group 0xF4++0x01
line.word 0x00 "EP13_TX,Transmit endpoint configuration 13"
bitfld.word 0x00 15. " EP13_TX_VALID ,Transmit endpoint 13 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP13_TX_DB ,Transmit non-isochronous endpoint 13 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP13_TX_SIZE ,Transmit endpoint 13 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP13_TX_ISO ,Transmit isochronous endpoint 13" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP13_TX_PTR ,Transmit endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0xF8)&0x0800)==0x0000
group 0xF8++0x01
line.word 0x00 "EP14_TX,Transmit endpoint configuration 14"
bitfld.word 0x00 15. " EP14_TX_VALID ,Transmit endpoint 14 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP14_TX_SIZE ,Transmit endpoint 14 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP14_TX_ISO ,Transmit isochronous endpoint 14" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP14_TX_PTR ,Transmit endpoint $n pointer"
else
group 0xF8++0x01
line.word 0x00 "EP14_TX,Transmit endpoint configuration 14"
bitfld.word 0x00 15. " EP14_TX_VALID ,Transmit endpoint 14 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP14_TX_DB ,Transmit non-isochronous endpoint 14 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP14_TX_SIZE ,Transmit endpoint 14 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP14_TX_ISO ,Transmit isochronous endpoint 14" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP14_TX_PTR ,Transmit endpoint $n pointer"
endif
if (d.w(ad:0xfffb4000+0xFC)&0x0800)==0x0000
group 0xFC++0x01
line.word 0x00 "EP15_TX,Transmit endpoint configuration 15"
bitfld.word 0x00 15. " EP15_TX_VALID ,Transmit endpoint 15 valid" "Invalid,Valid"
bitfld.word 0x00 12.--14. " EP15_TX_SIZE ,Transmit endpoint 15 size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
textline " "
textline " "
bitfld.word 0x00 11. " EP15_TX_ISO ,Transmit isochronous endpoint 15" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP15_TX_PTR ,Transmit endpoint $n pointer"
else
group 0xFC++0x01
line.word 0x00 "EP15_TX,Transmit endpoint configuration 15"
bitfld.word 0x00 15. " EP15_TX_VALID ,Transmit endpoint 15 valid" "Invalid,Valid"
bitfld.word 0x00 14. " EP15_TX_DB ,Transmit non-isochronous endpoint 15 double-buffer" "No double-buffer,Double-buffer"
textline " "
bitfld.word 0x00 12.--13. " EP15_TX_SIZE ,Transmit endpoint 15 size" "8 bytes,16 bytes,32 bytes,64 bytes"
textline " "
bitfld.word 0x00 11. " EP15_TX_ISO ,Transmit isochronous endpoint 15" "Isochronous,Bulk/interrupt"
hexmask.word 0x00 0.--10. 8. " EP15_TX_PTR ,Transmit endpoint $n pointer"
endif
tree.end
tree "Universal Serial Bus (USB) Host"
width 26.
base ad:0xfffba000
rgroup 0x00++0x03
line.long 0x00 "HcRevision,OHCI Revision Number Register"
hexmask.long.byte 0x00 0.--7. 1. " REV ,OHCI Specification Revision"
group 0x04++0x13
line.long 0x00 "HcControl,HC Operating Mode Register"
bitfld.long 0x00 10. " RWE ,Remote wake-up enable (not provided)" "Disabled,Enabled"
bitfld.long 0x00 9. " RWC ,Remote wake-up connected (not provided)" "Not connected,Connected"
textline " "
bitfld.long 0x00 8. " IR ,Interrupt routing (not provided)" "MPU Level 2,?..."
bitfld.long 0x00 6.--7. " HCFS ,Host controller functional state" "USBReset,USBResume,USBOperational,USBSuspend"
textline " "
bitfld.long 0x00 5. " BLE ,Bulk list enable" "Disabled,Enabled"
bitfld.long 0x00 4. " CLE ,Control list enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 3. " IE ,Isochronous enable" "Disabled,Enabled"
bitfld.long 0x00 2. " PLE ,Periodic list enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 0.--1. " CBSR ,Control/bulk service ratio" "1 Ctrl/Bulk,2 Ctrls/Bulk,3 Ctrls/Bulk,4 Ctrls/Bulk"
line.long 0x04 "HcCommandStatus,HC Command and Status Register"
bitfld.long 0x04 16.--17. " SOC ,Scheduling overrun count" "0,1,2,3"
bitfld.long 0x04 3. " OCR ,Ownership change request (not provided)" "Not changed,Changed"
textline " "
bitfld.long 0x04 2. " BLF ,Bulk list filled" "Not filled,Filled"
bitfld.long 0x04 1. " CLF ,Control list filled" "Not filled,Filled"
textline " "
bitfld.long 0x04 0. " HCR ,Host controller reset" "No reset,Reset"
line.long 0x08 "HcInterruptStatus,HC Interrupt Status Register"
eventfld.long 0x08 30. " OC ,Ownership change (not provided)" "Not changed,Changed"
eventfld.long 0x08 6. " RHSC ,Root hub status change" "Not changed,Changed"
textline " "
eventfld.long 0x08 5. " FNO ,Frame number overflow" "No overflow,Overflow"
eventfld.long 0x08 4. " UE ,Unrecoverable error" "No error,Error"
textline " "
eventfld.long 0x08 3. " RD ,Resume detected" "No resume,Resume"
eventfld.long 0x08 2. " SF ,Start of frame" "No SOF,SOF"
textline " "
eventfld.long 0x08 1. " WDH ,Write done head" "Not writted,Written"
eventfld.long 0x08 0. " SO ,Scheduling overrun" "No overrun,Overrun"
line.long 0x0c "HcInterruptEnable/Disable,HC Interrupt Enable/Disable Register"
setclrfld.long 0x0c 31. 0x0c 31. 0x10 31. " MIE ,Master interrupt enable" "Disabled,Enabled"
setclrfld.long 0x0c 30. 0x0c 30. 0x10 30. " OC ,Ownership change (not provided)" "Disabled,Enabled"
textline " "
setclrfld.long 0x0c 6. 0x0c 6. 0x10 6. " RHSC ,Root hub status change" "Disabled,Enabled"
setclrfld.long 0x0c 5. 0x0c 5. 0x10 5. " FNO ,Frame number overflow" "Disabled,Enabled"
textline " "
setclrfld.long 0x0c 4. 0x0c 4. 0x10 4. " UE ,Unrecoverable error" "Disabled,Enabled"
setclrfld.long 0x0c 3. 0x0c 3. 0x10 3. " RD ,Resume detected" "Disabled,Enabled"
textline " "
setclrfld.long 0x0c 2. 0x0c 2. 0x10 2. " SF ,Start of frame" "Disabled,Enabled"
setclrfld.long 0x0c 1. 0x0c 1. 0x10 1. " WDH ,Write done head" "Disabled,Enabled"
textline " "
setclrfld.long 0x0c 0. 0x0c 0. 0x10 0. " SO ,Scheduling overrun" "Disabled,Enabled"
group 0x18++0x17
line.long 0x00 "HcHCCA,HC HCCA Address Register"
hexmask.long.tbyte 0x00 8.--31. 1. " HCCA ,"
line.long 0x04 "HcPeriodCurrentED,HC Current Periodic Register"
hexmask.long 0x04 4.--31. 1. " PCED ,Local bus virtual address of current ED on the periodic ED list"
line.long 0x08 "HcControlHeadED,HC Head Control Register"
hexmask.long 0x08 4.--31. 1. " CHED ,Local bus virtual address of head ED on the control ED list"
line.long 0x0c "HcControlCurrentED,HC Current Control Register"
hexmask.long 0x0c 4.--31. 1. " CCED ,Local bus virtual address of current ED on the control ED list"
line.long 0x10 "HcBulkHeadED,HC Head Bulk Register"
hexmask.long 0x10 4.--31. 1. " BHED ,Local bus virtual address of head ED on the bulk ED list"
line.long 0x14 "HcBulkCurrentED,HC Current Bulk Register"
hexmask.long 0x14 4.--31. 1. " BCED ,Local bus virtual address of current ED on the bulk ED list"
rgroup 0x30++0x03
line.long 0x00 "HcDoneHead,HC Head Done Register"
hexmask.long 0x00 4.--31. 1. " DH ,Local bus virtual address of the TD that was added to the done queue"
group 0x34++0x03
line.long 0x00 "HcFmInterval,HC Frame Interval Register"
bitfld.long 0x00 31. " FIT ,Frame interval toggle" "Low,High"
hexmask.long.word 0x00 16.--30. 1. " FSMPS ,Largest data packet"
textline " "
hexmask.long.word 0x00 0.--13. 1. " FI ,Frame interval"
rgroup 0x38++0x07
line.long 0x00 "HcFmRemaining,HC Frame Remaining Register"
bitfld.long 0x00 31. " FRT ,Frame remaining toggle" "Low,High"
hexmask.long.word 0x00 0.--13. 1. " FR ,Frame remaining"
line.long 0x04 "HcFmNumber,HC Frame Number Register"
hexmask.long 0x04 0.--15. 1. " FN ,Frame Number"
group 0x40++0x1f
line.long 0x00 "HcPeriodicStart,HC Periodic Start Register"
hexmask.long.word 0x00 0.--13. 1. " PS ,Periodic start"
line.long 0x04 "HcLSThreshold,HC Low-Speed Threshold Register"
hexmask.long.word 0x00 0.--13. 1. " LST ,Low-speed threshold"
line.long 0x08 "HcRhDescriptorA,HC Root Hub A Register"
hexmask.long.byte 0x08 24.--31. 1. " POTG ,Power-on to power-good time"
bitfld.long 0x08 12. " NOCP ,No overcurrent protection (not implemented)" "Enabled,Disabled"
textline " "
bitfld.long 0x08 11. " OCPM ,Overcurrent protection mode (not implemented)" "Low,High"
bitfld.long 0x08 10. " DT ,Device type" "Not compound,Compound"
textline " "
bitfld.long 0x08 9. " NPS ,No power switching" "Supported,Not supported"
bitfld.long 0x08 8. " PSM ,Power switching mode" "Simultanous,Individual"
textline " "
hexmask.long.byte 0x08 0.--7. 1. " NDP ,Number of downstream ports"
line.long 0x0c "HcRhDescriptorB,HC Root Hub B Register"
bitfld.long 0x0c 19. " PPCM3 ,Port 3 power control mask" "Global,Individual"
bitfld.long 0x0c 18. " PPCM2 ,Port 2 power control mask" "Global,Individual"
textline " "
bitfld.long 0x0c 17. " PPCM1 ,Port 1 power control mask" "Global,Individual"
bitfld.long 0x0c 3. " DR3 ,Device on port 3 removable" "Removable,Non-removable"
textline " "
bitfld.long 0x0c 2. " DR2 ,Device on port 2 removable" "Removable,Non-removable"
bitfld.long 0x0c 1. " DR1 ,Device on port 1 removable" "Removable,Non-removable"
line.long 0x10 "HcRhStatus,HC Root Hub Status Register"
eventfld.long 0x10 31. " CRWE ,Clear remote wake-up enable" "Disabled,Enabled"
eventfld.long 0x10 17. " OCIC ,Overcurrent indication change" "Not changed,Changed"
textline " "
eventfld.long 0x10 16. " LPSC ,Local power status change" "Not changed,Changed"
eventfld.long 0x10 15. " DRWE ,Device remote wake-up enable" "Disabled,Enabled"
textline " "
eventfld.long 0x10 1. " OCI ,Overcurrent indicator" "No overcurrent,Overcurrent"
eventfld.long 0x10 0. " LPS ,Local power status" "No action,Turn off"
line.long 0x14 "HcRhPortStatus1,HC Port 1 Status and Control Register"
eventfld.long 0x14 20. " PSRC ,Port 1 reset status change" "Not changed,Changed"
eventfld.long 0x14 19. " OCIC ,Port 1 overcurrent indicator change" "Not changed,Changed"
textline " "
eventfld.long 0x14 18. " PSSC ,Port 1 suspend status change" "Not changed,Changed"
eventfld.long 0x14 17. " PESC ,Prt 1 enable status change" "Not changed,Changed"
textline " "
eventfld.long 0x14 16. " CSC ,Port 1 connect statsu change" "Not changed,Changed"
eventfld.long 0x14 9. " LSDA/CPP ,Port 1 low-speed device attached/clear port power" "Full-speed,Low-speed"
textline " "
eventfld.long 0x14 8. " PPS/SPP ,Port 1 port power status/set port power" "Disabled,Enabled"
eventfld.long 0x14 4. " PRS/SPR ,Port 1 port reset status/set port reset" "No reset,Reset"
textline " "
eventfld.long 0x14 3. " POCI/CSS ,Port 1 port overcurrent indicator/clear suspend status" "No overcurrent,Overcurrent"
eventfld.long 0x14 2. " PSS/SPS ,Port 1 port suspend status/set port suspend" "No suspend,Suspend"
textline " "
eventfld.long 0x14 1. " PES/SPE ,Port 1 port enable status/set port enable" "Disabled,Enabled"
eventfld.long 0x14 0. " CCS/CPE ,Port 1 current connection status/clear port enable" "Not attached,Attached"
line.long 0x18 "HcRhPortStatus2,HC Port 2 Status and Control Register"
eventfld.long 0x18 20. " PSRC ,Port 2 reset status change" "Not changed,Changed"
eventfld.long 0x18 19. " OCIC ,Port 2 overcurrent indicator change" "Not changed,Changed"
textline " "
eventfld.long 0x18 18. " PSSC ,Port 2 suspend status change" "Not changed,Changed"
eventfld.long 0x18 17. " PESC ,Prt 2 enable status change" "Not changed,Changed"
textline " "
eventfld.long 0x18 16. " CSC ,Port 2 connect statsu change" "Not changed,Changed"
eventfld.long 0x18 9. " LSDA/CPP ,Port 2 low-speed device attached/clear port power" "Full-speed,Low-speed"
textline " "
eventfld.long 0x18 8. " PPS/SPP ,Port 2 port power status/set port power" "Disabled,Enabled"
eventfld.long 0x18 4. " PRS/SPR ,Port 2 port reset status/set port reset" "No reset,Reset"
textline " "
eventfld.long 0x18 3. " POCI/CSS ,Port 2 port overcurrent indicator/clear suspend status" "No overcurrent,Overcurrent"
eventfld.long 0x18 2. " PSS/SPS ,Port 2 port suspend status/set port suspend" "No suspend,Suspend"
textline " "
eventfld.long 0x18 1. " PES/SPE ,Port 2 port enable status/set port enable" "Disabled,Enabled"
eventfld.long 0x18 0. " CCS/CPE ,Port 2 current connection status/clear port enable" "Not attached,Attached"
line.long 0x1c "HcRhPortStatus3,HC Port 3 Status and Control Register"
eventfld.long 0x1c 20. " PSRC ,Port 3 reset status change" "Not changed,Changed"
eventfld.long 0x1c 19. " OCIC ,Port 3 overcurrent indicator change" "Not changed,Changed"
textline " "
eventfld.long 0x1c 18. " PSSC ,Port 3 suspend status change" "Not changed,Changed"
eventfld.long 0x1c 17. " PESC ,Prt 3 enable status change" "Not changed,Changed"
textline " "
eventfld.long 0x1c 16. " CSC ,Port 3 connect statsu change" "Not changed,Changed"
eventfld.long 0x1c 9. " LSDA/CPP ,Port 3 low-speed device attached/clear port power" "Full-speed,Low-speed"
textline " "
eventfld.long 0x1c 8. " PPS/SPP ,Port 3 port power status/set port power" "Disabled,Enabled"
eventfld.long 0x1c 4. " PRS/SPR ,Port 3 port reset status/set port reset" "No reset,Reset"
textline " "
eventfld.long 0x1c 3. " POCI/CSS ,Port 3 port overcurrent indicator/clear suspend status" "No overcurrent,Overcurrent"
eventfld.long 0x1c 2. " PSS/SPS ,Port 3 port suspend status/set port suspend" "No suspend,Suspend"
textline " "
eventfld.long 0x1c 1. " PES/SPE ,Port 3 port enable status/set port enable" "Disabled,Enabled"
eventfld.long 0x1c 0. " CCS/CPE ,Port 3 current connection status/clear port enable" "Not attached,Attached"
rgroup 0xe0++0x07
line.long 0x00 "HostUEAddr,Host UE Address Register"
line.long 0x04 "HostUEStatus,Host UE Status Register"
bitfld.long 0x04 0. " UEAccess ,Access type when unrecoverable error occured" "Read,Write"
group 0xe8++0x03
line.long 0x00 "HostTimeoutCtrl,Host Time-out Control Register"
bitfld.long 0x00 0. " TO_DIS ,Local bus time-out disable" "Enabled,Disabled"
rgroup 0xec++0x03
line.long 0x00 "HostRevision,Host Revision Register"
hexmask.long.byte 0x00 4.--7. 1. " MajorRev ,Major revision number"
hexmask.long.byte 0x00 0.--3. 1. " MinorRev ,Minor revision number"
tree.end
tree "Clock Generation and Reset Control Registers"
tree "MPU Clock/Reset/Power Mode control Registers"
width 12.
base ad:0xfffece00
group 0x00++0x19
line.word 0x00 "ARM_CKCTL,MPU Clock Control Register"
bitfld.word 0x00 14. " ARM_INTHCK_SEL ,Controls which clock is used for ARM_INTH_CK" "TC_CK,?..."
bitfld.word 0x00 13. " EN_DSPCK ,Allows turning on DSP_CK while DSP is still in a reset state" "Disabled,Enabled"
textline " "
bitfld.word 0x00 12. " ARM_TIMXO ,Selects either CK_GEN1 or input reference clock (CLKIN) to supply internal MPU timers" "CLKIN,CK_GEN1"
bitfld.word 0x00 10.--11. " DSPMMUDIV ,Prescaler value from frequency of CK_GEN2 to DSPMMU domain clock (DSPMMU_CK)" "CK_GEN2/1,CK_GEN2/2,CK_GEN2/4,CK_GEN2/8"
textline " "
bitfld.word 0x00 8.--9. " TCDIV ,Prescaler value from frequency of CK_GEN3 to TC domain clock (TC_CK)" "CK_GEN3/1,CK_GEN3/2,CK_GEN3/4,CK_GEN3/8"
bitfld.word 0x00 6.--7. " DSPDIV ,Prescaler value from frequency of CK_GEN2 to DSP domain clock (DSP_CK)" "CK_GEN2/1,CK_GEN2/2,CK_GEN2/4,CK_GEN2/8"
textline " "
bitfld.word 0x00 4.--5. " ARMDIV ,Prescaler value from frequency of CK_GEN1 to MPU domain clock (ARM_CK)" "CK_GEN1/1,CK_GEN1/2,CK_GEN1/4,CK_GEN1/8"
bitfld.word 0x00 2.--3. " LCDDIV ,Prescaler value from frequency of CK_GEN3 to LCD domain clock (LCD_CK)" "CK_GEN3/1,CK_GEN3/2,CK_GEN3/4,CK_GEN3/8"
textline " "
bitfld.word 0x00 0.--1. " PERDIV ,Prescaler value from frequency of CK_GEN1 to peripheral domain clock (MPUPER_CK)" "CK_GEN1/1,CK_GEN1/2,CK_GEN1/4,CK_GEN1/8"
line.word 0x04 "ARM_IDLECT1,MPU Idle Mode Entry 1 Register"
bitfld.word 0x04 11. " SETARM_IDLE ,Initiates MPU idle mode" "Active,Idle"
bitfld.word 0x04 10. " WKUP_MODE ,Enables MPU to exit mode from an interrupt and triggers an event on CHIP_nWAKEUP signal" "Low CHIP_nWAKEUP,Interrupt"
textline " "
bitfld.word 0x04 9. " IDLTIM_ARM ,Selects idle entry mode for internal MPU timer clock" "Active,Stopped"
bitfld.word 0x04 7. " IDLDPLL_ARM ,Enables DPLL1 to enter idle mode" "Active,Idle"
textline " "
bitfld.word 0x04 6. " IDLIF_ARM ,Clocks TIPB_CK, DMA_CK and TC_CK are stopped when MPU enters idle" "Active,Stopped"
bitfld.word 0x04 2. " IDLPER_ARM ,Selects idle entry mode for peripheral clock" "Active,Stopped"
textline " "
bitfld.word 0x04 1. " IDLXORP_ARM ,Selects idle entry for 32-k or gp timer (MPU_TIPB) and peripheral clock (MPUXOR_CK)" "Active,Stopped"
bitfld.word 0x04 0. " IDLWDT_ARM ,Selects idle entry mode for internal timer/watchdog connected to MPU peripheral bus" "Active,Stopped"
line.word 0x08 "ARM_IDLECT2,MPU Idle Mode Entry 2 Register"
bitfld.word 0x08 9. " EN_GPIOCK ,Enables clock of MPU GPIO connected to MPU TIPB" "Stopped,Active"
bitfld.word 0x08 8. " DMACK_REQ ,Disables permanently-supplied-clock to system DMA controller to function on a clock request basis" "Shutdown,Stopped"
textline " "
bitfld.word 0x08 7. " EN_TIMCK ,Enables clock of MPU timer connected to MPU TIPB" "Stopped,Active"
bitfld.word 0x08 6. " EN_APICK ,Enables clock of MPUI clock" "Stopped,Active"
textline " "
bitfld.word 0x08 4. " EN_LBCK ,Enables clock of local bus clock" "Stopped,Active"
bitfld.word 0x08 3. " EN_LCDCK ,Enables clock of LCD controller connected to MPU TIPB" "Stopped,Active"
textline " "
bitfld.word 0x08 2. " EN_PERCK ,Enables peripheral clock (MPUPER_CK)" "Stopped,Active"
bitfld.word 0x08 1. " EN_XORPCK ,Enables clock of OS timer connected to MPU TIPB and CLKIN reference peripheral clock (XORP_CK)" "Stopped,Active"
textline " "
bitfld.word 0x08 0. " EN_WDTCK ,Enables clock of timer/watchdog connected to MPU TIPB" "Stopped,Active"
line.word 0x0c "ARM_EWUPCT,MPU External Wake-up Register"
bitfld.word 0x0c 5. " REPWR_EN ,Enables external power control feature" "Low,Inactive"
bitfld.word 0x0c 0.--4. " EXTPW ,Defines delay from /PWRON_RESET pin going high to clocks restarting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.word 0x10 "ARM_RSTCT1,MPU Reset Control 1 Register"
bitfld.word 0x10 3. " SW_RST ,Resets both DSP, MPU and peripheral clock domain enabled" "Enabled,Reset"
bitfld.word 0x10 2. " DSP_RST ,Resets priority registers, EMIF configuration registers and MPUI control logic (partially) in DSP" "Reset,Enabled"
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bitfld.word 0x10 1. " DSP_EN ,Resets DSP" "Reset,Enabled"
bitfld.word 0x10 0. " ARM_RST ,Resets MPU" "Enabled,Reset"
line.word 0x14 "ARM_RSTCT2,MPU Reset Control 2 Register"
bitfld.word 0x14 0. " PER_EN ,Controls MPUPER_nRST signal used to reset and/or enable peripherals connected to MPU TIPB" "Active,Inactive"
line.word 0x18 "ARM_SYSST,MPU System Status Register"
bitfld.word 0x18 11.--13. " CLOCK_SELECT ,Indicates the current clocking scheme selection" "Fully synchronous,Reserved,Synchronous scalable,?..."
bitfld.word 0x18 6. " IDLE_DSP ,Indicates DSP states" "Active,Global idle"
textline " "
bitfld.word 0x18 5. " POR ,Indicates whether or not a power-on-reset has occured" "No reset,Reset"
bitfld.word 0x18 4. " EXT_RST ,Indicates that external reset has been asserted" "No reset,Reset"
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bitfld.word 0x18 3. " ARM_MCRST ,Indicates whether or not an MPU reset has occured" "No Reset,Reset"
bitfld.word 0x18 2. " ARM_WDRST ,Indicates whether or not reset has been asserted due to an MPU timer/watchdog underflow" "No underflow,Underflow"
textline " "
bitfld.word 0x18 1. " GLOB_SWRST ,Indicates whether or not reset has been asserted due to a global software reset" "No reset,Reset"
tree.end
tree "DPLL Control Registers"
width 8.
base ad:0xfffecf00
group 0x00++0x01
line.word 0x00 "CTL_REG,DPLL Control Register"
bitfld.word 0x00 13. " IOB ,Initialize on break" "No init,Init"
bitfld.word 0x00 7.--11. " PLL_MULT ,DPLL multiply value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.word 0x00 5.--6. " PLL_DIV ,DPLL divide value" "1,2,3,4"
textline " "
bitfld.word 0x00 4. " PLL_ENABLE ," "Bypass mode request,Lock mode request"
bitfld.word 0x00 2.--3. " BYPASS_DIV ,Clkout frequency when in BYPASS mode" "1,2,4,4"
bitfld.word 0x00 1. " BREAKLN ,Broken lock" "Broken,Not broken"
textline " "
bitfld.word 0x00 0. " LOCK ,Lock mode" "Bypass mode,Lock mode"
tree.end
tree "ULPD Registers"
width 29.
base ad:0xfffe0800
rgroup 0x00++0x0d
line.word 0x00 "COUNTER_32_LSB,Lower value of number of ticks from 32-kHz clock"
line.word 0x04 "COUNTER_32_MSB,Upper value of number of ticks from 32-kHz clock"
line.word 0x08 "COUNTER_HIGH_FREQ_LSB,Lower value of number of ticks from high frequency clock"
line.word 0x0c "COUNTER_HIGH_FREQ_MSB,Upper value of number of ticks from high frequency clock"
group 0x10++0x01
line.word 0x00 "GAUGING_CTRL_REG,Drives gauging functionality"
bitfld.word 0x00 1. " SELECT_HI_FREQ_CLOCK ,Use 12-MHz clock for high frequency clock" "12-MHz,?..."
bitfld.word 0x00 0. " GAUGING_EN ,Enable gauging" "Disabled,Enabled"
rgroup 0x14++0x01
line.word 0x00 "IT_STATUS_REG,Interrupt status register"
bitfld.word 0x00 3. " IT_WAKEUP_USB ,Wake-up interrupt from USB function is shared with ULPD gauging interrupt" "Not shared,Shared"
bitfld.word 0x00 2. " OVERFLOW_32 ,Overflow occured on 32-kHz counter during gauging" "No overflow,Overflow"
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bitfld.word 0x00 1. " OVERFLOW_HI_FREQ ,Overflow occured in high-frequency counter during gauging versus high frequency clock" "No overflow,Overflow"
bitfld.word 0x00 0. " IT_GAUGING ,End of gauging interrupt" "Not ended,Ended"
group 0x24++0x01
line.word 0x00 "SETUP_ANALOG_CELL3_ULPD1_REG,Number of 32-kHz clocks to wake up"
group 0x30++0x0d
line.word 0x00 "CLOCK_CTRL_REG,Manages clock output and inactive values"
line.word 0x04 "SOFT_REQ_REG,Manages software clock requests"
bitfld.word 0x04 4. " USB_REQ_EN ,Enables USB function hardware DPLL request" "Disabled,Enabled"
bitfld.word 0x04 3. " SOFT_USB_REQ ,Software request for clocking on USB.CLK0" "No request,Request"
textline " "
bitfld.word 0x04 2. " SOFT_SDW_REQ ,Software request for clocking on BCLK" "No request,Request"
bitfld.word 0x04 1. " SOFT_COM_REQ ,Software request for clocking on MCLK" "No request,Request"
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bitfld.word 0x04 0. " SOFT_DPLL_REQ ,Software request for clocking on 48-MHz DPLL" "No request,Request"
line.word 0x08 "COUNTER_32_FIQ_REG,Number of 32-kHz clocks to delay active modem shut down signal after receiving an active EXT_FIQ signal"
hexmask.word.byte 0x08 0.--7. 1. " COUNTER_32_FIQ ,Number of 32-kHz clocks to delay active modem shut down signal after receiving an active EXT_FIQ signal"
line.word 0x0c "DPLL_CTRL_REG,48-MHz DPLL"
bitfld.word 0x0c 13. " IOB ,Initialize on break" "No init,Init"
bitfld.word 0x0c 4. " PLL_ENABLE ," "Bypass mode request,Lock mode request"
textline " "
bitfld.word 0x0c 1. " BREAKLN ,Broken lock" "Broken,Not broken"
bitfld.word 0x0c 0. " LOCK ,Lock mode" "Bypass mode,Lock mode"
rgroup 0x40++0x01
line.word 0x00 "STATUS_REQ_REG,Status of hardware requests"
bitfld.word 0x00 13. " MODEM_NSHUTDOWN ,Status of /RST_HOST_OUT output pin" "Low,High"
bitfld.word 0x00 12. " MMC_DPLL_REQ ,DPLL wake-up request from MMC" "No request,Request"
textline " "
bitfld.word 0x00 11. " UART3_DPLL_REQ ,DPLL wake-up request from UART3" "No request,Request"
bitfld.word 0x00 10. " UART2_DPLL_REQ ,DPLL wake-up request from UART2" "No request,Request"
textline " "
bitfld.word 0x00 9. " UART1_DPLL_REQ ,DPLL wake-up request from UART1" "No request,Request"
bitfld.word 0x00 8. " USB_HOST_DPLL_REQ ,12-MHz clock for DPLL wake-up requested by USB host" "Not requested,Requested"
textline " "
bitfld.word 0x00 7. " CAM_DPLL_MCLK_REQ ,Indicated request for 48-MHz DPLL wake-up by camera interface" "No request,Request"
bitfld.word 0x00 6. " USB_DPLL_MCLK_REQ ,Indicated request for 48-MHz DPLL wake-up by USB interface" "No request,Request"
textline " "
bitfld.word 0x00 5. " USB_MCLK_REQ ,Indicated clock request by USB host" "No request,Request"
bitfld.word 0x00 4. " SDW_MCLK_REQ ,Indicated clock request by BCLKREQ host" "No request,Request"
textline " "
bitfld.word 0x00 3. " COM_MCLK_REQ ,Indicated clock request by MCLKREQ host" "No request,Request"
bitfld.word 0x00 2. " PERIPH_nREQ ,Indicates status of internal peripheral clock request signal" "High,Low"
textline " "
bitfld.word 0x00 1. " WAKEUP_nREQ ,Indicates status of internal WAKEUP_nREQ signal" "High,Low"
bitfld.word 0x00 0. " CHIP_IDLE ,Indicates status of internal CHIP_IDLE signal" "Low,High"
group 0x48++0x09
line.word 0x00 "LOCK_TIME_REGISTER,Defines lock time when APLL is selected"
line.word 0x04 "APLL_CTRL_REG,This register allows switch between APLL and DPLL and controls all input of APLL"
bitfld.word 0x04 3. " SEL ,Divider correction" "1/13,1/12"
bitfld.word 0x04 0. " APLL_NDPLL_SWITCH ,Allows switch between APLL and DPLL" "DPLL,APLL"
line.word 0x08 "POWER_CTRL_REG,Power control register"
bitfld.word 0x08 3. " SW_NSHUTDOWN ,Software generation /RST_HOST_OUT" "Active low,Inactive high"
bitfld.word 0x08 2. " SW_RST ,Released hardware generation of /RST_HOST_OUT" "BFAIL/EXT_FIQ and 32 counter,SW_NSHUTDOWN bit"
textline " "
bitfld.word 0x08 1. " LOW_PWR_REQ ,Low power software request" "No request,Request"
bitfld.word 0x08 0. " LOW_PWR_EN ,Low power enable bit" "Disabled,Enabled"
tree.end
tree.end
textline ""
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