31330 lines
2.3 MiB
31330 lines
2.3 MiB
; --------------------------------------------------------------------------------
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; @Title: Kinetis K0x On-Chip Peripherals
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; @Props: Released
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; @Author: ADP, PBU, DPR, PCC
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; @Changelog: 2015-11-16 ADP
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; 2018-02-13 PCC
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; @Manufacturer: NXP
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; @Doc: K02P64M100SFA.pdf (Rev. 3, 2015-04)
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; K02P64M100SFARM.pdf (Rev. 1, 2014-07)
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; K02P64M100SFARM.pdf (Rev. 2, 2016-08)
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; @Core: Cortex-M4
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; @Chip: MK02FN128VFM10, MK02FN128VLF10, MK02FN128VLH10, MK02FN64VFM10,
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; MK02FN64VLF10, MK02FN64VLH10
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; @Copyright: (C) 1989-2018 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perk00.per 17736 2024-04-08 09:26:07Z kwisniewski $
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width 0xB
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tree.close "Core Registers (Cortex-M4F)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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tree "System Control"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 12.
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group.long 0x08++0x03
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line.long 0x00 "ACTLR,Auxiliary Control Register"
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bitfld.long 0x00 9. " DISFPCA ,Disables lazy stacking of floating point context" "No,Yes"
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bitfld.long 0x00 8. " DISOOFP ,Disables floating point instructions completing" "No,Yes"
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bitfld.long 0x00 2. " DISFOLD ,Disables folding of IT instructions" "No,Yes"
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textline " "
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bitfld.long 0x00 1. " DISDEFWBUF ,Disables write buffer use during default memory map accesses" "No,Yes"
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bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle instructions" "No,Yes"
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group.long 0x10++0x0B
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line.long 0x00 "SYST_CSR,SysTick Control and Status Register"
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rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
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bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core"
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bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick"
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textline " "
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bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
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line.long 0x04 "SYST_RVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
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line.long 0x08 "SYST_CVR,SysTick Current Value Register"
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rgroup.long 0x1C++0x03
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line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register"
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bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
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bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
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rgroup.long 0xD00++0x03
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line.long 0x00 "CPUID,CPU ID Base Register"
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hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer Code"
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bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,?..."
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bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number"
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bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0xD04++0x23
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line.long 0x00 "ICSR,Interrupt Control State Register"
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bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Inactive,Active"
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bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not pending,Pending"
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bitfld.long 0x00 27. " PENDSVCLR ,Removes the pending status of the PendSV exception" "No effect,Removed"
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textline " "
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bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not pending,Pending"
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bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "No effect,Removed"
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bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active"
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textline " "
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bitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt" "Not pending,Pending"
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hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,Pending ISR Number Field"
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bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active"
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textline " "
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hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception"
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line.long 0x04 "VTOR,Vector Table Offset Register"
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hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Vector table address"
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line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
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hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key"
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rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big"
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bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
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textline " "
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bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested"
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bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "No effect,Clear"
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bitfld.long 0x08 0. " VECTRESET ,System Reset" "No effect,Reset"
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line.long 0x0C "SCR,System Control Register"
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bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
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bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
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bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
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line.long 0x10 "CCR,Configuration Control Register"
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bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled"
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bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled"
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bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte/no adjustment,8-byte/adjustment"
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bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI and Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled"
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bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled"
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bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Denied,Allowed"
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bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level"
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line.long 0x14 "SHPR1,SSystem Handler Priority Register 1"
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hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of System Handler 7"
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hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)"
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hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)"
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textline " "
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hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)"
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line.long 0x18 "SHPR2,System Handler Priority Register 2"
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hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)"
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hexmask.long.byte 0x18 16.--23. 1. " PRI_10 ,Priority of System Handler 10"
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hexmask.long.byte 0x18 8.--15. 1. " PRI_9 ,Priority of System Handler 9"
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textline " "
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hexmask.long.byte 0x18 0.--7. 1. " PRI_8 ,Priority of System Handler 8"
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line.long 0x1C "SHPR3,System Handler Priority Register 3"
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hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)"
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hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)"
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hexmask.long.byte 0x1C 8.--15. 1. " PRI_13 ,Priority of System Handler 13"
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textline " "
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hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)"
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line.long 0x20 "SHCSR,System Handler Control and State Register"
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bitfld.long 0x20 18. " USGFAULTENA ,Enable UsageFault" "Disabled,Enabled"
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bitfld.long 0x20 17. " BUSFAULTENA ,Enable BusFault" "Disabled,Enabled"
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bitfld.long 0x20 16. " MEMFAULTENA ,Enable MemManage fault" "Disabled,Enabled"
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textline " "
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bitfld.long 0x20 15. " SVCALLPENDED ,SVCall is pending" "Not pending,Pending"
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bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault is pending" "Not pending,Pending"
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bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage is pending" "Not pending,Pending"
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textline " "
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bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault is pending" "Not pending,Pending"
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bitfld.long 0x20 11. " SYSTICKACT ,SysTick is Active" "Not active,Active"
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bitfld.long 0x20 10. " PENDSVACT ,PendSV is Active" "Not active,Active"
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textline " "
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bitfld.long 0x20 8. " MONITORACT ,Monitor is Active" "Not active,Active"
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bitfld.long 0x20 7. " SVCALLACT ,SVCall is Active" "Not active,Active"
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bitfld.long 0x20 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active"
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textline " "
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bitfld.long 0x20 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active"
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bitfld.long 0x20 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active"
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group.byte 0xD28++0x1
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line.byte 0x00 "MMFSR,MemManage Status Register"
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bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x00 4. " MSTKERR ,tacking Access Violations" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x00 3. " MUNSTKERR ,Unstack Access Violations" "Not occurred,Occurred"
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bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred"
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bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred"
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line.byte 0x01 "BFSR,Bus Fault Status Register"
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bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x01 4. " STKERR ,Derived bus fault(exception entry)" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault(exception return)" "Not occurred,Occurred"
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bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred"
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bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred"
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group.word 0xD2A++0x1
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line.word 0x00 "USAFAULT,Usage Fault Status Register"
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bitfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error"
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bitfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error"
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bitfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error"
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textline " "
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bitfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error"
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bitfld.word 0x00 1. " INVSTATE ,Invalid Combination of EPSR and Instruction" "No error,Error"
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bitfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error"
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group.long 0xD2C++0x07
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line.long 0x00 "HFSR,Hard Fault Status Register"
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bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred"
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bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority" "Not occurred,Occurred"
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bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred"
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line.long 0x04 "DFSR,Debug Fault Status Register"
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bitfld.long 0x04 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of EDBGRQ" "Not asserted,Asserted"
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bitfld.long 0x04 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred"
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bitfld.long 0x04 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not occurred,Occurred"
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textline " "
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bitfld.long 0x04 1. " BKPT ,BKPT Flag" "Not executed,Executed"
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bitfld.long 0x04 0. " HALTED ,Indicates a debug event generated by either" "Not requested,Requested"
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group.long 0xD34++0x0B
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line.long 0x00 "MMFAR,MemManage Fault Address Register"
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line.long 0x04 "BFAR,BusFault Address Register"
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line.long 0x08 "AFSR,Auxiliary Fault Status Register"
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group.long 0xD88++0x03
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line.long 0x00 "CPACR,Coprocessor Access Control Register"
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bitfld.long 0x00 22.--23. " CP11 ,Access privileges for coprocessor 11" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Access denied,Privileged only,Reserved,Full access"
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textline " "
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bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Access denied,Privileged only,Reserved,Full access"
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textline " "
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bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Access denied,Privileged only,Reserved,Full access"
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textline " "
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bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Access denied,Privileged only,Reserved,Full access"
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wgroup.long 0xF00++0x03
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line.long 0x00 "STIR,Software Trigger Interrupt Register"
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hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered"
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width 10.
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tree "Feature Registers"
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rgroup.long 0xD40++0x0B
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line.long 0x00 "ID_PFR0,Processor Feature Register 0"
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bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..."
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bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
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line.long 0x04 "ID_PFR1,Processor Feature Register 1"
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bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
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line.long 0x08 "ID_DFR0,Debug Feature Register 0"
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bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..."
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hgroup.long 0xD4C++0x03
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hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
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rgroup.long 0xD50++0x03
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line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
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bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..."
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bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
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bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..."
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textline " "
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bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored"
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bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..."
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hgroup.long 0xD54++0x03
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hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
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rgroup.long 0xD58++0x03
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line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
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bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
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rgroup.long 0xD60++0x13
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line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
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bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
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bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
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bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..."
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textline " "
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bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
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bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
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bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
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line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1"
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bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
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bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
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bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
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textline " "
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bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..."
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line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2"
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bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
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bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
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bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..."
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textline " "
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bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..."
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bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
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bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
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textline " "
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bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..."
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line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3"
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bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
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bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
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bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
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textline " "
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bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..."
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bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
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bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..."
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textline " "
|
|
bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..."
|
|
line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4"
|
|
bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..."
|
|
bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..."
|
|
textline " "
|
|
bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
|
|
bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..."
|
|
bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..."
|
|
tree.end
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0C "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0C "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported"
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
|
|
group.long 0xD9C++0x03 "Region 8"
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
|
|
group.long 0xD9C++0x03 "Region 9"
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
|
|
group.long 0xD9C++0x03 "Region 10"
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
|
|
group.long 0xD9C++0x03 "Region 11"
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
|
|
group.long 0xD9C++0x03 "Region 12"
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
|
|
group.long 0xD9C++0x03 "Region 13"
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
|
|
group.long 0xD9C++0x03 "Region 14"
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
|
|
group.long 0xD9C++0x03 "Region 15"
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 6.
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..."
|
|
tree "Interrupt Enable Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x100++0x7
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x100++0x0B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x100++0x13
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x100++0x1B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x100++0x1F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x100++0x1F
|
|
hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x200++0x0B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x200++0x0F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x200++0x13
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x200++0x17
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x200++0x1B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x200++0x1F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x200++0x1F
|
|
hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Active Bit Registers"
|
|
width 9.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
rgroup.long 0x300++0x07
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
rgroup.long 0x300++0x0B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
rgroup.long 0x300++0x0F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
rgroup.long 0x300++0x13
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
rgroup.long 0x300++0x17
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
rgroup.long 0x300++0x1B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
rgroup.long 0x300++0x1F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x300++0x1F
|
|
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
hide.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
hide.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
hide.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
hide.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
hide.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
hide.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
hide.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x400++0x1F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x400++0x3F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x400++0x5F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x400++0x7F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x400++0x9F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x400++0xBF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x400++0xDF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x400++0xEF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
line.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
|
|
hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
|
|
hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
|
|
hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
|
|
line.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
|
|
hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
|
|
hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
|
|
hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
|
|
line.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
|
|
hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
|
|
hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
|
|
hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
|
|
line.long 0xEC "IPR59,Interrupt Priority Register"
|
|
hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
|
|
hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
|
|
hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
|
|
hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
|
|
else
|
|
hgroup.long 0x400++0xEF
|
|
hide.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hide.long 0xC "IPR3,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hide.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hide.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hide.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hide.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hide.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hide.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hide.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hide.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hide.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hide.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hide.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hide.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hide.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hide.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hide.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hide.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hide.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hide.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hide.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hide.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hide.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hide.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hide.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hide.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hide.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hide.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hide.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hide.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hide.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hide.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hide.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hide.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hide.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hide.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hide.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hide.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hide.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hide.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hide.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hide.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hide.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hide.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hide.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hide.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hide.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hide.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hide.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hide.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hide.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hide.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hide.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hide.long 0xEC "IPR59,Interrupt Priority Register"
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
sif CORENAME()=="CORTEXM4F"
|
|
tree "Floating-point Unit (FPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 8.
|
|
group.long 0xF34++0x0B
|
|
line.long 0x00 "FPCCR,Floating-Point Context Control Register"
|
|
bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread"
|
|
bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged"
|
|
bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active"
|
|
line.long 0x04 "FPCAR,Floating-Point Context Address Register"
|
|
hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame"
|
|
line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register"
|
|
bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative"
|
|
bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation"
|
|
bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero"
|
|
rgroup.long 0xF40++0x07
|
|
line.long 0x00 "MVFR0,Media and FP Feature Register 0"
|
|
bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..."
|
|
bitfld.long 0x00 24.--27. " SRTERR ,Indicates the hardware support for FP short vectors" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..."
|
|
bitfld.long 0x00 12.--15. " FPEXTRP ,Indicates whether the FP hardware implementation supports exception trapping" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..."
|
|
line.long 0x04 "MVFR1,Media and FP Feature Register 1"
|
|
bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..."
|
|
bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..."
|
|
bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Full denorm. num. arit.,?..."
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
endif
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 7.
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Debug Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
|
|
eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
|
|
eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated"
|
|
newline
|
|
eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
|
|
eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
|
|
newline
|
|
hgroup.long 0xDF0++0x03
|
|
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
in
|
|
newline
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write"
|
|
hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register or special-purpose register or Floating-point extension register"
|
|
group.long 0xDF8++0x03
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Flash Patch and Breakpoint Unit (FPB)"
|
|
sif COMPonent.AVAILABLE("FPB")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
|
|
width 10.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Version 1,Version 2,?..."
|
|
rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127"
|
|
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
|
|
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
|
|
textline ""
|
|
line.long 0x04 "FP_REMAP,Flash Patch Remap Register"
|
|
bitfld.long 0x04 29. " RMPSPT ,Indicates whether the FPB unit supports flash patch remap" "Not supported,SRAM region"
|
|
hexmask.long.tbyte 0x04 5.--28. 0x20 " REMAP ,Remap Base Address Field"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "FPB component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 15.
|
|
group.long 0x00++0x1B
|
|
line.long 0x00 "DWT_CTRL,Control Register"
|
|
rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
|
|
rbitfld.long 0x00 26. " NOEXTTRIG ,Shows whether the implementation includes external match signals" "Supported,Not supported"
|
|
textline " "
|
|
rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
|
|
rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
|
|
bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PCSAMPLEENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
|
|
bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
|
|
textline " "
|
|
bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled"
|
|
line.long 0x04 "DWT_CYCCNT,Cycle Count Register"
|
|
line.long 0x08 "DWT_CPICNT,CPI Count Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter"
|
|
line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter"
|
|
line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter"
|
|
line.long 0x14 "DWT_LSUCNT,LSU Count Register"
|
|
hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter"
|
|
line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count Register"
|
|
hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
|
|
textline " "
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
line.long 0x04 "DWT_MASK0,DWT Mask Registers 0"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x20)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x180)==0x80)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet,UNPREDICTABLE,UNPREDICTABLE,Generate watchpoint debug event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,CMPMATCH[N] event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x30)++0x07
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
line.long 0x04 "DWT_MASK1,DWT Mask Registers 1"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x20)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x00)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x40)++0x07
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
line.long 0x04 "DWT_MASK2,DWT Mask Registers 2"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x20)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x00)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x50)++0x07
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
line.long 0x04 "DWT_MASK3,DWT Mask Registers 3"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x20)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x00)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
config 16. 8.
|
|
tree.open "PORT (Pin control and interrupts)"
|
|
tree "PORT A"
|
|
base ad:0x40049000
|
|
width 13.
|
|
sif cpuis("MK02FN64VLH10")||cpuis("MK02FN128VLH10")
|
|
tree "PORT A Pin Control Registers"
|
|
; 0x0 - adres
|
|
; A - litera portu (A,B,C,...)
|
|
; 0 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('A'=='A')&&(0>=1)&&(0<=5))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTA_PCR_0,PORTA Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(0==0))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTA_PCR_0,PORTA Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTA_PCR_0,PORTA Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('A'=='A')&&(0>=1)&&(0<=4))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTA_PCR_0,PORTA Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(0==5))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTA_PCR_0,PORTA Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(0==0))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTA_PCR_0,PORTA Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTA_PCR_0,PORTA Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTA_PCR_0,PORTA Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTA_PCR_0,PORTA Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTA_PCR_0,PORTA Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x4 - adres
|
|
; A - litera portu (A,B,C,...)
|
|
; 1 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('A'=='A')&&(1>=1)&&(1<=5))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTA_PCR_1,PORTA Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(1==0))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTA_PCR_1,PORTA Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTA_PCR_1,PORTA Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('A'=='A')&&(1>=1)&&(1<=4))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTA_PCR_1,PORTA Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(1==5))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTA_PCR_1,PORTA Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(1==0))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTA_PCR_1,PORTA Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTA_PCR_1,PORTA Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTA_PCR_1,PORTA Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTA_PCR_1,PORTA Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTA_PCR_1,PORTA Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x8 - adres
|
|
; A - litera portu (A,B,C,...)
|
|
; 2 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('A'=='A')&&(2>=1)&&(2<=5))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTA_PCR_2,PORTA Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(2==0))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTA_PCR_2,PORTA Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTA_PCR_2,PORTA Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('A'=='A')&&(2>=1)&&(2<=4))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTA_PCR_2,PORTA Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(2==5))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTA_PCR_2,PORTA Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(2==0))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTA_PCR_2,PORTA Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTA_PCR_2,PORTA Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTA_PCR_2,PORTA Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTA_PCR_2,PORTA Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTA_PCR_2,PORTA Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0xC - adres
|
|
; A - litera portu (A,B,C,...)
|
|
; 3 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('A'=='A')&&(3>=1)&&(3<=5))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTA_PCR_3,PORTA Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(3==0))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTA_PCR_3,PORTA Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTA_PCR_3,PORTA Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('A'=='A')&&(3>=1)&&(3<=4))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTA_PCR_3,PORTA Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(3==5))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTA_PCR_3,PORTA Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(3==0))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTA_PCR_3,PORTA Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTA_PCR_3,PORTA Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTA_PCR_3,PORTA Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTA_PCR_3,PORTA Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTA_PCR_3,PORTA Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x10 - adres
|
|
; A - litera portu (A,B,C,...)
|
|
; 4 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('A'=='A')&&(4>=1)&&(4<=5))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTA_PCR_4,PORTA Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(4==0))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTA_PCR_4,PORTA Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTA_PCR_4,PORTA Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('A'=='A')&&(4>=1)&&(4<=4))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTA_PCR_4,PORTA Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(4==5))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTA_PCR_4,PORTA Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(4==0))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTA_PCR_4,PORTA Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTA_PCR_4,PORTA Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTA_PCR_4,PORTA Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTA_PCR_4,PORTA Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTA_PCR_4,PORTA Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x14 - adres
|
|
; A - litera portu (A,B,C,...)
|
|
; 5 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('A'=='A')&&(5>=1)&&(5<=5))
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTA_PCR_5,PORTA Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(5==0))
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTA_PCR_5,PORTA Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTA_PCR_5,PORTA Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('A'=='A')&&(5>=1)&&(5<=4))
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTA_PCR_5,PORTA Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(5==5))
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTA_PCR_5,PORTA Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(5==0))
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTA_PCR_5,PORTA Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTA_PCR_5,PORTA Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTA_PCR_5,PORTA Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTA_PCR_5,PORTA Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTA_PCR_5,PORTA Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x30 - adres
|
|
; A - litera portu (A,B,C,...)
|
|
; 12 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('A'=='A')&&(12>=1)&&(12<=5))
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "PORTA_PCR_12,PORTA Pin Control Register 12"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(12==0))
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "PORTA_PCR_12,PORTA Pin Control Register 12"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "PORTA_PCR_12,PORTA Pin Control Register 12"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('A'=='A')&&(12>=1)&&(12<=4))
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "PORTA_PCR_12,PORTA Pin Control Register 12"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(12==5))
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "PORTA_PCR_12,PORTA Pin Control Register 12"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(12==0))
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "PORTA_PCR_12,PORTA Pin Control Register 12"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "PORTA_PCR_12,PORTA Pin Control Register 12"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "PORTA_PCR_12,PORTA Pin Control Register 12"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "PORTA_PCR_12,PORTA Pin Control Register 12"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "PORTA_PCR_12,PORTA Pin Control Register 12"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x34 - adres
|
|
; A - litera portu (A,B,C,...)
|
|
; 13 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('A'=='A')&&(13>=1)&&(13<=5))
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "PORTA_PCR_13,PORTA Pin Control Register 13"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(13==0))
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "PORTA_PCR_13,PORTA Pin Control Register 13"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "PORTA_PCR_13,PORTA Pin Control Register 13"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('A'=='A')&&(13>=1)&&(13<=4))
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "PORTA_PCR_13,PORTA Pin Control Register 13"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(13==5))
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "PORTA_PCR_13,PORTA Pin Control Register 13"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(13==0))
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "PORTA_PCR_13,PORTA Pin Control Register 13"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "PORTA_PCR_13,PORTA Pin Control Register 13"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "PORTA_PCR_13,PORTA Pin Control Register 13"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "PORTA_PCR_13,PORTA Pin Control Register 13"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "PORTA_PCR_13,PORTA Pin Control Register 13"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x48 - adres
|
|
; A - litera portu (A,B,C,...)
|
|
; 18 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('A'=='A')&&(18>=1)&&(18<=5))
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTA_PCR_18,PORTA Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(18==0))
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTA_PCR_18,PORTA Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTA_PCR_18,PORTA Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('A'=='A')&&(18>=1)&&(18<=4))
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTA_PCR_18,PORTA Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(18==5))
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTA_PCR_18,PORTA Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(18==0))
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTA_PCR_18,PORTA Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTA_PCR_18,PORTA Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTA_PCR_18,PORTA Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTA_PCR_18,PORTA Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTA_PCR_18,PORTA Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x4C - adres
|
|
; A - litera portu (A,B,C,...)
|
|
; 19 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('A'=='A')&&(19>=1)&&(19<=5))
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTA_PCR_19,PORTA Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(19==0))
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTA_PCR_19,PORTA Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTA_PCR_19,PORTA Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('A'=='A')&&(19>=1)&&(19<=4))
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTA_PCR_19,PORTA Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(19==5))
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTA_PCR_19,PORTA Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(19==0))
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTA_PCR_19,PORTA Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTA_PCR_19,PORTA Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTA_PCR_19,PORTA Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTA_PCR_19,PORTA Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTA_PCR_19,PORTA Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
width 13.
|
|
wgroup.long 0x80++0x07
|
|
line.long 0x00 "PORTA_GPCLR,PORTA Global Pin Control Low Register"
|
|
bitfld.long 0x00 29. " GPWE_13 ,Global pin 13 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 28. " GPWE_12 ,Global pin 12 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 21. " GPWE_5 ,Global pin 5 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 20. " GPWE_4 ,Global pin 4 write enable" "Disable,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GPWE_3 ,Global pin 3 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 18. " GPWE_2 ,Global pin 2 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 17. " GPWE_1 ,Global pin 1 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 16. " GPWE_0 ,Global pin 0 write enable" "Disable,Enable"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " GPWD ,Global pin write data"
|
|
line.long 0x04 "PORTA_GPCHR,PORTA Global Pin Control High Register"
|
|
bitfld.long 0x04 19. " GPWE_19 ,Global pin 19 write enable" "Disable,Enable"
|
|
bitfld.long 0x04 18. " GPWE_18 ,Global pin 18 write enable" "Disable,Enable"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " GPWD ,Global pin write data"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "PORTA_ISF_R,PORTA Interrupt Status Flag Register"
|
|
eventfld.long 0x00 19. " ISF_19 ,Interrupt status flag 19 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 18. " ISF_18 ,Interrupt status flag 18 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 13. " ISF_13 ,Interrupt status flag 13 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 12. " ISF_12 ,Interrupt status flag 12 (In digital modes only)" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 5. " ISF_5 ,Interrupt status flag 5 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 4. " ISF_4 ,Interrupt status flag 4 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 3. " ISF_3 ,Interrupt status flag 3 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 2. " ISF_2 ,Interrupt status flag 2 (In digital modes only)" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " ISF_1 ,Interrupt status flag 1 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " ISF_0 ,Interrupt status flag 0 (In digital modes only)" "No interrupt,Interrupt"
|
|
rgroup.long 0xC0++0x03
|
|
line.long 0x00 "PORTA_DFER,Digital Filter Enable Register"
|
|
bitfld.long 0x00 19. " DFE_19 ,Pin 19 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " DFE_18 ,Pin 18 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " DFE_13 ,Pin 13 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " DFE_12 ,Pin 12 digital filter enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DFE_5 ,Pin 5 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DFE_4 ,Pin 4 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " DFE_3 ,Pin 3 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DFE_2 ,Pin 2 digital filter enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DFE_1 ,Pin 1 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " DFE_0 ,Pin 0 digital filter enable" "Disabled,Enabled"
|
|
rgroup.long 0xC4++0x03
|
|
line.long 0x00 "PORTA_DFCR,Digital Filter Clock Register"
|
|
bitfld.long 0x00 0. " CS ,Clock source" "Bus clk,1 kHz LPO"
|
|
rgroup.long 0xC8++0x03
|
|
line.long 0x00 "PORTA_DFWR,Digital Filter Width Register"
|
|
bitfld.long 0x00 0.--4. " FILT ,Filter length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
elif cpuis("MK02FN64VFM10")||cpuis("MK02FN128VFM10")||cpuis("MK02FN64VLF10")||cpuis("MK02FN128VLF10")
|
|
tree "PORT A Pin Control Registers"
|
|
; 0x0 - adres
|
|
; A - litera portu (A,B,C,...)
|
|
; 0 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('A'=='A')&&(0>=1)&&(0<=5))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTA_PCR_0,PORTA Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(0==0))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTA_PCR_0,PORTA Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTA_PCR_0,PORTA Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('A'=='A')&&(0>=1)&&(0<=4))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTA_PCR_0,PORTA Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(0==5))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTA_PCR_0,PORTA Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(0==0))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTA_PCR_0,PORTA Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTA_PCR_0,PORTA Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTA_PCR_0,PORTA Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTA_PCR_0,PORTA Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTA_PCR_0,PORTA Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x4 - adres
|
|
; A - litera portu (A,B,C,...)
|
|
; 1 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('A'=='A')&&(1>=1)&&(1<=5))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTA_PCR_1,PORTA Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(1==0))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTA_PCR_1,PORTA Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTA_PCR_1,PORTA Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('A'=='A')&&(1>=1)&&(1<=4))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTA_PCR_1,PORTA Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(1==5))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTA_PCR_1,PORTA Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(1==0))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTA_PCR_1,PORTA Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTA_PCR_1,PORTA Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTA_PCR_1,PORTA Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTA_PCR_1,PORTA Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTA_PCR_1,PORTA Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x8 - adres
|
|
; A - litera portu (A,B,C,...)
|
|
; 2 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('A'=='A')&&(2>=1)&&(2<=5))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTA_PCR_2,PORTA Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(2==0))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTA_PCR_2,PORTA Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTA_PCR_2,PORTA Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('A'=='A')&&(2>=1)&&(2<=4))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTA_PCR_2,PORTA Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(2==5))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTA_PCR_2,PORTA Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(2==0))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTA_PCR_2,PORTA Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTA_PCR_2,PORTA Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTA_PCR_2,PORTA Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTA_PCR_2,PORTA Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTA_PCR_2,PORTA Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0xC - adres
|
|
; A - litera portu (A,B,C,...)
|
|
; 3 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('A'=='A')&&(3>=1)&&(3<=5))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTA_PCR_3,PORTA Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(3==0))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTA_PCR_3,PORTA Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTA_PCR_3,PORTA Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('A'=='A')&&(3>=1)&&(3<=4))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTA_PCR_3,PORTA Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(3==5))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTA_PCR_3,PORTA Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(3==0))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTA_PCR_3,PORTA Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTA_PCR_3,PORTA Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTA_PCR_3,PORTA Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTA_PCR_3,PORTA Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTA_PCR_3,PORTA Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x10 - adres
|
|
; A - litera portu (A,B,C,...)
|
|
; 4 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('A'=='A')&&(4>=1)&&(4<=5))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTA_PCR_4,PORTA Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(4==0))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTA_PCR_4,PORTA Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTA_PCR_4,PORTA Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('A'=='A')&&(4>=1)&&(4<=4))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTA_PCR_4,PORTA Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(4==5))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTA_PCR_4,PORTA Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(4==0))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTA_PCR_4,PORTA Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTA_PCR_4,PORTA Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTA_PCR_4,PORTA Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTA_PCR_4,PORTA Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTA_PCR_4,PORTA Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x48 - adres
|
|
; A - litera portu (A,B,C,...)
|
|
; 18 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('A'=='A')&&(18>=1)&&(18<=5))
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTA_PCR_18,PORTA Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(18==0))
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTA_PCR_18,PORTA Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTA_PCR_18,PORTA Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('A'=='A')&&(18>=1)&&(18<=4))
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTA_PCR_18,PORTA Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(18==5))
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTA_PCR_18,PORTA Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(18==0))
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTA_PCR_18,PORTA Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTA_PCR_18,PORTA Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTA_PCR_18,PORTA Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTA_PCR_18,PORTA Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTA_PCR_18,PORTA Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x4C - adres
|
|
; A - litera portu (A,B,C,...)
|
|
; 19 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('A'=='A')&&(19>=1)&&(19<=5))
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTA_PCR_19,PORTA Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(19==0))
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTA_PCR_19,PORTA Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTA_PCR_19,PORTA Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('A'=='A')&&(19>=1)&&(19<=4))
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTA_PCR_19,PORTA Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(19==5))
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTA_PCR_19,PORTA Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('A'=='A')&&(19==0))
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTA_PCR_19,PORTA Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTA_PCR_19,PORTA Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTA_PCR_19,PORTA Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTA_PCR_19,PORTA Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTA_PCR_19,PORTA Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
width 13.
|
|
wgroup.long 0x80++0x07
|
|
line.long 0x00 "PORTA_GPCLR,PORTA Global Pin Control Low Register"
|
|
bitfld.long 0x00 20. " GPWE_4 ,Global pin 4 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 19. " GPWE_3 ,Global pin 3 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 18. " GPWE_2 ,Global pin 2 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 17. " GPWE_1 ,Global pin 1 write enable" "Disable,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GPWE_0 ,Global pin 0 write enable" "Disable,Enable"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " GPWD ,Global pin write data"
|
|
line.long 0x04 "PORTA_GPCHR,PORTA Global Pin Control High Register"
|
|
bitfld.long 0x04 19. " GPWE_19 ,Global pin 19 write enable" "Disable,Enable"
|
|
bitfld.long 0x04 18. " GPWE_18 ,Global pin 18 write enable" "Disable,Enable"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " GPWD ,Global pin write data"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "PORTA_ISF_R,PORTA Interrupt Status Flag Register"
|
|
eventfld.long 0x00 19. " ISF_19 ,Interrupt status flag 19 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 18. " ISF_18 ,Interrupt status flag 18 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 4. " ISF_4 ,Interrupt status flag 4 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 3. " ISF_3 ,Interrupt status flag 3 (In digital modes only)" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 2. " ISF_2 ,Interrupt status flag 2 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " ISF_1 ,Interrupt status flag 1 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " ISF_0 ,Interrupt status flag 0 (In digital modes only)" "No interrupt,Interrupt"
|
|
rgroup.long 0xC0++0x03
|
|
line.long 0x00 "PORTA_DFER,Digital Filter Enable Register"
|
|
bitfld.long 0x00 19. " DFE_19 ,Pin 19 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " DFE_18 ,Pin 18 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DFE_4 ,Pin 4 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " DFE_3 ,Pin 3 digital filter enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DFE_2 ,Pin 2 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " DFE_1 ,Pin 1 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " DFE_0 ,Pin 0 digital filter enable" "Disabled,Enabled"
|
|
rgroup.long 0xC4++0x03
|
|
line.long 0x00 "PORTA_DFCR,Digital Filter Clock Register"
|
|
bitfld.long 0x00 0. " CS ,Clock source" "Bus clk,1 kHz LPO"
|
|
rgroup.long 0xC8++0x03
|
|
line.long 0x00 "PORTA_DFWR,Digital Filter Width Register"
|
|
bitfld.long 0x00 0.--4. " FILT ,Filter length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "PORT B"
|
|
base ad:0x4004A000
|
|
width 13.
|
|
sif cpuis("MK02FN64VLH10")||cpuis("MK02FN128VLH10")
|
|
tree "PORT B Pin Control Registers"
|
|
; 0x0 - adres
|
|
; B - litera portu (A,B,C,...)
|
|
; 0 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('B'=='A')&&(0>=1)&&(0<=5))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(0==0))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('B'=='A')&&(0>=1)&&(0<=4))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(0==5))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(0==0))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x4 - adres
|
|
; B - litera portu (A,B,C,...)
|
|
; 1 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('B'=='A')&&(1>=1)&&(1<=5))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(1==0))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('B'=='A')&&(1>=1)&&(1<=4))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(1==5))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(1==0))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x8 - adres
|
|
; B - litera portu (A,B,C,...)
|
|
; 2 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('B'=='A')&&(2>=1)&&(2<=5))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTB_PCR_2,PORTB Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(2==0))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTB_PCR_2,PORTB Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTB_PCR_2,PORTB Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('B'=='A')&&(2>=1)&&(2<=4))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTB_PCR_2,PORTB Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(2==5))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTB_PCR_2,PORTB Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(2==0))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTB_PCR_2,PORTB Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTB_PCR_2,PORTB Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTB_PCR_2,PORTB Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTB_PCR_2,PORTB Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTB_PCR_2,PORTB Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0xC - adres
|
|
; B - litera portu (A,B,C,...)
|
|
; 3 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('B'=='A')&&(3>=1)&&(3<=5))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTB_PCR_3,PORTB Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(3==0))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTB_PCR_3,PORTB Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTB_PCR_3,PORTB Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('B'=='A')&&(3>=1)&&(3<=4))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTB_PCR_3,PORTB Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(3==5))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTB_PCR_3,PORTB Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(3==0))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTB_PCR_3,PORTB Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTB_PCR_3,PORTB Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTB_PCR_3,PORTB Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTB_PCR_3,PORTB Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTB_PCR_3,PORTB Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x40 - adres
|
|
; B - litera portu (A,B,C,...)
|
|
; 16 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('B'=='A')&&(16>=1)&&(16<=5))
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTB_PCR_16,PORTB Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(16==0))
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTB_PCR_16,PORTB Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTB_PCR_16,PORTB Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('B'=='A')&&(16>=1)&&(16<=4))
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTB_PCR_16,PORTB Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(16==5))
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTB_PCR_16,PORTB Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(16==0))
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTB_PCR_16,PORTB Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTB_PCR_16,PORTB Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTB_PCR_16,PORTB Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTB_PCR_16,PORTB Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTB_PCR_16,PORTB Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x44 - adres
|
|
; B - litera portu (A,B,C,...)
|
|
; 17 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('B'=='A')&&(17>=1)&&(17<=5))
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTB_PCR_17,PORTB Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(17==0))
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTB_PCR_17,PORTB Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTB_PCR_17,PORTB Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('B'=='A')&&(17>=1)&&(17<=4))
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTB_PCR_17,PORTB Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(17==5))
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTB_PCR_17,PORTB Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(17==0))
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTB_PCR_17,PORTB Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTB_PCR_17,PORTB Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTB_PCR_17,PORTB Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTB_PCR_17,PORTB Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTB_PCR_17,PORTB Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x48 - adres
|
|
; B - litera portu (A,B,C,...)
|
|
; 18 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('B'=='A')&&(18>=1)&&(18<=5))
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTB_PCR_18,PORTB Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(18==0))
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTB_PCR_18,PORTB Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTB_PCR_18,PORTB Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('B'=='A')&&(18>=1)&&(18<=4))
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTB_PCR_18,PORTB Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(18==5))
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTB_PCR_18,PORTB Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(18==0))
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTB_PCR_18,PORTB Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTB_PCR_18,PORTB Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTB_PCR_18,PORTB Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTB_PCR_18,PORTB Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTB_PCR_18,PORTB Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x4C - adres
|
|
; B - litera portu (A,B,C,...)
|
|
; 19 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('B'=='A')&&(19>=1)&&(19<=5))
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTB_PCR_19,PORTB Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(19==0))
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTB_PCR_19,PORTB Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTB_PCR_19,PORTB Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('B'=='A')&&(19>=1)&&(19<=4))
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTB_PCR_19,PORTB Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(19==5))
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTB_PCR_19,PORTB Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(19==0))
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTB_PCR_19,PORTB Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTB_PCR_19,PORTB Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTB_PCR_19,PORTB Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTB_PCR_19,PORTB Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTB_PCR_19,PORTB Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
width 13.
|
|
wgroup.long 0x80++0x07
|
|
line.long 0x00 "PORTB_GPCLR,PORTB Global Pin Control Low Register"
|
|
bitfld.long 0x00 19. " GPWE_3 ,Global pin 3 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 18. " GPWE_2 ,Global pin 2 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 17. " GPWE_1 ,Global pin 1 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 16. " GPWE_0 ,Global pin 0 write enable" "Disable,Enable"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " GPWD ,Global pin write data"
|
|
line.long 0x04 "PORTB_GPCHR,PORTB Global Pin Control High Register"
|
|
bitfld.long 0x04 19. " GPWE_19 ,Global pin 19 write enable" "Disable,Enable"
|
|
bitfld.long 0x04 18. " GPWE_18 ,Global pin 18 write enable" "Disable,Enable"
|
|
bitfld.long 0x04 17. " GPWE_17 ,Global pin 17 write enable" "Disable,Enable"
|
|
bitfld.long 0x04 16. " GPWE_16 ,Global pin 16 write enable" "Disable,Enable"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " GPWD ,Global pin write data"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "PORTB_ISF_R,PORTB Interrupt Status Flag Register"
|
|
eventfld.long 0x00 19. " ISF_19 ,Interrupt status flag 19 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 18. " ISF_18 ,Interrupt status flag 18 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 17. " ISF_17 ,Interrupt status flag 17 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 16. " ISF_16 ,Interrupt status flag 16 (In digital modes only)" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " ISF_3 ,Interrupt status flag 3 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 2. " ISF_2 ,Interrupt status flag 2 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " ISF_1 ,Interrupt status flag 1 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " ISF_0 ,Interrupt status flag 0 (In digital modes only)" "No interrupt,Interrupt"
|
|
rgroup.long 0xC0++0x03
|
|
line.long 0x00 "PORTB_DFER,Digital Filter Enable Register"
|
|
bitfld.long 0x00 19. " DFE_19 ,Pin 19 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " DFE_18 ,Pin 18 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " DFE_17 ,Pin 17 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " DFE_16 ,Pin 16 digital filter enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DFE_3 ,Pin 3 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DFE_2 ,Pin 2 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " DFE_1 ,Pin 1 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " DFE_0 ,Pin 0 digital filter enable" "Disabled,Enabled"
|
|
rgroup.long 0xC4++0x03
|
|
line.long 0x00 "PORTB_DFCR,Digital Filter Clock Register"
|
|
bitfld.long 0x00 0. " CS ,Clock source" "Bus clk,1 kHz LPO"
|
|
rgroup.long 0xC8++0x03
|
|
line.long 0x00 "PORTB_DFWR,Digital Filter Width Register"
|
|
bitfld.long 0x00 0.--4. " FILT ,Filter length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
elif cpuis("MK02FN64VLF10")||cpuis("MK02FN128VLF10")
|
|
tree "PORT B Pin Control Registers"
|
|
; 0x0 - adres
|
|
; B - litera portu (A,B,C,...)
|
|
; 0 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('B'=='A')&&(0>=1)&&(0<=5))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(0==0))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('B'=='A')&&(0>=1)&&(0<=4))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(0==5))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(0==0))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x4 - adres
|
|
; B - litera portu (A,B,C,...)
|
|
; 1 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('B'=='A')&&(1>=1)&&(1<=5))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(1==0))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('B'=='A')&&(1>=1)&&(1<=4))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(1==5))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(1==0))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x8 - adres
|
|
; B - litera portu (A,B,C,...)
|
|
; 2 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('B'=='A')&&(2>=1)&&(2<=5))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTB_PCR_2,PORTB Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(2==0))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTB_PCR_2,PORTB Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTB_PCR_2,PORTB Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('B'=='A')&&(2>=1)&&(2<=4))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTB_PCR_2,PORTB Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(2==5))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTB_PCR_2,PORTB Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(2==0))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTB_PCR_2,PORTB Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTB_PCR_2,PORTB Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTB_PCR_2,PORTB Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTB_PCR_2,PORTB Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTB_PCR_2,PORTB Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0xC - adres
|
|
; B - litera portu (A,B,C,...)
|
|
; 3 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('B'=='A')&&(3>=1)&&(3<=5))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTB_PCR_3,PORTB Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(3==0))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTB_PCR_3,PORTB Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTB_PCR_3,PORTB Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('B'=='A')&&(3>=1)&&(3<=4))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTB_PCR_3,PORTB Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(3==5))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTB_PCR_3,PORTB Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(3==0))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTB_PCR_3,PORTB Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTB_PCR_3,PORTB Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTB_PCR_3,PORTB Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTB_PCR_3,PORTB Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTB_PCR_3,PORTB Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x40 - adres
|
|
; B - litera portu (A,B,C,...)
|
|
; 16 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('B'=='A')&&(16>=1)&&(16<=5))
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTB_PCR_16,PORTB Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(16==0))
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTB_PCR_16,PORTB Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTB_PCR_16,PORTB Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('B'=='A')&&(16>=1)&&(16<=4))
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTB_PCR_16,PORTB Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(16==5))
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTB_PCR_16,PORTB Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(16==0))
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTB_PCR_16,PORTB Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTB_PCR_16,PORTB Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTB_PCR_16,PORTB Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTB_PCR_16,PORTB Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTB_PCR_16,PORTB Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x44 - adres
|
|
; B - litera portu (A,B,C,...)
|
|
; 17 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('B'=='A')&&(17>=1)&&(17<=5))
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTB_PCR_17,PORTB Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(17==0))
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTB_PCR_17,PORTB Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTB_PCR_17,PORTB Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('B'=='A')&&(17>=1)&&(17<=4))
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTB_PCR_17,PORTB Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(17==5))
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTB_PCR_17,PORTB Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(17==0))
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTB_PCR_17,PORTB Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTB_PCR_17,PORTB Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTB_PCR_17,PORTB Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTB_PCR_17,PORTB Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTB_PCR_17,PORTB Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
width 13.
|
|
wgroup.long 0x80++0x07
|
|
line.long 0x00 "PORTB_GPCLR,PORTB Global Pin Control Low Register"
|
|
bitfld.long 0x00 19. " GPWE_3 ,Global pin 3 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 18. " GPWE_2 ,Global pin 2 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 17. " GPWE_1 ,Global pin 1 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 16. " GPWE_0 ,Global pin 0 write enable" "Disable,Enable"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " GPWD ,Global pin write data"
|
|
line.long 0x04 "PORTB_GPCHR,PORTB Global Pin Control High Register"
|
|
bitfld.long 0x04 17. " GPWE_17 ,Global pin 17 write enable" "Disable,Enable"
|
|
bitfld.long 0x04 16. " GPWE_16 ,Global pin 16 write enable" "Disable,Enable"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " GPWD ,Global pin write data"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "PORTB_ISF_R,PORTB Interrupt Status Flag Register"
|
|
eventfld.long 0x00 17. " ISF_17 ,Interrupt status flag 17 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 16. " ISF_16 ,Interrupt status flag 16 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 3. " ISF_3 ,Interrupt status flag 3 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 2. " ISF_2 ,Interrupt status flag 2 (In digital modes only)" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " ISF_1 ,Interrupt status flag 1 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " ISF_0 ,Interrupt status flag 0 (In digital modes only)" "No interrupt,Interrupt"
|
|
rgroup.long 0xC0++0x03
|
|
line.long 0x00 "PORTB_DFER,Digital Filter Enable Register"
|
|
bitfld.long 0x00 17. " DFE_17 ,Pin 17 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " DFE_16 ,Pin 16 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " DFE_3 ,Pin 3 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DFE_2 ,Pin 2 digital filter enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DFE_1 ,Pin 1 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " DFE_0 ,Pin 0 digital filter enable" "Disabled,Enabled"
|
|
rgroup.long 0xC4++0x03
|
|
line.long 0x00 "PORTB_DFCR,Digital Filter Clock Register"
|
|
bitfld.long 0x00 0. " CS ,Clock source" "Bus clk,1 kHz LPO"
|
|
rgroup.long 0xC8++0x03
|
|
line.long 0x00 "PORTB_DFWR,Digital Filter Width Register"
|
|
bitfld.long 0x00 0.--4. " FILT ,Filter length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
elif cpuis("MK02FN64VFM10")||cpuis("MK02FN128VFM10")
|
|
tree "PORT B Pin Control Registers"
|
|
; 0x0 - adres
|
|
; B - litera portu (A,B,C,...)
|
|
; 0 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('B'=='A')&&(0>=1)&&(0<=5))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(0==0))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('B'=='A')&&(0>=1)&&(0<=4))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(0==5))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(0==0))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTB_PCR_0,PORTB Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x4 - adres
|
|
; B - litera portu (A,B,C,...)
|
|
; 1 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('B'=='A')&&(1>=1)&&(1<=5))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(1==0))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('B'=='A')&&(1>=1)&&(1<=4))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(1==5))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('B'=='A')&&(1==0))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTB_PCR_1,PORTB Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
width 13.
|
|
wgroup.long 0x80++0x03
|
|
line.long 0x00 "PORTB_GPCLR,PORTB Global Pin Control Low Register"
|
|
bitfld.long 0x00 17. " GPWE_1 ,Global pin 1 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 16. " GPWE_0 ,Global pin 0 write enable" "Disable,Enable"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " GPWD ,Global pin write data"
|
|
hgroup.long 0x84++0x03
|
|
hide.long 0x00 "PORTB_GPCHR,PORTB Global Pin Control High Register"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "PORTB_ISF_R,PORTB Interrupt Status Flag Register"
|
|
eventfld.long 0x00 1. " ISF_1 ,Interrupt status flag 1 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " ISF_0 ,Interrupt status flag 0 (In digital modes only)" "No interrupt,Interrupt"
|
|
rgroup.long 0xC0++0x03
|
|
line.long 0x00 "PORTB_DFER,Digital Filter Enable Register"
|
|
bitfld.long 0x00 1. " DFE_1 ,Pin 1 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " DFE_0 ,Pin 0 digital filter enable" "Disabled,Enabled"
|
|
rgroup.long 0xC4++0x03
|
|
line.long 0x00 "PORTB_DFCR,Digital Filter Clock Register"
|
|
bitfld.long 0x00 0. " CS ,Clock source" "Bus clk,1 kHz LPO"
|
|
rgroup.long 0xC8++0x03
|
|
line.long 0x00 "PORTB_DFWR,Digital Filter Width Register"
|
|
bitfld.long 0x00 0.--4. " FILT ,Filter length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "PORT C"
|
|
base ad:0x4004B000
|
|
width 13.
|
|
sif cpuis("MK02FN64VLH10")||cpuis("MK02FN128VLH10")
|
|
tree "PORT C Pin Control Registers"
|
|
; 0x0 - adres
|
|
; C - litera portu (A,B,C,...)
|
|
; 0 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('C'=='A')&&(0>=1)&&(0<=5))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_0,PORTC Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(0==0))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_0,PORTC Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_0,PORTC Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('C'=='A')&&(0>=1)&&(0<=4))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_0,PORTC Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(0==5))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_0,PORTC Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(0==0))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_0,PORTC Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_0,PORTC Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_0,PORTC Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_0,PORTC Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_0,PORTC Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x4 - adres
|
|
; C - litera portu (A,B,C,...)
|
|
; 1 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('C'=='A')&&(1>=1)&&(1<=5))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(1==0))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('C'=='A')&&(1>=1)&&(1<=4))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(1==5))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(1==0))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x8 - adres
|
|
; C - litera portu (A,B,C,...)
|
|
; 2 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('C'=='A')&&(2>=1)&&(2<=5))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(2==0))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('C'=='A')&&(2>=1)&&(2<=4))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(2==5))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(2==0))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0xC - adres
|
|
; C - litera portu (A,B,C,...)
|
|
; 3 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('C'=='A')&&(3>=1)&&(3<=5))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(3==0))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('C'=='A')&&(3>=1)&&(3<=4))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(3==5))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(3==0))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x10 - adres
|
|
; C - litera portu (A,B,C,...)
|
|
; 4 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('C'=='A')&&(4>=1)&&(4<=5))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(4==0))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('C'=='A')&&(4>=1)&&(4<=4))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(4==5))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(4==0))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x14 - adres
|
|
; C - litera portu (A,B,C,...)
|
|
; 5 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('C'=='A')&&(5>=1)&&(5<=5))
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(5==0))
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('C'=='A')&&(5>=1)&&(5<=4))
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(5==5))
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(5==0))
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x18 - adres
|
|
; C - litera portu (A,B,C,...)
|
|
; 6 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('C'=='A')&&(6>=1)&&(6<=5))
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(6==0))
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('C'=='A')&&(6>=1)&&(6<=4))
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(6==5))
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(6==0))
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x1C - adres
|
|
; C - litera portu (A,B,C,...)
|
|
; 7 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('C'=='A')&&(7>=1)&&(7<=5))
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(7==0))
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('C'=='A')&&(7>=1)&&(7<=4))
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(7==5))
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(7==0))
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x20 - adres
|
|
; C - litera portu (A,B,C,...)
|
|
; 8 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('C'=='A')&&(8>=1)&&(8<=5))
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PORTC_PCR_8,PORTC Pin Control Register 8"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(8==0))
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PORTC_PCR_8,PORTC Pin Control Register 8"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PORTC_PCR_8,PORTC Pin Control Register 8"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('C'=='A')&&(8>=1)&&(8<=4))
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PORTC_PCR_8,PORTC Pin Control Register 8"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(8==5))
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PORTC_PCR_8,PORTC Pin Control Register 8"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(8==0))
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PORTC_PCR_8,PORTC Pin Control Register 8"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PORTC_PCR_8,PORTC Pin Control Register 8"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PORTC_PCR_8,PORTC Pin Control Register 8"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PORTC_PCR_8,PORTC Pin Control Register 8"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PORTC_PCR_8,PORTC Pin Control Register 8"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x24 - adres
|
|
; C - litera portu (A,B,C,...)
|
|
; 9 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('C'=='A')&&(9>=1)&&(9<=5))
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "PORTC_PCR_9,PORTC Pin Control Register 9"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(9==0))
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "PORTC_PCR_9,PORTC Pin Control Register 9"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "PORTC_PCR_9,PORTC Pin Control Register 9"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('C'=='A')&&(9>=1)&&(9<=4))
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "PORTC_PCR_9,PORTC Pin Control Register 9"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(9==5))
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "PORTC_PCR_9,PORTC Pin Control Register 9"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(9==0))
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "PORTC_PCR_9,PORTC Pin Control Register 9"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "PORTC_PCR_9,PORTC Pin Control Register 9"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "PORTC_PCR_9,PORTC Pin Control Register 9"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "PORTC_PCR_9,PORTC Pin Control Register 9"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "PORTC_PCR_9,PORTC Pin Control Register 9"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x28 - adres
|
|
; C - litera portu (A,B,C,...)
|
|
; 10 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('C'=='A')&&(10>=1)&&(10<=5))
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PORTC_PCR_10,PORTC Pin Control Register 10"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(10==0))
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PORTC_PCR_10,PORTC Pin Control Register 10"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PORTC_PCR_10,PORTC Pin Control Register 10"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('C'=='A')&&(10>=1)&&(10<=4))
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PORTC_PCR_10,PORTC Pin Control Register 10"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(10==5))
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PORTC_PCR_10,PORTC Pin Control Register 10"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(10==0))
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PORTC_PCR_10,PORTC Pin Control Register 10"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PORTC_PCR_10,PORTC Pin Control Register 10"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PORTC_PCR_10,PORTC Pin Control Register 10"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PORTC_PCR_10,PORTC Pin Control Register 10"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PORTC_PCR_10,PORTC Pin Control Register 10"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x2C - adres
|
|
; C - litera portu (A,B,C,...)
|
|
; 11 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('C'=='A')&&(11>=1)&&(11<=5))
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "PORTC_PCR_11,PORTC Pin Control Register 11"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(11==0))
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "PORTC_PCR_11,PORTC Pin Control Register 11"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "PORTC_PCR_11,PORTC Pin Control Register 11"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('C'=='A')&&(11>=1)&&(11<=4))
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "PORTC_PCR_11,PORTC Pin Control Register 11"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(11==5))
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "PORTC_PCR_11,PORTC Pin Control Register 11"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(11==0))
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "PORTC_PCR_11,PORTC Pin Control Register 11"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "PORTC_PCR_11,PORTC Pin Control Register 11"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "PORTC_PCR_11,PORTC Pin Control Register 11"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "PORTC_PCR_11,PORTC Pin Control Register 11"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "PORTC_PCR_11,PORTC Pin Control Register 11"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
width 13.
|
|
wgroup.long 0x80++0x03
|
|
line.long 0x00 "PORTC_GPCLR,PORTC Global Pin Control Low Register"
|
|
bitfld.long 0x00 27. " GPWE_11 ,Global pin 11 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 26. " GPWE_10 ,Global pin 10 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 25. " GPWE_9 ,Global pin 9 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 24. " GPWE_8 ,Global pin 8 write enable" "Disable,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 23. " GPWE_7 ,Global pin 7 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 22. " GPWE_6 ,Global pin 6 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 21. " GPWE_5 ,Global pin 5 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 20. " GPWE_4 ,Global pin 4 write enable" "Disable,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GPWE_3 ,Global pin 3 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 18. " GPWE_2 ,Global pin 2 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 17. " GPWE_1 ,Global pin 1 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 16. " GPWE_0 ,Global pin 0 write enable" "Disable,Enable"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " GPWD ,Global pin write data"
|
|
hgroup.long 0x84++0x03
|
|
hide.long 0x00 "PORTC_GPCHR,PORTC Global Pin Control High Register"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "PORTC_ISF_R,PORTC Interrupt Status Flag Register"
|
|
eventfld.long 0x00 11. " ISF_11 ,Interrupt status flag 11 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 10. " ISF_10 ,Interrupt status flag 10 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 9. " ISF_9 ,Interrupt status flag 9 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 8. " ISF_8 ,Interrupt status flag 8 (In digital modes only)" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 7. " ISF_7 ,Interrupt status flag 7 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 6. " ISF_6 ,Interrupt status flag 6 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 5. " ISF_5 ,Interrupt status flag 5 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 4. " ISF_4 ,Interrupt status flag 4 (In digital modes only)" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " ISF_3 ,Interrupt status flag 3 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 2. " ISF_2 ,Interrupt status flag 2 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " ISF_1 ,Interrupt status flag 1 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " ISF_0 ,Interrupt status flag 0 (In digital modes only)" "No interrupt,Interrupt"
|
|
rgroup.long 0xC0++0x03
|
|
line.long 0x00 "PORTC_DFER,Digital Filter Enable Register"
|
|
bitfld.long 0x00 11. " DFE_11 ,Pin 11 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " DFE_10 ,Pin 10 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " DFE_9 ,Pin 9 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " DFE_8 ,Pin 8 digital filter enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DFE_7 ,Pin 7 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " DFE_6 ,Pin 6 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " DFE_5 ,Pin 5 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DFE_4 ,Pin 4 digital filter enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DFE_3 ,Pin 3 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DFE_2 ,Pin 2 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " DFE_1 ,Pin 1 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " DFE_0 ,Pin 0 digital filter enable" "Disabled,Enabled"
|
|
rgroup.long 0xC4++0x03
|
|
line.long 0x00 "PORTC_DFCR,Digital Filter Clock Register"
|
|
bitfld.long 0x00 0. " CS ,Clock source" "Bus clk,1 kHz LPO"
|
|
rgroup.long 0xC8++0x03
|
|
line.long 0x00 "PORTC_DFWR,Digital Filter Width Register"
|
|
bitfld.long 0x00 0.--4. " FILT ,Filter length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
elif cpuis("MK02FN64VLF10")||cpuis("MK02FN128VLF10")
|
|
tree "PORT C Pin Control Registers"
|
|
; 0x0 - adres
|
|
; C - litera portu (A,B,C,...)
|
|
; 0 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('C'=='A')&&(0>=1)&&(0<=5))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_0,PORTC Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(0==0))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_0,PORTC Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_0,PORTC Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('C'=='A')&&(0>=1)&&(0<=4))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_0,PORTC Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(0==5))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_0,PORTC Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(0==0))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_0,PORTC Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_0,PORTC Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_0,PORTC Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_0,PORTC Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_0,PORTC Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x4 - adres
|
|
; C - litera portu (A,B,C,...)
|
|
; 1 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('C'=='A')&&(1>=1)&&(1<=5))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(1==0))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('C'=='A')&&(1>=1)&&(1<=4))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(1==5))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(1==0))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x8 - adres
|
|
; C - litera portu (A,B,C,...)
|
|
; 2 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('C'=='A')&&(2>=1)&&(2<=5))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(2==0))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('C'=='A')&&(2>=1)&&(2<=4))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(2==5))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(2==0))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0xC - adres
|
|
; C - litera portu (A,B,C,...)
|
|
; 3 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('C'=='A')&&(3>=1)&&(3<=5))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(3==0))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('C'=='A')&&(3>=1)&&(3<=4))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(3==5))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(3==0))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x10 - adres
|
|
; C - litera portu (A,B,C,...)
|
|
; 4 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('C'=='A')&&(4>=1)&&(4<=5))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(4==0))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('C'=='A')&&(4>=1)&&(4<=4))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(4==5))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(4==0))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x14 - adres
|
|
; C - litera portu (A,B,C,...)
|
|
; 5 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('C'=='A')&&(5>=1)&&(5<=5))
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(5==0))
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('C'=='A')&&(5>=1)&&(5<=4))
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(5==5))
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(5==0))
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x18 - adres
|
|
; C - litera portu (A,B,C,...)
|
|
; 6 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('C'=='A')&&(6>=1)&&(6<=5))
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(6==0))
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('C'=='A')&&(6>=1)&&(6<=4))
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(6==5))
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(6==0))
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x1C - adres
|
|
; C - litera portu (A,B,C,...)
|
|
; 7 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('C'=='A')&&(7>=1)&&(7<=5))
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(7==0))
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('C'=='A')&&(7>=1)&&(7<=4))
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(7==5))
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(7==0))
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
width 13.
|
|
wgroup.long 0x80++0x03
|
|
line.long 0x00 "PORTC_GPCLR,PORTC Global Pin Control Low Register"
|
|
bitfld.long 0x00 23. " GPWE_7 ,Global pin 7 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 22. " GPWE_6 ,Global pin 6 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 21. " GPWE_5 ,Global pin 5 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 20. " GPWE_4 ,Global pin 4 write enable" "Disable,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GPWE_3 ,Global pin 3 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 18. " GPWE_2 ,Global pin 2 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 17. " GPWE_1 ,Global pin 1 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 16. " GPWE_0 ,Global pin 0 write enable" "Disable,Enable"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " GPWD ,Global pin write data"
|
|
hgroup.long 0x84++0x03
|
|
hide.long 0x00 "PORTC_GPCHR,PORTC Global Pin Control High Register"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "PORTC_ISF_R,PORTC Interrupt Status Flag Register"
|
|
eventfld.long 0x00 7. " ISF_7 ,Interrupt status flag 7 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 6. " ISF_6 ,Interrupt status flag 6 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 5. " ISF_5 ,Interrupt status flag 5 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 4. " ISF_4 ,Interrupt status flag 4 (In digital modes only)" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " ISF_3 ,Interrupt status flag 3 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 2. " ISF_2 ,Interrupt status flag 2 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " ISF_1 ,Interrupt status flag 1 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " ISF_0 ,Interrupt status flag 0 (In digital modes only)" "No interrupt,Interrupt"
|
|
rgroup.long 0xC0++0x03
|
|
line.long 0x00 "PORTC_DFER,Digital Filter Enable Register"
|
|
bitfld.long 0x00 7. " DFE_7 ,Pin 7 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " DFE_6 ,Pin 6 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " DFE_5 ,Pin 5 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DFE_4 ,Pin 4 digital filter enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DFE_3 ,Pin 3 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DFE_2 ,Pin 2 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " DFE_1 ,Pin 1 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " DFE_0 ,Pin 0 digital filter enable" "Disabled,Enabled"
|
|
rgroup.long 0xC4++0x03
|
|
line.long 0x00 "PORTC_DFCR,Digital Filter Clock Register"
|
|
bitfld.long 0x00 0. " CS ,Clock source" "Bus clk,1 kHz LPO"
|
|
rgroup.long 0xC8++0x03
|
|
line.long 0x00 "PORTC_DFWR,Digital Filter Width Register"
|
|
bitfld.long 0x00 0.--4. " FILT ,Filter length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
elif cpuis("MK02FN64VFM10")||cpuis("MK02FN128VFM10")
|
|
tree "PORT C Pin Control Registers"
|
|
; 0x0 - adres
|
|
; C - litera portu (A,B,C,...)
|
|
; 1 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('C'=='A')&&(1>=1)&&(1<=5))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(1==0))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('C'=='A')&&(1>=1)&&(1<=4))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(1==5))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(1==0))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTC_PCR_1,PORTC Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x4 - adres
|
|
; C - litera portu (A,B,C,...)
|
|
; 2 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('C'=='A')&&(2>=1)&&(2<=5))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(2==0))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('C'=='A')&&(2>=1)&&(2<=4))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(2==5))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(2==0))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTC_PCR_2,PORTC Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x8 - adres
|
|
; C - litera portu (A,B,C,...)
|
|
; 3 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('C'=='A')&&(3>=1)&&(3<=5))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(3==0))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('C'=='A')&&(3>=1)&&(3<=4))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(3==5))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(3==0))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTC_PCR_3,PORTC Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0xC - adres
|
|
; C - litera portu (A,B,C,...)
|
|
; 4 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('C'=='A')&&(4>=1)&&(4<=5))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(4==0))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('C'=='A')&&(4>=1)&&(4<=4))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(4==5))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(4==0))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTC_PCR_4,PORTC Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x10 - adres
|
|
; C - litera portu (A,B,C,...)
|
|
; 5 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('C'=='A')&&(5>=1)&&(5<=5))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(5==0))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('C'=='A')&&(5>=1)&&(5<=4))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(5==5))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(5==0))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTC_PCR_5,PORTC Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x14 - adres
|
|
; C - litera portu (A,B,C,...)
|
|
; 6 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('C'=='A')&&(6>=1)&&(6<=5))
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(6==0))
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('C'=='A')&&(6>=1)&&(6<=4))
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(6==5))
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(6==0))
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTC_PCR_6,PORTC Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x18 - adres
|
|
; C - litera portu (A,B,C,...)
|
|
; 7 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('C'=='A')&&(7>=1)&&(7<=5))
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(7==0))
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('C'=='A')&&(7>=1)&&(7<=4))
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(7==5))
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('C'=='A')&&(7==0))
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTC_PCR_7,PORTC Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
width 13.
|
|
wgroup.long 0x80++0x03
|
|
line.long 0x00 "PORTC_GPCLR,PORTC Global Pin Control Low Register"
|
|
bitfld.long 0x00 23. " GPWE_7 ,Global pin 7 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 22. " GPWE_6 ,Global pin 6 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 21. " GPWE_5 ,Global pin 5 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 20. " GPWE_4 ,Global pin 4 write enable" "Disable,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GPWE_3 ,Global pin 3 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 18. " GPWE_2 ,Global pin 2 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 17. " GPWE_1 ,Global pin 1 write enable" "Disable,Enable"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " GPWD ,Global pin write data"
|
|
hgroup.long 0x84++0x03
|
|
hide.long 0x00 "PORTC_GPCHR,PORTC Global Pin Control High Register"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "PORTC_ISF_R,PORTC Interrupt Status Flag Register"
|
|
eventfld.long 0x00 7. " ISF_7 ,Interrupt status flag 7 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 6. " ISF_6 ,Interrupt status flag 6 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 5. " ISF_5 ,Interrupt status flag 5 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 4. " ISF_4 ,Interrupt status flag 4 (In digital modes only)" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " ISF_3 ,Interrupt status flag 3 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 2. " ISF_2 ,Interrupt status flag 2 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " ISF_1 ,Interrupt status flag 1 (In digital modes only)" "No interrupt,Interrupt"
|
|
rgroup.long 0xC0++0x03
|
|
line.long 0x00 "PORTC_DFER,Digital Filter Enable Register"
|
|
bitfld.long 0x00 7. " DFE_7 ,Pin 7 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " DFE_6 ,Pin 6 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " DFE_5 ,Pin 5 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DFE_4 ,Pin 4 digital filter enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DFE_3 ,Pin 3 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DFE_2 ,Pin 2 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " DFE_1 ,Pin 1 digital filter enable" "Disabled,Enabled"
|
|
rgroup.long 0xC4++0x03
|
|
line.long 0x00 "PORTC_DFCR,Digital Filter Clock Register"
|
|
bitfld.long 0x00 0. " CS ,Clock source" "Bus clk,1 kHz LPO"
|
|
rgroup.long 0xC8++0x03
|
|
line.long 0x00 "PORTC_DFWR,Digital Filter Width Register"
|
|
bitfld.long 0x00 0.--4. " FILT ,Filter length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "PORT D"
|
|
base ad:0x4004C000
|
|
width 13.
|
|
sif cpuis("MK02FN64VLF10")||cpuis("MK02FN128VLF10")||cpuis("MK02FN64VLH10")||cpuis("MK02FN128VLH10")
|
|
tree "PORT D Pin Control Registers"
|
|
; 0x0 - adres
|
|
; D - litera portu (A,B,C,...)
|
|
; 0 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('D'=='A')&&(0>=1)&&(0<=5))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTD_PCR_0,PORTD Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(0==0))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTD_PCR_0,PORTD Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTD_PCR_0,PORTD Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('D'=='A')&&(0>=1)&&(0<=4))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTD_PCR_0,PORTD Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(0==5))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTD_PCR_0,PORTD Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(0==0))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTD_PCR_0,PORTD Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTD_PCR_0,PORTD Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTD_PCR_0,PORTD Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTD_PCR_0,PORTD Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTD_PCR_0,PORTD Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x4 - adres
|
|
; D - litera portu (A,B,C,...)
|
|
; 1 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('D'=='A')&&(1>=1)&&(1<=5))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTD_PCR_1,PORTD Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(1==0))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTD_PCR_1,PORTD Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTD_PCR_1,PORTD Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('D'=='A')&&(1>=1)&&(1<=4))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTD_PCR_1,PORTD Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(1==5))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTD_PCR_1,PORTD Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(1==0))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTD_PCR_1,PORTD Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTD_PCR_1,PORTD Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTD_PCR_1,PORTD Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTD_PCR_1,PORTD Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTD_PCR_1,PORTD Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x8 - adres
|
|
; D - litera portu (A,B,C,...)
|
|
; 2 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('D'=='A')&&(2>=1)&&(2<=5))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTD_PCR_2,PORTD Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(2==0))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTD_PCR_2,PORTD Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTD_PCR_2,PORTD Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('D'=='A')&&(2>=1)&&(2<=4))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTD_PCR_2,PORTD Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(2==5))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTD_PCR_2,PORTD Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(2==0))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTD_PCR_2,PORTD Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTD_PCR_2,PORTD Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTD_PCR_2,PORTD Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTD_PCR_2,PORTD Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTD_PCR_2,PORTD Pin Control Register 2"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0xC - adres
|
|
; D - litera portu (A,B,C,...)
|
|
; 3 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('D'=='A')&&(3>=1)&&(3<=5))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTD_PCR_3,PORTD Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(3==0))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTD_PCR_3,PORTD Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTD_PCR_3,PORTD Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('D'=='A')&&(3>=1)&&(3<=4))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTD_PCR_3,PORTD Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(3==5))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTD_PCR_3,PORTD Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(3==0))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTD_PCR_3,PORTD Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTD_PCR_3,PORTD Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTD_PCR_3,PORTD Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTD_PCR_3,PORTD Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTD_PCR_3,PORTD Pin Control Register 3"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x10 - adres
|
|
; D - litera portu (A,B,C,...)
|
|
; 4 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('D'=='A')&&(4>=1)&&(4<=5))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTD_PCR_4,PORTD Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(4==0))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTD_PCR_4,PORTD Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTD_PCR_4,PORTD Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('D'=='A')&&(4>=1)&&(4<=4))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTD_PCR_4,PORTD Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(4==5))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTD_PCR_4,PORTD Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(4==0))
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTD_PCR_4,PORTD Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTD_PCR_4,PORTD Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTD_PCR_4,PORTD Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTD_PCR_4,PORTD Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PORTD_PCR_4,PORTD Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x14 - adres
|
|
; D - litera portu (A,B,C,...)
|
|
; 5 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('D'=='A')&&(5>=1)&&(5<=5))
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTD_PCR_5,PORTD Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(5==0))
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTD_PCR_5,PORTD Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTD_PCR_5,PORTD Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('D'=='A')&&(5>=1)&&(5<=4))
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTD_PCR_5,PORTD Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(5==5))
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTD_PCR_5,PORTD Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(5==0))
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTD_PCR_5,PORTD Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTD_PCR_5,PORTD Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTD_PCR_5,PORTD Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTD_PCR_5,PORTD Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PORTD_PCR_5,PORTD Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x18 - adres
|
|
; D - litera portu (A,B,C,...)
|
|
; 6 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('D'=='A')&&(6>=1)&&(6<=5))
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTD_PCR_6,PORTD Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(6==0))
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTD_PCR_6,PORTD Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTD_PCR_6,PORTD Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('D'=='A')&&(6>=1)&&(6<=4))
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTD_PCR_6,PORTD Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(6==5))
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTD_PCR_6,PORTD Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(6==0))
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTD_PCR_6,PORTD Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTD_PCR_6,PORTD Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTD_PCR_6,PORTD Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTD_PCR_6,PORTD Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PORTD_PCR_6,PORTD Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x1C - adres
|
|
; D - litera portu (A,B,C,...)
|
|
; 7 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('D'=='A')&&(7>=1)&&(7<=5))
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTD_PCR_7,PORTD Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(7==0))
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTD_PCR_7,PORTD Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTD_PCR_7,PORTD Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('D'=='A')&&(7>=1)&&(7<=4))
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTD_PCR_7,PORTD Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(7==5))
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTD_PCR_7,PORTD Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(7==0))
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTD_PCR_7,PORTD Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTD_PCR_7,PORTD Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTD_PCR_7,PORTD Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTD_PCR_7,PORTD Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PORTD_PCR_7,PORTD Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
width 13.
|
|
wgroup.long 0x80++0x03
|
|
line.long 0x00 "PORTD_GPCLR,PORTD Global Pin Control Low Register"
|
|
bitfld.long 0x00 23. " GPWE_7 ,Global pin 7 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 22. " GPWE_6 ,Global pin 6 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 21. " GPWE_5 ,Global pin 5 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 20. " GPWE_4 ,Global pin 4 write enable" "Disable,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GPWE_3 ,Global pin 3 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 18. " GPWE_2 ,Global pin 2 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 17. " GPWE_1 ,Global pin 1 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 16. " GPWE_0 ,Global pin 0 write enable" "Disable,Enable"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " GPWD ,Global pin write data"
|
|
hgroup.long 0x84++0x03
|
|
hide.long 0x00 "PORTD_GPCHR,PORTD Global Pin Control High Register"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "PORTD_ISF_R,PORTD Interrupt Status Flag Register"
|
|
eventfld.long 0x00 7. " ISF_7 ,Interrupt status flag 7 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 6. " ISF_6 ,Interrupt status flag 6 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 5. " ISF_5 ,Interrupt status flag 5 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 4. " ISF_4 ,Interrupt status flag 4 (In digital modes only)" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " ISF_3 ,Interrupt status flag 3 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 2. " ISF_2 ,Interrupt status flag 2 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " ISF_1 ,Interrupt status flag 1 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " ISF_0 ,Interrupt status flag 0 (In digital modes only)" "No interrupt,Interrupt"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "PORTD_DFER,Digital Filter Enable Register"
|
|
bitfld.long 0x00 7. " DFE_7 ,Pin 7 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " DFE_6 ,Pin 6 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " DFE_5 ,Pin 5 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DFE_4 ,Pin 4 digital filter enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DFE_3 ,Pin 3 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DFE_2 ,Pin 2 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " DFE_1 ,Pin 1 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " DFE_0 ,Pin 0 digital filter enable" "Disabled,Enabled"
|
|
rgroup.long 0xC4++0x03
|
|
line.long 0x00 "PORTD_DFCR,Digital Filter Clock Register"
|
|
bitfld.long 0x00 0. " CS ,Clock source" "Bus clk,1 kHz LPO"
|
|
rgroup.long 0xC8++0x03
|
|
line.long 0x00 "PORTD_DFWR,Digital Filter Width Register"
|
|
bitfld.long 0x00 0.--4. " FILT ,Filter length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
elif cpuis("MK02FN64VFM10")||cpuis("MK02FN128VFM10")
|
|
tree "PORT D Pin Control Registers"
|
|
; 0x0 - adres
|
|
; D - litera portu (A,B,C,...)
|
|
; 4 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('D'=='A')&&(4>=1)&&(4<=5))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTD_PCR_4,PORTD Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(4==0))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTD_PCR_4,PORTD Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTD_PCR_4,PORTD Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('D'=='A')&&(4>=1)&&(4<=4))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTD_PCR_4,PORTD Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(4==5))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTD_PCR_4,PORTD Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(4==0))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTD_PCR_4,PORTD Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTD_PCR_4,PORTD Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTD_PCR_4,PORTD Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTD_PCR_4,PORTD Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTD_PCR_4,PORTD Pin Control Register 4"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x4 - adres
|
|
; D - litera portu (A,B,C,...)
|
|
; 5 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('D'=='A')&&(5>=1)&&(5<=5))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTD_PCR_5,PORTD Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(5==0))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTD_PCR_5,PORTD Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTD_PCR_5,PORTD Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('D'=='A')&&(5>=1)&&(5<=4))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTD_PCR_5,PORTD Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(5==5))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTD_PCR_5,PORTD Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(5==0))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTD_PCR_5,PORTD Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTD_PCR_5,PORTD Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTD_PCR_5,PORTD Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTD_PCR_5,PORTD Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTD_PCR_5,PORTD Pin Control Register 5"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x8 - adres
|
|
; D - litera portu (A,B,C,...)
|
|
; 6 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('D'=='A')&&(6>=1)&&(6<=5))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTD_PCR_6,PORTD Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(6==0))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTD_PCR_6,PORTD Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTD_PCR_6,PORTD Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('D'=='A')&&(6>=1)&&(6<=4))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTD_PCR_6,PORTD Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(6==5))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTD_PCR_6,PORTD Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(6==0))
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTD_PCR_6,PORTD Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTD_PCR_6,PORTD Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTD_PCR_6,PORTD Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTD_PCR_6,PORTD Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "PORTD_PCR_6,PORTD Pin Control Register 6"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0xC - adres
|
|
; D - litera portu (A,B,C,...)
|
|
; 7 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('D'=='A')&&(7>=1)&&(7<=5))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTD_PCR_7,PORTD Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(7==0))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTD_PCR_7,PORTD Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTD_PCR_7,PORTD Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('D'=='A')&&(7>=1)&&(7<=4))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTD_PCR_7,PORTD Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(7==5))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTD_PCR_7,PORTD Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('D'=='A')&&(7==0))
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTD_PCR_7,PORTD Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTD_PCR_7,PORTD Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTD_PCR_7,PORTD Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTD_PCR_7,PORTD Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PORTD_PCR_7,PORTD Pin Control Register 7"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
width 13.
|
|
wgroup.long 0x80++0x03
|
|
line.long 0x00 "PORTD_GPCLR,PORTD Global Pin Control Low Register"
|
|
bitfld.long 0x00 23. " GPWE_7 ,Global pin 7 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 22. " GPWE_6 ,Global pin 6 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 21. " GPWE_5 ,Global pin 5 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 20. " GPWE_4 ,Global pin 4 write enable" "Disable,Enable"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " GPWD ,Global pin write data"
|
|
hgroup.long 0x84++0x03
|
|
hide.long 0x00 "PORTD_GPCHR,PORTD Global Pin Control High Register"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "PORTD_ISF_R,PORTD Interrupt Status Flag Register"
|
|
eventfld.long 0x00 7. " ISF_7 ,Interrupt status flag 7 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 6. " ISF_6 ,Interrupt status flag 6 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 5. " ISF_5 ,Interrupt status flag 5 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 4. " ISF_4 ,Interrupt status flag 4 (In digital modes only)" "No interrupt,Interrupt"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "PORTD_DFER,Digital Filter Enable Register"
|
|
bitfld.long 0x00 7. " DFE_7 ,Pin 7 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " DFE_6 ,Pin 6 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " DFE_5 ,Pin 5 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DFE_4 ,Pin 4 digital filter enable" "Disabled,Enabled"
|
|
rgroup.long 0xC4++0x03
|
|
line.long 0x00 "PORTD_DFCR,Digital Filter Clock Register"
|
|
bitfld.long 0x00 0. " CS ,Clock source" "Bus clk,1 kHz LPO"
|
|
rgroup.long 0xC8++0x03
|
|
line.long 0x00 "PORTD_DFWR,Digital Filter Width Register"
|
|
bitfld.long 0x00 0.--4. " FILT ,Filter length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "PORT E"
|
|
base ad:0x4004D000
|
|
width 13.
|
|
sif cpuis("MK02FN64VLH10")||cpuis("MK02FN128VLH10")
|
|
tree "PORT E Pin Control Registers"
|
|
; 0x0 - adres
|
|
; E - litera portu (A,B,C,...)
|
|
; 0 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('E'=='A')&&(0>=1)&&(0<=5))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTE_PCR_0,PORTE Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(0==0))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTE_PCR_0,PORTE Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTE_PCR_0,PORTE Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('E'=='A')&&(0>=1)&&(0<=4))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTE_PCR_0,PORTE Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(0==5))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTE_PCR_0,PORTE Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(0==0))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTE_PCR_0,PORTE Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTE_PCR_0,PORTE Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTE_PCR_0,PORTE Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTE_PCR_0,PORTE Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "PORTE_PCR_0,PORTE Pin Control Register 0"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x4 - adres
|
|
; E - litera portu (A,B,C,...)
|
|
; 1 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('E'=='A')&&(1>=1)&&(1<=5))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTE_PCR_1,PORTE Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(1==0))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTE_PCR_1,PORTE Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTE_PCR_1,PORTE Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('E'=='A')&&(1>=1)&&(1<=4))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTE_PCR_1,PORTE Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(1==5))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTE_PCR_1,PORTE Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(1==0))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTE_PCR_1,PORTE Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTE_PCR_1,PORTE Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTE_PCR_1,PORTE Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTE_PCR_1,PORTE Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "PORTE_PCR_1,PORTE Pin Control Register 1"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x40 - adres
|
|
; E - litera portu (A,B,C,...)
|
|
; 16 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('E'=='A')&&(16>=1)&&(16<=5))
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTE_PCR_16,PORTE Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(16==0))
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTE_PCR_16,PORTE Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTE_PCR_16,PORTE Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('E'=='A')&&(16>=1)&&(16<=4))
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTE_PCR_16,PORTE Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(16==5))
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTE_PCR_16,PORTE Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(16==0))
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTE_PCR_16,PORTE Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTE_PCR_16,PORTE Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTE_PCR_16,PORTE Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTE_PCR_16,PORTE Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTE_PCR_16,PORTE Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x44 - adres
|
|
; E - litera portu (A,B,C,...)
|
|
; 17 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('E'=='A')&&(17>=1)&&(17<=5))
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTE_PCR_17,PORTE Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(17==0))
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTE_PCR_17,PORTE Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTE_PCR_17,PORTE Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('E'=='A')&&(17>=1)&&(17<=4))
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTE_PCR_17,PORTE Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(17==5))
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTE_PCR_17,PORTE Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(17==0))
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTE_PCR_17,PORTE Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTE_PCR_17,PORTE Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTE_PCR_17,PORTE Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTE_PCR_17,PORTE Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTE_PCR_17,PORTE Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x48 - adres
|
|
; E - litera portu (A,B,C,...)
|
|
; 18 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('E'=='A')&&(18>=1)&&(18<=5))
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTE_PCR_18,PORTE Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(18==0))
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTE_PCR_18,PORTE Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTE_PCR_18,PORTE Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('E'=='A')&&(18>=1)&&(18<=4))
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTE_PCR_18,PORTE Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(18==5))
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTE_PCR_18,PORTE Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(18==0))
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTE_PCR_18,PORTE Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTE_PCR_18,PORTE Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTE_PCR_18,PORTE Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTE_PCR_18,PORTE Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTE_PCR_18,PORTE Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x4C - adres
|
|
; E - litera portu (A,B,C,...)
|
|
; 19 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('E'=='A')&&(19>=1)&&(19<=5))
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTE_PCR_19,PORTE Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(19==0))
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTE_PCR_19,PORTE Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTE_PCR_19,PORTE Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('E'=='A')&&(19>=1)&&(19<=4))
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTE_PCR_19,PORTE Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(19==5))
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTE_PCR_19,PORTE Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(19==0))
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTE_PCR_19,PORTE Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTE_PCR_19,PORTE Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTE_PCR_19,PORTE Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTE_PCR_19,PORTE Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTE_PCR_19,PORTE Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x60 - adres
|
|
; E - litera portu (A,B,C,...)
|
|
; 24 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('E'=='A')&&(24>=1)&&(24<=5))
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PORTE_PCR_24,PORTE Pin Control Register 24"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(24==0))
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PORTE_PCR_24,PORTE Pin Control Register 24"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PORTE_PCR_24,PORTE Pin Control Register 24"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('E'=='A')&&(24>=1)&&(24<=4))
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PORTE_PCR_24,PORTE Pin Control Register 24"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(24==5))
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PORTE_PCR_24,PORTE Pin Control Register 24"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(24==0))
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PORTE_PCR_24,PORTE Pin Control Register 24"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PORTE_PCR_24,PORTE Pin Control Register 24"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PORTE_PCR_24,PORTE Pin Control Register 24"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PORTE_PCR_24,PORTE Pin Control Register 24"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PORTE_PCR_24,PORTE Pin Control Register 24"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x64 - adres
|
|
; E - litera portu (A,B,C,...)
|
|
; 25 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('E'=='A')&&(25>=1)&&(25<=5))
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PORTE_PCR_25,PORTE Pin Control Register 25"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(25==0))
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PORTE_PCR_25,PORTE Pin Control Register 25"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PORTE_PCR_25,PORTE Pin Control Register 25"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('E'=='A')&&(25>=1)&&(25<=4))
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PORTE_PCR_25,PORTE Pin Control Register 25"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(25==5))
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PORTE_PCR_25,PORTE Pin Control Register 25"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(25==0))
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PORTE_PCR_25,PORTE Pin Control Register 25"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PORTE_PCR_25,PORTE Pin Control Register 25"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PORTE_PCR_25,PORTE Pin Control Register 25"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PORTE_PCR_25,PORTE Pin Control Register 25"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PORTE_PCR_25,PORTE Pin Control Register 25"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
width 13.
|
|
wgroup.long 0x80++0x07
|
|
line.long 0x00 "PORTE_GPCLR,PORTE Global Pin Control Low Register"
|
|
bitfld.long 0x00 17. " GPWE_1 ,Global pin 1 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 16. " GPWE_0 ,Global pin 0 write enable" "Disable,Enable"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " GPWD ,Global pin write data"
|
|
line.long 0x04 "PORTE_GPCHR,PORTE Global Pin Control High Register"
|
|
bitfld.long 0x04 25. " GPWE_25 ,Global pin 25 write enable" "Disable,Enable"
|
|
bitfld.long 0x04 24. " GPWE_24 ,Global pin 24 write enable" "Disable,Enable"
|
|
bitfld.long 0x04 19. " GPWE_19 ,Global pin 19 write enable" "Disable,Enable"
|
|
bitfld.long 0x04 18. " GPWE_18 ,Global pin 18 write enable" "Disable,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 17. " GPWE_17 ,Global pin 17 write enable" "Disable,Enable"
|
|
bitfld.long 0x04 16. " GPWE_16 ,Global pin 16 write enable" "Disable,Enable"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " GPWD ,Global pin write data"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "PORTE_ISF_R,PORTE Interrupt Status Flag Register"
|
|
eventfld.long 0x00 25. " ISF_25 ,Interrupt status flag 25 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 24. " ISF_24 ,Interrupt status flag 24 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 19. " ISF_19 ,Interrupt status flag 19 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 18. " ISF_18 ,Interrupt status flag 18 (In digital modes only)" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 17. " ISF_17 ,Interrupt status flag 17 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 16. " ISF_16 ,Interrupt status flag 16 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " ISF_1 ,Interrupt status flag 1 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " ISF_0 ,Interrupt status flag 0 (In digital modes only)" "No interrupt,Interrupt"
|
|
rgroup.long 0xC0++0x03
|
|
line.long 0x00 "PORTE_DFER,Digital Filter Enable Register"
|
|
bitfld.long 0x00 25. " DFE_25 ,Pin 25 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " DFE_24 ,Pin 24 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " DFE_19 ,Pin 19 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " DFE_18 ,Pin 18 digital filter enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DFE_17 ,Pin 17 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " DFE_16 ,Pin 16 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " DFE_1 ,Pin 1 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " DFE_0 ,Pin 0 digital filter enable" "Disabled,Enabled"
|
|
rgroup.long 0xC4++0x03
|
|
line.long 0x00 "PORTE_DFCR,Digital Filter Clock Register"
|
|
bitfld.long 0x00 0. " CS ,Clock source" "Bus clk,1 kHz LPO"
|
|
rgroup.long 0xC8++0x03
|
|
line.long 0x00 "PORTE_DFWR,Digital Filter Width Register"
|
|
bitfld.long 0x00 0.--4. " FILT ,Filter length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
elif cpuis("MK02FN64VLF10")||cpuis("MK02FN128VLF10")||cpuis("MK02FN64VFM10")||cpuis("MK02FN128VFM10")
|
|
tree "PORT E Pin Control Registers"
|
|
; 0x40 - adres
|
|
; E - litera portu (A,B,C,...)
|
|
; 16 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('E'=='A')&&(16>=1)&&(16<=5))
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTE_PCR_16,PORTE Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(16==0))
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTE_PCR_16,PORTE Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTE_PCR_16,PORTE Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('E'=='A')&&(16>=1)&&(16<=4))
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTE_PCR_16,PORTE Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(16==5))
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTE_PCR_16,PORTE Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(16==0))
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTE_PCR_16,PORTE Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTE_PCR_16,PORTE Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTE_PCR_16,PORTE Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTE_PCR_16,PORTE Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PORTE_PCR_16,PORTE Pin Control Register 16"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x44 - adres
|
|
; E - litera portu (A,B,C,...)
|
|
; 17 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('E'=='A')&&(17>=1)&&(17<=5))
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTE_PCR_17,PORTE Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(17==0))
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTE_PCR_17,PORTE Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTE_PCR_17,PORTE Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('E'=='A')&&(17>=1)&&(17<=4))
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTE_PCR_17,PORTE Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(17==5))
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTE_PCR_17,PORTE Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(17==0))
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTE_PCR_17,PORTE Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTE_PCR_17,PORTE Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTE_PCR_17,PORTE Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTE_PCR_17,PORTE Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "PORTE_PCR_17,PORTE Pin Control Register 17"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x48 - adres
|
|
; E - litera portu (A,B,C,...)
|
|
; 18 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('E'=='A')&&(18>=1)&&(18<=5))
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTE_PCR_18,PORTE Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(18==0))
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTE_PCR_18,PORTE Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTE_PCR_18,PORTE Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('E'=='A')&&(18>=1)&&(18<=4))
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTE_PCR_18,PORTE Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(18==5))
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTE_PCR_18,PORTE Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(18==0))
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTE_PCR_18,PORTE Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTE_PCR_18,PORTE Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTE_PCR_18,PORTE Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTE_PCR_18,PORTE Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PORTE_PCR_18,PORTE Pin Control Register 18"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x4C - adres
|
|
; E - litera portu (A,B,C,...)
|
|
; 19 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('E'=='A')&&(19>=1)&&(19<=5))
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTE_PCR_19,PORTE Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(19==0))
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTE_PCR_19,PORTE Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTE_PCR_19,PORTE Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('E'=='A')&&(19>=1)&&(19<=4))
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTE_PCR_19,PORTE Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(19==5))
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTE_PCR_19,PORTE Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(19==0))
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTE_PCR_19,PORTE Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTE_PCR_19,PORTE Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTE_PCR_19,PORTE Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTE_PCR_19,PORTE Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PORTE_PCR_19,PORTE Pin Control Register 19"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x60 - adres
|
|
; E - litera portu (A,B,C,...)
|
|
; 24 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('E'=='A')&&(24>=1)&&(24<=5))
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PORTE_PCR_24,PORTE Pin Control Register 24"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(24==0))
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PORTE_PCR_24,PORTE Pin Control Register 24"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PORTE_PCR_24,PORTE Pin Control Register 24"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('E'=='A')&&(24>=1)&&(24<=4))
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PORTE_PCR_24,PORTE Pin Control Register 24"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(24==5))
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PORTE_PCR_24,PORTE Pin Control Register 24"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(24==0))
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PORTE_PCR_24,PORTE Pin Control Register 24"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PORTE_PCR_24,PORTE Pin Control Register 24"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PORTE_PCR_24,PORTE Pin Control Register 24"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PORTE_PCR_24,PORTE Pin Control Register 24"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PORTE_PCR_24,PORTE Pin Control Register 24"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
; 0x64 - adres
|
|
; E - litera portu (A,B,C,...)
|
|
; 25 - numer portu
|
|
width 16.
|
|
sif (cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10"))
|
|
if (('E'=='A')&&(25>=1)&&(25<=5))
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PORTE_PCR_25,PORTE Pin Control Register 25"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(25==0))
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PORTE_PCR_25,PORTE Pin Control Register 25"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PORTE_PCR_25,PORTE Pin Control Register 25"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21D????AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22F*VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22F*VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")
|
|
if (('E'=='A')&&(25>=1)&&(25<=4))
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PORTE_PCR_25,PORTE Pin Control Register 25"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(25==5))
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PORTE_PCR_25,PORTE Pin Control Register 25"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif (('E'=='A')&&(25==0))
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PORTE_PCR_25,PORTE Pin Control Register 25"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
eventfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
eventfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
eventfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PORTE_PCR_25,PORTE Pin Control Register 25"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
elif cpuis("MK22FN128CAH12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VMP12")||cpuis("MK02F*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VFX12*")
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PORTE_PCR_25,PORTE Pin Control Register 25"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--11. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,ALT8,ALT9,ALT10,ALT11,ALT12,ALT13,ALT14,ALT15"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
elif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PORTE_PCR_25,PORTE Pin Control Register 25"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "Disabled,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
else
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PORTE_PCR_25,PORTE Pin Control Register 25"
|
|
eventfld.long 0x00 24. " ISF ,Interrupt status flag (in digital modes only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16.--19. " IRQC ,Interrupt / DMA request configuration (in digital modes only)" "Disabled,DMA Req on rising edge,DMA Req on falling edge,DMA Req on either edge,,,,,Int when logic zero,Int on rising edge,Int on falling edge,Int on either edge,Int when logic one,?..."
|
|
newline
|
|
bitfld.long 0x00 15. " LK ,Lock bits [15:0]" "Not locked,Locked"
|
|
bitfld.long 0x00 8.--10. " MUX ,Pin mux control" "ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7"
|
|
newline
|
|
bitfld.long 0x00 6. " DSE ,Drive strength enable (in digital modes only)" "Low,High"
|
|
bitfld.long 0x00 5. " ODE ,Open drain enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PFE ,Passive filter enable (in digital modes only)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SRE ,Slew rate enable (in digital modes only)" "Fast,Slow"
|
|
bitfld.long 0x00 1. " PE ,Pull enable (in digital modes only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PS ,Pull select (in digital modes only)" "Down,Up"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
width 13.
|
|
hgroup.long 0x80++0x03
|
|
hide.long 0x00 "PORTE_GPCLR,PORTE Global Pin Control Low Register"
|
|
wgroup.long 0x84++0x03
|
|
line.long 0x00 "PORTE_GPCHR,PORTE Global Pin Control High Register"
|
|
bitfld.long 0x00 25. " GPWE_25 ,Global pin 25 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 24. " GPWE_24 ,Global pin 24 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 19. " GPWE_19 ,Global pin 19 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 18. " GPWE_18 ,Global pin 18 write enable" "Disable,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 17. " GPWE_17 ,Global pin 17 write enable" "Disable,Enable"
|
|
bitfld.long 0x00 16. " GPWE_16 ,Global pin 16 write enable" "Disable,Enable"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " GPWD ,Global pin write data"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "PORTE_ISF_R,PORTE Interrupt Status Flag Register"
|
|
eventfld.long 0x00 25. " ISF_25 ,Interrupt status flag 25 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 24. " ISF_24 ,Interrupt status flag 24 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 19. " ISF_19 ,Interrupt status flag 19 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 18. " ISF_18 ,Interrupt status flag 18 (In digital modes only)" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 17. " ISF_17 ,Interrupt status flag 17 (In digital modes only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 16. " ISF_16 ,Interrupt status flag 16 (In digital modes only)" "No interrupt,Interrupt"
|
|
rgroup.long 0xC0++0x03
|
|
line.long 0x00 "PORTE_DFER,Digital Filter Enable Register"
|
|
bitfld.long 0x00 25. " DFE_25 ,Pin 25 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " DFE_24 ,Pin 24 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " DFE_19 ,Pin 19 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " DFE_18 ,Pin 18 digital filter enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DFE_17 ,Pin 17 digital filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " DFE_16 ,Pin 16 digital filter enable" "Disabled,Enabled"
|
|
rgroup.long 0xC4++0x03
|
|
line.long 0x00 "PORTE_DFCR,Digital Filter Clock Register"
|
|
bitfld.long 0x00 0. " CS ,Clock source" "Bus clk,1 kHz LPO"
|
|
rgroup.long 0xC8++0x03
|
|
line.long 0x00 "PORTE_DFWR,Digital Filter Width Register"
|
|
bitfld.long 0x00 0.--4. " FILT ,Filter length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "System Modules"
|
|
tree "SIM (System Integration Module)"
|
|
base ad:0x40047000
|
|
width 10.
|
|
group.long 0x00++0x03
|
|
sif cpuis("MK02FN64VLH10")||cpuis("MK02FN128VLH10")
|
|
line.long 0x00 "SOPT1,System Options Register"
|
|
bitfld.long 0x00 18.--19. " OSC32KSEL ,32K oscillator clock select" "System,,,LPO"
|
|
bitfld.long 0x00 16.--17. " OSC32KOUT ,32K oscillator clock output" "No output,PTE_0,?..."
|
|
rbitfld.long 0x00 12.--15. " RAMSIZE ,RAM size" ",8 KB,,16 KB,24 KB,32 KB,48 KB,64 KB,96 KB,128 KB,,256 KB,,512 KB,,1024 KB"
|
|
else
|
|
line.long 0x00 "SOPT1,System Options Register"
|
|
bitfld.long 0x00 18.--19. " OSC32KSEL ,32K oscillator clock select" "System,,,LPO"
|
|
bitfld.long 0x00 16.--17. " OSC32KOUT ,32K oscillator clock output" "No output,?..."
|
|
rbitfld.long 0x00 12.--15. " RAMSIZE ,RAM size" ",8 KB,,16 KB,24 KB,32 KB,48 KB,64 KB,96 KB,128 KB,,256 KB,,512 KB,,1024 KB"
|
|
endif
|
|
hgroup.long 0x04++0x03
|
|
hide.long 0x00 "SOPT1CFG,SOPT1 Configuration Register"
|
|
group.long 0x1004++0x03
|
|
line.long 0x00 "SOPT2,System Options Register 2"
|
|
bitfld.long 0x00 16.--17. " PLLFLLSEL ,PLL/FLL clock select" "MCGFLLCLK,,,IRC48 mhz"
|
|
bitfld.long 0x00 12. " TRACECLKSEL ,Debug trace clock select" "MCGOUTCLK,Core clock"
|
|
bitfld.long 0x00 5.--7. " CLKOUTSEL ,CLKOUT select" ",,Flash,LPO,MCGIRCLK,,OSC0ERCLK0,IRC48 mhz"
|
|
group.long 0x100C++0x07
|
|
line.long 0x00 "SOPT4,System Options Register 4"
|
|
bitfld.long 0x00 29. " FTM0TRG1SRC ,FTM 0 hardware trigger 1 source select" "PDB,FTM2"
|
|
bitfld.long 0x00 28. " FTM0TRG0SRC ,FTM 0 hardware trigger 0 source select" "HSCMP0,FTM1"
|
|
bitfld.long 0x00 26. " FTM2CLKSEL ,FTM 2 external clock pin select" "FTM_CLK0,FTM_CLK1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FTM1CLKSEL ,FTM 1 external clock pin select" "FTM_CLK0,FTM_CLK1"
|
|
bitfld.long 0x00 24. " FTM0CLKSEL ,FTM 0 external clock pin select" "FTM_CLK0,FTM_CLK1"
|
|
bitfld.long 0x00 22. " FTM2CH1SRC ,FTM2 channel 1 input capture source select" "FTM2_CH1,Xor:ftm2_ch1 FTM2_CH0 FTM1_CH1"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " FTM2CH0SRC ,FTM2 2 channel 0 input capture source select" "FTM2_CH0,CMP0 out,CMP1 out,?..."
|
|
bitfld.long 0x00 18.--19. " FTM1CH0SRC ,FTM1 1 channel 0 input capture source select" "FTM1_CH0,CMP0 out,CMP1 out,?..."
|
|
bitfld.long 0x00 8. " FTM2FLT0 ,FTM 2 fault 0 select" "FTM2_FLT0,CMP0 out"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FTM1FLT0 ,FTM 1 fault 0 select" "FTM1_FLT0,CMP0 out"
|
|
bitfld.long 0x00 1. " FTM0FLT1 ,FTM 0 fault 1 select" "FTM0_FLT1,CMP1 out"
|
|
bitfld.long 0x00 0. " FTM0FLT0 ,FTM 0 fault 0 select" "FTM0_FLT0,CMP0 out"
|
|
line.long 0x04 "SOPT5,System Options Register 5"
|
|
bitfld.long 0x04 6.--7. " UART1RXSRC ,UART 1 receive data source select" "UART1_RX,CMP0,CMP1,?..."
|
|
bitfld.long 0x04 4.--5. " UART1TXSRC ,UART 1 transmit data source select" "UART1_TX,UART1_TX mod FTM1 ch0 out,UART1_TX mod FTM2 ch0 out,?..."
|
|
textline " "
|
|
bitfld.long 0x04 2.--3. " UART0RXSRC ,UART 0 receive data source select" "UART0_RX,CMP0,CMP1,?..."
|
|
bitfld.long 0x04 0.--1. " UART0TXSRC ,UART 0 transmit data source select" "UART0_TX,UART0_TX mod FTM1 ch0 out,UART0_TX mod FTM2 ch0 out,?..."
|
|
group.long 0x1018++0x07
|
|
line.long 0x00 "SOPT7,System Options Register 7"
|
|
bitfld.long 0x00 7. " ADC0ALTTRGEN ,Enable alternative conversion triggers for ADC0" "PDB,Alternate"
|
|
bitfld.long 0x00 4. " ADC0PRETRGSEL ,ADC0 pretrigger select" "Pre-trg A,Pre-trg B"
|
|
bitfld.long 0x00 0.--3. " ADC0TRGSEL ,ADC0 trigger select" "PDB0_EXTRG,HSCMP 0 out,HSCMP 1 out,,PIT trg 0,PIT trg 1,PIT trg 2,PIT trg 3,FTM0 trg,FTM1 trg,FTM2 trg,,,,LPTMR trg,?..."
|
|
line.long 0x04 "SOPT8,System Options Register 8"
|
|
bitfld.long 0x04 21. " FTM0OCH5SRC ,FTM0 channel 5 output source" "FTM0_CH5,FTM0_CH5 mod."
|
|
bitfld.long 0x04 20. " FTM0OCH4SRC ,FTM0 channel 4 output source" "FTM0_CH4,FTM0_CH4 mod."
|
|
bitfld.long 0x04 19. " FTM0OCH3SRC ,FTM0 channel 3 output source" "FTM0_CH3,FTM0_CH3 mod."
|
|
textline " "
|
|
bitfld.long 0x04 18. " FTM0OCH2SRC ,FTM0 channel 2 output source" "FTM0_CH2,FTM0_CH2 mod."
|
|
bitfld.long 0x04 17. " FTM0OCH1SRC ,FTM0 channel 1 output source" "FTM0_CH1,FTM0_CH1 mod."
|
|
bitfld.long 0x04 16. " FTM0OCH0SRC ,FTM0 channel 0 output source" "FTM0_CH0,FTM0_CH0 mod."
|
|
textline " "
|
|
bitfld.long 0x04 2. " FTM2SYNCBIT ,FTM2 hardware trigger 0 software synchronization" "No effect,Assert to FTM2"
|
|
bitfld.long 0x04 1. " FTM1SYNCBIT ,FTM1 hardware trigger 0 software synchronization" "No effect,Assert to FTM1"
|
|
bitfld.long 0x04 0. " FTM0SYNCBIT ,FTM0 hardware trigger 0 software synchronization" "No effect,Assert to FTM0"
|
|
rgroup.long 0x1024++0x03
|
|
line.long 0x00 "SDID,System Device Identification Register"
|
|
bitfld.long 0x00 28.--31. " FAMILYID ,Specifies the kinetis family of the device" "K0x,K1x,K2x,K3x,K4x,K6x,K7x,K8x,?..."
|
|
bitfld.long 0x00 24.--27. " SUBFAMID ,Specifies the kinetis sub-family of the device" "Kx0,Kx1,Kx2,Kx3,Kx4,Kx5,Kx6,?..."
|
|
bitfld.long 0x00 20.--23. " SERIESID ,Specifies the kinetis series of the device" "Kinetis K,Kinetis L,Kinetis W,Kinetis V,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " REVID ,Specifies the silicon implementation number for the device" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7.--11. " DIEID ,Device die ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--6. " FAMID ,Kinetis family identification" "K1x w/o tamp.,K2x w/o tamp.,K3x | k1x/k6x with tamp.,K4x | k2x with tamp.,K6x w/o tamp.,K7x,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " PINID ,Specifies the pincount of the device" ",,32-pin,,48-pin,64-pin,80-pin,81 | 121-pin,100-pin,121-pin,144-pin,WLCSP,169-pin,,256-pin,?..."
|
|
group.long 0x1034++0x13
|
|
line.long 0x00 "SCGC4,System Clock Gating Control Register 4"
|
|
bitfld.long 0x00 20. " VREF ,VREF clock gate control" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CMP ,Comparator clock gate control" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " UART1 ,UART1 clock gate control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " UART0 ,UART0 clock gate control" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " I2C0 ,I2C0 clock gate control" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " EWM ,EWM clock gate control" "Disabled,Enabled"
|
|
line.long 0x04 "SCGC5,System Clock Gating Control Register 5"
|
|
bitfld.long 0x04 13. " PORTE ,Port E clock gate control" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " PORTD ,Port D clock gate control" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " PORTC ,Port C clock gate control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " PORTB ,Port B clock gate control" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " PORTA ,Port A clock gate control" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " LPTMR ,Low power timer access control" "Disabled,Enabled"
|
|
line.long 0x08 "SCGC6,System Clock Gating Control Register 6"
|
|
bitfld.long 0x08 31. " DAC0 ,DAC0 clock gate control" "Disabled,Enabled"
|
|
bitfld.long 0x08 27. " ADC0 ,ADC0 clock gate control" "Disabled,Enabled"
|
|
bitfld.long 0x08 26. " FTM2 ,FTM2 clock gate control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 25. " FTM1 ,FTM1 clock gate control" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " FTM0 ,FTM0 clock gate control" "Disabled,Enabled"
|
|
bitfld.long 0x08 23. " PIT ,PIT clock gate control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 22. " PDB ,PDB clock gate control" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " CRC ,CRC clock gate control" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " SPI0 ,DSPI0 clock gate control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " DMAMUX ,DMA mux clock gate control" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " FTF ,Flash memory clock gate control" "Disabled,Enabled"
|
|
line.long 0x0C "SCGC7,System Clock Gating Control Register 7"
|
|
bitfld.long 0x0C 1. " DMA ,DMA clock gate control" "Disabled,Enabled"
|
|
line.long 0x10 "CLKDIV1,System Clock Divider Register 1"
|
|
bitfld.long 0x10 28.--31. " OUTDIV1 ,Clock 1 output divider value" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16"
|
|
bitfld.long 0x10 24.--27. " OUTDIV2 ,Clock 2 output divider value" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16"
|
|
bitfld.long 0x10 16.--19. " OUTDIV4 ,Clock 4 output divider value" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16"
|
|
group.long 0x104C++0x03
|
|
line.long 0x00 "FCFG1,Flash Configuration Register 1"
|
|
rbitfld.long 0x00 24.--27. " PFSIZE ,Program flash size" ",,,32 KB,,64 KB,,128 KB,,256 KB,,512 KB,,1024 KB,,128 KB"
|
|
bitfld.long 0x00 1. " FLASHDOZE ,Flash doze" "EN in wait,DIS in wait"
|
|
bitfld.long 0x00 0. " FLASHDIS ,Flash disable" "Flash is enabled,Flash is disabled"
|
|
rgroup.long 0x1050++0x13
|
|
line.long 0x00 "FCFG2,Flash Configuration Register 2"
|
|
hexmask.long.byte 0x00 24.--30. 0x01 " MAXADDR0 ,Max address block 0"
|
|
line.long 0x04 "UIDH,Unique Identification Register High"
|
|
line.long 0x08 "UIDMH,Unique Identification Register Mid-High"
|
|
line.long 0x0C "UIDML,Unique Identification Register Mid-Low"
|
|
line.long 0x10 "UIDL,Unique Identification Register Low"
|
|
width 0x0B
|
|
tree.end
|
|
tree "RCM (Reset Control Module)"
|
|
base ad:0x4007F000
|
|
width 7.
|
|
rgroup.byte 0x00++0x01
|
|
line.byte 0x00 "SRS0,System Reset Status Register 0"
|
|
bitfld.byte 0x00 7. " POR ,Power-on reset" "Not caused,Caused"
|
|
bitfld.byte 0x00 6. " PIN ,External reset pin" "Not caused,Caused"
|
|
bitfld.byte 0x00 5. " WDOG ,Watchdog" "Not caused,Caused"
|
|
sif cpuis("MK02*")||cpuis("MK22FN128*")||cpuis("MK60F*")
|
|
newline
|
|
bitfld.byte 0x00 2. " LOC ,Loss-of-clock reset" "Not caused,Caused"
|
|
bitfld.byte 0x00 1. " LVD ,Low-voltage detect reset" "Not caused,Caused"
|
|
bitfld.byte 0x00 0. " WAKEUP ,Low-leakage wakeup reset" "Not caused,Caused"
|
|
else
|
|
newline
|
|
bitfld.byte 0x00 3. " LOL ,Loss-of-lock reset" "Not caused,Caused"
|
|
bitfld.byte 0x00 2. " LOC ,Loss-of-clock reset" "Not caused,Caused"
|
|
bitfld.byte 0x00 1. " LVD ,Low-voltage detect reset" "Not caused,Caused"
|
|
newline
|
|
bitfld.byte 0x00 0. " WAKEUP ,Low-leakage wakeup reset" "Not caused,Caused"
|
|
endif
|
|
line.byte 0x01 "SRS1,System Reset Status Register 1"
|
|
sif !cpuis("MK26FN*")&&!cpuis("MK24FN*")&&!cpuis("MK22F*")&&!cpuis("MK22D*")&&!cpuis("MK20*")&&!cpuis("MK10F*")&&!cpuis("MK10D*")&&!cpuis("MK12D*")&&!cpuis("MK30D*")&&!cpuis("MK40D*")&&!cpuis("MK5?D*")&&!cpuis("MK60*")&&!cpuis("MK64F*")&&!cpuis("MK65F*")&&!cpuis("MK66F*")&&!cpuis("MK02*")&&(!cpuis("MK84FN2M0CAU15R"))&&!cpuis("MK8?FN256V*")&&!cpuis("KK22FN256CAP12R")&&!cpuis("KK22FN512CBP12R")&&!cpuis("KK22FN128CAH12R")&&!cpuis("KK22FN256CAH12R")&&!cpuis("KK26FN2M0CAC18R")&&!cpuis("MK27FN2M0VMI15")&&!cpuis("KK28FN2M0CAU15R")&&!cpuis("MK28FN2M0CAU15R")&&!cpuis("MK28FN2M0VMI15")&&!cpuis("MKS2?FN???V??12")&&!cpuis("KK60FN1M0VLQ15")&&!cpuis("MK63FN1M0VLQ12R")&&!cpuis("KK65FN2M0CAC18R")
|
|
bitfld.byte 0x01 7. " TAMPER ,Tamper detect" "Not caused,Caused"
|
|
newline
|
|
endif
|
|
sif cpuis("MK02*")||cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("MK27FN2M0VMI15")||cpuis("KK28FN2M0CAU15R")||cpuis("MK28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")||cpuis("MKS2?FN???V??12")
|
|
bitfld.byte 0x01 5. " SACKERR ,Stop mode acknowledge error reset" "Not caused,Caused"
|
|
bitfld.byte 0x01 3. " MDM_AP ,MDM-AP system reset request" "Not caused,Caused"
|
|
bitfld.byte 0x01 2. " SW ,Software reset" "Not caused,Caused"
|
|
newline
|
|
bitfld.byte 0x01 1. " LOCKUP ,Core lockup" "Not caused,Caused"
|
|
bitfld.byte 0x01 0. " JTAG ,JTAG generated reset" "Not caused,Caused"
|
|
else
|
|
bitfld.byte 0x01 5. " SACKERR ,Stop mode acknowledge error reset" "Not caused,Caused"
|
|
bitfld.byte 0x01 4. " EZPT ,EzPort reset" "Not caused,Caused"
|
|
bitfld.byte 0x01 3. " MDM_AP ,MDM-AP system reset request" "Not caused,Caused"
|
|
newline
|
|
bitfld.byte 0x01 2. " SW ,Software reset" "Not caused,Caused"
|
|
bitfld.byte 0x01 1. " LOCKUP ,Core lockup" "Not caused,Caused"
|
|
bitfld.byte 0x01 0. " JTAG ,JTAG generated reset" "Not caused,Caused"
|
|
endif
|
|
group.byte 0x04++0x01
|
|
line.byte 0x00 "RPFC,Reset Pin Filter Control Register"
|
|
bitfld.byte 0x00 2. " RSTFLTSS ,Reset pin filter select in stop mode" "All filtering disabled,LPO clock filter enabled"
|
|
newline
|
|
bitfld.byte 0x00 0.--1. " RSTFLTSRW ,Reset pin filter select in run and wait modes" "All filtering disabled,Bus clock filter enabled,LPO clock filter enabled,?..."
|
|
line.byte 0x01 "RPFW,Reset Pin Filter Width Register"
|
|
bitfld.byte 0x01 0.--4. " RSTFLTSEL ,Selects the reset pin bus clock filter width" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
sif cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("MK27FN2M0VMI15")||cpuis("KK28FN2M0CAU15R")||cpuis("MK28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")
|
|
group.byte 0x06++0x00
|
|
line.byte 0x00 "FM,Force Mode Register"
|
|
bitfld.byte 0x00 1.--2. " FORCEROM ,Force ROM Boot" "No effect,Force w/ RCM_MR[1] set,Force w/ RCM_MR[2] set,Force w/ RCM_MR[2:1] set"
|
|
endif
|
|
sif cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("MK27FN2M0VMI15")||cpuis("KK28FN2M0CAU15R")||cpuis("MK28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")
|
|
group.byte 0x07++0x00
|
|
line.byte 0x00 "MR,Mode Register"
|
|
bitfld.byte 0x00 1.--2. " BOOTROM ,Boot ROM Configuration" "Flash,BOOTCFG0,FOPT[7],BOOTCFG0 and FOPT[7]"
|
|
elif !cpuis("MK02*")&&!cpuis("MKS2?FN???V??12")
|
|
rgroup.byte 0x07++0x00
|
|
line.byte 0x00 "MR,Mode Register"
|
|
bitfld.byte 0x00 1. " EZP_MS ,EZP_MS_B pin state" "Deasserted,Asserted"
|
|
endif
|
|
newline
|
|
sif cpuis("MK65F*")||cpuis("MK66F*")||cpuis("MK02*")||cpuis("MK26FN*")||cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("MK22FN512VMP12")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VLH12")||cpuis("MK22FN512VDC12")||cpuis("MK22FN512CBP12R")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN128CAH12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VDC12R")||cpuis("MK22FN512VFX12")||cpuis("MK22FN512VFX12R")||cpuis("MK22FN512VLH12R")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("KK26FN2M0CAC18R")||cpuis("MK27FN2M0VMI15")||cpuis("KK28FN2M0CAU15R")||cpuis("MK28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")||cpuis("MKS2?FN???V??12")||cpuis("KK65FN2M0CAC18R")
|
|
group.byte 0x08++0x01
|
|
line.byte 0x00 "SSRS0,Sticky System Reset Status Register 0"
|
|
eventfld.byte 0x00 7. " SPOR ,Sticky power-on reset" "Not caused,Caused"
|
|
eventfld.byte 0x00 6. " SPIN ,Sticky external reset pin" "Not caused,Caused"
|
|
eventfld.byte 0x00 5. " SWDOG ,Sticky watchdog" "Not caused,Caused"
|
|
sif cpuis("MK02*")||cpuis("MK20FN1M0VLQ12R")||cpuis("MK22FN128VLH10R")
|
|
newline
|
|
eventfld.byte 0x00 2. " SLOC ,Sticky loss-of-clock reset" "Not caused,Caused"
|
|
eventfld.byte 0x00 1. " SLVD ,Sticky low-voltage detect reset" "Not caused,Caused"
|
|
eventfld.byte 0x00 0. " SWAKEUP ,Sticky low leakage wakeup reset" "Not caused,Caused"
|
|
else
|
|
newline
|
|
eventfld.byte 0x00 3. " SLOL ,Sticky loss-of-lock reset" "Not caused,Caused"
|
|
eventfld.byte 0x00 2. " SLOC ,Sticky loss-of-clock reset" "Not caused,Caused"
|
|
eventfld.byte 0x00 1. " SLVD ,Sticky low-voltage detect reset" "Not caused,Caused"
|
|
newline
|
|
eventfld.byte 0x00 0. " SWAKEUP ,Sticky low leakage wakeup reset" "Not caused,Caused"
|
|
endif
|
|
line.byte 0x01 "SSRS1,Sticky System Reset Status Register 1"
|
|
eventfld.byte 0x01 5. " SSACKERR ,Sticky stop mode acknowledge error reset" "Not caused,Caused"
|
|
sif !cpuis("MK02*")&&!cpuis("MK84FN2M0CAU15R")&&!cpuis("MK8?FN256V*")&&!cpuis("MK27FN2M0VMI15")&&!cpuis("KK28FN2M0CAU15R")&&!cpuis("MK28FN2M0CAU15R")&&!cpuis("MK28FN2M0VMI15")&&!cpuis("MKS2?FN???V??12")
|
|
eventfld.byte 0x01 4. " SEZPT ,Sticky EzPort reset" "Not caused,Caused"
|
|
endif
|
|
eventfld.byte 0x01 3. " SMDM_AP ,Sticky MDM-AP system reset request" "Not caused,Caused"
|
|
eventfld.byte 0x01 2. " SSW ,Sticky software" "Not caused,Caused"
|
|
newline
|
|
eventfld.byte 0x01 1. " SLOCKUP ,Sticky core lockup" "Not caused,Caused"
|
|
eventfld.byte 0x01 0. " SJTAG ,Sticky JTAG generated reset" "Not caused,Caused"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "SMC (System Mode Controller)"
|
|
base ad:0x4007E000
|
|
sif (cpuis("MK60D*AB10")||cpuis("MK10DN512ZV??10*")||cpuis("MK10DX256ZV??10*")||cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK40*Z*10")||cpuis("MK50DN512ZCLL10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DX256ZCLQ10")||cpuis("MK51DN512ZCLL10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")||cpuis("KK60DN512ZCAB10R"))
|
|
width 8.
|
|
rgroup.byte 0x00++0x01
|
|
line.byte 0x00 "SRSH,System Reset Status Register High"
|
|
bitfld.byte 0x00 2. " SW ,Software reset" "Not caused,Caused"
|
|
bitfld.byte 0x00 1. " LOCKUP ,Core-lockup reset" "Not caused,Caused"
|
|
bitfld.byte 0x00 0. " JTAG ,JTAG generated reset" "Not caused,Caused"
|
|
line.byte 0x01 "SRSL,System Reset Status Register Low"
|
|
bitfld.byte 0x01 7. " POR ,Power-on reset" "Not caused,Caused"
|
|
bitfld.byte 0x01 6. " PIN ,External reset pin" "Not caused,Caused"
|
|
bitfld.byte 0x01 5. " COP ,Computer operating properly (Cop) watchdog" "Not caused,Caused"
|
|
newline
|
|
bitfld.byte 0x01 2. " LOC ,Loss-of-clock reset" "Not caused,Caused"
|
|
bitfld.byte 0x01 1. " LVD ,Low-voltage detect reset" "Not caused,Caused"
|
|
bitfld.byte 0x01 0. " WAKEUP ,Low-leakage wakeup reset" "Not caused,Caused"
|
|
group.byte 0x02++0x01
|
|
line.byte 0x00 "PMPROT,Power Mode Protection Register"
|
|
bitfld.byte 0x00 5. " AVLP ,Allow very low power modes" "Not allowed,Allowed"
|
|
bitfld.byte 0x00 4. " ALLS ,Allow low leakage stop mode" "Not allowed,Allowed"
|
|
bitfld.byte 0x00 2. " AVLLS3 ,Allow very low leakage stop 3 mode" "Not allowed,Allowed"
|
|
newline
|
|
bitfld.byte 0x00 1. " AVLLS2 ,Allow very low leakage stop 2 mode" "Not allowed,Allowed"
|
|
bitfld.byte 0x00 0. " AVLLS1 ,Allow very low leakage stop 1 mode" "Not allowed,Allowed"
|
|
line.byte 0x01 "PMCTRL,Power Mode Control Register"
|
|
hexmask.byte 0x01 0.--7. 1. "PMCTRL,Power mode control"
|
|
newline
|
|
else
|
|
width 10.
|
|
group.byte 0x00++0x01
|
|
line.byte 0x00 "PMPROT,Power Mode Protection Register"
|
|
sif cpuis("MK65F*")||cpuis("MK66F*")||cpuis("MK02*")||cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("KK65FN2M0CAC18R")
|
|
bitfld.byte 0x00 7. " AHSRUN ,Allow high speed run mode" "Not allowed,Allowed"
|
|
newline
|
|
endif
|
|
bitfld.byte 0x00 5. " AVLP ,Allow very low power modes" "Not allowed,Allowed"
|
|
bitfld.byte 0x00 3. " ALLS ,Allow low leakage stop mode" "Not allowed,Allowed"
|
|
bitfld.byte 0x00 1. " AVLLS ,Allow very low leakage stop mode" "Not allowed,Allowed"
|
|
line.byte 0x01 "PMCTRL,Power Mode Control Register"
|
|
sif !cpuis("MK?0D*7")&&!cpuis("MK65F*")&&!cpuis("MK66F*")&&!cpuis("MK02*")&&!cpuis("MK84FN2M0CAU15R")&&!cpuis("MK8?FN256V*")&&!cpuis("MK30DX256VLL7R")
|
|
bitfld.byte 0x01 7. " LPWUI ,Low power wake up on interrupt" "Remain,Exit"
|
|
newline
|
|
endif
|
|
sif cpuis("MK65F*")||cpuis("MK66F*")||cpuis("MK02*")||cpuis("MK8?FN256V*")||cpuis("KK65FN2M0CAC18R")
|
|
bitfld.byte 0x01 5.--6. " RUNM ,Run mode control" "Normal,,Very low power,High speed run mode"
|
|
newline
|
|
elif cpuis("MK84FN2M0CAU15R")
|
|
bitfld.byte 0x01 5.--6. " RUNM ,Run mode control" "Normal,,Very low power,High speed"
|
|
newline
|
|
else
|
|
bitfld.byte 0x01 5.--6. " RUNM ,Run mode control" "Normal,,Very low power,?..."
|
|
newline
|
|
endif
|
|
rbitfld.byte 0x01 3. " STOPA ,Stop aborted" "Not aborted,Aborted"
|
|
bitfld.byte 0x01 0.--2. " STOPM ,Stop mode control" "Normal stop,,VLPS,LLS,VLLSX,?..."
|
|
sif cpuis("MK65F*")||cpuis("MK66F*")||cpuis("MK02*")||cpuis("KK65FN2M0CAC18R")
|
|
if (((per.b(ad:0x4007E000+0x01))&0x07)==0x04)
|
|
sif cpuis("MK02*")
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "STOPCTRL,VLLS Control Register"
|
|
bitfld.byte 0x00 6.--7. " PSTOPO ,Partial stop option" "STOP,PSTOP1,PSTOP2,?..."
|
|
bitfld.byte 0x00 5. " PORPO ,POR power option" "Enabled,Disabled"
|
|
bitfld.byte 0x00 0.--2. " LLSM ,VLLS mode control" "VLLS0,VLLS1,VLLS2,VLLS3,?..."
|
|
else
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "STOPCTRL,VLLS Control Register"
|
|
bitfld.byte 0x00 6.--7. " PSTOPO ,Partial stop option" "STOP,PSTOP1,PSTOP2,?..."
|
|
bitfld.byte 0x00 5. " PORPO ,POR power option" "Enabled,Disabled"
|
|
bitfld.byte 0x00 4. " RAM2PO ,RAM2 power option" "Not powered,Powered"
|
|
newline
|
|
bitfld.byte 0x00 0.--2. " LLSM ,VLLS mode control" "VLLS0,VLLS1,VLLS2,VLLS3,?..."
|
|
endif
|
|
elif (((per.b(ad:0x4007E000+0x01))&0x07)==0x03)
|
|
sif cpuis("MK02*")
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "STOPCTRL,VLLS Control Register"
|
|
bitfld.byte 0x00 6.--7. " PSTOPO ,Partial stop option" "STOP,PSTOP1,PSTOP2,?..."
|
|
bitfld.byte 0x00 5. " PORPO ,POR power option" "Enabled,Disabled"
|
|
bitfld.byte 0x00 0.--2. " LLSM ,LLS mode control" ",,LLS2,LLS3,?..."
|
|
else
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "STOPCTRL,VLLS Control Register"
|
|
bitfld.byte 0x00 6.--7. " PSTOPO ,Partial stop option" "STOP,PSTOP1,PSTOP2,?..."
|
|
bitfld.byte 0x00 5. " PORPO ,POR power option" "Enabled,Disabled"
|
|
bitfld.byte 0x00 4. " RAM2PO ,RAM2 power option" "Not powered,Powered"
|
|
newline
|
|
bitfld.byte 0x00 0.--2. " LLSM ,LLS mode control" ",,LLS2,LLS3,?..."
|
|
endif
|
|
else
|
|
sif cpuis("MK02*")
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "STOPCTRL,VLLS Control Register"
|
|
bitfld.byte 0x00 6.--7. " PSTOPO ,Partial stop option" "STOP,PSTOP1,PSTOP2,?..."
|
|
bitfld.byte 0x00 5. " PORPO ,POR power option" "Enabled,Disabled"
|
|
else
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "STOPCTRL,VLLS Control Register"
|
|
bitfld.byte 0x00 6.--7. " PSTOPO ,Partial stop option" "STOP,PSTOP1,PSTOP2,?..."
|
|
bitfld.byte 0x00 5. " PORPO ,POR power option" "Enabled,Disabled"
|
|
bitfld.byte 0x00 4. " RAM2PO ,RAM2 power option" "Not powered,Powered"
|
|
endif
|
|
endif
|
|
elif cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")
|
|
if (((per.b(ad:0x4007E000+0x01))&0x07)==0x04)
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "STOPCTRL,VLLS Control Register"
|
|
bitfld.byte 0x00 6.--7. " PSTOPO ,Partial stop option" "STOP,PSTOP1,PSTOP2,?..."
|
|
bitfld.byte 0x00 5. " PORPO ,Disable POR detect circuit in VLLS0 mode" "No,Yes"
|
|
bitfld.byte 0x00 4. " RAM2PO ,Powering of RAM partition 2 in LLS2 or VLLS2 mode" "Not powered,Powered"
|
|
bitfld.byte 0x00 3. " LPOPO ,Disable 1 kHz LPO clock in LLS/VLLSX modes" "No,Yes"
|
|
newline
|
|
bitfld.byte 0x00 0.--2. " LLSM ,VLLS mode control" "VLLS0,VLLS1,VLLS2,VLLS3,?..."
|
|
elif (((per.b(ad:0x4007E000+0x01))&0x07)==0x03)
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "STOPCTRL,VLLS Control Register"
|
|
bitfld.byte 0x00 6.--7. " PSTOPO ,Partial stop option" "STOP,PSTOP1,PSTOP2,?..."
|
|
bitfld.byte 0x00 5. " PORPO ,Disable POR detect circuit in VLLS0 mode" "No,Yes"
|
|
bitfld.byte 0x00 4. " RAM2PO ,Powering of RAM partition 2 in LLS2 or VLLS2 mode" "Not powered,Powered"
|
|
bitfld.byte 0x00 3. " LPOPO ,Disable 1 kHz LPO clock in LLS/VLLSX modes" "No,Yes"
|
|
newline
|
|
bitfld.byte 0x00 0.--2. " LLSM ,VLLS mode control" ",,LLS2,LLS3,?..."
|
|
else
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "STOPCTRL,VLLS Control Register"
|
|
bitfld.byte 0x00 6.--7. " PSTOPO ,Partial stop option" "STOP,PSTOP1,PSTOP2,?..."
|
|
bitfld.byte 0x00 5. " PORPO ,Disable POR detect circuit in VLLS0 mode" "No,Yes"
|
|
bitfld.byte 0x00 4. " RAM2PO ,Powering of RAM partition 2 in LLS2 or VLLS2 mode" "Not powered,Powered"
|
|
bitfld.byte 0x00 3. " LPOPO ,Disable 1 kHz LPO clock in LLS/VLLSX modes" "No,Yes"
|
|
endif
|
|
elif cpuis("MK11DN512AVLK5*")||cpuis("MK11DN512VLK5*")
|
|
if (((per.b(ad:0x4007E000+0x01))&0x07)==0x04)
|
|
if (((per.b(ad:0x4007E000+0x02))&0x07)==0x00)
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "VLLSCTRL,Stop Control Register"
|
|
bitfld.byte 0x00 5. " PORPO ,POR power option" "Enabled,Disabled"
|
|
bitfld.byte 0x00 0.--2. " VLLSM ,VLLS mode control" "VLLS0,VLLS1,VLLS2,VLLS3,?..."
|
|
elif (((per.b(ad:0x4007E000+0x02))&0x07)==0x02)
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "VLLSCTRL,Stop Control Register"
|
|
bitfld.byte 0x00 4. " RAM2PO ,RAM2 power option" "Not powered,Powered"
|
|
bitfld.byte 0x00 0.--2. " VLLSM ,VLLS mode control" "VLLS0,VLLS1,VLLS2,VLLS3,?..."
|
|
else
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "VLLSCTRL,Stop Control Register"
|
|
bitfld.byte 0x00 0.--2. " VLLSM ,VLLS mode control" "VLLS0,VLLS1,VLLS2,VLLS3,?..."
|
|
endif
|
|
else
|
|
hgroup.byte 0x02++0x00
|
|
hide.byte 0x00 "VLLSCTRL,VLLS Control Register"
|
|
endif
|
|
else
|
|
if (((per.b(ad:0x4007E000+0x01))&0x07)==0x04)
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "VLLSCTRL,Stop Control Register"
|
|
sif cpuis("MK10D*5")||cpuis("MK11D*")||cpuis("MK12D*")||cpuis("MK11DN512AVLK5*")||cpuis("MK11DN512VLK5*")||cpuis("MK63F*")
|
|
bitfld.byte 0x00 5. " PORPO ,POR power option" "Enabled,Disabled"
|
|
newline
|
|
endif
|
|
sif cpuis("MK?0D*10")||cpuis("MK11D*")||cpuis("MK12D*")||cpuis("MK5?D*10")||cpuis("MK60D*")||cpuis("MK11DN512AVLK5*")||cpuis("MK11DN512VLK5*")
|
|
bitfld.byte 0x00 4. " RAM2PO ,RAM2 power option" "Not powered,Powered"
|
|
newline
|
|
endif
|
|
sif cpuis("MK63FN1M0VLQ12R")
|
|
bitfld.byte 0x00 0.--2. " VLLSM ,VLLS mode control" "VLLS0,VLLS1,VLLS2,VLLS3,?..."
|
|
elif cpuis("MK?0D*7")||cpuis("MK?0D*10")||cpuis("MK10F*12")||cpuis("MK5?D*")||cpuis("MK6?*")||cpuis("MK70*")||cpuis("MK30DX256VLL7R")||cpuis("KK60FN1M0VLQ15")
|
|
bitfld.byte 0x00 0.--2. " VLLSM ,VLLS mode control" ",VLLS1,VLLS2,VLLS3,?..."
|
|
else
|
|
bitfld.byte 0x00 0.--2. " VLLSM ,VLLS mode control" "VLLS0,VLLS1,VLLS2,VLLS3,?..."
|
|
endif
|
|
else
|
|
hgroup.byte 0x02++0x00
|
|
hide.byte 0x00 "VLLSCTRL,VLLS Control Register"
|
|
endif
|
|
endif
|
|
rgroup.byte 0x03++0x00
|
|
line.byte 0x00 "PMSTAT,Power Mode Status Register"
|
|
sif !cpuis("MK65F*")&&!cpuis("MK66F*")&&!cpuis("MK02*")&&!cpuis("MK84FN2M0CAU15R")&&!cpuis("MK8?FN256V*")&&!cpuis("MK63F*")&&!cpuis("MK60F*")&&!cpuis("KK60FN1M0VLQ15")&&!cpuis("KK65FN2M0CAC18R")
|
|
hexmask.byte 0x00 0.--6. 1. "PMSTAT ,PMSTAT"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "PMC (Power Management Controller)"
|
|
base ad:0x4007D000
|
|
width 8.
|
|
group.byte 0x00++0x02
|
|
line.byte 0x00 "LVDSC1,Low Voltage Detect Status and Control 1 Register"
|
|
rbitfld.byte 0x00 7. " LVDF ,Low-voltage detect flag" "Not detected,Detected"
|
|
bitfld.byte 0x00 6. " LVDACK ,Low-voltage detect acknowledge" "NACK,ACK"
|
|
bitfld.byte 0x00 5. " LVDIE ,Low-voltage detect interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.byte 0x00 4. " LVDRE ,Low-voltage detect reset enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--1. " LVDV ,Low-voltage detect voltage select" "Low trip,High trip,?..."
|
|
line.byte 0x01 "LVDSC2,Low Voltage Detect Status and Control 2 Register"
|
|
rbitfld.byte 0x01 7. " LVWF ,Low-voltage warning flag" "Not detected,Detected"
|
|
bitfld.byte 0x01 6. " LVWACK ,Low-voltage warning acknowledge" "NACK,ACK"
|
|
bitfld.byte 0x01 5. " LVWIE ,Low-voltage warning interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.byte 0x01 0.--1. " LVWV ,Low-voltage warning voltage select" "Low trip point,Mid 1 trip point,Mid 2 trip point,High trip point"
|
|
line.byte 0x02 "REGSC,Regulator Status and Control Register"
|
|
sif cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK40DX*Z*10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DX256ZCLQ10")||cpuis("MK51DX256ZCMC10")||cpuis("MK53DX256ZCLQ10")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DX256ZVLL10")||cpuis("MK60DN512ZCAB10R")||cpuis("MK60DX256ZVLL10")||cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN512VMC10*")||cpuis("MK60DN512ZVMC10")||cpuis("KK60DN512ZCAB10R")
|
|
bitfld.byte 0x02 4. " TRAMPO ,Traditional RAM power option" "Not powered,Powered"
|
|
newline
|
|
elif cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("MK11DN512AVLK5*")||cpuis("MK11DN512VLK5*")||cpuis("MK02*")||cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK30DX256ZVLQ10")||cpuis("KK60DN512ZCAB10R")
|
|
bitfld.byte 0x02 4. " BGEN ,Bandgap Enable In VLPx/LLS/VLLSx modes" "Disabled,Enabled"
|
|
newline
|
|
elif !cpuis("MK10F*12*")&&!cpuis("MK10DN512ZV??10*")&&!cpuis("MK10DX256ZV??10*")&&!cpuis("MK60FN1M0VLQ15")&&!cpuis("MK70FN1M0VMJ1*")&&!cpuis("KK60FN1M0VLQ15")
|
|
bitfld.byte 0x02 4. " BGEN ,Bandgap enable" "Enabled,Disabled"
|
|
newline
|
|
elif cpuis("MK10DX256ZV??10*")
|
|
bitfld.byte 0x02 4. " TRAMPO ,Traditional RAM power option" "Not powered,Powered"
|
|
newline
|
|
endif
|
|
sif (cpuis("MK10DN512ZV??10*")||cpuis("MK10DX256ZV??10*"))||cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK40D*Z*10")||cpuis("MK50DN512ZCLL10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DX256ZCLQ10")||cpuis("MK51DN512ZCLL10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")||cpuis("KK60DN512ZCAB10R")
|
|
rbitfld.byte 0x02 3. " VLPRS ,Very low power run status" "Off,On"
|
|
newline
|
|
else
|
|
eventfld.byte 0x02 3. " ACKISO ,Acknowledge isolation" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
rbitfld.byte 0x02 2. " REGONS ,Regulator in run regulation status" "Stop,Run"
|
|
sif cpuis("MK?0D*7")
|
|
newline
|
|
bitfld.byte 0x02 1. " BGBE ,Bandgap buffer enable" "Disabled,Enabled"
|
|
else
|
|
newline
|
|
bitfld.byte 0x02 0. " BGBE ,Bandgap buffer enable" "Disabled,Enabled"
|
|
endif
|
|
sif cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")
|
|
group.byte 0x0B++0x00
|
|
line.byte 0x00 "HVDSC1,High Voltage Detect Status And Control 1 Register"
|
|
rbitfld.byte 0x00 7. " HVDF ,High-voltage detect flag" "Not detected,Detected"
|
|
bitfld.byte 0x00 6. " HVDACK ,High-voltage detect acknowledge" "NACK,ACK"
|
|
bitfld.byte 0x00 5. " HVDIE ,High-voltage detect interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.byte 0x00 4. " HVDRE ,High-voltage detect reset enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " HVDV ,High-voltage detect voltage select" "Low trip,High trip"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "LLWU (Low-Leakage Wake-up Unit)"
|
|
base ad:0x4007C000
|
|
width 7.
|
|
sif cpuis("MK02*")
|
|
sif cpuis("*LH*")
|
|
group.byte 0x00++0x02
|
|
line.byte 0x00 "PE1,LLWU Pin Enable 1 Register"
|
|
bitfld.byte 0x00 6.--7. " WUPE_3 ,Wakeup pin enable for LLWU_P3" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
bitfld.byte 0x00 0.--1. " WUPE_0 ,Wakeup pin enable for LLWU_P0" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
line.byte 0x01 "PE2,LLWU Pin Enable 2 Register"
|
|
bitfld.byte 0x01 6.--7. " WUPE_7 ,Wakeup pin enable for LLWU_P7" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
bitfld.byte 0x01 4.--5. " WUPE_6 ,Wakeup pin enable for LLWU_P6" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
bitfld.byte 0x01 2.--3. " WUPE_5 ,Wakeup pin enable for LLWU_P5" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
textline " "
|
|
bitfld.byte 0x01 0.--1. " WUPE_4 ,Wakeup pin enable for LLWU_P4" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
line.byte 0x02 "PE3,LLWU Pin Enable 3 Register"
|
|
bitfld.byte 0x02 6.--7. " WUPE_11 ,Wakeup pin enable for LLWU_P11" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
bitfld.byte 0x02 4.--5. " WUPE_10 ,Wakeup pin enable for LLWU_P10" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
bitfld.byte 0x02 2.--3. " WUPE_9 ,Wakeup pin enable for LLWU_P9" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
textline " "
|
|
bitfld.byte 0x02 0.--1. " WUPE_8 ,Wakeup pin enable for LLWU_P8" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
else
|
|
group.byte 0x00++0x02
|
|
line.byte 0x00 "PE1,LLWU Pin Enable 1 Register"
|
|
bitfld.byte 0x00 6.--7. " WUPE_3 ,Wakeup pin enable for LLWU_P3" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
line.byte 0x01 "PE2,LLWU Pin Enable 2 Register"
|
|
bitfld.byte 0x01 6.--7. " WUPE_7 ,Wakeup pin enable for LLWU_P7" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
bitfld.byte 0x01 4.--5. " WUPE_6 ,Wakeup pin enable for LLWU_P6" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
bitfld.byte 0x01 2.--3. " WUPE_5 ,Wakeup pin enable for LLWU_P5" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
line.byte 0x02 "PE3,LLWU Pin Enable 3 Register"
|
|
bitfld.byte 0x02 4.--5. " WUPE_10 ,Wakeup pin enable for LLWU_P10" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
bitfld.byte 0x02 2.--3. " WUPE_9 ,Wakeup pin enable for LLWU_P9" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
bitfld.byte 0x02 0.--1. " WUPE_8 ,Wakeup pin enable for LLWU_P8" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
endif
|
|
sif cpuis("*LH*")||cpuis("*LF*")
|
|
group.byte 0x03++0x00
|
|
line.byte 0x00 "PE4,LLWU Pin Enable 4 Register"
|
|
bitfld.byte 0x00 6.--7. " WUPE_15 ,Wakeup pin enable for LLWU_P15" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
bitfld.byte 0x00 4.--5. " WUPE_14 ,Wakeup pin enable for LLWU_P14" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
bitfld.byte 0x00 2.--3. " WUPE_13 ,Wakeup pin enable for LLWU_P13" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " WUPE_12 ,Wakeup pin enable for LLWU_P12" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
else
|
|
group.byte 0x03++0x00
|
|
line.byte 0x00 "PE4,LLWU Pin Enable 4 Register"
|
|
bitfld.byte 0x00 6.--7. " WUPE_15 ,Wakeup pin enable for LLWU_P15" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
bitfld.byte 0x00 4.--5. " WUPE_14 ,Wakeup pin enable for LLWU_P14" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
endif
|
|
textline " "
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "ME,LLWU Module Enable Register"
|
|
bitfld.byte 0x00 7. " WUME_7 ,Wakeup module enable for module 7" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " WUME_6 ,Wakeup module enable for module 6" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " WUME_5 ,Wakeup module enable for module 5" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " WUME_4 ,Wakeup module enable for module 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " WUME_3 ,Wakeup module enable for module 3" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " WUME_2 ,Wakeup module enable for module 2" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " WUME_1 ,Wakeup module enable for module 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " WUME_0 ,Wakeup module enable for module 0" "Disabled,Enabled"
|
|
sif cpuis("*LH*")
|
|
group.byte 0x05++0x00
|
|
line.byte 0x00 "F1,LLWU Flag 1 Register"
|
|
eventfld.byte 0x00 7. " WUF_7 ,Wakeup flag for LLWU_P7" "No wakeup,Wakeup"
|
|
eventfld.byte 0x00 6. " WUF_6 ,Wakeup flag for LLWU_P6" "No wakeup,Wakeup"
|
|
eventfld.byte 0x00 5. " WUF_5 ,Wakeup flag for LLWU_P5" "No wakeup,Wakeup"
|
|
eventfld.byte 0x00 4. " WUF_4 ,Wakeup flag for LLWU_P4" "No wakeup,Wakeup"
|
|
textline " "
|
|
eventfld.byte 0x00 3. " WUF_3 ,Wakeup flag for LLWU_P3" "No wakeup,Wakeup"
|
|
eventfld.byte 0x00 0. " WUF_0 ,Wakeup flag for LLWU_P0" "No wakeup,Wakeup"
|
|
else
|
|
group.byte 0x05++0x00
|
|
line.byte 0x00 "F1,LLWU Flag 1 Register"
|
|
eventfld.byte 0x00 7. " WUF_7 ,Wakeup flag for LLWU_P7" "No wakeup,Wakeup"
|
|
eventfld.byte 0x00 6. " WUF_6 ,Wakeup flag for LLWU_P6" "No wakeup,Wakeup"
|
|
eventfld.byte 0x00 5. " WUF_5 ,Wakeup flag for LLWU_P5" "No wakeup,Wakeup"
|
|
eventfld.byte 0x00 3. " WUF_3 ,Wakeup flag for LLWU_P3" "No wakeup,Wakeup"
|
|
endif
|
|
sif cpuis("*LH*")
|
|
group.byte 0x06++0x00
|
|
line.byte 0x00 "F2,LLWU Flag 2 Register"
|
|
eventfld.byte 0x00 7. " WUF_15 ,Wakeup flag for LLWU_P15" "No wakeup,Wakeup"
|
|
eventfld.byte 0x00 6. " WUF_14 ,Wakeup flag for LLWU_P14" "No wakeup,Wakeup"
|
|
eventfld.byte 0x00 5. " WUF_13 ,Wakeup flag for LLWU_P13" "No wakeup,Wakeup"
|
|
eventfld.byte 0x00 4. " WUF_12 ,Wakeup flag for LLWU_P12" "No wakeup,Wakeup"
|
|
textline " "
|
|
eventfld.byte 0x00 3. " WUF_11 ,Wakeup flag for LLWU_P11" "No wakeup,Wakeup"
|
|
eventfld.byte 0x00 2. " WUF_10 ,Wakeup flag for LLWU_P10" "No wakeup,Wakeup"
|
|
eventfld.byte 0x00 1. " WUF_9 ,Wakeup flag for LLWU_P9" "No wakeup,Wakeup"
|
|
eventfld.byte 0x00 0. " WUF_8 ,Wakeup flag for LLWU_P8" "No wakeup,Wakeup"
|
|
elif cpuis("*LF*")
|
|
group.byte 0x06++0x00
|
|
line.byte 0x00 "F2,LLWU Flag 2 Register"
|
|
eventfld.byte 0x00 7. " WUF_15 ,Wakeup flag for LLWU_P15" "No wakeup,Wakeup"
|
|
eventfld.byte 0x00 6. " WUF_14 ,Wakeup flag for LLWU_P14" "No wakeup,Wakeup"
|
|
eventfld.byte 0x00 5. " WUF_13 ,Wakeup flag for LLWU_P13" "No wakeup,Wakeup"
|
|
eventfld.byte 0x00 4. " WUF_12 ,Wakeup flag for LLWU_P12" "No wakeup,Wakeup"
|
|
textline " "
|
|
eventfld.byte 0x00 2. " WUF_10 ,Wakeup flag for LLWU_P10" "No wakeup,Wakeup"
|
|
eventfld.byte 0x00 1. " WUF_9 ,Wakeup flag for LLWU_P9" "No wakeup,Wakeup"
|
|
eventfld.byte 0x00 0. " WUF_8 ,Wakeup flag for LLWU_P8" "No wakeup,Wakeup"
|
|
else
|
|
group.byte 0x06++0x00
|
|
line.byte 0x00 "F2,LLWU Flag 2 Register"
|
|
eventfld.byte 0x00 7. " WUF_15 ,Wakeup flag for LLWU_P15" "No wakeup,Wakeup"
|
|
eventfld.byte 0x00 6. " WUF_14 ,Wakeup flag for LLWU_P14" "No wakeup,Wakeup"
|
|
eventfld.byte 0x00 2. " WUF_10 ,Wakeup flag for LLWU_P10" "No wakeup,Wakeup"
|
|
eventfld.byte 0x00 1. " WUF_9 ,Wakeup flag for LLWU_P9" "No wakeup,Wakeup"
|
|
textline " "
|
|
eventfld.byte 0x00 0. " WUF_8 ,Wakeup flag for LLWU_P8" "No wakeup,Wakeup"
|
|
endif
|
|
rgroup.byte 0x07++0x00
|
|
line.byte 0x00 "F3,LLWU Flag 3 Register"
|
|
bitfld.byte 0x00 7. " MWUF_7 ,Wakeup flag for module 7" "No wakeup,Wakeup"
|
|
bitfld.byte 0x00 6. " MWUF_6 ,Wakeup flag for module 6" "No wakeup,Wakeup"
|
|
bitfld.byte 0x00 5. " MWUF_5 ,Wakeup flag for module 5" "No wakeup,Wakeup"
|
|
bitfld.byte 0x00 4. " MWUF_4 ,Wakeup flag for module 4" "No wakeup,Wakeup"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " MWUF_3 ,Wakeup flag for module 3" "No wakeup,Wakeup"
|
|
bitfld.byte 0x00 2. " MWUF_2 ,Wakeup flag for module 2" "No wakeup,Wakeup"
|
|
bitfld.byte 0x00 1. " MWUF_1 ,Wakeup flag for module 1" "No wakeup,Wakeup"
|
|
bitfld.byte 0x00 0. " MWUF_0 ,Wakeup flag for module 0" "No wakeup,Wakeup"
|
|
else
|
|
group.byte 0x00++0x06
|
|
line.byte 0x00 "PE1,LLWU Pin Enable 1 Register"
|
|
bitfld.byte 0x00 6.--7. " WUPE_3 ,Wakeup pin enable for LLWU_P3" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
sif !cpuis("MK22FN1M0VLH10")&&!cpuis("MK22FX512AVLH12")&&!cpuis("MK22FN512VMP12")&&!cpuis("MK22FN512VLH12*")&&!cpuis("MK22FN256CAH12R")&&!cpuis("KK22FN128CAH12R")&&!cpuis("KK22FN256CAH12R")&&!cpuis("MK22FN128VLH10R")&&!cpuis("MK22FX512AVLH12R")
|
|
bitfld.byte 0x00 4.--5. " WUPE_2 ,Wakeup pin enable for LLWU_P2" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
bitfld.byte 0x00 2.--3. " WUPE_1 ,Wakeup pin enable for LLWU_P1" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
endif
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " WUPE_0 ,Wakeup pin enable for LLWU_P0" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
line.byte 0x01 "PE2,LLWU Pin Enable 2 Register"
|
|
bitfld.byte 0x01 6.--7. " WUPE_7 ,Wakeup pin enable for LLWU_P7" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
bitfld.byte 0x01 4.--5. " WUPE_6 ,Wakeup pin enable for LLWU_P6" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
bitfld.byte 0x01 2.--3. " WUPE_5 ,Wakeup pin enable for LLWU_P5" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
textline " "
|
|
bitfld.byte 0x01 0.--1. " WUPE_4 ,Wakeup pin enable for LLWU_P4" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
line.byte 0x02 "PE3,LLWU Pin Enable 3 Register"
|
|
bitfld.byte 0x02 6.--7. " WUPE_11 ,Wakeup pin enable for LLWU_P11" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
bitfld.byte 0x02 4.--5. " WUPE_10 ,Wakeup pin enable for LLWU_P10" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
bitfld.byte 0x02 2.--3. " WUPE_9 ,Wakeup pin enable for LLWU_P9" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
textline " "
|
|
bitfld.byte 0x02 0.--1. " WUPE_8 ,Wakeup pin enable for LLWU_P8" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
line.byte 0x03 "PE4,LLWU Pin Enable 4 Register"
|
|
bitfld.byte 0x03 6.--7. " WUPE_15 ,Wakeup pin enable for LLWU_P15" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
bitfld.byte 0x03 4.--5. " WUPE_14 ,Wakeup pin enable for LLWU_P14" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
bitfld.byte 0x03 2.--3. " WUPE_13 ,Wakeup pin enable for LLWU_P13" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
textline " "
|
|
bitfld.byte 0x03 0.--1. " WUPE_12 ,Wakeup pin enable for LLWU_P12" "Disabled as wakeup,Enabled with rising edge,Enabled with falling edge,Enabled with any change"
|
|
textline " "
|
|
line.byte 0x04 "ME,LLWU Module Enable Register"
|
|
bitfld.byte 0x04 7. " WUME_7 ,Wakeup module enable for module 7" "Disabled,Enabled"
|
|
textline " "
|
|
sif !cpuis("MK22FN1M0VMC10")&&!cpuis("MK22FN1M0VLQ10")&&!cpuis("MK22FN1M0VLL10")&&!cpuis("MK22FN1M0VLK10")&&!cpuis("MK22FN1M0VLH10")&&!cpuis("MK21FX512VMD10")&&!cpuis("MK21FX512VMC10")&&!cpuis("MK21FN1M0VMD10")&&!cpuis("MK21FN1M0VMC10")&&!cpuis("MK22FX512AVMD12")&&!cpuis("MK22FX512AVMC12")&&!cpuis("MK22FX512AVLQ12")&&!cpuis("MK22FX512AVLL12")&&!cpuis("MK22FX512AVLK12")&&!cpuis("MK22FX512AVLH12")&&!cpuis("MK22FN512VMP12")&&!cpuis("MK22FN512VLL12")&&!cpuis("MK22FN512VLH12")&&!cpuis("MK22FN512VDC12")&&!cpuis("MK22FN512CBP12R")&&!cpuis("MK22FN512CAP12R")&&!cpuis("MK22FN256VMP12")&&!cpuis("MK22FN256CAP12R")&&!cpuis("MK20DX256VMC7R")&&!cpuis("MK20DX256VLK10R")&&!cpuis("MK20DX256VLK7R")&&!cpuis("MK20DX256VLQ10R")&&!cpuis("MK20FN1M0VLQ12R")&&!cpuis("MK22FN128CAH12R")&&!cpuis("MK22FN1M0AVLH12")&&!cpuis("MK22FN1M0AVLK12")&&!cpuis("MK22FN1M0AVLL12")&&!cpuis("MK22FN1M0AVLQ12")&&!cpuis("MK22FN1M0AVMC12")&&!cpuis("MK22FN1M0AVMD12")&&!cpuis("MK22FN256CAH12R")&&!cpuis("MK20DN32VEX5")&&!cpuis("MK20DN64VEX5")&&!cpuis("MK20DN128VEX5")&&!cpuis("MK20DX32VEX5")&&!cpuis("MK20DX64VEX5")&&!cpuis("MK20DX128VEX5")&&!cpuis("MK20DX64VEX7")&&!cpuis("MK20DX128VEX7")&&!cpuis("MK20DX256VEX7")&&!cpuis("MK20DX64VMB7")&&!cpuis("MK20DX128VMB7")&&!cpuis("MK20DX256VMB7")&&!cpuis("MK24FN1M0CAJ12R")&&!cpuis("MK24FN1M0VDC12R")&&!cpuis("MK24FN1M0VLL12")&&!cpuis("MK24FN1M0VLL12R")&&!cpuis("MK24FN1M0VLQ12R")&&!cpuis("MK24FN256VDC12")&&!cpuis("MK22FN256VLL12R")&&!cpuis("KK22FN128CAH12R")&&!cpuis("KK22FN256CAH12R")&&!cpuis("MK21DN512AVMC5R")&&!cpuis("MK21DX256AVMC5R")&&!cpuis("MK22FN128VLH10R")&&!cpuis("MK21FN1M0AVMC12R")&&!cpuis("MK22FX512VLQ12R")&&!cpuis("MK22FX512VMD12R")&&!cpuis("MK22FN1M0VLQ12R")&&!cpuis("MK22FX512VMC12R")&&!cpuis("MK22FN1M0VMC12R")&&!cpuis("MK22FN1M0AVLK12R")&&!cpuis("MK22FN1M0VLK12R")&&!cpuis("MK22FX512AVLH12R")&&!cpuis("MK20DN512ZVLL10")&&!cpuis("MK20DX256ZVLL10")&&!cpuis("MK20DX256ZVLQ10")&&!cpuis("MK20DX256ZVLQ10R")&&!cpuis("MK20DX256ZVMD10")&&!cpuis("MK20DN512ZVLQ10")&&!cpuis("MK20DN512ZVLQ10R")&&!cpuis("MK20DN512ZVMD10")&&!cpuis("MK20DX128ZVLQ10")&&!cpuis("MK20DN512ZVLK10")&&!cpuis("MK20DX256ZVLK10")&&!cpuis("MK20DN512VLK10R")&&!cpuis("MK20DN512ZVMC10")&&!cpuis("MK20DN512ZVMC10R")
|
|
bitfld.byte 0x04 6. " WUME_6 ,Wakeup module enable for module 6" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.byte 0x04 5. " WUME_5 ,Wakeup module enable for module 5" "Disabled,Enabled"
|
|
textline " "
|
|
sif !cpuis("MK22FN1M0VMC10")&&!cpuis("MK22FN1M0VLQ10")&&!cpuis("MK22FN1M0VLL10")&&!cpuis("MK22FN1M0VLK10")&&!cpuis("MK22FN1M0VLH10")&&!cpuis("MK21FX512VMD10")&&!cpuis("MK21FX512VMC10")&&!cpuis("MK21FN1M0VMD10")&&!cpuis("MK21FN1M0VMC10")&&!cpuis("MK22FX512AVMD12")&&!cpuis("MK22FX512AVMC12")&&!cpuis("MK22FX512AVLQ12")&&!cpuis("MK22FX512AVLL12")&&!cpuis("MK22FX512AVLK12")&&!cpuis("MK22FX512AVLH12")&&!cpuis("MK22FN512VMP12")&&!cpuis("MK22FN512VLL12")&&!cpuis("MK22FN512VLH12")&&!cpuis("MK22FN512VDC12")&&!cpuis("MK22FN512CBP12R")&&!cpuis("MK22FN512CAP12R")&&!cpuis("MK22FN256VMP12")&&!cpuis("MK22FN256CAP12R")&&!cpuis("MK22FN128CAH12R")&&!cpuis("MK22FN1M0AVLH12")&&!cpuis("MK22FN1M0AVLK12")&&!cpuis("MK22FN1M0AVLL12")&&!cpuis("MK22FN1M0AVLQ12")&&!cpuis("MK22FN1M0AVMC12")&&!cpuis("MK22FN1M0AVMD12")&&!cpuis("MK22FN256CAH12R")&&!cpuis("MK24FN1M0CAJ12R")&&!cpuis("MK24FN1M0VDC12R")&&!cpuis("MK24FN1M0VLL12")&&!cpuis("MK24FN1M0VLL12R")&&!cpuis("MK24FN1M0VLQ12R")&&!cpuis("MK24FN256VDC12")&&!cpuis("MK22FN256VLL12R")&&!cpuis("KK22FN128CAH12R")&&!cpuis("KK22FN256CAH12R")&&!cpuis("MK21DN512AVMC5R")&&!cpuis("MK21DX256AVMC5R")&&!cpuis("MK22FN128VLH10R")&&!cpuis("MK21FN1M0AVMC12R")&&!cpuis("MK22FX512VLQ12R")&&!cpuis("MK22FX512VMD12R")&&!cpuis("MK22FN1M0VLQ12R")&&!cpuis("MK22FX512VMC12R")&&!cpuis("MK22FN1M0VMC12R")&&!cpuis("MK22FN1M0AVLK12R")&&!cpuis("MK22FN1M0VLK12R")&&!cpuis("MK22FX512AVLH12R")
|
|
bitfld.byte 0x04 4. " WUME_4 ,Wakeup module enable for module 4" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif !cpuis("MK22FN512VMP12")&&!cpuis("MK22FN512VLL12")&&!cpuis("MK22FN512VLH12")&&!cpuis("MK22FN512VDC12")&&!cpuis("MK22FN512CBP12R")&&!cpuis("MK22FN512CAP12R")&&!cpuis("MK22FN256VMP12")&&!cpuis("MK22FN256CAP12R")&&!cpuis("MK22FN128CAH12R")&&!cpuis("MK22FN256CAH12R")&&!cpuis("MK20DN32VEX5")&&!cpuis("MK20DN64VEX5")&&!cpuis("MK20DN128VEX5")&&!cpuis("MK20DX32VEX5")&&!cpuis("MK20DX64VEX5")&&!cpuis("MK20DX128VEX5")&&!cpuis("MK24FN256VDC12")&&!cpuis("MK22FN256VLL12R")&&!cpuis("KK22FN128CAH12R")&&!cpuis("KK22FN256CAH12R")&&!cpuis("MK21DN512AVMC5R")&&!cpuis("MK21DX256AVMC5R")&&!cpuis("MK22FN128VLH10R")
|
|
bitfld.byte 0x04 3. " WUME_3 ,Wakeup module enable for module 3" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.byte 0x04 2. " WUME_2 ,Wakeup module enable for module 2" "Disabled,Enabled"
|
|
bitfld.byte 0x04 1. " WUME_1 ,Wakeup module enable for module 1" "Disabled,Enabled"
|
|
bitfld.byte 0x04 0. " WUME_0 ,Wakeup module enable for module 0" "Disabled,Enabled"
|
|
line.byte 0x05 "F1,LLWU Flag 1 Register"
|
|
eventfld.byte 0x05 7. " WUF_7 ,Wakeup flag for LLWU_P7" "No wakeup,Wakeup"
|
|
eventfld.byte 0x05 6. " WUF_6 ,Wakeup flag for LLWU_P6" "No wakeup,Wakeup"
|
|
eventfld.byte 0x05 5. " WUF_5 ,Wakeup flag for LLWU_P5" "No wakeup,Wakeup"
|
|
eventfld.byte 0x05 4. " WUF_4 ,Wakeup flag for LLWU_P4" "No wakeup,Wakeup"
|
|
textline " "
|
|
eventfld.byte 0x05 3. " WUF_3 ,Wakeup flag for LLWU_P3" "No wakeup,Wakeup"
|
|
textline " "
|
|
sif !cpuis("MK22FN1M0VLH10")&&!cpuis("MK22FX512AVLH12")&&!cpuis("MK22FN512VMP12")&&!cpuis("MK22FN512VLH12*")&&!cpuis("KK22FN128CAH12R")&&!cpuis("KK22FN256CAH12R")&&!cpuis("MK22FN128VLH10R")&&!cpuis("MK22FX512AVLH12R")
|
|
eventfld.byte 0x05 2. " WUF_2 ,Wakeup flag for LLWU_P2" "No wakeup,Wakeup"
|
|
eventfld.byte 0x05 1. " WUF_1 ,Wakeup flag for LLWU_P1" "No wakeup,Wakeup"
|
|
textline " "
|
|
endif
|
|
eventfld.byte 0x05 0. " WUF_0 ,Wakeup flag for LLWU_P0" "No wakeup,Wakeup"
|
|
line.byte 0x06 "F2,LLWU Flag 2 Register"
|
|
eventfld.byte 0x06 7. " WUF_15 ,Wakeup flag for LLWU_P15" "No wakeup,Wakeup"
|
|
eventfld.byte 0x06 6. " WUF_14 ,Wakeup flag for LLWU_P14" "No wakeup,Wakeup"
|
|
eventfld.byte 0x06 5. " WUF_13 ,Wakeup flag for LLWU_P13" "No wakeup,Wakeup"
|
|
eventfld.byte 0x06 4. " WUF_12 ,Wakeup flag for LLWU_P12" "No wakeup,Wakeup"
|
|
textline " "
|
|
eventfld.byte 0x06 3. " WUF_11 ,Wakeup flag for LLWU_P11" "No wakeup,Wakeup"
|
|
eventfld.byte 0x06 2. " WUF_10 ,Wakeup flag for LLWU_P10" "No wakeup,Wakeup"
|
|
eventfld.byte 0x06 1. " WUF_9 ,Wakeup flag for LLWU_P9" "No wakeup,Wakeup"
|
|
eventfld.byte 0x06 0. " WUF_8 ,Wakeup flag for LLWU_P8" "No wakeup,Wakeup"
|
|
sif (cpuis("MK10DN512ZV??10*")||cpuis("MK10DX256ZV??10*"))||cpuis("MK40D*Z*10")||cpu()==("MK53DN512ZCLQ10")||cpu()==("MK53DN512ZCMD10")||cpu()==("MK53DX256ZCLQ10")||cpu()==("MK50DN512ZCLL10")||cpu()==("MK50DX256ZCLL10")||cpu()==("MK50DN512ZCLQ10")||cpu()==("MK50DX256ZCLQ10")||cpu()==("MK51DN512ZCLL10")||cpu()==("MK51DN512ZCMC10")||cpu()==("MK51DX256ZCMC10")||cpu()==("MK51DN256ZCMD10")||cpu()==("MK51DN512ZCLQ10")||cpu()==("MK52DN512ZCLQ10")||cpu()==("MK52DN512ZCMD10")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DX256ZVLL10")||cpuis("MK60DN512ZCAB10R")||cpuis("MK20D????ZVLL10")||cpuis("KK20DN512ZCAB10R")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20D????ZVLK10")||cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256ZVLQ10")
|
|
group.byte 0x07++0x00
|
|
line.byte 0x00 "F3,LLWU Flag 3 Register"
|
|
eventfld.byte 0x00 7. " MWUF_7 ,Wakeup flag for module 7" "No wakeup,Wakeup"
|
|
textline " "
|
|
sif !cpuis("MK20DN512ZVLL10")&&!cpuis("MK20DX256ZVLL10")&&!cpuis("MK20DX256ZVLQ10")&&!cpuis("MK20DX256ZVLQ10R")&&!cpuis("MK20DX256ZVMD10")&&!cpuis("MK20DN512ZVLQ10")&&!cpuis("MK20DN512ZVLQ10R")&&!cpuis("MK20DN512ZVMD10")&&!cpuis("MK20DX128ZVLQ10")&&!cpuis("MK20DN512ZVLK10")&&!cpuis("MK20DX256ZVLK10")&&!cpuis("MK20DN512ZVMC10")&&!cpuis("MK20DN512ZVMC10R")
|
|
rbitfld.byte 0x00 6. " MWUF_6 ,Wakeup flag for module 6" "No wakeup,Wakeup"
|
|
textline " "
|
|
endif
|
|
rbitfld.byte 0x00 5. " MWUF_5 ,Wakeup flag for module 5" "No wakeup,Wakeup"
|
|
rbitfld.byte 0x00 4. " MWUF_4 ,Wakeup flag for module 4" "No wakeup,Wakeup"
|
|
rbitfld.byte 0x00 3. " MWUF_3 ,Wakeup flag for module 3" "No wakeup,Wakeup"
|
|
textline " "
|
|
rbitfld.byte 0x00 2. " MWUF_2 ,Wakeup flag for module 2" "No wakeup,Wakeup"
|
|
rbitfld.byte 0x00 1. " MWUF_1 ,Wakeup flag for module 1" "No wakeup,Wakeup"
|
|
rbitfld.byte 0x00 0. " MWUF_0 ,Wakeup flag for module 0" "No wakeup,Wakeup"
|
|
else
|
|
rgroup.byte 0x07++0x00
|
|
line.byte 0x00 "F3,LLWU Flag 3 Register"
|
|
bitfld.byte 0x00 7. " MWUF_7 ,Wakeup flag for module 7" "No wakeup,Wakeup"
|
|
textline " "
|
|
sif !cpuis("MK22FN1M0VMC10")&&!cpuis("MK22FN1M0VLQ10")&&!cpuis("MK22FN1M0VLL10")&&!cpuis("MK22FN1M0VLK10")&&!cpuis("MK22FN1M0VLH10")&&!cpuis("MK21FX512VMD10")&&!cpuis("MK21FX512VMC10")&&!cpuis("MK21FN1M0VMD10")&&!cpuis("MK21FN1M0VMC10")&&!cpuis("MK22FX512AVMD12")&&!cpuis("MK22FX512AVMC12")&&!cpuis("MK22FX512AVLQ12")&&!cpuis("MK22FX512AVLL12")&&!cpuis("MK22FX512AVLK12")&&!cpuis("MK22FN512VMP12")&&!cpuis("MK22FN512VLL12")&&!cpuis("MK22FN512VLH12")&&!cpuis("MK22FN512VDC12")&&!cpuis("MK22FN512CBP12R")&&!cpuis("MK22FN512CAP12R")&&!cpuis("MK22FN256VMP12")&&!cpuis("MK22FN256CAP12R")&&!cpuis("MK20DX256VMC7R")&&!cpuis("MK20DX256VLK10R")&&!cpuis("MK20DX256VLK7R")&&!cpuis("MK20DX256VLQ10R")&&!cpuis("MK20FN1M0VLQ12R")&&!cpuis("MK22FN128CAH12R")&&!cpuis("MK22FN1M0AVLH12")&&!cpuis("MK22FN1M0AVLK12")&&!cpuis("MK22FN1M0AVLL12")&&!cpuis("MK22FN1M0AVLQ12")&&!cpuis("MK22FN1M0AVMC12")&&!cpuis("MK22FN1M0AVMD12")&&!cpuis("MK22FN256CAH12R")&&!cpuis("MK20DN32VEX5")&&!cpuis("MK20DN64VEX5")&&!cpuis("MK20DN128VEX5")&&!cpuis("MK20DX32VEX5")&&!cpuis("MK20DX64VEX5")&&!cpuis("MK20DX128VEX5")&&!cpuis("MK20DX64VEX7")&&!cpuis("MK20DX128VEX7")&&!cpuis("MK20DX256VEX7")&&!cpuis("MK20DX64VMB7")&&!cpuis("MK20DX128VMB7")&&!cpuis("MK20DX256VMB7")&&!cpuis("MK24FN1M0CAJ12R")&&!cpuis("MK24FN1M0VDC12R")&&!cpuis("MK24FN1M0VLL12")&&!cpuis("MK24FN1M0VLL12R")&&!cpuis("MK24FN1M0VLQ12R")&&!cpuis("MK24FN256VDC12")&&!cpuis("MK22FN256VLL12R")&&!cpuis("KK22FN128CAH12R")&&!cpuis("KK22FN256CAH12R")&&!cpuis("MK21DN512AVMC5R")&&!cpuis("MK21DX256AVMC5R")&&!cpuis("MK22FN128VLH10R")&&!cpuis("MK21FN1M0AVMC12R")&&!cpuis("MK22FX512VLQ12R")&&!cpuis("MK22FX512VMD12R")&&!cpuis("MK22FN1M0VLQ12R")&&!cpuis("MK22FX512VMC12R")&&!cpuis("MK22FN1M0VMC12R")&&!cpuis("MK22FN1M0AVLK12R")&&!cpuis("MK22FN1M0VLK12R")&&!cpuis("MK22FX512AVLH12R")&&!cpuis("MK20DN512VLK10R")
|
|
bitfld.byte 0x00 6. " MWUF_6 ,Wakeup flag for module 6" "No wakeup,Wakeup"
|
|
textline " "
|
|
endif
|
|
bitfld.byte 0x00 5. " MWUF_5 ,Wakeup flag for module 5" "No wakeup,Wakeup"
|
|
textline " "
|
|
sif !cpuis("MK22FN1M0VMC10")&&!cpuis("MK22FN1M0VLQ10")&&!cpuis("MK22FN1M0VLL10")&&!cpuis("MK22FN1M0VLK10")&&!cpuis("MK22FN1M0VLH10")&&!cpuis("MK21FX512VMD10")&&!cpuis("MK21FX512VMC10")&&!cpuis("MK21FN1M0VMD10")&&!cpuis("MK21FN1M0VMC10")&&!cpuis("MK22FX512AVMD12")&&!cpuis("MK22FX512AVMC12")&&!cpuis("MK22FX512AVLQ12")&&!cpuis("MK22FX512AVLL12")&&!cpuis("MK22FX512AVLK12")&&!cpuis("MK22FN512VMP12")&&!cpuis("MK22FN512VLL12")&&!cpuis("MK22FN512VLH12")&&!cpuis("MK22FN512VDC12")&&!cpuis("MK22FN512CBP12R")&&!cpuis("MK22FN512CAP12R")&&!cpuis("MK22FN256VMP12")&&!cpuis("MK22FN256CAP12R")&&!cpuis("MK22FN128CAH12R")&&!cpuis("MK22FN1M0AVLH12")&&!cpuis("MK22FN1M0AVLK12")&&!cpuis("MK22FN1M0AVLL12")&&!cpuis("MK22FN1M0AVLQ12")&&!cpuis("MK22FN1M0AVMC12")&&!cpuis("MK22FN1M0AVMD12")&&!cpuis("MK22FN256CAH12R")&&!cpuis("MK24FN1M0CAJ12R")&&!cpuis("MK24FN1M0VDC12R")&&!cpuis("MK24FN1M0VLL12")&&!cpuis("MK24FN1M0VLL12R")&&!cpuis("MK24FN1M0VLQ12R")&&!cpuis("MK24FN256VDC12")&&!cpuis("MK22FN256VLL12R")&&!cpuis("KK22FN128CAH12R")&&!cpuis("KK22FN256CAH12R")&&!cpuis("MK21DN512AVMC5R")&&!cpuis("MK21DX256AVMC5R")&&!cpuis("MK22FN128VLH10R")&&!cpuis("MK21FN1M0AVMC12R")&&!cpuis("MK22FX512VLQ12R")&&!cpuis("MK22FX512VMD12R")&&!cpuis("MK22FN1M0VLQ12R")&&!cpuis("MK22FX512VMC12R")&&!cpuis("MK22FN1M0VMC12R")&&!cpuis("MK22FN1M0AVLK12R")&&!cpuis("MK22FN1M0VLK12R")&&!cpuis("MK22FX512AVLH12R")
|
|
bitfld.byte 0x00 4. " MWUF_4 ,Wakeup flag for module 4" "No wakeup,Wakeup"
|
|
textline " "
|
|
endif
|
|
sif !cpuis("MK22FN512VMP12")&&!cpuis("MK22FN512VLL12")&&!cpuis("MK22FN512VLH12")&&!cpuis("MK22FN512VDC12")&&!cpuis("MK22FN512CBP12R")&&!cpuis("MK22FN512CAP12R")&&!cpuis("MK22FN256VMP12")&&!cpuis("MK22FN256CAP12R")&&!cpuis("MK22FN128CAH12R")&&!cpuis("MK22FN256CAH12R")&&!cpuis("MK20DN32VEX5")&&!cpuis("MK20DN64VEX5")&&!cpuis("MK20DN128VEX5")&&!cpuis("MK20DX32VEX5")&&!cpuis("MK20DX64VEX5")&&!cpuis("MK20DX128VEX5")&&!cpuis("MK24FN256VDC12")&&!cpuis("MK22FN256VLL12R")&&!cpuis("KK22FN128CAH12R")&&!cpuis("KK22FN256CAH12R")&&!cpuis("MK21DN512AVMC5R")&&!cpuis("MK21DX256AVMC5R")&&!cpuis("MK22FN128VLH10R")
|
|
bitfld.byte 0x00 3. " MWUF_3 ,Wakeup flag for module 3" "No wakeup,Wakeup"
|
|
textline " "
|
|
endif
|
|
bitfld.byte 0x00 2. " MWUF_2 ,Wakeup flag for module 2" "No wakeup,Wakeup"
|
|
bitfld.byte 0x00 1. " MWUF_1 ,Wakeup flag for module 1" "No wakeup,Wakeup"
|
|
bitfld.byte 0x00 0. " MWUF_0 ,Wakeup flag for module 0" "No wakeup,Wakeup"
|
|
endif
|
|
endif
|
|
textline " "
|
|
sif (cpuis("MK20D*AB10")||cpuis("MK20DN512*AB10R")||cpuis("MK10DN512ZV??10*")||cpuis("MK10DX256ZV??10*")||cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R"))||cpuis("MK40D*Z*10")||cpu()==("MK53DN512ZCLQ10")||cpu()==("MK53DN512ZCMD10")||cpu()==("MK53DX256ZCLQ10")||cpu()==("MK50DN512ZCLL10")||cpu()==("MK50DX256ZCLL10")||cpu()==("MK50DN512ZCLQ10")||cpu()==("MK50DX256ZCLQ10")||cpu()==("MK51DN512ZCLL10")||cpu()==("MK51DN512ZCMC10")||cpu()==("MK51DX256ZCMC10")||cpu()==("MK51DN256ZCMD10")||cpu()==("MK51DN512ZCLQ10")||cpu()==("MK52DN512ZCLQ10")||cpu()==("MK52DN512ZCMD10")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DX256ZVLL10")||cpuis("MK60DN512ZCAB10R")||cpuis("MK20D????ZVLL10")||cpuis("KK20DN512ZCAB10R")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20D????ZVLK10")
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "CS,LLWU Control And Status Register"
|
|
eventfld.byte 0x00 7. " ACKISO ,Acknowledge isolation" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " FLTEP ,Digital filter on external pin" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " FLTR ,Digital filter on RESET pin" "Disabled,Enabled"
|
|
else
|
|
sif cpuis("MK02*LH*")
|
|
group.byte 0x08++0x01
|
|
line.byte 0x00 "FILT1,LLWU Pin Filter 1 Register"
|
|
eventfld.byte 0x00 7. " FILTF ,Filter detect flag" "No wakeup,Wakeup"
|
|
bitfld.byte 0x00 5.--6. " FILTE ,Digital filter on external pin" "Disabled,Filter posedge,Filter negedge,Filter any edge"
|
|
bitfld.byte 0x00 0.--3. " FILTSEL ,Filter pin select" "LLWU_P0,,,LLWU_P3,LLWU_P4,LLWU_P5,LLWU_P6,LLWU_P7,LLWU_P8,LLWU_P9,LLWU_P10,LLWU_P11,LLWU_P12,LLWU_P13,LLWU_P14,LLWU_P15"
|
|
line.byte 0x01 "FILT2,LLWU Pin Filter 2 Register"
|
|
eventfld.byte 0x01 7. " FILTF ,Filter detect flag" "No wakeup,Wakeup"
|
|
bitfld.byte 0x01 5.--6. " FILTE ,Digital filter on external pin" "Disabled,Filter posedge,Filter negedge,Filter any edge"
|
|
bitfld.byte 0x01 0.--3. " FILTSEL ,Filter pin select" "LLWU_P0,,,LLWU_P3,LLWU_P4,LLWU_P5,LLWU_P6,LLWU_P7,LLWU_P8,LLWU_P9,LLWU_P10,LLWU_P11,LLWU_P12,LLWU_P13,LLWU_P14,LLWU_P15"
|
|
elif cpuis("MK02*LF*")
|
|
group.byte 0x08++0x01
|
|
line.byte 0x00 "FILT1,LLWU Pin Filter 1 Register"
|
|
eventfld.byte 0x00 7. " FILTF ,Filter detect flag" "No wakeup,Wakeup"
|
|
bitfld.byte 0x00 5.--6. " FILTE ,Digital filter on external pin" "Disabled,Filter posedge,Filter negedge,Filter any edge"
|
|
bitfld.byte 0x00 0.--3. " FILTSEL ,Filter pin select" ",,,LLWU_P3,,LLWU_P5,LLWU_P6,LLWU_P7,LLWU_P8,LLWU_P9,LLWU_P10,,LLWU_P12,LLWU_P13,LLWU_P14,LLWU_P15"
|
|
line.byte 0x01 "FILT2,LLWU Pin Filter 2 Register"
|
|
eventfld.byte 0x01 7. " FILTF ,Filter detect flag" "No wakeup,Wakeup"
|
|
bitfld.byte 0x01 5.--6. " FILTE ,Digital filter on external pin" "Disabled,Filter posedge,Filter negedge,Filter any edge"
|
|
bitfld.byte 0x01 0.--3. " FILTSEL ,Filter pin select" ",,,LLWU_P3,,LLWU_P5,LLWU_P6,LLWU_P7,LLWU_P8,LLWU_P9,LLWU_P10,,LLWU_P12,LLWU_P13,LLWU_P14,LLWU_P15"
|
|
elif cpuis("MK02*FM*")
|
|
group.byte 0x08++0x01
|
|
line.byte 0x00 "FILT1,LLWU Pin Filter 1 Register"
|
|
eventfld.byte 0x00 7. " FILTF ,Filter detect flag" "No wakeup,Wakeup"
|
|
bitfld.byte 0x00 5.--6. " FILTE ,Digital filter on external pin" "Disabled,Filter posedge,Filter negedge,Filter any edge"
|
|
bitfld.byte 0x00 0.--3. " FILTSEL ,Filter pin select" ",,,LLWU_P3,,LLWU_P5,LLWU_P6,LLWU_P7,LLWU_P8,LLWU_P9,LLWU_P10,,,,LLWU_P14,LLWU_P15"
|
|
line.byte 0x01 "FILT2,LLWU Pin Filter 2 Register"
|
|
eventfld.byte 0x01 7. " FILTF ,Filter detect flag" "No wakeup,Wakeup"
|
|
bitfld.byte 0x01 5.--6. " FILTE ,Digital filter on external pin" "Disabled,Filter posedge,Filter negedge,Filter any edge"
|
|
bitfld.byte 0x01 0.--3. " FILTSEL ,Filter pin select" ",,,LLWU_P3,,LLWU_P5,LLWU_P6,LLWU_P7,LLWU_P8,LLWU_P9,LLWU_P10,,,,LLWU_P14,LLWU_P15"
|
|
else
|
|
group.byte 0x08++0x01
|
|
line.byte 0x00 "FILT1,LLWU Pin Filter 1 Register"
|
|
eventfld.byte 0x00 7. " FILTF ,Filter detect flag" "No wakeup,Wakeup"
|
|
bitfld.byte 0x00 5.--6. " FILTE ,Digital filter on external pin" "Disabled,Filter posedge,Filter negedge,Filter any edge"
|
|
sif cpuis("MK22FN1M0VLH10")||cpuis("MK22FX512AVLH12*")||cpuis("MK22FN512VMP12")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN256VMP12")||cpuis("MK22FN128CAH12R")||cpuis("MK22FN1M0AVLH12")||cpuis("MK22FN256CAH12R")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN128VLH10R")
|
|
bitfld.byte 0x00 0.--3. " FILTSEL ,Filter pin select" "LLWU_P0,,,LLWU_P3,LLWU_P4,LLWU_P5,LLWU_P6,LLWU_P7,LLWU_P8,LLWU_P9,LLWU_P10,LLWU_P11,LLWU_P12,LLWU_P13,LLWU_P14,LLWU_P15"
|
|
else
|
|
bitfld.byte 0x00 0.--3. " FILTSEL ,Filter pin select" "LLWU_P0,LLWU_P1,LLWU_P2,LLWU_P3,LLWU_P4,LLWU_P5,LLWU_P6,LLWU_P7,LLWU_P8,LLWU_P9,LLWU_P10,LLWU_P11,LLWU_P12,LLWU_P13,LLWU_P14,LLWU_P15"
|
|
endif
|
|
line.byte 0x01 "FILT2,LLWU Pin Filter 2 Register"
|
|
eventfld.byte 0x01 7. " FILTF ,Filter detect flag" "No wakeup,Wakeup"
|
|
bitfld.byte 0x01 5.--6. " FILTE ,Digital filter on external pin" "Disabled,Filter posedge,Filter negedge,Filter any edge"
|
|
sif cpuis("MK22FN1M0VLH10")||cpuis("MK22FX512AVLH12*")||cpuis("MK22FN512VMP12")||cpuis("MK22FN512VLH12*")||cpuis("MK22FN256VMP12")||cpuis("MK22FN128CAH12R")||cpuis("MK22FN1M0AVLH12")||cpuis("MK22FN256CAH12R")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN128VLH10R")
|
|
bitfld.byte 0x01 0.--3. " FILTSEL ,Filter pin select" "LLWU_P0,,,LLWU_P3,LLWU_P4,LLWU_P5,LLWU_P6,LLWU_P7,LLWU_P8,LLWU_P9,LLWU_P10,LLWU_P11,LLWU_P12,LLWU_P13,LLWU_P14,LLWU_P15"
|
|
else
|
|
bitfld.byte 0x01 0.--3. " FILTSEL ,Filter pin select" "LLWU_P0,LLWU_P1,LLWU_P2,LLWU_P3,LLWU_P4,LLWU_P5,LLWU_P6,LLWU_P7,LLWU_P8,LLWU_P9,LLWU_P10,LLWU_P11,LLWU_P12,LLWU_P13,LLWU_P14,LLWU_P15"
|
|
endif
|
|
sif !cpuis("MK22FN256*")&&!cpuis("MK22FN128*")&&!cpuis("MK22FN512CBP12R")&&!cpuis("MK22FN512CAP12R")&&!cpuis("KK22FN256CAP12R")&&!cpuis("KK22FN512CBP12R")&&!cpuis("MK22FN512V??12*")&&!cpuis("KK22FN128CAH12R")&&!cpuis("KK22FN256CAH12R")
|
|
group.byte 0x0A++0x00
|
|
line.byte 0x00 "RST,LLWU Reset Enable Register"
|
|
bitfld.byte 0x00 1. " LLRSTE ,Low-leakage mode RESET enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " RSTFILT ,Digital filter on RESET pin" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "MCM (Miscellaneous Control Module)"
|
|
base ad:0xE0080000
|
|
width 8.
|
|
rgroup.word 0x08++0x03
|
|
line.word 0x00 "PLASC,Crossbar Switch (AXBS) Slave Configuration"
|
|
bitfld.word 0x00 7. " ASC[7] ,Connection to the crossbar switch's slave input port 7" "Not connected,Connected"
|
|
bitfld.word 0x00 6. " [6] ,Connection to the crossbar switch's slave input port 6" "Not connected,Connected"
|
|
bitfld.word 0x00 5. " [5] ,Connection to the crossbar switch's slave input port 5" "Not connected,Connected"
|
|
bitfld.word 0x00 4. " [4] ,Connection to the crossbar switch's slave input port 4" "Not connected,Connected"
|
|
newline
|
|
bitfld.word 0x00 3. " [3] ,Connection to the crossbar switch's slave input port 3" "Not connected,Connected"
|
|
bitfld.word 0x00 2. " [2] ,Connection to the crossbar switch's slave input port 2" "Not connected,Connected"
|
|
bitfld.word 0x00 1. " [1] ,Connection to the crossbar switch's slave input port 1" "Not connected,Connected"
|
|
bitfld.word 0x00 0. " [0] ,Connection to the crossbar switch's slave input port 0" "Not connected,Connected"
|
|
line.word 0x02 "PLAMC,Crossbar Switch (AXBS) Master Configuration"
|
|
bitfld.word 0x02 7. " AMC[7] ,Connection to the AXBS master input port 7" "Not connected,Connected"
|
|
bitfld.word 0x02 6. " [6] ,Connection to the AXBS master input port 6" "Not connected,Connected"
|
|
bitfld.word 0x02 5. " [5] ,Connection to the AXBS master input port 5" "Not connected,Connected"
|
|
bitfld.word 0x02 4. " [4] ,Connection to the AXBS master input port 4" "Not connected,Connected"
|
|
newline
|
|
bitfld.word 0x02 3. " [3] ,Connection to the AXBS master input port 3" "Not connected,Connected"
|
|
bitfld.word 0x02 2. " [2] ,Connection to the AXBS master input port 2" "Not connected,Connected"
|
|
bitfld.word 0x02 1. " [1] ,Connection to the AXBS master input port 1" "Not connected,Connected"
|
|
bitfld.word 0x02 0. " [0] ,Connection to the AXBS master input port 0" "Not connected,Connected"
|
|
newline
|
|
sif cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("MK30DX256VLL7R")
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CR,Control Register"
|
|
bitfld.long 0x00 30. " SRAMLWP ,SRAM_L write protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28.--29. " SRAMLAP ,SRAM_L arbitration priority" "Round robin,Special round robin,Processor highest,Backdoor highest"
|
|
bitfld.long 0x00 26. " SRAMUWP ,SRAM_U write protect" "Not protected,Protected"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " SRAMUAP ,SRAM_U arbitration priority" "Round robin,Special round robin,Processor highest,Backdoor highest"
|
|
elif (cpuis("MK10DN512ZV??10*")||cpuis("MK10DX256ZV??10*")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DX256ZVLQ10")||cpuis("MK30DN512ZVLQ10R"))||cpuis("MK40D*Z*10")||cpuis("MK50DN512ZCLL10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DX256ZCLQ10")||cpuis("MK51DN512ZCLL10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")||cpuis("MK60FN1M0VLQ15")||cpuis("MK60DN512ZCAB10R")
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "SRAMAP,SRAM Arbitration And Protection Register"
|
|
bitfld.long 0x00 30. " SRAMLWP ,SRAM_L write protect" "Not protected,Protected"
|
|
bitfld.long 0x00 28.--29. " SRAMLAP ,SRAM_L arbitration priority" "Round robin,Special round robin,Processor highest,Backdoor highest"
|
|
bitfld.long 0x00 26. " SRAMUWP ,SRAM_U write protect" "Not protected,Protected"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " SRAMUAP ,SRAM_U arbitration priority" "Round robin,Special round robin,Processor highest,Backdoor highest"
|
|
elif cpuis("MK10D*7")||cpuis("MK10D*10")||cpuis("MK10F*12")||cpuis("MK30D*")||cpuis("MK40D*")||cpuis("MK5?D*")||cpuis("MK6*")||cpuis("MK70*")
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PLACR,Platform Control Register"
|
|
bitfld.long 0x00 30. " SRAMLWP ,SRAM_L write protect" "Disabled,Enabled"
|
|
bitfld.long 0x00 28.--29. " SRAMLAP ,SRAM_L arbitration priority" "Round robin,Special round robin,Fixed priority (Hi),Fixed priority (Low)"
|
|
bitfld.long 0x00 26. " SRAMUWP ,SRAM_U write protect" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " SRAMUAP ,SRAM_U arbitration priority" "Round robin,Special round robin,Fixed priority (Hi),Fixed priority (Low)"
|
|
sif cpuis("MK61*VMJ*")||cpuis("MK70*")
|
|
newline
|
|
bitfld.long 0x00 20.--21. " DDRSIZE ,DDR address size translation" "Disabled,128MB,256MB,512MB"
|
|
endif
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PLACR,Platform Control Register"
|
|
bitfld.long 0x00 9. " ARB ,Arbitration select" "Fixed-priority,Round-robin"
|
|
endif
|
|
sif cpuis("MK02*")
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "ISCR,Interrupt Status And Control Register"
|
|
bitfld.long 0x00 31. " FIDCE ,FPU input denormal interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " FIXCE ,FPU inexact interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " FUFCE ,FPU underflow interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " FOFCE ,FPU overflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " FDZCE ,FPU divide-by-zero interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " FIOCE ,FPU invalid operation interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 15. " FIDC ,FPU input denormal interrupt status" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 12. " FIXC ,FPU inexact interrupt status" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 11. " FUFC ,FPU underflow interrupt status" "Not occurred,Occurred"
|
|
newline
|
|
rbitfld.long 0x00 10. " FOFC ,FPU overflow interrupt status" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 9. " FDZC ,FPU divide-by-zero interrupt status" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 8. " FIOC ,FPU invalid operation interrupt status" "Not occurred,Occurred"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CPO,Compute Operation Control Register"
|
|
bitfld.long 0x00 2. " CPOWOI ,Compute operation wakeup on interrupt" "No effect,Clr CPOREQ on int."
|
|
rbitfld.long 0x00 1. " CPOACK ,Compute operation acknowledge" "Completed,Not completed"
|
|
bitfld.long 0x00 0. " CPOREQ ,Compute operation request" "Not requested,Requested"
|
|
elif cpuis("MK?0D*10")||cpuis("MK10F*12")||cpuis("MK5?D*10")||cpuis("MK6*")||cpuis("MK70*")||cpuis("MK10DN512ZVLK10R")||cpuis("MK10DN512ZVLL10R")||cpuis("MK10DX256ZVLQ10R")||cpuis("MK30DN512ZVLQ10R")
|
|
group.long 0x10++0x0B
|
|
line.long 0x00 "ISR,Interrupt Status Register"
|
|
sif cpuis("MK10F*12")||cpuis("MK6?F*")||cpuis("MK70*")
|
|
bitfld.long 0x00 31. " FIDCE ,FPU input denormal interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " FIXCE ,FPU inexact interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " FUFCE ,FPU underflow interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " FOFCE ,FPU overflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " FDZCE ,FPU divide-by-zero interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " FIOCE ,FPU invalid operation interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
sif !cpuis("MK63F*")&&!cpuis("MK64F*")&&!cpuis("MK65F*")&&!cpuis("MK66F*")
|
|
bitfld.long 0x00 20. " CWBEE ,Cache write buffer error enable" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
rbitfld.long 0x00 15. " FIDC ,FPU input denormal interrupt status" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 12. " FIXC ,FPU inexact interrupt status" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 11. " FUFC ,FPU underflow interrupt status" "Not occurred,Occurred"
|
|
newline
|
|
rbitfld.long 0x00 10. " FOFC ,FPU overflow interrupt status" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 9. " FDZC ,FPU divide-by-zero interrupt status" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 8. " FIOC ,FPU invalid operation interrupt status" "Not occurred,Occurred"
|
|
newline
|
|
sif !cpuis("MK63F*")&&!cpuis("MK64F*")&&!cpuis("MK65F*")&&!cpuis("MK66F*")
|
|
eventfld.long 0x00 4. " CWBER ,Cache write buffer error status" "Not occurred,Occurred"
|
|
newline
|
|
endif
|
|
endif
|
|
sif !cpuis("MK10DN512ZV??10*")&&!cpuis("MK10DX256ZV??10*")&&!cpuis("MK60*AB10")&&!cpuis("MK30DN512ZVLK10")&&!cpuis("MK30DN512ZVLQ10")&&!cpuis("MK30DX256ZVLQ10")&&!cpuis("MK30DN512ZVLQ10R")&&!cpuis("MK60DX256ZVMC10")&&!cpuis("MK60DN512ZVMC10")&&!cpuis("MK60DN256ZVLQ10")&&!cpuis("MK60DN512ZVLQ10")&&!cpuis("MK60DN512ZVMD10")&&!cpuis("MK60DX256ZVLQ10")&&!cpuis("MK60DX256ZVMD10")&&!cpuis("MK60DN512ZVLQ10R")&&!cpuis("MK60DX256ZVLL10")&&!cpuis("MK60DN512ZCAB10R")&&cpu()!=("MK50DN512ZCLL10")&&cpu()!=("MK50DX256ZCLL10")&&cpu()!=("MK50DN512ZCLQ10")&&cpu()!=("MK50DX256ZCLQ10")&&cpu()!=("MK51DN512ZCLL10")&&cpu()!=("MK51DN512ZCMC10")&&cpu()!=("MK51DX256ZCMC10")&&cpu()!=("MK51DN256ZCMD10")&&cpu()!=("MK51DN512ZCLQ10")&&cpu()!=("MK52DN512ZCLQ10")&&cpu()!=("MK52DN512ZCMD10")&&cpu()!=("MK53DN512ZCLQ10")&&cpu()!=("MK53DN512ZCMD10")&&cpu()!=("MK53DX256ZCLQ10")&&!cpuis("MK40D*Z*10")
|
|
rbitfld.long 0x00 3. " DHREQ ,Debug halt request indicator" "Not occurred,Occurred"
|
|
newline
|
|
endif
|
|
eventfld.long 0x00 2. " NMI ,Non-maskable interrupt pending" "Not pending,Pending"
|
|
eventfld.long 0x00 1. " IRQ ,Normal interrupt pending" "Not pending,Pending"
|
|
line.long 0x04 "ETBCC,ETB Counter Control Register"
|
|
bitfld.long 0x04 5. " ITDIS ,ITM-to-TPIU disable" "No,Yes"
|
|
bitfld.long 0x04 4. " ETDIS ,ETM-to-TPIU disable" "No,Yes"
|
|
bitfld.long 0x04 3. " RLRQ ,Reload request clear" "No effect,Cleared"
|
|
newline
|
|
bitfld.long 0x04 1.--2. " RSPT ,Response type when the ETB count expires" "No response,Normal interrupt,NMI,Debug"
|
|
bitfld.long 0x04 0. " CNTEN ,Counter enable" "Disabled,Enabled"
|
|
line.long 0x08 "ETBRL,ETB Reload Register"
|
|
hexmask.long.word 0x08 0.--10. 1. " RELOAD ,Byte count reload value"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "ETBCNT,ETB Counter Value Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " COUNTER ,Byte count counter value"
|
|
sif !cpuis("MK63FN1M0VLQ12R")
|
|
sif cpuis("MK10F*12")||cpuis("MK6?F*")||cpuis("MK70*")
|
|
rgroup.long 0x20++0x0B
|
|
line.long 0x00 "FADR,Fault Address Register"
|
|
line.long 0x04 "FATR,Fault Attributes Register"
|
|
bitfld.long 0x04 31. " BEOVR ,Bus error overrun" "Not occurred,Occurred"
|
|
bitfld.long 0x04 8.--11. " BEMN ,Bus error master number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 7. " BEWT ,Bus error write" "Read,Write"
|
|
newline
|
|
bitfld.long 0x04 4.--5. " BESZ ,Bus error size" "8-bit,16-bit,32-bit,?..."
|
|
bitfld.long 0x04 1. " BEMD ,Bus error privilege level" "User mode,Supervisor mode"
|
|
bitfld.long 0x04 0. " BEDA ,Bus error access type" "Instruction,Data"
|
|
line.long 0x08 "FDR,Fault Data Register"
|
|
endif
|
|
endif
|
|
sif !cpuis("MK10DN512ZV??10*")&&!cpuis("MK10DX256ZV??10*")&&!cpuis("MK60*AB10")&&!cpuis("MK30DN512ZVLK10")&&!cpuis("MK30DN512ZVLQ10")&&!cpuis("MK30DX256ZVLQ10")&&!cpuis("MK30DN512ZVLQ10R")&&cpu()!=("MK50DN512ZCLL10")&&cpu()!=("MK50DX256ZCLL10")&&cpu()!=("MK50DN512ZCLQ10")&&cpu()!=("MK50DX256ZCLQ10")&&cpu()!=("MK51DN512ZCLL10")&&cpu()!=("MK51DN512ZCMC10")&&cpu()!=("MK51DX256ZCMC10")&&cpu()!=("MK51DN256ZCMD10")&&cpu()!=("MK51DN512ZCLQ10")&&cpu()!=("MK52DN512ZCLQ10")&&cpu()!=("MK52DN512ZCMD10")&&cpu()!=("MK53DN512ZCLQ10")&&cpu()!=("MK53DN512ZCMD10")&&cpu()!=("MK53DX256ZCLQ10")&&!cpuis("MK40D*Z*10")&&!cpuis("MK60DX256ZVMC10")&&!cpuis("MK60DN512ZVMC10")&&!cpuis("MK60DN256ZVLQ10")&&!cpuis("MK60DN512ZVLQ10")&&!cpuis("MK60DN512ZVMD10")&&!cpuis("MK60DX256ZVLQ10")&&!cpuis("MK60DX256ZVMD10")&&!cpuis("MK60DN512ZVLQ10R")&&!cpuis("MK60DX256ZVLL10")
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "PID,Process ID Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PID ,M0_PID and M1_PID for MPU"
|
|
endif
|
|
sif cpuis("MK66FN2M0VLQ18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK65FN2M0CAC18R")
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CPO,Compute Operation Control Register"
|
|
bitfld.long 0x00 2. " CPOWOI ,Compute operation wakeup on interrupt" "No effect,Clr CPOREQ on int."
|
|
rbitfld.long 0x00 1. " CPOACK ,Compute operation acknowledge" "Completed,Not completed"
|
|
bitfld.long 0x00 0. " CPOREQ ,Compute operation request" "Not requested,Requested"
|
|
endif
|
|
elif cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("MK60FN1M0VLQ15")
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "ISCR,Interrupt Status Register"
|
|
bitfld.long 0x00 31. " FIDCE ,FPU input denormal interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " FIXCE ,FPU inexact interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " FUFCE ,FPU underflow interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " FOFCE ,FPU overflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " FDZCE ,FPU divide-by-zero interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " FIOCE ,FPU invalid operation interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 15. " FIDC ,FPU input denormal interrupt status" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 12. " FIXC ,FPU inexact interrupt status" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 11. " FUFC ,FPU underflow interrupt status" "Not occurred,Occurred"
|
|
newline
|
|
rbitfld.long 0x00 10. " FOFC ,FPU overflow interrupt status" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 9. " FDZC ,FPU divide-by-zero interrupt status" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 8. " FIOC ,FPU invalid operation interrupt status" "Not occurred,Occurred"
|
|
sif !cpuis("MK60FN1M0VLQ15")
|
|
newline
|
|
rbitfld.long 0x00 6. " WABORTS_OVERRUN ,WABORTS assertion overrun" "No overrun,Overrun"
|
|
rbitfld.long 0x00 5. " WABORTS ,WABORTS imprecise write fault from the TCM backdoor" "Not occurred,Occurred"
|
|
else
|
|
newline
|
|
eventfld.long 0x00 4. " CWBER ,Cache write buffer error status" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 3. " DHREQ ,Debug halt request indicator" "Not requested,Initiated request"
|
|
eventfld.long 0x00 2. " NMI ,Not maskable interrupt pending" "No pending,Pending"
|
|
newline
|
|
eventfld.long 0x00 1. " IRQ ,Normal interrupt pending" "No pending,Pending"
|
|
endif
|
|
sif cpuis("MK60FN1M0VLQ15")
|
|
group.long 0x14++0x0B
|
|
line.long 0x00 "ETBCC,ETB Counter Control Register"
|
|
bitfld.long 0x00 5. " ITDIS ,ITM-to-TPIU disable" "No,Yes"
|
|
bitfld.long 0x00 4. " ETDIS ,ETM-to-TPIU disable" "No,Yes"
|
|
bitfld.long 0x00 3. " RLRQ ,Reload request clear" "No effect,Cleared"
|
|
newline
|
|
bitfld.long 0x00 1.--2. " RSPT ,Response type when the ETB count expires" "No response,Normal interrupt,NMI,Debug"
|
|
bitfld.long 0x00 0. " CNTEN ,Counter enable" "Disabled,Enabled"
|
|
line.long 0x04 "ETBRL,ETB Reload Register"
|
|
hexmask.long.word 0x04 0.--10. 1. " RELOAD ,Byte count reload value"
|
|
line.long 0x08 "ETBCNT,ETB Counter Value Register"
|
|
hexmask.long.word 0x08 0.--10. 1. " COUNTER ,Byte count counter value"
|
|
endif
|
|
rgroup.long 0x20++0x0B
|
|
line.long 0x00 "FADR,Fault Address Register"
|
|
line.long 0x04 "FATR,Fault Attributes Register"
|
|
bitfld.long 0x04 31. " BEOVR ,Bus error overrun" "Not occurred,Occurred"
|
|
bitfld.long 0x04 8.--11. " BEMN ,Bus error master number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 7. " BEWT ,Bus error write" "Read,Write"
|
|
newline
|
|
bitfld.long 0x04 4.--5. " BESZ ,Bus error size" "8-bit,16-bit,32-bit,?..."
|
|
bitfld.long 0x04 1. " BEMD ,Bus error privilege level" "User mode,Supervisor mode"
|
|
bitfld.long 0x04 0. " BEDA ,Bus error access type" "Instruction,Data"
|
|
line.long 0x08 "FDR,Fault Data Register"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "PID,Process ID Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PID ,M0_PID and M1_PID for MPU"
|
|
sif !cpuis("MK60FN1M0VLQ15")
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CPO,Compute Operation Control Register"
|
|
bitfld.long 0x00 2. " CPOWOI ,Compute operation wakeup on interrupt" "No effect,Clr CPOREQ on int."
|
|
rbitfld.long 0x00 1. " CPOACK ,Compute operation acknowledge" "Completed,Not completed"
|
|
bitfld.long 0x00 0. " CPOREQ ,Compute operation request" "Not requested,Requested"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "DMAMUX (Direct Memory Access Multiplexer)"
|
|
base ad:0x40021000
|
|
width 9.
|
|
if (((per.b(ad:0x40021000+0x0))&0x80)==0x80)
|
|
group.byte 0x0++0x00
|
|
line.byte 0x00 "CHCFG_0,Channel 0 Configuration Register"
|
|
bitfld.byte 0x00 7. " ENBL ,DMA channel 0 enable" "Disabled,Enabled"
|
|
rbitfld.byte 0x00 6. " TRIG ,DMA channel 0 trigger enable" "Disabled,Enabled"
|
|
rbitfld.byte 0x00 0.--5. " SOURCE ,DMA channel 0 source" "Channel disabled,,UART0 Rx,UART0 Tx,UART1 Rx,UART1 Tx,,,,,,,,,SPI0 Rx,SPI0 Tx,,,I2C0,,FTM0 CH_0,FTM0 CH_1,FTM0 CH_2,FTM0 CH_3,FTM0 CH_4,FTM0 CH_5,,,FTM1 CH_0,FTM1 CH_1,FTM2 CH_0,FTM2 CH_1,,,,,,,,,ADC0,,CMP0,CMP1,,DAC0,,,PDB,Port A,Port B,Port C,Port D,Port E,,,,,,,Always enabled,Always enabled,Always enabled,Always enabled"
|
|
else
|
|
group.byte 0x0++0x00
|
|
line.byte 0x00 "CHCFG_0,Channel 0 Configuration Register"
|
|
bitfld.byte 0x00 7. " ENBL ,DMA channel 0 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " TRIG ,DMA channel 0 trigger enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--5. " SOURCE ,DMA channel 0 source" "Channel disabled,,UART0 Rx,UART0 Tx,UART1 Rx,UART1 Tx,,,,,,,,,SPI0 Rx,SPI0 Tx,,,I2C0,,FTM0 CH_0,FTM0 CH_1,FTM0 CH_2,FTM0 CH_3,FTM0 CH_4,FTM0 CH_5,,,FTM1 CH_0,FTM1 CH_1,FTM2 CH_0,FTM2 CH_1,,,,,,,,,ADC0,,CMP0,CMP1,,DAC0,,,PDB,Port A,Port B,Port C,Port D,Port E,,,,,,,Always enabled,Always enabled,Always enabled,Always enabled"
|
|
endif
|
|
if (((per.b(ad:0x40021000+0x1))&0x80)==0x80)
|
|
group.byte 0x1++0x00
|
|
line.byte 0x00 "CHCFG_1,Channel 1 Configuration Register"
|
|
bitfld.byte 0x00 7. " ENBL ,DMA channel 1 enable" "Disabled,Enabled"
|
|
rbitfld.byte 0x00 6. " TRIG ,DMA channel 1 trigger enable" "Disabled,Enabled"
|
|
rbitfld.byte 0x00 0.--5. " SOURCE ,DMA channel 1 source" "Channel disabled,,UART0 Rx,UART0 Tx,UART1 Rx,UART1 Tx,,,,,,,,,SPI0 Rx,SPI0 Tx,,,I2C0,,FTM0 CH_0,FTM0 CH_1,FTM0 CH_2,FTM0 CH_3,FTM0 CH_4,FTM0 CH_5,,,FTM1 CH_0,FTM1 CH_1,FTM2 CH_0,FTM2 CH_1,,,,,,,,,ADC0,,CMP0,CMP1,,DAC0,,,PDB,Port A,Port B,Port C,Port D,Port E,,,,,,,Always enabled,Always enabled,Always enabled,Always enabled"
|
|
else
|
|
group.byte 0x1++0x00
|
|
line.byte 0x00 "CHCFG_1,Channel 1 Configuration Register"
|
|
bitfld.byte 0x00 7. " ENBL ,DMA channel 1 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " TRIG ,DMA channel 1 trigger enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--5. " SOURCE ,DMA channel 1 source" "Channel disabled,,UART0 Rx,UART0 Tx,UART1 Rx,UART1 Tx,,,,,,,,,SPI0 Rx,SPI0 Tx,,,I2C0,,FTM0 CH_0,FTM0 CH_1,FTM0 CH_2,FTM0 CH_3,FTM0 CH_4,FTM0 CH_5,,,FTM1 CH_0,FTM1 CH_1,FTM2 CH_0,FTM2 CH_1,,,,,,,,,ADC0,,CMP0,CMP1,,DAC0,,,PDB,Port A,Port B,Port C,Port D,Port E,,,,,,,Always enabled,Always enabled,Always enabled,Always enabled"
|
|
endif
|
|
if (((per.b(ad:0x40021000+0x2))&0x80)==0x80)
|
|
group.byte 0x2++0x00
|
|
line.byte 0x00 "CHCFG_2,Channel 2 Configuration Register"
|
|
bitfld.byte 0x00 7. " ENBL ,DMA channel 2 enable" "Disabled,Enabled"
|
|
rbitfld.byte 0x00 6. " TRIG ,DMA channel 2 trigger enable" "Disabled,Enabled"
|
|
rbitfld.byte 0x00 0.--5. " SOURCE ,DMA channel 2 source" "Channel disabled,,UART0 Rx,UART0 Tx,UART1 Rx,UART1 Tx,,,,,,,,,SPI0 Rx,SPI0 Tx,,,I2C0,,FTM0 CH_0,FTM0 CH_1,FTM0 CH_2,FTM0 CH_3,FTM0 CH_4,FTM0 CH_5,,,FTM1 CH_0,FTM1 CH_1,FTM2 CH_0,FTM2 CH_1,,,,,,,,,ADC0,,CMP0,CMP1,,DAC0,,,PDB,Port A,Port B,Port C,Port D,Port E,,,,,,,Always enabled,Always enabled,Always enabled,Always enabled"
|
|
else
|
|
group.byte 0x2++0x00
|
|
line.byte 0x00 "CHCFG_2,Channel 2 Configuration Register"
|
|
bitfld.byte 0x00 7. " ENBL ,DMA channel 2 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " TRIG ,DMA channel 2 trigger enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--5. " SOURCE ,DMA channel 2 source" "Channel disabled,,UART0 Rx,UART0 Tx,UART1 Rx,UART1 Tx,,,,,,,,,SPI0 Rx,SPI0 Tx,,,I2C0,,FTM0 CH_0,FTM0 CH_1,FTM0 CH_2,FTM0 CH_3,FTM0 CH_4,FTM0 CH_5,,,FTM1 CH_0,FTM1 CH_1,FTM2 CH_0,FTM2 CH_1,,,,,,,,,ADC0,,CMP0,CMP1,,DAC0,,,PDB,Port A,Port B,Port C,Port D,Port E,,,,,,,Always enabled,Always enabled,Always enabled,Always enabled"
|
|
endif
|
|
if (((per.b(ad:0x40021000+0x3))&0x80)==0x80)
|
|
group.byte 0x3++0x00
|
|
line.byte 0x00 "CHCFG_3,Channel 3 Configuration Register"
|
|
bitfld.byte 0x00 7. " ENBL ,DMA channel 3 enable" "Disabled,Enabled"
|
|
rbitfld.byte 0x00 6. " TRIG ,DMA channel 3 trigger enable" "Disabled,Enabled"
|
|
rbitfld.byte 0x00 0.--5. " SOURCE ,DMA channel 3 source" "Channel disabled,,UART0 Rx,UART0 Tx,UART1 Rx,UART1 Tx,,,,,,,,,SPI0 Rx,SPI0 Tx,,,I2C0,,FTM0 CH_0,FTM0 CH_1,FTM0 CH_2,FTM0 CH_3,FTM0 CH_4,FTM0 CH_5,,,FTM1 CH_0,FTM1 CH_1,FTM2 CH_0,FTM2 CH_1,,,,,,,,,ADC0,,CMP0,CMP1,,DAC0,,,PDB,Port A,Port B,Port C,Port D,Port E,,,,,,,Always enabled,Always enabled,Always enabled,Always enabled"
|
|
else
|
|
group.byte 0x3++0x00
|
|
line.byte 0x00 "CHCFG_3,Channel 3 Configuration Register"
|
|
bitfld.byte 0x00 7. " ENBL ,DMA channel 3 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " TRIG ,DMA channel 3 trigger enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--5. " SOURCE ,DMA channel 3 source" "Channel disabled,,UART0 Rx,UART0 Tx,UART1 Rx,UART1 Tx,,,,,,,,,SPI0 Rx,SPI0 Tx,,,I2C0,,FTM0 CH_0,FTM0 CH_1,FTM0 CH_2,FTM0 CH_3,FTM0 CH_4,FTM0 CH_5,,,FTM1 CH_0,FTM1 CH_1,FTM2 CH_0,FTM2 CH_1,,,,,,,,,ADC0,,CMP0,CMP1,,DAC0,,,PDB,Port A,Port B,Port C,Port D,Port E,,,,,,,Always enabled,Always enabled,Always enabled,Always enabled"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "eDMA (Enhanced Direct Memory Access)"
|
|
base ad:0x40008000
|
|
tree "Edma Control And Status Registers"
|
|
width 6.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CR,Control Register"
|
|
rbitfld.long 0x00 31. " ACTIVE ,DMA active status" "Idle,Active"
|
|
bitfld.long 0x00 17. " CX ,Cancel transfer" "Not canceled,Canceled"
|
|
bitfld.long 0x00 16. " ECX ,Error cancel transfer" "Not canceled,Canceled"
|
|
bitfld.long 0x00 7. " EMLM ,Enable minor loop mapping" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CLM ,Continuous link mode" "Through ch arbit.,Not through ch arbit."
|
|
bitfld.long 0x00 5. " HALT ,Halt DMA operations" "Not halted,Halted"
|
|
bitfld.long 0x00 4. " HOE ,Halt on error" "Not halted,Halted"
|
|
bitfld.long 0x00 2. " ERCA ,Enable round robin channel arbitration" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EDBG ,Enable debug" "Disabled,Enabled"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ES,Error Status Register"
|
|
bitfld.long 0x00 31. " VLD ,Logical OR of all ERR status bits" "Not occurred,Occurred"
|
|
bitfld.long 0x00 16. " ECX ,Transfer cancelled" "Not cancelled,Cancelled"
|
|
bitfld.long 0x00 14. " CPE ,Channel priority error" "No error,Error"
|
|
sif cpuis("MKL28*")||cpuis("MKL82*")
|
|
bitfld.long 0x00 8.--10. " ERRCHN ,Error channel number or cancelled channel number" "0,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.long 0x00 8.--9. " ERRCHN ,Error channel number or cancelled channel number" "0,1,2,3"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 7. " SAE ,Source address error" "No error,Error"
|
|
bitfld.long 0x00 6. " SOE ,Source offset error" "No error,Error"
|
|
bitfld.long 0x00 5. " DAE ,Destination address error" "No error,Error"
|
|
bitfld.long 0x00 4. " DOE ,Destination offset error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " NCE ,NBYTES/CITER configuration error" "No error,Error"
|
|
bitfld.long 0x00 2. " SGE ,Scatter/gather configuration error" "No error,Error"
|
|
bitfld.long 0x00 1. " SBE ,Source bus error" "No error,Error"
|
|
bitfld.long 0x00 0. " DBE ,Destination bus error" "No error,Error"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "ERQ,Enable Request Register"
|
|
sif cpuis("MKL28*")||cpuis("MKL82*")
|
|
bitfld.long 0x00 7. " ERQ7 ,Enable DMA request 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " ERQ6 ,Enable DMA request 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ERQ5 ,Enable DMA request 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " ERQ4 ,Enable DMA request 4" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 3. " ERQ3 ,Enable DMA request 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ERQ2 ,Enable DMA request 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ERQ1 ,Enable DMA request 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ERQ0 ,Enable DMA request 0" "Disabled,Enabled"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "EEI,Enable Error Interrupt Register"
|
|
sif cpuis("MKL28*")||cpuis("MKL82*")
|
|
bitfld.long 0x00 7. " EEI7 ,Enable error interrupt 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " EEI6 ,Enable error interrupt 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EEI5 ,Enable error interrupt 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EEI4 ,Enable error interrupt 4" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 3. " EEI3 ,Enable error interrupt 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " EEI2 ,Enable error interrupt 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " EEI1 ,Enable error interrupt 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EEI0 ,Enable error interrupt 0" "Disabled,Enabled"
|
|
textline " "
|
|
width 6.
|
|
wgroup.byte 0x18++0x07
|
|
line.byte 0x00 "CEEI,Clear Enable Error Interrupt Register"
|
|
bitfld.byte 0x00 7. " NOP ,No operation bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " CAEE ,Clear all enable error interrupts" "CEEI only,All EEI"
|
|
sif cpuis("MKL28*")||cpuis("MKL82*")
|
|
bitfld.byte 0x00 2. " CEEI[2] ,Clear enable error interrupt 2 in EEI" "No effect,Clear"
|
|
endif
|
|
bitfld.byte 0x00 1. " CEEI[1] ,Clear enable error interrupt 1 in EEI" "No effect,Clear"
|
|
bitfld.byte 0x00 0. " CEEI[0] ,Clear enable error interrupt 0 in EEI" "No effect,Clear"
|
|
line.byte 0x01 "SEEI,Set Enable Error Interrupt Register"
|
|
bitfld.byte 0x01 7. " NOP ,No operation bit" "Disabled,Enabled"
|
|
bitfld.byte 0x01 6. " SAEE ,Sets all enable error interrupts" "SEEI only,All EEI"
|
|
sif cpuis("MKL28*")||cpuis("MKL82*")
|
|
bitfld.byte 0x01 2. " SEEI[2] ,Set enable error interrupt 2 in EEI" "No effect,Set"
|
|
endif
|
|
bitfld.byte 0x01 1. " SEEI[1] ,Set enable error interrupt 1 in EEI" "No effect,Set"
|
|
bitfld.byte 0x01 0. " SEEI[0] ,Set enable error interrupt 0 in EEI" "No effect,Set"
|
|
line.byte 0x02 "CERQ,Clear Enable Request Register"
|
|
bitfld.byte 0x02 7. " NOP ,No operation bit" "Disabled,Enabled"
|
|
bitfld.byte 0x02 6. " CAER ,Clear all enable requests" "CER only,ALL ER"
|
|
sif cpuis("MKL28*")||cpuis("MKL82*")
|
|
bitfld.byte 0x02 2. " CERQ[2] ,Clear enable request" "No effect,Clear"
|
|
endif
|
|
bitfld.byte 0x02 1. " CERQ[1] ,Clear enable request" "No effect,Clear"
|
|
bitfld.byte 0x02 0. " CERQ[0] ,Clear enable request" "No effect,Clear"
|
|
line.byte 0x03 "SERQ,Set Enable Request Register"
|
|
bitfld.byte 0x03 7. " NOP ,No operation bit" "Disabled,Enabled"
|
|
bitfld.byte 0x03 6. " SAER ,Set all enable requests" "SAER only,All ER"
|
|
sif cpuis("MKL28*")||cpuis("MKL82*")
|
|
bitfld.byte 0x03 2. " SERQ[2] ,Set enable request" "No effect,Set"
|
|
endif
|
|
bitfld.byte 0x03 1. " SERQ[1] ,Set enable request" "No effect,Set"
|
|
bitfld.byte 0x03 0. " SERQ[0] ,Set enable request" "No effect,Set"
|
|
line.byte 0x04 "CDNE,Clear DONE Status Bit Register"
|
|
bitfld.byte 0x04 7. " NOP ,No operation bit" "Disabled,Enabled"
|
|
bitfld.byte 0x04 6. " CADN ,Clear all DONE bits" "CADB only,All DB"
|
|
sif cpuis("MKL28*")||cpuis("MKL82*")
|
|
bitfld.byte 0x04 2. " CDNE[2] ,Clear DONE bit" "No effect,Clear"
|
|
endif
|
|
bitfld.byte 0x04 1. " CDNE[1] ,Clear DONE bit" "No effect,Clear"
|
|
bitfld.byte 0x04 0. " CDNE[0] ,Clear DONE bit" "No effect,Clear"
|
|
line.byte 0x05 "SSRT,Set START Bit Register"
|
|
bitfld.byte 0x05 7. " NOP ,No operation bit" "Disabled,Enabled"
|
|
bitfld.byte 0x05 6. " SAST ,Set all START bits" "SASB only,All SB"
|
|
sif cpuis("MKL28*")||cpuis("MKL82*")
|
|
bitfld.byte 0x05 2. " SSRT[2] ,Set START bit" "No effect,Clear"
|
|
endif
|
|
bitfld.byte 0x05 1. " SSRT[1] ,Set START bit" "No effect,Clear"
|
|
bitfld.byte 0x05 0. " SSRT[0] ,Set START bit" "No effect,Clear"
|
|
line.byte 0x06 "CERR,Clear Error Register"
|
|
bitfld.byte 0x06 7. " NOP ,No operation bit" "Disabled,Enabled"
|
|
bitfld.byte 0x06 6. " CAEI ,Clear all error indicators" "CAEI only,ALL EI"
|
|
sif cpuis("MKL28*")||cpuis("MKL82*")
|
|
bitfld.byte 0x06 2. " CERR[2] ,Clear error indicator" "No effect,Clear"
|
|
endif
|
|
bitfld.byte 0x06 1. " CERR[1] ,Clear error indicator" "No effect,Clear"
|
|
bitfld.byte 0x06 0. " CERR[0] ,Clear error indicator" "No effect,Clear"
|
|
line.byte 0x07 "CINT,Clear Interrupt Request Register"
|
|
bitfld.byte 0x07 7. " NOP ,No operation bit" "Disabled,Enabled"
|
|
bitfld.byte 0x07 6. " CAIR ,Clear all interrupt request" "CAIR only,All IR"
|
|
sif cpuis("MKL28*")||cpuis("MKL82*")
|
|
bitfld.byte 0x07 2. " CINT[2] ,Clear interrupt request" "No effect,Clear"
|
|
endif
|
|
bitfld.byte 0x07 1. " CINT[1] ,Clear interrupt request" "No effect,Clear"
|
|
bitfld.byte 0x07 0. " CINT[0] ,Clear interrupt request" "No effect,Clear"
|
|
textline " "
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "INT,Interrupt Request Register"
|
|
sif cpuis("MKL28*")||cpuis("MKL82*")
|
|
eventfld.long 0x00 7. " INT7 ,Interrupt request 7" "Not requested,Requested"
|
|
eventfld.long 0x00 6. " INT6 ,Interrupt request 6" "Not requested,Requested"
|
|
eventfld.long 0x00 5. " INT5 ,Interrupt request 5" "Not requested,Requested"
|
|
eventfld.long 0x00 4. " INT4 ,Interrupt request 4" "Not requested,Requested"
|
|
textline " "
|
|
endif
|
|
eventfld.long 0x00 3. " INT3 ,Interrupt request 3" "Not requested,Requested"
|
|
eventfld.long 0x00 2. " INT2 ,Interrupt request 2" "Not requested,Requested"
|
|
eventfld.long 0x00 1. " INT1 ,Interrupt request 1" "Not requested,Requested"
|
|
eventfld.long 0x00 0. " INT0 ,Interrupt request 0" "Not requested,Requested"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "ERR,Error Register"
|
|
sif cpuis("MKL28*")||cpuis("MKL82*")
|
|
eventfld.long 0x00 7. " ERR7 ,Error in channel 7" "No error,Error"
|
|
eventfld.long 0x00 6. " ERR6 ,Error in channel 6" "No error,Error"
|
|
eventfld.long 0x00 5. " ERR5 ,Error in channel 5" "No error,Error"
|
|
eventfld.long 0x00 4. " ERR4 ,Error in channel 4" "No error,Error"
|
|
textline " "
|
|
endif
|
|
eventfld.long 0x00 3. " ERR3 ,Error in channel 3" "No error,Error"
|
|
eventfld.long 0x00 2. " ERR2 ,Error in channel 2" "No error,Error"
|
|
eventfld.long 0x00 1. " ERR1 ,Error in channel 1" "No error,Error"
|
|
eventfld.long 0x00 0. " ERR0 ,Error in channel 0" "No error,Error"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "HRS,Hardware Request Status Register"
|
|
sif cpuis("MKL28*")||cpuis("MKL82*")
|
|
bitfld.long 0x00 7. " HRS7 ,Hardware request status for channel 7" "Not present,Present"
|
|
bitfld.long 0x00 6. " HRS6 ,Hardware request status for channel 6" "Not present,Present"
|
|
bitfld.long 0x00 5. " HRS5 ,Hardware request status for channel 5" "Not present,Present"
|
|
bitfld.long 0x00 4. " HRS4 ,Hardware request status for channel 4" "Not present,Present"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 3. " HRS3 ,Hardware request status for channel 3" "Not present,Present"
|
|
bitfld.long 0x00 2. " HRS2 ,Hardware request status for channel 2" "Not present,Present"
|
|
bitfld.long 0x00 1. " HRS1 ,Hardware request status for channel 1" "Not present,Present"
|
|
bitfld.long 0x00 0. " HRS0 ,Hardware request status for channel 0" "Not present,Present"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "EARS,Enable Asynchronous Request In Stop Register"
|
|
sif cpuis("MKL28*")||cpuis("MKL82*")
|
|
bitfld.long 0x00 7. " EDREQ_7 ,Enable asynchronous DMA request in stop for channel 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " EDREQ_6 ,Enable asynchronous DMA request in stop for channel 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EDREQ_5 ,Enable asynchronous DMA request in stop for channel 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EDREQ_4 ,Enable asynchronous DMA request in stop for channel 4" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 3. " EDREQ_3 ,Enable asynchronous DMA request in stop for channel 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " EDREQ_2 ,Enable asynchronous DMA request in stop for channel 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " EDREQ_1 ,Enable asynchronous DMA request in stop for channel 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EDREQ_0 ,Enable asynchronous DMA request in stop for channel 0" "Disabled,Enabled"
|
|
tree.end
|
|
tree "DMA Channel Priority Registers"
|
|
width 11.
|
|
sif cpuis("MKL28*")||cpuis("MKL82*")
|
|
group.byte (0x0+0x100)++0x00
|
|
line.byte 0x00 "DCHPRI_3,Channel 3 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel 3 preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable channel 3 preempt ability" "No,Yes"
|
|
bitfld.byte 0x00 0.--2. " CHPRI ,Channel 3 arbitration priority" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.byte (0x1+0x100)++0x00
|
|
line.byte 0x00 "DCHPRI_2,Channel 2 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel 2 preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable channel 2 preempt ability" "No,Yes"
|
|
bitfld.byte 0x00 0.--2. " CHPRI ,Channel 2 arbitration priority" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.byte (0x2+0x100)++0x00
|
|
line.byte 0x00 "DCHPRI_1,Channel 1 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel 1 preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable channel 1 preempt ability" "No,Yes"
|
|
bitfld.byte 0x00 0.--2. " CHPRI ,Channel 1 arbitration priority" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.byte (0x3+0x100)++0x00
|
|
line.byte 0x00 "DCHPRI_0,Channel 0 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel 0 preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable channel 0 preempt ability" "No,Yes"
|
|
bitfld.byte 0x00 0.--2. " CHPRI ,Channel 0 arbitration priority" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.byte (0x4+0x100)++0x00
|
|
line.byte 0x00 "DCHPRI_7,Channel 7 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel 7 preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable channel 7 preempt ability" "No,Yes"
|
|
bitfld.byte 0x00 0.--2. " CHPRI ,Channel 7 arbitration priority" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.byte (0x5+0x100)++0x00
|
|
line.byte 0x00 "DCHPRI_6,Channel 6 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel 6 preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable channel 6 preempt ability" "No,Yes"
|
|
bitfld.byte 0x00 0.--2. " CHPRI ,Channel 6 arbitration priority" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.byte (0x6+0x100)++0x00
|
|
line.byte 0x00 "DCHPRI_5,Channel 5 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel 5 preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable channel 5 preempt ability" "No,Yes"
|
|
bitfld.byte 0x00 0.--2. " CHPRI ,Channel 5 arbitration priority" "Lowest,1,2,3,4,5,6,Highest"
|
|
group.byte (0x7+0x100)++0x00
|
|
line.byte 0x00 "DCHPRI_4,Channel 4 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel 4 preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable channel 4 preempt ability" "No,Yes"
|
|
bitfld.byte 0x00 0.--2. " CHPRI ,Channel 4 arbitration priority" "Lowest,1,2,3,4,5,6,Highest"
|
|
else
|
|
group.byte (0x0+0x100)++0x00
|
|
line.byte 0x00 "DCHPRI_3,Channel 3 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel 3 preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable channel 3 preempt ability" "No,Yes"
|
|
bitfld.byte 0x00 0.--1. " CHPRI ,Channel 3 arbitration priority" "Lowest,1,2,Highest"
|
|
group.byte (0x1+0x100)++0x00
|
|
line.byte 0x00 "DCHPRI_2,Channel 2 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel 2 preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable channel 2 preempt ability" "No,Yes"
|
|
bitfld.byte 0x00 0.--1. " CHPRI ,Channel 2 arbitration priority" "Lowest,1,2,Highest"
|
|
group.byte (0x2+0x100)++0x00
|
|
line.byte 0x00 "DCHPRI_1,Channel 1 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel 1 preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable channel 1 preempt ability" "No,Yes"
|
|
bitfld.byte 0x00 0.--1. " CHPRI ,Channel 1 arbitration priority" "Lowest,1,2,Highest"
|
|
group.byte (0x3+0x100)++0x00
|
|
line.byte 0x00 "DCHPRI_0,Channel 0 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel 0 preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable channel 0 preempt ability" "No,Yes"
|
|
bitfld.byte 0x00 0.--1. " CHPRI ,Channel 0 arbitration priority" "Lowest,1,2,Highest"
|
|
endif
|
|
tree.end
|
|
base ad:0x40009000
|
|
tree.open "Transfer Control Descriptor Registers"
|
|
sif cpuis("MKL28*")||cpuis("MKL82*")
|
|
tree "Channel 0"
|
|
width 13.
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "TCD0_SADDR,TCD Source Address"
|
|
group.word (0x0+0x04)++0x03
|
|
line.word 0x00 "TCD0_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD0_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8 bit,16 bit,32 bit,,16 byte,32 byte,?..."
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8 bit,16 bit,32 bit,,16 byte,32 byte,?..."
|
|
textline " "
|
|
width 23.
|
|
if (((per.l(ad:0x40008000))&0x80)==0x00)
|
|
group.long (0x0+0x08)++0x03
|
|
line.long 0x00 "TCD0_NBYTES_MLNO,TCD Minor Byte Count"
|
|
elif (((per.l(ad:0x40009000+(0x0+0x08)))&0xc0000000)==0x0)
|
|
group.long (0x0+0x08)++0x03
|
|
line.long 0x00 "TCD0_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
else
|
|
group.long (0x0+0x08)++0x03
|
|
line.long 0x00 "TCD0_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Sign extended offset applied to the source/destination address"
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x0+0x0C)++0x07
|
|
line.long 0x00 "TCD0_SLAST,TCD Last Source Address Adjustment"
|
|
line.long 0x04 "TCD0_DADDR,TCD Destination Address"
|
|
group.word (0x0+0x14)++0x01
|
|
line.word 0x00 "TCD0_DOFF,TCD Signed Destination Address Offset"
|
|
if (((per.l(ad:0x40009000+(0x0+0x16)))&0x8000)==0x0)
|
|
group.word (0x0+0x16)++0x01
|
|
line.word 0x00 "TCD0_CITER_ELINKNO,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x0+0x16)++0x01
|
|
line.word 0x00 "TCD0_CITER_ELINKYES,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--11. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x0+0x18)++0x03
|
|
line.long 0x00 "TCD0_DLASTSGA,TCD Last Destination Address Adjustment/scatter Gather Address"
|
|
if (((per.l(ad:0x40009000+(0x0+0x1C)))&0x80)==0x80)
|
|
group.word (0x0+0x1C)++0x01
|
|
line.word 0x00 "TCD0_CSR,TCD Control And Status"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No edma stalls,,Stalls for 4 cycles,Stalls for 8 cycles"
|
|
bitfld.word 0x00 8.--10. " MAJORLINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 7. " DONE ,Channel done" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DREQ ,Disable request" "No,Yes"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x0+0x1C)++0x01
|
|
line.word 0x00 "TCD0_CSR,TCD Control And Status"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No edma stalls,,Stalls for 4 cycles,Stalls for 8 cycles"
|
|
bitfld.word 0x00 8.--10. " MAJORLINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 7. " DONE ,Channel done" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
rbitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
rbitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DREQ ,Disable request" "No,Yes"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x40009000+(0x0+0x1E)))&0x8000)==0x0)
|
|
group.word (0x0+0x1E)++0x01
|
|
line.word 0x00 "TCD0_BITER_ELINKNO,TCD Beginning Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x0+0x1E)++0x01
|
|
line.word 0x00 "TCD0_BITER_ELINKYES,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--11. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
tree.end
|
|
tree "Channel 1"
|
|
width 13.
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "TCD1_SADDR,TCD Source Address"
|
|
group.word (0x20+0x04)++0x03
|
|
line.word 0x00 "TCD1_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD1_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8 bit,16 bit,32 bit,,16 byte,32 byte,?..."
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8 bit,16 bit,32 bit,,16 byte,32 byte,?..."
|
|
textline " "
|
|
width 23.
|
|
if (((per.l(ad:0x40008000))&0x80)==0x00)
|
|
group.long (0x20+0x08)++0x03
|
|
line.long 0x00 "TCD1_NBYTES_MLNO,TCD Minor Byte Count"
|
|
elif (((per.l(ad:0x40009000+(0x20+0x08)))&0xc0000000)==0x0)
|
|
group.long (0x20+0x08)++0x03
|
|
line.long 0x00 "TCD1_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
else
|
|
group.long (0x20+0x08)++0x03
|
|
line.long 0x00 "TCD1_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Sign extended offset applied to the source/destination address"
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x20+0x0C)++0x07
|
|
line.long 0x00 "TCD1_SLAST,TCD Last Source Address Adjustment"
|
|
line.long 0x04 "TCD1_DADDR,TCD Destination Address"
|
|
group.word (0x20+0x14)++0x01
|
|
line.word 0x00 "TCD1_DOFF,TCD Signed Destination Address Offset"
|
|
if (((per.l(ad:0x40009000+(0x20+0x16)))&0x8000)==0x0)
|
|
group.word (0x20+0x16)++0x01
|
|
line.word 0x00 "TCD1_CITER_ELINKNO,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x20+0x16)++0x01
|
|
line.word 0x00 "TCD1_CITER_ELINKYES,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--11. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x20+0x18)++0x03
|
|
line.long 0x00 "TCD1_DLASTSGA,TCD Last Destination Address Adjustment/scatter Gather Address"
|
|
if (((per.l(ad:0x40009000+(0x20+0x1C)))&0x80)==0x80)
|
|
group.word (0x20+0x1C)++0x01
|
|
line.word 0x00 "TCD1_CSR,TCD Control And Status"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No edma stalls,,Stalls for 4 cycles,Stalls for 8 cycles"
|
|
bitfld.word 0x00 8.--10. " MAJORLINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 7. " DONE ,Channel done" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DREQ ,Disable request" "No,Yes"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x20+0x1C)++0x01
|
|
line.word 0x00 "TCD1_CSR,TCD Control And Status"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No edma stalls,,Stalls for 4 cycles,Stalls for 8 cycles"
|
|
bitfld.word 0x00 8.--10. " MAJORLINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 7. " DONE ,Channel done" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
rbitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
rbitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DREQ ,Disable request" "No,Yes"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x40009000+(0x20+0x1E)))&0x8000)==0x0)
|
|
group.word (0x20+0x1E)++0x01
|
|
line.word 0x00 "TCD1_BITER_ELINKNO,TCD Beginning Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x20+0x1E)++0x01
|
|
line.word 0x00 "TCD1_BITER_ELINKYES,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--11. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
tree.end
|
|
tree "Channel 2"
|
|
width 13.
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "TCD2_SADDR,TCD Source Address"
|
|
group.word (0x40+0x04)++0x03
|
|
line.word 0x00 "TCD2_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD2_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8 bit,16 bit,32 bit,,16 byte,32 byte,?..."
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8 bit,16 bit,32 bit,,16 byte,32 byte,?..."
|
|
textline " "
|
|
width 23.
|
|
if (((per.l(ad:0x40008000))&0x80)==0x00)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "TCD2_NBYTES_MLNO,TCD Minor Byte Count"
|
|
elif (((per.l(ad:0x40009000+(0x40+0x08)))&0xc0000000)==0x0)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "TCD2_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
else
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "TCD2_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Sign extended offset applied to the source/destination address"
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x40+0x0C)++0x07
|
|
line.long 0x00 "TCD2_SLAST,TCD Last Source Address Adjustment"
|
|
line.long 0x04 "TCD2_DADDR,TCD Destination Address"
|
|
group.word (0x40+0x14)++0x01
|
|
line.word 0x00 "TCD2_DOFF,TCD Signed Destination Address Offset"
|
|
if (((per.l(ad:0x40009000+(0x40+0x16)))&0x8000)==0x0)
|
|
group.word (0x40+0x16)++0x01
|
|
line.word 0x00 "TCD2_CITER_ELINKNO,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x40+0x16)++0x01
|
|
line.word 0x00 "TCD2_CITER_ELINKYES,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--11. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x40+0x18)++0x03
|
|
line.long 0x00 "TCD2_DLASTSGA,TCD Last Destination Address Adjustment/scatter Gather Address"
|
|
if (((per.l(ad:0x40009000+(0x40+0x1C)))&0x80)==0x80)
|
|
group.word (0x40+0x1C)++0x01
|
|
line.word 0x00 "TCD2_CSR,TCD Control And Status"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No edma stalls,,Stalls for 4 cycles,Stalls for 8 cycles"
|
|
bitfld.word 0x00 8.--10. " MAJORLINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 7. " DONE ,Channel done" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DREQ ,Disable request" "No,Yes"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x40+0x1C)++0x01
|
|
line.word 0x00 "TCD2_CSR,TCD Control And Status"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No edma stalls,,Stalls for 4 cycles,Stalls for 8 cycles"
|
|
bitfld.word 0x00 8.--10. " MAJORLINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 7. " DONE ,Channel done" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
rbitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
rbitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DREQ ,Disable request" "No,Yes"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x40009000+(0x40+0x1E)))&0x8000)==0x0)
|
|
group.word (0x40+0x1E)++0x01
|
|
line.word 0x00 "TCD2_BITER_ELINKNO,TCD Beginning Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x40+0x1E)++0x01
|
|
line.word 0x00 "TCD2_BITER_ELINKYES,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--11. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
tree.end
|
|
tree "Channel 3"
|
|
width 13.
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "TCD3_SADDR,TCD Source Address"
|
|
group.word (0x60+0x04)++0x03
|
|
line.word 0x00 "TCD3_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD3_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8 bit,16 bit,32 bit,,16 byte,32 byte,?..."
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8 bit,16 bit,32 bit,,16 byte,32 byte,?..."
|
|
textline " "
|
|
width 23.
|
|
if (((per.l(ad:0x40008000))&0x80)==0x00)
|
|
group.long (0x60+0x08)++0x03
|
|
line.long 0x00 "TCD3_NBYTES_MLNO,TCD Minor Byte Count"
|
|
elif (((per.l(ad:0x40009000+(0x60+0x08)))&0xc0000000)==0x0)
|
|
group.long (0x60+0x08)++0x03
|
|
line.long 0x00 "TCD3_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
else
|
|
group.long (0x60+0x08)++0x03
|
|
line.long 0x00 "TCD3_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Sign extended offset applied to the source/destination address"
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x60+0x0C)++0x07
|
|
line.long 0x00 "TCD3_SLAST,TCD Last Source Address Adjustment"
|
|
line.long 0x04 "TCD3_DADDR,TCD Destination Address"
|
|
group.word (0x60+0x14)++0x01
|
|
line.word 0x00 "TCD3_DOFF,TCD Signed Destination Address Offset"
|
|
if (((per.l(ad:0x40009000+(0x60+0x16)))&0x8000)==0x0)
|
|
group.word (0x60+0x16)++0x01
|
|
line.word 0x00 "TCD3_CITER_ELINKNO,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x60+0x16)++0x01
|
|
line.word 0x00 "TCD3_CITER_ELINKYES,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--11. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x60+0x18)++0x03
|
|
line.long 0x00 "TCD3_DLASTSGA,TCD Last Destination Address Adjustment/scatter Gather Address"
|
|
if (((per.l(ad:0x40009000+(0x60+0x1C)))&0x80)==0x80)
|
|
group.word (0x60+0x1C)++0x01
|
|
line.word 0x00 "TCD3_CSR,TCD Control And Status"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No edma stalls,,Stalls for 4 cycles,Stalls for 8 cycles"
|
|
bitfld.word 0x00 8.--10. " MAJORLINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 7. " DONE ,Channel done" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DREQ ,Disable request" "No,Yes"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x60+0x1C)++0x01
|
|
line.word 0x00 "TCD3_CSR,TCD Control And Status"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No edma stalls,,Stalls for 4 cycles,Stalls for 8 cycles"
|
|
bitfld.word 0x00 8.--10. " MAJORLINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 7. " DONE ,Channel done" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
rbitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
rbitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DREQ ,Disable request" "No,Yes"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x40009000+(0x60+0x1E)))&0x8000)==0x0)
|
|
group.word (0x60+0x1E)++0x01
|
|
line.word 0x00 "TCD3_BITER_ELINKNO,TCD Beginning Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x60+0x1E)++0x01
|
|
line.word 0x00 "TCD3_BITER_ELINKYES,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--11. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
tree.end
|
|
tree "Channel 4"
|
|
width 13.
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "TCD4_SADDR,TCD Source Address"
|
|
group.word (0x80+0x04)++0x03
|
|
line.word 0x00 "TCD4_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD4_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8 bit,16 bit,32 bit,,16 byte,32 byte,?..."
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8 bit,16 bit,32 bit,,16 byte,32 byte,?..."
|
|
textline " "
|
|
width 23.
|
|
if (((per.l(ad:0x40008000))&0x80)==0x00)
|
|
group.long (0x80+0x08)++0x03
|
|
line.long 0x00 "TCD4_NBYTES_MLNO,TCD Minor Byte Count"
|
|
elif (((per.l(ad:0x40009000+(0x80+0x08)))&0xc0000000)==0x0)
|
|
group.long (0x80+0x08)++0x03
|
|
line.long 0x00 "TCD4_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
else
|
|
group.long (0x80+0x08)++0x03
|
|
line.long 0x00 "TCD4_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Sign extended offset applied to the source/destination address"
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x80+0x0C)++0x07
|
|
line.long 0x00 "TCD4_SLAST,TCD Last Source Address Adjustment"
|
|
line.long 0x04 "TCD4_DADDR,TCD Destination Address"
|
|
group.word (0x80+0x14)++0x01
|
|
line.word 0x00 "TCD4_DOFF,TCD Signed Destination Address Offset"
|
|
if (((per.l(ad:0x40009000+(0x80+0x16)))&0x8000)==0x0)
|
|
group.word (0x80+0x16)++0x01
|
|
line.word 0x00 "TCD4_CITER_ELINKNO,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x80+0x16)++0x01
|
|
line.word 0x00 "TCD4_CITER_ELINKYES,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--11. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x80+0x18)++0x03
|
|
line.long 0x00 "TCD4_DLASTSGA,TCD Last Destination Address Adjustment/scatter Gather Address"
|
|
if (((per.l(ad:0x40009000+(0x80+0x1C)))&0x80)==0x80)
|
|
group.word (0x80+0x1C)++0x01
|
|
line.word 0x00 "TCD4_CSR,TCD Control And Status"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No edma stalls,,Stalls for 4 cycles,Stalls for 8 cycles"
|
|
bitfld.word 0x00 8.--10. " MAJORLINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 7. " DONE ,Channel done" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DREQ ,Disable request" "No,Yes"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x80+0x1C)++0x01
|
|
line.word 0x00 "TCD4_CSR,TCD Control And Status"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No edma stalls,,Stalls for 4 cycles,Stalls for 8 cycles"
|
|
bitfld.word 0x00 8.--10. " MAJORLINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 7. " DONE ,Channel done" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
rbitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
rbitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DREQ ,Disable request" "No,Yes"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x40009000+(0x80+0x1E)))&0x8000)==0x0)
|
|
group.word (0x80+0x1E)++0x01
|
|
line.word 0x00 "TCD4_BITER_ELINKNO,TCD Beginning Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x80+0x1E)++0x01
|
|
line.word 0x00 "TCD4_BITER_ELINKYES,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--11. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
tree.end
|
|
tree "Channel 5"
|
|
width 13.
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "TCD5_SADDR,TCD Source Address"
|
|
group.word (0xA0+0x04)++0x03
|
|
line.word 0x00 "TCD5_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD5_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8 bit,16 bit,32 bit,,16 byte,32 byte,?..."
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8 bit,16 bit,32 bit,,16 byte,32 byte,?..."
|
|
textline " "
|
|
width 23.
|
|
if (((per.l(ad:0x40008000))&0x80)==0x00)
|
|
group.long (0xA0+0x08)++0x03
|
|
line.long 0x00 "TCD5_NBYTES_MLNO,TCD Minor Byte Count"
|
|
elif (((per.l(ad:0x40009000+(0xA0+0x08)))&0xc0000000)==0x0)
|
|
group.long (0xA0+0x08)++0x03
|
|
line.long 0x00 "TCD5_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
else
|
|
group.long (0xA0+0x08)++0x03
|
|
line.long 0x00 "TCD5_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Sign extended offset applied to the source/destination address"
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0xA0+0x0C)++0x07
|
|
line.long 0x00 "TCD5_SLAST,TCD Last Source Address Adjustment"
|
|
line.long 0x04 "TCD5_DADDR,TCD Destination Address"
|
|
group.word (0xA0+0x14)++0x01
|
|
line.word 0x00 "TCD5_DOFF,TCD Signed Destination Address Offset"
|
|
if (((per.l(ad:0x40009000+(0xA0+0x16)))&0x8000)==0x0)
|
|
group.word (0xA0+0x16)++0x01
|
|
line.word 0x00 "TCD5_CITER_ELINKNO,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0xA0+0x16)++0x01
|
|
line.word 0x00 "TCD5_CITER_ELINKYES,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--11. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0xA0+0x18)++0x03
|
|
line.long 0x00 "TCD5_DLASTSGA,TCD Last Destination Address Adjustment/scatter Gather Address"
|
|
if (((per.l(ad:0x40009000+(0xA0+0x1C)))&0x80)==0x80)
|
|
group.word (0xA0+0x1C)++0x01
|
|
line.word 0x00 "TCD5_CSR,TCD Control And Status"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No edma stalls,,Stalls for 4 cycles,Stalls for 8 cycles"
|
|
bitfld.word 0x00 8.--10. " MAJORLINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 7. " DONE ,Channel done" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DREQ ,Disable request" "No,Yes"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0xA0+0x1C)++0x01
|
|
line.word 0x00 "TCD5_CSR,TCD Control And Status"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No edma stalls,,Stalls for 4 cycles,Stalls for 8 cycles"
|
|
bitfld.word 0x00 8.--10. " MAJORLINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 7. " DONE ,Channel done" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
rbitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
rbitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DREQ ,Disable request" "No,Yes"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x40009000+(0xA0+0x1E)))&0x8000)==0x0)
|
|
group.word (0xA0+0x1E)++0x01
|
|
line.word 0x00 "TCD5_BITER_ELINKNO,TCD Beginning Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0xA0+0x1E)++0x01
|
|
line.word 0x00 "TCD5_BITER_ELINKYES,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--11. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
tree.end
|
|
tree "Channel 6"
|
|
width 13.
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "TCD6_SADDR,TCD Source Address"
|
|
group.word (0xC0+0x04)++0x03
|
|
line.word 0x00 "TCD6_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD6_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8 bit,16 bit,32 bit,,16 byte,32 byte,?..."
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8 bit,16 bit,32 bit,,16 byte,32 byte,?..."
|
|
textline " "
|
|
width 23.
|
|
if (((per.l(ad:0x40008000))&0x80)==0x00)
|
|
group.long (0xC0+0x08)++0x03
|
|
line.long 0x00 "TCD6_NBYTES_MLNO,TCD Minor Byte Count"
|
|
elif (((per.l(ad:0x40009000+(0xC0+0x08)))&0xc0000000)==0x0)
|
|
group.long (0xC0+0x08)++0x03
|
|
line.long 0x00 "TCD6_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
else
|
|
group.long (0xC0+0x08)++0x03
|
|
line.long 0x00 "TCD6_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Sign extended offset applied to the source/destination address"
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0xC0+0x0C)++0x07
|
|
line.long 0x00 "TCD6_SLAST,TCD Last Source Address Adjustment"
|
|
line.long 0x04 "TCD6_DADDR,TCD Destination Address"
|
|
group.word (0xC0+0x14)++0x01
|
|
line.word 0x00 "TCD6_DOFF,TCD Signed Destination Address Offset"
|
|
if (((per.l(ad:0x40009000+(0xC0+0x16)))&0x8000)==0x0)
|
|
group.word (0xC0+0x16)++0x01
|
|
line.word 0x00 "TCD6_CITER_ELINKNO,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0xC0+0x16)++0x01
|
|
line.word 0x00 "TCD6_CITER_ELINKYES,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--11. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0xC0+0x18)++0x03
|
|
line.long 0x00 "TCD6_DLASTSGA,TCD Last Destination Address Adjustment/scatter Gather Address"
|
|
if (((per.l(ad:0x40009000+(0xC0+0x1C)))&0x80)==0x80)
|
|
group.word (0xC0+0x1C)++0x01
|
|
line.word 0x00 "TCD6_CSR,TCD Control And Status"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No edma stalls,,Stalls for 4 cycles,Stalls for 8 cycles"
|
|
bitfld.word 0x00 8.--10. " MAJORLINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 7. " DONE ,Channel done" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DREQ ,Disable request" "No,Yes"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0xC0+0x1C)++0x01
|
|
line.word 0x00 "TCD6_CSR,TCD Control And Status"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No edma stalls,,Stalls for 4 cycles,Stalls for 8 cycles"
|
|
bitfld.word 0x00 8.--10. " MAJORLINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 7. " DONE ,Channel done" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
rbitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
rbitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DREQ ,Disable request" "No,Yes"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x40009000+(0xC0+0x1E)))&0x8000)==0x0)
|
|
group.word (0xC0+0x1E)++0x01
|
|
line.word 0x00 "TCD6_BITER_ELINKNO,TCD Beginning Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0xC0+0x1E)++0x01
|
|
line.word 0x00 "TCD6_BITER_ELINKYES,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--11. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
tree.end
|
|
tree "Channel 7"
|
|
width 13.
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "TCD7_SADDR,TCD Source Address"
|
|
group.word (0xE0+0x04)++0x03
|
|
line.word 0x00 "TCD7_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD7_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8 bit,16 bit,32 bit,,16 byte,32 byte,?..."
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8 bit,16 bit,32 bit,,16 byte,32 byte,?..."
|
|
textline " "
|
|
width 23.
|
|
if (((per.l(ad:0x40008000))&0x80)==0x00)
|
|
group.long (0xE0+0x08)++0x03
|
|
line.long 0x00 "TCD7_NBYTES_MLNO,TCD Minor Byte Count"
|
|
elif (((per.l(ad:0x40009000+(0xE0+0x08)))&0xc0000000)==0x0)
|
|
group.long (0xE0+0x08)++0x03
|
|
line.long 0x00 "TCD7_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
else
|
|
group.long (0xE0+0x08)++0x03
|
|
line.long 0x00 "TCD7_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Sign extended offset applied to the source/destination address"
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0xE0+0x0C)++0x07
|
|
line.long 0x00 "TCD7_SLAST,TCD Last Source Address Adjustment"
|
|
line.long 0x04 "TCD7_DADDR,TCD Destination Address"
|
|
group.word (0xE0+0x14)++0x01
|
|
line.word 0x00 "TCD7_DOFF,TCD Signed Destination Address Offset"
|
|
if (((per.l(ad:0x40009000+(0xE0+0x16)))&0x8000)==0x0)
|
|
group.word (0xE0+0x16)++0x01
|
|
line.word 0x00 "TCD7_CITER_ELINKNO,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0xE0+0x16)++0x01
|
|
line.word 0x00 "TCD7_CITER_ELINKYES,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--11. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0xE0+0x18)++0x03
|
|
line.long 0x00 "TCD7_DLASTSGA,TCD Last Destination Address Adjustment/scatter Gather Address"
|
|
if (((per.l(ad:0x40009000+(0xE0+0x1C)))&0x80)==0x80)
|
|
group.word (0xE0+0x1C)++0x01
|
|
line.word 0x00 "TCD7_CSR,TCD Control And Status"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No edma stalls,,Stalls for 4 cycles,Stalls for 8 cycles"
|
|
bitfld.word 0x00 8.--10. " MAJORLINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 7. " DONE ,Channel done" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DREQ ,Disable request" "No,Yes"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0xE0+0x1C)++0x01
|
|
line.word 0x00 "TCD7_CSR,TCD Control And Status"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No edma stalls,,Stalls for 4 cycles,Stalls for 8 cycles"
|
|
bitfld.word 0x00 8.--10. " MAJORLINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 7. " DONE ,Channel done" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
rbitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
rbitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DREQ ,Disable request" "No,Yes"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x40009000+(0xE0+0x1E)))&0x8000)==0x0)
|
|
group.word (0xE0+0x1E)++0x01
|
|
line.word 0x00 "TCD7_BITER_ELINKNO,TCD Beginning Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0xE0+0x1E)++0x01
|
|
line.word 0x00 "TCD7_BITER_ELINKYES,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--11. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
tree.end
|
|
else
|
|
tree "Channel 0"
|
|
width 13.
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "TCD0_SADDR,TCD Source Address"
|
|
group.word (0x0+0x04)++0x03
|
|
line.word 0x00 "TCD0_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD0_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8 bit,16 bit,32 bit,,16 byte,32 byte,?..."
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8 bit,16 bit,32 bit,,16 byte,32 byte,?..."
|
|
textline " "
|
|
width 23.
|
|
if (((per.l(ad:0x40008000))&0x80)==0x00)
|
|
group.long (0x0+0x08)++0x03
|
|
line.long 0x00 "TCD0_NBYTES_MLNO,TCD Minor Byte Count"
|
|
elif (((per.l(ad:0x40009000+(0x0+0x08)))&0xc0000000)==0x0)
|
|
group.long (0x0+0x08)++0x03
|
|
line.long 0x00 "TCD0_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
else
|
|
group.long (0x0+0x08)++0x03
|
|
line.long 0x00 "TCD0_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Sign extended offset applied to the source/destination address"
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x0+0x0C)++0x07
|
|
line.long 0x00 "TCD0_SLAST,TCD Last Source Address Adjustment"
|
|
line.long 0x04 "TCD0_DADDR,TCD Destination Address"
|
|
group.word (0x0+0x14)++0x01
|
|
line.word 0x00 "TCD0_DOFF,TCD Signed Destination Address Offset"
|
|
if (((per.l(ad:0x40009000+(0x0+0x16)))&0x8000)==0x0)
|
|
group.word (0x0+0x16)++0x01
|
|
line.word 0x00 "TCD0_CITER_ELINKNO,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x0+0x16)++0x01
|
|
line.word 0x00 "TCD0_CITER_ELINKYES,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--10. " LINKCH ,Link channel number" "0,1,2,3"
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x0+0x18)++0x03
|
|
line.long 0x00 "TCD0_DLASTSGA,TCD Last Destination Address Adjustment/scatter Gather Address"
|
|
group.word (0x0+0x1C)++0x01
|
|
line.word 0x00 "TCD0_CSR,TCD Control And Status"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No edma stalls,,Stalls for 4 cycles,Stalls for 8 cycles"
|
|
bitfld.word 0x00 8.--9. " MAJORLINKCH ,Link channel number" "0,1,2,3"
|
|
bitfld.word 0x00 7. " DONE ,Channel done" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DREQ ,Disable request" "No,Yes"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
if (((per.l(ad:0x40009000+(0x0+0x1E)))&0x8000)==0x0)
|
|
group.word (0x0+0x1E)++0x01
|
|
line.word 0x00 "TCD0_BITER_ELINKNO,TCD Beginning Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x0+0x1E)++0x01
|
|
line.word 0x00 "TCD0_BITER_ELINKYES,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--10. " LINKCH ,Link channel number" "0,1,2,3"
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
tree.end
|
|
tree "Channel 1"
|
|
width 13.
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "TCD1_SADDR,TCD Source Address"
|
|
group.word (0x20+0x04)++0x03
|
|
line.word 0x00 "TCD1_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD1_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8 bit,16 bit,32 bit,,16 byte,32 byte,?..."
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8 bit,16 bit,32 bit,,16 byte,32 byte,?..."
|
|
textline " "
|
|
width 23.
|
|
if (((per.l(ad:0x40008000))&0x80)==0x00)
|
|
group.long (0x20+0x08)++0x03
|
|
line.long 0x00 "TCD1_NBYTES_MLNO,TCD Minor Byte Count"
|
|
elif (((per.l(ad:0x40009000+(0x20+0x08)))&0xc0000000)==0x0)
|
|
group.long (0x20+0x08)++0x03
|
|
line.long 0x00 "TCD1_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
else
|
|
group.long (0x20+0x08)++0x03
|
|
line.long 0x00 "TCD1_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Sign extended offset applied to the source/destination address"
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x20+0x0C)++0x07
|
|
line.long 0x00 "TCD1_SLAST,TCD Last Source Address Adjustment"
|
|
line.long 0x04 "TCD1_DADDR,TCD Destination Address"
|
|
group.word (0x20+0x14)++0x01
|
|
line.word 0x00 "TCD1_DOFF,TCD Signed Destination Address Offset"
|
|
if (((per.l(ad:0x40009000+(0x20+0x16)))&0x8000)==0x0)
|
|
group.word (0x20+0x16)++0x01
|
|
line.word 0x00 "TCD1_CITER_ELINKNO,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x20+0x16)++0x01
|
|
line.word 0x00 "TCD1_CITER_ELINKYES,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--10. " LINKCH ,Link channel number" "0,1,2,3"
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x20+0x18)++0x03
|
|
line.long 0x00 "TCD1_DLASTSGA,TCD Last Destination Address Adjustment/scatter Gather Address"
|
|
group.word (0x20+0x1C)++0x01
|
|
line.word 0x00 "TCD1_CSR,TCD Control And Status"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No edma stalls,,Stalls for 4 cycles,Stalls for 8 cycles"
|
|
bitfld.word 0x00 8.--9. " MAJORLINKCH ,Link channel number" "0,1,2,3"
|
|
bitfld.word 0x00 7. " DONE ,Channel done" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DREQ ,Disable request" "No,Yes"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
if (((per.l(ad:0x40009000+(0x20+0x1E)))&0x8000)==0x0)
|
|
group.word (0x20+0x1E)++0x01
|
|
line.word 0x00 "TCD1_BITER_ELINKNO,TCD Beginning Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x20+0x1E)++0x01
|
|
line.word 0x00 "TCD1_BITER_ELINKYES,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--10. " LINKCH ,Link channel number" "0,1,2,3"
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
tree.end
|
|
tree "Channel 2"
|
|
width 13.
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "TCD2_SADDR,TCD Source Address"
|
|
group.word (0x40+0x04)++0x03
|
|
line.word 0x00 "TCD2_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD2_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8 bit,16 bit,32 bit,,16 byte,32 byte,?..."
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8 bit,16 bit,32 bit,,16 byte,32 byte,?..."
|
|
textline " "
|
|
width 23.
|
|
if (((per.l(ad:0x40008000))&0x80)==0x00)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "TCD2_NBYTES_MLNO,TCD Minor Byte Count"
|
|
elif (((per.l(ad:0x40009000+(0x40+0x08)))&0xc0000000)==0x0)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "TCD2_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
else
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "TCD2_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Sign extended offset applied to the source/destination address"
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x40+0x0C)++0x07
|
|
line.long 0x00 "TCD2_SLAST,TCD Last Source Address Adjustment"
|
|
line.long 0x04 "TCD2_DADDR,TCD Destination Address"
|
|
group.word (0x40+0x14)++0x01
|
|
line.word 0x00 "TCD2_DOFF,TCD Signed Destination Address Offset"
|
|
if (((per.l(ad:0x40009000+(0x40+0x16)))&0x8000)==0x0)
|
|
group.word (0x40+0x16)++0x01
|
|
line.word 0x00 "TCD2_CITER_ELINKNO,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x40+0x16)++0x01
|
|
line.word 0x00 "TCD2_CITER_ELINKYES,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--10. " LINKCH ,Link channel number" "0,1,2,3"
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x40+0x18)++0x03
|
|
line.long 0x00 "TCD2_DLASTSGA,TCD Last Destination Address Adjustment/scatter Gather Address"
|
|
group.word (0x40+0x1C)++0x01
|
|
line.word 0x00 "TCD2_CSR,TCD Control And Status"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No edma stalls,,Stalls for 4 cycles,Stalls for 8 cycles"
|
|
bitfld.word 0x00 8.--9. " MAJORLINKCH ,Link channel number" "0,1,2,3"
|
|
bitfld.word 0x00 7. " DONE ,Channel done" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DREQ ,Disable request" "No,Yes"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
if (((per.l(ad:0x40009000+(0x40+0x1E)))&0x8000)==0x0)
|
|
group.word (0x40+0x1E)++0x01
|
|
line.word 0x00 "TCD2_BITER_ELINKNO,TCD Beginning Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x40+0x1E)++0x01
|
|
line.word 0x00 "TCD2_BITER_ELINKYES,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--10. " LINKCH ,Link channel number" "0,1,2,3"
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
tree.end
|
|
tree "Channel 3"
|
|
width 13.
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "TCD3_SADDR,TCD Source Address"
|
|
group.word (0x60+0x04)++0x03
|
|
line.word 0x00 "TCD3_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD3_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8 bit,16 bit,32 bit,,16 byte,32 byte,?..."
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8 bit,16 bit,32 bit,,16 byte,32 byte,?..."
|
|
textline " "
|
|
width 23.
|
|
if (((per.l(ad:0x40008000))&0x80)==0x00)
|
|
group.long (0x60+0x08)++0x03
|
|
line.long 0x00 "TCD3_NBYTES_MLNO,TCD Minor Byte Count"
|
|
elif (((per.l(ad:0x40009000+(0x60+0x08)))&0xc0000000)==0x0)
|
|
group.long (0x60+0x08)++0x03
|
|
line.long 0x00 "TCD3_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
else
|
|
group.long (0x60+0x08)++0x03
|
|
line.long 0x00 "TCD3_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Sign extended offset applied to the source/destination address"
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x60+0x0C)++0x07
|
|
line.long 0x00 "TCD3_SLAST,TCD Last Source Address Adjustment"
|
|
line.long 0x04 "TCD3_DADDR,TCD Destination Address"
|
|
group.word (0x60+0x14)++0x01
|
|
line.word 0x00 "TCD3_DOFF,TCD Signed Destination Address Offset"
|
|
if (((per.l(ad:0x40009000+(0x60+0x16)))&0x8000)==0x0)
|
|
group.word (0x60+0x16)++0x01
|
|
line.word 0x00 "TCD3_CITER_ELINKNO,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x60+0x16)++0x01
|
|
line.word 0x00 "TCD3_CITER_ELINKYES,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--10. " LINKCH ,Link channel number" "0,1,2,3"
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x60+0x18)++0x03
|
|
line.long 0x00 "TCD3_DLASTSGA,TCD Last Destination Address Adjustment/scatter Gather Address"
|
|
group.word (0x60+0x1C)++0x01
|
|
line.word 0x00 "TCD3_CSR,TCD Control And Status"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No edma stalls,,Stalls for 4 cycles,Stalls for 8 cycles"
|
|
bitfld.word 0x00 8.--9. " MAJORLINKCH ,Link channel number" "0,1,2,3"
|
|
bitfld.word 0x00 7. " DONE ,Channel done" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DREQ ,Disable request" "No,Yes"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
if (((per.l(ad:0x40009000+(0x60+0x1E)))&0x8000)==0x0)
|
|
group.word (0x60+0x1E)++0x01
|
|
line.word 0x00 "TCD3_BITER_ELINKNO,TCD Beginning Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x60+0x1E)++0x01
|
|
line.word 0x00 "TCD3_BITER_ELINKYES,TCD Current Minor Loop Link(Major Loop Count)"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--10. " LINKCH ,Link channel number" "0,1,2,3"
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
width 0x0B
|
|
tree.end
|
|
tree "EWM (External Watchdog Monitor)"
|
|
base ad:0x40061000
|
|
width 14.
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "CTRL,Control Register"
|
|
sif !cpuis("MK60*AB10")&&!cpuis("MK20DN512*AB10R")&&!cpuis("MK10DN512ZV??10*")&&!cpuis("MK10DX256ZV??10*")&&!cpuis("MK30DN512ZVLK10")&&!cpuis("MK30DN512ZVLQ10")&&!cpuis("MK30DN512ZVLQ10R")&&!cpuis("MK30DX256ZVLQ10")&&!cpuis("MK40D*Z*10")&&!cpuis("MK50DN512ZCLL10")&&!cpuis("MK50DX256ZCLL10")&&!cpuis("MK50DN512ZCLQ10")&&!cpuis("MK50DX256ZCLQ10")&&!cpuis("MK51DN512ZCLL10")&&!cpuis("MK51DN512ZCMC10")&&!cpuis("MK51DX256ZCMC10")&&!cpuis("MK51DN256ZCMD10")&&!cpuis("MK51DN512ZCLQ10")&&!cpuis("MK52DN512ZCLQ10")&&!cpuis("MK52DN512ZCMD10")&&!cpuis("MK53DN512ZCLQ10")&&!cpuis("MK53DN512ZCMD10")&&!cpuis("MK53DX256ZCLQ10")&&!cpuis("MK60DX256ZVMC10")&&!cpuis("MK60DN512ZVMC10")&&!cpuis("MK60DN256ZVLQ10")&&!cpuis("MK60DN512ZVLQ10")&&!cpuis("MK60DX256ZVLQ10")&&!cpuis("MK60DX256ZVMD10")&&!cpuis("MK60DN512ZVLQ10R")&&!cpuis("MK60DX256ZVLL10")&&!cpuis("MK60DN512ZCAB10R")&&!cpuis("KK20DN512ZCAB10R")&&!cpuis("MK20DN512ZVLL10")&&!cpuis("MK20DX256ZVLL10")&&!cpuis("MK20DN512ZVLQ10")&&!cpuis("MK20DN512ZVLQ10R")&&!cpuis("MK20DN512ZVMD10")&&!cpuis("MK20DX128ZVLQ10")&&!cpuis("MK20DX256ZVLQ10")&&!cpuis("MK20DX256ZVLQ10R")&&!cpuis("MK20DX256ZVMD10")&&!cpuis("MK20DN512ZVLK10")&&!cpuis("MK20DX256ZVLK10")&&!cpuis("MK20DN512ZVMC10")&&!cpuis("MK20DN512ZVMC10R")&&!cpuis("MK60DN512ZVLL10")&&!cpuis("MK60DN512ZVMD10")&&!cpuis("KK60DN512ZCAB10R")
|
|
bitfld.byte 0x00 3. " INTEN ,Interrupt enable" "Disabled,Enabled"
|
|
endif
|
|
bitfld.byte 0x00 2. " INEN ,Enables the EWM_in port" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " ASSIN ,Inverts the assert state to a logic one" "Not inverted,Inverted"
|
|
bitfld.byte 0x00 0. " EWMEN ,EWM module enable" "Disabled,Enabled"
|
|
wgroup.byte 0x01++0x00
|
|
line.byte 0x00 "SERV,Service Register"
|
|
group.byte 0x02++0x01
|
|
line.byte 0x00 "CMPL,Compare Low Register"
|
|
line.byte 0x01 "CMPH,Compare High Register"
|
|
sif cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("KK28FN2M0CAU15R")||cpuis("MK28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")||cpuis("MK27FN2M0VMI15")
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "CLKCTRL,Clock Control Register"
|
|
bitfld.byte 0x00 0.--1. " CLKSEL ,Low power clock source select" "lpo_clk[0],lpo_clk[1],lpo_clk[2],lpo_clk[3]"
|
|
endif
|
|
sif !cpuis("MK40D*Z*10")&&!cpuis("KK60FN1M0VLQ15")&&!cpuis("KK60DN512ZCAB10R")&&!cpuis("MK63FN1M0VLQ12R")&&!cpuis("MK65FN2M0VMI18R")&&!cpuis("KK65FN2M0CAC18R")&&!cpuis("MK66FN2M0VLQ18R")
|
|
sif cpuis("MK40D*10")||cpuis("MK5?D*10")||cpuis("MK60D*10")||cpuis("MK02*")||cpuis("MK22FN256*")||cpuis("MK22FN128*")||cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("MK20DX256VLQ10R")||cpuis("MK22FN512VMP12")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VLH12")||cpuis("MK22FN512VDC12")||cpuis("MK22FN512CBP12R")||cpuis("MK22FN512CAP12R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VDC12R")||cpuis("MK22FN512VFX12")||cpuis("MK22FN512VFX12R")||cpuis("MK22FN512VLH12R")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("KK28FN2M0CAU15R")||cpuis("MK28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")||cpuis("MK20DN512VLK10R")||cpuis("MK22FN128VLH10R")||cpuis("MK27FN2M0VMI15")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("MK60DN512VMC10*")||cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK20DX256VLK10R")
|
|
group.byte 0x05++0x00
|
|
line.byte 0x00 "CLKPRESCALER,Clock Prescaler Register"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "WDOG (Watchdog Timer)"
|
|
base ad:0x40052000
|
|
width 9.
|
|
group.word 0x00++0x17
|
|
line.word 0x00 "STCTRLH,Watchdog Status And Control Register High"
|
|
bitfld.word 0x00 14. " DISTESTWDOG ,WDOG functional test mode disable" "No,Yes"
|
|
bitfld.word 0x00 12.--13. " BYTESEL ,Select the byte to be tested" "Byte 0,Byte 1,Byte 2,Byte 3"
|
|
bitfld.word 0x00 11. " TESTSEL ,Selects the test to be run on the watchdog timer" "Quick test,Byte test"
|
|
newline
|
|
bitfld.word 0x00 10. " TESTWDOG ,Functional test mode enable" "Disabled,Enabled"
|
|
sif cpuis("MK20DN512*AB10R")||cpuis("MK10DN512ZV??10*")||cpuis("MK10DX256ZV??10*")||cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256ZVLQ10")||cpuis("MK40D*Z*10")||cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")||cpuis("MK50DN512ZCLL10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DX256ZCLQ10")||cpuis("MK51DN512ZCLL10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK60DX256ZVMC10")||cpuis("KK20DN512ZCAB10R")||cpuis("MK20DN512ZVLL10")||cpuis("MK20DX256ZVLL10")||cpuis("MK20DN512ZVLQ10")||cpuis("MK20DN512ZVLQ10R")||cpuis("MK20DN512ZVMD10")||cpuis("MK20DX128ZVLQ10")||cpuis("MK20DX256ZVLQ10")||cpuis("MK20DX256ZVLQ10R")||cpuis("MK20DX256ZVMD10")||cpuis("MK20DN512ZVLK10")||cpuis("MK20DX256ZVLK10")||cpuis("MK20DN512ZVMC10")||cpuis("MK20DN512ZVMC10R")||cpuis("KK60DN512ZCAB10R")
|
|
newline
|
|
bitfld.word 0x00 8. " STNDBYEN ,Enables WDOG in standby mode" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " WAIT_EN ,Enables WDOG in wait mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " STOPEN ,Enables WDOG in stop mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " DBGEN ,Enables WDOG in debug mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 4. " ALLOWUPDATE ,Enables updates to watchdog write once registers" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " WINEN ,Enable windowing mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " IRQRSTEN ,Enable the debug breadcrumbs feature" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " CLKSRC ,Selects clock source for the WDOG timer and other internal timing operations" "LPO Osc,Alternate"
|
|
bitfld.word 0x00 0. " WDOGEN ,Enables the WDOG operation" "Disabled,Enabled"
|
|
line.word 0x02 "STCTRLL,Watchdog Status And Control Register Low"
|
|
eventfld.word 0x02 15. " INTFLG ,Interrupt flag" "No interrupt,Interrupt"
|
|
line.word 0x04 "TOVALH,Watchdog Time-out Value Register High"
|
|
line.word 0x06 "TOVALL,Watchdog Time-out Value Register Low"
|
|
line.word 0x08 "WINH,Watchdog Window Register High"
|
|
line.word 0x0A "WINL,Watchdog Window Register Low"
|
|
line.word 0x0C "REFRESH,Watchdog Refresh Register"
|
|
line.word 0x0E "UNLOCK,Watchdog Unlock Register"
|
|
line.word 0x10 "TMROUTH,Watchdog Timer Output Register High"
|
|
line.word 0x12 "TMROUTL,Watchdog Timer Output Register Low"
|
|
line.word 0x14 "RSTCNT,Watchdog Reset Count Register"
|
|
line.word 0x16 "PRESC,Watchdog Prescaler Register"
|
|
bitfld.word 0x16 8.--10. " PRESCVAL ,3-bit prescaler for the watchdog clock source" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "Clock Modules"
|
|
tree "MCG (Multipurpose Clock Generator)"
|
|
base ad:0x40064000
|
|
width 7.
|
|
if (((per.b(ad:0x40064000+0x001))&0x30)==0x00||((per.b(ad:0x40064000+0x00C))&0x01)==0x01)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "C1,MCG Control 1 Register"
|
|
sif cpuis("MK11DN512AVLK5*")
|
|
bitfld.byte 0x00 6.--7. " CLKS ,Clock source select" ",Internal ref clk,External ref clk,?..."
|
|
newline
|
|
else
|
|
bitfld.byte 0x00 6.--7. " CLKS ,Clock source select" "Out FLL/PLL,Internal ref clk,External ref clk,?..."
|
|
newline
|
|
endif
|
|
bitfld.byte 0x00 3.--5. " FRDIV ,FLL external reference divider" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.byte 0x00 2. " IREFS ,Internal reference select" "External,Internal"
|
|
bitfld.byte 0x00 1. " IRCLKEN ,Internal reference clock enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.byte 0x00 0. " IREFSTEN ,Internal reference stop enable" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "C1,MCG Control 1 Register"
|
|
bitfld.byte 0x00 6.--7. " CLKS ,Clock source select" "Out FLL/PLL,Internal ref clk,External ref clk,?..."
|
|
sif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("MK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")||cpuis("MK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("MK63FN1M0VLQ12")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK65FN2M0VMI18")||cpuis("MK66FN2M0VLQ18R")||cpuis("MK66FN2M0VLQ18")
|
|
bitfld.byte 0x00 3.--5. " FRDIV ,FLL external reference divider" "/32,/64,/128,/256,/512,/1024,/1280,/1536"
|
|
elif cpuis("MK40D*Z*10")||cpuis("MK10DN512ZVLK10*")||cpuis("MK10DN512ZVLL10*")||cpuis("MK10DN512ZVLQ10")||cpuis("MK10DN512ZVMD10")||cpuis("MK10DN512ZVMC10")||cpuis("MK10DX256ZVLQ10*")||cpuis("MK10DX256ZVMD10")||cpuis("MK??F*")||cpuis("KK60DN512ZCAB10R")
|
|
bitfld.byte 0x00 3.--5. " FRDIV ,FLL external reference divider" "/32,/64,/128,/256,/512,/1024,?..."
|
|
else
|
|
bitfld.byte 0x00 3.--5. " FRDIV ,FLL external reference divider" "/32,/64,/128,/256,/512,/1024,/1280,/1536"
|
|
endif
|
|
newline
|
|
bitfld.byte 0x00 2. " IREFS ,Internal reference select" "External,Internal"
|
|
bitfld.byte 0x00 1. " IRCLKEN ,Internal reference clock enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " IREFSTEN ,Internal reference stop enable" "Disabled,Enabled"
|
|
endif
|
|
group.byte 0x01++0x01
|
|
line.byte 0x00 "C2,MCG Control 2 Register"
|
|
sif !cpuis("MK20D*AB10")&&!cpuis("MK10DN512ZV??10*")&&!cpuis("MK10DX256ZV??10*")&&!cpuis("MK30DN512ZVLK10")&&!cpuis("MK30DN512ZVLQ10")&&!cpuis("MK30DN512ZVLQ10R")&&!cpuis("MK30DX256ZVLQ10")&&!cpuis("MK40D*Z*10")&&!cpuis("MK50DN512ZCLQ10")&&!cpuis("MK50DX256ZCLQ10")&&!cpuis("MK50DN512ZCLL10")&&!cpuis("MK50DX256ZCLL10")&&!cpuis("MK51DN512ZCLL10")&&!cpuis("MK51DN512ZCMC10")&&!cpuis("MK51DX256ZCMC10")&&!cpuis("MK51DN256ZCMD10")&&!cpuis("MK51DN512ZCLQ10")&&!cpuis("MK52DN512ZCLQ10")&&!cpuis("MK52DN512ZCMD10")&&!cpuis("MK53DN512ZCLQ10")&&!cpuis("MK53DN512ZCMD10")&&!cpuis("MK53DX256ZCLQ10")&&!cpuis("KK65FN2M0CAC18R")
|
|
bitfld.byte 0x00 7. " LOCRE0 ,Loss of clock reset enable" "Interrupt,Reset"
|
|
newline
|
|
endif
|
|
sif (cpuis("MKM33Z128CLL5")||cpuis("MKM33Z64CLL5")||cpuis("MKM34Z128CLL5")||cpuis("MKM33Z64CLH5")||cpuis("MKM14Z128CHH5")||cpuis("MKM14Z64CHH5"))||cpuis("MK02*")||cpuis("MK63*")||cpuis("MK64*")||cpuis("MK65*")||cpuis("MK66*")||cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK30DX256ZVLQ10")||cpuis("KK65FN2M0CAC18R")||cpuis("KK60DN512ZCAB10R")||cpuis("KK60FN1M0VLQ15")||cpuis("MK60D*")
|
|
sif !cpuis("MK60D*")&&!cpuis("KK60FN1M0VLQ15")&&!cpuis("KK60DN512ZCAB10R")
|
|
bitfld.byte 0x00 6. " FCFTRIM ,Fast internal reference clock fine trim" "Increased,Decreased"
|
|
endif
|
|
bitfld.byte 0x00 4.--5. " RANGE ,Frequency range select" "Encoding 0,Encoding 1,Encoding 2,Encoding 2"
|
|
bitfld.byte 0x00 3. " HGO ,High gain oscillator select" "Low-power,High-gain"
|
|
newline
|
|
else
|
|
sif cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7")||cpuis("MKM14Z128ACHH5*")||cpuis("MKM14Z64ACHH5")||cpuis("MKM33Z128ACLH5*")||cpuis("MKM33Z64ACLH5*")||cpuis("MKM33Z64ACLL5*")||cpuis("MKM33Z128ACLL5")||cpuis("MKM34Z128ACLL5*")
|
|
bitfld.byte 0x00 4.--5. " RANGE ,Frequency range select" "32kHz-39kHz,1MHz-8MHz,8MHz-32MHz,8MHz-32MHz"
|
|
newline
|
|
elif cpuis("MK10DN512ZV??10*")||cpuis("MK10DX256ZV??10*")||cpuis("MK11DN512AVLK5*")||cpuis("MK11DN512VLK5*")||cpuis("MK50DN512ZCLL10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DX256ZCLQ10")||cpuis("MK51DN512ZCLL10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")
|
|
bitfld.byte 0x00 4.--5. " RANGE ,Frequency range select" "32kHz-40kHz,3MHz-8MHz,8MHz-32MHz,8MHz-32MHz"
|
|
newline
|
|
else
|
|
bitfld.byte 0x00 4.--5. " RANGE ,Frequency range select" "1kHz-32kHz,1MHz-8MHz,8MHz-32MHz,8MHz-32MHz"
|
|
newline
|
|
endif
|
|
bitfld.byte 0x00 3. " HGO ,High gain oscillator select" "Low-power,High-gain"
|
|
newline
|
|
endif
|
|
bitfld.byte 0x00 2. " EREFS ,External reference select" "Ext ref,Osc"
|
|
bitfld.byte 0x00 1. " LP ,Low power select" "FLL||PLL enabled,FLL||PLL disabled"
|
|
bitfld.byte 0x00 0. " IRCS ,Internal reference clock select" "Slow,Fast"
|
|
line.byte 0x01 "C3,MCG Control 3 Register"
|
|
if (((per.b(ad:0x40064000+0x003))&0x60)==0x00)
|
|
group.byte 0x03++0x00
|
|
line.byte 0x00 "C4,MCG Control 4 Register"
|
|
bitfld.byte 0x00 7. " DMX32 ,DCO maximum frequency with 32.768 kHz reference" "20 - 25 MHz,24 MHz"
|
|
bitfld.byte 0x00 5.--6. " DRST_DRS ,DCO range select" "Low range,Mid range,Mid-high range,High range"
|
|
bitfld.byte 0x00 1.--4. " FCTRIM ,Fast internal reference clock trim setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.byte 0x00 0. " SCFTRIM ,Slow internal reference clock fine trim" "Decrease the period,Increase th period"
|
|
elif (((per.b(ad:0x40064000+0x03))&0x60)==0x20)
|
|
group.byte 0x03++0x00
|
|
line.byte 0x00 "C4,MCG Control 4 Register"
|
|
bitfld.byte 0x00 7. " DMX32 ,Dco maximum frequency with 32.768 kHz reference" "40 - 50 MHz,48 MHz"
|
|
bitfld.byte 0x00 5.--6. " DRST_DRS ,DCO range select" "Low range,Mid range,Mid-high range,High range"
|
|
bitfld.byte 0x00 1.--4. " FCTRIM ,Fast internal reference clock trim setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.byte 0x00 0. " SCFTRIM ,Slow internal reference clock fine trim" "Decrease the period,Increase th period"
|
|
elif (((per.b(ad:0x40064000+0x03))&0x60)==0x40)
|
|
group.byte 0x03++0x00
|
|
line.byte 0x00 "C4,MCG Control 4 Register"
|
|
bitfld.byte 0x00 7. " DMX32 ,DCO maximum frequency with 32.768 kHz reference" "60 - 75 MHz,72 MHz"
|
|
bitfld.byte 0x00 5.--6. " DRST_DRS ,DCO range select" "Low range,Mid range,Mid-high range,High range"
|
|
bitfld.byte 0x00 1.--4. " FCTRIM ,Fast internal reference clock trim setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.byte 0x00 0. " SCFTRIM ,Slow internal reference clock fine trim" "Decrease the period,Increase th period"
|
|
else
|
|
group.byte 0x03++0x00
|
|
line.byte 0x00 "C4,MCG Control 4 Register"
|
|
bitfld.byte 0x00 7. " DMX32 ,DCO maximum frequency with 32.768 kHz reference" "80 - 100 MHz,96 MHz"
|
|
bitfld.byte 0x00 5.--6. " DRST_DRS ,DCO range select" "Low range,Mid range,Mid-high range,High range"
|
|
bitfld.byte 0x00 1.--4. " FCTRIM ,Fast internal reference clock trim setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.byte 0x00 0. " SCFTRIM ,Slow internal reference clock fine trim" "Decrease the period,Increase th period"
|
|
endif
|
|
sif !cpuis("MK02*")
|
|
sif cpuis("MK??F*")||cpuis("MK60D*")||cpuis("KK60FN1M0VLQ15")||cpuis("KK65FN2M0CAC18R")
|
|
sif cpuis("MK66*")||cpuis("MK65*")||cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "C5,MCG Control 5 Register"
|
|
sif cpuis("KK60FN1M0VLQ15")
|
|
bitfld.byte 0x00 7. "PLLREFSEL0,PLL0 external reference select" "OSC0,OSC1"
|
|
endif
|
|
bitfld.byte 0x00 6. " PLLCLKEN ,PLL clock enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " PLLSTEN ,PLL stop enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--2. " PRDIV ,PLL external reference divider" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
elif !cpuis("MK21F*")
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "C5,MCG Control 5 Register"
|
|
sif !cpuis("MK60DN512ZVLL10")&&!cpuis("MK60DX256ZVLL10")&&!cpuis("KK60DN512ZCAB10R")&&!cpuis("MK60DN512ZVMC10")&&!cpuis("MK60DN512VMC10R")&&!cpuis("MK60DX256ZVMC10")&&!cpuis("MK60DN256ZVLQ10")&&!cpuis("MK60DN512ZVLQ10")&&!cpuis("MK60DN512ZVLQ10R")&&!cpuis("MK60DN512ZVMD10")&&!cpuis("MK60DX256ZVLQ10")&&!cpuis("MK60DX256ZVMD10")&&!cpuis("MK63FN1M0VLQ12R")
|
|
newline
|
|
sif cpuis("MK20FN1M0VLQ12R")||cpuis("MK60FN1M0VLQ15")||cpuis("MK70*")
|
|
bitfld.byte 0x00 7. " PLLREFSEL ,PLL0 external reference select" "OSC0,OSC1"
|
|
else
|
|
bitfld.byte 0x00 7. " PLLREFSEL ,PLL0 external reference select" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
bitfld.byte 0x00 6. " PLLCLKEN ,PLL clock enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " PLLSTEN ,PLL stop enable" "Disabled,Enabled"
|
|
sif CPUIS("MK20FN1M0VLQ12R")
|
|
newline
|
|
bitfld.byte 0x00 0.--2. " PRDIV ,PLL external reference divider" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
elif cpuis("MK20F*")||cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("MK63FN1M0VLQ12R")
|
|
newline
|
|
bitfld.byte 0x00 0.--4. " PRDIV ,PLL external reference divider" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/18,/19,/20,/21,/22,/23,/24,/25,?..."
|
|
else
|
|
newline
|
|
bitfld.byte 0x00 0.--2. " PRDIV ,PLL external reference divider" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
endif
|
|
else
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "C5,MCG Control 5 Register"
|
|
bitfld.byte 0x00 6. " PLLCLKEN ,PLL clock enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " PLLSTEN ,PLL stop enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--4. " PRDIV ,PLL external reference divider" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/18,/19,/20,/21,/22,/23,/24,/25,?..."
|
|
endif
|
|
elif (cpuis("MKM33Z128CLL5")||cpuis("MKM33Z64CLL5")||cpuis("MKM34Z128CLL5")||cpuis("MKM33Z128CLH5*")||cpuis("MKM33Z64CLH5")||cpuis("MKM14Z128CHH5")||cpuis("MKM14Z64CHH5")||cpuis("MKM14Z128ACHH5*")||cpuis("MKM14Z64ACHH5")||cpuis("MKM33Z128ACLH5*")||cpuis("MKM33Z64ACLH5*")||cpuis("MKM33Z64ACLL5*")||cpuis("MKM33Z128ACLL5")||cpuis("MKM34Z128ACLL5*")||cpuis("MKM33Z64CLL5*")||cpuis("MKM14Z128CHH5*")||cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7"))
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "C5,MCG Control 5 Register"
|
|
bitfld.byte 0x00 6. " PLLCLKEN ,PLL clock enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " PLLSTEN ,PLL stop enable" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "C5,MCG Control 5 Register"
|
|
bitfld.byte 0x00 6. " PLLCLKEN ,PLL clock enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " PLLSTEN ,PLL stop enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--4. " PRDIV ,PLL external reference divider" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,?..."
|
|
endif
|
|
group.byte 0x05++0x00
|
|
line.byte 0x00 "C6,MCG Control 6 Register"
|
|
bitfld.byte 0x00 7. " LOLIE ,Loss of lock interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " PLLS ,PLL select" "FLL,PLL"
|
|
bitfld.byte 0x00 5. " CME ,Clock monitor enable" "Disabled,Enabled"
|
|
sif !cpuis("MKM33Z128CLL5")&&!cpuis("MKM33Z64CLL5*")&&!cpuis("MKM34Z128CLL5")&&!cpuis("MKM33Z128CLH5*")&&!cpuis("MKM33Z64CLH5")&&!cpuis("MKM14Z128CHH5*")&&!cpuis("MKM14Z64CHH5")&&!cpuis("MKM14Z128ACHH5*")&&!cpuis("MKM14Z64ACHH5")&&!cpuis("MKM33Z128ACLH5*")&&!cpuis("MKM33Z64ACLH5*")&&!cpuis("MKM33Z64ACLL5*")&&!cpuis("MKM33Z128ACLL5")&&!cpuis("MKM34Z128ACLL5*")
|
|
sif !cpuis("MK20F*")&&!cpuis("MK84FN2M0CAU15R")&&!cpuis("MK21F*")&&!cpuis("MK10F*")&&!cpuis("MK70F*")&&!cpuis("MK8?FN256V*")&&!cpuis("MK66FN2M0VLQ18R")&&!cpuis("MK65FN2M0VMI18R")&&!cpuis("MK65FN2M0CAC18R")&&!cpuis("MK65FN2M0VMI18R")&&!cpuis("KK65FN2M0CAC18R")&&!cpuis("MK66FN2M0VLQ18R")&&!cpuis("KK60FN1M0VLQ15")
|
|
newline
|
|
bitfld.byte 0x00 0.--4. " VDIV ,VCO divider" "/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55"
|
|
elif cpuis("MK21FX512VMD10")||cpuis("MK21FX512VMC10")||cpuis("MK21FN1M0VMD10")||cpuis("MK21FN1M0VMC10")
|
|
newline
|
|
bitfld.byte 0x00 0.--4. " VDIV ,VCO divider" "/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55"
|
|
elif cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7")
|
|
newline
|
|
bitfld.byte 0x00 0.--4. " CHGPMP_BIAS ,PLL charge pump current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
newline
|
|
bitfld.byte 0x00 0.--4. " VDIV ,VCO divider" "/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47"
|
|
endif
|
|
endif
|
|
else
|
|
group.byte 0x05++0x00
|
|
line.byte 0x00 "C6,MCG Control 6 Register"
|
|
bitfld.byte 0x00 5. " CME ,Clock monitor enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.byte 0x06++0x00
|
|
line.byte 0x00 "S,MCG Status Register"
|
|
sif !cpuis("MK02*")
|
|
bitfld.byte 0x00 7. " LOLS ,Loss of lock status" "Not lost,Lost"
|
|
bitfld.byte 0x00 6. " LOCK ,Lock status" "Not locked,Locked"
|
|
bitfld.byte 0x00 5. " PLLST ,PLL select status" "FLL,PLL"
|
|
newline
|
|
bitfld.byte 0x00 4. " IREFST ,Internal reference status" "External,Internal"
|
|
bitfld.byte 0x00 2.--3. " CLKST ,Clock mode status" "Out FLL,Internal ref,External ref,Out PLL"
|
|
bitfld.byte 0x00 1. " OSCINIT ,OSC initialization" "Not completed,Completed"
|
|
newline
|
|
else
|
|
bitfld.byte 0x00 4. " IREFST ,Internal reference status" "External,Internal"
|
|
bitfld.byte 0x00 2.--3. " CLKST ,Clock mode status" "Out FLL,Internal ref,External ref,?..."
|
|
bitfld.byte 0x00 1. " OSCINIT ,OSC initialization" "Not completed,Completed"
|
|
newline
|
|
endif
|
|
bitfld.byte 0x00 0. " IRCST ,Internal reference clock status" "Slow clock,Fast clock"
|
|
sif cpuis("MK20D*AB10")||cpuis("MK10DN512ZV??10*")||cpuis("MK10DX256ZV??10*")||cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256ZVLQ10")||cpuis("MK40D*Z*10")||cpuis("MK50DN512ZCLL10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DX256ZCLQ10")||cpuis("MK51DN512ZCLL10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")||cpuis("MK60DN512ZCAB10R")
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "ATC,MCG Auto Trim Control Register"
|
|
bitfld.byte 0x00 7. " ATME ,Automatic trim machine enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " ATMS ,Automatic trim machine select" "32kHz,4MHz"
|
|
rbitfld.byte 0x00 5. " ATMF ,Automatic trim machine fail flag" "Not occurred,Occurred"
|
|
elif cpuis("KK60DN512ZCAB10R")
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "ATC,MCG Auto Trim Control Register"
|
|
bitfld.byte 0x00 7. " ATME ,Automatic trim machine enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " ATMS ,Automatic trim machine select" "32kHz,4MHz"
|
|
eventfld.byte 0x00 5. " ATMF ,Automatic trim machine fail flag" "Not occurred,Occurred"
|
|
else
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "SC,MCG Status And Control Register"
|
|
bitfld.byte 0x00 7. " ATME ,Automatic trim machine enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " ATMS ,Automatic trim machine select" "32kHz,4MHz"
|
|
sif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")
|
|
rbitfld.byte 0x00 5. " ATMF ,Automatic trim machine fail flag" "Not occurred,Occurred"
|
|
else
|
|
eventfld.byte 0x00 5. " ATMF ,Automatic trim machine fail flag" "Not occurred,Occurred"
|
|
endif
|
|
newline
|
|
bitfld.byte 0x00 4. " FLTPRSRV ,FLL filter preserve enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1.--3. " FCIRDIV ,Fast clock internal reference divider" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
sif cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")
|
|
rbitfld.byte 0x00 0. " LOCS ,OSC0 loss of clock status" "Not occurred,Occurred"
|
|
else
|
|
eventfld.byte 0x00 0. " LOCS ,OSC0 loss of clock status" "Not occurred,Occurred"
|
|
endif
|
|
endif
|
|
group.byte 0x0A++0x01
|
|
line.byte 0x00 "ATCVH,MCG Auto Trim Compare Value High Register"
|
|
line.byte 0x01 "ATCVL,MCG Auto Trim Compare Value Low Register"
|
|
sif !cpuis("MK10DN512ZV??10*")&&!cpuis("MK10DX256ZV??10*")&&!cpuis("MK30DN512ZVLK10")&&!cpuis("MK30DN512ZVLQ10")&&!cpuis("MK30DN512ZVLQ10R")&&!cpuis("MK30DX256ZVLQ10")&&!cpuis("MK40D*Z*10")&&!cpuis("MK50DN512ZCLL10")&&!cpuis("MK50DX256ZCLL10")&&!cpuis("MK50DN512ZCLQ10")&&!cpuis("MK50DX256ZCLQ10")&&!cpuis("MK51DN512ZCLL10")&&!cpuis("MK51DN512ZCMC10")&&!cpuis("MK51DX256ZCMC10")&&!cpuis("MK51DN256ZCMD10")&&!cpuis("MK51DN512ZCLQ10")&&!cpuis("MK52DN512ZCLQ10")&&!cpuis("MK52DN512ZCMD10")&&!cpuis("MK53DN512ZCLQ10")&&!cpuis("MK53DN512ZCMD10")&&!cpuis("MK53DX256ZCLQ10")
|
|
sif (cpuis("MKM33Z128CLL5")||cpuis("MKM33Z64CLL5*")||cpuis("MKM34Z128CLL5")||cpuis("MKM33Z128CLH5*")||cpuis("MKM33Z64CLH5")||cpuis("MKM14Z128CHH5*")||cpuis("MKM14Z64CHH5")||cpuis("MKM14Z128ACHH5*")||cpuis("MKM14Z64ACHH5")||cpuis("MKM33Z128ACLH5*")||cpuis("MKM33Z64ACLH5*")||cpuis("MKM33Z64ACLL5*")||cpuis("MKM33Z128ACLL5")||cpuis("MKM34Z128ACLL5*")||cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7"))
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "C7,MCG Control 7 Register"
|
|
bitfld.byte 0x00 6.--7. " PLL32KREFSEL ,MCG PLL 32kHz reference clock select" "32kHz RTC,32kHz IRC,FLL FRDIV,?..."
|
|
sif cpuis("MKM14Z128ACHH5*")||cpuis("MKM14Z64ACHH5")||cpuis("MKM33Z128ACLH5*")||cpuis("MKM33Z64ACLH5*")||cpuis("MKM33Z64ACLL5*")||cpuis("MKM33Z128ACLL5")||cpuis("MKM34Z128ACLL5*")||cpuis("MKM33Z64CLL5*")||cpuis("MKM14Z128CHH5*")||cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7")||cpuis("MKM33Z128CLH5*")
|
|
newline
|
|
bitfld.byte 0x00 0. " OSCSEL ,MCG OSC clock select" "OSCCLK,32kHz RTC"
|
|
else
|
|
newline
|
|
bitfld.byte 0x00 0.--1. " OSCSEL ,MCG OSC clock select" "OSCCLK0,32kHz RTC,OSCCLK1,?..."
|
|
endif
|
|
elif cpuis("MK02*")||cpuis("MK63*")||cpuis("MK64*")||cpuis("MK65*")||cpuis("MK66*")||cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("MK22FN512CAP12R")||cpuis("MK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("MK65FN2M0VMI18R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "C7,MCG Control 7 Register"
|
|
bitfld.byte 0x00 0.--1. " OSCSEL ,MCG OSC clock select" "OSCCLK0,32kHz RTC,OSCCLK1,?..."
|
|
else
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "C7,MCG Control 7 Register"
|
|
bitfld.byte 0x00 0. " OSCSEL ,MCG OSC clock select" "OSCCLK,32kHz RTC"
|
|
endif
|
|
sif !cpuis("MK70*")&&!cpuis("MK02*")&&!cpuis("MK20FN1M0VLQ12R")&&!cpuis("MK60FN1M0VLQ15")
|
|
group.byte 0x0D++0x00
|
|
line.byte 0x00 "C8,MCG Control 8 Register"
|
|
bitfld.byte 0x00 7. " LOCRE1 ,Loss of clock reset enable" "Interrupt,Reset"
|
|
sif !cpuis("KK60FN1M0VLQ15")
|
|
bitfld.byte 0x00 6. " LOLRE ,PLL loss of lock reset enable" "Interrupt,Reset"
|
|
endif
|
|
bitfld.byte 0x00 5. " CME1 ,Clock monitor enable" "Disabled,Enabled"
|
|
newline
|
|
sif (cpuis("MKM33Z128CLL5")||cpuis("MKM33Z64CLL5")||cpuis("MKM34Z128CLL5")||cpuis("MKM33Z128CLH5*")||cpuis("MKM33Z64CLH5")||cpuis("MKM14Z128CHH5")||cpuis("MKM14Z64CHH5")||cpuis("MKM14Z128ACHH5*")||cpuis("MKM14Z64ACHH5")||cpuis("MKM33Z128ACLH5*")||cpuis("MKM33Z64ACLH5*")||cpuis("MKM33Z64ACLL5*")||cpuis("MKM33Z128ACLL5")||cpuis("MKM34Z128ACLL5*")||cpuis("MKM33Z64CLL5*")||cpuis("MKM14Z128CHH5*")||cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7"))
|
|
bitfld.byte 0x00 4. " COARSE_LOLIE ,Loss of coarse lock interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
endif
|
|
eventfld.byte 0x00 0. " LOCS1 ,RTC loss of clock status" "Not occurred,Occurred"
|
|
else
|
|
group.byte 0x0D++0x00
|
|
line.byte 0x00 "C8,MCG Control 8 Register"
|
|
bitfld.byte 0x00 7. " LOCRE1 ,Loss of clock reset enable" "Interrupt,Reset"
|
|
bitfld.byte 0x00 5. " CME1 ,Clock monitor enable" "Disabled,Enabled"
|
|
newline
|
|
sif (cpuis("MKM33Z128CLL5")||cpuis("MKM33Z64CLL5")||cpuis("MKM34Z128CLL5")||cpuis("MKM33Z128CLH5*")||cpuis("MKM33Z64CLH5")||cpuis("MKM14Z128CHH5")||cpuis("MKM14Z64CHH5")||cpuis("MKM14Z128ACHH5*")||cpuis("MKM14Z64ACHH5")||cpuis("MKM33Z128ACLH5*")||cpuis("MKM33Z64ACLH5*")||cpuis("MKM33Z64ACLL5*")||cpuis("MKM33Z128ACLL5")||cpuis("MKM34Z128ACLL5*")||cpuis("MKM33Z64CLL5*")||cpuis("MKM14Z128CHH5*")||cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7"))
|
|
bitfld.byte 0x00 4. " COARSE_LOLIE ,Loss of coarse lock interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
endif
|
|
eventfld.byte 0x00 0. " LOCS1 ,RTC loss of clock status" "Not occurred,Occurred"
|
|
endif
|
|
sif !cpuis("MK84FN2M0CAU15R")&&!cpuis("MK8?FN256V*")&&!cpuis("MK20DX256VMC7R")&&!cpuis("MK20DX256VLK7R")&&!cpuis("MK21FN1M0VMC10")&&!cpuis("MK21FX512VMC10")&&!cpuis("MK21FX512VMD10")&&!cpuis("MK21FN1M0VMD10")&&!cpuis("MK30DX256VLL7R")&&!cpuis("MK02F*")&&!cpuis("MK63FN1M0VLQ12R")
|
|
sif (cpuis("MKM33Z128CLL5")||cpuis("MKM33Z64CLL5")||cpuis("MKM34Z128CLL5")||cpuis("MKM33Z128CLH5*")||cpuis("MKM33Z64CLH5")||cpuis("MKM14Z128CHH5")||cpuis("MKM14Z64CHH5")||cpuis("MKM14Z128ACHH5*")||cpuis("MKM14Z64ACHH5")||cpuis("MKM33Z128ACLH5*")||cpuis("MKM33Z64ACLH5*")||cpuis("MKM33Z64ACLL5*")||cpuis("MKM33Z128ACLL5")||cpuis("MKM34Z128ACLL5*")||cpuis("MKM33Z64CLL5*")||cpuis("MKM14Z128CHH5*")||cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7"))
|
|
rgroup.byte 0x0E++0x00
|
|
line.byte 0x00 "C9,MCG Control 9 Register"
|
|
bitfld.byte 0x00 7. " COARSE_LOLS ,Coarse loss of lock status" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 6. " COARSE_LOCK ,Coarse lock status" "Unlocked,Locked"
|
|
elif cpuis("MK66*")||cpuis("MK65*")||cpuis("KK65FN2M0CAC18R")||cpuis("MK63FN1M0VLQ12R")
|
|
group.byte 0x0E++0x00
|
|
line.byte 0x00 "C9,MCG Control 9 Register"
|
|
bitfld.byte 0x00 5. " PLL_CME ,MCG external PLL clock monitor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " PLL_LOCRE ,MCG external PLL loss of clock reset enable" "Interrupt,Sys. reset"
|
|
eventfld.byte 0x00 0. " EXT_PLL_LOCS ,External PLL loss of clock status" "Not occurred,Occurred"
|
|
elif !cpuis("MK63*")&&!cpuis("MK64*")&&!cpuis("MK20F*")&&!cpuis("MK21F*")&&!cpuis("MK10F*")&&!cpuis("MK10D*5")&&!cpuis("MK70*")&&!cpuis("MK11*")&&!cpuis("MK11DN512AVLK5")&&!cpuis("MK11DN512VLK5*")&&!cpuis("MK60FN1M0VLQ15")&&!cpuis("KK60FN1M0VLQ15")&&!cpuis("MK60DX256ZVMC10")&&!cpuis("MK60DN512ZVMC10")&&!cpuis("KK60DN512ZCAB10R")
|
|
hgroup.byte 0x0E++0x00
|
|
hide.byte 0x00 "C9,MCG Control 9 Register"
|
|
endif
|
|
sif !cpuis("MKM14Z128ACHH5*")&&!cpuis("MKM14Z64ACHH5")&&!cpuis("MKM33Z128ACLH5*")&&!cpuis("MKM33Z64ACLH5*")&&!cpuis("MKM33Z64ACLL5*")&&!cpuis("MKM33Z128ACLL5")&&!cpuis("MKM34Z128ACLL5*")&&!cpuis("MKM33Z64CLL5*")&&!cpuis("MKM14Z128CHH5*")&&!cpuis("MKM33Z128CLH5*")&&!cpuis("MKM34Z256VLL7*")&&!cpuis("MKM34Z256VLQ7")&&!cpuis("MK11DN512AVLK5")&&!cpuis("MK11DN512VLK5*")
|
|
sif cpuis("MK??F*")||cpuis("KK60FN1M0VLQ15")
|
|
sif !cpuis("MK63*")&&!cpuis("MK64*")&&!cpuis("MK65*")&&!cpuis("MK66*")&&!cpuis("KK65FN2M0CAC18R")
|
|
group.byte 0x0F++0x02
|
|
line.byte 0x00 "C10,MCG Control 10 Register"
|
|
bitfld.byte 0x00 7. " LOCRE2 ,Loss of clock reset enable" "Interrupt,Reset"
|
|
bitfld.byte 0x00 4.--5. " RANGE1 ,Frequency range select" "Encoding 0,Encoding 1,Encoding 2,Encoding 2"
|
|
bitfld.byte 0x00 3. " HGO1 ,High gain oscillator select" "Low-power,High-gain"
|
|
newline
|
|
bitfld.byte 0x00 2. " EREFS1 ,External reference select" "Ext ref,Osc"
|
|
line.byte 0x01 "C11,MCG Control 11 Register"
|
|
sif cpuis("MK70*")||cpuis("KK60FN1M0VLQ15")
|
|
bitfld.byte 0x01 7. " PLLREFSEL1 ,PLL1 external reference select" "OSC0,OSC1"
|
|
else
|
|
bitfld.byte 0x01 7. " PLLREFSEL1 ,PLL1 external reference select" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
bitfld.byte 0x01 6. " PLLCLKEN1 ,PLL clock enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 5. " PLLSTEN1 ,PLL stop enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.byte 0x01 4. " PLLCS ,PLL clock select" "PLL0,PLL1"
|
|
bitfld.byte 0x01 0.--2. " PRDIV1 ,PLL external reference divider" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
line.byte 0x02 "C12,MCG Control 12 Register"
|
|
bitfld.byte 0x02 7. " LOLIE1 ,Loss of lock interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x02 5. " CME2 ,Clock monitor enable" "Disabled,Enabled"
|
|
newline
|
|
sif !cpuis("MK20F*")&&!cpuis("MK21F*")&&!cpuis("KK60FN1M0VLQ15")
|
|
bitfld.byte 0x02 0.--4. " VDIV1 ,VCO divider" "/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55"
|
|
else
|
|
bitfld.byte 0x02 0.--4. " VDIV1 ,VCO divider" "/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47"
|
|
endif
|
|
rgroup.byte 0x12++0x00
|
|
line.byte 0x00 "S2,MCG Status Register"
|
|
sif !cpuis("KK60FN1M0VLQ15")
|
|
bitfld.byte 0x00 7. " LOLS1 ,Loss of lock status" "Not lost,Lost"
|
|
else
|
|
eventfld.byte 0x00 7. " LOLS1 ,Loss of lock status" "Not lost,Lost"
|
|
endif
|
|
bitfld.byte 0x00 6. " LOCK1 ,Lock status" "Not locked,Locked"
|
|
bitfld.byte 0x00 4. " PLLCST ,PLL clock select status" "PLL0,PLL1"
|
|
newline
|
|
bitfld.byte 0x00 1. " OSCINIT1 ,OSC initialization" "Not completed,Completed"
|
|
bitfld.byte 0x00 0. " LOCS2 ,OSC1 loss of clock status" "No loss of OSC1,Loss of OSC1"
|
|
elif cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "C11,MCG Control 11 Register"
|
|
bitfld.byte 0x00 4. " PLLCS ,PLL clock select" "PLL0,PLL_EXT"
|
|
hgroup.byte 0x11++0x00
|
|
hide.byte 0x00 "C12,MCG Control 12 Register"
|
|
rgroup.byte 0x12++0x00
|
|
line.byte 0x00 "S2,MCG Status 2 Register"
|
|
bitfld.byte 0x00 4. " PLLCST ,PLL clock select status" "PLL0,PLL_EXT"
|
|
elif !cpuis("MK10D*5")&&!cpuis("MK64*")&&!cpuis("MK63*")
|
|
hgroup.byte 0x0F++0x00
|
|
hide.byte 0x00 "C10,MCG Control 10 Register"
|
|
endif
|
|
elif cpuis("MK66*")||cpuis("MK65*")
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "C11,MCG Control 11 Register"
|
|
bitfld.byte 0x00 4. " PLLCS ,PLL clock select" "PLL0,PLL_EXT"
|
|
hgroup.byte 0x11++0x00
|
|
hide.byte 0x00 "C12,MCG Control 12 Register"
|
|
rgroup.byte 0x12++0x00
|
|
line.byte 0x00 "S2,MCG Status 2 Register"
|
|
bitfld.byte 0x00 4. " PLLCST ,PLL clock select status" "PLL0,PLL_EXT"
|
|
hgroup.byte 0x13++0x00
|
|
hide.byte 0x00 "T3,MCG Test 3 Register"
|
|
elif !cpuis("MK10D*5")&&!cpuis("MK64*")&&!cpuis("MK63*")
|
|
hgroup.byte 0x0F++0x00
|
|
hide.byte 0x00 "C10,MCG Control 10 Register"
|
|
elif cpuis("MK63FN1M0VLQ12R")
|
|
hgroup.byte 0x11++0x00
|
|
hide.byte 0x00 "C12,MCG Control 12 Register"
|
|
endif
|
|
endif
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "OSC (Oscillator)"
|
|
base ad:0x40065000
|
|
width 4.
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "CR,OSC Control Register"
|
|
bitfld.byte 0x00 7. " ERCLKEN ,External reference enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " EREFSTEN ,External reference stop enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " SC2P ,Oscillator 2 pF capacitor load configure" "Disabled,Enabled"
|
|
newline
|
|
bitfld.byte 0x00 2. " SC4P ,Oscillator 4 pF capacitor load configure" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " SC8P ,Oscillator 8 pF capacitor load configure" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " SC16P ,Oscillator 16 pF capacitor load configure" "Disabled,Enabled"
|
|
sif cpuis("MK02*")||cpuis("MK66*")||cpuis("MK65*")||cpuis("MK22FN256*")||cpuis("MK22FN128*")||cpuis("MK26FN*")||cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("MKV5*")||cpuis("MK22FN512VMP12")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512CBP12R")||cpuis("MK22FN512VLH12")||cpuis("MK22FN512VDC12")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VDC12R")||cpuis("MK22FN512VFX12")||cpuis("MK22FN512VFX12R")||cpuis("MK22FN512VLH12R")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("KK28FN2M0CAU15R")||cpuis("MK28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")||cpuis("KK26FN2M0CAC18R")||cpuis("MK22FN128VLH10R")||cpuis("MK27FN2M0VMI15")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK65FN2M0CAC18*")
|
|
width 9.
|
|
newline
|
|
group.byte 0x02++0x00
|
|
line.byte 0x00 "OSC_DIV,OSC Clock Divider Register"
|
|
bitfld.byte 0x00 6.--7. " ERPS ,ERCLK prescaler" "/1,/2,/4,/8"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "Memories and Memory Interfaces"
|
|
tree "FMC (Flash Memory Controller)"
|
|
base ad:0x4001F000
|
|
width 9.
|
|
sif cpuis("MK02*")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VDC12R")||cpuis("MK22FN512VFX12")||cpuis("MK22FN512VFX12R")||cpuis("MK22FN512VLH12R")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PFAPR,Flash Access Protection Register"
|
|
bitfld.long 0x00 18. " M2PFD ,Master 2 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 17. " M1PFD ,Master 1 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 16. " M0PFD ,Master 0 prefetch disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 4.--5. " M2AP ,Master 2 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 2.--3. " M1AP ,Master 1 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 0.--1. " M0AP ,Master 0 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
elif cpuis("MK20FN1M0VLQ12R")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PFAPR,Flash Access Protection Register"
|
|
bitfld.long 0x00 22. " M6PFD ,Master 6 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 19. " M3PFD ,Master 3 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 18. " M2PFD ,Master 2 prefetch disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 17. " M1PFD ,Master 1 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 16. " M0PFD ,Master 0 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 12.--13. " M6AP ,Master 6 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
newline
|
|
bitfld.long 0x00 6.--7. " M3AP ,Master 3 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 4.--5. " M2AP ,Master 2 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 2.--3. " M1AP ,Master 1 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 0.--1. " M0AP ,Master 0 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
elif cpuis("MK66*")||cpuis("MK65*")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PFAPR,Flash Access Protection Register"
|
|
sif cpuis("MK66FN2M0VLQ18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK65FN2M0CAC18R")
|
|
bitfld.long 0x00 23. " M7PFD ,Master 7 prefetch disable" "No,Yes"
|
|
endif
|
|
bitfld.long 0x00 22. " M6PFD ,Master 6 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 21. " M5PFD ,Master 5 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 20. " M4PFD ,Master 4 prefetch disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 19. " M3PFD ,Master 3 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 18. " M2PFD ,Master 2 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 17. " M1PFD ,Master 1 prefetch disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 16. " M0PFD ,Master 0 prefetch disable" "No,Yes"
|
|
newline
|
|
sif cpuis("MK66FN2M0VLQ18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK65FN2M0CAC18R")
|
|
bitfld.long 0x00 14.--15. " M7AP ,Master 7 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
endif
|
|
bitfld.long 0x00 12.--13. " M6AP ,Master 6 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 10.--11. " M5AP ,Master 5 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 8.--9. " M4AP ,Master 4 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
newline
|
|
bitfld.long 0x00 6.--7. " M3AP ,Master 3 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 4.--5. " M2AP ,Master 2 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 2.--3. " M1AP ,Master 1 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " M0AP ,Master 0 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
elif cpuis("?K26*")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PFAPR,Flash Access Protection Register"
|
|
bitfld.long 0x00 22. " M6PFD ,Master 6 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 21. " M5PFD ,Master 5 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 20. " M4PFD ,Master 4 prefetch disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 18. " M2PFD ,Master 2 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 17. " M1PFD ,Master 1 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 16. " M0PFD ,Master 0 prefetch disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 12.--13. " M6AP ,Master 6 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 10.--11. " M5AP ,Master 5 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 8.--9. " M4AP ,Master 4 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
newline
|
|
bitfld.long 0x00 4.--5. " M2AP ,Master 2 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 2.--3. " M1AP ,Master 1 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 0.--1. " M0AP ,Master 0 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
elif cpuis("MK64*")||cpuis("MK63*")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PFAPR,Flash Access Protection Register"
|
|
sif cpuis("MK66FN2M0VLQ18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK65FN2M0CAC18R")
|
|
bitfld.long 0x00 23. " M7PFD ,Master 7 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 22. " M6PFD ,Master 6 prefetch disable" "No,Yes"
|
|
endif
|
|
bitfld.long 0x00 21. " M5PFD ,Master 5 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 20. " M4PFD ,Master 4 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 19. " M3PFD ,Master 3 prefetch disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 18. " M2PFD ,Master 2 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 17. " M1PFD ,Master 1 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 16. " M0PFD ,Master 0 prefetch disable" "No,Yes"
|
|
newline
|
|
sif cpuis("MK66FN2M0VLQ18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK65FN2M0CAC18R")
|
|
bitfld.long 0x00 14.--15. " M7AP ,Master 7 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 12.--13. " M6AP ,Master 6 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
endif
|
|
bitfld.long 0x00 10.--11. " M5AP ,Master 5 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 8.--9. " M4AP ,Master 4 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 6.--7. " M3AP ,Master 3 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
newline
|
|
bitfld.long 0x00 4.--5. " M2AP ,Master 2 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 2.--3. " M1AP ,Master 1 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 0.--1. " M0AP ,Master 0 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
elif cpuis("MK21F*MC12")||cpuis("MK24F*LL12")||cpuis("MK24F*DC12")||cpuis("MK24F*LQ12")||cpuis("MK22F*LQ12")||cpuis("MK22F*MD12")||cpuis("MK21F*LQ")||cpuis("MK21F*MD")||cpuis("MK20DN512ZCAB10R")||cpuis("MK20DX256VLQ10R")||cpuis("MK20DX256VLK10R")||cpuis("MK21FX512VMD10")||cpuis("MK21FN1M0VMD10")||cpuis("MK21FN1M0VMC10")||cpuis("MK21FX512VMC10")||cpuis("MK22FN1M0AVLK12")||cpuis("MK22FX512AVLK12")||cpuis("MK22FN1M0VLK10")||cpuis("MK22FN1M0AVLL12")||cpuis("MK22FX512AVLL12")||cpuis("MK22FN1M0VLL10")||cpuis("MK22FN1M0AVMC12")||cpuis("MK22FX512AVMC12")||cpuis("MK22FN1M0AVLQ12")||cpuis("MK22FN1M0AVMD12")||cpuis("MK22FX512AVLQ12")||cpuis("MK22FX512AVMD12")||cpuis("MK22FN1M0VLQ10")||cpuis("MK22FN1M0VMC10")||cpuis("MK24FN1M0CAJ12R")||cpuis("MK24FN1M0VDC12R")||cpuis("MK24FN1M0VLL12")||cpuis("MK24FN1M0VLL12R")||cpuis("MK24FN1M0VLQ12R")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PFAPR,Flash Access Protection Register"
|
|
bitfld.long 0x00 21. " M5PFD ,Master 5 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 20. " M4PFD ,Master 4 prefetch disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 18. " M2PFD ,Master 2 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 17. " M1PFD ,Master 1 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 16. " M0PFD ,Master 0 prefetch disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " M5AP ,Master 5 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 8.--9. " M4AP ,Master 4 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
newline
|
|
bitfld.long 0x00 4.--5. " M2AP ,Master 2 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 2.--3. " M1AP ,Master 1 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 0.--1. " M0AP ,Master 0 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
elif cpuis("MK22F*DC10")||cpuis("MK22F*LL10")||cpuis("MK22F*MP10")||cpuis("MK22F*LH10")||cpuis("MK22F*DC12")||cpuis("MK22F*LL12")||cpuis("MK22F*MP12")||cpuis("MK22F*LH12")||cpuis("MK21D*MC5")||cpuis("MK21D*LK5")||cpuis("MK22FN1M0VLH10")||cpuis("MK22FX512AVLH12")||cpuis("MK22FN512CBP12R")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN1M0AVLH12")||cpuis("MK22FN128CAH12R")
|
|
sif !cpuis("MK22FN1M0VLL10")&&!cpuis("MK22FN1M0AVLL12")&&!cpuis("MK22FX512AVLL12")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PFAPR,Flash Access Protection Register"
|
|
bitfld.long 0x00 20. " M4PFD ,Master 4 prefetch disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 18. " M2PFD ,Master 2 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 17. " M1PFD ,Master 1 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 16. " M0PFD ,Master 0 prefetch disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 8.--9. " M4AP ,Master 4 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
newline
|
|
bitfld.long 0x00 4.--5. " M2AP ,Master 2 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 2.--3. " M1AP ,Master 1 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 0.--1. " M0AP ,Master 0 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PFAPR,Flash Access Protection Register"
|
|
sif !cpuis("MK?0D*5")&&!cpuis("MK20DX256VMC7R")&&!cpuis("MK20DX256VLK7R")&&!cpuis("MK20DX64VEX7")&&!cpuis("MK20DX128VEX7")&&!cpuis("MK20DX256VEX7")&&!cpuis("MK20DX64VMB7")&&!cpuis("MK20DX128VMB7")&&!cpuis("MK20DX256VMB7")&&!cpuis("MK24FN256VDC12")
|
|
bitfld.long 0x00 23. " M7PFD ,Master 7 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 22. " M6PFD ,Master 6 prefetch disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 21. " M5PFD ,Master 5 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 20. " M4PFD ,Master 4 prefetch disable" "No,Yes"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 19. " M3PFD ,Master 3 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 18. " M2PFD ,Master 2 prefetch disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 17. " M1PFD ,Master 1 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 16. " M0PFD ,Master 0 prefetch disable" "No,Yes"
|
|
newline
|
|
sif !cpuis("MK?0D*5")&&!cpuis("MK20DX256VMC7R")&&!cpuis("MK20DX256VLK7R")&&!cpuis("MK20DX64VEX7")&&!cpuis("MK20DX128VEX7")&&!cpuis("MK20DX256VEX7")&&!cpuis("MK20DX64VMB7")&&!cpuis("MK20DX128VMB7")&&!cpuis("MK20DX256VMB7")&&!cpuis("MK24FN256VDC12")
|
|
bitfld.long 0x00 14.--15. " M7AP ,Master 7 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 12.--13. " M6AP ,Master 6 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " M5AP ,Master 5 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 8.--9. " M4AP ,Master 4 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 6.--7. " M3AP ,Master 3 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 4.--5. " M2AP ,Master 2 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
newline
|
|
bitfld.long 0x00 2.--3. " M1AP ,Master 1 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 0.--1. " M0AP ,Master 0 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
endif
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PFAPR,Flash Access Protection Register"
|
|
sif !cpuis("MK?0D*5")&&!cpuis("MK20DX256VMC7R")&&!cpuis("MK20DX256VLK7R")&&!cpuis("MK20DX64VEX7")&&!cpuis("MK20DX128VEX7")&&!cpuis("MK20DX256VEX7")&&!cpuis("MK20DX64VMB7")&&!cpuis("MK20DX128VMB7")&&!cpuis("MK20DX256VMB7")&&!cpuis("MK24FN256VDC12")
|
|
bitfld.long 0x00 23. " M7PFD ,Master 7 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 22. " M6PFD ,Master 6 prefetch disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 21. " M5PFD ,Master 5 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 20. " M4PFD ,Master 4 prefetch disable" "No,Yes"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 19. " M3PFD ,Master 3 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 18. " M2PFD ,Master 2 prefetch disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 17. " M1PFD ,Master 1 prefetch disable" "No,Yes"
|
|
bitfld.long 0x00 16. " M0PFD ,Master 0 prefetch disable" "No,Yes"
|
|
newline
|
|
sif !cpuis("MK?0D*5")&&!cpuis("MK20DX256VMC7R")&&!cpuis("MK20DX256VLK7R")&&!cpuis("MK20DX64VEX7")&&!cpuis("MK20DX128VEX7")&&!cpuis("MK20DX256VEX7")&&!cpuis("MK20DX64VMB7")&&!cpuis("MK20DX128VMB7")&&!cpuis("MK20DX256VMB7")&&!cpuis("MK24FN256VDC12")
|
|
bitfld.long 0x00 14.--15. " M7AP ,Master 7 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 12.--13. " M6AP ,Master 6 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " M5AP ,Master 5 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 8.--9. " M4AP ,Master 4 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 6.--7. " M3AP ,Master 3 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 4.--5. " M2AP ,Master 2 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
newline
|
|
bitfld.long 0x00 2.--3. " M1AP ,Master 1 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
bitfld.long 0x00 0.--1. " M0AP ,Master 0 access protection" "No access,RO accesses,WO accesses,RW accesses"
|
|
endif
|
|
sif cpuis("MK65*")||cpuis("MK66*")||cpuis("?K26*")||cpuis("MK20FN1M0VLQ12R")||cpuis("MK60FN1M0VLQ15")||cpuis("MK70*")||cpuis("MK27FN2M0VMI15")||cpuis("KK28FN2M0CAU15R")||cpuis("MK28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "PFB01CR,Flash Bank 0-1 Control Register"
|
|
rbitfld.long 0x00 28.--31. " B01RWSC ,Bank 0-1 read wait state control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
newline
|
|
bitfld.long 0x00 27. " CLCK_WAY[3] ,Cache lock way 3" "Not locked,Locked"
|
|
bitfld.long 0x00 26. " [2] ,Cache lock way 2" "Not locked,Locked"
|
|
bitfld.long 0x00 25. " [1] ,Cache lock way 1" "Not locked,Locked"
|
|
bitfld.long 0x00 24. " [0] ,Cache lock way 0" "Not locked,Locked"
|
|
newline
|
|
bitfld.long 0x00 23. " CINV_WAY[3] ,Cache invalidate way 3" "Not invalidated,Invalidated"
|
|
bitfld.long 0x00 22. " [2] ,Cache invalidate way 2" "Not invalidated,Invalidated"
|
|
bitfld.long 0x00 21. " [1] ,Cache invalidate way 1" "Not invalidated,Invalidated"
|
|
bitfld.long 0x00 20. " [0] ,Cache invalidate way 0" "Not invalidated,Invalidated"
|
|
newline
|
|
bitfld.long 0x00 19. " S_B_INV ,Invalidate prefetch speculation buffer" "Not invalidated,Invalidated"
|
|
rbitfld.long 0x00 17.--18. " B01MW ,Bank 0-1 memory width" "32 bits,64 bits,128 bits,?..."
|
|
bitfld.long 0x00 5.--7. " CRC ,Cache replacement control" "LRU per 4 ways,,LRU with 0-1 ways,LRU with 0-2 ways,?..."
|
|
newline
|
|
bitfld.long 0x00 4. " B01DCE ,Bank 0-1 data cache enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " B01ICE ,Bank 0-1 instruction cache enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " B01DPE ,Bank 0-1 data prefetch enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " B01IPE ,Bank 0-1 instruction prefetch enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " B01SEBE ,Bank 0-1 single entry buffer enable" "Disabled,Enabled"
|
|
sif cpuis("MK66FN2M0VLQ18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK65FN2M0CAC18R")
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "PFB1CR,Flash Bank 1 Control Register"
|
|
rbitfld.long 0x00 28.--31. " B1RWSC ,Bank 1 read wait state control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
rbitfld.long 0x00 17.--18. " B1MW ,Bank 1 memory width" "32 bits,64 bits,128 bits,?..."
|
|
newline
|
|
bitfld.long 0x00 4. " B1DCE ,Bank 1 data cache enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " B1ICE ,Bank 1 instruction cache enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " B1DPE ,Bank 1 data prefetch enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " B1IPE ,Bank 1 instruction prefetch enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " B1SEBE ,Bank 1 single entry buffer enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "PFB23CR,Flash Bank 2-3 Control Register"
|
|
rbitfld.long 0x00 28.--31. " B23RWSC ,Bank 2-3 read wait state control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
rbitfld.long 0x00 17.--18. " B23MW ,Bank 2-3 memory width" "32 bits,64 bits,128 bits,?..."
|
|
newline
|
|
bitfld.long 0x00 4. " B23DCE ,Bank 2-3 data cache enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " B23ICE ,Bank 2-3 instruction cache enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " B23DPE ,Bank 2-3 data prefetch enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " B23IPE ,Bank 2-3 instruction prefetch enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " B23SEBE ,Bank 2-3 single entry buffer enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "PFB0CR,Flash Bank 0 Control Register"
|
|
rbitfld.long 0x00 28.--31. " B0RWSC ,Bank 0 read wait state control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
newline
|
|
bitfld.long 0x00 27. " CLCK_WAY[3] ,Cache lock way 3" "Not locked,Locked"
|
|
bitfld.long 0x00 26. " [2] ,Cache lock way 2" "Not locked,Locked"
|
|
bitfld.long 0x00 25. " [1] ,Cache lock way 1" "Not locked,Locked"
|
|
bitfld.long 0x00 24. " [0] ,Cache lock way 0" "Not locked,Locked"
|
|
newline
|
|
bitfld.long 0x00 23. " CINV_WAY[3] ,Cache invalidate way 3" "Not invalidated,Invalidated"
|
|
bitfld.long 0x00 22. " [2] ,Cache invalidate way 2" "Not invalidated,Invalidated"
|
|
bitfld.long 0x00 21. " [1] ,Cache invalidate way 1" "Not invalidated,Invalidated"
|
|
bitfld.long 0x00 20. " [0] ,Cache invalidate way 0" "Not invalidated,Invalidated"
|
|
newline
|
|
sif cpuis("MK2?D*")||cpuis("MK1?D*")||cpuis("MK02*")||cpuis("MK20DN512ZCAB10R")||cpuis("MK22F*DC10")||cpuis("MK22F*LL10")||cpuis("MK22F*MP10")||cpuis("MK22F*LH10")||cpuis("MK22F*DC12")||cpuis("MK22F*LL12")||cpuis("MK22F*MP12")||cpuis("MK22F*LH12")||cpuis("MK21D*MC5")||cpuis("MK21D*LK5")||cpuis("MK20DX256VLQ10R")||cpuis("MK20DX256VLK10R")||cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK30DX256ZVLQ10")||cpuis("MK22FN512CBP12R")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN128CAH12R")||cpuis("MK50DN512ZCLL10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DX256ZCLQ10")||cpuis("MK51DN512ZCLL10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DX256ZVLL10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DN512ZCAB10R")||cpuis("MKS2?FN???V??12")||cpuis("KK20DN512ZCAB10R")||cpuis("KK22FN???C?P12R")||cpuis("MK22FN512V??12*")||cpuis("KK22FN???CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")
|
|
sif !cpuis("MK22FN1M0VLL10")&&!cpuis("MK22FN1M0VLH10")&&!cpuis("MK22FX512AVLL12")&&!cpuis("MK22FN1M0AVLL12")&&!cpuis("MK22FN1M0AVLH12")&&!cpuis("MK22FX512AVLH12")
|
|
bitfld.long 0x00 19. " S_B_INV ,Invalidate prefetch speculation buffer" "Not invalidated,Invalidated"
|
|
rbitfld.long 0x00 17.--18. " B0MW ,Bank 0 memory width" "32 bits,64 bits,?..."
|
|
bitfld.long 0x00 5.--7. " CRC ,Cache replacement control" "LRU per 4 ways,,LRU with 0-1 ways,LRU with 0-2 ways,?..."
|
|
newline
|
|
else
|
|
bitfld.long 0x00 19. " S_B_INV ,Invalidate prefetch speculation buffer" "Not invalidated,Invalidated"
|
|
rbitfld.long 0x00 17.--18. " B0MW ,Bank 0 memory width" "32 bits,64 bits,128 bits,?..."
|
|
bitfld.long 0x00 5.--7. " CRC ,Cache replacement control" "LRU per 4 ways,,LRU with 0-1 ways,LRU with 0-2 ways,?..."
|
|
newline
|
|
endif
|
|
else
|
|
bitfld.long 0x00 19. " S_B_INV ,Invalidate prefetch speculation buffer" "Not invalidated,Invalidated"
|
|
rbitfld.long 0x00 17.--18. " B0MW ,Bank 0 memory width" "32 bits,64 bits,128 bits,?..."
|
|
bitfld.long 0x00 5.--7. " CRC ,Cache replacement control" "LRU per 4 ways,,LRU with 0-1 ways,LRU with 0-2 ways,?..."
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 4. " B0DCE ,Bank 0 data cache enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " B0ICE ,Bank 0 instruction cache enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " B0DPE ,Bank 0 data prefetch enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " B0IPE ,Bank 0 instruction prefetch enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " B0SEBE ,Bank 0 single entry buffer enable" "Disabled,Enabled"
|
|
sif !cpuis("MK?0D*5")&&!cpuis("MK02*")&&!cpuis("MK22FN256VMP12")&&!cpuis("MK22FN256CAH12R")&&!cpuis("MK22FN128CAH12R")&&!cpuis("MK24FN256VDC12")&&!cpuis("MKS2?FN???V??12")&&!cpuis("KK22FN???CAH12R")&&!cpuis("MK22FN256VLL12R")&&!cpuis("MK22FN128VLH10R")&&!cpuis("MK22FN1M0VLL10")&&!cpuis("MK22FN1M0VLH10")&&!cpuis("MK22FX512AVLL12")&&!cpuis("MK22FN1M0AVLL12")&&!cpuis("MK22FX512AVLH12")&&!cpuis("MK22FN1M0AVLH12")
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "PFB1CR,Flash Bank 1 Control Register"
|
|
rbitfld.long 0x00 28.--31. " B1RWSC ,Bank 1 read wait state control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
sif cpuis("MK2?D*")||cpuis("MK1?D*")||cpuis("MK02*")||cpuis("MK20DN512ZCAB10R")||cpuis("MK22F*DC10")||cpuis("MK22F*LL10")||cpuis("MK22F*MP10")||cpuis("MK22F*LH10")||cpuis("MK22F*DC12")||cpuis("MK22F*LL12")||cpuis("MK22F*MP12")||cpuis("MK22F*LH12")||cpuis("MK21D*MC5")||cpuis("MK21D*LK5")||cpuis("MK20DX256VLQ10R")||cpuis("MK20DX256VLK10R")||cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK30DX256ZVLQ10")||cpuis("MK22FN512CBP12R")||cpuis("MK22FN512CBP12R")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN256CAP12R")||cpuis("MK50DN512ZCLL10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DX256ZCLQ10")||cpuis("MK51DN512ZCLL10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DX256ZVLL10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DN512ZCAB10R")||cpuis("KK20DN512ZCAB10R")||cpuis("KK22FN???C?P12R")||cpuis("MK22FN512V??12*")
|
|
rbitfld.long 0x00 17.--18. " B1MW ,Bank 1 memory width" "32 bits,64 bits,?..."
|
|
newline
|
|
else
|
|
rbitfld.long 0x00 17.--18. " B1MW ,Bank 1 memory width" "32 bits,64 bits,128 bits,?..."
|
|
newline
|
|
endif
|
|
sif cpuis("MK60DN512ZCAB10R")
|
|
bitfld.long 0x00 4. " B23DCE ,Bank 2-3 data cache enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " B23ICE ,Bank 2-3 instruction cache enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " B23DPE ,Bank 2-3 data prefetch enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " B23IPE ,Bank 2-3 instruction prefetch enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " B23SEBE ,Bank 23 single entry buffer enable" "Disabled,Enabled"
|
|
elif !cpuis("MK?0D*7")&&!cpuis("MK20DX256VMC7R")&&!cpuis("MK20DX256VLK7R")&&!cpuis("MK30DX256VLL7R")&&!cpuis("MK20DX64VMB7")&&!cpuis("MK20DX128VMB7")&&!cpuis("MK20DX256VMB7")
|
|
bitfld.long 0x00 4. " B1DCE ,Bank 1 data cache enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " B1ICE ,Bank 1 instruction cache enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " B1DPE ,Bank 1 data prefetch enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " B1IPE ,Bank 1 instruction prefetch enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " B1SEBE ,Bank 1 single entry buffer enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
endif
|
|
width 13.
|
|
tree "Cache Directory Storage Registers"
|
|
sif cpuis("MK22D*")||cpuis("MK21D*")||cpuis("MK11D*")||cpuis("MK12D*")||cpuis("MK21D*MC5")||cpuis("MK21D*LK5")
|
|
group.long (0x0+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 4.--18. 1. " TAG ,15-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x4+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 4.--18. 1. " TAG ,15-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
elif cpuis("MK10D*5")||cpuis("MK20D*5")
|
|
group.long (0x0+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x4+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
elif cpuis("MK10D*10")||cpuis("MK10D*10R")||cpuis("MK10D*7")||cpuis("MK20D*7")||cpuis("MK20D*10*")||cpuis("MK20DN512ZCAB10R")||cpuis("MK20DX256VLQ10R")||cpuis("MK20DX256VLK10R")||cpuis("MK20DX256VMC7R")||cpuis("MK20DX256VLK7R")||cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK30DX256ZVLQ10")||cpuis("MK50DN512ZCLL10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DX256ZCLQ10")||cpuis("MK51DN512ZCLL10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DX256ZVLL10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DN512ZCAB10R")||cpuis("KK20DN512ZCAB10R")
|
|
group.long (0x0+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x4+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x8+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0xC+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x10+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_4,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x14+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_5,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x18+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_6,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x1C+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_7,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
elif cpuis("MK02*")||cpuis("MK22F*DC10")||cpuis("MKS2?FN???V??12")||cpuis("MK22F*LL10")||cpuis("MK22F*MP10")||cpuis("MK22F*LH10")||cpuis("MK22F*DC12")||cpuis("MK22F*LL12")||cpuis("MK22F*MP12")||cpuis("MK22F*LH12")||cpuis("MK22FN512CBP12R")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN128CAH12R")
|
|
sif !cpuis("MK22FN1M0VLL10")&&!cpuis("MK22FN1M0VLH10")&&!cpuis("MK22FX512AVLL12")&&!cpuis("MK22FN1M0AVLL12")&&!cpuis("MK22FX512AVLH12")&&!cpuis("MK22FN1M0AVLH12")
|
|
group.long (0x0+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x4+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x8+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0xC+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
else
|
|
group.long (0x0+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x4+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x8+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0xC+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
endif
|
|
elif cpuis("MK66*")||cpuis("MK65*")||cpuis("MK26*")||cpuis("KK26FN2M0CAC18R")||cpuis("MK27FN2M0VMI15")||cpuis("?K28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")
|
|
group.long (0x0+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--21. 1. " TAG ,16-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x4+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--21. 1. " TAG ,16-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x8+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--21. 1. " TAG ,16-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0xC+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--21. 1. " TAG ,16-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
elif cpuis("MK63*")||cpuis("MK64*")||cpuis("MK24*")||cpuis("MK22FN128VLH10R")||cpuis("MK22F*LQ12")||cpuis("MK22F*MD12")
|
|
sif !cpuis("MK22FN1M0AVLQ12")&&!cpuis("MK22FX512AVLQ12")&&!cpuis("MK22FN1M0AVMD12")&&!cpuis("MK22FX512AVMD12")
|
|
group.long (0x0+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x4+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x8+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0xC+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
else
|
|
group.long (0x0+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x4+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x8+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0xC+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
endif
|
|
elif cpuis("KK22FN???C?P12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VFX12*")||cpuis("MK22FN512VLH12R")||cpuis("KK22FN???CAH12R")||cpuis("MK22FN256VLL12R")
|
|
group.long (0x0+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x4+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x8+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0xC+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x10+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_4,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x14+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_5,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x18+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_6,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x1C+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_7,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
else
|
|
group.long (0x0+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x4+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x8+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0xC+0x100)++0x03
|
|
line.long 0x00 "TAGVDW0S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
endif
|
|
sif cpuis("MK22D*")||cpuis("MK21D*")||cpuis("MK11D*")||cpuis("MK12D*")||cpuis("MK21D*LK5")||cpuis("MK21D*MC5")
|
|
group.long (0x8+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 4.--18. 1. " TAG ,15-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0xC+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 4.--18. 1. " TAG ,15-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
elif cpuis("MK10D*5")||cpuis("MK20D*5")
|
|
group.long (0x8+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0xC+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
elif cpuis("MK10D*10")||cpuis("MK10D*10R")||cpuis("MK10D*7")||cpuis("MK20D*7")||cpuis("MK20D*10*")||cpuis("MK20DN512ZCAB10R")||cpuis("MK20DX256VLQ10R")||cpuis("MK20DX256VLK10R")||cpuis("MK20DX256VMC7R")||cpuis("MK20DX256VLK7R")||cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK30DX256ZVLQ10")||cpuis("MK50DN512ZCLL10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DX256ZCLQ10")||cpuis("MK51DN512ZCLL10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DX256ZVLL10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DN512ZCAB10R")||cpuis("KK20DN512ZCAB10R")
|
|
group.long (0x20+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x24+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x28+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x2C+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x30+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_4,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x34+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_5,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x38+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_6,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x3C+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_7,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
elif cpuis("MK02*")||cpuis("MK22F*DC12")||cpuis("MKS2?FN???V??12")||cpuis("MK22F*LL12")||cpuis("MK22F*MP12")||cpuis("MK22F*LH12")||cpuis("MK22F*DC10")||cpuis("MK22F*LL10")||cpuis("MK22F*MP10")||cpuis("MK22F*LH10")||cpuis("MK22FN512CBP12R")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN128CAH12R")
|
|
sif !cpuis("MK22FX512AVLL12")&&!cpuis("MK22FN1M0AVLL12")&&!cpuis("MK22FN1M0AVLH12")&&!cpuis("MK22FX512AVLH12")&&!cpuis("MK22FN1M0VLL10")&&!cpuis("MK22FN1M0VLH10")
|
|
group.long (0x20+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x24+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x28+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x2C+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
else
|
|
group.long (0x10+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x14+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x18+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x1C+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
endif
|
|
elif cpuis("MK66*")||cpuis("MK65*")||cpuis("MK26*")||cpuis("KK26FN2M0CAC18R")||cpuis("MK27FN2M0VMI15")||cpuis("?K28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")
|
|
group.long (0x10+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--21. 1. " TAG ,16-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x14+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--21. 1. " TAG ,16-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x18+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--21. 1. " TAG ,16-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x1C+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--21. 1. " TAG ,16-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
elif cpuis("MK63*")||cpuis("MK64*")||cpuis("MK24*")||cpuis("MK22FN128VLH10R")
|
|
group.long (0x10+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x14+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x18+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x1C+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
elif cpuis("KK22FN???C?P12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VFX12*")||cpuis("MK22FN512VLH12R")||cpuis("KK22FN???CAH12R")||cpuis("MK22FN256VLL12R")
|
|
group.long (0x0+0x120)++0x03
|
|
line.long 0x00 "TAGVDW1S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x4+0x120)++0x03
|
|
line.long 0x00 "TAGVDW1S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x8+0x120)++0x03
|
|
line.long 0x00 "TAGVDW1S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0xC+0x120)++0x03
|
|
line.long 0x00 "TAGVDW1S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x10+0x120)++0x03
|
|
line.long 0x00 "TAGVDW1S_4,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x14+0x120)++0x03
|
|
line.long 0x00 "TAGVDW1S_5,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x18+0x120)++0x03
|
|
line.long 0x00 "TAGVDW1S_6,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x1C+0x120)++0x03
|
|
line.long 0x00 "TAGVDW1S_7,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
else
|
|
group.long (0x10+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x14+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x18+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x1C+0x100)++0x03
|
|
line.long 0x00 "TAGVDW1S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
endif
|
|
sif cpuis("MK22D*")||cpuis("MK21D*")||cpuis("MK11D*")||cpuis("MK12D*")||cpuis("MK21D*MC5")||cpuis("MK21D*LK5")
|
|
group.long (0x10+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 4.--18. 1. " TAG ,15-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x14+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 4.--18. 1. " TAG ,15-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
elif cpuis("MK10D*5")||cpuis("MK20D*5")
|
|
group.long (0x10+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x14+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
elif cpuis("MK10D*10")||cpuis("MK10D*10R")||cpuis("MK10D*7")||cpuis("MK20D*7")||cpuis("MK20D*10*")||cpuis("MK20DN512ZCAB10R")||cpuis("MK20DX256VLQ10R")||cpuis("MK20DX256VLK10R")||cpuis("MK20DX256VMC7R")||cpuis("MK20DX256VLK7R")||cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK30DX256ZVLQ10")||cpuis("MK50DN512ZCLL10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DX256ZCLQ10")||cpuis("MK51DN512ZCLL10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DX256ZVLL10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DN512ZCAB10R")||cpuis("KK20DN512ZCAB10R")
|
|
group.long (0x40+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x44+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x48+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x4C+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x50+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_4,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x54+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_5,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x58+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_6,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x5C+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_7,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
elif cpuis("MK02*")||cpuis("MK22F*DC10")||cpuis("MKS2?FN???V??12")||cpuis("MK22F*LL10")||cpuis("MK22F*MP10")||cpuis("MK22F*LH10")||cpuis("MK22F*DC12")||(cpuis("MK22F*LL12"))||cpuis("MK22F*MP12")||cpuis("MK22F*LH12")||cpuis("MK22FN512CBP12R")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN128CAH12R")
|
|
sif !cpuis("MK22FN1M0VLL10")&&!cpuis("MK22FN1M0VLH10")&&!cpuis("MK22FX512AVLL12")&&!cpuis("MK22FN1M0AVLL12")&&!cpuis("MK22FN1M0AVLH12")&&!cpuis("MK22FX512AVLH12")
|
|
group.long (0x40+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x44+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x48+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x4C+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
else
|
|
group.long (0x20+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x24+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x28+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x2C+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
endif
|
|
elif cpuis("MK66*")||cpuis("MK65*")||cpuis("MK26*")||cpuis("KK26FN2M0CAC18R")||cpuis("MK27FN2M0VMI15")||cpuis("?K28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")
|
|
group.long (0x20+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--21. 1. " TAG ,16-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x24+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--21. 1. " TAG ,16-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x28+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--21. 1. " TAG ,16-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x2C+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--21. 1. " TAG ,16-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
elif cpuis("MK63*")||cpuis("MK64*")||cpuis("MK24*")||cpuis("MK22FN128VLH10R")||cpuis("MK22F*LQ12")||cpuis("MK22F*MD12")
|
|
sif !cpuis("MK22FN1M0AVLQ12")&&!cpuis("MK22FX512AVLQ12")&&!cpuis("MK22FN1M0AVMD12")&&!cpuis("MK22FX512AVMD12")
|
|
group.long (0x20+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x24+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x28+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x2C+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
else
|
|
group.long (0x20+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x24+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x28+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x2C+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
endif
|
|
elif cpuis("KK22FN???C?P12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VFX12*")||cpuis("MK22FN512VLH12R")||cpuis("KK22FN???CAH12R")||cpuis("MK22FN256VLL12R")
|
|
group.long (0x0+0x140)++0x03
|
|
line.long 0x00 "TAGVDW2S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x4+0x140)++0x03
|
|
line.long 0x00 "TAGVDW2S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x8+0x140)++0x03
|
|
line.long 0x00 "TAGVDW2S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0xC+0x140)++0x03
|
|
line.long 0x00 "TAGVDW2S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x10+0x140)++0x03
|
|
line.long 0x00 "TAGVDW2S_4,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x14+0x140)++0x03
|
|
line.long 0x00 "TAGVDW2S_5,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x18+0x140)++0x03
|
|
line.long 0x00 "TAGVDW2S_6,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x1C+0x140)++0x03
|
|
line.long 0x00 "TAGVDW2S_7,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
else
|
|
group.long (0x20+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x24+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x28+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x2C+0x100)++0x03
|
|
line.long 0x00 "TAGVDW2S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
endif
|
|
sif cpuis("MK22D*")||cpuis("MK21D*")||cpuis("MK11D*")||cpuis("MK12D*")||cpuis("MK21D*MC5")||cpuis("MK21D*LK5")
|
|
group.long (0x18+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 4.--18. 1. " TAG ,15-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x1C+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 4.--18. 1. " TAG ,15-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
elif cpuis("MK10D*5")||cpuis("MK20D*5")
|
|
group.long (0x18+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x1C+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
elif cpuis("MK10D*10")||cpuis("MK10D*10R")||cpuis("MK10D*7")||cpuis("MK20D*7")||cpuis("MK20D*10*")||cpuis("MK20DN512ZCAB10R")||cpuis("MK20DX256VLQ10R")||cpuis("MK20DX256VLK10R")||cpuis("MK20DX256VMC7R")||cpuis("MK20DX256VLK7R")||cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK30DX256ZVLQ10")||cpuis("MK50DN512ZCLL10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DX256ZCLQ10")||cpuis("MK51DN512ZCLL10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DX256ZVLL10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DN512ZCAB10R")||cpuis("KK20DN512ZCAB10R")
|
|
group.long (0x60+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x64+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x68+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x6C+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x70+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_4,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x74+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_5,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x78+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_6,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x7C+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_7,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--18. 1. " TAG ,13-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
elif cpuis("MK02*")||cpuis("MK22F*DC10")||cpuis("MKS2?FN???V??12")||cpuis("MK22F*LL10")||cpuis("MK22F*MP10")||cpuis("MK22F*LH10")||cpuis("MK22F*DC12")||cpuis("MK22F*LL12")||cpuis("MK22F*MP12")||cpuis("MK22F*LH12")||cpuis("MK22FN512CBP12R")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN128CAH12R")
|
|
sif !cpuis("MK22FN1M0VLL10")&&!cpuis("MK22FN1M0VLH10")&&!cpuis("MK22FN1M0AVLL12")&&!cpuis("MK22FX512AVLL12")&&!cpuis("MK22FN1M0AVLH12")&&!cpuis("MK22FX512AVLH12")
|
|
group.long (0x60+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x64+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x68+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x6C+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
else
|
|
group.long (0x30+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x34+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x38+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x3C+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
endif
|
|
elif cpuis("MK66*")||cpuis("MK65*")||cpuis("MK26*")||cpuis("KK26FN2M0CAC18R")||cpuis("MK27FN2M0VMI15")||cpuis("?K28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")
|
|
group.long (0x30+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--21. 1. " TAG ,16-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x34+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--21. 1. " TAG ,16-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x38+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--21. 1. " TAG ,16-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x3C+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--21. 1. " TAG ,16-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
elif cpuis("MK63*")||cpuis("MK64*")||cpuis("MK24*")||cpuis("MK22FN128VLH10R")||cpuis("MK22F*LQ12")||cpuis("MK22F*MD12")
|
|
sif !cpuis("MK22FN1M0AVLQ12")&&!cpuis("MK22FX512AVLQ12")&&!cpuis("MK22FN1M0AVMD12")&&!cpuis("MK22FX512AVMD12")
|
|
group.long (0x30+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x34+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x38+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x3C+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
else
|
|
group.long (0x30+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x34+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x38+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x3C+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
endif
|
|
elif cpuis("KK22FN???C?P12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VFX12*")||cpuis("MK22FN512VLH12R")||cpuis("KK22FN???CAH12R")||cpuis("MK22FN256VLL12R")
|
|
group.long (0x0+0x160)++0x03
|
|
line.long 0x00 "TAGVDW3S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x4+0x160)++0x03
|
|
line.long 0x00 "TAGVDW3S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x8+0x160)++0x03
|
|
line.long 0x00 "TAGVDW3S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0xC+0x160)++0x03
|
|
line.long 0x00 "TAGVDW3S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x10+0x160)++0x03
|
|
line.long 0x00 "TAGVDW3S_4,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x14+0x160)++0x03
|
|
line.long 0x00 "TAGVDW3S_5,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x18+0x160)++0x03
|
|
line.long 0x00 "TAGVDW3S_6,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x1C+0x160)++0x03
|
|
line.long 0x00 "TAGVDW3S_7,Cache Directory Storage"
|
|
hexmask.long.word 0x00 5.--18. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
else
|
|
group.long (0x30+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_0,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x34+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_1,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x38+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_2,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
group.long (0x3C+0x100)++0x03
|
|
line.long 0x00 "TAGVDW3S_3,Cache Directory Storage"
|
|
hexmask.long.word 0x00 6.--19. 1. " TAG ,14-bit tag for cache entry"
|
|
bitfld.long 0x00 0. " VALID ,1-bit valid for cache entry" "Not valid,Valid"
|
|
endif
|
|
tree.end
|
|
tree "Cache Data Storage Registers"
|
|
sif cpuis("MK11D*")||cpuis("MK12D*")||cpuis("MK22D*")||cpuis("MK21D*")||cpuis("MK21D*LK5")||cpuis("MK21D*MC5")
|
|
group.long 0x200++0x3F
|
|
line.long 0x00 "DATAW0S_0U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW0S0L,Cache Data Storage (Lower Word)"
|
|
line.long 0x08 "DATAW0S_1U,Cache Data Storage (Upper Word)"
|
|
line.long 0x0C "DATAW0S1L,Cache Data Storage (Lower Word)"
|
|
line.long 0x10 "DATAW1S_0U,Cache Data Storage (Upper Word)"
|
|
line.long 0x14 "DATAW1S0L,Cache Data Storage (Lower Word)"
|
|
line.long 0x18 "DATAW1S_1U,Cache Data Storage (Upper Word)"
|
|
line.long 0x1C "DATAW1S1L,Cache Data Storage (Lower Word)"
|
|
line.long 0x20 "DATAW2S_0U,Cache Data Storage (Upper Word)"
|
|
line.long 0x24 "DATAW2S0L,Cache Data Storage (Lower Word)"
|
|
line.long 0x28 "DATAW2S_1U,Cache Data Storage (Upper Word)"
|
|
line.long 0x2C "DATAW2S1L,Cache Data Storage (Lower Word)"
|
|
line.long 0x30 "DATAW3S_0U,Cache Data Storage (Upper Word)"
|
|
line.long 0x34 "DATAW3S0L,Cache Data Storage (Lower Word)"
|
|
line.long 0x38 "DATAW3S_1U,Cache Data Storage (Upper Word)"
|
|
line.long 0x3C "DATAW3S1L,Cache Data Storage (Lower Word)"
|
|
elif cpuis("MK10D*5")||cpuis("MK20D*5")
|
|
group.long 0x200++0x1F
|
|
line.long 0x00 "DATAW0S0,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW0S1,Cache Data Storage (Lower Word)"
|
|
group.long 0x208++0x1F
|
|
line.long 0x00 "DATAW1S0,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW1S1,Cache Data Storage (Lower Word)"
|
|
group.long 0x210++0x1F
|
|
line.long 0x00 "DATAW2S0,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW2S1,Cache Data Storage (Lower Word)"
|
|
group.long 0x218++0x1F
|
|
line.long 0x00 "DATAW3S0,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW3S1,Cache Data Storage (Lower Word)"
|
|
elif cpuis("MK02*")||cpuis("MK20DN512ZCAB10R")||cpuis("MK22F*DC12")||cpuis("MK22F*LL12")||cpuis("MK22F*MP12")||cpuis("MK22F*LH12")||cpuis("MK22F*DC10")||cpuis("MK22F*LL10")||cpuis("MK22F*MP10")||cpuis("MK22F*LH10")||cpuis("MK20DX256VLQ10R")||cpuis("MK20DX256VLK10R")||cpuis("MK20DX256VMC7R")||cpuis("MK20DX256VLK7R")||cpuis("MK10D*10")||cpuis("MK10D*10R")||cpuis("MK30DN512ZVLK10")||cpuis("MK30DN512ZVLQ10")||cpuis("MK30DN512ZVLQ10R")||cpuis("MK30DX256VLL7R")||cpuis("MK30DX256ZVLQ10")||cpuis("MK22FN512CBP12R")||cpuis("MK22FN512CBP12R")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN128CAH12R")||cpuis("MK50DN512ZCLL10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DX256ZCLQ10")||cpuis("MK51DN512ZCLL10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")||cpuis("MK20DX64VEX7")||cpuis("MK20DX128VEX7")||cpuis("MK20DX256VEX7")||cpuis("MK20DX64VMB7")||cpuis("MK20DX128VMB7")||cpuis("MK20DX256VMB7")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DX256ZVLL10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DN512ZCAB10R")
|
|
sif !cpuis("MK22FX512AVLL12")&&!cpuis("MK22FN1M0AVLL12")&&!cpuis("MK22FN1M0AVLH12")&&!cpuis("MK22FX512AVLH12")&&!cpuis("MK22FN1M0VLL10")&&!cpuis("MK22FN1M0VLH10")
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "DATAW0S0U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW0S0L,Cache Data Storage (Lower Word)"
|
|
group.long 0x208++0x07
|
|
line.long 0x00 "DATAW0S1U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW0S1L,Cache Data Storage (Lower Word)"
|
|
group.long 0x210++0x07
|
|
line.long 0x00 "DATAW0S2U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW0S2L,Cache Data Storage (Lower Word)"
|
|
group.long 0x218++0x07
|
|
line.long 0x00 "DATAW0S3U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW0S3L,Cache Data Storage (Lower Word)"
|
|
group.long 0x240++0x07
|
|
line.long 0x00 "DATAW1S0U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW1S0L,Cache Data Storage (Lower Word)"
|
|
group.long 0x248++0x07
|
|
line.long 0x00 "DATAW1S1U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW1S1L,Cache Data Storage (Lower Word)"
|
|
group.long 0x250++0x07
|
|
line.long 0x00 "DATAW1S2U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW1S2L,Cache Data Storage (Lower Word)"
|
|
group.long 0x258++0x07
|
|
line.long 0x00 "DATAW1S3U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW1S3L,Cache Data Storage (Lower Word)"
|
|
group.long 0x260++0x07
|
|
line.long 0x00 "DATAW1S4U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW1S4L,Cache Data Storage (Lower Word)"
|
|
group.long 0x268++0x07
|
|
line.long 0x00 "DATAW1S5U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW1S5L,Cache Data Storage (Lower Word)"
|
|
group.long 0x270++0x07
|
|
line.long 0x00 "DATAW1S6U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW1S6L,Cache Data Storage (Lower Word)"
|
|
group.long 0x278++0x07
|
|
line.long 0x00 "DATAW1S7U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW1S7L,Cache Data Storage (Lower Word)"
|
|
group.long 0x280++0x07
|
|
line.long 0x00 "DATAW2S0U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW2S0L,Cache Data Storage (Lower Word)"
|
|
group.long 0x288++0x07
|
|
line.long 0x00 "DATAW2S1U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW2S1L,Cache Data Storage (Lower Word)"
|
|
group.long 0x290++0x07
|
|
line.long 0x00 "DATAW2S2U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW2S2L,Cache Data Storage (Lower Word)"
|
|
group.long 0x298++0x07
|
|
line.long 0x00 "DATAW2S3U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW2S3L,Cache Data Storage (Lower Word)"
|
|
group.long 0x2A0++0x07
|
|
line.long 0x00 "DATAW2S4U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW2S4L,Cache Data Storage (Lower Word)"
|
|
group.long 0x2A8++0x07
|
|
line.long 0x00 "DATAW2S5U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW2S5L,Cache Data Storage (Lower Word)"
|
|
group.long 0x2B0++0x07
|
|
line.long 0x00 "DATAW2S6U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW2S6L,Cache Data Storage (Lower Word)"
|
|
group.long 0x2B8++0x07
|
|
line.long 0x00 "DATAW2S7U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW2S7L,Cache Data Storage (Lower Word)"
|
|
group.long 0x2C0++0x07
|
|
line.long 0x00 "DATAW3S0U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW3S0L,Cache Data Storage (Lower Word)"
|
|
group.long 0x2C8++0x07
|
|
line.long 0x00 "DATAW3S1U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW3S1L,Cache Data Storage (Lower Word)"
|
|
group.long 0x2D0++0x07
|
|
line.long 0x00 "DATAW3S2U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW3S2L,Cache Data Storage (Lower Word)"
|
|
group.long 0x2D8++0x07
|
|
line.long 0x00 "DATAW3S3U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW3S3L,Cache Data Storage (Lower Word)"
|
|
group.long 0x2E0++0x07
|
|
line.long 0x00 "DATAW3S4U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW3S4L,Cache Data Storage (Lower Word)"
|
|
group.long 0x2E8++0x07
|
|
line.long 0x00 "DATAW3S5U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW3S5L,Cache Data Storage (Lower Word)"
|
|
group.long 0x2F0++0x07
|
|
line.long 0x00 "DATAW3S6U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW3S6L,Cache Data Storage (Lower Word)"
|
|
group.long 0x2F8++0x07
|
|
line.long 0x00 "DATAW3S7U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW3S7L,Cache Data Storage (Lower Word)"
|
|
else
|
|
group.long 0x200++0xFF
|
|
line.long 0x00 "DATAW0S0UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW0S0MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW0S0ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW0S0LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x210++0xFF
|
|
line.long 0x00 "DATAW0S1UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW0S1MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW0S1ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW0S1LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x220++0xFF
|
|
line.long 0x00 "DATAW0S2UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW0S2MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW0S2ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW0S2LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x230++0xFF
|
|
line.long 0x00 "DATAW0S3UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW0S3MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW0S3ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW0S3LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x240++0xFF
|
|
line.long 0x00 "DATAW1S0UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW1S0MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW1S0ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW1S0LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x250++0xFF
|
|
line.long 0x00 "DATAW1S1UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW1S1MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW1S1ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW1S1LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x260++0xFF
|
|
line.long 0x00 "DATAW1S2UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW1S2MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW1S2ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW1S2LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x270++0xFF
|
|
line.long 0x00 "DATAW1S3UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW1S3MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW1S3ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW1S3LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x280++0xFF
|
|
line.long 0x00 "DATAW2S0UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW2S0MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW2S0ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW2S0LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x290++0xFF
|
|
line.long 0x00 "DATAW2S1UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW2S1MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW2S1ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW2S1LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x2A0++0xFF
|
|
line.long 0x00 "DATAW2S2UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW2S2MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW2S2ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW2S2LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x2B0++0xFF
|
|
line.long 0x00 "DATAW2S3UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW2S3MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW2S3ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW2S3LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x2C0++0xFF
|
|
line.long 0x00 "DATAW3S0UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW3S0MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW3S0ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW3S0LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x2D0++0xFF
|
|
line.long 0x00 "DATAW3S1UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW3S1MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW3S1ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW3S1LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x2E0++0xFF
|
|
line.long 0x00 "DATAW3S2UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW3S2MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW3S2ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW3S2LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x2F0++0xFF
|
|
line.long 0x00 "DATAW3S3UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW3S3MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW3S3ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW3S3LM,Cache Data Storage (Lowermost Word)"
|
|
endif
|
|
elif cpuis("MK64*")||cpuis("MK63*")||cpuis("MK24*")||cpuis("MK22FN128VLH10R")
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "DATAW0S0U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW0S0L,Cache Data Storage (Lower Word)"
|
|
group.long 0x208++0x07
|
|
line.long 0x00 "DATAW0S1U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW0S1L,Cache Data Storage (Lower Word)"
|
|
group.long 0x210++0x07
|
|
line.long 0x00 "DATAW0S2U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW0S2L,Cache Data Storage (Lower Word)"
|
|
group.long 0x218++0x07
|
|
line.long 0x00 "DATAW0S3U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW0S3L,Cache Data Storage (Lower Word)"
|
|
group.long 0x220++0x07
|
|
line.long 0x00 "DATAW1S0U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW1S0L,Cache Data Storage (Lower Word)"
|
|
group.long 0x228++0x07
|
|
line.long 0x00 "DATAW1S1U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW1S1L,Cache Data Storage (Lower Word)"
|
|
group.long 0x230++0x07
|
|
line.long 0x00 "DATAW1S2U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW1S2L,Cache Data Storage (Lower Word)"
|
|
group.long 0x238++0x07
|
|
line.long 0x00 "DATAW1S3U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW1S3L,Cache Data Storage (Lower Word)"
|
|
group.long 0x240++0x07
|
|
line.long 0x00 "DATAW2S0U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW2S0L,Cache Data Storage (Lower Word)"
|
|
group.long 0x248++0x07
|
|
line.long 0x00 "DATAW2S1U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW2S1L,Cache Data Storage (Lower Word)"
|
|
group.long 0x250++0x07
|
|
line.long 0x00 "DATAW2S2U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW2S2L,Cache Data Storage (Lower Word)"
|
|
group.long 0x258++0x07
|
|
line.long 0x00 "DATAW2S3U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW2S3L,Cache Data Storage (Lower Word)"
|
|
group.long 0x260++0x07
|
|
line.long 0x00 "DATAW3S0U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW3S0L,Cache Data Storage (Lower Word)"
|
|
group.long 0x268++0x07
|
|
line.long 0x00 "DATAW3S1U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW3S1L,Cache Data Storage (Lower Word)"
|
|
group.long 0x270++0x07
|
|
line.long 0x00 "DATAW3S2U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW3S2L,Cache Data Storage (Lower Word)"
|
|
group.long 0x278++0x07
|
|
line.long 0x00 "DATAW3S3U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW3S3L,Cache Data Storage (Lower Word)"
|
|
elif cpuis("MKS2?FN???V??12")||cpuis("MK20D????ZVLL10")||cpuis("MK20DN???ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10")||cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("KK22FN???C?P12R")||cpuis("MK22FN512VDC12")||cpuis("MK22FN512VFX12*")||cpuis("MK22FN512VLH12R")||cpuis("KK22FN???CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK10DN512ZVLK10*")||cpuis("MK10DN512ZVLL10*")||cpuis("MK10DN512ZVLQ10*")||cpuis("MK10DN512ZVMD10*")||cpuis("MK10DN512ZVMC10*")||cpuis("MK10DX256ZVLQ10*")||cpuis("MK10DX256ZVMD10*")
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "DATAW0S0U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW0S0L,Cache Data Storage (Lower Word)"
|
|
group.long 0x208++0x07
|
|
line.long 0x00 "DATAW0S1U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW0S1L,Cache Data Storage (Lower Word)"
|
|
group.long 0x210++0x07
|
|
line.long 0x00 "DATAW0S2U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW0S2L,Cache Data Storage (Lower Word)"
|
|
group.long 0x218++0x07
|
|
line.long 0x00 "DATAW0S3U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW0S3L,Cache Data Storage (Lower Word)"
|
|
group.long 0x220++0x07
|
|
line.long 0x00 "DATAW0S4U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW0S4L,Cache Data Storage (Lower Word)"
|
|
group.long 0x228++0x07
|
|
line.long 0x00 "DATAW0S5U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW0S5L,Cache Data Storage (Lower Word)"
|
|
group.long 0x230++0x07
|
|
line.long 0x00 "DATAW0S6U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW0S6L,Cache Data Storage (Lower Word)"
|
|
group.long 0x238++0x07
|
|
line.long 0x00 "DATAW0S7U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW0S7L,Cache Data Storage (Lower Word)"
|
|
group.long 0x240++0x07
|
|
line.long 0x00 "DATAW1S0U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW1S0L,Cache Data Storage (Lower Word)"
|
|
group.long 0x248++0x07
|
|
line.long 0x00 "DATAW1S1U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW1S1L,Cache Data Storage (Lower Word)"
|
|
group.long 0x250++0x07
|
|
line.long 0x00 "DATAW1S2U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW1S2L,Cache Data Storage (Lower Word)"
|
|
group.long 0x258++0x07
|
|
line.long 0x00 "DATAW1S3U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW1S3L,Cache Data Storage (Lower Word)"
|
|
group.long 0x260++0x07
|
|
line.long 0x00 "DATAW1S4U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW1S4L,Cache Data Storage (Lower Word)"
|
|
group.long 0x268++0x07
|
|
line.long 0x00 "DATAW1S5U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW1S5L,Cache Data Storage (Lower Word)"
|
|
group.long 0x270++0x07
|
|
line.long 0x00 "DATAW1S6U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW1S6L,Cache Data Storage (Lower Word)"
|
|
group.long 0x278++0x07
|
|
line.long 0x00 "DATAW1S7U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW1S7L,Cache Data Storage (Lower Word)"
|
|
group.long 0x280++0x07
|
|
line.long 0x00 "DATAW2S0U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW2S0L,Cache Data Storage (Lower Word)"
|
|
group.long 0x288++0x07
|
|
line.long 0x00 "DATAW2S1U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW2S1L,Cache Data Storage (Lower Word)"
|
|
group.long 0x290++0x07
|
|
line.long 0x00 "DATAW2S2U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW2S2L,Cache Data Storage (Lower Word)"
|
|
group.long 0x298++0x07
|
|
line.long 0x00 "DATAW2S3U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW2S3L,Cache Data Storage (Lower Word)"
|
|
group.long 0x2A0++0x07
|
|
line.long 0x00 "DATAW2S4U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW2S4L,Cache Data Storage (Lower Word)"
|
|
group.long 0x2A8++0x07
|
|
line.long 0x00 "DATAW2S5U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW2S5L,Cache Data Storage (Lower Word)"
|
|
group.long 0x2B0++0x07
|
|
line.long 0x00 "DATAW2S6U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW2S6L,Cache Data Storage (Lower Word)"
|
|
group.long 0x2B8++0x07
|
|
line.long 0x00 "DATAW2S7U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW2S7L,Cache Data Storage (Lower Word)"
|
|
group.long 0x2C0++0x07
|
|
line.long 0x00 "DATAW3S0U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW3S0L,Cache Data Storage (Lower Word)"
|
|
group.long 0x2C8++0x07
|
|
line.long 0x00 "DATAW3S1U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW3S1L,Cache Data Storage (Lower Word)"
|
|
group.long 0x2D0++0x07
|
|
line.long 0x00 "DATAW3S2U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW3S2L,Cache Data Storage (Lower Word)"
|
|
group.long 0x2D8++0x07
|
|
line.long 0x00 "DATAW3S3U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW3S3L,Cache Data Storage (Lower Word)"
|
|
group.long 0x2E0++0x07
|
|
line.long 0x00 "DATAW3S4U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW3S4L,Cache Data Storage (Lower Word)"
|
|
group.long 0x2E8++0x07
|
|
line.long 0x00 "DATAW3S5U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW3S5L,Cache Data Storage (Lower Word)"
|
|
group.long 0x2F0++0x07
|
|
line.long 0x00 "DATAW3S6U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW3S6L,Cache Data Storage (Lower Word)"
|
|
group.long 0x2F8++0x07
|
|
line.long 0x00 "DATAW3S7U,Cache Data Storage (Upper Word)"
|
|
line.long 0x04 "DATAW3S7L,Cache Data Storage (Lower Word)"
|
|
else
|
|
group.long 0x200++0xFF
|
|
line.long 0x00 "DATAW0S0UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW0S0MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW0S0ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW0S0LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x210++0xFF
|
|
line.long 0x00 "DATAW0S1UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW0S1MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW0S1ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW0S1LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x220++0xFF
|
|
line.long 0x00 "DATAW0S2UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW0S2MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW0S2ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW0S2LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x230++0xFF
|
|
line.long 0x00 "DATAW0S3UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW0S3MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW0S3ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW0S3LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x240++0xFF
|
|
line.long 0x00 "DATAW1S0UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW1S0MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW1S0ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW1S0LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x250++0xFF
|
|
line.long 0x00 "DATAW1S1UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW1S1MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW1S1ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW1S1LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x260++0xFF
|
|
line.long 0x00 "DATAW1S2UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW1S2MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW1S2ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW1S2LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x270++0xFF
|
|
line.long 0x00 "DATAW1S3UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW1S3MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW1S3ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW1S3LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x280++0xFF
|
|
line.long 0x00 "DATAW2S0UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW2S0MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW2S0ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW2S0LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x290++0xFF
|
|
line.long 0x00 "DATAW2S1UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW2S1MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW2S1ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW2S1LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x2A0++0xFF
|
|
line.long 0x00 "DATAW2S2UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW2S2MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW2S2ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW2S2LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x2B0++0xFF
|
|
line.long 0x00 "DATAW2S3UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW2S3MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW2S3ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW2S3LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x2C0++0xFF
|
|
line.long 0x00 "DATAW3S0UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW3S0MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW3S0ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW3S0LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x2D0++0xFF
|
|
line.long 0x00 "DATAW3S1UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW3S1MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW3S1ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW3S1LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x2E0++0xFF
|
|
line.long 0x00 "DATAW3S2UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW3S2MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW3S2ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW3S2LM,Cache Data Storage (Lowermost Word)"
|
|
group.long 0x2F0++0xFF
|
|
line.long 0x00 "DATAW3S3UM,Cache Data Storage (Uppermost Word)"
|
|
line.long 0x04 "DATAW3S3MU,Cache Data Storage (Mid Upper)"
|
|
line.long 0x08 "DATAW3S3ML,Cache Data Storage (Mid Lower)"
|
|
line.long 0x0C "DATAW3S3LM,Cache Data Storage (Lowermost Word)"
|
|
endif
|
|
tree.end
|
|
width 0x0B
|
|
tree.end
|
|
tree "FTFA (Flash Memory Module)"
|
|
base ad:0x40020000
|
|
width 7.
|
|
group.byte 0x00++0x01
|
|
line.byte 0x00 "FSTAT,Flash Status Register"
|
|
eventfld.byte 0x00 7. " CCIF ,Command complete interrupt flag" "Not completed,Completed"
|
|
eventfld.byte 0x00 6. " RDCOLERR ,Flash read collision error flag" "No error,Error"
|
|
newline
|
|
eventfld.byte 0x00 5. " ACCERR ,Flash access error flag" "No error,Error"
|
|
eventfld.byte 0x00 4. " FPVIOL ,Flash protection violation flag" "Not detected,Detected"
|
|
newline
|
|
rbitfld.byte 0x00 0. " MGSTAT0 ,Memory controller command completion status flag" "No error,Error"
|
|
line.byte 0x01 "FCNFG,Flash Configuration Register"
|
|
bitfld.byte 0x01 7. " CCIE ,Command complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 6. " RDCOLLIE ,Read collision error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.byte 0x01 5. " ERSAREQ ,Erase all request" "Not erased,Erased"
|
|
bitfld.byte 0x01 4. " ERSSUSP ,Erase suspend" "Not suspended,Suspended"
|
|
sif cpuis("MK10DN512ZVLK10*")||cpuis("MK10DN512ZVMD10")||cpuis("MK10DN512ZVLQ10")||cpuis("MK10DX256ZVLQ10*")||cpuis("MK10DN512ZVLL10*")||cpuis("MK10DN512ZVMC10")||cpuis("MK11DN512VLK5R")||cpuis("MK11DN512AVLK5R")||cpuis("MK20D????ZVLK10")||cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")
|
|
sif !cpuis("MK20DN512ZVLQ10R")&&!cpuis("MK20DN512ZVMC10R")
|
|
newline
|
|
rbitfld.byte 0x01 3. " SWAP ,Swap" "0 block at 0x0000,1 block at 0x0000"
|
|
rbitfld.byte 0x01 2. " PFLSH ,Flash configuration" ",Program flash only"
|
|
newline
|
|
rbitfld.byte 0x01 1. " RAMRDY ,RAM ready" "Not available,Available"
|
|
else
|
|
newline
|
|
rbitfld.byte 0x01 3. " SWAP ,Swap" "0 block at 0x0000,1 block at 0x0000"
|
|
rbitfld.byte 0x01 2. " PFLSH ,Flash configuration" ",Program flash only"
|
|
newline
|
|
rbitfld.byte 0x01 1. " RAMRDY ,RAM ready" "Not available,Available"
|
|
rbitfld.byte 0x01 0. " EEERDY ,EEPROM ready" "Not available,Available"
|
|
endif
|
|
elif cpuis("MK20DN32VEX5")||cpuis("MK20DN64VEX5")||cpuis("MK20DN128VEX5")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK21D*AVMC5R")
|
|
newline
|
|
rbitfld.byte 0x01 3. " SWAP ,Swap" "0 block at 0x0000,1 block at 0x0000"
|
|
rbitfld.byte 0x01 2. " PFLSH ,Flash configuration" ",Program flash only"
|
|
newline
|
|
rbitfld.byte 0x01 1. " RAMRDY ,RAM ready" "Not available,Available"
|
|
rbitfld.byte 0x01 0. " EEERDY ,EEPROM ready" "Not available,Available"
|
|
elif cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22FN1M0VLQ12R")||cpuis("MK22FX512VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22FN1M0VMC12R")||cpuis("MK22FX512VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")
|
|
newline
|
|
rbitfld.byte 0x01 3. " SWAP ,Swap" "0 block at 0x0000,1 block at 0x0000"
|
|
rbitfld.byte 0x01 2. " PFLSH ,Flash configuration" ",4 flash blocks"
|
|
newline
|
|
rbitfld.byte 0x01 1. " RAMRDY ,RAM ready" "Not available,Available"
|
|
rbitfld.byte 0x01 0. " EEERDY ,EEPROM ready" "Not available,Available"
|
|
elif cpuis("MK20DX64VEX7")||cpuis("MK20DX128VEX7")||cpuis("MK20DX256VEX7")||cpuis("MK20DX32VEX5")||cpuis("MK20DX64VEX5")||cpuis("MK20DX128VEX5")
|
|
newline
|
|
rbitfld.byte 0x01 3. " SWAP ,Swap" "0 block at 0x0000,?..."
|
|
rbitfld.byte 0x01 2. " PFLSH ,Flash configuration" "2 flash and 2 FlexNVM blocks,?..."
|
|
newline
|
|
rbitfld.byte 0x01 1. " RAMRDY ,RAM ready" "Not available,Available"
|
|
rbitfld.byte 0x01 0. " EEERDY ,EEPROM ready" "Not available,Available"
|
|
elif cpuis("MK27FN2M0VMI15")||cpuis("?K28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")
|
|
newline
|
|
rbitfld.byte 0x01 3. " SWAP ,Indicates which half of program flash space is located at relative address 0x0000" "0/1 blocks,2/3 blocks"
|
|
rbitfld.byte 0x01 1. " RAMRDY ,RAM ready" "Not available,Available"
|
|
elif cpuis("MK84FN2M0CAU15R")||cpuis("KK60DN512ZCAB10R")
|
|
newline
|
|
rbitfld.byte 0x01 3. " SWAP ,Indicates which half of program flash space is located at relative address 0x0000" "0/1 blocks,2/3 blocks"
|
|
rbitfld.byte 0x01 2. " PFLSH ,FTFE configuration (number of supported blocks)" ",4 flash blocks"
|
|
newline
|
|
rbitfld.byte 0x01 1. " RAMRDY ,RAM ready" "Not ready,Ready"
|
|
elif cpuis("MK???X*")||cpuis("MK22FN1M0VMC10")||cpuis("MK53DN512ZCMD10")||cpuis("MK20DN512ZVLL10")||cpuis("MK20DN512ZVMC10*")
|
|
sif !cpuis("MK02*")
|
|
sif cpuis("MK21D*AVLK5")||cpuis("MK21D*AVMC5")||cpuis("MK20DX256VMC7R")||cpuis("MK20DX256VLK7R")||cpuis("MK20DX64VMB7")||cpuis("MK20DX128VMB7")||cpuis("MK20DX256VMB7")
|
|
newline
|
|
rbitfld.byte 0x01 2. " PFLSH ,Flash configuration" "Flash and/or EEPROM,?..."
|
|
elif cpuis("MK20DN512ZVMC10*")||cpuis("MK20DX256VLK10R")||cpuis("MK20DX256VLQ10R")||cpuis("MK10DX256ZVLQ10")||cpuis("MK10DX256ZVLQ10R")||cpuis("MK10DX256ZVMD10")||cpuis("MK40D*Z*10")||cpuis("MK50DX256ZCLL10")||cpuis("MK51DX256ZCMC10")||cpuis("MK53DX256ZCLQ10")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("MK60DX256ZVLL10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DX256ZCLQ10")||cpuis("MK51DX256ZCMC10")||cpuis("MK53DX256ZCLQ10")||cpuis("MK20D????ZVLL10")
|
|
newline
|
|
rbitfld.byte 0x01 3. " SWAP ,Swap" "0 block at 0x0000,1 block at 0x0000"
|
|
rbitfld.byte 0x01 2. " PFLSH ,Flash configuration" "Flash and/or EEPROM,?..."
|
|
elif cpuis("MK21F*AVLQ12")||cpuis("MK21F*AVMD12")||cpuis("MK21F*AVMC12")||cpuis("MK22FX512*")||cpuis("MK21FX512VMD10")||cpuis("MK21FX512VMC10")||cpuis("MK22FX512AVLK12")||cpuis("MK22FX512AVLL12")||cpuis("MK22FX512AVMC12")||cpuis("MK22FX512AVLQ12")||cpuis("MK22FX512AVMD12")||cpuis("MK22FX512AVLH12")
|
|
newline
|
|
rbitfld.byte 0x01 3. " SWAP ,Swap" "0 block at 0x0000,?..."
|
|
rbitfld.byte 0x01 2. " PFLSH ,Flash configuration" "2 flash and 2 FlexNVM blocks,?..."
|
|
elif !cpuis("MK10D?128V??5")&&!cpuis("MK10D?64V??5")&&!cpuis("MK10D?32V??5")&&!cpuis("MK10*7")&&!cpuis("MK30DX256VLL7R")
|
|
newline
|
|
rbitfld.byte 0x01 3. " SWAP ,Swap" "0 block at 0x0000,1 block at 0x0000"
|
|
rbitfld.byte 0x01 2. " PFLSH ,Flash configuration" "2 flash and 2 FlexNVM blocks,?..."
|
|
else
|
|
newline
|
|
rbitfld.byte 0x01 2. " PFLSH ,Flash configuration" "2 flash and 2 FlexNVM blocks,?..."
|
|
endif
|
|
newline
|
|
rbitfld.byte 0x01 1. " RAMRDY ,RAM ready" "FlexRAM not available,FlexRAM available"
|
|
sif !cpuis("MK20DX256VLK10R")
|
|
newline
|
|
rbitfld.byte 0x01 0. " EEERDY ,EEPROM ready" "Not available,Available"
|
|
endif
|
|
endif
|
|
elif cpuis("MK???N*")||cpuis("KK26FN2M0CAC18R")
|
|
sif !cpuis("MK02*")&&!cpuis("MK22FN256*")&&!cpuis("MK22FN128*")&&!cpuis("MK8?FN256V*")&&!cpuis("MK22FN512VMP12")&&!cpuis("MK22FN512VLL12")&&!cpuis("MK22FN512VLH12")&&!cpuis("MK22FN512VDC12")&&!cpuis("MK22FN512CBP12R")&&!cpuis("MK22FN512CAP12R")&&!cpuis("MK24FN256VDC12")&&!cpuis("MK22FN512VDC12R")&&!cpuis("MK22FN512VFX12*")&&!cpuis("MK22FN512VLH12R")
|
|
sif (cpuis("MK21F*AVLQ12")||cpuis("MK21F*AVMD12"))||cpuis("MK21D*AVMC5")||cpuis("MK21F*AVMC12")||cpuis("MK22FX512*")||cpuis("MK24FN*")||cpuis("MK26FN*")||cpuis("MK40D*Z*10")||cpuis("MK21FN1M0VMD10")||cpuis("MK22FN1M0VLH10")||cpuis("MK22FN1M0VLK10")||cpuis("MK22FN1M0VLL10")||cpuis("MK22FN1M0VMC10")||cpuis("MK21FN1M0VMC10")||cpuis("MK22FN1M0AVMD12")||cpuis("MK22FN1M0AVMC12")||cpuis("MK22FN1M0AVLQ12")||cpuis("MK22FN1M0AVLL12")||cpuis("MK22FN1M0AVLK12")||cpuis("MK22FN1M0AVLH12")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512VMC10R")||cpuis("MK60DN512ZCAB10R")||cpuis("MK50DN512ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK51DN512ZCLL10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")
|
|
newline
|
|
rbitfld.byte 0x01 3. " SWAP ,Swap" "0 block at 0x0000,1 block at 0x0000"
|
|
elif cpuis("MK20FN1M0VLQ12R")||cpuis("MK66FN2M0VLQ18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK63FN1M0VLQ12R")||cpuis("MK60FN1M0VLQ15")||cpuis("MK70FN1M0VMJ12R")||cpuis("MK70FN1M0VMJ15R")||cpuis("KK26FN2M0CAC18R")
|
|
newline
|
|
rbitfld.byte 0x01 3. " SWAP ,Swap" "0/1 block at 0x0000,2/3 block at 0x0000"
|
|
elif !cpuis("MK10D?128V??5")&&!cpuis("MK10D?64V??5")&&!cpuis("MK10D?32V??5")&&!cpuis("MK10DN512ZVLK10")&&!cpuis("MK10DN512ZVLK10R")&&!cpuis("MK10DN512ZVLL10")&&!cpuis("MK10DN512ZVLL10R")&&!cpuis("MK10DN512ZVMC10")&&!cpuis("MK11DN512VLK5R")&&!cpuis("MK11DN512AVLK5R")&&!cpuis("MK10*7")&&!cpuis("MK70FN1M0VMJ12R")&&!cpuis("MK70FN1M0VMJ15R")
|
|
newline
|
|
rbitfld.byte 0x01 3. " SWAP ,Swap" "0 block at 0x0000,?..."
|
|
endif
|
|
sif cpuis("MK21D*AVLK5")||cpuis("MK21D*AVMC5")||cpuis("MK20DX256VLK10R")||cpuis("MK60DN512ZCAB10R")
|
|
newline
|
|
bitfld.byte 0x01 2. " PFLSH ,Flash configuration" ",Program flash only"
|
|
rbitfld.byte 0x01 1. " RAMRDY ,RAM ready" "Not available,Available"
|
|
elif cpuis("MK50DN512ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK51DN512ZCLL10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK53DN512ZCLQ10")
|
|
newline
|
|
rbitfld.byte 0x01 2. " PFLSH ,Flash configuration" ",Program flash only"
|
|
rbitfld.byte 0x01 1. " RAMRDY ,RAM ready" "Not available,Available"
|
|
elif cpuis("MK24FN1M0CAJ12R")||cpuis("MK24FN1M0VDC12R")||cpuis("MK24FN1M0VLL12")||cpuis("MK24FN1M0VLL12R")||cpuis("MK24FN1M0VLQ12R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DX256ZVLL10")||cpuis("MK60DN512VMC10R")||cpuis("MK66FN2M0VLQ18R")||cpuis("MK65FN2M0VMI18R")
|
|
newline
|
|
rbitfld.byte 0x01 2. " PFLSH ,Flash configuration" ",2 flash blocks"
|
|
rbitfld.byte 0x01 1. " RAMRDY ,RAM ready" "Not available,Available"
|
|
else
|
|
newline
|
|
rbitfld.byte 0x01 2. " PFLSH ,Flash configuration" ",4 flash blocks"
|
|
rbitfld.byte 0x01 1. " RAMRDY ,RAM ready" "Not available,Available"
|
|
endif
|
|
sif (cpuis("MK10F????VLQ12")||cpuis("MK10F????VMD12"))||(cpuis("MK10D?128V??5")||cpuis("MK10D?64V??5")||cpuis("MK10D?32V??5"))||cpuis("MK10DN512VLQ10")||cpuis("MK10DN512VMD10")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512VMC10R")||cpuis("MK66FN2M0VLQ18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK60FN1M0VLQ15")||cpuis("KK26FN2M0CAC18R")
|
|
newline
|
|
rbitfld.byte 0x01 0. " EEERDY ,EEPROM ready" "Not available,Available"
|
|
endif
|
|
endif
|
|
endif
|
|
rgroup.byte 0x02++0x01
|
|
line.byte 0x00 "FSEC,Flash Security Register"
|
|
bitfld.byte 0x00 6.--7. " KEYEN ,Backdoor key security enable" "Disabled,Disabled,Enabled,Disabled"
|
|
bitfld.byte 0x00 4.--5. " MEEN ,Mass erase enable bits" "Enabled,Enabled,Disabled,Enabled"
|
|
newline
|
|
bitfld.byte 0x00 2.--3. " FSLACC ,Freescale failure analysis access code" "Granted,Denied,Denied,Granted"
|
|
bitfld.byte 0x00 0.--1. " SEC ,Flash security" "Secure,Secure,Unsecure,Secure"
|
|
line.byte 0x01 "FOPT,Flash Option Register"
|
|
sif cpuis("MK27FN2M0VMI15")||cpuis("KK28FN2M0CAU15R")||cpuis("MK28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")
|
|
bitfld.byte 0x01 6.--7. " BOOTSRC_SEL ,Boot source selection" "Internal flash,,ROM/QSPI0,ROM/boot loader mode"
|
|
newline
|
|
endif
|
|
sif cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VDC12R")||cpuis("MK22FN512VFX12*")||cpuis("MK22FN512VLH12R")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("MK27FN2M0VMI15")||cpuis("KK28FN2M0CAU15R")||cpuis("MK28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")
|
|
bitfld.byte 0x01 5. " FAST_INIT ,Select initialization speed on POR\VLLSx and any system reset" "Slower initialization,Fast initialization"
|
|
newline
|
|
endif
|
|
sif cpuis("MK22FN1M0VMC10")||cpuis("MK22FN1M0VLQ10")||cpuis("MK22FN1M0VLL10")||cpuis("MK22FN1M0VLK10")||cpuis("MK21FX512VMD10")||cpuis("MK21FX512VMC10")||cpuis("MK21FN1M0VMD10")||cpuis("MK21FN1M0VMC10")||cpuis("MK22FX512AVMD12")||cpuis("MK22FX512AVMC12")||cpuis("MK22FX512AVLQ12")||cpuis("MK22FX512AVLL12")||cpuis("MK22FX512AVLK12")||cpuis("MK22FX512AVLH12")||cpuis("MK22FN512VMP12")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VLH12")||cpuis("MK22FN512VDC12")||cpuis("MK22FN512CBP12R")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN1M0AVMD12")||cpuis("MK22FN1M0AVMC12")||cpuis("MK22FN1M0AVLQ12")||cpuis("MK22FN1M0AVLL12")||cpuis("MK22FN1M0AVLK12")||cpuis("MK22FN128CAH12R")||cpuis("MK20FN1M0VLQ12R")||cpuis("MK20DX256VLQ10R")||cpuis("MK20DX256VLK7R")||cpuis("MK20DX256VLK10R")||cpuis("MK20DX256VMC7R")||cpuis("MK50DN512ZCLL10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DX256ZCLQ10")||cpuis("MK51DN512ZCLL10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")||cpuis("MK70*")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("MK20DN512ZVLL10")||cpuis("MK20DX256ZVLL10")||cpuis("MK20DN512ZVLQ10*")||cpuis("MK20DN512ZVMD10")||cpuis("MK20DX128ZVLQ10")||cpuis("MK20DX256ZVLQ10*")||cpuis("MK20DX256ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20DN512ZVLK10")||cpuis("MK20DX256ZVLK10")||cpuis("MK20DN512VLK10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK21DN512AVMC5R")||cpuis("MK21DX256AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22FN1M0VLQ12R")||cpuis("MK22FX512VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("MK22FX512VMC12R")||cpuis("MK22FN1M0VMC12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLK12R")||cpuis("KK26FN2M0CAC18R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VDC12R")||cpuis("MK22FN512VFX12*")||cpuis("MK22FN512VLH12R")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("MK22FN128VLH10R")||cpuis("MK27FN2M0VMI15")||cpuis("KK28FN2M0CAU15R")||cpuis("MK28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")||cpuis("KK60FN1M0VLQ15")||cpuis("KK65FN2M0CAC18R")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("MK63FN1M0VLQ12")||cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("KK60DN512ZCAB10R")||cpuis("KK60FN1M0VLQ15")||cpuis("KK65FN2M0CAC18R")||cpuis("MK65FN2M0VMI18")||cpuis("MK66FN2M0VLQ18")
|
|
sif !cpuis("MK50DN512ZCLL10")&&!cpuis("MK50DX256ZCLL10")&&!cpuis("MK50DN512ZCLQ10")&&!cpuis("MK50DX256ZCLQ10")&&!cpuis("MK51DN512ZCLL10")&&!cpuis("MK51DN512ZCMC10")&&!cpuis("MK51DX256ZCMC10")&&!cpuis("MK51DN256ZCMD10")&&!cpuis("MK51DN512ZCLQ10")&&!cpuis("MK52DN512ZCLQ10")&&!cpuis("MK52DN512ZCMD10")&&!cpuis("MK53DN512ZCLQ10")&&!cpuis("MK53DN512ZCMD10")&&!cpuis("MK53DX256ZCLQ10")&&!cpuis("MK70*")&&!cpuis("MK20DN512ZVLL10")&&!cpuis("MK20DX256ZVLL10")&&!cpuis("MK20DN512ZVLQ10*")&&!cpuis("MK20DN512ZVMD10")&&!cpuis("MK20DX128ZVLQ10")&&!cpuis("MK20DX256ZVLQ10*")&&!cpuis("MK20DX256ZVMD10")&&!cpuis("MK20DN512ZVMC10*")&&!cpuis("MK20DN512ZVLK10")&&!cpuis("MK20DX256ZVLK10")&&!cpuis("KK20DN512ZCAB10R")&&!cpuis("KK60DN512ZCAB10R")&&!cpuis("KK60FN1M0VLQ15")
|
|
bitfld.byte 0x01 2. " NMI_DIS ,Enable/disable control for the NMI function" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
sif !cpuis("MKS20FN128VFT12")&&!cpuis("MKS20FN128VLH12")&&!cpuis("MKS20FN128VLL12")&&!cpuis("MKS20FN256VFT12")&&!cpuis("MKS20FN256VLH12")&&!cpuis("MKS20FN256VLL12")&&!cpuis("MKS22FN128VFT12")&&!cpuis("MKS22FN128VLH12")&&!cpuis("MKS22FN128VLL12")&&!cpuis("MKS22FN256VFT12")&&!cpuis("MKS22FN256VLH12")&&!cpuis("MKS22FN256VLL12")
|
|
bitfld.byte 0x01 1. " EZPORT_DIS ,Enable/disable EzPort function" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
bitfld.byte 0x01 0. " LPBOOT ,Control the reset value of OUTDIVx values in SIM_CLKDIV1 register" "Low-power boot,Normal boot"
|
|
endif
|
|
width 9.
|
|
newline
|
|
sif cpuis("MK22FN1M0VMC10")||cpuis("MK22FN1M0VLQ10")||cpuis("MK22FN1M0VLL10")||cpuis("MK22FN1M0VLK10")||cpuis("MK22FN1M0VLH10")||cpuis("MK21FX512VMD10")||cpuis("MK21FX512VMC10")||cpuis("MK21FN1M0VMD10")||cpuis("MK21FN1M0VMC10")||cpuis("MK22FX512AVMD12")||cpuis("MK22FX512AVMC12")||cpuis("MK22FX512AVLQ12")||cpuis("MK22FX512AVLL12")||cpuis("MK22FX512AVLK12")||cpuis("MK22FX512AVLH12")||cpuis("MK22FN512VMP12")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VLH12")||cpuis("MK22FN512CBP12R")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN1M0AVMD12")||cpuis("MK22FN1M0AVMC12")||cpuis("MK22FN1M0AVLQ12")||cpuis("MK22FN1M0AVLL12")||cpuis("MK22FN1M0AVLK12")||cpuis("MK22FN1M0AVLH12")||cpuis("MK22FN128CAH12R")||cpuis("MK20FN1M0VLQ12R")||cpuis("MK20DX256VLQ10R")||cpuis("MK20DX256VLK7R")||cpuis("MK20DX256VLK10R")||cpuis("MK20DX256VMC7R")||cpuis("MK50DN512ZCLL10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DX256ZCLQ10")||cpuis("MK51DN512ZCLL10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")||cpuis("MK20DN32VEX5")||cpuis("MK20DN64VEX5")||cpuis("MK20DN128VEX5")||cpuis("MK20DX32VEX5")||cpuis("MK20DX64VEX5")||cpuis("MK20DX128VEX5")||cpuis("MK20DX64VEX7")||cpuis("MK20DX128VEX7")||cpuis("MK20DX256VEX7")||cpuis("MK20DX64VMB7")||cpuis("MK20DX128VMB7")||cpuis("MK20DX256VMB7")||cpuis("MK24FN1M0CAJ12R")||cpuis("MK24FN1M0VDC12R")||cpuis("MK24FN1M0VLL12")||cpuis("MK24FN1M0VLL12R")||cpuis("MK24FN1M0VLQ12R")||cpuis("MK24FN256VDC12")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DX256ZVLL10")||cpuis("MK60DN512VMC10R")||cpuis("MK66FN2M0VLQ18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK63FN1M0VLQ12R")||cpuis("MK60FN1M0VLQ15")||cpuis("KK60DN512ZCAB10R")||cpuis("KK60FN1M0VLQ15")||cpuis("KK65FN2M0CAC18R")
|
|
if (((per.b(ad:0x40020000))&0x80)==0x0)||(((per.b(ad:0x40020000+0x01))&0x10)==0x10)
|
|
rgroup.byte (0x04+0x0)++0x00
|
|
line.byte 0x00 "FCCOB3,Flash Common Command Object Register"
|
|
rgroup.byte (0x04+0x1)++0x00
|
|
line.byte 0x00 "FCCOB2,Flash Common Command Object Register"
|
|
rgroup.byte (0x04+0x2)++0x00
|
|
line.byte 0x00 "FCCOB1,Flash Common Command Object Register"
|
|
rgroup.byte (0x04+0x3)++0x00
|
|
line.byte 0x00 "FCCOB0,Flash Common Command Object Register"
|
|
rgroup.byte (0x04+0x4)++0x00
|
|
line.byte 0x00 "FCCOB7,Flash Common Command Object Register"
|
|
rgroup.byte (0x04+0x5)++0x00
|
|
line.byte 0x00 "FCCOB6,Flash Common Command Object Register"
|
|
rgroup.byte (0x04+0x6)++0x00
|
|
line.byte 0x00 "FCCOB5,Flash Common Command Object Register"
|
|
rgroup.byte (0x04+0x7)++0x00
|
|
line.byte 0x00 "FCCOB4,Flash Common Command Object Register"
|
|
rgroup.byte (0x04+0x8)++0x00
|
|
line.byte 0x00 "FCCOBB,Flash Common Command Object Register"
|
|
rgroup.byte (0x04+0x9)++0x00
|
|
line.byte 0x00 "FCCOBA,Flash Common Command Object Register"
|
|
rgroup.byte (0x04+0xA)++0x00
|
|
line.byte 0x00 "FCCOB9,Flash Common Command Object Register"
|
|
rgroup.byte (0x04+0xB)++0x00
|
|
line.byte 0x00 "FCCOB8,Flash Common Command Object Register"
|
|
rgroup.byte 0x10++0x03
|
|
line.byte 0x00 "FPROT_3,Program Flash Protection Register 3"
|
|
bitfld.byte 0x00 7. " PROT_[7] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 6. " [6] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 5. " [5] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 4. " [4] ,Program flash region protect" "Protected,Not protected"
|
|
newline
|
|
bitfld.byte 0x00 3. " [3] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 2. " [2] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 1. " [1] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 0. " [0] ,Program flash region protect" "Protected,Not protected"
|
|
line.byte 0x01 "FPROT_2,Program Flash Protection Register 2"
|
|
bitfld.byte 0x01 7. " [15] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 6. " [14] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 5. " [13] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 4. " [12] ,Program flash region protect" "Protected,Not protected"
|
|
newline
|
|
bitfld.byte 0x01 3. " [11] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 2. " [10] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 1. " [9] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 0. " [8] ,Program flash region protect" "Protected,Not protected"
|
|
line.byte 0x02 "FPROT_1,Program Flash Protection Register 1"
|
|
bitfld.byte 0x02 7. " [23] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x02 6. " [22] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x02 5. " [21] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x02 4. " [20] ,Program flash region protect" "Protected,Not protected"
|
|
newline
|
|
bitfld.byte 0x02 3. " [19] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x02 2. " [18] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x02 1. " [17] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x02 0. " [16] ,Program flash region protect" "Protected,Not protected"
|
|
line.byte 0x03 "FPROT_0,Program Flash Protection Register 0"
|
|
bitfld.byte 0x03 7. " [31] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x03 6. " [30] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x03 5. " [29] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x03 4. " [28] ,Program flash region protect" "Protected,Not protected"
|
|
newline
|
|
bitfld.byte 0x03 3. " [27] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x03 2. " [26] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x03 1. " [25] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x03 0. " [24] ,Program flash region protect" "Protected,Not protected"
|
|
newline
|
|
else
|
|
group.byte (0x04+0x0)++0x00
|
|
line.byte 0x00 "FCCOB3,Flash Common Command Object Register"
|
|
group.byte (0x04+0x1)++0x00
|
|
line.byte 0x00 "FCCOB2,Flash Common Command Object Register"
|
|
group.byte (0x04+0x2)++0x00
|
|
line.byte 0x00 "FCCOB1,Flash Common Command Object Register"
|
|
group.byte (0x04+0x3)++0x00
|
|
line.byte 0x00 "FCCOB0,Flash Common Command Object Register"
|
|
group.byte (0x04+0x4)++0x00
|
|
line.byte 0x00 "FCCOB7,Flash Common Command Object Register"
|
|
group.byte (0x04+0x5)++0x00
|
|
line.byte 0x00 "FCCOB6,Flash Common Command Object Register"
|
|
group.byte (0x04+0x6)++0x00
|
|
line.byte 0x00 "FCCOB5,Flash Common Command Object Register"
|
|
group.byte (0x04+0x7)++0x00
|
|
line.byte 0x00 "FCCOB4,Flash Common Command Object Register"
|
|
group.byte (0x04+0x8)++0x00
|
|
line.byte 0x00 "FCCOBB,Flash Common Command Object Register"
|
|
group.byte (0x04+0x9)++0x00
|
|
line.byte 0x00 "FCCOBA,Flash Common Command Object Register"
|
|
group.byte (0x04+0xA)++0x00
|
|
line.byte 0x00 "FCCOB9,Flash Common Command Object Register"
|
|
group.byte (0x04+0xB)++0x00
|
|
line.byte 0x00 "FCCOB8,Flash Common Command Object Register"
|
|
group.byte 0x10++0x03
|
|
line.byte 0x00 "FPROT_3,Program Flash Protection Register 3"
|
|
bitfld.byte 0x00 7. " PROT_[7] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 6. " [6] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 5. " [5] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 4. " [4] ,Program flash region protect" "Protected,Not protected"
|
|
newline
|
|
bitfld.byte 0x00 3. " [3] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 2. " [2] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 1. " [1] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 0. " [0] ,Program flash region protect" "Protected,Not protected"
|
|
line.byte 0x01 "FPROT_2,Program Flash Protection Register 2"
|
|
bitfld.byte 0x01 7. " [15] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 6. " [14] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 5. " [13] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 4. " [12] ,Program flash region protect" "Protected,Not protected"
|
|
newline
|
|
bitfld.byte 0x01 3. " [11] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 2. " [10] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 1. " [9] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 0. " [8] ,Program flash region protect" "Protected,Not protected"
|
|
line.byte 0x02 "FPROT_1,Program Flash Protection Register 1"
|
|
bitfld.byte 0x02 7. " [23] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x02 6. " [22] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x02 5. " [21] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x02 4. " [20] ,Program flash region protect" "Protected,Not protected"
|
|
newline
|
|
bitfld.byte 0x02 3. " [19] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x02 2. " [18] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x02 1. " [17] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x02 0. " [16] ,Program flash region protect" "Protected,Not protected"
|
|
line.byte 0x03 "FPROT_0,Program Flash Protection Register 0"
|
|
bitfld.byte 0x03 7. " [31] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x03 6. " [30] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x03 5. " [29] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x03 4. " [28] ,Program flash region protect" "Protected,Not protected"
|
|
newline
|
|
bitfld.byte 0x03 3. " [27] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x03 2. " [26] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x03 1. " [25] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x03 0. " [24] ,Program flash region protect" "Protected,Not protected"
|
|
newline
|
|
endif
|
|
else
|
|
if (((per.b(ad:0x40020000))&0x80)==0x0)||(((per.b(ad:0x40020000+0x01))&0x10)==0x10)
|
|
rgroup.byte (0x04+0x0)++0x00
|
|
line.byte 0x00 "FCCOB3,Flash Common Command Object Register"
|
|
rgroup.byte (0x04+0x1)++0x00
|
|
line.byte 0x00 "FCCOB2,Flash Common Command Object Register"
|
|
rgroup.byte (0x04+0x2)++0x00
|
|
line.byte 0x00 "FCCOB1,Flash Common Command Object Register"
|
|
rgroup.byte (0x04+0x3)++0x00
|
|
line.byte 0x00 "FCCOB0,Flash Common Command Object Register"
|
|
rgroup.byte (0x04+0x4)++0x00
|
|
line.byte 0x00 "FCCOB7,Flash Common Command Object Register"
|
|
rgroup.byte (0x04+0x5)++0x00
|
|
line.byte 0x00 "FCCOB6,Flash Common Command Object Register"
|
|
rgroup.byte (0x04+0x6)++0x00
|
|
line.byte 0x00 "FCCOB5,Flash Common Command Object Register"
|
|
rgroup.byte (0x04+0x7)++0x00
|
|
line.byte 0x00 "FCCOB4,Flash Common Command Object Register"
|
|
rgroup.byte (0x04+0x8)++0x00
|
|
line.byte 0x00 "FCCOBB,Flash Common Command Object Register"
|
|
rgroup.byte (0x04+0x9)++0x00
|
|
line.byte 0x00 "FCCOBA,Flash Common Command Object Register"
|
|
rgroup.byte (0x04+0xA)++0x00
|
|
line.byte 0x00 "FCCOB9,Flash Common Command Object Register"
|
|
rgroup.byte (0x04+0xB)++0x00
|
|
line.byte 0x00 "FCCOB8,Flash Common Command Object Register"
|
|
rgroup.byte 0x10++0x03
|
|
line.byte 0x00 "FPROT_3,Program Flash Protection Register 3"
|
|
bitfld.byte 0x00 7. " PROT_[31] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 6. " [30] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 5. " [29] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 4. " [28] ,Program flash region protect" "Protected,Not protected"
|
|
newline
|
|
bitfld.byte 0x00 3. " [27] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 2. " [26] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 1. " [25] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 0. " [24] ,Program flash region protect" "Protected,Not protected"
|
|
line.byte 0x01 "FPROT_2,Program Flash Protection Register 2"
|
|
bitfld.byte 0x01 7. " [23] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 6. " [22] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 5. " [21] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 4. " [20] ,Program flash region protect" "Protected,Not protected"
|
|
newline
|
|
bitfld.byte 0x01 3. " [19] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 2. " [18] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 1. " [17] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 0. " [16] ,Program flash region protect" "Protected,Not protected"
|
|
line.byte 0x02 "FPROT_1,Program Flash Protection Register 1"
|
|
bitfld.byte 0x02 7. " [15] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x02 6. " [14] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x02 5. " [13] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x02 4. " [12] ,Program flash region protect" "Protected,Not protected"
|
|
newline
|
|
bitfld.byte 0x02 3. " [11] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x02 2. " [10] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x02 1. " [9] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x02 0. " [8] ,Program flash region protect" "Protected,Not protected"
|
|
line.byte 0x03 "FPROT_0,Program Flash Protection Register 0"
|
|
bitfld.byte 0x03 7. " [7] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x03 6. " [6] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x03 5. " [5] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x03 4. " [4] ,Program flash region protect" "Protected,Not protected"
|
|
newline
|
|
bitfld.byte 0x03 3. " [3] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x03 2. " [2] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x03 1. " [1] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x03 0. " [0] ,Program flash region protect" "Protected,Not protected"
|
|
newline
|
|
else
|
|
group.byte (0x04+0x0)++0x00
|
|
line.byte 0x00 "FCCOB3,Flash Common Command Object Register"
|
|
group.byte (0x04+0x1)++0x00
|
|
line.byte 0x00 "FCCOB2,Flash Common Command Object Register"
|
|
group.byte (0x04+0x2)++0x00
|
|
line.byte 0x00 "FCCOB1,Flash Common Command Object Register"
|
|
group.byte (0x04+0x3)++0x00
|
|
line.byte 0x00 "FCCOB0,Flash Common Command Object Register"
|
|
group.byte (0x04+0x4)++0x00
|
|
line.byte 0x00 "FCCOB7,Flash Common Command Object Register"
|
|
group.byte (0x04+0x5)++0x00
|
|
line.byte 0x00 "FCCOB6,Flash Common Command Object Register"
|
|
group.byte (0x04+0x6)++0x00
|
|
line.byte 0x00 "FCCOB5,Flash Common Command Object Register"
|
|
group.byte (0x04+0x7)++0x00
|
|
line.byte 0x00 "FCCOB4,Flash Common Command Object Register"
|
|
group.byte (0x04+0x8)++0x00
|
|
line.byte 0x00 "FCCOBB,Flash Common Command Object Register"
|
|
group.byte (0x04+0x9)++0x00
|
|
line.byte 0x00 "FCCOBA,Flash Common Command Object Register"
|
|
group.byte (0x04+0xA)++0x00
|
|
line.byte 0x00 "FCCOB9,Flash Common Command Object Register"
|
|
group.byte (0x04+0xB)++0x00
|
|
line.byte 0x00 "FCCOB8,Flash Common Command Object Register"
|
|
group.byte 0x10++0x03
|
|
line.byte 0x00 "FPROT_3,Program Flash Protection Register 3"
|
|
bitfld.byte 0x00 7. " PROT_[31] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 6. " [30] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 5. " [29] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 4. " [28] ,Program flash region protect" "Protected,Not protected"
|
|
newline
|
|
bitfld.byte 0x00 3. " [27] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 2. " [26] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 1. " [25] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 0. " [24] ,Program flash region protect" "Protected,Not protected"
|
|
line.byte 0x01 "FPROT_2,Program Flash Protection Register 2"
|
|
bitfld.byte 0x01 7. " [23] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 6. " [22] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 5. " [21] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 4. " [20] ,Program flash region protect" "Protected,Not protected"
|
|
newline
|
|
bitfld.byte 0x01 3. " [19] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 2. " [18] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 1. " [17] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 0. " [16] ,Program flash region protect" "Protected,Not protected"
|
|
line.byte 0x02 "FPROT_1,Program Flash Protection Register 1"
|
|
bitfld.byte 0x02 7. " [15] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x02 6. " [14] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x02 5. " [13] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x02 4. " [12] ,Program flash region protect" "Protected,Not protected"
|
|
newline
|
|
bitfld.byte 0x02 3. " [11] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x02 2. " [10] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x02 1. " [9] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x02 0. " [8] ,Program flash region protect" "Protected,Not protected"
|
|
line.byte 0x03 "FPROT_0,Program Flash Protection Register 0"
|
|
bitfld.byte 0x03 7. " [7] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x03 6. " [6] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x03 5. " [5] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x03 4. " [4] ,Program flash region protect" "Protected,Not protected"
|
|
newline
|
|
bitfld.byte 0x03 3. " [3] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x03 2. " [2] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x03 1. " [1] ,Program flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x03 0. " [0] ,Program flash region protect" "Protected,Not protected"
|
|
newline
|
|
endif
|
|
endif
|
|
sif !cpuis("MK8?FN256V*")&&!cpuis("MK02*")&&!cpuis("MK20DX256VLK10R")&&!cpuis("MK50DX256ZCLQ10")&&!cpuis("MK50DN512ZCLQ10")&&!cpuis("MK51DN256ZCMD10")&&!cpuis("MK51DN512ZCLQ10")&&!cpuis("MK52DN512ZCLQ10")&&!cpuis("MK52DN512ZCMD10")&&!cpuis("MK40D*ZVLL10")&&!cpuis("MK60DN512VMC10R")&&!cpuis("MK60DN512ZCAB10R")&&!cpuis("MKS20FN128V??12")&&!cpuis("MKS22FN128V??12")&&!cpuis("MKS20FN256V??12")&&!cpuis("MKS22FN256V??12")&&!cpuis("MK20D????ZVLK10")&&!cpuis("MK20DN512VLK10R")&&!cpuis("KK20DN512ZCAB10R")&&!cpuis("KK22FN???CAH12R")&&!cpuis("MK22FN256VLL12R")&&!cpuis("KK22FN???C?P12R")&&!cpuis("MK22FN512VDC12*")&&!cpuis("MK22FN512VFX12*")&&!cpuis("MK22FN512VLH12R")&&!cpuis("MK22FN128VLH10R")&&!cpuis("MK27FN2M0VMI15")&&!cpuis("?K28FN2M0CAU15R")&&!cpuis("MK28FN2M0VMI15")&&!cpuis("MK10DN512ZV??10*")&&!cpuis("MK10DX256ZV??10*")&&!cpuis("MK11DN512AVLK5*")&&!cpuis("MK11DN512VLK5*")&&!cpuis("MK20DN512VLK10")&&!cpuis("MK22FN128VLH10")&&!cpuis("MK22FN512VLH12")&&!cpuis("MK22FN256VLL12")&&!cpuis("KK60DN512ZCAB10R")&&!cpuis("KK60FN1M0VLQ15")
|
|
if (((per.l(ad:0x40020000))&0x80)==0x0)||(((per.l(ad:0x40020000+0x01))&0x10)==0x10)
|
|
sif cpuis("MK???X*")
|
|
rgroup.byte 0x16++0x01
|
|
line.byte 0x00 "FEPROT,EEPROM Protection Register"
|
|
bitfld.byte 0x00 7. " EPROT_[7] ,EEPROM region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 6. " [6] ,EEPROM region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 5. " [5] ,EEPROM region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 4. " [4] ,EEPROM region protect" "Protected,Not protected"
|
|
newline
|
|
bitfld.byte 0x00 3. " [3] ,EEPROM region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 2. " [2] ,EEPROM region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 1. " [1] ,EEPROM region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 0. " [0] ,EEPROM region protect" "Protected,Not protected"
|
|
line.byte 0x01 "FDPROT,Data Flash Protection Register"
|
|
bitfld.byte 0x01 7. " DPROT_[7] ,Data flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 6. " [6] ,Data flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 5. " [5] ,Data flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 4. " [4] ,Data flash region protect" "Protected,Not protected"
|
|
newline
|
|
bitfld.byte 0x01 3. " [3] ,Data flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 2. " [2] ,Data flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 1. " [1] ,Data flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 0. " [0] ,Data flash region protect" "Protected,Not protected"
|
|
else
|
|
hgroup.byte 0x16++0x0
|
|
hide.byte 0x00 "FEPROT,EEPROM Protection Register"
|
|
rgroup.byte 0x17++0x00
|
|
line.byte 0x00 "FDPROT,Data Flash Protection Register"
|
|
bitfld.byte 0x00 7. " DPROT_[7] ,Data flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 6. " [6] ,Data flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 5. " [5] ,Data flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 4. " [4] ,Data flash region protect" "Protected,Not protected"
|
|
newline
|
|
bitfld.byte 0x00 3. " [3] ,Data flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 2. " [2] ,Data flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 1. " [1] ,Data flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 0. " [0] ,Data flash region protect" "Protected,Not protected"
|
|
endif
|
|
else
|
|
sif cpuis("MK???X*")
|
|
group.byte 0x16++0x01
|
|
line.byte 0x00 "FEPROT,EEPROM Protection Register"
|
|
bitfld.byte 0x00 7. " EPROT_[7] ,EEPROM region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 6. " [6] ,EEPROM region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 5. " [5] ,EEPROM region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 4. " [4] ,EEPROM region protect" "Protected,Not protected"
|
|
newline
|
|
bitfld.byte 0x00 3. " [3] ,EEPROM region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 2. " [2] ,EEPROM region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 1. " [1] ,EEPROM region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 0. " [0] ,EEPROM region protect" "Protected,Not protected"
|
|
line.byte 0x01 "FDPROT,Data Flash Protection Register"
|
|
bitfld.byte 0x01 7. " DPROT_[7] ,Data flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 6. " [6] ,Data flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 5. " [5] ,Data flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 4. " [4] ,Data flash region protect" "Protected,Not protected"
|
|
newline
|
|
bitfld.byte 0x01 3. " [3] ,Data flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 2. " [2] ,Data flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 1. " [1] ,Data flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x01 0. " [0] ,Data flash region protect" "Protected,Not protected"
|
|
else
|
|
hgroup.byte 0x16++0x0
|
|
hide.byte 0x00 "FEPROT,EEPROM Protection Register"
|
|
group.byte 0x17++0x00
|
|
line.byte 0x00 "FDPROT,Data Flash Protection Register"
|
|
bitfld.byte 0x00 7. " DPROT_[7] ,Data flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 6. " [6] ,Data flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 5. " [5] ,Data flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 4. " [4] ,Data flash region protect" "Protected,Not protected"
|
|
newline
|
|
bitfld.byte 0x00 3. " [3] ,Data flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 2. " [2] ,Data flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 1. " [1] ,Data flash region protect" "Protected,Not protected"
|
|
bitfld.byte 0x00 0. " [0] ,Data flash region protect" "Protected,Not protected"
|
|
endif
|
|
endif
|
|
newline
|
|
endif
|
|
sif cpuis("MK02*")||cpuis("MK66*")||cpuis("MK65*")||cpuis("MK22FN256*")||cpuis("MK22FN128*")||cpuis("MK26FN*")||cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("MK22FN512VMP12")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VLH12")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512CBP12R")||cpuis("MK22FN512CAP12R")||cpuis("MK66FN2M0VLQ18R")||cpuis("MK65FN2M0VMI18R")||cpuis("MKS20FN128V??12")||cpuis("MKS22FN128V??12")||cpuis("MKS20FN256V??12")||cpuis("MKS22FN256V??12")||cpuis("KK22FN???C?P12R")||cpuis("MK22FN512VFX12*")||cpuis("MK22FN512VLH12R")||cpuis("KK22FN???CAH12R")||cpuis("KK26FN2M0CAC18R")||cpuis("MK27FN2M0VMI15")||cpuis("?K28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")||cpuis("KK65FN2M0CAC18R")
|
|
sif !cpuis("MK22FN128CAH12R")
|
|
rgroup.byte 0x18++0x03
|
|
line.byte 0x00 "XACCH3,Execute-only Access Register 3"
|
|
bitfld.byte 0x00 7. " XA_[39] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x00 6. " [38] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x00 5. " [37] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x00 4. " [36] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
newline
|
|
bitfld.byte 0x00 3. " [35] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x00 2. " [34] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x00 1. " [33] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x00 0. " [32] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
line.byte 0x01 "XACCH2,Execute-only Access Register 2"
|
|
bitfld.byte 0x01 7. " [47] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x01 6. " [46] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x01 5. " [45] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x01 4. " [44] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
newline
|
|
bitfld.byte 0x01 3. " [43] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x01 2. " [42] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x01 1. " [41] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x01 0. " [40] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
line.byte 0x02 "XACCH1,Execute-only Access Register 1"
|
|
bitfld.byte 0x02 7. " [55] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x02 6. " [54] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x02 5. " [53] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x02 4. " [52] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
newline
|
|
bitfld.byte 0x02 3. " [51] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x02 2. " [50] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x02 1. " [49] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x02 0. " [48] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
line.byte 0x03 "XACCH0,Execute-only Access Register 0"
|
|
bitfld.byte 0x03 7. " [63] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x03 6. " [62] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x03 5. " [61] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x03 4. " [60] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
newline
|
|
bitfld.byte 0x03 3. " [59] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x03 2. " [58] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x03 1. " [57] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x03 0. " [56] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
endif
|
|
rgroup.byte 0x1C++0x03
|
|
line.byte 0x00 "XACCL3,Execute-only Access Register 3"
|
|
sif cpuis("MK22FN128CAH12R")
|
|
bitfld.byte 0x00 7. " XA_[7] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
else
|
|
bitfld.byte 0x00 7. " [7] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
endif
|
|
bitfld.byte 0x00 6. " [6] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x00 5. " [5] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x00 4. " [4] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
newline
|
|
bitfld.byte 0x00 3. " [3] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x00 2. " [2] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x00 1. " [1] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x00 0. " [0] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
line.byte 0x01 "XACCL2,Execute-only Access Register 2"
|
|
bitfld.byte 0x01 7. " [15] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x01 6. " [14] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x01 5. " [13] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x01 4. " [12] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
newline
|
|
bitfld.byte 0x01 3. " [11] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x01 2. " [10] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x01 1. " [9] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x01 0. " [8] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
line.byte 0x02 "XACCL1,Execute-only Access Register 1"
|
|
bitfld.byte 0x02 7. " [23] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x02 6. " [22] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x02 5. " [21] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x02 4. " [20] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
newline
|
|
bitfld.byte 0x02 3. " [19] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x02 2. " [18] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x02 1. " [17] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x02 0. " [16] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
line.byte 0x03 "XACCL0,Execute-only Access Register 0"
|
|
bitfld.byte 0x03 7. " [31] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x03 6. " [30] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x03 5. " [29] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x03 4. " [28] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
newline
|
|
bitfld.byte 0x03 3. " [27] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x03 2. " [26] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x03 1. " [25] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
bitfld.byte 0x03 0. " [24] ,Execute-only access control" "Execute-only,Execute/Data"
|
|
newline
|
|
sif !cpuis("MK22FN128CAH12R")
|
|
rgroup.byte 0x20++0x03
|
|
line.byte 0x00 "SACCH3,Supervisor-only Access Register 3"
|
|
bitfld.byte 0x00 7. " SA_[39] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x00 6. " [38] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x00 5. " [37] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x00 4. " [36] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
newline
|
|
bitfld.byte 0x00 3. " [35] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x00 2. " [34] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x00 1. " [33] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x00 0. " [32] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
line.byte 0x01 "SACCH2,Supervisor-only Access Register 2"
|
|
bitfld.byte 0x01 7. " [47] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x01 6. " [46] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x01 5. " [45] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x01 4. " [44] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
newline
|
|
bitfld.byte 0x01 3. " [43] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x01 2. " [42] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x01 1. " [41] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x01 0. " [40] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
line.byte 0x02 "SACCH1,Supervisor-only Access Register 1"
|
|
bitfld.byte 0x02 7. " [55] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x02 6. " [54] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x02 5. " [53] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x02 4. " [52] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
newline
|
|
bitfld.byte 0x02 3. " [51] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x02 2. " [50] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x02 1. " [49] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x02 0. " [48] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
line.byte 0x03 "SACCH0,Supervisor-only Access Register 0"
|
|
bitfld.byte 0x03 7. " [63] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x03 6. " [62] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x03 5. " [61] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x03 4. " [60] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
newline
|
|
bitfld.byte 0x03 3. " [59] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x03 2. " [58] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x03 1. " [57] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x03 0. " [56] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
endif
|
|
rgroup.byte 0x24++0x03
|
|
line.byte 0x00 "SACCL3,Supervisor-only Access Register 3"
|
|
sif cpuis("MK22FN128CAH12R")
|
|
bitfld.byte 0x00 7. " SA_[7] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
else
|
|
bitfld.byte 0x00 7. " [7] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
endif
|
|
bitfld.byte 0x00 6. " [6] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x00 5. " [5] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x00 4. " [4] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
newline
|
|
bitfld.byte 0x00 3. " [3] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x00 2. " [2] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x00 1. " [1] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x00 0. " [0] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
line.byte 0x01 "SACCL2,Supervisor-only Access Register 2"
|
|
bitfld.byte 0x01 7. " [15] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x01 6. " [14] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x01 5. " [13] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x01 4. " [12] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
newline
|
|
bitfld.byte 0x01 3. " [11] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x01 2. " [10] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x01 1. " [9] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x01 0. " [8] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
line.byte 0x02 "SACCL1,Supervisor-only Access Register 1"
|
|
bitfld.byte 0x02 7. " [23] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x02 6. " [22] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x02 5. " [21] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x02 4. " [20] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
newline
|
|
bitfld.byte 0x02 3. " [19] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x02 2. " [18] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x02 1. " [17] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x02 0. " [16] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
line.byte 0x03 "SACCL0,Supervisor-only Access Register 0"
|
|
bitfld.byte 0x03 7. " [31] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x03 6. " [30] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x03 5. " [29] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x03 4. " [28] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
newline
|
|
bitfld.byte 0x03 3. " [27] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x03 2. " [26] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x03 1. " [25] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
bitfld.byte 0x03 0. " [24] ,Supervisor-only access control" "Supervisor,User/Supervisor"
|
|
rgroup.byte 0x28++0x00
|
|
line.byte 0x00 "FACSS,Flash Access Segment Size Register"
|
|
rgroup.byte 0x2B++0x00
|
|
line.byte 0x00 "FACSN,Flash Access Segment Number Register"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "Security and integrity modules"
|
|
tree "CRC (Cyclic Redundancy Check)"
|
|
base ad:0x40032000
|
|
width 9.
|
|
group.word 0x00++0x03
|
|
line.word 0x00 "DATA_L,CRC Data Low Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " LU ,CRC low upper byte"
|
|
hexmask.word.byte 0x00 0.--7. 1. " LL ,CRC low lower byte"
|
|
line.word 0x02 "DATA_H,CRC Data High Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " HU ,CRC high upper byte"
|
|
hexmask.word.byte 0x02 0.--7. 1. " HL ,CRC high lower byte"
|
|
if (((per.l(ad:0x40032000+0x08))&0x1000000)==0x1000000)
|
|
group.word 0x04++0x03
|
|
line.word 0x00 "GPOLY_L,CRC Polynomial Low Register"
|
|
hexmask.word 0x00 0.--15. 1. " LOW ,Low polynominal half-word"
|
|
line.word 0x02 "GPOLY_H,CRC Polynomial High Register"
|
|
hexmask.word 0x02 0.--15. 1. " HIGH ,High polynominal half-word"
|
|
else
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "GPOLY_L,CRC Polynomial Low Register"
|
|
hexmask.word 0x00 0.--15. 1. " LOW ,Low polynominal half-word"
|
|
hgroup.word 0x06++0x01
|
|
hide.word 0x00 "GPOLY_H,CRC Polynomial High Register"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 30.--31. " TOT ,Type of transpose for writes" "No transposition,Bits only,Bits and bytes,Bytes only"
|
|
bitfld.long 0x00 28.--29. " TOTR ,Type of transpose for read" "No transposition,Bits only,Bits and bytes,Bytes only"
|
|
bitfld.long 0x00 26. " FXOR ,Bit to enable XOR-ing the final checksum value while reading" "No XOR,XOR"
|
|
textline " "
|
|
bitfld.long 0x00 25. " WAS ,Write CRC data register as seed" "Data,Seed"
|
|
bitfld.long 0x00 24. " TCRC ,Width of CRC" "16-bit,32-bit"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "Analog Modules"
|
|
tree "ADC (Analog-to-Digital Converter)"
|
|
base ad:0x4003b000
|
|
width 8.
|
|
if (((per.l(ad:0x4003b000+0x0))&0x20)==0x00)
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "SC1_A,ADC Status And Control Registers 1"
|
|
rbitfld.long 0x00 7. " COCO ,Conversion complete flag" "Not completed,Completed"
|
|
bitfld.long 0x00 6. " AIEN ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " DIFF ,Differential mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " ADCH ,Input channel select" "DP0,DP1,DP2,DP3,AD4,AD5,AD6,AD7,AD8,AD9,AD10,AD11,AD12,AD13,AD14,AD15,AD16,AD17,AD18,AD19,AD20,AD21,AD22,AD23,,,Temp,Bandgap,,VREFH,VREFL,Disabled"
|
|
else
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "SC1_A,ADC Status And Control Registers 1"
|
|
rbitfld.long 0x00 7. " COCO ,Conversion complete flag" "Not completed,Completed"
|
|
bitfld.long 0x00 6. " AIEN ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " DIFF ,Differential mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " ADCH ,Input channel select" "D0,D1,D2,D3,,,,,,,,,,,,,,,,,,,,,,,Temp sensor,Bandgap,,VREFH,,Disabled"
|
|
endif
|
|
if (((per.l(ad:0x4003b000+0x4))&0x20)==0x00)
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "SC1_B,ADC Status And Control Registers 1"
|
|
rbitfld.long 0x00 7. " COCO ,Conversion complete flag" "Not completed,Completed"
|
|
bitfld.long 0x00 6. " AIEN ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " DIFF ,Differential mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " ADCH ,Input channel select" "DP0,DP1,DP2,DP3,AD4,AD5,AD6,AD7,AD8,AD9,AD10,AD11,AD12,AD13,AD14,AD15,AD16,AD17,AD18,AD19,AD20,AD21,AD22,AD23,,,Temp,Bandgap,,VREFH,VREFL,Disabled"
|
|
else
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "SC1_B,ADC Status And Control Registers 1"
|
|
rbitfld.long 0x00 7. " COCO ,Conversion complete flag" "Not completed,Completed"
|
|
bitfld.long 0x00 6. " AIEN ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " DIFF ,Differential mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " ADCH ,Input channel select" "D0,D1,D2,D3,,,,,,,,,,,,,,,,,,,,,,,Temp sensor,Bandgap,,VREFH,,Disabled"
|
|
endif
|
|
group.long 0x08++0x07
|
|
line.long 0x00 "CFG_1,ADC Configuration Register 1"
|
|
bitfld.long 0x00 7. " ADLPC ,Low-power configuration" "Normal,Low-power"
|
|
bitfld.long 0x00 5.--6. " ADIV ,Clock divide select" "/1,/2,/4,/8"
|
|
bitfld.long 0x00 4. " ADLSMP ,Sample time configuration" "Short,Long"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " MODE ,Conversion mode selection" "Single-ended 8-bit/Diff 9-bit,Single-ended 12-bit/Diff 13-bit,Single-ended 10-bit/Diff 11-bit,Single ended 16-bit/Diff 16-bit"
|
|
bitfld.long 0x00 0.--1. " ADICLK ,Input clock select" "Bus-clock,ALTCLK2,ALTCLK,ADACK"
|
|
line.long 0x04 "CFG_2,ADC Configuration Register 2"
|
|
bitfld.long 0x04 4. " MUXSEL ,ADC mux select" "ADCA,ADCB"
|
|
bitfld.long 0x04 3. " ADACKEN ,Asynchronous clock output enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " ADHSC ,High speed configuration" "Normal,High-speed"
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " ADLSTS ,Long sample time select" "24ADCK cycles,16ADCK cycles,10ADCK cycles,6ADCK cycles"
|
|
if (((per.l(ad:0x4003b000+0x000))&0x20)==0x00)
|
|
if (((per.l(ad:0x4003b000+0x008))&0x0C)==0x00)
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "RA,ADC Data Result Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " D ,Data result"
|
|
elif (((per.l(ad:0x4003b000+0x08))&0x0C)==0x04)
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "RA,ADC Data Result Register"
|
|
hexmask.long.word 0x00 0.--11. 1. " D ,Data result"
|
|
elif (((per.l(ad:0x4003b000+0x08))&0x0C)==0x08)
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "RA,ADC Data Result Register"
|
|
hexmask.long.word 0x00 0.--9. 1. " D ,Data result"
|
|
else
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "RA,ADC Data Result Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " D ,Data result"
|
|
endif
|
|
else
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "RA,ADC Data Result Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " D ,Data result"
|
|
endif
|
|
if (((per.l(ad:0x4003b000+0x004))&0x20)==0x00)
|
|
if (((per.l(ad:0x4003b000+0x008))&0x0C)==0x00)
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "RB,ADC Data Result Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " D ,Data result"
|
|
elif (((per.l(ad:0x4003b000+0x08))&0x0C)==0x04)
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "RB,ADC Data Result Register"
|
|
hexmask.long.word 0x00 0.--11. 1. " D ,Data result"
|
|
elif (((per.l(ad:0x4003b000+0x08))&0x0C)==0x08)
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "RB,ADC Data Result Register"
|
|
hexmask.long.word 0x00 0.--9. 1. " D ,Data result"
|
|
else
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "RB,ADC Data Result Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " D ,Data result"
|
|
endif
|
|
else
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "RB,ADC Data Result Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " D ,Data result"
|
|
endif
|
|
if (((per.l(ad:0x4003b000+0x000))&0x20)==0x00)
|
|
if (((per.l(ad:0x4003b000+0x008))&0x0C)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CV_1,Compare Value Registers"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CV ,Compare value"
|
|
elif (((per.l(ad:0x4003b000+0x08))&0x0C)==0x04)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CV_1,Compare Value Registers"
|
|
hexmask.long.word 0x00 0.--11. 1. " CV ,Compare value"
|
|
elif (((per.l(ad:0x4003b000+0x08))&0x0C)==0x08)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CV_1,Compare Value Registers"
|
|
hexmask.long.word 0x00 0.--9. 1. " CV ,Compare value"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CV_1,Compare Value Registers"
|
|
hexmask.long.word 0x00 0.--15. 1. " CV ,Compare value"
|
|
endif
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CV_1,Compare Value Registers"
|
|
hexmask.long.word 0x00 0.--15. 1. " CV ,Compare value"
|
|
endif
|
|
if (((per.l(ad:0x4003b000+0x20))&0x08)==0x08)
|
|
if (((per.l(ad:0x4003b000+0x004))&0x20)==0x00)
|
|
if (((per.l(ad:0x4003b000+0x008))&0x0C)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CV_2,Compare Value Registers"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CV ,Compare value"
|
|
elif (((per.l(ad:0x4003b000+0x08))&0x0C)==0x04)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CV_2,Compare Value Registers"
|
|
hexmask.long.word 0x00 0.--11. 1. " CV ,Compare value"
|
|
elif (((per.l(ad:0x4003b000+0x08))&0x0C)==0x08)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CV_2,Compare Value Registers"
|
|
hexmask.long.word 0x00 0.--9. 1. " CV ,Compare value"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CV_2,Compare Value Registers"
|
|
hexmask.long.word 0x00 0.--15. 1. " CV ,Compare value"
|
|
endif
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CV_2,Compare Value Registers"
|
|
hexmask.long.word 0x00 0.--15. 1. " CV ,Compare value"
|
|
endif
|
|
endif
|
|
group.long 0x20++0x0F
|
|
line.long 0x00 "SC_2,Status And Control Register 2"
|
|
rbitfld.long 0x00 7. " ADACT ,Conversion active" "Not in progress,In progress"
|
|
bitfld.long 0x00 6. " ADTRG ,Conversion trigger select" "Software,Hardware"
|
|
bitfld.long 0x00 5. " ACFE ,Compare function enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ACFGT ,Compare function greater than enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ACREN ,Compare function range enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DMAEN ,DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " REFSEL ,Voltage reference selection" "Default,Alternate,?..."
|
|
line.long 0x04 "SC_3,Status And Control Register 3"
|
|
bitfld.long 0x04 7. " CAL ,Calibration" "Not started,Started"
|
|
eventfld.long 0x04 6. " CALF ,Calibration failed flag" "Not occurred,Occurred"
|
|
bitfld.long 0x04 3. " ADCO ,Continuous conversion enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " AVGE ,Hardware average enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--1. " AVGS ,Hardware average select" "4 samples,8 samples,16 samples,32 samples"
|
|
line.long 0x08 "OFS,ADC Offset Correction Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " OFS ,Offset error correction value"
|
|
line.long 0x0C "PG,ADC Plus-side Gain Register"
|
|
hexmask.long.word 0x0C 0.--15. 1. " PG ,Plus-side gain"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "MG,ADC Minus-side Gain Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " MG ,Minus-Side gain"
|
|
group.long 0x34++0x1B
|
|
line.long 0x00 "CLPD,ADC Plus-side General Calibration Value Register"
|
|
bitfld.long 0x00 0.--5. " CLPD ,Calibration value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x04 "CLPS,ADC Plus-side General Calibration Value Register"
|
|
bitfld.long 0x04 0.--5. " CLPS ,Calibration value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x08 "CLP_4,ADC Plus-side General Calibration Value Register"
|
|
hexmask.long.word 0x08 0.--9. 1. " CLP4 ,Calibration value"
|
|
line.long 0x0C "CLP_3,ADC Plus-side General Calibration Value Register"
|
|
hexmask.long.word 0x0C 0.--8. 1. " CLP3 ,Calibration value"
|
|
line.long 0x10 "CLP_2,ADC Plus-side General Calibration Value Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " CLP2 ,Calibration value"
|
|
line.long 0x14 "CLP_1,ADC Plus-side General Calibration Value Register"
|
|
hexmask.long.byte 0x14 0.--6. 1. " CLP1 ,Calibration value"
|
|
line.long 0x18 "CLP_0,ADC Plus-side General Calibration Value Register"
|
|
bitfld.long 0x18 0.--5. " CLP0 ,Calibration value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x54++0x1B
|
|
line.long 0x00 "CLMD,ADC Minus-side General Calibration Value Register"
|
|
bitfld.long 0x00 0.--5. " CLMD ,Calibration value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x04 "CLMS,ADC Minus-side General Calibration Value Register"
|
|
bitfld.long 0x04 0.--5. " CLMS ,Calibration value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x08 "CLM_4,ADC Minus-side General Calibration Value Register"
|
|
hexmask.long.word 0x08 0.--9. 1. " CLM4 ,Calibration value"
|
|
line.long 0x0C "CLM_3,CLM4,ADC Minus-side General Calibration Value Register"
|
|
hexmask.long.word 0x0C 0.--8. 1. " CLM3 ,Calibration value"
|
|
line.long 0x10 "CLM_2,ADC Minus-side General Calibration Value Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " CLM2 ,Calibration value"
|
|
line.long 0x14 "CLM_1,ADC Minus-side General Calibration Value Register"
|
|
hexmask.long.byte 0x14 0.--6. 1. " CLM1 ,Calibration value"
|
|
line.long 0x18 "CLM_0,ADC Minus-side General Calibration Value Register"
|
|
bitfld.long 0x18 0.--5. " CLM0 ,Calibration value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
width 0x0B
|
|
tree.end
|
|
tree.open "HSCMP (Comparator/6-bit DAC Converter)"
|
|
base ad:0x40073000
|
|
tree "CMP 0"
|
|
width 12.
|
|
group.byte 0x00++0x05
|
|
line.byte 0x00 "CMP0_CR0,CMP Control Register 0"
|
|
bitfld.byte 0x00 4.--6. " FILTER_CNT ,Filter sample count" "Disabled,1 sample,2 samples,3 samples,4 samples,5 samples,6 samples,7 samples"
|
|
bitfld.byte 0x00 0.--1. " HYSTCTR ,Comparator hard block hysteresis control" "Level 0,Level 1,Level 2,Level 3"
|
|
line.byte 0x01 "CMP0_CR1,CMP Control Register 1"
|
|
bitfld.byte 0x01 7. " SE ,Sample enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 6. " WE ,Windowing enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 5. " TRIGM ,Trigger mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x01 4. " PMODE ,Power mode select" "Low-Speed,High-speed"
|
|
bitfld.byte 0x01 3. " INV ,Comparator INVERT" "Not inverted,Inverted"
|
|
bitfld.byte 0x01 2. " COS ,Comparator output select" "COUT,COUTA"
|
|
textline " "
|
|
bitfld.byte 0x01 1. " OPE ,Comparator output pin enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 0. " EN ,Comparator module enable" "Disabled,Enabled"
|
|
line.byte 0x02 "CMP0_FPR,CMP Filter Period Register"
|
|
line.byte 0x03 "CMP0_SCR,CMP Status and Control Register"
|
|
bitfld.byte 0x03 6. " DMAEN ,DMA enable control" "Disabled,Enabled"
|
|
bitfld.byte 0x03 4. " IER ,Comparator interrupt enable rising" "Disabled,Enabled"
|
|
bitfld.byte 0x03 3. " IEF ,Comparator interrupt enable falling" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.byte 0x03 2. " CFR ,Analog comparator flag rising" "Not occurred,Occurred"
|
|
eventfld.byte 0x03 1. " CFF ,Analog comparator flag falling" "Not occurred,Occurred"
|
|
rbitfld.byte 0x03 0. " COUT ,Analog comparator output" "Low,High"
|
|
line.byte 0x04 "CMP0_DACCR,DAC Control Register"
|
|
bitfld.byte 0x04 7. " DACEN ,DAC enable" "Disabled,Enabled"
|
|
bitfld.byte 0x04 6. " VRSEL ,Supply voltage reference source select" "VREF_OUT,VDD"
|
|
bitfld.byte 0x04 0.--5. " VOSEL ,DAC output voltage level select" "1/64 Vin,2/64 Vin,3/64 Vin,4/64 Vin,5/64 Vin,6/64 Vin,7/64 Vin,8/64 Vin,9/64 Vin,10/64 Vin,11/64 Vin,12/64 Vin,13/64 Vin,14/64 Vin,15/64 Vin,16/64 Vin,17/64 Vin,18/64 Vin,19/64 Vin,20/64 Vin,21/64 Vin,22/64 Vin,23/64 Vin,24/64 Vin,25/64 Vin,26/64 Vin,27/64 Vin,28/64 Vin,29/64 Vin,30/64 Vin,31/64 Vin,32/64 Vin,33/64 Vin,34/64 Vin,35/64 Vin,36/64 Vin,37/64 Vin,38/64 Vin,39/64 Vin,40/64 Vin,41/64 Vin,42/64 Vin,43/64 Vin,44/64 Vin,45/64 Vin,46/64 Vin,47/64 Vin,48/64 Vin,49/64 Vin,50/64 Vin,51/64 Vin,52/64 Vin,53/64 Vin,54/64 Vin,55/64 Vin,56/64 Vin,57/64 Vin,58/64 Vin,59/64 Vin,60/64 Vin,61/64 Vin,62/64 Vin,63/64 Vin,Vin"
|
|
sif cpuis("MK02FN64VLH10")||cpuis("MK02FN128VLH10")
|
|
line.byte 0x05 "CMP0_MUXCR,MUX Control Register"
|
|
bitfld.byte 0x05 3.--5. " PSEL ,Positive input MUX control" "CMP0_IN0,CMP0_IN1,CMP0_IN2,CMP0_IN3,CMP0_IN4,VREF Out/CMP0_IN5,Bandgap,6b DAC0 Ref."
|
|
textline " "
|
|
bitfld.byte 0x05 0.--2. " MSEL ,Minus input MUX control" "CMP0_IN0,CMP0_IN1,CMP0_IN2,CMP0_IN3,CMP0_IN4,VREF Out/CMP0_IN5,Bandgap,6b DAC0 Ref."
|
|
elif cpuis("MK02FN64VLF10")||cpuis("MK02FN128VLF10")
|
|
line.byte 0x05 "CMP0_MUXCR,MUX Control Register"
|
|
bitfld.byte 0x05 3.--5. " PSEL ,Positive input MUX control" "CMP0_IN0,CMP0_IN1,,,,VREF Out/CMP0_IN5,Bandgap,6b DAC0 Ref."
|
|
textline " "
|
|
bitfld.byte 0x05 0.--2. " MSEL ,Minus input MUX control" "CMP0_IN0,CMP0_IN1,,,,VREF Out/CMP0_IN5,Bandgap,6b DAC0 Ref."
|
|
else
|
|
line.byte 0x05 "CMP0_MUXCR,MUX Control Register"
|
|
bitfld.byte 0x05 3.--5. " PSEL ,Positive input MUX control" "CMP0_IN0,CMP0_IN1,,,,,Bandgap,6b DAC0 Ref."
|
|
textline " "
|
|
bitfld.byte 0x05 0.--2. " MSEL ,Minus input MUX control" "CMP0_IN0,CMP0_IN1,,,,,Bandgap,6b DAC0 Ref."
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "CMP 1"
|
|
width 12.
|
|
group.byte 0x08++0x05
|
|
line.byte 0x00 "CMP1_CR0,CMP Control Register 0"
|
|
bitfld.byte 0x00 4.--6. " FILTER_CNT ,Filter sample count" "Disabled,1 sample,2 samples,3 samples,4 samples,5 samples,6 samples,7 samples"
|
|
bitfld.byte 0x00 0.--1. " HYSTCTR ,Comparator hard block hysteresis control" "Level 0,Level 1,Level 2,Level 3"
|
|
line.byte 0x01 "CMP1_CR1,CMP Control Register 1"
|
|
bitfld.byte 0x01 7. " SE ,Sample enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 6. " WE ,Windowing enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 5. " TRIGM ,Trigger mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x01 4. " PMODE ,Power mode select" "Low-Speed,High-speed"
|
|
bitfld.byte 0x01 3. " INV ,Comparator INVERT" "Not inverted,Inverted"
|
|
bitfld.byte 0x01 2. " COS ,Comparator output select" "COUT,COUTA"
|
|
textline " "
|
|
bitfld.byte 0x01 1. " OPE ,Comparator output pin enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 0. " EN ,Comparator module enable" "Disabled,Enabled"
|
|
line.byte 0x02 "CMP1_FPR,CMP Filter Period Register"
|
|
line.byte 0x03 "CMP1_SCR,CMP Status and Control Register"
|
|
bitfld.byte 0x03 6. " DMAEN ,DMA enable control" "Disabled,Enabled"
|
|
bitfld.byte 0x03 4. " IER ,Comparator interrupt enable rising" "Disabled,Enabled"
|
|
bitfld.byte 0x03 3. " IEF ,Comparator interrupt enable falling" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.byte 0x03 2. " CFR ,Analog comparator flag rising" "Not occurred,Occurred"
|
|
eventfld.byte 0x03 1. " CFF ,Analog comparator flag falling" "Not occurred,Occurred"
|
|
rbitfld.byte 0x03 0. " COUT ,Analog comparator output" "Low,High"
|
|
line.byte 0x04 "CMP1_DACCR,DAC Control Register"
|
|
bitfld.byte 0x04 7. " DACEN ,DAC enable" "Disabled,Enabled"
|
|
bitfld.byte 0x04 6. " VRSEL ,Supply voltage reference source select" "VREF_OUT,VDD"
|
|
bitfld.byte 0x04 0.--5. " VOSEL ,DAC output voltage level select" "1/64 Vin,2/64 Vin,3/64 Vin,4/64 Vin,5/64 Vin,6/64 Vin,7/64 Vin,8/64 Vin,9/64 Vin,10/64 Vin,11/64 Vin,12/64 Vin,13/64 Vin,14/64 Vin,15/64 Vin,16/64 Vin,17/64 Vin,18/64 Vin,19/64 Vin,20/64 Vin,21/64 Vin,22/64 Vin,23/64 Vin,24/64 Vin,25/64 Vin,26/64 Vin,27/64 Vin,28/64 Vin,29/64 Vin,30/64 Vin,31/64 Vin,32/64 Vin,33/64 Vin,34/64 Vin,35/64 Vin,36/64 Vin,37/64 Vin,38/64 Vin,39/64 Vin,40/64 Vin,41/64 Vin,42/64 Vin,43/64 Vin,44/64 Vin,45/64 Vin,46/64 Vin,47/64 Vin,48/64 Vin,49/64 Vin,50/64 Vin,51/64 Vin,52/64 Vin,53/64 Vin,54/64 Vin,55/64 Vin,56/64 Vin,57/64 Vin,58/64 Vin,59/64 Vin,60/64 Vin,61/64 Vin,62/64 Vin,63/64 Vin,Vin"
|
|
sif cpuis("MK02FN64VLH10")||cpuis("MK02FN128VLH10")
|
|
line.byte 0x05 "CMP1_MUXCR,MUX Control Register"
|
|
bitfld.byte 0x05 3.--5. " PSEL ,Positive input MUX control" "CMP1_IN0,CMP1_IN1,,12-bit DAC0_OUT/CMP1_IN3,,VREF Out/CMP1_IN5,Bandgap,6b DAC1 Ref."
|
|
textline " "
|
|
bitfld.byte 0x05 0.--2. " MSEL ,Minus input MUX control" "CMP1_IN0,CMP1_IN1,,12-bit DAC0_OUT/CMP1_IN3,,VREF Out/CMP1_IN5,Bandgap,6b DAC1 Ref."
|
|
elif cpuis("MK02FN64VLF10")||cpuis("MK02FN128VLF10")
|
|
line.byte 0x05 "CMP1_MUXCR,MUX Control Register"
|
|
bitfld.byte 0x05 3.--5. " PSEL ,Positive input MUX control" "CMP1_IN0,CMP1_IN1,,12-bit DAC0_OUT/CMP1_IN3,,VREF Out/CMP1_IN5,Bandgap,6b DAC1 Ref."
|
|
textline " "
|
|
bitfld.byte 0x05 0.--2. " MSEL ,Minus input MUX control" "CMP1_IN0,CMP1_IN1,,12-bit DAC0_OUT/CMP1_IN3,,VREF Out/CMP1_IN5,Bandgap,6b DAC1 Ref."
|
|
else
|
|
line.byte 0x05 "CMP1_MUXCR,MUX Control Register"
|
|
bitfld.byte 0x05 3.--5. " PSEL ,Positive input MUX control" "CMP1_IN0,CMP1_IN1,,12-bit DAC0_OUT/CMP1_IN3,,,Bandgap,6b DAC1 Ref."
|
|
textline " "
|
|
bitfld.byte 0x05 0.--2. " MSEL ,Minus input MUX control" "CMP1_IN0,CMP1_IN1,,12-bit DAC0_OUT/CMP1_IN3,,,Bandgap,6b DAC1 Ref."
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree "DAC (12-bit Digital-to-Analog Converter)"
|
|
base ad:0x4003F000
|
|
width 8.
|
|
sif cpuis("MK20DX64VEX7")||cpuis("MK20DX128VEX7")||cpuis("MK20DX256VEX7")||cpuis("MK20DX64VMB7")||cpuis("MK20DX128VMB7")||cpuis("MK20DX256VMB7")||cpuis("MK60DN512VMC10R")||cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")
|
|
group.byte 0x00++0x01
|
|
line.byte 0x00 "DAT0L,DAC Data Low Register"
|
|
line.byte 0x01 "DAT0H,DAC Data High Register"
|
|
hexmask.byte 0x01 0.--3. 1. " DATA[11:8] ,Data bits"
|
|
group.byte 0x2++0x00
|
|
line.byte 0x00 "DAT1L,DAC Data Low Register"
|
|
group.byte 0x4++0x00
|
|
line.byte 0x00 "DAT2L,DAC Data Low Register"
|
|
group.byte 0x6++0x00
|
|
line.byte 0x00 "DAT3L,DAC Data Low Register"
|
|
group.byte 0x8++0x00
|
|
line.byte 0x00 "DAT4L,DAC Data Low Register"
|
|
group.byte 0xA++0x00
|
|
line.byte 0x00 "DAT5L,DAC Data Low Register"
|
|
group.byte 0xC++0x00
|
|
line.byte 0x00 "DAT6L,DAC Data Low Register"
|
|
group.byte 0xE++0x00
|
|
line.byte 0x00 "DAT7L,DAC Data Low Register"
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "DAT8L,DAC Data Low Register"
|
|
group.byte 0x12++0x00
|
|
line.byte 0x00 "DAT9L,DAC Data Low Register"
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "DAT10L,DAC Data Low Register"
|
|
group.byte 0x16++0x00
|
|
line.byte 0x00 "DAT11L,DAC Data Low Register"
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "DAT12L,DAC Data Low Register"
|
|
group.byte 0x1A++0x00
|
|
line.byte 0x00 "DAT13L,DAC Data Low Register"
|
|
group.byte 0x1C++0x00
|
|
line.byte 0x00 "DAT14L,DAC Data Low Register"
|
|
group.byte 0x1E++0x00
|
|
line.byte 0x00 "DAT15L,DAC Data Low Register"
|
|
else
|
|
group.byte 0x0++0x01
|
|
line.byte 0x00 "DAT0L,DAC Data Low Register"
|
|
line.byte 0x01 "DAT0H,DAC Data High Register"
|
|
hexmask.byte 0x01 0.--3. 1. " DATA[11:8] ,Data bits"
|
|
group.byte 0x2++0x01
|
|
line.byte 0x00 "DAT1L,DAC Data Low Register"
|
|
line.byte 0x01 "DAT1H,DAC Data High Register"
|
|
hexmask.byte 0x01 0.--3. 1. " DATA[11:8] ,Data bits"
|
|
group.byte 0x4++0x01
|
|
line.byte 0x00 "DAT2L,DAC Data Low Register"
|
|
line.byte 0x01 "DAT2H,DAC Data High Register"
|
|
hexmask.byte 0x01 0.--3. 1. " DATA[11:8] ,Data bits"
|
|
group.byte 0x6++0x01
|
|
line.byte 0x00 "DAT3L,DAC Data Low Register"
|
|
line.byte 0x01 "DAT3H,DAC Data High Register"
|
|
hexmask.byte 0x01 0.--3. 1. " DATA[11:8] ,Data bits"
|
|
group.byte 0x8++0x01
|
|
line.byte 0x00 "DAT4L,DAC Data Low Register"
|
|
line.byte 0x01 "DAT4H,DAC Data High Register"
|
|
hexmask.byte 0x01 0.--3. 1. " DATA[11:8] ,Data bits"
|
|
group.byte 0xA++0x01
|
|
line.byte 0x00 "DAT5L,DAC Data Low Register"
|
|
line.byte 0x01 "DAT5H,DAC Data High Register"
|
|
hexmask.byte 0x01 0.--3. 1. " DATA[11:8] ,Data bits"
|
|
group.byte 0xC++0x01
|
|
line.byte 0x00 "DAT6L,DAC Data Low Register"
|
|
line.byte 0x01 "DAT6H,DAC Data High Register"
|
|
hexmask.byte 0x01 0.--3. 1. " DATA[11:8] ,Data bits"
|
|
group.byte 0xE++0x01
|
|
line.byte 0x00 "DAT7L,DAC Data Low Register"
|
|
line.byte 0x01 "DAT7H,DAC Data High Register"
|
|
hexmask.byte 0x01 0.--3. 1. " DATA[11:8] ,Data bits"
|
|
group.byte 0x10++0x01
|
|
line.byte 0x00 "DAT8L,DAC Data Low Register"
|
|
line.byte 0x01 "DAT8H,DAC Data High Register"
|
|
hexmask.byte 0x01 0.--3. 1. " DATA[11:8] ,Data bits"
|
|
group.byte 0x12++0x01
|
|
line.byte 0x00 "DAT9L,DAC Data Low Register"
|
|
line.byte 0x01 "DAT9H,DAC Data High Register"
|
|
hexmask.byte 0x01 0.--3. 1. " DATA[11:8] ,Data bits"
|
|
group.byte 0x14++0x01
|
|
line.byte 0x00 "DAT10L,DAC Data Low Register"
|
|
line.byte 0x01 "DAT10H,DAC Data High Register"
|
|
hexmask.byte 0x01 0.--3. 1. " DATA[11:8] ,Data bits"
|
|
group.byte 0x16++0x01
|
|
line.byte 0x00 "DAT11L,DAC Data Low Register"
|
|
line.byte 0x01 "DAT11H,DAC Data High Register"
|
|
hexmask.byte 0x01 0.--3. 1. " DATA[11:8] ,Data bits"
|
|
group.byte 0x18++0x01
|
|
line.byte 0x00 "DAT12L,DAC Data Low Register"
|
|
line.byte 0x01 "DAT12H,DAC Data High Register"
|
|
hexmask.byte 0x01 0.--3. 1. " DATA[11:8] ,Data bits"
|
|
group.byte 0x1A++0x01
|
|
line.byte 0x00 "DAT13L,DAC Data Low Register"
|
|
line.byte 0x01 "DAT13H,DAC Data High Register"
|
|
hexmask.byte 0x01 0.--3. 1. " DATA[11:8] ,Data bits"
|
|
group.byte 0x1C++0x01
|
|
line.byte 0x00 "DAT14L,DAC Data Low Register"
|
|
line.byte 0x01 "DAT14H,DAC Data High Register"
|
|
hexmask.byte 0x01 0.--3. 1. " DATA[11:8] ,Data bits"
|
|
group.byte 0x1E++0x01
|
|
line.byte 0x00 "DAT15L,DAC Data Low Register"
|
|
line.byte 0x01 "DAT15H,DAC Data High Register"
|
|
hexmask.byte 0x01 0.--3. 1. " DATA[11:8] ,Data bits"
|
|
endif
|
|
newline
|
|
width 4.
|
|
group.byte 0x20++0x01
|
|
line.byte 0x00 "SR,DAC Status Register"
|
|
bitfld.byte 0x00 2. " DACBFWMF ,DAC buffer reached the watermark level" "Not reached,Reached"
|
|
bitfld.byte 0x00 1. " DACBFRPTF ,DAC buffer read pointer is zero" "Not zero,Zero"
|
|
bitfld.byte 0x00 0. " DACBFRPBF ,DAC buffer read pointer bottom position flag (pointer not equal/equal to the DACBFUP)" "Not equal,Equal"
|
|
line.byte 0x01 "C0,DAC Control Register"
|
|
bitfld.byte 0x01 7. " DACEN ,DAC enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 6. " DACRFS ,DAC reference select" "VREF_OUT,VDDA"
|
|
bitfld.byte 0x01 5. " DACTRGSEL ,DAC trigger select" "Hardware,Software"
|
|
bitfld.byte 0x01 4. " DACSWTRG ,DAC software trigger" "Not valid,Valid"
|
|
newline
|
|
bitfld.byte 0x01 3. " LPEN ,DAC low power control" "High-Power,Low-Power"
|
|
bitfld.byte 0x01 2. " DACBWIEN ,DAC buffer watermark interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 1. " DACBTIEN ,DAC buffer read pointer top flag interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 0. " DACBBIEN ,DAC buffer read pointer bottom flag interrupt enable" "Disabled,Enabled"
|
|
sif cpuis("MK22FN128*")||cpuis("MK22FN256*")||cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("MK20FN1M0VLQ12R")||cpuis("MK22FN1M0AVMC12")||cpuis("MK22FX512AVMC12")||cpuis("MK70*")||cpuis("MK22FN512VMP12")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VLH12")||cpuis("MK22FN512VDC12")||cpuis("MK22FN512CBP12R")||cpuis("MK22FN512CAP12R")||cpuis("MKS2?FN???V??12")||cpuis("KK22FN???C?P12R")||cpuis("MK22FN512VDC12*")||cpuis("MK22FN512VFX12*")||cpuis("MK22FN512VLH12R")||cpuis("KK22FN???CAH12R")||cpuis("MK27FN2M0VMI15")||cpuis("?K28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")||cpuis("KK60FN1M0VLQ15")
|
|
if (((per.b(ad:0x4003F000+0x22))&0x06)==0x06)
|
|
group.byte 0x22++0x00
|
|
line.byte 0x00 "C1,DAC Control Register 1"
|
|
bitfld.byte 0x00 7. " DMAEN ,DMA enable select" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3.--4. " DACBFWM ,DAC buffer watermark (Quantity of data remaining in FIFO that will set watermark status)" "2 or less,Max/4 or less,Max/2 or less,Max-2 or less"
|
|
bitfld.byte 0x00 1.--2. " DACBFMD ,DAC buffer work mode select" "Normal,Swing,One-Time scan,FIFO"
|
|
bitfld.byte 0x00 0. " DACBFEN ,DAC buffer enable" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x22++0x00
|
|
line.byte 0x00 "C1,DAC Control Register 1"
|
|
bitfld.byte 0x00 7. " DMAEN ,DMA enable select" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3.--4. " DACBFWM ,DAC buffer watermark select" "1 word,2 words,3 words,4 words"
|
|
bitfld.byte 0x00 1.--2. " DACBFMD ,DAC buffer work mode select" "Normal,Swing,One-Time scan,FIFO"
|
|
bitfld.byte 0x00 0. " DACBFEN ,DAC buffer enable" "Disabled,Enabled"
|
|
endif
|
|
elif cpuis("MK22FX512AVLH12")||cpuis("MK22FN1M0AVLH12")||cpuis("MK22FN1M0AVLQ12")||cpuis("MK22FN1M0AVMD12")||cpuis("MK22FX512AVLQ12")||cpuis("MK22FX512AVMD12")||cpuis("MK22FX512AVLH12R")
|
|
group.byte 0x22++0x00
|
|
line.byte 0x00 "C1,DAC Control Register 1"
|
|
bitfld.byte 0x00 7. " DMAEN ,DMA enable select" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3.--4. " DACBFWM ,DAC buffer watermark select" "1 word,2 words,?..."
|
|
bitfld.byte 0x00 1.--2. " DACBFMD ,DAC buffer work mode select" "Normal,,One-Time scan,?..."
|
|
bitfld.byte 0x00 0. " DACBFEN ,DAC buffer enable" "Disabled,Enabled"
|
|
elif cpuis("MK02*")
|
|
group.byte 0x22++0x00
|
|
line.byte 0x00 "C1,DAC Control Register 1"
|
|
bitfld.byte 0x00 7. " DMAEN ,DMA enable select" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3.--4. " DACBFWM ,DAC buffer watermark select" "1 word,2 words,3 words,4 words"
|
|
bitfld.byte 0x00 1.--2. " DACBFMD ,DAC buffer work mode select" "Normal,Swing,One-Time scan,FIFO"
|
|
bitfld.byte 0x00 0. " DACBFEN ,DAC buffer enable" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x22++0x00
|
|
line.byte 0x00 "C1,DAC Control Register 1"
|
|
bitfld.byte 0x00 7. " DMAEN ,DMA enable select" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3.--4. " DACBFWM ,DAC buffer watermark select" "1 word,2 words,3 words,4 words"
|
|
bitfld.byte 0x00 1.--2. " DACBFMD ,DAC buffer work mode select" "Normal,Swing,One-Time scan,?..."
|
|
bitfld.byte 0x00 0. " DACBFEN ,DAC buffer enable" "Disabled,Enabled"
|
|
endif
|
|
group.byte 0x23++0x00
|
|
line.byte 0x00 "C2,DAC Control Register 2"
|
|
sif cpuis("MK22FX512AVMD12")||cpuis("MK22FX512AVLQ12")||cpuis("MK22FX512AVLH12")||cpuis("MK22FN1M0AVMD12")||cpuis("MK22FN1M0AVLQ12")||cpuis("MK22FN1M0AVLH12")||cpuis("MK22FX512AVLH12R")
|
|
bitfld.byte 0x00 4. " DACBFRP ,DAC buffer read pointer" "0,1"
|
|
bitfld.byte 0x00 0. " DACBFUP ,DAC buffer upper limit" "0,1"
|
|
else
|
|
bitfld.byte 0x00 4.--7. " DACBFRP ,DAC buffer read pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0.--3. " DACBFUP ,DAC buffer upper limit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "VREFV1 (Voltage Reference)"
|
|
base ad:0x40074000
|
|
width 5.
|
|
group.byte 0x00++0x01
|
|
line.byte 0x00 "TRM,VREF Trim Register"
|
|
sif cpuis("MK10FN1M0VMD12")||cpuis("MK10FX512VLQ12")||cpuis("MK10FX512VMD12")
|
|
bitfld.byte 0x00 6. " CHOPEN ,Chop oscillator enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.byte 0x00 0.--5. " TRIM ,Trim bits" "Min,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,Max"
|
|
line.byte 0x01 "SC,VREF Status and Control Register"
|
|
bitfld.byte 0x01 7. " VREFEN ,Internal voltage reference enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 6. " REGEN ,Regulator enable" "Disabled,Enabled"
|
|
sif cpuis("MK10FN1M0VLQ12")||cpuis("MK10FN1M0VMD12")||cpuis("MK10FX512VLQ12")||cpuis("MK10FX512VMD12")||cpuis("MK10DN512ZV??10*")||cpuis("MK10DX256ZV??10*")
|
|
textline " "
|
|
rbitfld.byte 0x01 2. " VREFST ,Internal voltage reference has settled" "Not ready,Ready"
|
|
bitfld.byte 0x01 0.--1. " MODE_LV ,Buffer mode selection" "Bandgap,,Tight-regulation,?..."
|
|
else
|
|
textline " "
|
|
bitfld.byte 0x01 5. " ICOMPEN ,Second order curvature compensation enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.byte 0x01 2. " VREFST ,Internal voltage reference stable" "Not stable,Stable"
|
|
bitfld.byte 0x01 0.--1. " MODE_LV ,Buffer mode selection" "Bandgap,High power buffer,Low-power buffer,?..."
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "Timers"
|
|
tree "PDB (Programmable Delay Block)"
|
|
base ad:0x40036000
|
|
width 6.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "SC,Status and Control Register"
|
|
bitfld.long 0x00 18.--19. " LDMOD ,Load mode select" "Immediately after 1 to LDOK,PDB reach MOD,Trigger input detected,Trigger input detected/PDB reach MOD"
|
|
newline
|
|
bitfld.long 0x00 17. " PDBEIE ,PDB sequence error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SWTRIG ,Software trigger" "Not triggered,Triggered"
|
|
bitfld.long 0x00 15. " DMAEN ,DMA enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 12.--14. " PRESCALER ,Prescaler divider select (of multiplication factor)" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
sif cpuis("MK11D*MC*")
|
|
bitfld.long 0x00 8.--11. " TRGSEL ,Trigger input source select" "External,CMP 0,CMP 1,,PIT Ch_0 Out.,PIT Ch_1 Out.,PIT Ch_2 Out.,PIT Ch_3 Out.,FTM_0,FTM_1,FTM_2,,RTC Alarm,RTC Sec.,LPTMR Out.,Software"
|
|
elif cpuis("MK24FN256VDC12")
|
|
bitfld.long 0x00 8.--11. " TRGSEL ,Trigger input source select" "External,CMP 0,CMP 1,,PIT Ch 0,PIT Ch 1,PIT Ch 2,PIT Ch 3,FTM0,FTM1,FTM2,FTM3,RTC Alarm,RTC Seconds,LPTMR,Software"
|
|
elif cpuis("MK24FN1M0CAJ12R")||cpuis("MK24FN1M0VDC12R")||cpuis("MK24FN1M0VLL12")||cpuis("MK24FN1M0VLL12R")||cpuis("MK24FN1M0VLQ12R")||cpuis("KK60FN1M0VLQ15")||cpuis("MK63FN1M0VLQ12R")||cpuis("MK65FN2M0VMI18R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK66FN2M0VLQ18R")
|
|
bitfld.long 0x00 8.--11. " TRGSEL ,Trigger input source select" "External,CMP 0,CMP 1,CMP 2,PIT Ch 0,PIT Ch 1,PIT Ch 2,PIT Ch 3,FTM0,FTM1,FTM2,FTM3,RTC Alarm,RTC Seconds,LPTMR,Software"
|
|
elif cpuis("MK20DX64VMB7")||cpuis("MK20DX128VMB7")||cpuis("MK20DX256VMB7")||cpuis("MK10DN512ZVLK10*")||cpuis("MK10DN512ZVLL10*")||cpuis("MK10DN512ZVLQ10*")||cpuis("MK10DN512ZVMD10*")||cpuis("MK10DN512ZVMC10*")||cpuis("MK10DX256ZVLQ10*")||cpuis("MK10DX256ZVMD10*")||cpuis("MK20DX64VEX7")||cpuis("MK20DX128VEX7")||cpuis("MK20DX256VEX7")||cpuis("MK60DX256ZVLL10")||cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN512ZVMC10")||cpuis("KK60DN512ZCAB10R")
|
|
bitfld.long 0x00 8.--11. " TRGSEL ,Trigger input source select" "External,CMP 0,CMP 1,CMP 2,PIT Ch 0,PIT Ch 1,PIT Ch 2,PIT Ch 3,FTM0,FTM1,FTM2,,RTC Alarm,RTC Seconds,LPTMR,Software"
|
|
elif cpuis("MK20DN32VEX5")||cpuis("MK20DN64VEX5")||cpuis("MK20DN128VEX5")||cpuis("MK20DX32VEX5")||cpuis("MK20DX64VEX5")||cpuis("MK20DX128VEX5")
|
|
bitfld.long 0x00 8.--11. " TRGSEL ,Trigger input source select" "PDB0_EXTRG,CMP0,CMP1,,PIT0,PIT1,PIT2,PIT3,FTM0,FTM1,,,RTC Alarm,RTC Seconds,LPTMR,Software"
|
|
elif cpuis("MK20DX256VMC7R")||cpuis("MK20DX256VLK7R")
|
|
bitfld.long 0x00 8.--11. " TRGSEL ,Trigger input source select" "External,CMP 0,CMP 1,CMP 2,PIT Ch_0 Out,PIT Ch_1 Out,PIT Ch_2 Out,PIT Ch_3 Out,FTM_0,FTM_1,FTM_2,,RTC Alarm,RTC Sec.,LPTMR Out.,Software"
|
|
elif cpuis("MK02*")
|
|
bitfld.long 0x00 8.--11. " TRGSEL ,Trigger input source select" "External,CMP 0,CMP 1,,PIT Ch_0 Out.,PIT Ch_1 Out.,PIT Ch_2 Out.,PIT Ch_3 Out.,FTM_0,FTM_1,FTM_2,,,,LPTMR Out.,?..."
|
|
elif cpuis("MK22FN512CBP12R")||cpuis("MK22FN512VMP12")||cpuis("MK22FN512VLH12")||cpuis("MK22FN512VDC12")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN512VLL12")
|
|
bitfld.long 0x00 8.--11. " TRGSEL ,Trigger input source select" "External,CMP0,CMP1,,PIT Ch_0 Out,PIT Ch_1 Out,PIT Ch_2 Out,PIT Ch_3 Out,FTM0,FTM1,FTM2,FTM3,RTC Alarm,RTC Seconds,LPTMR Out,Software trigger"
|
|
elif cpuis("MK20DX256VLQ10R")||cpuis("MK20DX256VLK10R")||cpuis("MK30DN512ZVLK10")||cpuis("MK30D????ZVLQ*")||cpuis("MK30DX256VLL7*")||cpuis("MK50DN512ZCLL10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DX256ZCLQ10")||cpuis("MK51DN512ZCLL10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")
|
|
bitfld.long 0x00 8.--11. " TRGSEL ,Trigger input source select" "External,CMP0,CMP1,CMP2,PIT Ch_0 Out,PIT Ch_1 Out,PIT Ch_2 Out,PIT Ch_3 Out,FTM0,FTM1,FTM2,,RTC Alarm,RTC Seconds,LPTMR Out,Software trigger"
|
|
elif cpuis("MK21FX512VMD10")||cpuis("MK21FN1M0VMD10")||cpuis("MK21FN1M0VMC10")||cpuis("MK21FX512VMC10")||cpuis("MK22FN1M0AVLK12")||cpuis("MK22FX512AVLK12")||cpuis("MK22FN1M0VLK10")||cpuis("MK22FN1M0AVLL12")||cpuis("MK22FX512AVLL12")||cpuis("MK22FN1M0VLL10")||cpuis("MK22FN1M0AVMC12")||cpuis("MK22FX512AVMC12")||cpuis("MK22FN1M0AVLQ12")||cpuis("MK22FN1M0AVMD12")||cpuis("MK22FX512AVLQ12")||cpuis("MK22FN1M0VLQ10")||cpuis("MK22FX512AVLH12")||cpuis("MK22FN1M0AVLH12")||cpuis("MK22FN1M0VLH10")||cpuis("MK22FN1M0VMC10")||cpuis("MK22FX512AVMD12")||cpuis("MK20FN1M0VLQ12R")||cpuis("MK70*")
|
|
bitfld.long 0x00 8.--11. " TRGSEL ,Trigger input source select" "External,CMP0,CMP1,CMP2,PIT Ch_0 Out,PIT Ch_1 Out,PIT Ch_2 Out,PIT Ch_3 Out,FTM0,FTM1,FTM2,FTM3,RTC Alarm,RTC Seconds,LPTMR Out,Software trigger"
|
|
else
|
|
bitfld.long 0x00 8.--11. " TRGSEL ,Trigger input source select" "Trigger-In 0,Trigger-In 1,Trigger-In 2,Trigger-In 3,Trigger-In 4,Trigger-In 5,Trigger-In 6,Trigger-In 7,Trigger-In 8,Trigger-In 9,Trigger-In 10,Trigger-In 11,Trigger-In 12,Trigger-In 13,Trigger-In 14,Software trigger"
|
|
endif
|
|
bitfld.long 0x00 7. " PDBEN ,PDB enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " PDBIF ,PDB interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " PDBIE ,PDB interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--3. " MULT ,Multiplication factor select for prescaler" "1,10,20,40"
|
|
newline
|
|
bitfld.long 0x00 1. " CONT ,Continuous mode enable" "One-Shot,Continuous"
|
|
bitfld.long 0x00 0. " LDOK ,Load OK" "Not updated,Updated"
|
|
line.long 0x04 "MOD,Modulus Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " MOD ,PDB modulus"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "CNT,Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CNT ,PDB counter"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "IDLY,Interrupt Delay Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " IDLY ,PDB interrupt delay"
|
|
width 10.
|
|
tree "Channel 0"
|
|
group.long 0x10++0x0F
|
|
line.long 0x00 "CH0_C1,Channel 0 Control Register 1"
|
|
sif cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")||cpuis("MK53DX256ZCMD10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLL10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK51DN256ZCLQ10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK51DN512ZCMD10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCLL10")||cpuis("MK51DN512ZCLL10")||cpuis("MK50DX256ZCLQ10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DN512ZCMD10")||cpuis("MK20D????ZVLL10")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10")||cpuis("MK20DN512VLK10R")||cpuis("MK21D*AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22FN1M0VLQ12R")
|
|
bitfld.long 0x00 23. " BB[7] ,PDB channel pre-trigger back-to-back operation enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " [6] ,PDB channel pre-trigger back-to-back operation enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " [5] ,PDB channel pre-trigger back-to-back operation enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " [4] ,PDB channel pre-trigger back-to-back operation enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " [3] ,PDB channel pre-trigger back-to-back operation enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " [2] ,PDB channel pre-trigger back-to-back operation enable" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 17. " BB[1] ,PDB channel pre-trigger back-to-back operation enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " [0] ,PDB channel pre-trigger back-to-back operation enable" "Disabled,Enabled"
|
|
newline
|
|
sif cpuis("MK20D????ZVLL10")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20D????ZVLK10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20DN512VLK10R")||cpuis("MK21D*AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22FN1M0VLQ12R")
|
|
bitfld.long 0x00 15. " TOS[7] ,PDB channel pre-trigger output select" "Not selected,Selected"
|
|
bitfld.long 0x00 14. " [6] ,PDB channel pre-trigger output select" "Not selected,Selected"
|
|
bitfld.long 0x00 13. " [5] ,PDB channel pre-trigger output select" "Not selected,Selected"
|
|
bitfld.long 0x00 12. " [4] ,PDB channel pre-trigger output select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x00 11. " [3] ,PDB channel pre-trigger output select" "Not selected,Selected"
|
|
bitfld.long 0x00 10. " [2] ,PDB channel pre-trigger output select" "Not selected,Selected"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 9. " TOS[1] ,PDB channel pre-trigger output select" "Not selected,Selected"
|
|
bitfld.long 0x00 8. " [0] ,PDB channel pre-trigger output select" "Not selected,Selected"
|
|
newline
|
|
sif cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")||cpuis("MK53DX256ZCMD10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLL10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK51DN256ZCLQ10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK51DN512ZCMD10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCLL10")||cpuis("MK51DN512ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DN512ZCMD10")||cpuis("MK20D????ZVLL10")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10")||cpuis("MK20DN512VLK10R")||cpuis("MK21D*AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22FN1M0VLQ12R")
|
|
bitfld.long 0x00 7. " EN[7] ,PDB channel pre-trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " [6] ,PDB channel pre-trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " [5] ,PDB channel pre-trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " [4] ,PDB channel pre-trigger enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 3. " [3] ,PDB channel pre-trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " [2] ,PDB channel pre-trigger enable" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 1. " EN[1] ,PDB channel pre-trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " [0] ,PDB channel pre-trigger enable" "Disabled,Enabled"
|
|
line.long 0x04 "CH0_S,Channel 0 Status Register"
|
|
sif cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")||cpuis("MK53DX256ZCMD10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLL10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK51DN256ZCLQ10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK51DN512ZCMD10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCLL10")||cpuis("MK51DN512ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DN512ZCMD10")||cpuis("MK20D????ZVLL10")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10")||cpuis("MK20DN512VLK10R")||cpuis("MK21D*AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22FN1M0VLQ12R")
|
|
bitfld.long 0x04 23. " CF[7] ,PDB channel flag" "Not occurred,Occurred"
|
|
bitfld.long 0x04 22. " [6] ,PDB channel flag" "Not occurred,Occurred"
|
|
bitfld.long 0x04 21. " [5] ,PDB channel flag" "Not occurred,Occurred"
|
|
bitfld.long 0x04 20. " [4] ,PDB channel flag" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.long 0x04 19. " [3] ,PDB channel flag" "Not occurred,Occurred"
|
|
bitfld.long 0x04 18. " [2] ,PDB channel flag" "Not occurred,Occurred"
|
|
newline
|
|
endif
|
|
bitfld.long 0x04 17. " CF[1] ,PDB channel flag" "Not occurred,Occurred"
|
|
bitfld.long 0x04 16. " [0] ,PDB channel flag" "Not occurred,Occurred"
|
|
newline
|
|
sif cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")||cpuis("MK53DX256ZCMD10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLL10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK51DN256ZCLQ10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK51DN512ZCMD10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCLL10")||cpuis("MK51DN512ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DN512ZCMD10")||cpuis("MK20D????ZVLL10")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10")||cpuis("MK20DN512VLK10R")||cpuis("MK21D*AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22FN1M0VLQ12R")
|
|
bitfld.long 0x04 7. " ERR[7] ,PDB channel sequence error flag" "No error,Error"
|
|
bitfld.long 0x04 6. " [6] ,PDB channel sequence error flag" "No error,Error"
|
|
bitfld.long 0x04 5. " [5] ,PDB channel sequence error flag" "No error,Error"
|
|
bitfld.long 0x04 4. " [4] ,PDB channel sequence error flag" "No error,Error"
|
|
newline
|
|
bitfld.long 0x04 3. " [3] ,PDB channel sequence error flag" "No error,Error"
|
|
bitfld.long 0x04 2. " [2] ,PDB channel sequence error flag" "No error,Error"
|
|
newline
|
|
endif
|
|
bitfld.long 0x04 1. " ERR[1] ,PDB channel sequence error flag" "No error,Error"
|
|
bitfld.long 0x04 0. " [0] ,PDB channel sequence error flag" "No error,Error"
|
|
line.long 0x08 "CH0_DLY0,Channel 0 Delay 0 Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " DLY ,PDB channel delay"
|
|
line.long 0x0C "CH0_DLY1,Channel 0 Delay 1 Register"
|
|
hexmask.long.word 0x0C 0.--15. 1. " DLY ,PDB channel delay"
|
|
tree.end
|
|
tree "Channel 1"
|
|
group.long 0x38++0x0F
|
|
line.long 0x00 "CH1_C1,Channel 1 Control Register 1"
|
|
sif cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")||cpuis("MK53DX256ZCMD10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLL10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK51DN256ZCLQ10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK51DN512ZCMD10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCLL10")||cpuis("MK51DN512ZCLL10")||cpuis("MK50DX256ZCLQ10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DN512ZCMD10")||cpuis("MK20D????ZVLL10")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10")||cpuis("MK20DN512VLK10R")||cpuis("MK21D*AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22FN1M0VLQ12R")
|
|
bitfld.long 0x00 23. " BB[7] ,PDB channel pre-trigger back-to-back operation enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " [6] ,PDB channel pre-trigger back-to-back operation enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " [5] ,PDB channel pre-trigger back-to-back operation enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " [4] ,PDB channel pre-trigger back-to-back operation enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " [3] ,PDB channel pre-trigger back-to-back operation enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " [2] ,PDB channel pre-trigger back-to-back operation enable" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 17. " BB[1] ,PDB channel pre-trigger back-to-back operation enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " [0] ,PDB channel pre-trigger back-to-back operation enable" "Disabled,Enabled"
|
|
newline
|
|
sif cpuis("MK20D????ZVLL10")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20D????ZVLK10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20DN512VLK10R")||cpuis("MK21D*AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22FN1M0VLQ12R")
|
|
bitfld.long 0x00 15. " TOS[7] ,PDB channel pre-trigger output select" "Not selected,Selected"
|
|
bitfld.long 0x00 14. " [6] ,PDB channel pre-trigger output select" "Not selected,Selected"
|
|
bitfld.long 0x00 13. " [5] ,PDB channel pre-trigger output select" "Not selected,Selected"
|
|
bitfld.long 0x00 12. " [4] ,PDB channel pre-trigger output select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x00 11. " [3] ,PDB channel pre-trigger output select" "Not selected,Selected"
|
|
bitfld.long 0x00 10. " [2] ,PDB channel pre-trigger output select" "Not selected,Selected"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 9. " TOS[1] ,PDB channel pre-trigger output select" "Not selected,Selected"
|
|
bitfld.long 0x00 8. " [0] ,PDB channel pre-trigger output select" "Not selected,Selected"
|
|
newline
|
|
sif cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")||cpuis("MK53DX256ZCMD10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLL10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK51DN256ZCLQ10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK51DN512ZCMD10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCLL10")||cpuis("MK51DN512ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DN512ZCMD10")||cpuis("MK20D????ZVLL10")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10")||cpuis("MK20DN512VLK10R")||cpuis("MK21D*AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22FN1M0VLQ12R")
|
|
bitfld.long 0x00 7. " EN[7] ,PDB channel pre-trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " [6] ,PDB channel pre-trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " [5] ,PDB channel pre-trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " [4] ,PDB channel pre-trigger enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 3. " [3] ,PDB channel pre-trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " [2] ,PDB channel pre-trigger enable" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 1. " EN[1] ,PDB channel pre-trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " [0] ,PDB channel pre-trigger enable" "Disabled,Enabled"
|
|
line.long 0x04 "CH1_S,Channel 1 Status Register"
|
|
sif cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")||cpuis("MK53DX256ZCMD10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLL10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK51DN256ZCLQ10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK51DN512ZCMD10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCLL10")||cpuis("MK51DN512ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DN512ZCMD10")||cpuis("MK20D????ZVLL10")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10")||cpuis("MK20DN512VLK10R")||cpuis("MK21D*AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22FN1M0VLQ12R")
|
|
bitfld.long 0x04 23. " CF[7] ,PDB channel flag" "Not occurred,Occurred"
|
|
bitfld.long 0x04 22. " [6] ,PDB channel flag" "Not occurred,Occurred"
|
|
bitfld.long 0x04 21. " [5] ,PDB channel flag" "Not occurred,Occurred"
|
|
bitfld.long 0x04 20. " [4] ,PDB channel flag" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.long 0x04 19. " [3] ,PDB channel flag" "Not occurred,Occurred"
|
|
bitfld.long 0x04 18. " [2] ,PDB channel flag" "Not occurred,Occurred"
|
|
newline
|
|
endif
|
|
bitfld.long 0x04 17. " CF[1] ,PDB channel flag" "Not occurred,Occurred"
|
|
bitfld.long 0x04 16. " [0] ,PDB channel flag" "Not occurred,Occurred"
|
|
newline
|
|
sif cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")||cpuis("MK53DX256ZCMD10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLL10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK51DN256ZCLQ10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK51DN512ZCMD10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCLL10")||cpuis("MK51DN512ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DN512ZCMD10")||cpuis("MK20D????ZVLL10")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10")||cpuis("MK20DN512VLK10R")||cpuis("MK21D*AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22FN1M0VLQ12R")
|
|
bitfld.long 0x04 7. " ERR[7] ,PDB channel sequence error flag" "No error,Error"
|
|
bitfld.long 0x04 6. " [6] ,PDB channel sequence error flag" "No error,Error"
|
|
bitfld.long 0x04 5. " [5] ,PDB channel sequence error flag" "No error,Error"
|
|
bitfld.long 0x04 4. " [4] ,PDB channel sequence error flag" "No error,Error"
|
|
newline
|
|
bitfld.long 0x04 3. " [3] ,PDB channel sequence error flag" "No error,Error"
|
|
bitfld.long 0x04 2. " [2] ,PDB channel sequence error flag" "No error,Error"
|
|
newline
|
|
endif
|
|
bitfld.long 0x04 1. " ERR[1] ,PDB channel sequence error flag" "No error,Error"
|
|
bitfld.long 0x04 0. " [0] ,PDB channel sequence error flag" "No error,Error"
|
|
line.long 0x08 "CH1_DLY0,Channel 1 Delay 0 Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " DLY ,PDB channel delay"
|
|
line.long 0x0C "CH1_DLY1,Channel 1 Delay 1 Register"
|
|
hexmask.long.word 0x0C 0.--15. 1. " DLY ,PDB channel delay"
|
|
tree.end
|
|
newline
|
|
sif cpuis("MK11D*MC*")||cpuis("MK*7")||cpuis("MK?1D*5")||cpuis("MK?2D*5")||cpuis("MK02*")||cpuis("MK20DX256VMC7R")||cpuis("MK20DX256VLK7R")||cpuis("MK11DN512VLK5*")||cpuis("MK11DN512AVLK5*")||cpuis("MK30DN512ZVLK10")||cpuis("MK30D????ZVLQ*")||cpuis("MK30DX256VLL7*")||cpuis("MK24FN256VDC12")
|
|
group.long 0x150++0x07
|
|
line.long 0x00 "DACINTC0,DAC Interval Trigger 0 Control Register"
|
|
bitfld.long 0x00 1. " EXT ,DAC external trigger input enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TOE ,DAC interval trigger enable" "Disabled,Enabled"
|
|
line.long 0x04 "DACINT0,DAC Interval 0 Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " INT ,DAC interval"
|
|
elif cpuis("MK11D*LK*")
|
|
hgroup.long 0x150++0x03
|
|
hide.long 0x00 "DACINTC0,DAC Interval Trigger 0 Control Register"
|
|
hgroup.long 0x154++0x03
|
|
hide.long 0x00 "DACINT0,DAC Interval 0 Register"
|
|
elif !cpuis("MK*DX*5")&&!cpuis("MK*DN*5")
|
|
group.long 0x150++0x07
|
|
line.long 0x00 "DACINTC0,DAC Interval Trigger 0 Control Register"
|
|
bitfld.long 0x00 1. " EXT ,DAC external trigger input enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TOE ,DAC interval trigger enable" "Disabled,Enabled"
|
|
line.long 0x04 "DACINT0,DAC Interval 0 Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " INT ,DAC interval"
|
|
group.long 0x158++0x07
|
|
line.long 0x00 "DACINTC1,DAC Interval Trigger 1 Control Register"
|
|
bitfld.long 0x00 1. " EXT ,DAC external trigger input enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TOE ,DAC interval trigger enable" "Disabled,Enabled"
|
|
line.long 0x04 "DACINT1,DAC Interval 1 Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " INT ,DAC interval"
|
|
endif
|
|
group.long 0x190++0x03
|
|
line.long 0x00 "POEN,Pulse-Out 0 Enable Register"
|
|
bitfld.long 0x00 1. " POEN[1] ,PDB pulse out enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " [0] ,PDB pulse out enable" "Disabled,Enabled"
|
|
sif cpuis("MK02*")||cpuis("MK20D????ZVLL10")||cpuis("MK20D????ZVLQ10*")||cpuis("MK20D????ZVMD10")||cpuis("MK20DN512ZVMC10*")||cpuis("MK20D????ZVLK10")||cpuis("MK50DN512ZCLL10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DX256ZCLQ10")||cpuis("MK51DN512ZCLL10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")
|
|
group.long 0x194++0x03
|
|
line.long 0x00 "PO0DLY,Pulse-Out Delay Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " DLY1 ,PDB pulse-out delay 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " DLY2 ,PDB pulse-out delay 2"
|
|
else
|
|
group.long 0x194++0x03
|
|
line.long 0x00 "PO0DLY,Pulse-Out 0 Delay Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " DLY1 ,PDB pulse-out delay 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " DLY2 ,PDB pulse-out delay 2"
|
|
group.long 0x198++0x03
|
|
line.long 0x00 "PO1DLY,Pulse-Out 1 Delay Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " DLY1 ,PDB pulse-out delay 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " DLY2 ,PDB pulse-out delay 2"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree.open "FTM (FlexTimer)"
|
|
tree "FTM 0"
|
|
base ad:0x40038000
|
|
width 15.
|
|
if (((per.l(ad:0x40038000+0x54))&0x4)==0x4)
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "FTM0_SC,FTM0 Status and Control Register"
|
|
rbitfld.long 0x00 7. " TOF ,Timer overflow flag" "No overflow,Overflow"
|
|
bitfld.long 0x00 6. " TOIE ,Timer overflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " CPWMS ,Center-aligned PWM select" "Up counting,Up-Down counting"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " CLKS ,Clock source selection" "No clk,System,Fixed frequency,Ext clk"
|
|
bitfld.long 0x00 0.--2. " PS ,Prescale factor selection" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
else
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "FTM0_SC,FTM0 Status and Control Register"
|
|
rbitfld.long 0x00 7. " TOF ,Timer overflow flag" "No overflow,Overflow"
|
|
bitfld.long 0x00 6. " TOIE ,Timer overflow interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5. " CPWMS ,Center-aligned PWM select" "Up counting,Up-Down counting"
|
|
textline " "
|
|
rbitfld.long 0x00 3.--4. " CLKS ,Clock source selection" "No clk,System,Fixed frequency,Ext clk"
|
|
rbitfld.long 0x00 0.--2. " PS ,Prescale factor selection" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
endif
|
|
group.long 0x04++0x07
|
|
line.long 0x00 "FTM0_CNT,FTM0 Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNT ,Counter value"
|
|
line.long 0x04 "FTM0_MOD,FTM0 Modulo register"
|
|
hexmask.long.word 0x04 0.--15. 1. " MOD ,Modulo value"
|
|
if (((per.l(ad:0x40038000+0x54))&0x4)==0x4)
|
|
group.long 0xC++0x07
|
|
line.long 0x00 "FTM0_C0SC,FTM0 Channel 0 Status and Control Register"
|
|
rbitfld.long 0x00 7. " CHF ,Channel 0 flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " CHIE ,Channel 0 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " MSB/MSA ,Channel 0 mode select" "00,01,10,11"
|
|
bitfld.long 0x00 2.--3. " ELSB/ELSA ,Edge or level select" "No edge,Rising,Falling,Both"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICRST ,FTM counter reset by the selected input capture event" "No reset,Reset"
|
|
bitfld.long 0x00 0. " DMA ,DMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "FTM0_C0V,FTM0 Channel 0 Value Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " VAL ,Channel 0 value"
|
|
else
|
|
group.long 0xC++0x07
|
|
line.long 0x00 "FTM0_C0SC,FTM0 Channel 0 Status and Control Register"
|
|
rbitfld.long 0x00 7. " CHF ,Channel 0 flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " CHIE ,Channel 0 interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4.--5. " MSB/MSA ,Channel 0 mode select" "00,01,10,11"
|
|
rbitfld.long 0x00 2.--3. " ELSB/ELSA ,Edge or level select" "No edge,Rising,Falling,Both"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " ICRST ,FTM counter reset by the selected input capture event" "No reset,Reset"
|
|
bitfld.long 0x00 0. " DMA ,DMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "FTM0_C0V,FTM0 Channel 0 Value Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " VAL ,Channel 0 value"
|
|
endif
|
|
if (((per.l(ad:0x40038000+0x54))&0x4)==0x4)
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "FTM0_C1SC,FTM0 Channel 1 Status and Control Register"
|
|
rbitfld.long 0x00 7. " CHF ,Channel 1 flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " CHIE ,Channel 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " MSB/MSA ,Channel 1 mode select" "00,01,10,11"
|
|
bitfld.long 0x00 2.--3. " ELSB/ELSA ,Edge or level select" "No edge,Rising,Falling,Both"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICRST ,FTM counter reset by the selected input capture event" "No reset,Reset"
|
|
bitfld.long 0x00 0. " DMA ,DMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "FTM0_C1V,FTM0 Channel 1 Value Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " VAL ,Channel 1 value"
|
|
else
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "FTM0_C1SC,FTM0 Channel 1 Status and Control Register"
|
|
rbitfld.long 0x00 7. " CHF ,Channel 1 flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " CHIE ,Channel 1 interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4.--5. " MSB/MSA ,Channel 1 mode select" "00,01,10,11"
|
|
rbitfld.long 0x00 2.--3. " ELSB/ELSA ,Edge or level select" "No edge,Rising,Falling,Both"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " ICRST ,FTM counter reset by the selected input capture event" "No reset,Reset"
|
|
bitfld.long 0x00 0. " DMA ,DMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "FTM0_C1V,FTM0 Channel 1 Value Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " VAL ,Channel 1 value"
|
|
endif
|
|
if (((per.l(ad:0x40038000+0x54))&0x4)==0x4)
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "FTM0_C2SC,FTM0 Channel 2 Status and Control Register"
|
|
rbitfld.long 0x00 7. " CHF ,Channel 2 flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " CHIE ,Channel 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " MSB/MSA ,Channel 2 mode select" "00,01,10,11"
|
|
bitfld.long 0x00 2.--3. " ELSB/ELSA ,Edge or level select" "No edge,Rising,Falling,Both"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICRST ,FTM counter reset by the selected input capture event" "No reset,Reset"
|
|
bitfld.long 0x00 0. " DMA ,DMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "FTM0_C2V,FTM0 Channel 2 Value Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " VAL ,Channel 2 value"
|
|
else
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "FTM0_C2SC,FTM0 Channel 2 Status and Control Register"
|
|
rbitfld.long 0x00 7. " CHF ,Channel 2 flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " CHIE ,Channel 2 interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4.--5. " MSB/MSA ,Channel 2 mode select" "00,01,10,11"
|
|
rbitfld.long 0x00 2.--3. " ELSB/ELSA ,Edge or level select" "No edge,Rising,Falling,Both"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " ICRST ,FTM counter reset by the selected input capture event" "No reset,Reset"
|
|
bitfld.long 0x00 0. " DMA ,DMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "FTM0_C2V,FTM0 Channel 2 Value Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " VAL ,Channel 2 value"
|
|
endif
|
|
if (((per.l(ad:0x40038000+0x54))&0x4)==0x4)
|
|
group.long 0x24++0x07
|
|
line.long 0x00 "FTM0_C3SC,FTM0 Channel 3 Status and Control Register"
|
|
rbitfld.long 0x00 7. " CHF ,Channel 3 flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " CHIE ,Channel 3 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " MSB/MSA ,Channel 3 mode select" "00,01,10,11"
|
|
bitfld.long 0x00 2.--3. " ELSB/ELSA ,Edge or level select" "No edge,Rising,Falling,Both"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICRST ,FTM counter reset by the selected input capture event" "No reset,Reset"
|
|
bitfld.long 0x00 0. " DMA ,DMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "FTM0_C3V,FTM0 Channel 3 Value Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " VAL ,Channel 3 value"
|
|
else
|
|
group.long 0x24++0x07
|
|
line.long 0x00 "FTM0_C3SC,FTM0 Channel 3 Status and Control Register"
|
|
rbitfld.long 0x00 7. " CHF ,Channel 3 flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " CHIE ,Channel 3 interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4.--5. " MSB/MSA ,Channel 3 mode select" "00,01,10,11"
|
|
rbitfld.long 0x00 2.--3. " ELSB/ELSA ,Edge or level select" "No edge,Rising,Falling,Both"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " ICRST ,FTM counter reset by the selected input capture event" "No reset,Reset"
|
|
bitfld.long 0x00 0. " DMA ,DMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "FTM0_C3V,FTM0 Channel 3 Value Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " VAL ,Channel 3 value"
|
|
endif
|
|
if (((per.l(ad:0x40038000+0x54))&0x4)==0x4)
|
|
group.long 0x2C++0x07
|
|
line.long 0x00 "FTM0_C4SC,FTM0 Channel 4 Status and Control Register"
|
|
rbitfld.long 0x00 7. " CHF ,Channel 4 flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " CHIE ,Channel 4 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " MSB/MSA ,Channel 4 mode select" "00,01,10,11"
|
|
bitfld.long 0x00 2.--3. " ELSB/ELSA ,Edge or level select" "No edge,Rising,Falling,Both"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICRST ,FTM counter reset by the selected input capture event" "No reset,Reset"
|
|
bitfld.long 0x00 0. " DMA ,DMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "FTM0_C4V,FTM0 Channel 4 Value Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " VAL ,Channel 4 value"
|
|
else
|
|
group.long 0x2C++0x07
|
|
line.long 0x00 "FTM0_C4SC,FTM0 Channel 4 Status and Control Register"
|
|
rbitfld.long 0x00 7. " CHF ,Channel 4 flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " CHIE ,Channel 4 interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4.--5. " MSB/MSA ,Channel 4 mode select" "00,01,10,11"
|
|
rbitfld.long 0x00 2.--3. " ELSB/ELSA ,Edge or level select" "No edge,Rising,Falling,Both"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " ICRST ,FTM counter reset by the selected input capture event" "No reset,Reset"
|
|
bitfld.long 0x00 0. " DMA ,DMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "FTM0_C4V,FTM0 Channel 4 Value Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " VAL ,Channel 4 value"
|
|
endif
|
|
if (((per.l(ad:0x40038000+0x54))&0x4)==0x4)
|
|
group.long 0x34++0x07
|
|
line.long 0x00 "FTM0_C5SC,FTM0 Channel 5 Status and Control Register"
|
|
rbitfld.long 0x00 7. " CHF ,Channel 5 flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " CHIE ,Channel 5 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " MSB/MSA ,Channel 5 mode select" "00,01,10,11"
|
|
bitfld.long 0x00 2.--3. " ELSB/ELSA ,Edge or level select" "No edge,Rising,Falling,Both"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICRST ,FTM counter reset by the selected input capture event" "No reset,Reset"
|
|
bitfld.long 0x00 0. " DMA ,DMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "FTM0_C5V,FTM0 Channel 5 Value Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " VAL ,Channel 5 value"
|
|
else
|
|
group.long 0x34++0x07
|
|
line.long 0x00 "FTM0_C5SC,FTM0 Channel 5 Status and Control Register"
|
|
rbitfld.long 0x00 7. " CHF ,Channel 5 flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " CHIE ,Channel 5 interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4.--5. " MSB/MSA ,Channel 5 mode select" "00,01,10,11"
|
|
rbitfld.long 0x00 2.--3. " ELSB/ELSA ,Edge or level select" "No edge,Rising,Falling,Both"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " ICRST ,FTM counter reset by the selected input capture event" "No reset,Reset"
|
|
bitfld.long 0x00 0. " DMA ,DMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "FTM0_C5V,FTM0 Channel 5 Value Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " VAL ,Channel 5 value"
|
|
endif
|
|
group.long 0x4C++0x3
|
|
line.long 0x00 "FTM0_CNTIN,FTM0 Counter Initial Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " INIT ,Initial value of FTM0 counter"
|
|
rgroup.long 0x50++0x3
|
|
line.long 0x00 "FTM0_STATUS,FTM0 Capture and Compare Status Register"
|
|
bitfld.long 0x00 5. " CH5F ,Channel 5 flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " CH4F ,Channel 4 flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " CH3F ,Channel 3 flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CH2F ,Channel 2 flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " CH1F ,Channel 1 flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " CH0F ,Channel 0 flag" "Not occurred,Occurred"
|
|
textline " "
|
|
if (((per.l(ad:0x40038000+0x54))&0x4)==0x4)
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "FTM0_MODE,FTM0 Features Mode Selection Register"
|
|
bitfld.long 0x00 7. " FAULTIE ,Fault Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5.--6. " FAULTM ,Fault Control Mode" "Disabled,Even channels / Manual fault clearing,All channels / Manual fault clearing,All channels / Auto fault clearing"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CAPTEST ,Capture Test Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " PWMSYNC ,PWM Synchronization Mode (Software/Hardware triggers usage)" "No restrictions,MOD CnV / OUTMASK FTM"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WPDIS ,Write Protection Disable" "No,Yes"
|
|
bitfld.long 0x00 1. " INIT ,Initialize the Channels Output" "Not initialized,Initialized"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FTMEN ,FTM Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "FTM0_MODE,FTM0 Features Mode Selection Register"
|
|
bitfld.long 0x00 7. " FAULTIE ,Fault Interrupt Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5.--6. " FAULTM ,Fault Control Mode" "Disabled,Even channels / Manual fault clearing,All channels / Manual fault clearing,All channels / Auto fault clearing"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " CAPTEST ,Capture Test Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " PWMSYNC ,PWM Synchronization Mode (Software/Hardware triggers usage)" "No restrictions,MOD CnV / OUTMASK FTM"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WPDIS ,Write Protection Disable" "No,Yes"
|
|
bitfld.long 0x00 1. " INIT ,Initialize the Channels Output" "Not initialized,Initialized"
|
|
textline " "
|
|
rbitfld.long 0x00 0. " FTMEN ,FTM Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "FTM0_SYNC,FTM0 Synchronization Register"
|
|
bitfld.long 0x00 7. " SWSYNC ,PWM Synchronization Software Trigger" "Not selected,Selected"
|
|
bitfld.long 0x00 6. " TRIG2 ,PWM Synchronization Hardware Trigger 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TRIG1 ,PWM Synchronization Hardware Trigger 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " TRIG0 ,PWM Synchronization Hardware Trigger 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SYNCHOM ,Output Mask Synchronization" "At rising edges of sys clk,By PWM sync"
|
|
textline " "
|
|
bitfld.long 0x00 2. " REINIT ,FTM Counter Reinitialization by Synchronization" "Normal,Updated on trigger"
|
|
bitfld.long 0x00 1. " CNTMAX ,Maximum Loading Point Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CNTMIN ,Minimum Loading Point Enable" "Disabled,Enabled"
|
|
textline " "
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "FTM0_OUTINIT,FTM0 Initial State for Channels Output Register"
|
|
bitfld.long 0x00 5. " CH5OI ,Channel 5 Output Initialization Value" "0,1"
|
|
bitfld.long 0x00 4. " CH4OI ,Channel 4 Output Initialization Value" "0,1"
|
|
bitfld.long 0x00 3. " CH3OI ,Channel 3 Output Initialization Value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CH2OI ,Channel 2 Output Initialization Value" "0,1"
|
|
bitfld.long 0x00 1. " CH1OI ,Channel 1 Output Initialization Value" "0,1"
|
|
bitfld.long 0x00 0. " CH0OI ,Channel 0 Output Initialization Value" "0,1"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "FTM0_OUTMASK,FTM0 Output Mask Register"
|
|
bitfld.long 0x00 5. " CH5OM ,Channel 5 Output Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " CH4OM ,Channel 4 Output Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " CH3OM ,Channel 3 Output Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CH2OM ,Channel 2 Output Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " CH1OM ,Channel 1 Output Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " CH0OM ,Channel 0 Output Mask" "Not masked,Masked"
|
|
if (((per.l(ad:0x40038000+0x54))&0x4)==0x4)
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "FTM0_COMBINE,FTM0 Function for Linked Channels Register"
|
|
bitfld.long 0x00 22. " FAULTEN2 ,Fault Control Enable in Channels 4 and 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " SYNCEN2 ,PWM Synchronization Enable (C4V,C5V)" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " DTEN2 ,Deadtime Enable in Channels 4 and 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DECAP2 ,Dual Edge Capture Mode Captures" "Inactive,Active"
|
|
bitfld.long 0x00 18. " DECAPEN2 ,Dual Edge Capture Mode Enable for Channels 4 and 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " COMP2 ,Complementary Mode for Channels 4 and 5" "CH5 same as CH4,CH5 complement of CH4"
|
|
textline " "
|
|
bitfld.long 0x00 16. " COMBINE2 ,Combine Channels 4 and 5" "Independent,Combined"
|
|
textline " "
|
|
bitfld.long 0x00 14. " FAULTEN1 ,Fault Control Enable in Channels 2 and 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SYNCEN1 ,PWM Synchronization Enable (C2V,C3V)" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " DTEN1 ,Deadtime Enable in Channels 2 and 3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DECAP1 ,Dual Edge Capture Mode Captures" "Inactive,Active"
|
|
bitfld.long 0x00 10. " DECAPEN1 ,Dual Edge Capture Mode Enable for Channels 2 and 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " COMP1 ,Complementary Mode for Channels 2 and 3" "CH3 same as CH2,CH3 complement of CH2"
|
|
textline " "
|
|
bitfld.long 0x00 8. " COMBINE1 ,Combine Channels 2 and 3" "Independent,Combined"
|
|
textline " "
|
|
bitfld.long 0x00 6. " FAULTEN0 ,Fault Control Enable in Channels 0 and 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SYNCEN0 ,PWM Synchronization Enable (C0V,C1V)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DTEN0 ,Deadtime Enable in Channels 0 and 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DECAP0 ,Dual Edge Capture Mode Captures" "Inactive,Active"
|
|
bitfld.long 0x00 2. " DECAPEN0 ,Dual Edge Capture Mode Enable for Channels 0 and 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " COMP0 ,Complementary Mode for Channels 0 and 1" "CH1 same as CH0,CH1 complement of CH0"
|
|
textline " "
|
|
bitfld.long 0x00 0. " COMBINE0 ,Combine Channels 0 and 1" "Independent,Combined"
|
|
else
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "FTM0_COMBINE,FTM0 Function for Linked Channels Register"
|
|
rbitfld.long 0x00 22. " FAULTEN2 ,Fault Control Enable in Channels 4 and 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " SYNCEN2 ,PWM Synchronization Enable (C4V,C5V)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 20. " DTEN2 ,Deadtime Enable in Channels 4 and 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DECAP2 ,Dual Edge Capture Mode Captures" "Inactive,Active"
|
|
rbitfld.long 0x00 18. " DECAPEN2 ,Dual Edge Capture Mode Enable for Channels 4 and 5" "Disabled,Enabled"
|
|
rbitfld.long 0x00 17. " COMP2 ,Complementary Mode for Channels 4 and 5" "CH5 same as CH4,CH5 complement of CH4"
|
|
textline " "
|
|
rbitfld.long 0x00 16. " COMBINE2 ,Combine Channels 4 and 5" "Independent,Combined"
|
|
textline " "
|
|
rbitfld.long 0x00 14. " FAULTEN1 ,Fault Control Enable in Channels 2 and 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SYNCEN1 ,PWM Synchronization Enable (C2V,C3V)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 12. " DTEN1 ,Deadtime Enable in Channels 2 and 3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DECAP1 ,Dual Edge Capture Mode Captures" "Inactive,Active"
|
|
rbitfld.long 0x00 10. " DECAPEN1 ,Dual Edge Capture Mode Enable for Channels 2 and 3" "Disabled,Enabled"
|
|
rbitfld.long 0x00 9. " COMP1 ,Complementary Mode for Channels 2 and 3" "CH3 same as CH2,CH3 complement of CH2"
|
|
textline " "
|
|
rbitfld.long 0x00 8. " COMBINE1 ,Combine Channels 2 and 3" "Independent,Combined"
|
|
textline " "
|
|
rbitfld.long 0x00 6. " FAULTEN0 ,Fault Control Enable in Channels 0 and 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SYNCEN0 ,PWM Synchronization Enable (C0V,C1V)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4. " DTEN0 ,Deadtime Enable in Channels 0 and 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DECAP0 ,Dual Edge Capture Mode Captures" "Inactive,Active"
|
|
rbitfld.long 0x00 2. " DECAPEN0 ,Dual Edge Capture Mode Enable for Channels 0 and 1" "Disabled,Enabled"
|
|
rbitfld.long 0x00 1. " COMP0 ,Complementary Mode for Channels 0 and 1" "CH1 same as CH0,CH1 complement of CH0"
|
|
textline " "
|
|
rbitfld.long 0x00 0. " COMBINE0 ,Combine Channels 0 and 1" "Independent,Combined"
|
|
endif
|
|
if ((per.l(ad:0x40038000+0x54)&0x04)==0x04)
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "FTM0_DEADTIME,FTM0 Deadtime Insertion Control Register"
|
|
bitfld.long 0x00 6.--7. " DTPS ,Deadtime Prescaler Value" "/1,/1,/4,/16"
|
|
bitfld.long 0x00 0.--5. " DTVAL ,Deadtime Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
else
|
|
rgroup.long 0x68++0x03
|
|
line.long 0x00 "FTM0_DEADTIME,FTM0 Deadtime Insertion Control Register"
|
|
bitfld.long 0x00 6.--7. " DTPS ,Deadtime Prescaler Value" "/1,/1,/4,/16"
|
|
bitfld.long 0x00 0.--5. " DTVAL ,Deadtime Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "FTM0_EXTTRIG,FTM0 External Trigger Register"
|
|
rbitfld.long 0x00 7. " TRIGF ,Channel Trigger Flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " INITTRIGEN ,Initialization Trigger Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CH1TRIG ,Channel 1 Trigger Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CH0TRIG ,Channel 0 Trigger Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CH5TRI ,Channel 5 Trigger Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CH4TRIG ,Channel 4 Trigger Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CH3TRIG ,Channel 3 Trigger Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CH2TRIG ,Channel 2 Trigger Enable" "Disabled,Enabled"
|
|
if ((per.l(ad:0x40038000+0x54)&0x04)==0x04)
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "FTM0_POL,FTM0 Channels Polarity Register"
|
|
bitfld.long 0x00 5. " POL5 ,Channel 5 Polarity" "Active high,Active low"
|
|
bitfld.long 0x00 4. " POL4 ,Channel 4 Polarity" "Active high,Active low"
|
|
bitfld.long 0x00 3. " POL3 ,Channel 3 Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 2. " POL2 ,Channel 2 Polarity" "Active high,Active low"
|
|
bitfld.long 0x00 1. " POL1 ,Channel 1 Polarity" "Active high,Active low"
|
|
bitfld.long 0x00 0. " POL0 ,Channel 0 Polarity" "Active high,Active low"
|
|
else
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "FTM0_POL,FTM0 Channels Polarity Register"
|
|
bitfld.long 0x00 5. " POL5 ,Channel 5 Polarity" "Active high,Active low"
|
|
bitfld.long 0x00 4. " POL4 ,Channel 4 Polarity" "Active high,Active low"
|
|
bitfld.long 0x00 3. " POL3 ,Channel 3 Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 2. " POL2 ,Channel 2 Polarity" "Active high,Active low"
|
|
bitfld.long 0x00 1. " POL1 ,Channel 1 Polarity" "Active high,Active low"
|
|
bitfld.long 0x00 0. " POL0 ,Channel 0 Polarity" "Active high,Active low"
|
|
endif
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "FTM0_FMS,FTM0 Fault Mode Status Register"
|
|
rbitfld.long 0x00 7. " FAULTF ,Fault Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x00 6. " WPEN ,Write Protection Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5. " FAULTIN ,Logic OR of the enabled fault inputs" "0,1"
|
|
textline " "
|
|
rbitfld.long 0x00 3. " FAULTF3 ,Fault Detection Flag 3" "Not detected,Detected"
|
|
rbitfld.long 0x00 2. " FAULTF2 ,Fault Detection Flag 2" "Not detected,Detected"
|
|
group.long 0x78++0x7
|
|
line.long 0x00 "FTM0_FILTER,FTM0 Input Capture Filter Control Register"
|
|
bitfld.long 0x00 12.--15. " CH3FVAL ,Channel 3 Input Filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " CH2FVAL ,Channel 2 Input Filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " CH1FVAL ,Channel 1 Input Filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " CH0FVAL ,Channel 0 Input Filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "FTM0_FLTCTRL,FTM0 Fault Control Register"
|
|
bitfld.long 0x04 8.--11. " FFVAL ,Fault Input Filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x04 7. " FFLTR3EN ,Fault Input 3 Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " FFLTR2EN ,Fault Input 2 Filter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 5. " FFLTR1EN ,Fault Input 1 Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " FFLTR0EN ,Fault Input 0 Filter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " FAULT3EN ,Fault Input 3 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " FAULT2EN ,Fault Input 2 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " FAULT1EN ,Fault Input 1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " FAULT0EN ,Fault Input 0 Enable" "Disabled,Enabled"
|
|
if (((per.l(ad:0x40038000+0x54))&0x4)==0x4)
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "FTM0_QDCTRL,FTM0 Quadrature Decoder Control and Status Register"
|
|
bitfld.long 0x00 7. " PHAFLTREN ,Phase A Input Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " PHBFLTREN ,Phase B Input Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " PHAPOL ,Phase A Input Polarity" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PHBPOL ,Phase B Input Polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 3. " QUADMODE ,Quadrature Decoder Mode" "Phase A & B,Count and direction"
|
|
rbitfld.long 0x00 2. " QUADIR ,FTM0 Counter Direction in Quadrature Decoder Mode" "Decreasing,Increasing"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " TOFDIR ,Timer Overflow Direction in Quadrature Decoder Mode" "Min->Max,Max->Min"
|
|
bitfld.long 0x00 0. " QUADEN ,Quadrature Decoder Mode Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "FTM0_QDCTRL,FTM0 Quadrature Decoder Control and Status Register"
|
|
bitfld.long 0x00 7. " PHAFLTREN ,Phase A Input Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " PHBFLTREN ,Phase B Input Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " PHAPOL ,Phase A Input Polarity" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PHBPOL ,Phase B Input Polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 3. " QUADMODE ,Quadrature Decoder Mode" "Phase A & B,Count and direction"
|
|
rbitfld.long 0x00 2. " QUADIR ,FTM0 Counter Direction in Quadrature Decoder Mode" "Decreasing,Increasing"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " TOFDIR ,Timer Overflow Direction in Quadrature Decoder Mode" "Min->Max,Max->Min"
|
|
rbitfld.long 0x00 0. " QUADEN ,Quadrature Decoder Mode Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "FTM0_CONF,FTM0 Configuration Register"
|
|
bitfld.long 0x00 10. " GTBEOUT ,Global Time Base Output" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " GTBEEN ,Global Time Base Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " BDMMODE ,BDM Mode (FTM Counter/FTM Channels Output)" "Stopped/Functional,Stopped/Forced to safe value,Stopped/Frozen,Functional/Functional"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " NUMTOF ,TOF Frequency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if ((per.l(ad:0x40038000+0x54)&0x04)==0x04)
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "FTM0_FLTPOL,FTM0 Fault Input Polarity Register"
|
|
bitfld.long 0x00 3. " FLT3POL ,Fault Input 3 Polarity" "Active high,Active low"
|
|
bitfld.long 0x00 2. " FLT2POL ,Fault Input 2 Polarity" "Active high,Active low"
|
|
bitfld.long 0x00 1. " FLT1POL ,Fault Input 1 Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FLT0POL ,Fault Input 0 Polarity" "Active high,Active low"
|
|
else
|
|
rgroup.long 0x88++0x03
|
|
line.long 0x00 "FTM0_FLTPOL,FTM0 Fault Input Polarity Register"
|
|
bitfld.long 0x00 3. " FLT3POL ,Fault Input 3 Polarity" "Active high,Active low"
|
|
bitfld.long 0x00 2. " FLT2POL ,Fault Input 2 Polarity" "Active high,Active low"
|
|
bitfld.long 0x00 1. " FLT1POL ,Fault Input 1 Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FLT0POL ,Fault Input 0 Polarity" "Active high,Active low"
|
|
endif
|
|
group.long 0x8C++0x0F
|
|
line.long 0x00 "FTM0_SYNCONF,FTM0 Synchronization Configuration Register"
|
|
bitfld.long 0x00 20. " HWSOC ,Software output control synchronization (hardware trigger)" "Not activated,Activated"
|
|
bitfld.long 0x00 19. " HWINVC ,Inverting control synchronization (hardware trigger)" "Not activated,Activated"
|
|
bitfld.long 0x00 18. " HWOM ,Output mask synchronization (hardware trigger)" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x00 17. " HWWRBUF ,MOD, CNTIN and CV registers synchronization (hardware trigger)" "Not activated,Activated"
|
|
bitfld.long 0x00 16. " HWRSTCNT ,FTM counter synchronization (hardware trigger)" "Not activated,Activated"
|
|
bitfld.long 0x00 12. " SWSOC ,Software output control synchronization (software trigger)" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SWINVC ,Inverting control synchronization (software trigger)" "Not activated,Activated"
|
|
bitfld.long 0x00 10. " SWOM ,Output mask synchronization (software trigger)" "Not activated,Activated"
|
|
bitfld.long 0x00 9. " SWWRBUF ,MOD, CNTIN and CV registers synchronization (software trigger)" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SWRSTCNT ,FTM counter synchronization (software trigger)" "Not activated,Activated"
|
|
bitfld.long 0x00 7. " SYNCMODE ,PWM Synchronization Mode" "Legacy,Enhanced"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SWOC ,SWOCTRL register synchronization" "At rising edges of sys clk,By PWM sync"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INVC ,INVCTRL register synchronization" "At rising edges of sys clk,By PWM sync"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CNTINC ,CNTIN register synchronization" "At rising edges of sys clk,By PWM sync"
|
|
textline " "
|
|
bitfld.long 0x00 0. " HWTRIGMODE ,Hardware Trigger Mode" "Cleared,Not cleared"
|
|
line.long 0x04 "FTM0_INVCTRL,FTM0 Inverting Control Register"
|
|
bitfld.long 0x04 2. " INV2EN ,Pair Channels 2 Inverting Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " INV1EN ,Pair Channels 1 Inverting Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " INV0EN ,Pair Channels 0 Inverting Enable" "Disabled,Enabled"
|
|
line.long 0x08 "FTM0_SWOCTRL,FTM0 Software Output Control Register"
|
|
bitfld.long 0x08 13. " CH5OCV ,Channel 5 Software Output Control Value" "0,1"
|
|
bitfld.long 0x08 12. " CH4OCV ,Channel 4 Software Output Control Value" "0,1"
|
|
bitfld.long 0x08 11. " CH3OCV ,Channel 3 Software Output Control Value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x08 10. " CH2OCV ,Channel 2 Software Output Control Value" "0,1"
|
|
bitfld.long 0x08 9. " CH1OCV ,Channel 1 Software Output Control Value" "0,1"
|
|
bitfld.long 0x08 8. " CH0OCV ,Channel 0 Software Output Control Value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x08 5. " CH5OC ,Channel 5 Software Output Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " CH4OC ,Channel 4 Software Output Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " CH3OC ,Channel 3 Software Output Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 2. " CH2OC ,Channel 2 Software Output Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " CH1OC ,Channel 1 Software Output Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " CH0OC ,Channel 0 Software Output Control Enable" "Disabled,Enabled"
|
|
line.long 0x0C "FTM0_PWMLOAD,FTM0 PWM Load Register"
|
|
bitfld.long 0x0C 9. " LDOK ,Load Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 5. " CH5SE ,Channel 5 Select" "Not included,Included"
|
|
bitfld.long 0x0C 4. " CH4SE ,Channel 4 Select" "Not included,Included"
|
|
bitfld.long 0x0C 3. " CH3SE ,Channel 3 Select" "Not included,Included"
|
|
textline " "
|
|
bitfld.long 0x0C 2. " CH2SE ,Channel 2 Select" "Not included,Included"
|
|
bitfld.long 0x0C 1. " CH1SE ,Channel 1 Select" "Not included,Included"
|
|
bitfld.long 0x0C 0. " CH0SE ,Channel 0 Select" "Not included,Included"
|
|
width 0xB
|
|
tree.end
|
|
tree "FTM 1"
|
|
base ad:0x40039000
|
|
width 15.
|
|
if (((per.l(ad:0x40039000+0x54))&0x4)==0x4)
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "FTM1_SC,FTM1 Status and Control Register"
|
|
rbitfld.long 0x00 7. " TOF ,Timer overflow flag" "No overflow,Overflow"
|
|
bitfld.long 0x00 6. " TOIE ,Timer overflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " CPWMS ,Center-aligned PWM select" "Up counting,Up-Down counting"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " CLKS ,Clock source selection" "No clk,System,Fixed frequency,Ext clk"
|
|
bitfld.long 0x00 0.--2. " PS ,Prescale factor selection" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
else
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "FTM1_SC,FTM1 Status and Control Register"
|
|
rbitfld.long 0x00 7. " TOF ,Timer overflow flag" "No overflow,Overflow"
|
|
bitfld.long 0x00 6. " TOIE ,Timer overflow interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5. " CPWMS ,Center-aligned PWM select" "Up counting,Up-Down counting"
|
|
textline " "
|
|
rbitfld.long 0x00 3.--4. " CLKS ,Clock source selection" "No clk,System,Fixed frequency,Ext clk"
|
|
rbitfld.long 0x00 0.--2. " PS ,Prescale factor selection" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
endif
|
|
group.long 0x04++0x07
|
|
line.long 0x00 "FTM1_CNT,FTM1 Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNT ,Counter value"
|
|
line.long 0x04 "FTM1_MOD,FTM1 Modulo register"
|
|
hexmask.long.word 0x04 0.--15. 1. " MOD ,Modulo value"
|
|
if (((per.l(ad:0x40039000+0x54))&0x4)==0x4)
|
|
group.long 0xC++0x07
|
|
line.long 0x00 "FTM1_C0SC,FTM1 Channel 0 Status and Control Register"
|
|
rbitfld.long 0x00 7. " CHF ,Channel 0 flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " CHIE ,Channel 0 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " MSB/MSA ,Channel 0 mode select" "00,01,10,11"
|
|
bitfld.long 0x00 2.--3. " ELSB/ELSA ,Edge or level select" "No edge,Rising,Falling,Both"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICRST ,FTM counter reset by the selected input capture event" "No reset,Reset"
|
|
bitfld.long 0x00 0. " DMA ,DMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "FTM1_C0V,FTM1 Channel 0 Value Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " VAL ,Channel 0 value"
|
|
else
|
|
group.long 0xC++0x07
|
|
line.long 0x00 "FTM1_C0SC,FTM1 Channel 0 Status and Control Register"
|
|
rbitfld.long 0x00 7. " CHF ,Channel 0 flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " CHIE ,Channel 0 interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4.--5. " MSB/MSA ,Channel 0 mode select" "00,01,10,11"
|
|
rbitfld.long 0x00 2.--3. " ELSB/ELSA ,Edge or level select" "No edge,Rising,Falling,Both"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " ICRST ,FTM counter reset by the selected input capture event" "No reset,Reset"
|
|
bitfld.long 0x00 0. " DMA ,DMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "FTM1_C0V,FTM1 Channel 0 Value Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " VAL ,Channel 0 value"
|
|
endif
|
|
if (((per.l(ad:0x40039000+0x54))&0x4)==0x4)
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "FTM1_C1SC,FTM1 Channel 1 Status and Control Register"
|
|
rbitfld.long 0x00 7. " CHF ,Channel 1 flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " CHIE ,Channel 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " MSB/MSA ,Channel 1 mode select" "00,01,10,11"
|
|
bitfld.long 0x00 2.--3. " ELSB/ELSA ,Edge or level select" "No edge,Rising,Falling,Both"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICRST ,FTM counter reset by the selected input capture event" "No reset,Reset"
|
|
bitfld.long 0x00 0. " DMA ,DMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "FTM1_C1V,FTM1 Channel 1 Value Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " VAL ,Channel 1 value"
|
|
else
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "FTM1_C1SC,FTM1 Channel 1 Status and Control Register"
|
|
rbitfld.long 0x00 7. " CHF ,Channel 1 flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " CHIE ,Channel 1 interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4.--5. " MSB/MSA ,Channel 1 mode select" "00,01,10,11"
|
|
rbitfld.long 0x00 2.--3. " ELSB/ELSA ,Edge or level select" "No edge,Rising,Falling,Both"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " ICRST ,FTM counter reset by the selected input capture event" "No reset,Reset"
|
|
bitfld.long 0x00 0. " DMA ,DMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "FTM1_C1V,FTM1 Channel 1 Value Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " VAL ,Channel 1 value"
|
|
endif
|
|
group.long 0x4C++0x3
|
|
line.long 0x00 "FTM1_CNTIN,FTM1 Counter Initial Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " INIT ,Initial value of FTM1 counter"
|
|
rgroup.long 0x50++0x3
|
|
line.long 0x00 "FTM1_STATUS,FTM1 Capture and Compare Status Register"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CH1F ,Channel 1 flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " CH0F ,Channel 0 flag" "Not occurred,Occurred"
|
|
textline " "
|
|
if (((per.l(ad:0x40039000+0x54))&0x4)==0x4)
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "FTM1_MODE,FTM1 Features Mode Selection Register"
|
|
bitfld.long 0x00 7. " FAULTIE ,Fault Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5.--6. " FAULTM ,Fault Control Mode" "Disabled,Even channels / Manual fault clearing,All channels / Manual fault clearing,All channels / Auto fault clearing"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CAPTEST ,Capture Test Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " PWMSYNC ,PWM Synchronization Mode (Software/Hardware triggers usage)" "No restrictions,MOD CnV / OUTMASK FTM"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WPDIS ,Write Protection Disable" "No,Yes"
|
|
bitfld.long 0x00 1. " INIT ,Initialize the Channels Output" "Not initialized,Initialized"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FTMEN ,FTM Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "FTM1_MODE,FTM1 Features Mode Selection Register"
|
|
bitfld.long 0x00 7. " FAULTIE ,Fault Interrupt Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5.--6. " FAULTM ,Fault Control Mode" "Disabled,Even channels / Manual fault clearing,All channels / Manual fault clearing,All channels / Auto fault clearing"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " CAPTEST ,Capture Test Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " PWMSYNC ,PWM Synchronization Mode (Software/Hardware triggers usage)" "No restrictions,MOD CnV / OUTMASK FTM"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WPDIS ,Write Protection Disable" "No,Yes"
|
|
bitfld.long 0x00 1. " INIT ,Initialize the Channels Output" "Not initialized,Initialized"
|
|
textline " "
|
|
rbitfld.long 0x00 0. " FTMEN ,FTM Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "FTM1_SYNC,FTM1 Synchronization Register"
|
|
bitfld.long 0x00 7. " SWSYNC ,PWM Synchronization Software Trigger" "Not selected,Selected"
|
|
bitfld.long 0x00 6. " TRIG2 ,PWM Synchronization Hardware Trigger 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TRIG1 ,PWM Synchronization Hardware Trigger 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " TRIG0 ,PWM Synchronization Hardware Trigger 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SYNCHOM ,Output Mask Synchronization" "At rising edges of sys clk,By PWM sync"
|
|
textline " "
|
|
bitfld.long 0x00 2. " REINIT ,FTM Counter Reinitialization by Synchronization" "Normal,Updated on trigger"
|
|
bitfld.long 0x00 1. " CNTMAX ,Maximum Loading Point Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CNTMIN ,Minimum Loading Point Enable" "Disabled,Enabled"
|
|
textline " "
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "FTM1_OUTINIT,FTM1 Initial State for Channels Output Register"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CH1OI ,Channel 1 Output Initialization Value" "0,1"
|
|
bitfld.long 0x00 0. " CH0OI ,Channel 0 Output Initialization Value" "0,1"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "FTM1_OUTMASK,FTM1 Output Mask Register"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CH1OM ,Channel 1 Output Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " CH0OM ,Channel 0 Output Mask" "Not masked,Masked"
|
|
if (((per.l(ad:0x40039000+0x54))&0x4)==0x4)
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "FTM1_COMBINE,FTM1 Function for Linked Channels Register"
|
|
bitfld.long 0x00 6. " FAULTEN0 ,Fault Control Enable in Channels 0 and 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SYNCEN0 ,PWM Synchronization Enable (C0V,C1V)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DTEN0 ,Deadtime Enable in Channels 0 and 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DECAP0 ,Dual Edge Capture Mode Captures" "Inactive,Active"
|
|
bitfld.long 0x00 2. " DECAPEN0 ,Dual Edge Capture Mode Enable for Channels 0 and 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " COMP0 ,Complementary Mode for Channels 0 and 1" "CH1 same as CH0,CH1 complement of CH0"
|
|
textline " "
|
|
bitfld.long 0x00 0. " COMBINE0 ,Combine Channels 0 and 1" "Independent,Combined"
|
|
else
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "FTM1_COMBINE,FTM1 Function for Linked Channels Register"
|
|
rbitfld.long 0x00 6. " FAULTEN0 ,Fault Control Enable in Channels 0 and 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SYNCEN0 ,PWM Synchronization Enable (C0V,C1V)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4. " DTEN0 ,Deadtime Enable in Channels 0 and 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DECAP0 ,Dual Edge Capture Mode Captures" "Inactive,Active"
|
|
rbitfld.long 0x00 2. " DECAPEN0 ,Dual Edge Capture Mode Enable for Channels 0 and 1" "Disabled,Enabled"
|
|
rbitfld.long 0x00 1. " COMP0 ,Complementary Mode for Channels 0 and 1" "CH1 same as CH0,CH1 complement of CH0"
|
|
textline " "
|
|
rbitfld.long 0x00 0. " COMBINE0 ,Combine Channels 0 and 1" "Independent,Combined"
|
|
endif
|
|
if ((per.l(ad:0x40039000+0x54)&0x04)==0x04)
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "FTM1_DEADTIME,FTM1 Deadtime Insertion Control Register"
|
|
bitfld.long 0x00 6.--7. " DTPS ,Deadtime Prescaler Value" "/1,/1,/4,/16"
|
|
bitfld.long 0x00 0.--5. " DTVAL ,Deadtime Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
else
|
|
rgroup.long 0x68++0x03
|
|
line.long 0x00 "FTM1_DEADTIME,FTM1 Deadtime Insertion Control Register"
|
|
bitfld.long 0x00 6.--7. " DTPS ,Deadtime Prescaler Value" "/1,/1,/4,/16"
|
|
bitfld.long 0x00 0.--5. " DTVAL ,Deadtime Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "FTM1_EXTTRIG,FTM1 External Trigger Register"
|
|
rbitfld.long 0x00 7. " TRIGF ,Channel Trigger Flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " INITTRIGEN ,Initialization Trigger Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CH1TRIG ,Channel 1 Trigger Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CH0TRIG ,Channel 0 Trigger Enable" "Disabled,Enabled"
|
|
if ((per.l(ad:0x40039000+0x54)&0x04)==0x04)
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "FTM1_POL,FTM1 Channels Polarity Register"
|
|
textline " "
|
|
bitfld.long 0x00 1. " POL1 ,Channel 1 Polarity" "Active high,Active low"
|
|
bitfld.long 0x00 0. " POL0 ,Channel 0 Polarity" "Active high,Active low"
|
|
else
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "FTM1_POL,FTM1 Channels Polarity Register"
|
|
textline " "
|
|
bitfld.long 0x00 1. " POL1 ,Channel 1 Polarity" "Active high,Active low"
|
|
bitfld.long 0x00 0. " POL0 ,Channel 0 Polarity" "Active high,Active low"
|
|
endif
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "FTM1_FMS,FTM1 Fault Mode Status Register"
|
|
rbitfld.long 0x00 7. " FAULTF ,Fault Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x00 6. " WPEN ,Write Protection Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5. " FAULTIN ,Logic OR of the enabled fault inputs" "0,1"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " FAULTF1 ,Fault Detection Flag 1" "Not detected,Detected"
|
|
rbitfld.long 0x00 0. " FAULTF0 ,Fault Detection Flag 0" "Not detected,Detected"
|
|
group.long 0x78++0x7
|
|
line.long 0x00 "FTM1_FILTER,FTM1 Input Capture Filter Control Register"
|
|
bitfld.long 0x00 4.--7. " CH1FVAL ,Channel 1 Input Filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " CH0FVAL ,Channel 0 Input Filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "FTM1_FLTCTRL,FTM1 Fault Control Register"
|
|
bitfld.long 0x04 8.--11. " FFVAL ,Fault Input Filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x04 5. " FFLTR1EN ,Fault Input 1 Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " FFLTR0EN ,Fault Input 0 Filter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " FAULT1EN ,Fault Input 1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " FAULT0EN ,Fault Input 0 Enable" "Disabled,Enabled"
|
|
if (((per.l(ad:0x40039000+0x54))&0x4)==0x4)
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "FTM1_QDCTRL,FTM1 Quadrature Decoder Control and Status Register"
|
|
bitfld.long 0x00 7. " PHAFLTREN ,Phase A Input Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " PHBFLTREN ,Phase B Input Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " PHAPOL ,Phase A Input Polarity" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PHBPOL ,Phase B Input Polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 3. " QUADMODE ,Quadrature Decoder Mode" "Phase A & B,Count and direction"
|
|
rbitfld.long 0x00 2. " QUADIR ,FTM1 Counter Direction in Quadrature Decoder Mode" "Decreasing,Increasing"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " TOFDIR ,Timer Overflow Direction in Quadrature Decoder Mode" "Min->Max,Max->Min"
|
|
bitfld.long 0x00 0. " QUADEN ,Quadrature Decoder Mode Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "FTM1_QDCTRL,FTM1 Quadrature Decoder Control and Status Register"
|
|
bitfld.long 0x00 7. " PHAFLTREN ,Phase A Input Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " PHBFLTREN ,Phase B Input Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " PHAPOL ,Phase A Input Polarity" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PHBPOL ,Phase B Input Polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 3. " QUADMODE ,Quadrature Decoder Mode" "Phase A & B,Count and direction"
|
|
rbitfld.long 0x00 2. " QUADIR ,FTM1 Counter Direction in Quadrature Decoder Mode" "Decreasing,Increasing"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " TOFDIR ,Timer Overflow Direction in Quadrature Decoder Mode" "Min->Max,Max->Min"
|
|
rbitfld.long 0x00 0. " QUADEN ,Quadrature Decoder Mode Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "FTM1_CONF,FTM1 Configuration Register"
|
|
bitfld.long 0x00 10. " GTBEOUT ,Global Time Base Output" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " GTBEEN ,Global Time Base Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " BDMMODE ,BDM Mode (FTM Counter/FTM Channels Output)" "Stopped/Functional,Stopped/Forced to safe value,Stopped/Frozen,Functional/Functional"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " NUMTOF ,TOF Frequency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if ((per.l(ad:0x40039000+0x54)&0x04)==0x04)
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "FTM1_FLTPOL,FTM1 Fault Input Polarity Register"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FLT1POL ,Fault Input 1 Polarity" "Active high,Active low"
|
|
bitfld.long 0x00 0. " FLT0POL ,Fault Input 0 Polarity" "Active high,Active low"
|
|
else
|
|
rgroup.long 0x88++0x03
|
|
line.long 0x00 "FTM1_FLTPOL,FTM1 Fault Input Polarity Register"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FLT1POL ,Fault Input 1 Polarity" "Active high,Active low"
|
|
bitfld.long 0x00 0. " FLT0POL ,Fault Input 0 Polarity" "Active high,Active low"
|
|
endif
|
|
group.long 0x8C++0x0F
|
|
line.long 0x00 "FTM1_SYNCONF,FTM1 Synchronization Configuration Register"
|
|
bitfld.long 0x00 20. " HWSOC ,Software output control synchronization (hardware trigger)" "Not activated,Activated"
|
|
bitfld.long 0x00 19. " HWINVC ,Inverting control synchronization (hardware trigger)" "Not activated,Activated"
|
|
bitfld.long 0x00 18. " HWOM ,Output mask synchronization (hardware trigger)" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x00 17. " HWWRBUF ,MOD, CNTIN and CV registers synchronization (hardware trigger)" "Not activated,Activated"
|
|
bitfld.long 0x00 16. " HWRSTCNT ,FTM counter synchronization (hardware trigger)" "Not activated,Activated"
|
|
bitfld.long 0x00 12. " SWSOC ,Software output control synchronization (software trigger)" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SWINVC ,Inverting control synchronization (software trigger)" "Not activated,Activated"
|
|
bitfld.long 0x00 10. " SWOM ,Output mask synchronization (software trigger)" "Not activated,Activated"
|
|
bitfld.long 0x00 9. " SWWRBUF ,MOD, CNTIN and CV registers synchronization (software trigger)" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SWRSTCNT ,FTM counter synchronization (software trigger)" "Not activated,Activated"
|
|
bitfld.long 0x00 7. " SYNCMODE ,PWM Synchronization Mode" "Legacy,Enhanced"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SWOC ,SWOCTRL register synchronization" "At rising edges of sys clk,By PWM sync"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INVC ,INVCTRL register synchronization" "At rising edges of sys clk,By PWM sync"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CNTINC ,CNTIN register synchronization" "At rising edges of sys clk,By PWM sync"
|
|
textline " "
|
|
bitfld.long 0x00 0. " HWTRIGMODE ,Hardware Trigger Mode" "Cleared,Not cleared"
|
|
line.long 0x04 "FTM1_INVCTRL,FTM1 Inverting Control Register"
|
|
bitfld.long 0x04 0. " INV0EN ,Pair Channels 0 Inverting Enable" "Disabled,Enabled"
|
|
line.long 0x08 "FTM1_SWOCTRL,FTM1 Software Output Control Register"
|
|
bitfld.long 0x08 9. " CH1OCV ,Channel 1 Software Output Control Value" "0,1"
|
|
bitfld.long 0x08 8. " CH0OCV ,Channel 0 Software Output Control Value" "0,1"
|
|
textline " "
|
|
textline " "
|
|
bitfld.long 0x08 1. " CH1OC ,Channel 1 Software Output Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " CH0OC ,Channel 0 Software Output Control Enable" "Disabled,Enabled"
|
|
line.long 0x0C "FTM1_PWMLOAD,FTM1 PWM Load Register"
|
|
bitfld.long 0x0C 9. " LDOK ,Load Enable" "Disabled,Enabled"
|
|
textline " "
|
|
textline " "
|
|
bitfld.long 0x0C 1. " CH1SE ,Channel 1 Select" "Not included,Included"
|
|
bitfld.long 0x0C 0. " CH0SE ,Channel 0 Select" "Not included,Included"
|
|
width 0xB
|
|
tree.end
|
|
tree "FTM 2"
|
|
base ad:0x4003A000
|
|
width 15.
|
|
if (((per.l(ad:0x4003A000+0x54))&0x4)==0x4)
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "FTM2_SC,FTM2 Status and Control Register"
|
|
rbitfld.long 0x00 7. " TOF ,Timer overflow flag" "No overflow,Overflow"
|
|
bitfld.long 0x00 6. " TOIE ,Timer overflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " CPWMS ,Center-aligned PWM select" "Up counting,Up-Down counting"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " CLKS ,Clock source selection" "No clk,System,Fixed frequency,Ext clk"
|
|
bitfld.long 0x00 0.--2. " PS ,Prescale factor selection" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
else
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "FTM2_SC,FTM2 Status and Control Register"
|
|
rbitfld.long 0x00 7. " TOF ,Timer overflow flag" "No overflow,Overflow"
|
|
bitfld.long 0x00 6. " TOIE ,Timer overflow interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5. " CPWMS ,Center-aligned PWM select" "Up counting,Up-Down counting"
|
|
textline " "
|
|
rbitfld.long 0x00 3.--4. " CLKS ,Clock source selection" "No clk,System,Fixed frequency,Ext clk"
|
|
rbitfld.long 0x00 0.--2. " PS ,Prescale factor selection" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
endif
|
|
group.long 0x04++0x07
|
|
line.long 0x00 "FTM2_CNT,FTM2 Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNT ,Counter value"
|
|
line.long 0x04 "FTM2_MOD,FTM2 Modulo register"
|
|
hexmask.long.word 0x04 0.--15. 1. " MOD ,Modulo value"
|
|
if (((per.l(ad:0x4003A000+0x54))&0x4)==0x4)
|
|
group.long 0xC++0x07
|
|
line.long 0x00 "FTM2_C0SC,FTM2 Channel 0 Status and Control Register"
|
|
rbitfld.long 0x00 7. " CHF ,Channel 0 flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " CHIE ,Channel 0 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " MSB/MSA ,Channel 0 mode select" "00,01,10,11"
|
|
bitfld.long 0x00 2.--3. " ELSB/ELSA ,Edge or level select" "No edge,Rising,Falling,Both"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICRST ,FTM counter reset by the selected input capture event" "No reset,Reset"
|
|
bitfld.long 0x00 0. " DMA ,DMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "FTM2_C0V,FTM2 Channel 0 Value Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " VAL ,Channel 0 value"
|
|
else
|
|
group.long 0xC++0x07
|
|
line.long 0x00 "FTM2_C0SC,FTM2 Channel 0 Status and Control Register"
|
|
rbitfld.long 0x00 7. " CHF ,Channel 0 flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " CHIE ,Channel 0 interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4.--5. " MSB/MSA ,Channel 0 mode select" "00,01,10,11"
|
|
rbitfld.long 0x00 2.--3. " ELSB/ELSA ,Edge or level select" "No edge,Rising,Falling,Both"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " ICRST ,FTM counter reset by the selected input capture event" "No reset,Reset"
|
|
bitfld.long 0x00 0. " DMA ,DMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "FTM2_C0V,FTM2 Channel 0 Value Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " VAL ,Channel 0 value"
|
|
endif
|
|
if (((per.l(ad:0x4003A000+0x54))&0x4)==0x4)
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "FTM2_C1SC,FTM2 Channel 1 Status and Control Register"
|
|
rbitfld.long 0x00 7. " CHF ,Channel 1 flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " CHIE ,Channel 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " MSB/MSA ,Channel 1 mode select" "00,01,10,11"
|
|
bitfld.long 0x00 2.--3. " ELSB/ELSA ,Edge or level select" "No edge,Rising,Falling,Both"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICRST ,FTM counter reset by the selected input capture event" "No reset,Reset"
|
|
bitfld.long 0x00 0. " DMA ,DMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "FTM2_C1V,FTM2 Channel 1 Value Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " VAL ,Channel 1 value"
|
|
else
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "FTM2_C1SC,FTM2 Channel 1 Status and Control Register"
|
|
rbitfld.long 0x00 7. " CHF ,Channel 1 flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " CHIE ,Channel 1 interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4.--5. " MSB/MSA ,Channel 1 mode select" "00,01,10,11"
|
|
rbitfld.long 0x00 2.--3. " ELSB/ELSA ,Edge or level select" "No edge,Rising,Falling,Both"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " ICRST ,FTM counter reset by the selected input capture event" "No reset,Reset"
|
|
bitfld.long 0x00 0. " DMA ,DMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "FTM2_C1V,FTM2 Channel 1 Value Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " VAL ,Channel 1 value"
|
|
endif
|
|
group.long 0x4C++0x3
|
|
line.long 0x00 "FTM2_CNTIN,FTM2 Counter Initial Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " INIT ,Initial value of FTM2 counter"
|
|
rgroup.long 0x50++0x3
|
|
line.long 0x00 "FTM2_STATUS,FTM2 Capture and Compare Status Register"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CH1F ,Channel 1 flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " CH0F ,Channel 0 flag" "Not occurred,Occurred"
|
|
textline " "
|
|
if (((per.l(ad:0x4003A000+0x54))&0x4)==0x4)
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "FTM2_MODE,FTM2 Features Mode Selection Register"
|
|
bitfld.long 0x00 7. " FAULTIE ,Fault Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5.--6. " FAULTM ,Fault Control Mode" "Disabled,Even channels / Manual fault clearing,All channels / Manual fault clearing,All channels / Auto fault clearing"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CAPTEST ,Capture Test Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " PWMSYNC ,PWM Synchronization Mode (Software/Hardware triggers usage)" "No restrictions,MOD CnV / OUTMASK FTM"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WPDIS ,Write Protection Disable" "No,Yes"
|
|
bitfld.long 0x00 1. " INIT ,Initialize the Channels Output" "Not initialized,Initialized"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FTMEN ,FTM Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "FTM2_MODE,FTM2 Features Mode Selection Register"
|
|
bitfld.long 0x00 7. " FAULTIE ,Fault Interrupt Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5.--6. " FAULTM ,Fault Control Mode" "Disabled,Even channels / Manual fault clearing,All channels / Manual fault clearing,All channels / Auto fault clearing"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " CAPTEST ,Capture Test Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " PWMSYNC ,PWM Synchronization Mode (Software/Hardware triggers usage)" "No restrictions,MOD CnV / OUTMASK FTM"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WPDIS ,Write Protection Disable" "No,Yes"
|
|
bitfld.long 0x00 1. " INIT ,Initialize the Channels Output" "Not initialized,Initialized"
|
|
textline " "
|
|
rbitfld.long 0x00 0. " FTMEN ,FTM Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "FTM2_SYNC,FTM2 Synchronization Register"
|
|
bitfld.long 0x00 7. " SWSYNC ,PWM Synchronization Software Trigger" "Not selected,Selected"
|
|
bitfld.long 0x00 6. " TRIG2 ,PWM Synchronization Hardware Trigger 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TRIG1 ,PWM Synchronization Hardware Trigger 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " TRIG0 ,PWM Synchronization Hardware Trigger 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SYNCHOM ,Output Mask Synchronization" "At rising edges of sys clk,By PWM sync"
|
|
textline " "
|
|
bitfld.long 0x00 2. " REINIT ,FTM Counter Reinitialization by Synchronization" "Normal,Updated on trigger"
|
|
bitfld.long 0x00 1. " CNTMAX ,Maximum Loading Point Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CNTMIN ,Minimum Loading Point Enable" "Disabled,Enabled"
|
|
textline " "
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "FTM2_OUTINIT,FTM2 Initial State for Channels Output Register"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CH1OI ,Channel 1 Output Initialization Value" "0,1"
|
|
bitfld.long 0x00 0. " CH0OI ,Channel 0 Output Initialization Value" "0,1"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "FTM2_OUTMASK,FTM2 Output Mask Register"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CH1OM ,Channel 1 Output Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " CH0OM ,Channel 0 Output Mask" "Not masked,Masked"
|
|
if (((per.l(ad:0x4003A000+0x54))&0x4)==0x4)
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "FTM2_COMBINE,FTM2 Function for Linked Channels Register"
|
|
bitfld.long 0x00 6. " FAULTEN0 ,Fault Control Enable in Channels 0 and 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SYNCEN0 ,PWM Synchronization Enable (C0V,C1V)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DTEN0 ,Deadtime Enable in Channels 0 and 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DECAP0 ,Dual Edge Capture Mode Captures" "Inactive,Active"
|
|
bitfld.long 0x00 2. " DECAPEN0 ,Dual Edge Capture Mode Enable for Channels 0 and 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " COMP0 ,Complementary Mode for Channels 0 and 1" "CH1 same as CH0,CH1 complement of CH0"
|
|
textline " "
|
|
bitfld.long 0x00 0. " COMBINE0 ,Combine Channels 0 and 1" "Independent,Combined"
|
|
else
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "FTM2_COMBINE,FTM2 Function for Linked Channels Register"
|
|
rbitfld.long 0x00 6. " FAULTEN0 ,Fault Control Enable in Channels 0 and 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SYNCEN0 ,PWM Synchronization Enable (C0V,C1V)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4. " DTEN0 ,Deadtime Enable in Channels 0 and 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DECAP0 ,Dual Edge Capture Mode Captures" "Inactive,Active"
|
|
rbitfld.long 0x00 2. " DECAPEN0 ,Dual Edge Capture Mode Enable for Channels 0 and 1" "Disabled,Enabled"
|
|
rbitfld.long 0x00 1. " COMP0 ,Complementary Mode for Channels 0 and 1" "CH1 same as CH0,CH1 complement of CH0"
|
|
textline " "
|
|
rbitfld.long 0x00 0. " COMBINE0 ,Combine Channels 0 and 1" "Independent,Combined"
|
|
endif
|
|
if ((per.l(ad:0x4003A000+0x54)&0x04)==0x04)
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "FTM2_DEADTIME,FTM2 Deadtime Insertion Control Register"
|
|
bitfld.long 0x00 6.--7. " DTPS ,Deadtime Prescaler Value" "/1,/1,/4,/16"
|
|
bitfld.long 0x00 0.--5. " DTVAL ,Deadtime Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
else
|
|
rgroup.long 0x68++0x03
|
|
line.long 0x00 "FTM2_DEADTIME,FTM2 Deadtime Insertion Control Register"
|
|
bitfld.long 0x00 6.--7. " DTPS ,Deadtime Prescaler Value" "/1,/1,/4,/16"
|
|
bitfld.long 0x00 0.--5. " DTVAL ,Deadtime Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "FTM2_EXTTRIG,FTM2 External Trigger Register"
|
|
rbitfld.long 0x00 7. " TRIGF ,Channel Trigger Flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " INITTRIGEN ,Initialization Trigger Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CH1TRIG ,Channel 1 Trigger Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CH0TRIG ,Channel 0 Trigger Enable" "Disabled,Enabled"
|
|
if ((per.l(ad:0x4003A000+0x54)&0x04)==0x04)
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "FTM2_POL,FTM2 Channels Polarity Register"
|
|
textline " "
|
|
bitfld.long 0x00 1. " POL1 ,Channel 1 Polarity" "Active high,Active low"
|
|
bitfld.long 0x00 0. " POL0 ,Channel 0 Polarity" "Active high,Active low"
|
|
else
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "FTM2_POL,FTM2 Channels Polarity Register"
|
|
textline " "
|
|
bitfld.long 0x00 1. " POL1 ,Channel 1 Polarity" "Active high,Active low"
|
|
bitfld.long 0x00 0. " POL0 ,Channel 0 Polarity" "Active high,Active low"
|
|
endif
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "FTM2_FMS,FTM2 Fault Mode Status Register"
|
|
rbitfld.long 0x00 7. " FAULTF ,Fault Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x00 6. " WPEN ,Write Protection Enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5. " FAULTIN ,Logic OR of the enabled fault inputs" "0,1"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " FAULTF1 ,Fault Detection Flag 1" "Not detected,Detected"
|
|
rbitfld.long 0x00 0. " FAULTF0 ,Fault Detection Flag 0" "Not detected,Detected"
|
|
group.long 0x78++0x7
|
|
line.long 0x00 "FTM2_FILTER,FTM2 Input Capture Filter Control Register"
|
|
bitfld.long 0x00 4.--7. " CH1FVAL ,Channel 1 Input Filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " CH0FVAL ,Channel 0 Input Filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "FTM2_FLTCTRL,FTM2 Fault Control Register"
|
|
bitfld.long 0x04 8.--11. " FFVAL ,Fault Input Filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x04 5. " FFLTR1EN ,Fault Input 1 Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " FFLTR0EN ,Fault Input 0 Filter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " FAULT1EN ,Fault Input 1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " FAULT0EN ,Fault Input 0 Enable" "Disabled,Enabled"
|
|
if (((per.l(ad:0x4003A000+0x54))&0x4)==0x4)
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "FTM2_QDCTRL,FTM2 Quadrature Decoder Control and Status Register"
|
|
bitfld.long 0x00 7. " PHAFLTREN ,Phase A Input Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " PHBFLTREN ,Phase B Input Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " PHAPOL ,Phase A Input Polarity" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PHBPOL ,Phase B Input Polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 3. " QUADMODE ,Quadrature Decoder Mode" "Phase A & B,Count and direction"
|
|
rbitfld.long 0x00 2. " QUADIR ,FTM2 Counter Direction in Quadrature Decoder Mode" "Decreasing,Increasing"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " TOFDIR ,Timer Overflow Direction in Quadrature Decoder Mode" "Min->Max,Max->Min"
|
|
bitfld.long 0x00 0. " QUADEN ,Quadrature Decoder Mode Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "FTM2_QDCTRL,FTM2 Quadrature Decoder Control and Status Register"
|
|
bitfld.long 0x00 7. " PHAFLTREN ,Phase A Input Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " PHBFLTREN ,Phase B Input Filter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " PHAPOL ,Phase A Input Polarity" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PHBPOL ,Phase B Input Polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 3. " QUADMODE ,Quadrature Decoder Mode" "Phase A & B,Count and direction"
|
|
rbitfld.long 0x00 2. " QUADIR ,FTM2 Counter Direction in Quadrature Decoder Mode" "Decreasing,Increasing"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " TOFDIR ,Timer Overflow Direction in Quadrature Decoder Mode" "Min->Max,Max->Min"
|
|
rbitfld.long 0x00 0. " QUADEN ,Quadrature Decoder Mode Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "FTM2_CONF,FTM2 Configuration Register"
|
|
bitfld.long 0x00 10. " GTBEOUT ,Global Time Base Output" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " GTBEEN ,Global Time Base Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " BDMMODE ,BDM Mode (FTM Counter/FTM Channels Output)" "Stopped/Functional,Stopped/Forced to safe value,Stopped/Frozen,Functional/Functional"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " NUMTOF ,TOF Frequency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if ((per.l(ad:0x4003A000+0x54)&0x04)==0x04)
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "FTM2_FLTPOL,FTM2 Fault Input Polarity Register"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FLT1POL ,Fault Input 1 Polarity" "Active high,Active low"
|
|
bitfld.long 0x00 0. " FLT0POL ,Fault Input 0 Polarity" "Active high,Active low"
|
|
else
|
|
rgroup.long 0x88++0x03
|
|
line.long 0x00 "FTM2_FLTPOL,FTM2 Fault Input Polarity Register"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FLT1POL ,Fault Input 1 Polarity" "Active high,Active low"
|
|
bitfld.long 0x00 0. " FLT0POL ,Fault Input 0 Polarity" "Active high,Active low"
|
|
endif
|
|
group.long 0x8C++0x0F
|
|
line.long 0x00 "FTM2_SYNCONF,FTM2 Synchronization Configuration Register"
|
|
bitfld.long 0x00 20. " HWSOC ,Software output control synchronization (hardware trigger)" "Not activated,Activated"
|
|
bitfld.long 0x00 19. " HWINVC ,Inverting control synchronization (hardware trigger)" "Not activated,Activated"
|
|
bitfld.long 0x00 18. " HWOM ,Output mask synchronization (hardware trigger)" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x00 17. " HWWRBUF ,MOD, CNTIN and CV registers synchronization (hardware trigger)" "Not activated,Activated"
|
|
bitfld.long 0x00 16. " HWRSTCNT ,FTM counter synchronization (hardware trigger)" "Not activated,Activated"
|
|
bitfld.long 0x00 12. " SWSOC ,Software output control synchronization (software trigger)" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SWINVC ,Inverting control synchronization (software trigger)" "Not activated,Activated"
|
|
bitfld.long 0x00 10. " SWOM ,Output mask synchronization (software trigger)" "Not activated,Activated"
|
|
bitfld.long 0x00 9. " SWWRBUF ,MOD, CNTIN and CV registers synchronization (software trigger)" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SWRSTCNT ,FTM counter synchronization (software trigger)" "Not activated,Activated"
|
|
bitfld.long 0x00 7. " SYNCMODE ,PWM Synchronization Mode" "Legacy,Enhanced"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SWOC ,SWOCTRL register synchronization" "At rising edges of sys clk,By PWM sync"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INVC ,INVCTRL register synchronization" "At rising edges of sys clk,By PWM sync"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CNTINC ,CNTIN register synchronization" "At rising edges of sys clk,By PWM sync"
|
|
textline " "
|
|
bitfld.long 0x00 0. " HWTRIGMODE ,Hardware Trigger Mode" "Cleared,Not cleared"
|
|
line.long 0x04 "FTM2_INVCTRL,FTM2 Inverting Control Register"
|
|
bitfld.long 0x04 0. " INV0EN ,Pair Channels 0 Inverting Enable" "Disabled,Enabled"
|
|
line.long 0x08 "FTM2_SWOCTRL,FTM2 Software Output Control Register"
|
|
bitfld.long 0x08 9. " CH1OCV ,Channel 1 Software Output Control Value" "0,1"
|
|
bitfld.long 0x08 8. " CH0OCV ,Channel 0 Software Output Control Value" "0,1"
|
|
textline " "
|
|
textline " "
|
|
bitfld.long 0x08 1. " CH1OC ,Channel 1 Software Output Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " CH0OC ,Channel 0 Software Output Control Enable" "Disabled,Enabled"
|
|
line.long 0x0C "FTM2_PWMLOAD,FTM2 PWM Load Register"
|
|
bitfld.long 0x0C 9. " LDOK ,Load Enable" "Disabled,Enabled"
|
|
textline " "
|
|
textline " "
|
|
bitfld.long 0x0C 1. " CH1SE ,Channel 1 Select" "Not included,Included"
|
|
bitfld.long 0x0C 0. " CH0SE ,Channel 0 Select" "Not included,Included"
|
|
width 0xB
|
|
tree.end
|
|
tree.end
|
|
tree "PIT (Periodic Interrupt Timer)"
|
|
base ad:0x40037000
|
|
sif cpuis("MK65*F*")||cpuis("MK66*F*")||cpuis("MK26FN*")||cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("KK28FN2M0CAU15R")||cpuis("MK28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")||cpuis("KK26FN2M0CAC18R")||cpuis("MK27FN2M0VMI15")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK65FN2M0CAC18R")
|
|
width 9.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MCR,PIT Module Control Register"
|
|
bitfld.long 0x00 1. " MDIS ,Module disable" "No,Yes"
|
|
bitfld.long 0x00 0. " FRZ ,Freeze in debug mode" "Not stopped,Stopped"
|
|
sif cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("KK28FN2M0CAU15R")||cpuis("MK28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")||cpuis("KK26FN2M0CAC18R")||cpuis("MK27FN2M0VMI15")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("MK65FN2M0VMI18R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK66FN2M0VLQ18R")
|
|
rgroup.long 0xE0++0x07
|
|
line.long 0x00 "LTMR64H,PIT Upper Lifetime Timer Register"
|
|
line.long 0x04 "LTMR64L,PIT Lower Lifetime Timer Register"
|
|
else
|
|
group.long 0xE0++0x07
|
|
line.long 0x00 "LTMR64H,PIT Upper Lifetime Timer Register"
|
|
line.long 0x04 "LTMR64L,PIT Lower Lifetime Timer Register"
|
|
endif
|
|
else
|
|
width 8.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MCR,PIT Module Control Register"
|
|
bitfld.long 0x00 1. " MDIS ,Module disable" "No,Yes"
|
|
bitfld.long 0x00 0. " FRZ ,Freeze in debug mode" "Not stopped,Stopped"
|
|
endif
|
|
width 9.
|
|
group.long 0x100++0x03 "PIT 0 Registers"
|
|
line.long 0x00 "LDVAL0,PIT0 Timer Load Value Register"
|
|
rgroup.long (0x100+0x4)++0x03
|
|
line.long 0x00 "CVAL0,PIT0 Current Timer Value Register"
|
|
group.long (0x100+0x08)++0x03
|
|
line.long 0x00 "TCTRL0,PIT0 Timer Control Register"
|
|
sif !cpuis("MK?0F*")&&!cpuis("MK?0D*5")&&!cpuis("MK?0DN*AB10")&&!cpuis("MK20DN512*AB10R")&&!cpuis("KK20DN512ZCAB10R")&&!cpuis("MK20DN512ZVLL10")&&!cpuis("MK20DX256ZVLL10")&&!cpuis("MK20DN512ZVLQ10")&&!cpuis("MK20DN512ZVLQ10R")&&!cpuis("MK20DN512ZVMD10")&&!cpuis("MK20DX128ZVLQ10")&&!cpuis("MK20DX256ZVLQ10")&&!cpuis("MK20DX256ZVLQ10R")&&!cpuis("MK20DX256ZVMD10")&&!cpuis("MK20DN512ZVLK10")&&!cpuis("MK20DX256ZVLK10")&&!cpuis("MK20DN512ZVMC10")&&!cpuis("MK20DN512ZVMC10R")
|
|
sif cpuis("MK20FN1M0VLQ12R")||cpuis("MK02*")||cpuis("MK22FN1M0AVLK12")||cpuis("MK22FX512AVLK12")||cpuis("MK22FN1M0VLK10")||cpuis("MK22FN1M0AVLL12")||cpuis("MK22FX512AVLL12")||cpuis("MK22FN1M0VLL10")||cpuis("MK22FN1M0AVMC12")||cpuis("MK22FX512AVMC12")||cpuis("MK22FN1M0AVLQ12")||cpuis("MK22FN1M0AVMD12")||cpuis("MK22FX512AVLQ12")||cpuis("MK22FX512AVMD12")||cpuis("MK22FN1M0VLQ10")||cpuis("MK22FX512AVLH12")||cpuis("MK22FN1M0AVLH12")||cpuis("MK22FN1M0VLH10")||cpuis("MK20DX256VLQ10R")||cpuis("MK20FN1M0VLQ12R")||cpuis("MK20DX256VLK10R")||cpuis("MK20DX256VMC7R")||cpuis("MK20DX256VLK7R")||cpuis("MK21FX512VMD10")||cpuis("MK21FN1M0VMD10")||cpuis("MK21FN1M0VMC10")||cpuis("MK21FX512VMC10")||cpuis("MK8?FN256V*")||cpuis("MK11DN512AVLK5*")||cpuis("MK11DN512VLK5*")||cpuis("MK30DX256VLL7*")||cpuis("MK70*")||cpuis("MK20DX64VEX7")||cpuis("MK20DX128VEX7")||cpuis("MK20DX256VEX7")||cpuis("MK60DN512VMC10R")||cpuis("MK63FN1M0VLQ12R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK28FN2M0CAU15R")||cpuis("MK28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")||cpuis("MK27FN2M0VMI15")||cpuis("KK26FN2M0CAC18R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22FN1M0VLK12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLQ12R")||cpuis("MK22FX512VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VDC12R")||cpuis("MK22FN512VFX12")||cpuis("MK22FN512VFX12R")||cpuis("MK22FN512VLH12R")||cpuis("MK22FN1M0VMC12R")||cpuis("MK22FX512VMC12R")||cpuis("MK22FN128VLH10R")||cpuis("MK21DN512AVMC5R")||cpuis("MK21DX256AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK20DN512VLK10R")||cpuis("MK63FN1M0VLQ12R")||cpuis("MK65FN2M0VMI18R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK66FN2M0VLQ18R")||cpuis("MK60DN512VMC10R")||cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")
|
|
endif
|
|
endif
|
|
bitfld.long 0x00 1. " TIE ,Timer interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TEN ,Timer enable" "Disabled,Enabled"
|
|
group.long (0x100+0x0C)++0x03
|
|
line.long 0x00 "TFLG0,PIT0 Timer Flag Register"
|
|
eventfld.long 0x00 0. " TIF ,Timer interrupt flag" "Not occurred,Occurred"
|
|
group.long 0x110++0x03 "PIT 1 Registers"
|
|
line.long 0x00 "LDVAL1,PIT1 Timer Load Value Register"
|
|
rgroup.long (0x110+0x4)++0x03
|
|
line.long 0x00 "CVAL1,PIT1 Current Timer Value Register"
|
|
group.long (0x110+0x08)++0x03
|
|
line.long 0x00 "TCTRL1,PIT1 Timer Control Register"
|
|
sif !cpuis("MK?0F*")&&!cpuis("MK?0D*5")&&!cpuis("MK?0DN*AB10")&&!cpuis("MK20DN512*AB10R")&&!cpuis("KK20DN512ZCAB10R")&&!cpuis("MK20DN512ZVLL10")&&!cpuis("MK20DX256ZVLL10")&&!cpuis("MK20DN512ZVLQ10")&&!cpuis("MK20DN512ZVLQ10R")&&!cpuis("MK20DN512ZVMD10")&&!cpuis("MK20DX128ZVLQ10")&&!cpuis("MK20DX256ZVLQ10")&&!cpuis("MK20DX256ZVLQ10R")&&!cpuis("MK20DX256ZVMD10")&&!cpuis("MK20DN512ZVLK10")&&!cpuis("MK20DX256ZVLK10")&&!cpuis("MK20DN512ZVMC10")&&!cpuis("MK20DN512ZVMC10R")
|
|
sif cpuis("MK20FN1M0VLQ12R")||cpuis("MK02*")||cpuis("MK22FN1M0AVLK12")||cpuis("MK22FX512AVLK12")||cpuis("MK22FN1M0VLK10")||cpuis("MK22FN1M0AVLL12")||cpuis("MK22FX512AVLL12")||cpuis("MK22FN1M0VLL10")||cpuis("MK22FN1M0AVMC12")||cpuis("MK22FX512AVMC12")||cpuis("MK22FN1M0AVLQ12")||cpuis("MK22FN1M0AVMD12")||cpuis("MK22FX512AVLQ12")||cpuis("MK22FX512AVMD12")||cpuis("MK22FN1M0VLQ10")||cpuis("MK22FX512AVLH12")||cpuis("MK22FN1M0AVLH12")||cpuis("MK22FN1M0VLH10")||cpuis("MK20DX256VLQ10R")||cpuis("MK20FN1M0VLQ12R")||cpuis("MK20DX256VLK10R")||cpuis("MK20DX256VMC7R")||cpuis("MK20DX256VLK7R")||cpuis("MK21FX512VMD10")||cpuis("MK21FN1M0VMD10")||cpuis("MK21FN1M0VMC10")||cpuis("MK21FX512VMC10")||cpuis("MK8?FN256V*")||cpuis("MK11DN512AVLK5*")||cpuis("MK11DN512VLK5*")||cpuis("MK30DX256VLL7*")||cpuis("MK70*")||cpuis("MK20DX64VEX7")||cpuis("MK20DX128VEX7")||cpuis("MK20DX256VEX7")||cpuis("MK60DN512VMC10R")||cpuis("MK63FN1M0VLQ12R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK28FN2M0CAU15R")||cpuis("MK28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")||cpuis("MK27FN2M0VMI15")||cpuis("KK26FN2M0CAC18R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22FN1M0VLK12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLQ12R")||cpuis("MK22FX512VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VDC12R")||cpuis("MK22FN512VFX12")||cpuis("MK22FN512VFX12R")||cpuis("MK22FN512VLH12R")||cpuis("MK22FN1M0VMC12R")||cpuis("MK22FX512VMC12R")||cpuis("MK22FN128VLH10R")||cpuis("MK21DN512AVMC5R")||cpuis("MK21DX256AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK20DN512VLK10R")||cpuis("MK63FN1M0VLQ12R")||cpuis("MK65FN2M0VMI18R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK66FN2M0VLQ18R")||cpuis("MK60DN512VMC10R")||cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")
|
|
bitfld.long 0x00 2. " CHN ,Chain mode" "Not chained,Chained"
|
|
newline
|
|
endif
|
|
endif
|
|
bitfld.long 0x00 1. " TIE ,Timer interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TEN ,Timer enable" "Disabled,Enabled"
|
|
group.long (0x110+0x0C)++0x03
|
|
line.long 0x00 "TFLG1,PIT1 Timer Flag Register"
|
|
eventfld.long 0x00 0. " TIF ,Timer interrupt flag" "Not occurred,Occurred"
|
|
group.long 0x120++0x03 "PIT 2 Registers"
|
|
line.long 0x00 "LDVAL2,PIT2 Timer Load Value Register"
|
|
rgroup.long (0x120+0x4)++0x03
|
|
line.long 0x00 "CVAL2,PIT2 Current Timer Value Register"
|
|
group.long (0x120+0x08)++0x03
|
|
line.long 0x00 "TCTRL2,PIT2 Timer Control Register"
|
|
sif !cpuis("MK?0F*")&&!cpuis("MK?0D*5")&&!cpuis("MK?0DN*AB10")&&!cpuis("MK20DN512*AB10R")&&!cpuis("KK20DN512ZCAB10R")&&!cpuis("MK20DN512ZVLL10")&&!cpuis("MK20DX256ZVLL10")&&!cpuis("MK20DN512ZVLQ10")&&!cpuis("MK20DN512ZVLQ10R")&&!cpuis("MK20DN512ZVMD10")&&!cpuis("MK20DX128ZVLQ10")&&!cpuis("MK20DX256ZVLQ10")&&!cpuis("MK20DX256ZVLQ10R")&&!cpuis("MK20DX256ZVMD10")&&!cpuis("MK20DN512ZVLK10")&&!cpuis("MK20DX256ZVLK10")&&!cpuis("MK20DN512ZVMC10")&&!cpuis("MK20DN512ZVMC10R")
|
|
sif cpuis("MK20FN1M0VLQ12R")||cpuis("MK02*")||cpuis("MK22FN1M0AVLK12")||cpuis("MK22FX512AVLK12")||cpuis("MK22FN1M0VLK10")||cpuis("MK22FN1M0AVLL12")||cpuis("MK22FX512AVLL12")||cpuis("MK22FN1M0VLL10")||cpuis("MK22FN1M0AVMC12")||cpuis("MK22FX512AVMC12")||cpuis("MK22FN1M0AVLQ12")||cpuis("MK22FN1M0AVMD12")||cpuis("MK22FX512AVLQ12")||cpuis("MK22FX512AVMD12")||cpuis("MK22FN1M0VLQ10")||cpuis("MK22FX512AVLH12")||cpuis("MK22FN1M0AVLH12")||cpuis("MK22FN1M0VLH10")||cpuis("MK20DX256VLQ10R")||cpuis("MK20FN1M0VLQ12R")||cpuis("MK20DX256VLK10R")||cpuis("MK20DX256VMC7R")||cpuis("MK20DX256VLK7R")||cpuis("MK21FX512VMD10")||cpuis("MK21FN1M0VMD10")||cpuis("MK21FN1M0VMC10")||cpuis("MK21FX512VMC10")||cpuis("MK8?FN256V*")||cpuis("MK11DN512AVLK5*")||cpuis("MK11DN512VLK5*")||cpuis("MK30DX256VLL7*")||cpuis("MK70*")||cpuis("MK20DX64VEX7")||cpuis("MK20DX128VEX7")||cpuis("MK20DX256VEX7")||cpuis("MK60DN512VMC10R")||cpuis("MK63FN1M0VLQ12R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK28FN2M0CAU15R")||cpuis("MK28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")||cpuis("MK27FN2M0VMI15")||cpuis("KK26FN2M0CAC18R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22FN1M0VLK12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLQ12R")||cpuis("MK22FX512VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VDC12R")||cpuis("MK22FN512VFX12")||cpuis("MK22FN512VFX12R")||cpuis("MK22FN512VLH12R")||cpuis("MK22FN1M0VMC12R")||cpuis("MK22FX512VMC12R")||cpuis("MK22FN128VLH10R")||cpuis("MK21DN512AVMC5R")||cpuis("MK21DX256AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK20DN512VLK10R")||cpuis("MK63FN1M0VLQ12R")||cpuis("MK65FN2M0VMI18R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK66FN2M0VLQ18R")||cpuis("MK60DN512VMC10R")||cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")
|
|
bitfld.long 0x00 2. " CHN ,Chain mode" "Not chained,Chained"
|
|
newline
|
|
endif
|
|
endif
|
|
bitfld.long 0x00 1. " TIE ,Timer interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TEN ,Timer enable" "Disabled,Enabled"
|
|
group.long (0x120+0x0C)++0x03
|
|
line.long 0x00 "TFLG2,PIT2 Timer Flag Register"
|
|
eventfld.long 0x00 0. " TIF ,Timer interrupt flag" "Not occurred,Occurred"
|
|
group.long 0x130++0x03 "PIT 3 Registers"
|
|
line.long 0x00 "LDVAL3,PIT3 Timer Load Value Register"
|
|
rgroup.long (0x130+0x4)++0x03
|
|
line.long 0x00 "CVAL3,PIT3 Current Timer Value Register"
|
|
group.long (0x130+0x08)++0x03
|
|
line.long 0x00 "TCTRL3,PIT3 Timer Control Register"
|
|
sif !cpuis("MK?0F*")&&!cpuis("MK?0D*5")&&!cpuis("MK?0DN*AB10")&&!cpuis("MK20DN512*AB10R")&&!cpuis("KK20DN512ZCAB10R")&&!cpuis("MK20DN512ZVLL10")&&!cpuis("MK20DX256ZVLL10")&&!cpuis("MK20DN512ZVLQ10")&&!cpuis("MK20DN512ZVLQ10R")&&!cpuis("MK20DN512ZVMD10")&&!cpuis("MK20DX128ZVLQ10")&&!cpuis("MK20DX256ZVLQ10")&&!cpuis("MK20DX256ZVLQ10R")&&!cpuis("MK20DX256ZVMD10")&&!cpuis("MK20DN512ZVLK10")&&!cpuis("MK20DX256ZVLK10")&&!cpuis("MK20DN512ZVMC10")&&!cpuis("MK20DN512ZVMC10R")
|
|
sif cpuis("MK20FN1M0VLQ12R")||cpuis("MK02*")||cpuis("MK22FN1M0AVLK12")||cpuis("MK22FX512AVLK12")||cpuis("MK22FN1M0VLK10")||cpuis("MK22FN1M0AVLL12")||cpuis("MK22FX512AVLL12")||cpuis("MK22FN1M0VLL10")||cpuis("MK22FN1M0AVMC12")||cpuis("MK22FX512AVMC12")||cpuis("MK22FN1M0AVLQ12")||cpuis("MK22FN1M0AVMD12")||cpuis("MK22FX512AVLQ12")||cpuis("MK22FX512AVMD12")||cpuis("MK22FN1M0VLQ10")||cpuis("MK22FX512AVLH12")||cpuis("MK22FN1M0AVLH12")||cpuis("MK22FN1M0VLH10")||cpuis("MK20DX256VLQ10R")||cpuis("MK20FN1M0VLQ12R")||cpuis("MK20DX256VLK10R")||cpuis("MK20DX256VMC7R")||cpuis("MK20DX256VLK7R")||cpuis("MK21FX512VMD10")||cpuis("MK21FN1M0VMD10")||cpuis("MK21FN1M0VMC10")||cpuis("MK21FX512VMC10")||cpuis("MK8?FN256V*")||cpuis("MK11DN512AVLK5*")||cpuis("MK11DN512VLK5*")||cpuis("MK30DX256VLL7*")||cpuis("MK70*")||cpuis("MK20DX64VEX7")||cpuis("MK20DX128VEX7")||cpuis("MK20DX256VEX7")||cpuis("MK60DN512VMC10R")||cpuis("MK63FN1M0VLQ12R")||cpuis("MK65FN2M0VMI18R")||cpuis("MK66FN2M0VLQ18R")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK28FN2M0CAU15R")||cpuis("MK28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")||cpuis("MK27FN2M0VMI15")||cpuis("KK26FN2M0CAC18R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22FN1M0VLK12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLQ12R")||cpuis("MK22FX512VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VDC12R")||cpuis("MK22FN512VFX12")||cpuis("MK22FN512VFX12R")||cpuis("MK22FN512VLH12R")||cpuis("MK22FN1M0VMC12R")||cpuis("MK22FX512VMC12R")||cpuis("MK22FN128VLH10R")||cpuis("MK21DN512AVMC5R")||cpuis("MK21DX256AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK20DN512VLK10R")||cpuis("MK63FN1M0VLQ12R")||cpuis("MK65FN2M0VMI18R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK66FN2M0VLQ18R")||cpuis("MK60DN512VMC10R")||cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLL10")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("KK60FN1M0VLQ15")
|
|
bitfld.long 0x00 2. " CHN ,Chain mode" "Not chained,Chained"
|
|
newline
|
|
endif
|
|
endif
|
|
bitfld.long 0x00 1. " TIE ,Timer interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TEN ,Timer enable" "Disabled,Enabled"
|
|
group.long (0x130+0x0C)++0x03
|
|
line.long 0x00 "TFLG3,PIT3 Timer Flag Register"
|
|
eventfld.long 0x00 0. " TIF ,Timer interrupt flag" "Not occurred,Occurred"
|
|
width 0x0B
|
|
tree.end
|
|
tree "LPT (Low Power Timer)"
|
|
base ad:0x40040000
|
|
width 5.
|
|
sif cpuis("MK11D*")||cpuis("MK63*")||cpuis("MK64*")||cpuis("MK02*")||cpuis("MK65*")||cpuis("MK66*")||cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("MK20DX256VLK10R")||cpuis("MK20FN1M0VLQ12R")||cpuis("MK20DX256VLQ10R")||cpuis("MK20DX256VMC7R")||cpuis("MK20DX256VLK7R")||cpuis("MK21FX512VMD10")||cpuis("MK21FN1M0VMD10")||cpuis("MK21FN1M0VMC10")||cpuis("MK21FX512VMC10")||cpuis("MK22FN1M0AVLK12")||cpuis("MK22FX512AVLK12")||cpuis("MK22FN1M0VLK10")||cpuis("MK22FN1M0AVLL12")||cpuis("MK22FX512AVLL12")||cpuis("MK22FN1M0VLL10")||cpuis("MK22FN1M0AVMC12")||cpuis("MK22FX512AVMC12")||cpuis("MK22FN1M0AVLQ12")||cpuis("MK22FN1M0AVMD12")||cpuis("MK22FX512AVLQ12")||cpuis("MK22FX512AVMD12")||cpuis("MK22FN1M0VLQ10")||cpuis("MK22FX512AVLH12")||cpuis("MK22FN1M0AVLH12")||cpuis("MK22FN1M0VLH10")||cpuis("MK10DN512ZVLK10*")||cpuis("MK10DN512ZVLL10*")||cpuis("MK10DN512ZVMC10")||cpuis("MK10DN512ZVLQ10")||cpuis("MK10DN512ZVMD10")||cpuis("MK10DX256ZVLQ10*")||cpuis("MK10DX256ZVMD10")||cpuis("MK30DN512ZVLK10")||cpuis("MK30D????ZVLQ*")||cpuis("MK30DX256VLL7*")||cpuis("MK70*")||cpuis("MK40D*Z*10")||cpuis("MK22FN1M0VMC10")||cpuis("MK22FN512VMP12")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VLH12")||cpuis("MK22FN512VDC12")||cpuis("MK22FN512CBP12R")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256CAH12R")||cpuis("MK20DN32VEX5")||cpuis("MK20DN64VEX5")||cpuis("MK20DN128VEX5")||cpuis("MK20DX32VEX5")||cpuis("MK20DX64VEX5")||cpuis("MK20DX128VEX5")||cpuis("MK20DX64VEX7")||cpuis("MK20DX128VEX7")||cpuis("MK20DX256VEX7")||cpuis("MK60DN512VMC10R")||cpuis("MK60DN512ZCAB10R")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("KK28FN2M0CAU15R")||cpuis("MK28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")||cpuis("MK27FN2M0VMI15")||cpuis("KK26FN2M0CAC18R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22FN1M0VLK12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLQ12R")||cpuis("MK22FX512VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VDC12R")||cpuis("MK22FN512VFX12")||cpuis("MK22FN512VFX12R")||cpuis("MK22FN512VLH12R")||cpuis("MK22FN1M0VMC12R")||cpuis("MK22FX512VMC12R")||cpuis("MK22FN128VLH10R")||cpuis("MK21DN512AVMC5R")||cpuis("MK21DX256AVMC5R")||cpuis("MK21FN1M0AVMC12R")||cpuis("MK20DN512VLK10R")||cpuis("MK20DN512ZVLK10")||cpuis("MK20DX256ZVLK10")||cpuis("MK20DN512ZVLQ10")||cpuis("MK20DN512ZVLQ10R")||cpuis("MK20DN512ZVMD10")||cpuis("MK20DX128ZVLQ10")||cpuis("MK20DX256ZVLQ10")||cpuis("MK20DX256ZVLQ10R")||cpuis("MK20DX256ZVMD10")||cpuis("MK20DN512ZVMC10")||cpuis("MK20DN512ZVMC10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK20DN512ZVLL10")||cpuis("MK20DX256ZVLL10")||cpuis("MK50DN512ZCLL10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DX256ZCLQ10")||cpuis("MK51DN512ZCLL10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")||cpuis("MK60DX256ZVLL10")||cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN512ZVMC10")||cpuis("KK60FN1M0VLQ15")||cpuis("KK60DN512ZCAB10R")||cpuis("KK65FN2M0CAC18R")
|
|
if (((per.l(ad:0x40040000+0x00))&0x01)==0x01)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CSR,Low Power Timer Control Status Register"
|
|
eventfld.long 0x00 7. " TCF ,Timer compare flag" "Not equaled,Equaled"
|
|
bitfld.long 0x00 6. " TIE ,Timer interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
sif cpuis("MK20DX256VLK10R")||cpuis("MK20FN1M0VLQ12R")||cpuis("MK20DX256VLQ10R")||cpuis("MK20DX256VMC7R")||cpuis("MK20DX256VLK7R")||cpuis("MK21FX512VMD10")||cpuis("MK21FN1M0VMD10")||cpuis("MK22FN1M0VMC10")||cpuis("MK22FN1M0VLQ10")||cpuis("MK22FN1M0VLL10")||cpuis("MK22FN1M0VLK10")||cpuis("MK22FN1M0VLH10")||cpuis("MK22FX512AVMD12")||cpuis("MK22FX512AVMC12")||cpuis("MK22FX512AVLQ12")||cpuis("MK22FX512AVLL12")||cpuis("MK22FX512AVLK12")||cpuis("MK22FX512AVLH12")||cpuis("MK22FN512VMP12")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VLH12")||cpuis("MK22FN512VDC12")||cpuis("MK22FN512CBP12R")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN1M0AVMD12")||cpuis("MK22FN1M0AVMC12")||cpuis("MK22FN1M0AVLQ12")||cpuis("MK22FN1M0AVLL12")||cpuis("MK22FN1M0AVLK12")||cpuis("MK22FN1M0AVLH12")||cpuis("MK20DN32VEX5")||cpuis("MK20DN64VEX5")||cpuis("MK20DN128VEX5")||cpuis("MK20DX32VEX5")||cpuis("MK20DX64VEX5")||cpuis("MK20DX128VEX5")||cpuis("MK20DX64VEX7")||cpuis("MK20DX128VEX7")||cpuis("MK20DX256VEX7")||(cpuis("MK40DN512ZVLQ10"))||(cpuis("MK40DN512ZVMD10"))||(cpuis("MK40DX128ZVLQ10"))||(cpuis("MK40DX256ZVLQ10"))||(cpuis("MK40DX256ZVMD10"))||(cpuis("MK40DN512ZVLL10"))||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22FN1M0VLK12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLQ12R")||cpuis("MK22FX512VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VDC12R")||cpuis("MK22FN512VFX12")||cpuis("MK22FN512VFX12R")||cpuis("MK22FN512VLH12R")||cpuis("MK22FN1M0VMC12R")||cpuis("MK22FX512VMC12R")||cpuis("MK22FN128VLH10R")||cpuis("MK20DN512VLK10R")||cpuis("MK20DN512ZVLK10")||cpuis("MK20DX256ZVLK10")||cpuis("MK20DN512ZVLQ10")||cpuis("MK20DN512ZVLQ10R")||cpuis("MK20DN512ZVMD10")||cpuis("MK20DX128ZVLQ10")||cpuis("MK20DX256ZVLQ10")||cpuis("MK20DX256ZVLQ10R")||cpuis("MK20DX256ZVMD10")||cpuis("MK20DN512ZVMC10")||cpuis("MK20DN512ZVMC10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK20DN512ZVLL10")||cpuis("MK20DX256ZVLL10")||cpuis("MK50DN512ZCLL10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DX256ZCLQ10")||cpuis("MK51DN512ZCLL10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")||cpuis("MK66FN2M0VLQ18R")||cpuis("MK60DX256ZVLL10")||cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN512ZVMC10")||cpuis("KK60FN1M0VLQ15")||cpuis("KK60DN512ZCAB10R")||cpuis("MK63FN1M0VLQ12R")
|
|
rbitfld.long 0x00 4.--5. " TPS ,Timer pin select" "CMP 0 output,LPTMR_ALT1 pin,LPTMR_ALT2 pin,?..."
|
|
else
|
|
rbitfld.long 0x00 4.--5. " TPS ,Timer pin select" "CMP 0 output,LPTMR_ALT1 pin,LPTMR_ALT2 pin,LPTMR_ALT3 pin"
|
|
endif
|
|
newline
|
|
rbitfld.long 0x00 3. " TPP ,Timer pin polarity" "Active high,Active low"
|
|
rbitfld.long 0x00 2. " TFC ,Timer free running counter" "Reset on TCF set,Reset on overflow"
|
|
rbitfld.long 0x00 1. " TMS ,Timer mode select" "Time counter,Pulse counter"
|
|
newline
|
|
bitfld.long 0x00 0. " TEN ,Timer enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CSR,Low Power Timer Control Status Register"
|
|
eventfld.long 0x00 7. " TCF ,Timer compare flag" "Not equaled,Equaled"
|
|
bitfld.long 0x00 6. " TIE ,Timer interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
sif cpuis("MK20DX256VLK10R")||cpuis("MK20FN1M0VLQ12R")||cpuis("MK20DX256VLQ10R")||cpuis("MK20DX256VMC7R")||cpuis("MK20DX256VLK7R")||cpuis("MK21FX512VMD10")||cpuis("MK21FN1M0VMD10")||cpuis("MK22FN1M0VMC10")||cpuis("MK22FN1M0VLQ10")||cpuis("MK22FN1M0VLL10")||cpuis("MK22FN1M0VLK10")||cpuis("MK22FN1M0VLH10")||cpuis("MK22FX512AVMD12")||cpuis("MK22FX512AVMC12")||cpuis("MK22FX512AVLQ12")||cpuis("MK22FX512AVLL12")||cpuis("MK22FX512AVLK12")||cpuis("MK22FX512AVLH12")||cpuis("MK22FN512VMP12")||cpuis("MK22FN512VLL12")||cpuis("MK22FN512VLH12")||cpuis("MK22FN512VDC12")||cpuis("MK22FN512CBP12R")||cpuis("MK22FN512CAP12R")||cpuis("MK22FN256VMP12")||cpuis("MK22FN256CAP12R")||cpuis("MK22FN256CAH12R")||cpuis("MK22FN1M0AVMD12")||cpuis("MK22FN1M0AVMC12")||cpuis("MK22FN1M0AVLQ12")||cpuis("MK22FN1M0AVLL12")||cpuis("MK22FN1M0AVLK12")||cpuis("MK22FN1M0AVLH12")||(cpuis("MK40DN512ZVLQ10"))||(cpuis("MK40DN512ZVMD10"))||(cpuis("MK40DX128ZVLQ10"))||(cpuis("MK40DX256ZVLQ10"))||(cpuis("MK40DX256ZVMD10"))||(cpuis("MK40DN512ZVLL10"))||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22FN1M0VLK12R")||cpuis("MK22FX512AVLH12R")||cpuis("MK22FN1M0VLQ12R")||cpuis("MK22FX512VLQ12R")||cpuis("MK22FX512VMD12R")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VDC12R")||cpuis("MK22FN512VFX12")||cpuis("MK22FN512VFX12R")||cpuis("MK22FN512VLH12R")||cpuis("MK22FN1M0VMC12R")||cpuis("MK22FX512VMC12R")||cpuis("MK22FN128VLH10R")||cpuis("MK20DN512VLK10R")||cpuis("MK20DN512ZVLK10")||cpuis("MK20DX256ZVLK10")||cpuis("MK20DN512ZVLQ10")||cpuis("MK20DN512ZVLQ10R")||cpuis("MK20DN512ZVMD10")||cpuis("MK20DX128ZVLQ10")||cpuis("MK20DX256ZVLQ10")||cpuis("MK20DX256ZVLQ10R")||cpuis("MK20DX256ZVMD10")||cpuis("MK20DN512ZVMC10")||cpuis("MK20DN512ZVMC10R")||cpuis("KK20DN512ZCAB10R")||cpuis("MK20DN512ZVLL10")||cpuis("MK20DX256ZVLL10")||cpuis("MK50DN512ZCLL10")||cpuis("MK50DX256ZCLL10")||cpuis("MK50DN512ZCLQ10")||cpuis("MK50DX256ZCLQ10")||cpuis("MK51DN512ZCLL10")||cpuis("MK51DN512ZCMC10")||cpuis("MK51DX256ZCMC10")||cpuis("MK51DN256ZCMD10")||cpuis("MK51DN512ZCLQ10")||cpuis("MK52DN512ZCLQ10")||cpuis("MK52DN512ZCMD10")||cpuis("MK53DN512ZCLQ10")||cpuis("MK53DN512ZCMD10")||cpuis("MK53DX256ZCLQ10")||cpuis("MK66FN2M0VLQ18R")||cpuis("MK60DX256ZVLL10")||cpuis("MK60DN512ZVLL10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DN512VMC10R")||cpuis("MK60DX256ZVMC10")||cpuis("MK60DN512ZVMC10")||cpuis("KK60FN1M0VLQ15")||cpuis("KK60DN512ZCAB10R")||cpuis("MK63FN1M0VLQ12R")
|
|
bitfld.long 0x00 4.--5. " TPS ,Timer pin select" "CMP 0 output,LPTMR_ALT1 pin,LPTMR_ALT2 pin,?..."
|
|
elif cpuis("MK8?FN256V*")||cpuis("MK40D*Z*10")||cpuis("MK21FX512VMC10")||cpuis("MK21FN1M0VMC10")||cpuis("MK65FN2M0VMI18R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK10DN512ZV??10*")||cpuis("MK10DX256ZV??10*")||cpuis("MK11DN512AVLK5*")||cpuis("MK11DN512VLK5*")||cpuis("KK65FN2M0CAC18R")
|
|
bitfld.long 0x00 4.--5. " TPS ,Timer pin select" "CMP 0 output,LPTMR_ALT1 pin,LPTMR_ALT2 pin,LPTMR_ALT3 pin"
|
|
else
|
|
rbitfld.long 0x00 4.--5. " TPS ,Timer pin select" "CMP 0 output,LPTMR_ALT1 pin,LPTMR_ALT2 pin,LPTMR_ALT3 pin"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 3. " TPP ,Timer pin polarity" "Active high,Active low"
|
|
bitfld.long 0x00 2. " TFC ,Timer free running counter" "Reset on TCF set,Reset on overflow"
|
|
bitfld.long 0x00 1. " TMS ,Timer mode select" "Time counter,Pulse counter"
|
|
newline
|
|
bitfld.long 0x00 0. " TEN ,Timer enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CSR,Low Power Timer Control Status Register"
|
|
eventfld.long 0x00 7. " TCF ,Timer compare flag" "Not equaled,Equaled"
|
|
bitfld.long 0x00 6. " TIE ,Timer interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " TPS ,Timer pin select" "Input 0,Input 1,Input 2,Input 3"
|
|
newline
|
|
bitfld.long 0x00 3. " TPP ,Timer pin polarity" "Active high,Active low"
|
|
bitfld.long 0x00 2. " TFC ,Timer free running counter" "Reset on TCF set,Reset on overflow"
|
|
bitfld.long 0x00 1. " TMS ,Timer mode select" "Time counter,Pulse counter"
|
|
newline
|
|
bitfld.long 0x00 0. " TEN ,Timer enable" "Disabled,Enabled"
|
|
endif
|
|
if ((per.l(ad:0x40040000)&0x02)==0x00)
|
|
if (((per.l(ad:0x40040000+0x00))&0x01)==0x01)
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "PSR,Low Power Timer Prescale Register"
|
|
bitfld.long 0x00 3.--6. " PRESCALE ,Prescale value" "/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,/2048,/4096,/8192,/16384,/32768,/65536"
|
|
bitfld.long 0x00 2. " PBYP ,Prescaler bypass" "Not bypassed,Bypassed"
|
|
bitfld.long 0x00 0.--1. " PCS ,Prescaler clock select" "MCGIRCLK,LPO 1kHz,ERCLK32K,OSCERCLK"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "PSR,Low Power Timer Prescale Register"
|
|
bitfld.long 0x00 3.--6. " PRESCALE ,Prescale value" "/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,/2048,/4096,/8192,/16384,/32768,/65536"
|
|
bitfld.long 0x00 2. " PBYP ,Prescaler bypass" "Not bypassed,Bypassed"
|
|
bitfld.long 0x00 0.--1. " PCS ,Prescaler clock select" "MCGIRCLK,LPO 1kHz,ERCLK32K,OSCERCLK"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40040000+0x00))&0x01)==0x01)
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "PSR,Low Power Timer Prescale Register"
|
|
bitfld.long 0x00 3.--6. " GFW ,Glitch filter width" ",2 clk edges,4 clk edges,8 clk edges,16 clk edges,32 clk edges,64 clk edges,128 clk edges,256 clk edges,512 clk edges,1024 clk edges,2048 clk edges,4096 clk edges,8192 clk edges,16384 clk edges,32768 clk edges"
|
|
bitfld.long 0x00 2. " PBYP ,Glitch filter bypass" "Not bypassed,Bypassed"
|
|
bitfld.long 0x00 0.--1. " PCS ,Prescaler clock select" "MCGIRCLK,LPO 1kHz,ERCLK32K,OSCERCLK"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "PSR,Low Power Timer Prescale Register"
|
|
bitfld.long 0x00 3.--6. " GFW ,Glitch filter width" ",2 clk edges,4 clk edges,8 clk edges,16 clk edges,32 clk edges,64 clk edges,128 clk edges,256 clk edges,512 clk edges,1024 clk edges,2048 clk edges,4096 clk edges,8192 clk edges,16384 clk edges,32768 clk edges"
|
|
bitfld.long 0x00 2. " PBYP ,Glitch filter bypass" "Not bypassed,Bypassed"
|
|
bitfld.long 0x00 0.--1. " PCS ,Prescaler clock select" "MCGIRCLK,LPO 1kHz,ERCLK32K,OSCERCLK"
|
|
endif
|
|
endif
|
|
sif cpuis("MK84FN2M0CAU15R")
|
|
if (((per.l(ad:0x40040000+0x00))&0x81)==0x80)
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "CMR,Low Power Timer Compare Register"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CMR,Low Power Timer Compare Register"
|
|
endif
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "CNR,Low Power Timer Counter Register"
|
|
elif cpuis("KK28FN2M0CAU15R")||cpuis("MK28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")||cpuis("MK27FN2M0VMI15")
|
|
if (((per.l(ad:0x40040000+0x00))&0x81)==0x80)
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "CMR,Low Power Timer Compare Register"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CMR,Low Power Timer Compare Register"
|
|
endif
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CNR,Low Power Timer Counter Register"
|
|
elif cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("MK22FN512VDC12R")||cpuis("MK22FN512VFX12")||cpuis("MK22FN512VFX12R")||cpuis("MK22FN512VLH12R")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("MK22FN256VLL12R")||cpuis("KK26FN2M0CAC18R")||cpuis("MK22FN1M0AVLK12R")||cpuis("MK22FN128VLH10R")||cpuis("MK22FX512AVLH12R")||cpuis("MKS20FN128VFT12")||cpuis("MKS20FN128VLH12")||cpuis("MKS20FN128VLL12")||cpuis("MKS20FN256VFT12")||cpuis("MKS20FN256VLH12")||cpuis("MKS20FN256VLL12")||cpuis("MKS22FN128VFT12")||cpuis("MKS22FN128VLH12")||cpuis("MKS22FN128VLL12")||cpuis("MKS22FN256VFT12")||cpuis("MKS22FN256VLH12")||cpuis("MKS22FN256VLL12")||cpuis("MK63FN1M0VLQ12R")||cpuis("MK65FN2M0VMI18R")||cpuis("KK65FN2M0CAC18R")||cpuis("MK66FN2M0VLQ18R")||cpuis("KK60FN1M0VLQ15")
|
|
if (((per.l(ad:0x40040000+0x00))&0x81)==0x80)
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "CMR,Low Power Timer Compare Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " COMPARE ,Compare value"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CMR,Low Power Timer Compare Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " COMPARE ,Compare value"
|
|
endif
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CNR,Low Power Timer Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Counter value"
|
|
else
|
|
if (((per.l(ad:0x40040000+0x00))&0x81)==0x80)
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "CMR,Low Power Timer Compare Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " COMPARE ,Compare value"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CMR,Low Power Timer Compare Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " COMPARE ,Compare value"
|
|
endif
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "CNR,Low Power Timer Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Counter value"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "Communication Interfaces"
|
|
tree.open "SPI (Serial Peripheral Interface)"
|
|
tree "SPI 0"
|
|
base ad:0x4002C000
|
|
width 18.
|
|
sif (cpuis("MK11D????AVLK5")||cpuis("MK11D????AVMC5")||cpuis("MK11D????VLK5")||cpuis("MK11D????VMC5")||cpuis("MK11DN512VLK5R")||cpuis("MK11DN512AVLK5R"))
|
|
if (((per.l(ad:0x4002c000+0x2C))&0x40000000)==0x0)
|
|
if (((per.l(ad:0x4002c000))&0x80000000)==0x0)&&(((per.l(ad:0x4002c000+0xC))&0x2000000)==0x0)||(((per.l(ad:0x4002c000))&0x80000000)==0x80000000)&&(((per.l(ad:0x4002c000+0x10))&0x2000000)==0x0)||(((per.l(ad:0x4002c000))&0x80000000)==0x80000000)&&(((per.l(ad:0x4002c000+0xC))&0x2000000)==0x0)
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "MCR,DSPI0 Module Configuration Register"
|
|
bitfld.long 0x00 31. " MSTR ,Master/Slave mode select" "Slave,Master"
|
|
bitfld.long 0x00 30. " CONT_SCKE ,Continuous SCK enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 28.--29. " DCONF ,DSPI0 configuration" "SPI,?..."
|
|
bitfld.long 0x00 27. " FRZ ,Freeze serial transfers" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 26. " MTFE ,Modified timing format enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " ROOE ,Receive FIFO overflow overwrite enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " PCSIS4 ,Peripheral chip select 4 inactive state" "Low,High"
|
|
bitfld.long 0x00 19. " PCSIS3 ,Peripheral chip select 3 inactive state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 18. " PCSIS2 ,Peripheral chip select 2 inactive state" "Low,High"
|
|
bitfld.long 0x00 17. " PCSIS1 ,Peripheral chip select 1 inactive state" "Low,High"
|
|
bitfld.long 0x00 16. " PCSIS0 ,Peripheral chip select 0 inactive state" "Low,High"
|
|
bitfld.long 0x00 15. " DOZE ,Doze enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " MDIS ,Module disable" "No,Yes"
|
|
bitfld.long 0x00 13. " DIS_TXF ,Disable transmit FIFO" "No,Yes"
|
|
bitfld.long 0x00 12. " DIS_RXF ,Disable receive FIFO" "No,Yes"
|
|
bitfld.long 0x00 11. " CLR_TXF ,Clear TX FIFO" ",Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CLR_RXF ,Clear RX FIFO" ",Cleared"
|
|
bitfld.long 0x00 8.--9. " SMPL_PT ,Sample point" "0,1,2,?..."
|
|
bitfld.long 0x00 0. " HALT ,Halt DSPI transfers" "Started,Stopped"
|
|
else
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "MCR,DSPI0 Module Configuration Register"
|
|
bitfld.long 0x00 31. " MSTR ,Master/Slave mode select" "Slave,Master"
|
|
bitfld.long 0x00 30. " CONT_SCKE ,Continuous SCK enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 28.--29. " DCONF ,DSPI0 configuration" "SPI,?..."
|
|
bitfld.long 0x00 27. " FRZ ,Freeze serial transfers" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 26. " MTFE ,Modified timing format enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " ROOE ,Receive FIFO overflow overwrite enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " PCSIS4 ,Peripheral chip select 4 inactive state" "Low,High"
|
|
bitfld.long 0x00 19. " PCSIS3 ,Peripheral chip select 3 inactive state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 18. " PCSIS2 ,Peripheral chip select 2 inactive state" "Low,High"
|
|
bitfld.long 0x00 17. " PCSIS1 ,Peripheral chip select 1 inactive state" "Low,High"
|
|
bitfld.long 0x00 16. " PCSIS0 ,Peripheral chip select 0 inactive state" "Low,High"
|
|
bitfld.long 0x00 15. " DOZE ,Doze enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " MDIS ,Module disable" "No,Yes"
|
|
bitfld.long 0x00 13. " DIS_TXF ,Disable transmit FIFO" "No,Yes"
|
|
bitfld.long 0x00 12. " DIS_RXF ,Disable receive FIFO" "No,Yes"
|
|
bitfld.long 0x00 11. " CLR_TXF ,Clear TX FIFO" ",Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CLR_RXF ,Clear RX FIFO" ",Cleared"
|
|
bitfld.long 0x00 0. " HALT ,Halt DSPI transfers" "Started,Stopped"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x4002c000))&0x80000000)==0x0)&&(((per.l(ad:0x4002c000+0xC))&0x2000000)==0x0)||(((per.l(ad:0x4002c000))&0x80000000)==0x80000000)&&(((per.l(ad:0x4002c000+0x10))&0x2000000)==0x0)||(((per.l(ad:0x4002c000))&0x80000000)==0x80000000)&&(((per.l(ad:0x4002c000+0xC))&0x2000000)==0x0)
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "MCR,DSPI0 Module Configuration Register"
|
|
rbitfld.long 0x00 31. " MSTR ,Master/Slave mode select" "Slave,Master"
|
|
rbitfld.long 0x00 30. " CONT_SCKE ,Continuous SCK enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 28.--29. " DCONF ,DSPI0 configuration" "SPI,?..."
|
|
rbitfld.long 0x00 27. " FRZ ,Freeze serial transfers" "Not halted,Halted"
|
|
textline " "
|
|
rbitfld.long 0x00 26. " MTFE ,Modified timing format enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 24. " ROOE ,Receive FIFO overflow overwrite enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 20. " PCSIS4 ,Peripheral chip select 4 inactive state" "Low,High"
|
|
rbitfld.long 0x00 19. " PCSIS3 ,Peripheral chip select 3 inactive state" "Low,High"
|
|
textline " "
|
|
rbitfld.long 0x00 18. " PCSIS2 ,Peripheral chip select 2 inactive state" "Low,High"
|
|
rbitfld.long 0x00 17. " PCSIS1 ,Peripheral chip select 1 inactive state" "Low,High"
|
|
rbitfld.long 0x00 16. " PCSIS0 ,Peripheral chip select 0 inactive state" "Low,High"
|
|
rbitfld.long 0x00 15. " DOZE ,Doze enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " MDIS ,Module disable" "No,Yes"
|
|
rbitfld.long 0x00 13. " DIS_TXF ,Disable transmit FIFO" "No,Yes"
|
|
rbitfld.long 0x00 12. " DIS_RXF ,Disable receive FIFO" "No,Yes"
|
|
rbitfld.long 0x00 11. " CLR_TXF ,Clear TX FIFO" ",Cleared"
|
|
textline " "
|
|
rbitfld.long 0x00 10. " CLR_RXF ,Clear RX FIFO" ",Cleared"
|
|
rbitfld.long 0x00 8.--9. " SMPL_PT ,Sample point" "0,1,2,?..."
|
|
bitfld.long 0x00 0. " HALT ,Halt DSPI transfers" "Started,Stopped"
|
|
else
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "MCR,DSPI0 Module Configuration Register"
|
|
rbitfld.long 0x00 31. " MSTR ,Master/Slave mode select" "Slave,Master"
|
|
rbitfld.long 0x00 30. " CONT_SCKE ,Continuous SCK enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 28.--29. " DCONF ,DSPI0 configuration" "SPI,?..."
|
|
rbitfld.long 0x00 27. " FRZ ,Freeze serial transfers" "Not halted,Halted"
|
|
textline " "
|
|
rbitfld.long 0x00 26. " MTFE ,Modified timing format enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 24. " ROOE ,Receive FIFO overflow overwrite enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 20. " PCSIS4 ,Peripheral chip select 4 inactive state" "Low,High"
|
|
rbitfld.long 0x00 19. " PCSIS3 ,Peripheral chip select 3 inactive state" "Low,High"
|
|
textline " "
|
|
rbitfld.long 0x00 18. " PCSIS2 ,Peripheral chip select 2 inactive state" "Low,High"
|
|
rbitfld.long 0x00 17. " PCSIS1 ,Peripheral chip select 1 inactive state" "Low,High"
|
|
rbitfld.long 0x00 16. " PCSIS0 ,Peripheral chip select 0 inactive state" "Low,High"
|
|
rbitfld.long 0x00 15. " DOZE ,Doze enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " MDIS ,Module disable" "No,Yes"
|
|
rbitfld.long 0x00 13. " DIS_TXF ,Disable transmit FIFO" "No,Yes"
|
|
rbitfld.long 0x00 12. " DIS_RXF ,Disable receive FIFO" "No,Yes"
|
|
rbitfld.long 0x00 11. " CLR_TXF ,Clear TX FIFO" ",Cleared"
|
|
textline " "
|
|
rbitfld.long 0x00 10. " CLR_RXF ,Clear RX FIFO" ",Cleared"
|
|
bitfld.long 0x00 0. " HALT ,Halt DSPI transfers" "Started,Stopped"
|
|
endif
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x4002c000+0x0C))&0x2000000)==0x0)&&(((per.l(ad:0x4002c000+0x10))&0x2000000)==0x0)
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "MCR,DSPI0 Module Configuration Register"
|
|
bitfld.long 0x00 31. " MSTR ,Master/Slave mode select" "Slave,Master"
|
|
bitfld.long 0x00 30. " CONT_SCKE ,Continuous SCK enable" "Disabled,Enabled"
|
|
sif cpuis("MK10DN512ZVLK10*")||cpuis("MK10DN512ZVLL10*")||cpuis("MK10DN512ZVLQ10*")||cpuis("MK10DN512ZVMD10*")||cpuis("MK10DN512ZVMC10*")||cpuis("MK10DX256ZVLQ10*")||cpuis("MK10DX256ZVMD10*")
|
|
bitfld.long 0x00 28.--29. " DCONF ,DSPI0 configuration" "SPI,?..."
|
|
else
|
|
rbitfld.long 0x00 28.--29. " DCONF ,DSPI0 configuration" "SPI,?..."
|
|
endif
|
|
bitfld.long 0x00 27. " FRZ ,Freeze serial transfers" "Not halted,Halted"
|
|
textline " "
|
|
sif cpuis("MK10DN512ZVLK10*")||cpuis("MK10DN512ZVLL10*")||cpuis("MK10DN512ZVLQ10*")||cpuis("MK10DN512ZVMD10*")||cpuis("MK10DN512ZVMC10*")||cpuis("MK10DX256ZVLQ10*")||cpuis("MK10DX256ZVMD10*")
|
|
bitfld.long 0x00 26. " MTFE ,Modified timing format enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " PCSSE ,Peripheral chip select strobe enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " ROOE ,Receive FIFO overflow overwrite enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " PCSIS5 ,Peripheral chip select 5 inactive state" "Low,High"
|
|
bitfld.long 0x00 20. " PCSIS4 ,Peripheral chip select 4 inactive state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PCSIS3 ,Peripheral chip select 3 inactive state" "Low,High"
|
|
bitfld.long 0x00 18. " PCSIS2 ,Peripheral chip select 2 inactive state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " PCSIS1 ,Peripheral chip select 1 inactive state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PCSIS0 ,Peripheral chip select 0 inactive state" "Low,High"
|
|
else
|
|
sif cpuis("MK1?F*")||cpuis("MK02*")
|
|
bitfld.long 0x00 26. " MTFE ,Modified timing format enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " PCSSE ,Peripheral chip select strobe enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " ROOE ,Receive FIFO overflow overwrite enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " PCSIS5 ,Peripheral chip select 5 inactive state" "Low,High"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x00 26. " MTFE ,Modified timing format enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " ROOE ,Receive FIFO overflow overwrite enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 20. " PCSIS4 ,Peripheral chip select 4 inactive state" "Low,High"
|
|
bitfld.long 0x00 19. " PCSIS3 ,Peripheral chip select 3 inactive state" "Low,High"
|
|
bitfld.long 0x00 18. " PCSIS2 ,Peripheral chip select 2 inactive state" "Low,High"
|
|
bitfld.long 0x00 17. " PCSIS1 ,Peripheral chip select 1 inactive state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PCSIS0 ,Peripheral chip select 0 inactive state" "Low,High"
|
|
bitfld.long 0x00 15. " DOZE ,Doze enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " MDIS ,Module disable" "No,Yes"
|
|
bitfld.long 0x00 13. " DIS_TXF ,Disable transmit FIFO" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DIS_RXF ,Disable receive FIFO" "No,Yes"
|
|
bitfld.long 0x00 11. " CLR_TXF ,Clear TX FIFO" "Not cleared,Cleared"
|
|
bitfld.long 0x00 10. " CLR_RXF ,Clear RX FIFO" "Not cleared,Cleared"
|
|
bitfld.long 0x00 8.--9. " SMPL_PT ,Sample point" "0,1,2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0. " HALT ,Halt DSPI transfers" "Started,Stopped"
|
|
endif
|
|
else
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "MCR,DSPI0 Module Configuration Register"
|
|
bitfld.long 0x00 31. " MSTR ,Master/Slave mode select" "Slave,Master"
|
|
bitfld.long 0x00 30. " CONT_SCKE ,Continuous SCK enable" "Disabled,Enabled"
|
|
sif cpuis("MK10DN512ZVLK10*")||cpuis("MK10DN512ZVLL10*")||cpuis("MK10DN512ZVLQ10*")||cpuis("MK10DN512ZVMD10*")||cpuis("MK10DN512ZVMC10*")||cpuis("MK10DX256ZVLQ10*")||cpuis("MK10DX256ZVMD10*")
|
|
bitfld.long 0x00 28.--29. " DCONF ,DSPI0 configuration" "SPI,?..."
|
|
else
|
|
rbitfld.long 0x00 28.--29. " DCONF ,DSPI0 configuration" "SPI,?..."
|
|
endif
|
|
bitfld.long 0x00 27. " FRZ ,Freeze serial transfers" "Not halted,Halted"
|
|
textline " "
|
|
sif cpuis("MK1?F*")||cpuis("MK02*")||cpuis("MK10DN512ZVLK10*")||cpuis("MK10DN512ZVLL10*")||cpuis("MK10DN512ZVLQ10*")||cpuis("MK10DN512ZVMD10*")||cpuis("MK10DN512ZVMC10*")||cpuis("MK10DX256ZVLQ10*")||cpuis("MK10DX256ZVMD10*")
|
|
bitfld.long 0x00 26. " MTFE ,Modified timing format enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " PCSSE ,Peripheral chip select strobe enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " ROOE ,Receive FIFO overflow overwrite enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " PCSIS5 ,Peripheral chip select 5 inactive state" "Low,High"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x00 26. " MTFE ,Modified timing format enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " ROOE ,Receive FIFO overflow overwrite enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 20. " PCSIS4 ,Peripheral chip select 4 inactive state" "Low,High"
|
|
bitfld.long 0x00 19. " PCSIS3 ,Peripheral chip select 3 inactive state" "Low,High"
|
|
bitfld.long 0x00 18. " PCSIS2 ,Peripheral chip select 2 inactive state" "Low,High"
|
|
bitfld.long 0x00 17. " PCSIS1 ,Peripheral chip select 1 inactive state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PCSIS0 ,Peripheral chip select 0 inactive state" "Low,High"
|
|
bitfld.long 0x00 15. " DOZE ,Doze enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " MDIS ,Module disable" "No,Yes"
|
|
bitfld.long 0x00 13. " DIS_TXF ,Disable transmit FIFO" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DIS_RXF ,Disable receive FIFO" "No,Yes"
|
|
bitfld.long 0x00 11. " CLR_TXF ,Clear TX FIFO" "Not cleared,Cleared"
|
|
bitfld.long 0x00 10. " CLR_RXF ,Clear RX FIFO" "Not cleared,Cleared"
|
|
bitfld.long 0x00 0. " HALT ,Halt DSPI transfers" "Started,Stopped"
|
|
endif
|
|
endif
|
|
textline ""
|
|
sif (cpuis("MK11D????AVLK5")||cpuis("MK02*")||cpuis("MK11D????AVMC5")||cpuis("MK11D????VLK5")||cpuis("MK11D????VMC5"))
|
|
if (((per.l(ad:0x4002c000+0x2C))&0x40000000)==0x0)
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "TCR,DSPI0 Transfer Count Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " SPI_TCNT ,SPI transfer counter"
|
|
else
|
|
rgroup.long 0x08++0x3
|
|
line.long 0x00 "TCR,DSPI0 Transfer Count Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " SPI_TCNT ,SPI transfer counter"
|
|
endif
|
|
else
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "TCR,DSPI0 Transfer Count Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " SPI_TCNT ,SPI transfer counter"
|
|
endif
|
|
sif (cpuis("MK11D????AVLK5")||cpuis("MK11D????AVMC5")||cpuis("MK11D????VLK5")||cpuis("MK11D????VMC5"))||cpuis("MK02*")
|
|
if (((per.l(ad:0x4002c000+0x2C))&0x40000000)==0x0)
|
|
if ((per.l(ad:0x4002c000)&0x80000000)==0x80000000)
|
|
group.long 0xC++0x3
|
|
line.long 0x00 "CTAR0,DSPI0 Clock and Transfer Attributes Register 0"
|
|
bitfld.long 0x00 31. " DBR ,Double baud rate" "Normal,Doubled"
|
|
bitfld.long 0x00 27.--30. " FMSZ ,Frame size" ",,,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x00 26. " CPOL ,Clock polarity" "Inactive low,Inactive high"
|
|
bitfld.long 0x00 25. " CPHA ,Clock phase" "Captured on leading edge,Captured on following edge"
|
|
textline " "
|
|
bitfld.long 0x00 24. " LSBFE ,LBS first" "MSB,LSB"
|
|
bitfld.long 0x00 22.--23. " PCSSCK ,PCS to SCK delay prescaler" "1,3,5,7"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " PASC ,After SCK delay prescaler" "1,3,5,7"
|
|
bitfld.long 0x00 18.--19. " PDT ,Delay after transfer prescaler" "1,3,5,7"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " PBR ,Baud rate prescaler" "2,3,5,7"
|
|
bitfld.long 0x00 12.--15. " CSSCK ,PCS to SCK delay scaler" "2,4,8,16,32,64,128,256,512,1k,2k,4k,8k,16k,32k,64k"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ASC ,After SCK delay scaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " DT ,Delay after transfer scaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " BR ,Baud rate scaler" "2,4,6,8,16,32,64,128,256,512,1k,2k,4k,8k,16k,32k"
|
|
else
|
|
group.long 0xC++0x3
|
|
line.long 0x00 "CTAR0,DSPI0 Clock and Transfer Attributes Register 0"
|
|
sif cpuis("MK02*")
|
|
bitfld.long 0x00 27.--30. " FMSZ ,Frame size" ",,,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
else
|
|
bitfld.long 0x00 27.--31. " FMSZ ,Frame size" ",,,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
endif
|
|
bitfld.long 0x00 26. " CPOL ,Clock polarity" "Inactive low,Inactive high"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CPHA ,Clock phase" "Captured on leading edge,Captured on following edge"
|
|
endif
|
|
else
|
|
if ((per.l(ad:0x4002c000)&0x80000000)==0x80000000)
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x00 "CTAR0,DSPI0 Clock and Transfer Attributes Register 0"
|
|
bitfld.long 0x00 31. " DBR ,Double baud rate" "Normal,Doubled"
|
|
bitfld.long 0x00 27.--30. " FMSZ ,Frame size" ",,,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x00 26. " CPOL ,Clock polarity" "Inactive low,Inactive high"
|
|
bitfld.long 0x00 25. " CPHA ,Clock phase" "Captured on leading edge,Captured on following edge"
|
|
textline " "
|
|
bitfld.long 0x00 24. " LSBFE ,LBS first" "MSB,LSB"
|
|
bitfld.long 0x00 22.--23. " PCSSCK ,PCS to SCK delay prescaler" "1,3,5,7"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " PASC ,After SCK delay prescaler" "1,3,5,7"
|
|
bitfld.long 0x00 18.--19. " PDT ,Delay after transfer prescaler" "1,3,5,7"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " PBR ,Baud rate prescaler" "2,3,5,7"
|
|
bitfld.long 0x00 12.--15. " CSSCK ,PCS to SCK delay scaler" "2,4,8,16,32,64,128,256,512,1k,2k,4k,8k,16k,32k,64k"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ASC ,After SCK delay scaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " DT ,Delay after transfer scaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " BR ,Baud rate scaler" "2,4,6,8,16,32,64,128,256,512,1k,2k,4k,8k,16k,32k"
|
|
else
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x00 "CTAR0,DSPI0 Clock and Transfer Attributes Register 0"
|
|
sif cpuis("MK02*")
|
|
bitfld.long 0x00 27.--30. " FMSZ ,Frame size" ",,,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
else
|
|
bitfld.long 0x00 27.--31. " FMSZ ,Frame size" ",,,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
endif
|
|
bitfld.long 0x00 26. " CPOL ,Clock polarity" "Inactive low,Inactive high"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CPHA ,Clock phase" "Captured on leading edge,Captured on following edge"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x4002c000+0x2C))&0x40000000)==0x0)
|
|
if ((per.l(ad:0x4002c000)&0x80000000)==0x80000000)
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "CTAR1,DSPI0 Clock and Transfer Attributes Register 1"
|
|
bitfld.long 0x00 31. " DBR ,Double baud rate" "Normal,Doubled"
|
|
bitfld.long 0x00 27.--30. " FMSZ ,Frame size" ",,,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x00 26. " CPOL ,Clock polarity" "Inactive low,Inactive high"
|
|
bitfld.long 0x00 25. " CPHA ,Clock phase" "Captured on leading edge,Captured on following edge"
|
|
textline " "
|
|
bitfld.long 0x00 24. " LSBFE ,LBS first" "MSB,LSB"
|
|
bitfld.long 0x00 22.--23. " PCSSCK ,PCS to SCK delay prescaler" "1,3,5,7"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " PASC ,After SCK delay prescaler" "1,3,5,7"
|
|
bitfld.long 0x00 18.--19. " PDT ,Delay after transfer prescaler" "1,3,5,7"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " PBR ,Baud rate prescaler" "2,3,5,7"
|
|
bitfld.long 0x00 12.--15. " CSSCK ,PCS to SCK delay scaler" "2,4,8,16,32,64,128,256,512,1k,2k,4k,8k,16k,32k,64k"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ASC ,After SCK delay scaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " DT ,Delay after transfer scaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " BR ,Baud rate scaler" "2,4,6,8,16,32,64,128,256,512,1k,2k,4k,8k,16k,32k"
|
|
else
|
|
endif
|
|
else
|
|
if ((per.l(ad:0x4002c000)&0x80000000)==0x80000000)
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x00 "CTAR1,DSPI0 Clock and Transfer Attributes Register 1"
|
|
bitfld.long 0x00 31. " DBR ,Double baud rate" "Normal,Doubled"
|
|
bitfld.long 0x00 27.--30. " FMSZ ,Frame size" ",,,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x00 26. " CPOL ,Clock polarity" "Inactive low,Inactive high"
|
|
bitfld.long 0x00 25. " CPHA ,Clock phase" "Captured on leading edge,Captured on following edge"
|
|
textline " "
|
|
bitfld.long 0x00 24. " LSBFE ,LBS first" "MSB,LSB"
|
|
bitfld.long 0x00 22.--23. " PCSSCK ,PCS to SCK delay prescaler" "1,3,5,7"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " PASC ,After SCK delay prescaler" "1,3,5,7"
|
|
bitfld.long 0x00 18.--19. " PDT ,Delay after transfer prescaler" "1,3,5,7"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " PBR ,Baud rate prescaler" "2,3,5,7"
|
|
bitfld.long 0x00 12.--15. " CSSCK ,PCS to SCK delay scaler" "2,4,8,16,32,64,128,256,512,1k,2k,4k,8k,16k,32k,64k"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ASC ,After SCK delay scaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " DT ,Delay after transfer scaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " BR ,Baud rate scaler" "2,4,6,8,16,32,64,128,256,512,1k,2k,4k,8k,16k,32k"
|
|
else
|
|
endif
|
|
endif
|
|
else
|
|
if ((per.l(ad:0x4002c000)&0x80000000)==0x80000000)
|
|
group.long 0xC++0x3
|
|
line.long 0x00 "CTAR0,DSPI0 Clock and Transfer Attributes Register 0"
|
|
bitfld.long 0x00 31. " DBR ,Double baud rate" "Normal,Doubled"
|
|
bitfld.long 0x00 27.--30. " FMSZ ,Frame size" ",,,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x00 26. " CPOL ,Clock polarity" "Inactive low,Inactive high"
|
|
bitfld.long 0x00 25. " CPHA ,Clock phase" "Captured on leading edge,Captured on following edge"
|
|
textline " "
|
|
bitfld.long 0x00 24. " LSBFE ,LBS first" "MSB,LSB"
|
|
bitfld.long 0x00 22.--23. " PCSSCK ,PCS to SCK delay prescaler" "1,3,5,7"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " PASC ,After SCK delay prescaler" "1,3,5,7"
|
|
bitfld.long 0x00 18.--19. " PDT ,Delay after transfer prescaler" "1,3,5,7"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " PBR ,Baud rate prescaler" "2,3,5,7"
|
|
bitfld.long 0x00 12.--15. " CSSCK ,PCS to SCK delay scaler" "2,4,8,16,32,64,128,256,512,1k,2k,4k,8k,16k,32k,64k"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ASC ,After SCK delay scaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " DT ,Delay after transfer scaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " BR ,Baud rate scaler" "2,4,6,8,16,32,64,128,256,512,1k,2k,4k,8k,16k,32k"
|
|
else
|
|
group.long 0xC++0x3
|
|
line.long 0x00 "CTAR0,DSPI0 Clock and Transfer Attributes Register 0"
|
|
bitfld.long 0x00 27.--31. " FMSZ ,Frame size" ",,,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 26. " CPOL ,Clock polarity" "Inactive low,Inactive high"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CPHA ,Clock phase" "Captured on leading edge,Captured on following edge"
|
|
endif
|
|
if ((per.l(ad:0x4002c000)&0x80000000)==0x80000000)
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "CTAR1,DSPI0 Clock and Transfer Attributes Register 1"
|
|
bitfld.long 0x00 31. " DBR ,Double baud rate" "Normal,Doubled"
|
|
bitfld.long 0x00 27.--30. " FMSZ ,Frame size" ",,,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x00 26. " CPOL ,Clock polarity" "Inactive low,Inactive high"
|
|
bitfld.long 0x00 25. " CPHA ,Clock phase" "Captured on leading edge,Captured on following edge"
|
|
textline " "
|
|
bitfld.long 0x00 24. " LSBFE ,LBS first" "MSB,LSB"
|
|
bitfld.long 0x00 22.--23. " PCSSCK ,PCS to SCK delay prescaler" "1,3,5,7"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " PASC ,After SCK delay prescaler" "1,3,5,7"
|
|
bitfld.long 0x00 18.--19. " PDT ,Delay after transfer prescaler" "1,3,5,7"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " PBR ,Baud rate prescaler" "2,3,5,7"
|
|
bitfld.long 0x00 12.--15. " CSSCK ,PCS to SCK delay scaler" "2,4,8,16,32,64,128,256,512,1k,2k,4k,8k,16k,32k,64k"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ASC ,After SCK delay scaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " DT ,Delay after transfer scaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " BR ,Baud rate scaler" "2,4,6,8,16,32,64,128,256,512,1k,2k,4k,8k,16k,32k"
|
|
else
|
|
hgroup.long 0x10++0x3
|
|
hide.long 0x00 "CTAR1,DSPI0 Clock and Transfer Attributes Register 1"
|
|
endif
|
|
endif
|
|
textline ""
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "SR,DSPI0 Status Register"
|
|
eventfld.long 0x00 31. " TCF ,Transfer complete flag" "Not completed,Completed"
|
|
eventfld.long 0x00 30. " TXRXS ,TX and RX status" "Disabled,Enabled"
|
|
eventfld.long 0x00 28. " EOQF ,End of queue flag" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 27. " TFUF ,Transmit FIFO underflow flag" "No underflow,Underflow"
|
|
eventfld.long 0x00 25. " TFFF ,Transmit FIFO fill flag" "Full,Not full"
|
|
eventfld.long 0x00 19. " RFOF ,Receive FIFO overflow flag" "No overflow,Overflow"
|
|
textline " "
|
|
eventfld.long 0x00 17. " RFDF ,Receive FIFO drain flag" "Empty,Not empty"
|
|
rbitfld.long 0x00 12.--15. " TXCTR ,TX FIFO counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 8.--11. " TXNXTPTR ,Transmit next pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
rbitfld.long 0x00 4.--7. " RXCTR ,RX FIFO counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 0.--3. " POPNXTPTR ,Pop next pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
sif cpuis("MK02*")
|
|
if (((per.l(ad:0x4002c000+0x2C))&0x40000000)==0x0)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "RSER,DSPI0 DMA/Interrupt Request Select and Enable Register"
|
|
bitfld.long 0x00 31. " TCF_RE ,Transmission complete request enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EOQF_RE ,DSPI finished request enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " TFUF_RE ,Transmit FIFO underflow request enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " TFFF_RE ,Transmit FIFO fill request enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " TFFF_DIRS ,Transmit FIFO fill DMA / interrupt request select" "Interrupt,DMA"
|
|
bitfld.long 0x00 19. " RFOF_RE ,Receive FIFO overflow request enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " RFDF_RE ,Receive FIFO drain request enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RFDF_DIRS ,Receive FIFO drain DMA / interrupt request select" "Interrupt,DMA"
|
|
else
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "RSER,DSPI0 DMA/Interrupt Request Select and Enable Register"
|
|
bitfld.long 0x00 31. " TCF_RE ,Transmission complete request enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EOQF_RE ,DSPI finished request enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " TFUF_RE ,Transmit FIFO underflow request enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " TFFF_RE ,Transmit FIFO fill request enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " TFFF_DIRS ,Transmit FIFO fill DMA / interrupt request select" "Interrupt,DMA"
|
|
bitfld.long 0x00 19. " RFOF_RE ,Receive FIFO overflow request enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " RFDF_RE ,Receive FIFO drain request enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RFDF_DIRS ,Receive FIFO drain DMA / interrupt request select" "Interrupt,DMA"
|
|
endif
|
|
else
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "RSER,DSPI0 DMA/Interrupt Request Select and Enable Register"
|
|
bitfld.long 0x00 31. " TCF_RE ,Transmission complete request enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EOQF_RE ,DSPI finished request enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " TFUF_RE ,Transmit FIFO underflow request enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " TFFF_RE ,Transmit FIFO fill request enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " TFFF_DIRS ,Transmit FIFO fill DMA / interrupt request select" "Interrupt,DMA"
|
|
bitfld.long 0x00 19. " RFOF_RE ,Receive FIFO overflow request enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " RFDF_RE ,Receive FIFO drain request enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RFDF_DIRS ,Receive FIFO drain DMA / interrupt request select" "Interrupt,DMA"
|
|
endif
|
|
if ((per.l(ad:0x4002c000)&0x80000000)==0x80000000)
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "PUSHR,DSPI0 PUSH TX FIFO Register"
|
|
bitfld.long 0x00 31. " CONT ,Continuous peripheral chip select enable" "Return to inactive,Keep asserted"
|
|
bitfld.long 0x00 28.--30. " CTAS ,Clock and transfer attributes select" "CTAR0,CTAR1,?..."
|
|
bitfld.long 0x00 27. " EOQ ,End of queue" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 26. " CTCNT ,Clear transfer counter" "Not cleared,Cleared"
|
|
textline " "
|
|
sif cpuis("MK02*")||cpuis("MK1?F*")||cpuis("MK10D*VLL7")||cpuis("MK10D*VMC7")||cpuis("MK10D*VLQ10")||cpuis("MK10D*VMD10")||cpuis("MK10D*VMC10")||cpuis("MK10D*VLL10")||(cpuis("MK11D????AVLK5")||cpuis("MK11D????AVMC5")||cpuis("MK11D????VLK5")||cpuis("MK11D????VMC5"))
|
|
bitfld.long 0x00 21. " PCS5 ,PCS 5 signal assertion" "Negated,Asserted"
|
|
bitfld.long 0x00 20. " PCS4 ,PCS 4 signal assertion" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PCS3 ,PCS 3 signal assertion" "Negated,Asserted"
|
|
bitfld.long 0x00 18. " PCS2 ,PCS 2 signal assertion" "Negated,Asserted"
|
|
textline " "
|
|
sif cpuis("MK10D*VLL10")
|
|
bitfld.long 0x00 17. " PCS1 ,PCS 1 signal assertion" "Negated,Asserted"
|
|
bitfld.long 0x00 16. " PCS0 ,PCS 0 signal assertion" "Negated,Asserted"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x00 17. " PCS1 ,PCS 1 signal assertion" "Negated,Asserted"
|
|
bitfld.long 0x00 16. " PCS0 ,PCS 0 signal assertion" "Negated,Asserted"
|
|
textline " "
|
|
endif
|
|
else
|
|
sif !(cpuis("MK10D????VFM5")||cpuis("MK10D???VFM5"))
|
|
bitfld.long 0x00 20. " PCS4 ,PCS 4 signal assertion" "Negated,Asserted"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 19. " PCS3 ,PCS 3 signal assertion" "Negated,Asserted"
|
|
bitfld.long 0x00 18. " PCS2 ,PCS 2 signal assertion" "Negated,Asserted"
|
|
bitfld.long 0x00 17. " PCS1 ,PCS 1 signal assertion" "Negated,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PCS0 ,PCS 0 signal assertion" "Negated,Asserted"
|
|
textline " "
|
|
endif
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transmit data"
|
|
else
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "PUSHR,DSPI0 PUSH TX FIFO Register"
|
|
sif cpuis("MK10D*")||cpuis("MK02*")
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transmit data"
|
|
endif
|
|
endif
|
|
hgroup.long 0x38++0x3
|
|
hide.long 0x00 "POPR,DSPI0 POP RX FIFO Register"
|
|
in
|
|
width 12.
|
|
sif cpuis("MK02*")||cpuis("MK10DN512ZVLK10*")||cpuis("MK10DN512ZVLL10*")||cpuis("MK10DN512ZVLQ10*")||cpuis("MK10DN512ZVMD10*")||cpuis("MK10DN512ZVMC10*")||cpuis("MK10DX256ZVLQ10*")||cpuis("MK10DX256ZVMD10*")
|
|
hgroup.long (0x3C+0x0)++0x3f "DSPI0 Tx FIFO Registers"
|
|
hide.long 0x00 "TXFR0,DSPI0 Transmit FIFO Register 0"
|
|
in
|
|
hgroup.long (0x3C+0x4)++0x3f "DSPI0 Tx FIFO Registers"
|
|
hide.long 0x00 "TXFR1,DSPI0 Transmit FIFO Register 1"
|
|
in
|
|
hgroup.long (0x3C+0x8)++0x3f "DSPI0 Tx FIFO Registers"
|
|
hide.long 0x00 "TXFR2,DSPI0 Transmit FIFO Register 2"
|
|
in
|
|
hgroup.long (0x3C+0xC)++0x3f "DSPI0 Tx FIFO Registers"
|
|
hide.long 0x00 "TXFR3,DSPI0 Transmit FIFO Register 3"
|
|
in
|
|
else
|
|
if ((per.l(ad:0x4002c000)&0x80000000)==0x80000000)
|
|
rgroup.long (0x3C+0x0)++0x3f "DSPI0 Tx FIFO Registers"
|
|
line.long 0x00 "TXFR0,DSPI0 Transmit FIFO Register 0"
|
|
hexmask.long.word 0x0 16.--31. 1. " TXCMD ,Transmit command"
|
|
hexmask.long.word 0x0 0.--15. 1. " TXDATA ,Transmit data"
|
|
rgroup.long (0x3C+0x4)++0x3f "DSPI0 Tx FIFO Registers"
|
|
line.long 0x00 "TXFR1,DSPI0 Transmit FIFO Register 1"
|
|
hexmask.long.word 0x4 16.--31. 1. " TXCMD ,Transmit command"
|
|
hexmask.long.word 0x4 0.--15. 1. " TXDATA ,Transmit data"
|
|
rgroup.long (0x3C+0x8)++0x3f "DSPI0 Tx FIFO Registers"
|
|
line.long 0x00 "TXFR2,DSPI0 Transmit FIFO Register 2"
|
|
hexmask.long.word 0x8 16.--31. 1. " TXCMD ,Transmit command"
|
|
hexmask.long.word 0x8 0.--15. 1. " TXDATA ,Transmit data"
|
|
rgroup.long (0x3C+0xC)++0x3f "DSPI0 Tx FIFO Registers"
|
|
line.long 0x00 "TXFR3,DSPI0 Transmit FIFO Register 3"
|
|
hexmask.long.word 0xC 16.--31. 1. " TXCMD ,Transmit command"
|
|
hexmask.long.word 0xC 0.--15. 1. " TXDATA ,Transmit data"
|
|
else
|
|
hgroup.long (0x3C+0x0)++0x3f "DSPI0 Tx FIFO Registers"
|
|
hide.long 0x00 "TXFR0,DSPI0 Transmit FIFO Register 0"
|
|
in
|
|
hgroup.long (0x3C+0x4)++0x3f "DSPI0 Tx FIFO Registers"
|
|
hide.long 0x00 "TXFR1,DSPI0 Transmit FIFO Register 1"
|
|
in
|
|
hgroup.long (0x3C+0x8)++0x3f "DSPI0 Tx FIFO Registers"
|
|
hide.long 0x00 "TXFR2,DSPI0 Transmit FIFO Register 2"
|
|
in
|
|
hgroup.long (0x3C+0xC)++0x3f "DSPI0 Tx FIFO Registers"
|
|
hide.long 0x00 "TXFR3,DSPI0 Transmit FIFO Register 3"
|
|
in
|
|
endif
|
|
endif
|
|
hgroup.long (0x7C+0x0)++0x3f "DSPI0 Rx FIFO Registers"
|
|
hide.long 0x00 "RXFR0,DSPI0 Receive FIFO Register 0"
|
|
in
|
|
hgroup.long (0x7C+0x4)++0x3f "DSPI0 Rx FIFO Registers"
|
|
hide.long 0x00 "RXFR1,DSPI0 Receive FIFO Register 1"
|
|
in
|
|
hgroup.long (0x7C+0x8)++0x3f "DSPI0 Rx FIFO Registers"
|
|
hide.long 0x00 "RXFR2,DSPI0 Receive FIFO Register 2"
|
|
in
|
|
hgroup.long (0x7C+0xC)++0x3f "DSPI0 Rx FIFO Registers"
|
|
hide.long 0x00 "RXFR3,DSPI0 Receive FIFO Register 3"
|
|
in
|
|
width 0xB
|
|
tree.end
|
|
tree.end
|
|
tree.open "I2C (Inter-Integrated Circuit)"
|
|
tree "I2C 0"
|
|
base ad:0x40066000
|
|
width 6.
|
|
group.byte 0x00++0x03
|
|
line.byte 0x00 "A1,IIC0 Address Register 1"
|
|
hexmask.byte 0x00 1.--7. 0x02 " AD ,Slave address bits [7:1]"
|
|
line.byte 0x01 "F,IIC0 Frequency Divider Register"
|
|
bitfld.byte 0x01 6.--7. " MULT ,Multiplier factor" "1,2,4,?..."
|
|
bitfld.byte 0x01 0.--5. " ICR ,Clock rate (I2C baud rate/SDA hold time/SCL start hold time/SCL stop hold time)" "20/7/6/11,22/7/7/12,24/8/8/13,26/8/9/14,28/9/10/15,30/9/11/16,34/10/13/18,40/10/16/21,28/7/10/15,32/7/12/17,36/9/14/19,40/9/16/21,44/11/18/23,48/11/20/25,56/13/24/29,68/13/30/35,48/9/18/25,56/9/22/29,64/13/26/33,72/13/30/37,80/17/34/41,88/17/38/45,104/21/46/53,128/21/58/65,80/9/38/41,96/9/46/49,112/17/54/57,128/17/62/65,144/25/70/73,160/25/78/81,192/33/94/97,240/33/118/121,160/17/78/81,192/17/94/97,224/33/110/113,256/33/126/129,288/49/142/145,320/49/158/161,384/65/190/193,480/65/238/241,320/33/158/161,384/33/190/193,448/65/222/225,512/65/254/257,576/97/286/289,640/97/318/321,768/129/382/385,960/129/478/481,640/65/318/321,768/65/382/385,896/129/446/449,1024/129/510/513,1152/193/574/577,1280/193/638/641,1536/257/766/769,1920/257/958/961,1280/129/638/641,1536/129/766/769,1792/257/894/897,2048/257/1022/1025,2304/385/1150/1153,2560/385/1278/1281,3072/513/1534/1537,3840/513/1918/1921"
|
|
line.byte 0x02 "C1,IIC0 Control Register 1"
|
|
bitfld.byte 0x02 7. " IICEN ,IIC0 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x02 6. " IICIE ,IIC0 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x02 5. " MST ,Master mode select" "Slave,Master"
|
|
bitfld.byte 0x02 4. " TX ,Transmit mode select" "Receive,Transmit"
|
|
newline
|
|
bitfld.byte 0x02 3. " TXAK ,Transmit acknowledge enable" "Disabled,Enabled"
|
|
bitfld.byte 0x02 2. " RSTA ,Repeat START" "No effect,Start"
|
|
bitfld.byte 0x02 1. " WUEN ,Wakeup enable" "Disabled,Enabled"
|
|
bitfld.byte 0x02 0. " DMAEN ,DMA enable" "Disabled,Enabled"
|
|
line.byte 0x03 "S,IIC0 Status Register"
|
|
rbitfld.byte 0x03 7. " TCF ,Transfer complete flag" "Not completed,Completed"
|
|
bitfld.byte 0x03 6. " IAAS ,Addressed as a slave" "Not addressed,Addressed"
|
|
rbitfld.byte 0x03 5. " BUSY ,Bus busy" "Idle,Busy"
|
|
eventfld.byte 0x03 4. " ARBL ,Arbitration lost" "Not lost,Lost"
|
|
newline
|
|
bitfld.byte 0x03 3. " RAM ,Range address match" "Not matched,Matched"
|
|
rbitfld.byte 0x03 2. " SRW ,Slave read/write" "Write,Read"
|
|
eventfld.byte 0x03 1. " IICIF ,Interrupt flag" "No interrupt,Interrupt"
|
|
rbitfld.byte 0x03 0. " RXAK ,Receive acknowledge" "Acknowledged,Not acknowledged"
|
|
newline
|
|
hgroup.byte 0x04++0x00
|
|
hide.byte 0x00 "D,IIC0 Data I/O Register"
|
|
in
|
|
if ((per.b(ad:0x40066000+0x05)&0x40)==0x40)
|
|
group.byte 0x05++0x00
|
|
line.byte 0x00 "C2,IIC0 Control Register 2"
|
|
bitfld.byte 0x00 7. " GCAEN ,Enables general call address" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " ADEXT ,Controls the number of bits used for the slave address" "7-bit,10-bit"
|
|
bitfld.byte 0x00 5. " HDRS ,Controls the drive capability of the I2C pads" "Normal,High"
|
|
bitfld.byte 0x00 4. " SBRC ,Slave baud rate control" "Master baud rate,Independent"
|
|
newline
|
|
bitfld.byte 0x00 3. " RMEN ,Controls slave address matching for addresses between the values of the A1 and RA registers" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--2. " AD[10:8] ,Slave address bits [10:8]" "000,001,010,011,100,101,110,111"
|
|
else
|
|
group.byte 0x05++0x00
|
|
line.byte 0x00 "C2,IIC0 Control Register 2"
|
|
bitfld.byte 0x00 7. " GCAEN ,Enables general call address" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " ADEXT ,Controls the number of bits used for the slave address" "7-bit,10-bit"
|
|
bitfld.byte 0x00 5. " HDRS ,Controls the drive capability of the I2C pads" "Normal,High"
|
|
bitfld.byte 0x00 4. " SBRC ,Slave baud rate control. Enables independent slave mode baud rate at maximum frequency" "Master's,Independent"
|
|
newline
|
|
bitfld.byte 0x00 3. " RMEN ,Controls slave address matching for addresses between the values of the A1 and RA registers" "Disabled,Enabled"
|
|
endif
|
|
group.byte 0x06++0x05
|
|
line.byte 0x00 "FLT,IIC0 Programmable Input Glitch Filter Register"
|
|
sif cpuis("MK60DX256ZVMC10")||cpuis("MK60DN512ZVMC10")||cpuis("MK60DN256ZVLQ10")||cpuis("MK60DN512ZVLQ10")||cpuis("MK60DN512ZVMD10")||cpuis("MK60DX256ZVLQ10")||cpuis("MK60DX256ZVMD10")||cpuis("MK60DN512ZVLQ10R")||cpuis("MK60DX256ZVLL10")||cpuis("MK60DN512VMC10R")||cpuis("MK60FN1M0VLQ15")||cpuis("MK60DN512ZVLL10")||cpuis("KK60FN1M0VLQ15")||cpuis("KK60DN512ZCAB10R")
|
|
bitfld.byte 0x00 0.--4. " FLT ,IIC0 programmable filter factor" "No filter,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
sif cpuis("MK21F*")||cpuis("MK22F*")||cpuis("MK02*")||cpuis("MK6*")||cpuis("MK24FN*")||cpuis("MK26FN*")||cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("KK22FN256CAP12R")||cpuis("KK22FN512CBP12R")||cpuis("KK22FN128CAH12R")||cpuis("KK22FN256CAH12R")||cpuis("KK26FN2M0CAC18R")||cpuis("MK27FN2M0VMI15")||cpuis("KK28FN2M0CAU15R")||cpuis("MK28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")||cpuis("KK65FN2M0CAC18R")
|
|
bitfld.byte 0x00 7. " SHEN ,Stop hold enable" "Disabled,Enabled"
|
|
eventfld.byte 0x00 6. " STOPF ,IIC0 bus stop detect flag" "Not detected,Detected"
|
|
bitfld.byte 0x00 5. " SSIE ,I2C bus stop or start interrupt enable" "Disabled,Enabled"
|
|
eventfld.byte 0x00 4. " STARTF ,I2C bus start detect flag" "Not started,Started"
|
|
newline
|
|
bitfld.byte 0x00 0.--3. " FLT ,IIC0 programmable filter factor" "No filter,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
bitfld.byte 0x00 0.--4. " FLT ,IIC0 programmable filter factor" "No filter,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
endif
|
|
line.byte 0x01 "RA,IIC0 Range Address Register"
|
|
hexmask.byte 0x01 1.--7. 0x02 " RAD ,Range slave address"
|
|
line.byte 0x02 "SMB,IIC0 SMBus Control and Status Register"
|
|
bitfld.byte 0x02 7. " FACK ,Fast NACK/ACK enable" "NACK/ACK on following,ACK/NACK by TXAK"
|
|
bitfld.byte 0x02 6. " ALERTEN ,SMBus alert response address enable" "Disabled,Enabled"
|
|
bitfld.byte 0x02 5. " SIICAEN ,Second IIC0 address enable" "Disabled,Enabled"
|
|
bitfld.byte 0x02 4. " TCKSEL ,Timeout counter clock select" "Clock / 64,Clock"
|
|
newline
|
|
eventfld.byte 0x02 3. " SLTF ,SCL low timeout flag" "Not occurred,Occurred"
|
|
rbitfld.byte 0x02 2. " SHTF1 ,SCL high timeout flag 1" "Not occurred,Occurred"
|
|
eventfld.byte 0x02 1. " SHTF2 ,SCL high timeout flag 2" "Not occurred,Occurred"
|
|
bitfld.byte 0x02 0. " SHTF2IE ,SHTF2 interrupt enable" "Disabled,Enabled"
|
|
line.byte 0x03 "A2,IIC0 Address Register 2"
|
|
hexmask.byte 0x03 1.--7. 0x02 " SAD ,SMBus address"
|
|
line.byte 0x04 "SLTH,IIC0 SCL Low Timeout High Register"
|
|
line.byte 0x05 "SLTL,IIC0 SCL Low Timeout Low Register"
|
|
sif cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("MK27FN2M0VMI15")||cpuis("KK28FN2M0CAU15R")||cpuis("MK28FN2M0CAU15R")||cpuis("MK28FN2M0VMI15")
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "S2,IIC0 Status Register 2"
|
|
eventfld.byte 0x00 1. " ERROR ,Read or write errors with the Tx and Rx buffers" "No error,Error"
|
|
rbitfld.byte 0x00 0. " EMPTY ,Tx or Rx buffer is empty" "Not empty,Empty"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "UART (Universal Asynchronous Receiver/Transmitter)"
|
|
tree "UART 0"
|
|
base ad:0x4006A000
|
|
tree "UART 0 Standard Features Registers"
|
|
width 13.
|
|
group.byte 0x00++0x03
|
|
line.byte 0x00 "BDH,UART Baud Rate Register High"
|
|
bitfld.byte 0x00 7. " LBKDIE ,LIN break detect interrupt or DMA request enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " RXEDGIE ,RxD input active edge interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--4. " SBR ,UART baud rate bits" "0/32,1/32,2/32,3/32,4/32,5/32,6/32,7/32,8/32,9/32,10/32,11/32,12/32,13/32,14/32,15/32,16/32,17/32,18/32,19/32,20/32,21/32,22/32,23/32,24/32,25/32,26/32,27/32,28/32,29/32,30/32,31/32"
|
|
group.byte 0x01++0x02
|
|
line.byte 0x00 "BDL,UART Baud Rate Register Low"
|
|
line.byte 0x01 "C1,UART Control Register 1"
|
|
bitfld.byte 0x01 7. " LOOPS ,Loop mode select" "Not selected,Selected"
|
|
bitfld.byte 0x01 6. " UARTSWAI ,UART stops in wait mode" "Not stopped,Stopped"
|
|
bitfld.byte 0x01 5. " RSRC ,Receiver source select" "Internal loop-back mode,Single-wire UART"
|
|
textline " "
|
|
bitfld.byte 0x01 4. " M ,9-bit or 8-bit mode select" "Normal 8 bits+stop,Use 9 bits+stop"
|
|
bitfld.byte 0x01 3. " WAKE ,Receiver wakeup method select" "Idle-line,Address-mark"
|
|
bitfld.byte 0x01 2. " ILT ,Idle line type select" "After start bit,After stop bit"
|
|
textline " "
|
|
bitfld.byte 0x01 1. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 0. " PT ,Parity type" "Even,Odd"
|
|
line.byte 0x02 "C2,UART Control Register 2"
|
|
bitfld.byte 0x02 7. " TIE ,Transmitter interrupt or DMA transfer enable" "Disabled,Enabled"
|
|
bitfld.byte 0x02 6. " TCIE ,Transmission complete interrupt or DMA transfer enable" "Disabled,Enabled"
|
|
bitfld.byte 0x02 5. " RIE ,Receiver full interrupt or DMA transfer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x02 4. " ILIE ,Idle line interrupt or DMA transfer enable" "Disabled,Enabled"
|
|
bitfld.byte 0x02 3. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.byte 0x02 2. " RE ,Receiver enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x02 1. " RWU ,Receiver wakeup control" "Normal,Wake-Up"
|
|
bitfld.byte 0x02 0. " SBK ,Send break" "Normal,Break"
|
|
rgroup.byte 0x04++0x00
|
|
line.byte 0x00 "S1,UART Status Register 1"
|
|
bitfld.byte 0x00 7. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
bitfld.byte 0x00 6. " TC ,Transmit complete flag" "Active,Idle"
|
|
bitfld.byte 0x00 5. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
bitfld.byte 0x00 3. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
bitfld.byte 0x00 2. " NF ,Noise flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " FE ,Framing error flag" "No error,Error"
|
|
bitfld.byte 0x00 0. " PF ,Parity error flag" "No error,Error"
|
|
group.byte 0x05++0x00
|
|
line.byte 0x00 "S2,UART Status Register 2"
|
|
eventfld.byte 0x00 7. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 6. " RXEDGIF ,RxD pin active edge interrupt flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 5. " MSBF ,Most significant bit first" "LSB first,MSB first"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
bitfld.byte 0x00 3. " RWUID ,Receive wakeup idle detect" "Not detected,Detected"
|
|
bitfld.byte 0x00 2. " BRK13 ,Break transmit character length" "10/11/12 bit,13/14 bit"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.byte 0x00 0. " RAF ,Receiver active flag" "Idle,Active"
|
|
if (((per.b(ad:0x4006A000+0x02))&0x10)==0x10)||(((per.b(ad:0x4006A000+0x0A))&0x20)==0x20)
|
|
group.byte 0x06++0x00
|
|
line.byte 0x00 "C3,UART Control Register 3"
|
|
rbitfld.byte 0x00 7. " R8 ,Received bit 8" "No RX,RX"
|
|
bitfld.byte 0x00 6. " T8 ,Transmit bit 8" "No TX,TX"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " TXDIR ,Transmitter pin data direction in single-wire mode" "Input,Output"
|
|
bitfld.byte 0x00 4. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
bitfld.byte 0x00 3. " ORIE ,Overrun error interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x06++0x00
|
|
line.byte 0x00 "C3,UART Control Register 3"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " TXDIR ,Transmitter pin data direction in single-wire mode" "Input,Output"
|
|
bitfld.byte 0x00 4. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
bitfld.byte 0x00 3. " ORIE ,Overrun error interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
hgroup.byte 0x07++0x0
|
|
hide.byte 0x00 "D,UART Data Register"
|
|
in
|
|
group.byte 0x08++0x3
|
|
line.byte 0x00 "MA1,UART Match Address Registers 1"
|
|
line.byte 0x01 "MA2,UART Match Address Registers 2"
|
|
line.byte 0x02 "C4,UART Control Register 4"
|
|
bitfld.byte 0x02 7. " MAEN1 ,Match address mode enable 1" "Disabled,Enabled"
|
|
bitfld.byte 0x02 6. " MAEN2 ,Match address mode enable 2" "Disabled,Enabled"
|
|
bitfld.byte 0x02 5. " M10 ,10-bit mode select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x02 0.--4. " BRFA ,Baud rate fine adjust" "0/32,1/32,2/32,3/32,4/32,5/32,6/32,7/32,8/32,9/32,10/32,11/32,12/32,13/32,14/32,15/32,16/32,17/32,18/32,19/32,20/32,21/32,22/32,23/32,24/32,25/32,26/32,27/32,28/32,29/32,30/32,31/32"
|
|
line.byte 0x03 "C5,UART Control Register 5"
|
|
bitfld.byte 0x03 7. " TDMAS ,Transmitter DMA select" "Interrupt service,DMA transfer"
|
|
bitfld.byte 0x03 5. " RDMAS ,Receiver full DMA select" "Interrupt service,DMA transfer"
|
|
rgroup.byte 0x0C++0x00
|
|
line.byte 0x00 "ED,UART Extended Data Register"
|
|
bitfld.byte 0x00 7. " NOISY ,The current received dataword contained in D and C3[R8] was received with noise" "Without noise,With noise"
|
|
bitfld.byte 0x00 6. " PARITYE ,The current received dataword contained in D and C3[R8] was received with a parity error" "No error,Error"
|
|
group.byte 0x0D++0x01
|
|
line.byte 0x00 "MODEM,UART Modem Register"
|
|
bitfld.byte 0x00 3. " RXRTSE ,Receiver request-to-send enable (num of char in RCV data reg FIFO>=RWFIFO(RXWATER)/Num of char in RCV data reg FIFO<=RWFIFO(RXWATER))" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Active low,Active high"
|
|
bitfld.byte 0x00 1. " TXRTSE ,Transmitter request-to-send enable (char placed in empty FIFO/after all characters placed to FIFO)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
line.byte 0x01 "IR,UART Infrared Register"
|
|
bitfld.byte 0x01 2. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 0.--1. " TNP ,Transmitter narrow pulse" "3/16,1/16,1/32,1/4"
|
|
tree.end
|
|
tree "UART 0 FIFO Registers"
|
|
width 14.
|
|
if (((per.b(ad:0x4006A000+0x03))&0x0C)==0x00)&&(((per.b(ad:0x4006A000+0x12))&0xC0)==0xC0)
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "PFIFO,UART FIFO Parameters"
|
|
bitfld.byte 0x00 7. " TXFE ,Transmit FIFO enable" "Disabled,Enabled"
|
|
rbitfld.byte 0x00 4.--6. " TXFIFOSIZE ,Transmit FIFO buffer depth" "1 dataword,4 datawords,8 datawords,16 datawords,32 datawords,64 datawords,128 datawords,?..."
|
|
bitfld.byte 0x00 3. " RXFE ,Receive FIFO enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.byte 0x00 0.--2. " RXFIFOSIZE ,Receive FIFO buffer depth" "1 dataword,4 datawords,8 datawords,16 datawords,32 datawords,64 datawords,128 datawords,?..."
|
|
else
|
|
rgroup.byte 0x10++0x00
|
|
line.byte 0x00 "PFIFO,UART FIFO Parameters"
|
|
bitfld.byte 0x00 7. " TXFE ,Transmit FIFO enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4.--6. " TXFIFOSIZE ,Transmit FIFO buffer depth" "1 dataword,4 datawords,8 datawords,16 datawords,32 datawords,64 datawords,128 datawords,?..."
|
|
bitfld.byte 0x00 3. " RXFE ,Receive FIFO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--2. " RXFIFOSIZE ,Receive FIFO buffer depth" "1 dataword,4 datawords,8 datawords,16 datawords,32 datawords,64 datawords,128 datawords,?..."
|
|
endif
|
|
group.byte 0x11++0x00
|
|
line.byte 0x00 "CFIFO,UART FIFO Control Register"
|
|
bitfld.byte 0x00 7. " TXFLUSH ,Transmit FIFO/buffer flush" "No effect,Flush"
|
|
bitfld.byte 0x00 6. " RXFLUSH ,Receive FIFO/buffer flush" "No effect,Flush"
|
|
sif !(cpuis("MK10FN1M0VLQ12")||cpuis("MK10FN1M0VMD12")||cpuis("MK10FX512VLQ12")||cpuis("MK10FX512VMD12")||cpuis("MK10DN512ZVLK10*")||cpuis("MK10DN512ZVLL10*")||cpuis("MK10DN512ZVLQ10*")||cpuis("MK10DN512ZVMD10*")||cpuis("MK10DN512ZVMC10*")||cpuis("MK10DX256ZVLQ10*")||cpuis("MK10DX256ZVMD10*"))
|
|
bitfld.byte 0x00 2. " RXOFE ,Receive FIFO overflow interrupt enable" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
bitfld.byte 0x00 1. " TXOFE ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " RXUFE ,Receive FIFO underflow interrupt enable" "Disabled,Enabled"
|
|
group.byte 0x12++0x00
|
|
line.byte 0x00 "SFIFO,UART FIFO Status Register"
|
|
rbitfld.byte 0x00 7. " TXEMPT ,Transmit buffer/FIFO empty" "Not empty,Empty"
|
|
rbitfld.byte 0x00 6. " RXEMPT ,Receive buffer/FIFO empty" "Not empty,Empty"
|
|
sif !(cpuis("MK10FN1M0VLQ12")||cpuis("MK10FN1M0VMD12")||cpuis("MK10FX512VLQ12")||cpuis("MK10FX512VMD12")||cpuis("MK10DN512ZVLK10*")||cpuis("MK10DN512ZVLL10*")||cpuis("MK10DN512ZVLQ10*")||cpuis("MK10DN512ZVMD10*")||cpuis("MK10DN512ZVMC10*")||cpuis("MK10DX256ZVLQ10*")||cpuis("MK10DX256ZVMD10*"))
|
|
eventfld.byte 0x00 2. " RXOF ,Receiver buffer overflow flag" "No overflow,Overflow"
|
|
endif
|
|
textline " "
|
|
eventfld.byte 0x00 1. " TXOF ,Transmitter buffer overflow flag" "No overflow,Overflow"
|
|
eventfld.byte 0x00 0. " RXUF ,Receiver buffer underflow flag" "No overflow,Overflow"
|
|
if (((per.b(ad:0x4006A000+0x03))&0x08)==0x00)
|
|
group.byte 0x13++0x00
|
|
line.byte 0x00 "TWFIFO,UART FIFO Transmit Watermark"
|
|
else
|
|
rgroup.byte 0x13++0x00
|
|
line.byte 0x00 "TWFIFO,UART FIFO Transmit Watermark"
|
|
endif
|
|
rgroup.byte 0x14++0x00
|
|
line.byte 0x00 "TCFIFO,UART FIFO Transmit Count"
|
|
if (((per.b(ad:0x4006A000+0x03))&0x04)==0x00)
|
|
rgroup.byte 0x15++0x00
|
|
line.byte 0x00 "RWFIFO,UART FIFO Receive Watermark"
|
|
else
|
|
group.byte 0x15++0x00
|
|
line.byte 0x00 "RWFIFO,UART FIFO Receive Watermark"
|
|
endif
|
|
rgroup.byte 0x16++0x00
|
|
line.byte 0x00 "RCFIFO,UART FIFO Receive Count"
|
|
tree.end
|
|
tree "UART 0 ISO7816 Registers"
|
|
width 16.
|
|
if (((per.b(ad:0x4006A000+0x18))&0x1)==0x0)
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "C7816,UART 7816 Control Register"
|
|
bitfld.byte 0x00 4. " ONACK ,Generate NACK on overflow" "Not generated,Generated"
|
|
bitfld.byte 0x00 3. " ANACK ,Generate NACK on error" "Not generated,Generated"
|
|
bitfld.byte 0x00 2. " INIT ,Detect initial character" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " TTYPE ,Transfer type" "T = 0,T = 1"
|
|
bitfld.byte 0x00 0. " ISO_7816E ,ISO-7816 functionality enabled" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "C7816,UART 7816 Control Register"
|
|
rbitfld.byte 0x00 4. " ONACK ,Generate NACK on overflow" "Not generated,Generated"
|
|
rbitfld.byte 0x00 3. " ANACK ,Generate NACK on error" "Not generated,Generated"
|
|
rbitfld.byte 0x00 2. " INIT ,Detect initial character" "Not detected,Detected"
|
|
textline " "
|
|
rbitfld.byte 0x00 1. " TTYPE ,Transfer type" "T = 0,T = 1"
|
|
bitfld.byte 0x00 0. " ISO_7816E ,ISO-7816 functionality enabled" "Disabled,Enabled"
|
|
endif
|
|
group.byte 0x19++0x01
|
|
line.byte 0x00 "IE7816,UART 7816 Interrupt Enable Register"
|
|
bitfld.byte 0x00 7. " WTE ,Wait timer interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " CWTE ,Character wait timer interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " BWTE ,Block wait timer interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " INITDE ,Initial character detected interrupt enable" "Disabled,Enabled"
|
|
sif cpuis("MK02*")
|
|
bitfld.byte 0x00 3. " ADTE ,ATR Duration Timer Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.byte 0x00 2. " GTVE ,Guard timer violated interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " TXTE ,Transmit threshold exceeded interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " RXTE ,Receive threshold exceeded interrupt enable" "Disabled,Enabled"
|
|
line.byte 0x01 "IS7816,UART 7816 Interrupt Status Register"
|
|
eventfld.byte 0x01 7. " WT ,Wait timer interrupt" "No interrupt,Interrupt"
|
|
eventfld.byte 0x01 6. " CWT ,Character wait timer interrupt" "No interrupt,Interrupt"
|
|
eventfld.byte 0x01 5. " BWT ,Block wait timer interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.byte 0x01 4. " INITD ,Initial character detected interrupt" "No interrupt,Interrupt"
|
|
sif cpuis("MK02*")
|
|
eventfld.byte 0x01 3. " ADT ,ATR Duration Timer Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
eventfld.byte 0x01 2. " GTV ,Guard timer violated interrupt" "No interrupt,Interrupt"
|
|
eventfld.byte 0x01 1. " TXT ,Transmit threshold exceeded interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.byte 0x01 0. " RXT ,Receive threshold exceeded interrupt" "No interrupt,Interrupt"
|
|
if (((per.b(ad:0x4006A000+0x18))&0x1)==0x0)
|
|
if ((per.b(ad:0x4006A000+0x18)&0x2)==0x0)
|
|
group.byte 0x1B++0x00
|
|
line.byte 0x00 "WP7816T0,UART 7816 Wait Parameter Register"
|
|
else
|
|
group.byte 0x1B++0x00
|
|
line.byte 0x00 "WP7816T1,UART 7816 Wait Parameter Register"
|
|
bitfld.byte 0x00 4.--7. " CWI ,Character wait time integer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0.--3. " BWI ,Block wait time integer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
group.byte 0x1C++0x02
|
|
line.byte 0x00 "WN7816,UART 7816 Wait N Register"
|
|
line.byte 0x01 "WF7816,UART 7816 Wait FD Register"
|
|
line.byte 0x02 "ET7816,UART 7816 Error Threshold Register"
|
|
bitfld.byte 0x02 4.--7. " TXTHRESHOLD ,Transmit NACK threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x02 0.--3. " RXTHRESHOLD ,Receive NACK threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
if ((per.b(ad:0x4006A000+0x18)&0x2)==0x0)
|
|
rgroup.byte 0x1B++0x00
|
|
line.byte 0x00 "WP7816T0,UART 7816 Wait Parameter Register"
|
|
else
|
|
rgroup.byte 0x1B++0x00
|
|
line.byte 0x00 "WP7816T1,UART 7816 Wait Parameter Register"
|
|
bitfld.byte 0x00 4.--7. " CWI ,Character wait time integer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0.--3. " BWI ,Block wait time integer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
rgroup.byte 0x1C++0x02
|
|
line.byte 0x00 "WN7816,UART 7816 Wait N Register"
|
|
line.byte 0x01 "WF7816,UART 7816 Wait FD Register"
|
|
line.byte 0x02 "ET7816,UART 7816 Error Threshold Register"
|
|
bitfld.byte 0x02 4.--7. " TXTHRESHOLD ,Transmit NACK threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x02 0.--3. " RXTHRESHOLD ,Receive NACK threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
if ((per.b(ad:0x4006A000+0x18)&0x2)==0x0)
|
|
hgroup.byte 0x1F++0x00
|
|
hide.byte 0x00 "TL7816,UART 7816 Transmit Length Register"
|
|
else
|
|
if (((per.b(ad:0x4006A000+0x3))&0x8)==0x0)
|
|
group.byte 0x1F++0x00
|
|
line.byte 0x00 "TL7816,UART 7816 Transmit Length Register"
|
|
else
|
|
rgroup.byte 0x1F++0x00
|
|
line.byte 0x00 "TL7816,UART 7816 Transmit Length Register"
|
|
endif
|
|
endif
|
|
if (((per.b(ad:0x4006A000+0x18))&0x1)==0x0)
|
|
if ((per.b(ad:0x4006A000+0x18)&0x2)==0x0)
|
|
group.byte 0x3A++0x03
|
|
line.byte 0x00 "AP7816A_T0,UART 7816 ATR Duration Timer Register A"
|
|
line.byte 0x01 "AP7816B_T0,UART 7816 ATR Duration Timer Register B"
|
|
line.byte 0x02 "WP7816A_T0,UART 7816 Wait Parameter Register A"
|
|
line.byte 0x03 "WP7816B_T0,UART 7816 Wait Parameter Register B"
|
|
else
|
|
group.byte 0x3C++0x03
|
|
line.byte 0x00 "WP7816A_T1,UART 7816 Wait Parameter Register A"
|
|
line.byte 0x01 "WP7816B_T1,UART 7816 Wait Parameter Register B"
|
|
line.byte 0x02 "WGP7816_T1,UART 7816 Wait and Guard Parameter Register"
|
|
bitfld.byte 0x02 4.--7. " CWI1 ,Character Wait Time Integer 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x02 0.--3. " BGI ,Block Guard Time Integer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.byte 0x03 "WP7816C_T1,UART 7816 Wait Parameter Register C"
|
|
bitfld.byte 0x03 0.--4. " CWI2 ,Character Wait Time Integer 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
else
|
|
if ((per.b(ad:0x4006A000+0x18)&0x2)==0x0)
|
|
sif cpuis("MK02*")
|
|
rgroup.byte 0x3A++0x03
|
|
line.byte 0x00 "AP7816A_T0,UART 7816 ATR Duration Timer Register A"
|
|
line.byte 0x01 "AP7816B_T0,UART 7816 ATR Duration Timer Register B"
|
|
line.byte 0x02 "WP7816A_T0,UART 7816 Wait Parameter Register A"
|
|
line.byte 0x03 "WP7816B_T0,UART 7816 Wait Parameter Register B"
|
|
else
|
|
hgroup.byte 0x3A++0x03
|
|
hide.byte 0x00 "AP7816A_T0,UART 7816 ATR Duration Timer Register A"
|
|
hide.byte 0x01 "AP7816B_T0,UART 7816 ATR Duration Timer Register B"
|
|
hide.byte 0x02 "WP7816A_T0,UART 7816 Wait Parameter Register A"
|
|
hide.byte 0x03 "WP7816B_T0,UART 7816 Wait Parameter Register B"
|
|
endif
|
|
else
|
|
sif cpuis("MK02*")
|
|
rgroup.byte 0x3A++0x03
|
|
line.byte 0x00 "WP7816A_T1,UART 7816 Wait Parameter Register A"
|
|
line.byte 0x01 "WP7816B_T1,UART 7816 Wait Parameter Register B"
|
|
line.byte 0x02 "WGP7816_T1,UART 7816 Wait and Guard Parameter Register"
|
|
line.byte 0x03 "WP7816C_T1,UART 7816 Wait Parameter Register C"
|
|
else
|
|
hgroup.byte 0x3C++0x03
|
|
hide.byte 0x00 "WP7816A_T1,UART 7816 Wait Parameter Register A"
|
|
hide.byte 0x01 "WP7816B_T1,UART 7816 Wait Parameter Register B"
|
|
hide.byte 0x02 "WGP7816_T1,UART 7816 Wait and Guard Parameter Register"
|
|
hide.byte 0x03 "WP7816C_T1,UART 7816 Wait Parameter Register C"
|
|
endif
|
|
endif
|
|
endif
|
|
tree.end
|
|
width 0xB
|
|
tree.end
|
|
tree "UART 1"
|
|
base ad:0x4006B000
|
|
tree "UART 1 Standard Features Registers"
|
|
width 13.
|
|
group.byte 0x00++0x03
|
|
line.byte 0x00 "BDH,UART Baud Rate Register High"
|
|
bitfld.byte 0x00 7. " LBKDIE ,LIN break detect interrupt or DMA request enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " RXEDGIE ,RxD input active edge interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--4. " SBR ,UART baud rate bits" "0/32,1/32,2/32,3/32,4/32,5/32,6/32,7/32,8/32,9/32,10/32,11/32,12/32,13/32,14/32,15/32,16/32,17/32,18/32,19/32,20/32,21/32,22/32,23/32,24/32,25/32,26/32,27/32,28/32,29/32,30/32,31/32"
|
|
group.byte 0x01++0x02
|
|
line.byte 0x00 "BDL,UART Baud Rate Register Low"
|
|
line.byte 0x01 "C1,UART Control Register 1"
|
|
bitfld.byte 0x01 7. " LOOPS ,Loop mode select" "Not selected,Selected"
|
|
bitfld.byte 0x01 6. " UARTSWAI ,UART stops in wait mode" "Not stopped,Stopped"
|
|
bitfld.byte 0x01 5. " RSRC ,Receiver source select" "Internal loop-back mode,Single-wire UART"
|
|
textline " "
|
|
bitfld.byte 0x01 4. " M ,9-bit or 8-bit mode select" "Normal 8 bits+stop,Use 9 bits+stop"
|
|
bitfld.byte 0x01 3. " WAKE ,Receiver wakeup method select" "Idle-line,Address-mark"
|
|
bitfld.byte 0x01 2. " ILT ,Idle line type select" "After start bit,After stop bit"
|
|
textline " "
|
|
bitfld.byte 0x01 1. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 0. " PT ,Parity type" "Even,Odd"
|
|
line.byte 0x02 "C2,UART Control Register 2"
|
|
bitfld.byte 0x02 7. " TIE ,Transmitter interrupt or DMA transfer enable" "Disabled,Enabled"
|
|
bitfld.byte 0x02 6. " TCIE ,Transmission complete interrupt or DMA transfer enable" "Disabled,Enabled"
|
|
bitfld.byte 0x02 5. " RIE ,Receiver full interrupt or DMA transfer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x02 4. " ILIE ,Idle line interrupt or DMA transfer enable" "Disabled,Enabled"
|
|
bitfld.byte 0x02 3. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.byte 0x02 2. " RE ,Receiver enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x02 1. " RWU ,Receiver wakeup control" "Normal,Wake-Up"
|
|
bitfld.byte 0x02 0. " SBK ,Send break" "Normal,Break"
|
|
rgroup.byte 0x04++0x00
|
|
line.byte 0x00 "S1,UART Status Register 1"
|
|
bitfld.byte 0x00 7. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
bitfld.byte 0x00 6. " TC ,Transmit complete flag" "Active,Idle"
|
|
bitfld.byte 0x00 5. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
bitfld.byte 0x00 3. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
bitfld.byte 0x00 2. " NF ,Noise flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " FE ,Framing error flag" "No error,Error"
|
|
bitfld.byte 0x00 0. " PF ,Parity error flag" "No error,Error"
|
|
group.byte 0x05++0x00
|
|
line.byte 0x00 "S2,UART Status Register 2"
|
|
eventfld.byte 0x00 7. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.byte 0x00 6. " RXEDGIF ,RxD pin active edge interrupt flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 5. " MSBF ,Most significant bit first" "LSB first,MSB first"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
bitfld.byte 0x00 3. " RWUID ,Receive wakeup idle detect" "Not detected,Detected"
|
|
bitfld.byte 0x00 2. " BRK13 ,Break transmit character length" "10/11/12 bit,13/14 bit"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.byte 0x00 0. " RAF ,Receiver active flag" "Idle,Active"
|
|
if (((per.b(ad:0x4006B000+0x02))&0x10)==0x10)||(((per.b(ad:0x4006B000+0x0A))&0x20)==0x20)
|
|
group.byte 0x06++0x00
|
|
line.byte 0x00 "C3,UART Control Register 3"
|
|
rbitfld.byte 0x00 7. " R8 ,Received bit 8" "No RX,RX"
|
|
bitfld.byte 0x00 6. " T8 ,Transmit bit 8" "No TX,TX"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " TXDIR ,Transmitter pin data direction in single-wire mode" "Input,Output"
|
|
bitfld.byte 0x00 4. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
bitfld.byte 0x00 3. " ORIE ,Overrun error interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x06++0x00
|
|
line.byte 0x00 "C3,UART Control Register 3"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " TXDIR ,Transmitter pin data direction in single-wire mode" "Input,Output"
|
|
bitfld.byte 0x00 4. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
bitfld.byte 0x00 3. " ORIE ,Overrun error interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
hgroup.byte 0x07++0x0
|
|
hide.byte 0x00 "D,UART Data Register"
|
|
in
|
|
group.byte 0x08++0x3
|
|
line.byte 0x00 "MA1,UART Match Address Registers 1"
|
|
line.byte 0x01 "MA2,UART Match Address Registers 2"
|
|
line.byte 0x02 "C4,UART Control Register 4"
|
|
bitfld.byte 0x02 7. " MAEN1 ,Match address mode enable 1" "Disabled,Enabled"
|
|
bitfld.byte 0x02 6. " MAEN2 ,Match address mode enable 2" "Disabled,Enabled"
|
|
bitfld.byte 0x02 5. " M10 ,10-bit mode select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x02 0.--4. " BRFA ,Baud rate fine adjust" "0/32,1/32,2/32,3/32,4/32,5/32,6/32,7/32,8/32,9/32,10/32,11/32,12/32,13/32,14/32,15/32,16/32,17/32,18/32,19/32,20/32,21/32,22/32,23/32,24/32,25/32,26/32,27/32,28/32,29/32,30/32,31/32"
|
|
line.byte 0x03 "C5,UART Control Register 5"
|
|
bitfld.byte 0x03 7. " TDMAS ,Transmitter DMA select" "Interrupt service,DMA transfer"
|
|
bitfld.byte 0x03 5. " RDMAS ,Receiver full DMA select" "Interrupt service,DMA transfer"
|
|
rgroup.byte 0x0C++0x00
|
|
line.byte 0x00 "ED,UART Extended Data Register"
|
|
bitfld.byte 0x00 7. " NOISY ,The current received dataword contained in D and C3[R8] was received with noise" "Without noise,With noise"
|
|
bitfld.byte 0x00 6. " PARITYE ,The current received dataword contained in D and C3[R8] was received with a parity error" "No error,Error"
|
|
group.byte 0x0D++0x01
|
|
line.byte 0x00 "MODEM,UART Modem Register"
|
|
bitfld.byte 0x00 3. " RXRTSE ,Receiver request-to-send enable (num of char in RCV data reg FIFO>=RWFIFO(RXWATER)/Num of char in RCV data reg FIFO<=RWFIFO(RXWATER))" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Active low,Active high"
|
|
bitfld.byte 0x00 1. " TXRTSE ,Transmitter request-to-send enable (char placed in empty FIFO/after all characters placed to FIFO)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
line.byte 0x01 "IR,UART Infrared Register"
|
|
bitfld.byte 0x01 2. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 0.--1. " TNP ,Transmitter narrow pulse" "3/16,1/16,1/32,1/4"
|
|
tree.end
|
|
tree "UART 1 FIFO Registers"
|
|
width 14.
|
|
if (((per.b(ad:0x4006B000+0x03))&0x0C)==0x00)&&(((per.b(ad:0x4006B000+0x12))&0xC0)==0xC0)
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "PFIFO,UART FIFO Parameters"
|
|
bitfld.byte 0x00 7. " TXFE ,Transmit FIFO enable" "Disabled,Enabled"
|
|
rbitfld.byte 0x00 4.--6. " TXFIFOSIZE ,Transmit FIFO buffer depth" "1 dataword,4 datawords,8 datawords,16 datawords,32 datawords,64 datawords,128 datawords,?..."
|
|
bitfld.byte 0x00 3. " RXFE ,Receive FIFO enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.byte 0x00 0.--2. " RXFIFOSIZE ,Receive FIFO buffer depth" "1 dataword,4 datawords,8 datawords,16 datawords,32 datawords,64 datawords,128 datawords,?..."
|
|
else
|
|
rgroup.byte 0x10++0x00
|
|
line.byte 0x00 "PFIFO,UART FIFO Parameters"
|
|
bitfld.byte 0x00 7. " TXFE ,Transmit FIFO enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4.--6. " TXFIFOSIZE ,Transmit FIFO buffer depth" "1 dataword,4 datawords,8 datawords,16 datawords,32 datawords,64 datawords,128 datawords,?..."
|
|
bitfld.byte 0x00 3. " RXFE ,Receive FIFO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--2. " RXFIFOSIZE ,Receive FIFO buffer depth" "1 dataword,4 datawords,8 datawords,16 datawords,32 datawords,64 datawords,128 datawords,?..."
|
|
endif
|
|
group.byte 0x11++0x00
|
|
line.byte 0x00 "CFIFO,UART FIFO Control Register"
|
|
bitfld.byte 0x00 7. " TXFLUSH ,Transmit FIFO/buffer flush" "No effect,Flush"
|
|
bitfld.byte 0x00 6. " RXFLUSH ,Receive FIFO/buffer flush" "No effect,Flush"
|
|
sif !(cpuis("MK10FN1M0VLQ12")||cpuis("MK10FN1M0VMD12")||cpuis("MK10FX512VLQ12")||cpuis("MK10FX512VMD12")||cpuis("MK10DN512ZVLK10*")||cpuis("MK10DN512ZVLL10*")||cpuis("MK10DN512ZVLQ10*")||cpuis("MK10DN512ZVMD10*")||cpuis("MK10DN512ZVMC10*")||cpuis("MK10DX256ZVLQ10*")||cpuis("MK10DX256ZVMD10*"))
|
|
bitfld.byte 0x00 2. " RXOFE ,Receive FIFO overflow interrupt enable" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
bitfld.byte 0x00 1. " TXOFE ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " RXUFE ,Receive FIFO underflow interrupt enable" "Disabled,Enabled"
|
|
group.byte 0x12++0x00
|
|
line.byte 0x00 "SFIFO,UART FIFO Status Register"
|
|
rbitfld.byte 0x00 7. " TXEMPT ,Transmit buffer/FIFO empty" "Not empty,Empty"
|
|
rbitfld.byte 0x00 6. " RXEMPT ,Receive buffer/FIFO empty" "Not empty,Empty"
|
|
sif !(cpuis("MK10FN1M0VLQ12")||cpuis("MK10FN1M0VMD12")||cpuis("MK10FX512VLQ12")||cpuis("MK10FX512VMD12")||cpuis("MK10DN512ZVLK10*")||cpuis("MK10DN512ZVLL10*")||cpuis("MK10DN512ZVLQ10*")||cpuis("MK10DN512ZVMD10*")||cpuis("MK10DN512ZVMC10*")||cpuis("MK10DX256ZVLQ10*")||cpuis("MK10DX256ZVMD10*"))
|
|
eventfld.byte 0x00 2. " RXOF ,Receiver buffer overflow flag" "No overflow,Overflow"
|
|
endif
|
|
textline " "
|
|
eventfld.byte 0x00 1. " TXOF ,Transmitter buffer overflow flag" "No overflow,Overflow"
|
|
eventfld.byte 0x00 0. " RXUF ,Receiver buffer underflow flag" "No overflow,Overflow"
|
|
if (((per.b(ad:0x4006B000+0x03))&0x08)==0x00)
|
|
group.byte 0x13++0x00
|
|
line.byte 0x00 "TWFIFO,UART FIFO Transmit Watermark"
|
|
else
|
|
rgroup.byte 0x13++0x00
|
|
line.byte 0x00 "TWFIFO,UART FIFO Transmit Watermark"
|
|
endif
|
|
rgroup.byte 0x14++0x00
|
|
line.byte 0x00 "TCFIFO,UART FIFO Transmit Count"
|
|
if (((per.b(ad:0x4006B000+0x03))&0x04)==0x00)
|
|
rgroup.byte 0x15++0x00
|
|
line.byte 0x00 "RWFIFO,UART FIFO Receive Watermark"
|
|
else
|
|
group.byte 0x15++0x00
|
|
line.byte 0x00 "RWFIFO,UART FIFO Receive Watermark"
|
|
endif
|
|
rgroup.byte 0x16++0x00
|
|
line.byte 0x00 "RCFIFO,UART FIFO Receive Count"
|
|
tree.end
|
|
tree "UART 1 ISO7816 Registers"
|
|
width 16.
|
|
if (((per.b(ad:0x4006B000+0x18))&0x1)==0x0)
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "C7816,UART 7816 Control Register"
|
|
bitfld.byte 0x00 4. " ONACK ,Generate NACK on overflow" "Not generated,Generated"
|
|
bitfld.byte 0x00 3. " ANACK ,Generate NACK on error" "Not generated,Generated"
|
|
bitfld.byte 0x00 2. " INIT ,Detect initial character" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " TTYPE ,Transfer type" "T = 0,T = 1"
|
|
bitfld.byte 0x00 0. " ISO_7816E ,ISO-7816 functionality enabled" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "C7816,UART 7816 Control Register"
|
|
rbitfld.byte 0x00 4. " ONACK ,Generate NACK on overflow" "Not generated,Generated"
|
|
rbitfld.byte 0x00 3. " ANACK ,Generate NACK on error" "Not generated,Generated"
|
|
rbitfld.byte 0x00 2. " INIT ,Detect initial character" "Not detected,Detected"
|
|
textline " "
|
|
rbitfld.byte 0x00 1. " TTYPE ,Transfer type" "T = 0,T = 1"
|
|
bitfld.byte 0x00 0. " ISO_7816E ,ISO-7816 functionality enabled" "Disabled,Enabled"
|
|
endif
|
|
group.byte 0x19++0x01
|
|
line.byte 0x00 "IE7816,UART 7816 Interrupt Enable Register"
|
|
bitfld.byte 0x00 7. " WTE ,Wait timer interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " CWTE ,Character wait timer interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " BWTE ,Block wait timer interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " INITDE ,Initial character detected interrupt enable" "Disabled,Enabled"
|
|
sif cpuis("MK02*")
|
|
bitfld.byte 0x00 3. " ADTE ,ATR Duration Timer Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.byte 0x00 2. " GTVE ,Guard timer violated interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " TXTE ,Transmit threshold exceeded interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " RXTE ,Receive threshold exceeded interrupt enable" "Disabled,Enabled"
|
|
line.byte 0x01 "IS7816,UART 7816 Interrupt Status Register"
|
|
eventfld.byte 0x01 7. " WT ,Wait timer interrupt" "No interrupt,Interrupt"
|
|
eventfld.byte 0x01 6. " CWT ,Character wait timer interrupt" "No interrupt,Interrupt"
|
|
eventfld.byte 0x01 5. " BWT ,Block wait timer interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.byte 0x01 4. " INITD ,Initial character detected interrupt" "No interrupt,Interrupt"
|
|
sif cpuis("MK02*")
|
|
eventfld.byte 0x01 3. " ADT ,ATR Duration Timer Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
eventfld.byte 0x01 2. " GTV ,Guard timer violated interrupt" "No interrupt,Interrupt"
|
|
eventfld.byte 0x01 1. " TXT ,Transmit threshold exceeded interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.byte 0x01 0. " RXT ,Receive threshold exceeded interrupt" "No interrupt,Interrupt"
|
|
if (((per.b(ad:0x4006B000+0x18))&0x1)==0x0)
|
|
if ((per.b(ad:0x4006B000+0x18)&0x2)==0x0)
|
|
group.byte 0x1B++0x00
|
|
line.byte 0x00 "WP7816T0,UART 7816 Wait Parameter Register"
|
|
else
|
|
group.byte 0x1B++0x00
|
|
line.byte 0x00 "WP7816T1,UART 7816 Wait Parameter Register"
|
|
bitfld.byte 0x00 4.--7. " CWI ,Character wait time integer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0.--3. " BWI ,Block wait time integer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
group.byte 0x1C++0x02
|
|
line.byte 0x00 "WN7816,UART 7816 Wait N Register"
|
|
line.byte 0x01 "WF7816,UART 7816 Wait FD Register"
|
|
line.byte 0x02 "ET7816,UART 7816 Error Threshold Register"
|
|
bitfld.byte 0x02 4.--7. " TXTHRESHOLD ,Transmit NACK threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x02 0.--3. " RXTHRESHOLD ,Receive NACK threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
if ((per.b(ad:0x4006B000+0x18)&0x2)==0x0)
|
|
rgroup.byte 0x1B++0x00
|
|
line.byte 0x00 "WP7816T0,UART 7816 Wait Parameter Register"
|
|
else
|
|
rgroup.byte 0x1B++0x00
|
|
line.byte 0x00 "WP7816T1,UART 7816 Wait Parameter Register"
|
|
bitfld.byte 0x00 4.--7. " CWI ,Character wait time integer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0.--3. " BWI ,Block wait time integer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
rgroup.byte 0x1C++0x02
|
|
line.byte 0x00 "WN7816,UART 7816 Wait N Register"
|
|
line.byte 0x01 "WF7816,UART 7816 Wait FD Register"
|
|
line.byte 0x02 "ET7816,UART 7816 Error Threshold Register"
|
|
bitfld.byte 0x02 4.--7. " TXTHRESHOLD ,Transmit NACK threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x02 0.--3. " RXTHRESHOLD ,Receive NACK threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
if ((per.b(ad:0x4006B000+0x18)&0x2)==0x0)
|
|
hgroup.byte 0x1F++0x00
|
|
hide.byte 0x00 "TL7816,UART 7816 Transmit Length Register"
|
|
else
|
|
if (((per.b(ad:0x4006B000+0x3))&0x8)==0x0)
|
|
group.byte 0x1F++0x00
|
|
line.byte 0x00 "TL7816,UART 7816 Transmit Length Register"
|
|
else
|
|
rgroup.byte 0x1F++0x00
|
|
line.byte 0x00 "TL7816,UART 7816 Transmit Length Register"
|
|
endif
|
|
endif
|
|
if (((per.b(ad:0x4006B000+0x18))&0x1)==0x0)
|
|
if ((per.b(ad:0x4006B000+0x18)&0x2)==0x0)
|
|
group.byte 0x3A++0x03
|
|
line.byte 0x00 "AP7816A_T0,UART 7816 ATR Duration Timer Register A"
|
|
line.byte 0x01 "AP7816B_T0,UART 7816 ATR Duration Timer Register B"
|
|
line.byte 0x02 "WP7816A_T0,UART 7816 Wait Parameter Register A"
|
|
line.byte 0x03 "WP7816B_T0,UART 7816 Wait Parameter Register B"
|
|
else
|
|
group.byte 0x3C++0x03
|
|
line.byte 0x00 "WP7816A_T1,UART 7816 Wait Parameter Register A"
|
|
line.byte 0x01 "WP7816B_T1,UART 7816 Wait Parameter Register B"
|
|
line.byte 0x02 "WGP7816_T1,UART 7816 Wait and Guard Parameter Register"
|
|
bitfld.byte 0x02 4.--7. " CWI1 ,Character Wait Time Integer 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x02 0.--3. " BGI ,Block Guard Time Integer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.byte 0x03 "WP7816C_T1,UART 7816 Wait Parameter Register C"
|
|
bitfld.byte 0x03 0.--4. " CWI2 ,Character Wait Time Integer 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
else
|
|
if ((per.b(ad:0x4006B000+0x18)&0x2)==0x0)
|
|
sif cpuis("MK02*")
|
|
rgroup.byte 0x3A++0x03
|
|
line.byte 0x00 "AP7816A_T0,UART 7816 ATR Duration Timer Register A"
|
|
line.byte 0x01 "AP7816B_T0,UART 7816 ATR Duration Timer Register B"
|
|
line.byte 0x02 "WP7816A_T0,UART 7816 Wait Parameter Register A"
|
|
line.byte 0x03 "WP7816B_T0,UART 7816 Wait Parameter Register B"
|
|
else
|
|
hgroup.byte 0x3A++0x03
|
|
hide.byte 0x00 "AP7816A_T0,UART 7816 ATR Duration Timer Register A"
|
|
hide.byte 0x01 "AP7816B_T0,UART 7816 ATR Duration Timer Register B"
|
|
hide.byte 0x02 "WP7816A_T0,UART 7816 Wait Parameter Register A"
|
|
hide.byte 0x03 "WP7816B_T0,UART 7816 Wait Parameter Register B"
|
|
endif
|
|
else
|
|
sif cpuis("MK02*")
|
|
rgroup.byte 0x3A++0x03
|
|
line.byte 0x00 "WP7816A_T1,UART 7816 Wait Parameter Register A"
|
|
line.byte 0x01 "WP7816B_T1,UART 7816 Wait Parameter Register B"
|
|
line.byte 0x02 "WGP7816_T1,UART 7816 Wait and Guard Parameter Register"
|
|
line.byte 0x03 "WP7816C_T1,UART 7816 Wait Parameter Register C"
|
|
else
|
|
hgroup.byte 0x3C++0x03
|
|
hide.byte 0x00 "WP7816A_T1,UART 7816 Wait Parameter Register A"
|
|
hide.byte 0x01 "WP7816B_T1,UART 7816 Wait Parameter Register B"
|
|
hide.byte 0x02 "WGP7816_T1,UART 7816 Wait and Guard Parameter Register"
|
|
hide.byte 0x03 "WP7816C_T1,UART 7816 Wait Parameter Register C"
|
|
endif
|
|
endif
|
|
endif
|
|
tree.end
|
|
width 0xB
|
|
tree.end
|
|
tree.end
|
|
tree.end
|
|
tree.open "Human-Machine Interfaces"
|
|
tree.open "GPIO (GPIO Controller)"
|
|
tree "GPIO A"
|
|
base ad:0x400FF000
|
|
width 12.
|
|
sif cpuis("MK02FN64VLH10")||cpuis("MK02FN128VLH10")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GPIOA_PDOR,Port Data Output Register"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PDO[19]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " PDO[18]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " PDO[13]_set/clr ,Port data output" "Low level,High level"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " PDO[12]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " PDO[5]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " PDO[4]_set/clr ,Port data output" "Low level,High level"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " PDO[3]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " PDO[2]_set/clr ,Port data output" "Low level,High level"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " PDO[1]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " PDO[0]_set/clr ,Port data output" "Low level,High level"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "GPIOA_PTOR,Port Toggle Output Register"
|
|
bitfld.long 0x00 19. " PTTO[19] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 18. " PTTO[18] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 13. " PTTO[13] ,Port toggle output" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PTTO[12] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 5. " PTTO[5] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 4. " PTTO[4] ,Port toggle output" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PTTO[3] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 2. " PTTO[2] ,Port toggle output" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PTTO[1] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 0. " PTTO[0] ,Port toggle output" "No effect,Toggle"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "GPIOA_PDIR,Port Data Input Register"
|
|
bitfld.long 0x00 19. " PDI[19] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 18. " PDI[18] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 13. " PDI[13] ,Port data input" "Low level,High level"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PDI[12] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 5. " PDI[5] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 4. " PDI[4] ,Port data input" "Low level,High level"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PDI[3] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 2. " PDI[2] ,Port data input" "Low level,High level"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PDI[1] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 0. " PDI[0] ,Port data input" "Low level,High level"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOA_PDDR,Port Data Direction Register"
|
|
bitfld.long 0x00 19. " PDD[19] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 18. " PDD[18] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 13. " PDD[13] ,Port data direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PDD[12] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 5. " PDD[5] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 4. " PDD[4] ,Port data direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PDD[3] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 2. " PDD[2] ,Port data direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PDD[1] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 0. " PDD[0] ,Port data direction" "Input,Output"
|
|
elif cpuis("MK02FN64VLF10")||cpuis("MK02FN128VLF10")||cpuis("MK02FN64VFM10")||cpuis("MK02FN128VFM10")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GPIOA_PDOR,Port Data Output Register"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PDO[19]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " PDO[18]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " PDO[4]_set/clr ,Port data output" "Low level,High level"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " PDO[3]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " PDO[2]_set/clr ,Port data output" "Low level,High level"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " PDO[1]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " PDO[0]_set/clr ,Port data output" "Low level,High level"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "GPIOA_PTOR,Port Toggle Output Register"
|
|
bitfld.long 0x00 19. " PTTO[19] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 18. " PTTO[18] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 4. " PTTO[4] ,Port toggle output" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PTTO[3] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 2. " PTTO[2] ,Port toggle output" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PTTO[1] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 0. " PTTO[0] ,Port toggle output" "No effect,Toggle"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "GPIOA_PDIR,Port Data Input Register"
|
|
bitfld.long 0x00 19. " PDI[19] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 18. " PDI[18] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 4. " PDI[4] ,Port data input" "Low level,High level"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PDI[3] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 2. " PDI[2] ,Port data input" "Low level,High level"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PDI[1] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 0. " PDI[0] ,Port data input" "Low level,High level"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOA_PDDR,Port Data Direction Register"
|
|
bitfld.long 0x00 19. " PDD[19] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 18. " PDD[18] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 4. " PDD[4] ,Port data direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PDD[3] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 2. " PDD[2] ,Port data direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PDD[1] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 0. " PDD[0] ,Port data direction" "Input,Output"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "GPIO B"
|
|
base ad:0x400FF040
|
|
width 12.
|
|
sif cpuis("MK02FN64VLH10")||cpuis("MK02FN128VLH10")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GPIOB_PDOR,Port Data Output Register"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PDO[19]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " PDO[18]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " PDO[17]_set/clr ,Port data output" "Low level,High level"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " PDO[16]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " PDO[3]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " PDO[2]_set/clr ,Port data output" "Low level,High level"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " PDO[1]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " PDO[0]_set/clr ,Port data output" "Low level,High level"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "GPIOB_PTOR,Port Toggle Output Register"
|
|
bitfld.long 0x00 19. " PTTO[19] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 18. " PTTO[18] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 17. " PTTO[17] ,Port toggle output" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PTTO[16] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 3. " PTTO[3] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 2. " PTTO[2] ,Port toggle output" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PTTO[1] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 0. " PTTO[0] ,Port toggle output" "No effect,Toggle"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "GPIOB_PDIR,Port Data Input Register"
|
|
bitfld.long 0x00 19. " PDI[19] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 18. " PDI[18] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 17. " PDI[17] ,Port data input" "Low level,High level"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PDI[16] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 3. " PDI[3] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 2. " PDI[2] ,Port data input" "Low level,High level"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PDI[1] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 0. " PDI[0] ,Port data input" "Low level,High level"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOB_PDDR,Port Data Direction Register"
|
|
bitfld.long 0x00 19. " PDD[19] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 18. " PDD[18] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 17. " PDD[17] ,Port data direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PDD[16] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 3. " PDD[3] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 2. " PDD[2] ,Port data direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PDD[1] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 0. " PDD[0] ,Port data direction" "Input,Output"
|
|
elif cpuis("MK02FN64VLF10")||cpuis("MK02FN128VLF10")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GPIOB_PDOR,Port Data Output Register"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " PDO[17]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " PDO[16]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " PDO[3]_set/clr ,Port data output" "Low level,High level"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " PDO[2]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " PDO[1]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " PDO[0]_set/clr ,Port data output" "Low level,High level"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "GPIOB_PTOR,Port Toggle Output Register"
|
|
bitfld.long 0x00 17. " PTTO[17] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 16. " PTTO[16] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 3. " PTTO[3] ,Port toggle output" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PTTO[2] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 1. " PTTO[1] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 0. " PTTO[0] ,Port toggle output" "No effect,Toggle"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "GPIOB_PDIR,Port Data Input Register"
|
|
bitfld.long 0x00 17. " PDI[17] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 16. " PDI[16] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 3. " PDI[3] ,Port data input" "Low level,High level"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PDI[2] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 1. " PDI[1] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 0. " PDI[0] ,Port data input" "Low level,High level"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOB_PDDR,Port Data Direction Register"
|
|
bitfld.long 0x00 17. " PDD[17] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 16. " PDD[16] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 3. " PDD[3] ,Port data direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PDD[2] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 1. " PDD[1] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 0. " PDD[0] ,Port data direction" "Input,Output"
|
|
elif cpuis("MK02FN64VFM10")||cpuis("MK02FN128VFM10")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GPIOB_PDOR,Port Data Output Register"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " PDO[1]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " PDO[0]_set/clr ,Port data output" "Low level,High level"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "GPIOB_PTOR,Port Toggle Output Register"
|
|
bitfld.long 0x00 1. " PTTO[1] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 0. " PTTO[0] ,Port toggle output" "No effect,Toggle"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "GPIOB_PDIR,Port Data Input Register"
|
|
bitfld.long 0x00 1. " PDI[1] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 0. " PDI[0] ,Port data input" "Low level,High level"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOB_PDDR,Port Data Direction Register"
|
|
bitfld.long 0x00 1. " PDD[1] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 0. " PDD[0] ,Port data direction" "Input,Output"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "GPIO C"
|
|
base ad:0x400FF080
|
|
width 12.
|
|
sif cpuis("MK02FN64VLH10")||cpuis("MK02FN128VLH10")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GPIOC_PDOR,Port Data Output Register"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " PDO[11]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " PDO[10]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " PDO[9]_set/clr ,Port data output" "Low level,High level"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " PDO[8]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " PDO[7]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " PDO[6]_set/clr ,Port data output" "Low level,High level"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " PDO[5]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " PDO[4]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " PDO[3]_set/clr ,Port data output" "Low level,High level"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " PDO[2]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " PDO[1]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " PDO[0]_set/clr ,Port data output" "Low level,High level"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "GPIOC_PTOR,Port Toggle Output Register"
|
|
bitfld.long 0x00 11. " PTTO[11] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 10. " PTTO[10] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 9. " PTTO[9] ,Port toggle output" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PTTO[8] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 7. " PTTO[7] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 6. " PTTO[6] ,Port toggle output" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PTTO[5] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 4. " PTTO[4] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 3. " PTTO[3] ,Port toggle output" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PTTO[2] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 1. " PTTO[1] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 0. " PTTO[0] ,Port toggle output" "No effect,Toggle"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "GPIOC_PDIR,Port Data Input Register"
|
|
bitfld.long 0x00 11. " PDI[11] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 10. " PDI[10] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 9. " PDI[9] ,Port data input" "Low level,High level"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PDI[8] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 7. " PDI[7] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 6. " PDI[6] ,Port data input" "Low level,High level"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PDI[5] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 4. " PDI[4] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 3. " PDI[3] ,Port data input" "Low level,High level"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PDI[2] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 1. " PDI[1] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 0. " PDI[0] ,Port data input" "Low level,High level"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOC_PDDR,Port Data Direction Register"
|
|
bitfld.long 0x00 11. " PDD[11] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 10. " PDD[10] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 9. " PDD[9] ,Port data direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PDD[8] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 7. " PDD[7] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 6. " PDD[6] ,Port data direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PDD[5] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 4. " PDD[4] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 3. " PDD[3] ,Port data direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PDD[2] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 1. " PDD[1] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 0. " PDD[0] ,Port data direction" "Input,Output"
|
|
elif cpuis("MK02FN64VLF10")||cpuis("MK02FN128VLF10")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GPIOC_PDOR,Port Data Output Register"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " PDO[7]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " PDO[6]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " PDO[5]_set/clr ,Port data output" "Low level,High level"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " PDO[4]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " PDO[3]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " PDO[2]_set/clr ,Port data output" "Low level,High level"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " PDO[1]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " PDO[0]_set/clr ,Port data output" "Low level,High level"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "GPIOC_PTOR,Port Toggle Output Register"
|
|
bitfld.long 0x00 7. " PTTO[7] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 6. " PTTO[6] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 5. " PTTO[5] ,Port toggle output" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PTTO[4] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 3. " PTTO[3] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 2. " PTTO[2] ,Port toggle output" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PTTO[1] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 0. " PTTO[0] ,Port toggle output" "No effect,Toggle"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "GPIOC_PDIR,Port Data Input Register"
|
|
bitfld.long 0x00 7. " PDI[7] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 6. " PDI[6] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 5. " PDI[5] ,Port data input" "Low level,High level"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PDI[4] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 3. " PDI[3] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 2. " PDI[2] ,Port data input" "Low level,High level"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PDI[1] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 0. " PDI[0] ,Port data input" "Low level,High level"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOC_PDDR,Port Data Direction Register"
|
|
bitfld.long 0x00 7. " PDD[7] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 6. " PDD[6] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 5. " PDD[5] ,Port data direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PDD[4] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 3. " PDD[3] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 2. " PDD[2] ,Port data direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PDD[1] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 0. " PDD[0] ,Port data direction" "Input,Output"
|
|
elif cpuis("MK02FN64VFM10")||cpuis("MK02FN128VFM10")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GPIOC_PDOR,Port Data Output Register"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " PDO[7]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " PDO[6]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " PDO[5]_set/clr ,Port data output" "Low level,High level"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " PDO[4]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " PDO[3]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " PDO[2]_set/clr ,Port data output" "Low level,High level"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " PDO[1]_set/clr ,Port data output" "Low level,High level"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "GPIOC_PTOR,Port Toggle Output Register"
|
|
bitfld.long 0x00 7. " PTTO[7] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 6. " PTTO[6] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 5. " PTTO[5] ,Port toggle output" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PTTO[4] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 3. " PTTO[3] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 2. " PTTO[2] ,Port toggle output" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PTTO[1] ,Port toggle output" "No effect,Toggle"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "GPIOC_PDIR,Port Data Input Register"
|
|
bitfld.long 0x00 7. " PDI[7] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 6. " PDI[6] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 5. " PDI[5] ,Port data input" "Low level,High level"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PDI[4] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 3. " PDI[3] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 2. " PDI[2] ,Port data input" "Low level,High level"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PDI[1] ,Port data input" "Low level,High level"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOC_PDDR,Port Data Direction Register"
|
|
bitfld.long 0x00 7. " PDD[7] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 6. " PDD[6] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 5. " PDD[5] ,Port data direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PDD[4] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 3. " PDD[3] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 2. " PDD[2] ,Port data direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PDD[1] ,Port data direction" "Input,Output"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "GPIO D"
|
|
base ad:0x400FF0c0
|
|
width 12.
|
|
sif cpuis("MK02FN64VLH10")||cpuis("MK02FN128VLH10")||cpuis("MK02FN64VLF10")||cpuis("MK02FN128VLF10")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GPIOD_PDOR,Port Data Output Register"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " PDO[7]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " PDO[6]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " PDO[5]_set/clr ,Port data output" "Low level,High level"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " PDO[4]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " PDO[3]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " PDO[2]_set/clr ,Port data output" "Low level,High level"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " PDO[1]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " PDO[0]_set/clr ,Port data output" "Low level,High level"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "GPIOD_PTOR,Port Toggle Output Register"
|
|
bitfld.long 0x00 7. " PTTO[7] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 6. " PTTO[6] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 5. " PTTO[5] ,Port toggle output" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PTTO[4] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 3. " PTTO[3] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 2. " PTTO[2] ,Port toggle output" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PTTO[1] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 0. " PTTO[0] ,Port toggle output" "No effect,Toggle"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "GPIOD_PDIR,Port Data Input Register"
|
|
bitfld.long 0x00 7. " PDI[7] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 6. " PDI[6] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 5. " PDI[5] ,Port data input" "Low level,High level"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PDI[4] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 3. " PDI[3] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 2. " PDI[2] ,Port data input" "Low level,High level"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PDI[1] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 0. " PDI[0] ,Port data input" "Low level,High level"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOD_PDDR,Port Data Direction Register"
|
|
bitfld.long 0x00 7. " PDD[7] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 6. " PDD[6] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 5. " PDD[5] ,Port data direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PDD[4] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 3. " PDD[3] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 2. " PDD[2] ,Port data direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PDD[1] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 0. " PDD[0] ,Port data direction" "Input,Output"
|
|
elif cpuis("MK02FN64VFM10")||cpuis("MK02FN128VFM10")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GPIOD_PDOR,Port Data Output Register"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " PDO[7]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " PDO[6]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " PDO[5]_set/clr ,Port data output" "Low level,High level"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " PDO[4]_set/clr ,Port data output" "Low level,High level"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "GPIOD_PTOR,Port Toggle Output Register"
|
|
bitfld.long 0x00 7. " PTTO[7] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 6. " PTTO[6] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 5. " PTTO[5] ,Port toggle output" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PTTO[4] ,Port toggle output" "No effect,Toggle"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "GPIOD_PDIR,Port Data Input Register"
|
|
bitfld.long 0x00 7. " PDI[7] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 6. " PDI[6] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 5. " PDI[5] ,Port data input" "Low level,High level"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PDI[4] ,Port data input" "Low level,High level"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOD_PDDR,Port Data Direction Register"
|
|
bitfld.long 0x00 7. " PDD[7] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 6. " PDD[6] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 5. " PDD[5] ,Port data direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PDD[4] ,Port data direction" "Input,Output"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "GPIO E"
|
|
base ad:0x400FF100
|
|
width 12.
|
|
sif cpuis("MK02FN64VLH10")||cpuis("MK02FN128VLH10")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GPIOE_PDOR,Port Data Output Register"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " PDO[25]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " PDO[24]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PDO[19]_set/clr ,Port data output" "Low level,High level"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " PDO[18]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " PDO[17]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " PDO[16]_set/clr ,Port data output" "Low level,High level"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " PDO[1]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " PDO[0]_set/clr ,Port data output" "Low level,High level"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "GPIOE_PTOR,Port Toggle Output Register"
|
|
bitfld.long 0x00 25. " PTTO[25] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 24. " PTTO[24] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 19. " PTTO[19] ,Port toggle output" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 18. " PTTO[18] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 17. " PTTO[17] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 16. " PTTO[16] ,Port toggle output" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PTTO[1] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 0. " PTTO[0] ,Port toggle output" "No effect,Toggle"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "GPIOE_PDIR,Port Data Input Register"
|
|
bitfld.long 0x00 25. " PDI[25] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 24. " PDI[24] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 19. " PDI[19] ,Port data input" "Low level,High level"
|
|
textline " "
|
|
bitfld.long 0x00 18. " PDI[18] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 17. " PDI[17] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 16. " PDI[16] ,Port data input" "Low level,High level"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PDI[1] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 0. " PDI[0] ,Port data input" "Low level,High level"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOE_PDDR,Port Data Direction Register"
|
|
bitfld.long 0x00 25. " PDI[25] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 24. " PDI[24] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 19. " PDD[19] ,Port data direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 18. " PDD[18] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 17. " PDD[17] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 16. " PDD[16] ,Port data direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PDD[1] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 0. " PDD[0] ,Port data direction" "Input,Output"
|
|
elif cpuis("MK02FN64VLF10")||cpuis("MK02FN128VLF10")||cpuis("MK02FN64VFM10")||cpuis("MK02FN128VFM10")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GPIOE_PDOR,Port Data Output Register"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " PDO[25]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " PDO[24]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PDO[19]_set/clr ,Port data output" "Low level,High level"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " PDO[18]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " PDO[17]_set/clr ,Port data output" "Low level,High level"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " PDO[16]_set/clr ,Port data output" "Low level,High level"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "GPIOE_PTOR,Port Toggle Output Register"
|
|
bitfld.long 0x00 25. " PTTO[25] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 24. " PTTO[24] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 19. " PTTO[19] ,Port toggle output" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 18. " PTTO[18] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 17. " PTTO[17] ,Port toggle output" "No effect,Toggle"
|
|
bitfld.long 0x00 16. " PTTO[16] ,Port toggle output" "No effect,Toggle"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "GPIOE_PDIR,Port Data Input Register"
|
|
bitfld.long 0x00 25. " PDI[25] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 24. " PDI[24] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 19. " PDI[19] ,Port data input" "Low level,High level"
|
|
textline " "
|
|
bitfld.long 0x00 18. " PDI[18] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 17. " PDI[17] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 16. " PDI[16] ,Port data input" "Low level,High level"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOE_PDDR,Port Data Direction Register"
|
|
bitfld.long 0x00 25. " PDI[25] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 24. " PDI[24] ,Port data input" "Low level,High level"
|
|
bitfld.long 0x00 19. " PDD[19] ,Port data direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 18. " PDD[18] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 17. " PDD[17] ,Port data direction" "Input,Output"
|
|
bitfld.long 0x00 16. " PDD[16] ,Port data direction" "Input,Output"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree.end
|
|
tree.end
|
|
textline ""
|