12113 lines
799 KiB
Plaintext
12113 lines
799 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: GD32F3X0 On-Chip Peripherals
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; @Props: Released
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; @Author: NEJ
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; @Changelog: 2022-02-09 NEJ
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; @Manufacturer: GigaDevice - GigaDevice Semiconductor Inc.
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; @Doc: SVD generated based on GD32F3x0.svd
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; @Core: Cortex-M4F
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; @Chip: GD32F330C4, GD32F330C6, GD32F330C8, GD32F330CB, GD32F330F4, GD32F330F6,
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; GD32F330F8, GD32F330G4, GD32F330G6, GD32F330G8, GD32F330K4, GD32F330K6,
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; GD32F330K8, GD32F330R8, GD32F330RB, GD32F350C4, GD32F350C6, GD32F350C8,
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; GD32F350CB, GD32F350G4, GD32F350G6, GD32F350G8, GD32F350K4, GD32F350K6,
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; GD32F350K8, GD32F350R4, GD32F350R6, GD32F350R8, GD32F350RB
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: pergd32f3x0.per 17041 2023-11-21 08:57:08Z pegold $
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autoindent.on center tree
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tree.close "Core Registers (Cortex-M4F)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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tree "System Control"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 12.
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group.long 0x08++0x03
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line.long 0x00 "ACTLR,Auxiliary Control Register"
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bitfld.long 0x00 9. " DISFPCA ,Disables lazy stacking of floating point context" "No,Yes"
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bitfld.long 0x00 8. " DISOOFP ,Disables floating point instructions completing" "No,Yes"
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bitfld.long 0x00 2. " DISFOLD ,Disables folding of IT instructions" "No,Yes"
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textline " "
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bitfld.long 0x00 1. " DISDEFWBUF ,Disables write buffer use during default memory map accesses" "No,Yes"
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bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle instructions" "No,Yes"
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group.long 0x10++0x0B
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line.long 0x00 "SYST_CSR,SysTick Control and Status Register"
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rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
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bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core"
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bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick"
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textline " "
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bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
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line.long 0x04 "SYST_RVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
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line.long 0x08 "SYST_CVR,SysTick Current Value Register"
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rgroup.long 0x1C++0x03
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line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register"
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bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
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bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
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rgroup.long 0xD00++0x03
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line.long 0x00 "CPUID,CPU ID Base Register"
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hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer Code"
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bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,?..."
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bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number"
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bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0xD04++0x23
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line.long 0x00 "ICSR,Interrupt Control State Register"
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bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Inactive,Active"
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bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not pending,Pending"
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bitfld.long 0x00 27. " PENDSVCLR ,Removes the pending status of the PendSV exception" "No effect,Removed"
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textline " "
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bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not pending,Pending"
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bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "No effect,Removed"
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bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active"
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textline " "
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bitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt" "Not pending,Pending"
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hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,Pending ISR Number Field"
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bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active"
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textline " "
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hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception"
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line.long 0x04 "VTOR,Vector Table Offset Register"
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hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Vector table address"
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line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
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hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key"
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rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big"
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bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
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textline " "
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bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested"
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bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "No effect,Clear"
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bitfld.long 0x08 0. " VECTRESET ,System Reset" "No effect,Reset"
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line.long 0x0C "SCR,System Control Register"
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bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
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bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
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bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
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line.long 0x10 "CCR,Configuration Control Register"
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bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled"
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bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled"
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bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte/no adjustment,8-byte/adjustment"
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bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI and Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled"
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bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled"
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bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Denied,Allowed"
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bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level"
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line.long 0x14 "SHPR1,SSystem Handler Priority Register 1"
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hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of System Handler 7"
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hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)"
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hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)"
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textline " "
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hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)"
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line.long 0x18 "SHPR2,System Handler Priority Register 2"
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hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)"
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hexmask.long.byte 0x18 16.--23. 1. " PRI_10 ,Priority of System Handler 10"
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hexmask.long.byte 0x18 8.--15. 1. " PRI_9 ,Priority of System Handler 9"
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textline " "
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hexmask.long.byte 0x18 0.--7. 1. " PRI_8 ,Priority of System Handler 8"
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line.long 0x1C "SHPR3,System Handler Priority Register 3"
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hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)"
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hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)"
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hexmask.long.byte 0x1C 8.--15. 1. " PRI_13 ,Priority of System Handler 13"
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textline " "
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hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)"
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line.long 0x20 "SHCSR,System Handler Control and State Register"
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bitfld.long 0x20 18. " USGFAULTENA ,Enable UsageFault" "Disabled,Enabled"
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bitfld.long 0x20 17. " BUSFAULTENA ,Enable BusFault" "Disabled,Enabled"
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bitfld.long 0x20 16. " MEMFAULTENA ,Enable MemManage fault" "Disabled,Enabled"
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textline " "
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bitfld.long 0x20 15. " SVCALLPENDED ,SVCall is pending" "Not pending,Pending"
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bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault is pending" "Not pending,Pending"
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bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage is pending" "Not pending,Pending"
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textline " "
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bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault is pending" "Not pending,Pending"
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bitfld.long 0x20 11. " SYSTICKACT ,SysTick is Active" "Not active,Active"
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bitfld.long 0x20 10. " PENDSVACT ,PendSV is Active" "Not active,Active"
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textline " "
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bitfld.long 0x20 8. " MONITORACT ,Monitor is Active" "Not active,Active"
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bitfld.long 0x20 7. " SVCALLACT ,SVCall is Active" "Not active,Active"
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bitfld.long 0x20 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active"
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textline " "
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bitfld.long 0x20 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active"
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bitfld.long 0x20 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active"
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group.byte 0xD28++0x1
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line.byte 0x00 "MMFSR,MemManage Status Register"
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bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x00 4. " MSTKERR ,tacking Access Violations" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x00 3. " MUNSTKERR ,Unstack Access Violations" "Not occurred,Occurred"
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bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred"
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bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred"
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line.byte 0x01 "BFSR,Bus Fault Status Register"
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bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x01 4. " STKERR ,Derived bus fault(exception entry)" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault(exception return)" "Not occurred,Occurred"
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bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred"
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bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred"
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group.word 0xD2A++0x1
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line.word 0x00 "USAFAULT,Usage Fault Status Register"
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bitfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error"
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bitfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error"
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bitfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error"
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textline " "
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bitfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error"
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bitfld.word 0x00 1. " INVSTATE ,Invalid Combination of EPSR and Instruction" "No error,Error"
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bitfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error"
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group.long 0xD2C++0x07
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line.long 0x00 "HFSR,Hard Fault Status Register"
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bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred"
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bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority" "Not occurred,Occurred"
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bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred"
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line.long 0x04 "DFSR,Debug Fault Status Register"
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bitfld.long 0x04 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of EDBGRQ" "Not asserted,Asserted"
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bitfld.long 0x04 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred"
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bitfld.long 0x04 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not occurred,Occurred"
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textline " "
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bitfld.long 0x04 1. " BKPT ,BKPT Flag" "Not executed,Executed"
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bitfld.long 0x04 0. " HALTED ,Indicates a debug event generated by either" "Not requested,Requested"
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group.long 0xD34++0x0B
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line.long 0x00 "MMFAR,MemManage Fault Address Register"
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line.long 0x04 "BFAR,BusFault Address Register"
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line.long 0x08 "AFSR,Auxiliary Fault Status Register"
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group.long 0xD88++0x03
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line.long 0x00 "CPACR,Coprocessor Access Control Register"
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bitfld.long 0x00 22.--23. " CP11 ,Access privileges for coprocessor 11" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Access denied,Privileged only,Reserved,Full access"
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textline " "
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bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Access denied,Privileged only,Reserved,Full access"
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textline " "
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bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Access denied,Privileged only,Reserved,Full access"
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textline " "
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bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Access denied,Privileged only,Reserved,Full access"
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wgroup.long 0xF00++0x03
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line.long 0x00 "STIR,Software Trigger Interrupt Register"
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hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered"
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width 10.
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tree "Feature Registers"
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rgroup.long 0xD40++0x0B
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line.long 0x00 "ID_PFR0,Processor Feature Register 0"
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bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..."
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bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
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line.long 0x04 "ID_PFR1,Processor Feature Register 1"
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bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
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line.long 0x08 "ID_DFR0,Debug Feature Register 0"
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bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..."
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hgroup.long 0xD4C++0x03
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hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
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rgroup.long 0xD50++0x03
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line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
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bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..."
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bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
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bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..."
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textline " "
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bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored"
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bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..."
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hgroup.long 0xD54++0x03
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hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
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rgroup.long 0xD58++0x03
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line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
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bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
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rgroup.long 0xD60++0x13
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line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
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bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
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bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
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bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..."
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textline " "
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bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
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bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
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bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
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line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1"
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bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
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bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
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bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
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textline " "
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bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..."
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line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2"
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bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
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bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
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bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..."
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textline " "
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bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..."
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bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
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bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
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textline " "
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bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..."
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line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3"
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bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
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bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
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bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
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textline " "
|
|
bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
|
|
bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..."
|
|
line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4"
|
|
bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..."
|
|
bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..."
|
|
textline " "
|
|
bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
|
|
bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..."
|
|
bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..."
|
|
tree.end
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0C "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0C "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported"
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
|
|
group.long 0xD9C++0x03 "Region 8"
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
|
|
group.long 0xD9C++0x03 "Region 9"
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
|
|
group.long 0xD9C++0x03 "Region 10"
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
|
|
group.long 0xD9C++0x03 "Region 11"
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
|
|
group.long 0xD9C++0x03 "Region 12"
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
|
|
group.long 0xD9C++0x03 "Region 13"
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
|
|
group.long 0xD9C++0x03 "Region 14"
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
|
|
group.long 0xD9C++0x03 "Region 15"
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 6.
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..."
|
|
tree "Interrupt Enable Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x100++0x7
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x100++0x0B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x100++0x13
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x100++0x1B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x100++0x1F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x100++0x1F
|
|
hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x200++0x0B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x200++0x0F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x200++0x13
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x200++0x17
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x200++0x1B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x200++0x1F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x200++0x1F
|
|
hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Active Bit Registers"
|
|
width 9.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
rgroup.long 0x300++0x07
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
rgroup.long 0x300++0x0B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
rgroup.long 0x300++0x0F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
rgroup.long 0x300++0x13
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
rgroup.long 0x300++0x17
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
rgroup.long 0x300++0x1B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
rgroup.long 0x300++0x1F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x300++0x1F
|
|
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
hide.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
hide.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
hide.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
hide.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
hide.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
hide.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
hide.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x400++0x1F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x400++0x3F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x400++0x5F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x400++0x7F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x400++0x9F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x400++0xBF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x400++0xDF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x400++0xEF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
line.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
|
|
hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
|
|
hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
|
|
hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
|
|
line.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
|
|
hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
|
|
hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
|
|
hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
|
|
line.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
|
|
hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
|
|
hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
|
|
hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
|
|
line.long 0xEC "IPR59,Interrupt Priority Register"
|
|
hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
|
|
hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
|
|
hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
|
|
hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
|
|
else
|
|
hgroup.long 0x400++0xEF
|
|
hide.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hide.long 0xC "IPR3,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hide.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hide.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hide.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hide.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hide.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hide.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hide.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hide.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hide.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hide.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hide.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hide.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hide.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hide.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hide.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hide.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hide.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hide.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hide.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hide.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hide.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hide.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hide.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hide.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hide.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hide.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hide.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hide.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hide.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hide.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hide.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hide.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hide.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hide.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hide.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hide.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hide.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hide.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hide.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hide.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hide.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hide.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hide.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hide.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hide.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hide.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hide.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hide.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hide.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hide.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hide.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hide.long 0xEC "IPR59,Interrupt Priority Register"
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
sif CORENAME()=="CORTEXM4F"
|
|
tree "Floating-point Unit (FPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 8.
|
|
group.long 0xF34++0x0B
|
|
line.long 0x00 "FPCCR,Floating-Point Context Control Register"
|
|
bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread"
|
|
bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged"
|
|
bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active"
|
|
line.long 0x04 "FPCAR,Floating-Point Context Address Register"
|
|
hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame"
|
|
line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register"
|
|
bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative"
|
|
bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation"
|
|
bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero"
|
|
rgroup.long 0xF40++0x07
|
|
line.long 0x00 "MVFR0,Media and FP Feature Register 0"
|
|
bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..."
|
|
bitfld.long 0x00 24.--27. " SRTERR ,Indicates the hardware support for FP short vectors" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..."
|
|
bitfld.long 0x00 12.--15. " FPEXTRP ,Indicates whether the FP hardware implementation supports exception trapping" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..."
|
|
line.long 0x04 "MVFR1,Media and FP Feature Register 1"
|
|
bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..."
|
|
bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..."
|
|
bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Full denorm. num. arit.,?..."
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
endif
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 7.
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Debug Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
|
|
eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
|
|
eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated"
|
|
newline
|
|
eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
|
|
eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
|
|
newline
|
|
hgroup.long 0xDF0++0x03
|
|
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
in
|
|
newline
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write"
|
|
hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register or special-purpose register or Floating-point extension register"
|
|
group.long 0xDF8++0x03
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Flash Patch and Breakpoint Unit (FPB)"
|
|
sif COMPonent.AVAILABLE("FPB")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
|
|
width 10.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Version 1,Version 2,?..."
|
|
rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127"
|
|
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
|
|
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
|
|
textline ""
|
|
line.long 0x04 "FP_REMAP,Flash Patch Remap Register"
|
|
bitfld.long 0x04 29. " RMPSPT ,Indicates whether the FPB unit supports flash patch remap" "Not supported,SRAM region"
|
|
hexmask.long.tbyte 0x04 5.--28. 0x20 " REMAP ,Remap Base Address Field"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "FPB component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 15.
|
|
group.long 0x00++0x1B
|
|
line.long 0x00 "DWT_CTRL,Control Register"
|
|
rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
|
|
rbitfld.long 0x00 26. " NOEXTTRIG ,Shows whether the implementation includes external match signals" "Supported,Not supported"
|
|
textline " "
|
|
rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
|
|
rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
|
|
bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PCSAMPLEENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
|
|
bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
|
|
textline " "
|
|
bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled"
|
|
line.long 0x04 "DWT_CYCCNT,Cycle Count Register"
|
|
line.long 0x08 "DWT_CPICNT,CPI Count Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter"
|
|
line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter"
|
|
line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter"
|
|
line.long 0x14 "DWT_LSUCNT,LSU Count Register"
|
|
hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter"
|
|
line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count Register"
|
|
hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
|
|
textline " "
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
line.long 0x04 "DWT_MASK0,DWT Mask Registers 0"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x20)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x180)==0x80)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet,UNPREDICTABLE,UNPREDICTABLE,Generate watchpoint debug event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,CMPMATCH[N] event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x30)++0x07
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
line.long 0x04 "DWT_MASK1,DWT Mask Registers 1"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x20)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x00)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x40)++0x07
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
line.long 0x04 "DWT_MASK2,DWT Mask Registers 2"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x20)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x00)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x50)++0x07
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
line.long 0x04 "DWT_MASK3,DWT Mask Registers 3"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x20)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x00)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
tree "ADC (Analog to digital converter)"
|
|
base ad:0x40012400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "STAT,status register"
|
|
bitfld.long 0x00 4. "STRC,Start flag of regular channel group" "0,1"
|
|
bitfld.long 0x00 3. "STIC,Start flag of inserted channel group" "0,1"
|
|
bitfld.long 0x00 2. "EOIC,End of inserted group conversion flag" "0,1"
|
|
bitfld.long 0x00 1. "EOC,End of group conversion flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "WDE,Analog watchdog flag" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 24.--25. "DRES,ADC resolution" "0,1,2,3"
|
|
bitfld.long 0x00 23. "RWDEN,Analog watchdog enable on regular channels" "0,1"
|
|
bitfld.long 0x00 22. "IWDEN,Analog watchdog enable on injected channels" "0,1"
|
|
bitfld.long 0x00 13.--15. "DISNUM,Discontinuous mode channel count" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 12. "DISIC,Discontinuous mode on injected channels" "0,1"
|
|
bitfld.long 0x00 11. "DISRC,Discontinuous mode on regular channels" "0,1"
|
|
bitfld.long 0x00 10. "ICA,Automatic injected group conversion" "0,1"
|
|
bitfld.long 0x00 9. "WDSC,Enable the watchdog on a single channel in scan mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "SM,Scan mode" "0,1"
|
|
bitfld.long 0x00 7. "EOICIE,Interrupt enable for injected channels" "0,1"
|
|
bitfld.long 0x00 6. "WDEIE,Analog watchdog interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "EOCIE,Interrupt enable for EOC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--4. "WDCHSEL,Analog watchdog channel select bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 24. "VBATEN,enable/disable the VBAT channel" "0,1"
|
|
bitfld.long 0x00 23. "TSVREN,Temperature sensor and VREFINT enable" "0,1"
|
|
bitfld.long 0x00 22. "SWRCST,Start conversion of regular channels" "0,1"
|
|
bitfld.long 0x00 21. "SWICST,Start conversion of injected channels" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "ETERC,External trigger conversion mode for regular channels" "0,1"
|
|
bitfld.long 0x00 17.--19. "ETSRC,External event select for regular group" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "ETEIC,External trigger conversion mode for injected channels" "0,1"
|
|
bitfld.long 0x00 12.--14. "ETSIC,External event select for injected group" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 11. "DAL,Data alignment" "0,1"
|
|
bitfld.long 0x00 8. "DMA,Direct memory access mode" "0,1"
|
|
bitfld.long 0x00 3. "RSTCLB,Reset calibration" "0,1"
|
|
bitfld.long 0x00 2. "CLB,A/D calibration" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CTN,Continuous conversion" "0,1"
|
|
bitfld.long 0x00 0. "ADCON,A/D converter ON / OFF" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "SAMPT0,Sampling time register 0"
|
|
bitfld.long 0x00 24.--26. "SPT18,Channel 18 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 21.--23. "SPT17,Channel 17 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "SPT16,Channel 16 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15.--17. "SPT15,Channel 15 sample time selection" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 12.--14. "SPT14,Channel 14 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 9.--11. "SPT13,Channel 13 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "SPT12,Channel 12 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3.--5. "SPT11,Channel 11 sample time selection" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "SPT10,Channel 10 sample time selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SAMPT1,Sampling time register 1"
|
|
bitfld.long 0x00 27.--29. "SPT9,Channel 9 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 24.--26. "SPT8,Channel 8 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 21.--23. "SPT7,Channel 7 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. "SPT6,Channel 6 sample time selection" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "SPT5,Channel 5 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "SPT4,Channel 4 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 9.--11. "SPT3,Channel 3 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "SPT2,Channel 2 sample time selection" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "SPT1,Channel 1 sample time selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "SPT0,Channel 0 sample time selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "IOFF0,Inserted channel data offset register 0"
|
|
hexmask.long.word 0x00 0.--11. 1. "IOFF,Data offset for injected channel x"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "IOFF1,Inserted channel data offset register 1"
|
|
hexmask.long.word 0x00 0.--11. 1. "IOFF,Data offset for injected channel x"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "IOFF2,Inserted channel data offset register 2"
|
|
hexmask.long.word 0x00 0.--11. 1. "IOFF,Data offset for injected channel x"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "IOFF3,Inserted channel data offset register 3"
|
|
hexmask.long.word 0x00 0.--11. 1. "IOFF,Data offset for injected channel x"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "WDHT,watchdog higher threshold register"
|
|
hexmask.long.word 0x00 0.--11. 1. "WDHT,Analog watchdog higher threshold"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "WDLT,watchdog lower threshold register"
|
|
hexmask.long.word 0x00 0.--11. 1. "WDLT,Analog watchdog lower threshold"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "RSQ0,regular sequence register 0"
|
|
bitfld.long 0x00 20.--23. "RL,Regular channel sequence length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15.--19. "RSQ15,15th conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 10.--14. "RSQ14,14th conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5.--9. "RSQ13,13th conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 0.--4. "RSQ12,12th conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "RSQ1,regular sequence register 1"
|
|
bitfld.long 0x00 25.--29. "RSQ11,11th conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 20.--24. "RSQ10,10th conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 15.--19. "RSQ9,9th conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 10.--14. "RSQ8,8th conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 5.--9. "RSQ7,7th conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "RSQ6,6th conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "RSQ2,regular sequence register 2"
|
|
bitfld.long 0x00 25.--29. "RSQ5,5th conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 20.--24. "RSQ4,4th conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 15.--19. "RSQ3,3rd conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 10.--14. "RSQ2,2nd conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 5.--9. "RSQ1,1st conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "RSQ0,conversion in regular sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "ISQ,injected sequence register"
|
|
bitfld.long 0x00 20.--21. "IL,Injected sequence length" "0,1,2,3"
|
|
bitfld.long 0x00 15.--19. "ISQ3,3rd conversion in injected sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 10.--14. "ISQ2,2nd conversion in injected sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5.--9. "ISQ1,1st conversion in injected sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 0.--4. "ISQ0,conversion in injected sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x3C++0x03
|
|
line.long 0x00 "IDATA0,injected data register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. "IDATAn,Injected data"
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "IDATA1,injected data register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "IDATAn,Injected data"
|
|
rgroup.long 0x44++0x03
|
|
line.long 0x00 "IDATA2,injected data register 2"
|
|
hexmask.long.word 0x00 0.--15. 1. "IDATAn,Injected data"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "IDATA3,injected data register 3"
|
|
hexmask.long.word 0x00 0.--15. 1. "IDATAn,Injected data"
|
|
rgroup.long 0x4C++0x03
|
|
line.long 0x00 "RDATA,regular data register"
|
|
hexmask.long.word 0x00 0.--15. 1. "RDATA,Regular data"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "OVSAMPCTL,ADC oversample control register"
|
|
bitfld.long 0x00 9. "TOVS,Triggered Oversampling" "0,1"
|
|
bitfld.long 0x00 5.--8. "OVSS,Oversampling shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--4. "OVSR,Oversampling ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. "OVSEN,Oversampler Enable" "0,1"
|
|
tree.end
|
|
tree "CEC (HDMI-CEC controller)"
|
|
base ad:0x40007800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,control register"
|
|
bitfld.long 0x00 2. "ENDOM,ENDOM bit value in the next frame in TX mode" "0,1"
|
|
bitfld.long 0x00 1. "STAOM,Start of sending a message" "0,1"
|
|
bitfld.long 0x00 0. "CECEN,CEC controller Enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CFG,Configuration register"
|
|
bitfld.long 0x00 31. "LMEN,Listen mode enable" "0,1"
|
|
hexmask.long.word 0x00 16.--30. 1. "OAD,Own Address"
|
|
bitfld.long 0x00 8. "SFTOPT,The SFT start option bit" "0,1"
|
|
bitfld.long 0x00 7. "BCNG,Do not generate Error-bit in broadcast message" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "BPLEG,Generate an Error-bit when detected BPLE in singlecast" "0,1"
|
|
bitfld.long 0x00 5. "BREG,Generate an Error-bit when detected BRE in singlecast" "0,1"
|
|
bitfld.long 0x00 4. "BRES,Whether stop receive message when detected BRE" "0,1"
|
|
bitfld.long 0x00 3. "RTOL,Reception bit timing tolerance" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "SFT,Signal Free Time" "0,1,2,3,4,5,6,7"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "TDATA,Transmit data register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "TDATA,Tx Data register"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "RDATA,Rx Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "RDATA,CEC Rx Data Register"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INTF,Interrupt Flag Register"
|
|
bitfld.long 0x00 12. "TAERR,Tx-Missing acknowledge error" "0,1"
|
|
bitfld.long 0x00 11. "TERR,Tx-Error" "0,1"
|
|
bitfld.long 0x00 10. "TU,Tx-Buffer Underrun" "0,1"
|
|
bitfld.long 0x00 9. "TEND,End of Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "TBR,Tx-Byte Request" "0,1"
|
|
bitfld.long 0x00 7. "ARBF,Arbitration fail" "0,1"
|
|
bitfld.long 0x00 6. "RAE,Rx Acknowledge error" "0,1"
|
|
bitfld.long 0x00 5. "BPLE,Bit Period Long Error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "BPSE,Bit period short error" "0,1"
|
|
bitfld.long 0x00 3. "BRE,Bit rising error" "0,1"
|
|
bitfld.long 0x00 2. "RO,Rx-Overrun" "0,1"
|
|
bitfld.long 0x00 1. "REND,End Of Reception" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "BR,Rx-Byte Received" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "INTEN,interrupt enable register"
|
|
bitfld.long 0x00 12. "TAERRIE,Tx-Missing Acknowledge Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 11. "TERRIE,Tx-Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 10. "TUIE,Tx-Underrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "TXENDIE,Tx-End of message interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "TBRIE,Tx-Byte Request Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 7. "ARBFIE,ARBF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 6. "RAEIE,Rx-Missing Acknowledge Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 5. "BPLEIE,Long Bit Period Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "BPSEIE,Short Bit Period Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. "BREIE,Bit Rising Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. "ROIE,Rx-Buffer Overrun Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. "RENDIE,End Of Reception Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "BRIE,Rx-Byte Received Interrupt Enable" "0,1"
|
|
tree.end
|
|
tree "COMPARATOR (Comparator)"
|
|
base ad:0x4001001C
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CS,control and status register"
|
|
bitfld.long 0x00 31. "CMP1LK,Comparator 1 lock" "0,1"
|
|
rbitfld.long 0x00 30. "CMP1O,Comparator 1 output" "0,1"
|
|
bitfld.long 0x00 28.--29. "CMP1HST,Comparator 1 hysteresis" "0,1,2,3"
|
|
bitfld.long 0x00 27. "CMP1PL,Comparator 1 output polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24.--26. "CMP1OSEL,Comparator 1 output selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 23. "WNDEN,Window mode enable" "0,1"
|
|
bitfld.long 0x00 20.--22. "CMP1MSEL,Comparator 1 inverting input selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--19. "CMP1M,Comparator 1 mode" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 16. "CMP1EN,Comparator 1 enable" "0,1"
|
|
bitfld.long 0x00 15. "CMP0LK,Comparator 0 lock" "0,1"
|
|
rbitfld.long 0x00 14. "CMP0O,Comparator 0 output" "0,1"
|
|
bitfld.long 0x00 12.--13. "CMP0HST,Comparator 0 hysteresis" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 11. "CMP0PL,Polarity of comparator 0 output" "0,1"
|
|
bitfld.long 0x00 8.--10. "CMP0OSEL,Comparator 0 output selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--6. "CMP0MSEL,Comparator 0 input selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 2.--3. "CMP0M,Comparator 0 mode" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 1. "CMP0SW,Comparator 0 switch" "0,1"
|
|
bitfld.long 0x00 0. "CMP0EN,Comparator 0 enable" "0,1"
|
|
tree.end
|
|
tree "CRC (cyclic redundancy check calculation unit)"
|
|
base ad:0x40023000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DATA,Data register"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,CRC calculation result bits"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "FDATA,Free data register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "FDATA,General-purpose 8-bit data register bits"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTL,Control register"
|
|
bitfld.long 0x00 7. "REV_O,Reverse output data" "0,1"
|
|
bitfld.long 0x00 5.--6. "REV_I,Reverse input data" "0,1,2,3"
|
|
bitfld.long 0x00 3.--4. "PS,Size of polynomial" "0,1,2,3"
|
|
bitfld.long 0x00 0. "RST,reset bit" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "IDATA,Initialization Data Register"
|
|
hexmask.long 0x00 0.--31. 1. "IDATA,CRC calculation initial value"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "POLY,Polynomial register"
|
|
hexmask.long 0x00 0.--31. 1. "POLY,User configurable polynomial value"
|
|
tree.end
|
|
tree "CTC (Clock trim controller)"
|
|
base ad:0x4000C800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,Control Register 0"
|
|
bitfld.long 0x00 8.--13. "TRIMVALUE,IRC48M trim value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 7. "SWREFPUL,Software reference source sync pulse" "0,1"
|
|
bitfld.long 0x00 6. "AUTOTRIM,Hardware automatically trim mode" "0,1"
|
|
bitfld.long 0x00 5. "CNTEN,CTC counter enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "EREFIE,EREFIF interrupt enable" "0,1"
|
|
bitfld.long 0x00 2. "ERRIE,Error (ERRIF) interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CKWARNIE,Clock trim warning (CKWARNIF) interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "CKOKIE,Clock trim OK (CKOKIF) interrupt enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,Control Register 1"
|
|
bitfld.long 0x00 31. "REFPOL,Reference signal source polarity" "0,1"
|
|
bitfld.long 0x00 28.--29. "REFSEL,Reference signal source selection" "0,1,2,3"
|
|
bitfld.long 0x00 24.--26. "REFPSC,Reference signal source prescaler" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 16.--23. 1. "CKLIM,Clock trim base limit value"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "RLVALUE,CTC counter reload value"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "STAT,Status Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "REFCAP,CTC counter capture when reference sync pulse"
|
|
bitfld.long 0x00 15. "REFDIR,CTC trim counter direction when reference sync pulse" "0,1"
|
|
bitfld.long 0x00 10. "TRIMERR,Trim value error bit" "0,1"
|
|
bitfld.long 0x00 9. "REFMISS,Reference sync pulse miss" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "CKERR,Clock trim error bit" "0,1"
|
|
bitfld.long 0x00 3. "EREFIF,Expect reference interrupt flag" "0,1"
|
|
bitfld.long 0x00 2. "ERRIF,Error interrupt flag" "0,1"
|
|
bitfld.long 0x00 1. "CKWARNIF,Clock trim warning interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "CKOKIF,Clock trim OK interrupt flag" "0,1"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "INTC,Interrupt clear Register"
|
|
bitfld.long 0x00 3. "EREFIC,EREFIF interrupt clear bit" "0,1"
|
|
bitfld.long 0x00 2. "ERRIC,ERRIF interrupt clear bit" "0,1"
|
|
bitfld.long 0x00 1. "CKWARNIC,CKWARNIF interrupt clear bit" "0,1"
|
|
bitfld.long 0x00 0. "CKOKIC,CKOKIF interrupt clear bit" "0,1"
|
|
tree.end
|
|
tree "DAC (Digital-to-analog converter)"
|
|
base ad:0x40007400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,control register"
|
|
bitfld.long 0x00 13. "DDUDRIE,DAC DMA underrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 12. "DDMAEN,DAC DMA enable" "0,1"
|
|
bitfld.long 0x00 8.--11. "DWBW,DAC noise wave bit width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 6.--7. "DWM,DAC noise wave mode" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "DTSEL,DAC trigger selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 2. "DTEN,DAC trigger enable" "0,1"
|
|
bitfld.long 0x00 1. "DBOFF,DAC output buffer disable" "0,1"
|
|
bitfld.long 0x00 0. "DEN,DAC enable" "0,1"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "SWT,software trigger register"
|
|
bitfld.long 0x00 0. "SWTR,DAC software trigger" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "DAC_R12DH,DAC 12-bit right-aligned data holding register"
|
|
hexmask.long.word 0x00 0.--11. 1. "DAC_DH,DAC 12-bit right-aligned data"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DAC_L12DH,DAC 12-bit left aligned data holding register"
|
|
hexmask.long.word 0x00 4.--15. 1. "DAC_DH,DAC 12-bit left-aligned data"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "DAC_R8DH,DAC 8-bit right aligned data holding register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DAC_DH,DAC 8-bit right-aligned data"
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "DAC_DO,DAC data output register"
|
|
hexmask.long.word 0x00 0.--11. 1. "DAC_DO,DAC data output"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "STAT,status register"
|
|
bitfld.long 0x00 13. "DDUDR,DAC DMA underrun flag" "0,1"
|
|
tree.end
|
|
tree "DBG (Debug support)"
|
|
base ad:0xE0042000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "ID,MCU Device ID Code Register"
|
|
hexmask.long 0x00 0.--31. 1. "ID_CODE,DBG ID code register"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL0,Debug Control Register 0"
|
|
bitfld.long 0x00 27. "TIMER13_HOLD,Timer 13 hold register" "0,1"
|
|
bitfld.long 0x00 19. "TIMER5_HOLD,Timer 5 hold register" "0,1"
|
|
bitfld.long 0x00 16. "I2C1_HOLD,I2C1 hold register" "0,1"
|
|
bitfld.long 0x00 15. "I2C0_HOLD,I2C0 hold register" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "TIMER2_HOLD,Timer 2 hold register" "0,1"
|
|
bitfld.long 0x00 11. "TIMER1_HOLD,Timer 1 hold register" "0,1"
|
|
bitfld.long 0x00 10. "TIMER0_HOLD,Timer 0 hold register" "0,1"
|
|
bitfld.long 0x00 9. "WWDGT_HOLD,WWDGT hold register" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "FWDGT_HOLD,FWDGT hold register" "0,1"
|
|
bitfld.long 0x00 2. "STB_HOLD,Standby mode hold Mode" "0,1"
|
|
bitfld.long 0x00 1. "DSLP_HOLD,DEEPSLEEP mode hold Mode" "0,1"
|
|
bitfld.long 0x00 0. "SLP_HOLD,Sleep mode hold register" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTL1,Debug Control Register 1"
|
|
bitfld.long 0x00 18. "TIMER16_HOLD,Timer 16 hold register" "0,1"
|
|
bitfld.long 0x00 17. "TIMER15_HOLD,Timer 15 hold register" "0,1"
|
|
bitfld.long 0x00 16. "TIMER14_HOLD,Timer 14 hold register" "0,1"
|
|
bitfld.long 0x00 10. "RTC_HOLD,RTC hold register" "0,1"
|
|
tree.end
|
|
tree "DMA (DMA controller)"
|
|
base ad:0x40020000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "INTF,DMA interrupt flag register (DMA_INTF)"
|
|
bitfld.long 0x00 27. "ERRIF6,Channel 6 Error flag" "0,1"
|
|
bitfld.long 0x00 26. "HTFIF6,Channel 6 Half Transfer Finish flag" "0,1"
|
|
bitfld.long 0x00 25. "FTFIF6,Channel 6 Full Transfer Finish flag" "0,1"
|
|
bitfld.long 0x00 24. "GIF6,Channel 6 Global interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "ERRIF5,Channel 5 Error flag" "0,1"
|
|
bitfld.long 0x00 22. "HTFIF5,Channel 5 Half Transfer Finish flag" "0,1"
|
|
bitfld.long 0x00 21. "FTFIF5,Channel 5 Full Transfer Finish flag" "0,1"
|
|
bitfld.long 0x00 20. "GIF5,Channel 5 Global interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "ERRIF4,Channel 4 Error flag" "0,1"
|
|
bitfld.long 0x00 18. "HTFIF4,Channel 4 Half Transfer Finish flag" "0,1"
|
|
bitfld.long 0x00 17. "FTFIF4,Channel 4 Full Transfer Finish flag" "0,1"
|
|
bitfld.long 0x00 16. "GIF4,Channel 4 Global interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "ERRIF3,Channel 3 Error flag" "0,1"
|
|
bitfld.long 0x00 14. "HTFIF3,Channel 3 Half Transfer Finish flag" "0,1"
|
|
bitfld.long 0x00 13. "FTFIF3,Channel 3 Full Transfer Finish flag" "0,1"
|
|
bitfld.long 0x00 12. "GIF3,Channel 3 Global interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "ERRIF2,Channel 2 Error flag" "0,1"
|
|
bitfld.long 0x00 10. "HTFIF2,Channel 2 Half Transfer Finish flag" "0,1"
|
|
bitfld.long 0x00 9. "FTFIF2,Channel 2 Full Transfer Finish flag" "0,1"
|
|
bitfld.long 0x00 8. "GIF2,Channel 2 Global interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "ERRIF1,Channel 1 Error flag" "0,1"
|
|
bitfld.long 0x00 6. "HTFIF1,Channel 1 Half Transfer Finish flag" "0,1"
|
|
bitfld.long 0x00 5. "FTFIF1,Channel 1 Full Transfer Finish flag" "0,1"
|
|
bitfld.long 0x00 4. "GIF1,Channel 1 Global interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ERRIF0,Channel 0 Error flag" "0,1"
|
|
bitfld.long 0x00 2. "HTFIF0,Channel 0 Half Transfer Finish flag" "0,1"
|
|
bitfld.long 0x00 1. "FTFIF0,Channel 0 Full Transfer Finish flag" "0,1"
|
|
bitfld.long 0x00 0. "GIF0,Channel 0 Global interrupt flag" "0,1"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "INTC,DMA interrupt flag clear register (DMA_INTC)"
|
|
bitfld.long 0x00 27. "ERRIFC6,Channel 6 Error clear" "0,1"
|
|
bitfld.long 0x00 26. "HTFIFC6,Channel 6 Half Transfer clear" "0,1"
|
|
bitfld.long 0x00 25. "FTFIFC6,Channel 6 Full Transfer Finish clear" "0,1"
|
|
bitfld.long 0x00 24. "GIFC6,Channel 6 Global interrupt flag clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "ERRIFC5,Channel 5 Error clear" "0,1"
|
|
bitfld.long 0x00 22. "HTFIFC5,Channel 5 Half Transfer clear" "0,1"
|
|
bitfld.long 0x00 21. "FTFIFC5,Channel 5 Full Transfer Finish clear" "0,1"
|
|
bitfld.long 0x00 20. "GIFC5,Channel 5 Global interrupt flag clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "ERRIFC4,Channel 4 Error clear" "0,1"
|
|
bitfld.long 0x00 18. "HTFIFC4,Channel 4 Half Transfer clear" "0,1"
|
|
bitfld.long 0x00 17. "FTFIFC4,Channel 4 Full Transfer Finish clear" "0,1"
|
|
bitfld.long 0x00 16. "GIFC4,Channel 4 Global interrupt flag clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "ERRIFC3,Channel 3 Error clear" "0,1"
|
|
bitfld.long 0x00 14. "HTFIFC3,Channel 3 Half Transfer clear" "0,1"
|
|
bitfld.long 0x00 13. "FTFIFC3,Channel 3 Full Transfer Finish clear" "0,1"
|
|
bitfld.long 0x00 12. "GIFC3,Channel 3 Global interrupt flag clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "ERRIFC2,Channel 2 Error clear" "0,1"
|
|
bitfld.long 0x00 10. "HTFIFC2,Channel 2 Half Transfer clear" "0,1"
|
|
bitfld.long 0x00 9. "FTFIFC2,Channel 2 Full Transfer Finish clear" "0,1"
|
|
bitfld.long 0x00 8. "GIFC2,Channel 2 Global interrupt flag clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "ERRIFC1,Channel 1 Error clear" "0,1"
|
|
bitfld.long 0x00 6. "HTFIFC1,Channel 1 Half Transfer clear" "0,1"
|
|
bitfld.long 0x00 5. "FTFIFC1,Channel 1 Full Transfer Finish clear" "0,1"
|
|
bitfld.long 0x00 4. "GIFC1,Channel 1 Global interrupt flag clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ERRIFC0,Channel 0 Error clear" "0,1"
|
|
bitfld.long 0x00 2. "HTFIFC0,Channel 0 Half Transfer clear" "0,1"
|
|
bitfld.long 0x00 1. "FTFIFC0,Channel 0 Full Transfer Finish clear" "0,1"
|
|
bitfld.long 0x00 0. "GIFC0,Channel 0 Global interrupt flag clear" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CH0CTL,DMA channel configuration register (DMA_CH0CTL)"
|
|
bitfld.long 0x00 14. "M2M,Memory to memory mode" "0,1"
|
|
bitfld.long 0x00 12.--13. "PRIO,Priority Level of this channel" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "MWIDTH,Transfer data size of memory" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "PWIDTH,Transfer data size of peripheral" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 7. "MNAGA,Next address generation algorithm of memory" "0,1"
|
|
bitfld.long 0x00 6. "PNAGA,Next address generation algorithm of peripheral" "0,1"
|
|
bitfld.long 0x00 5. "CMEN,Circular mode enable" "0,1"
|
|
bitfld.long 0x00 4. "DIR,Transfer direction" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ERRIE,Transfer access error interrupt enable" "0,1"
|
|
bitfld.long 0x00 2. "HTFIE,Half Transfer Finish interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "FTFIE,Full Transfer Finish interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "CHEN,Channel enable" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CH0CNT,DMA channel 0 counter register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Transfer counter"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CH0PADDR,DMA channel 0 peripheral base address register"
|
|
hexmask.long 0x00 0.--31. 1. "PADDR,Peripheral base address"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CH0MADDR,DMA channel 0 memory base address register"
|
|
hexmask.long 0x00 0.--31. 1. "MADDR,Memory address"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CH1CTL,DMA channel configuration register (DMA_CH1CTL)"
|
|
bitfld.long 0x00 14. "M2M,Memory to memory mode" "0,1"
|
|
bitfld.long 0x00 12.--13. "PRIO,Priority Level of this channel" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "MWIDTH,Transfer data size of memory" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "PWIDTH,Transfer data size of peripheral" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 7. "MNAGA,Next address generation algorithm of memory" "0,1"
|
|
bitfld.long 0x00 6. "PNAGA,Next address generation algorithm of peripheral" "0,1"
|
|
bitfld.long 0x00 5. "CMEN,Circular mode enable" "0,1"
|
|
bitfld.long 0x00 4. "DIR,Transfer direction" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x00 2. "HTFIE,Half Transfer Finish interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "FTFIE,Full Transfer Finish interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "CHEN,Channel enable" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CH1CNT,DMA channel 1 counter register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Transfer counter"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CH1PADDR,DMA channel 1 peripheral base address register"
|
|
hexmask.long 0x00 0.--31. 1. "PADDR,Peripheral base address"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CH1MADDR,DMA channel 1 memory base address register"
|
|
hexmask.long 0x00 0.--31. 1. "MADDR,Memory address"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CH2CTL,DMA channel configuration register (DMA_CH2CTL)"
|
|
bitfld.long 0x00 14. "M2M,Memory to memory mode" "0,1"
|
|
bitfld.long 0x00 12.--13. "PRIO,Priority Level of this channel" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "MWIDTH,Transfer data size of memory" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "PWIDTH,Transfer data size of peripheral" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 7. "MNAGA,Next address generation algorithm of memory" "0,1"
|
|
bitfld.long 0x00 6. "PNAGA,Next address generation algorithm of peripheral" "0,1"
|
|
bitfld.long 0x00 5. "CMEN,Circular mode enable" "0,1"
|
|
bitfld.long 0x00 4. "DIR,Transfer direction" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x00 2. "HTFIE,Half Transfer Finish interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "FTFIE,Full Transfer Finish interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "CHEN,Channel enable" "0,1"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CH2CNT,DMA channel 2 counter register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Transfer counter"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CH2PADDR,DMA channel 2 peripheral base address register"
|
|
hexmask.long 0x00 0.--31. 1. "PADDR,Peripheral base address"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "CH2MADDR,DMA channel 2 memory base address register"
|
|
hexmask.long 0x00 0.--31. 1. "MADDR,Memory address"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CH3CTL,DMA channel configuration register (DMA_CH3CTL)"
|
|
bitfld.long 0x00 14. "M2M,Memory to memory mode" "0,1"
|
|
bitfld.long 0x00 12.--13. "PRIO,Priority Level of this channel" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "MWIDTH,Transfer data size of memory" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "PWIDTH,Transfer data size of peripheral" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 7. "MNAGA,Next address generation algorithm of memory" "0,1"
|
|
bitfld.long 0x00 6. "PNAGA,Next address generation algorithm of peripheral" "0,1"
|
|
bitfld.long 0x00 5. "CMEN,Circular mode enable" "0,1"
|
|
bitfld.long 0x00 4. "DIR,Transfer direction" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x00 2. "HTFIE,Half Transfer Finish interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "FTFIE,Full Transfer Finish interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "CHEN,Channel enable" "0,1"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "CH3CNT,DMA channel 3 counter register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Transfer counter"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "CH3PADDR,DMA channel 3 peripheral base address register"
|
|
hexmask.long 0x00 0.--31. 1. "PADDR,Peripheral base address"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "CH3MADDR,DMA channel 3 memory base address register"
|
|
hexmask.long 0x00 0.--31. 1. "MADDR,Memory address"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "CH4CTL,DMA channel configuration register (DMA_CH4CTL)"
|
|
bitfld.long 0x00 14. "M2M,Memory to memory mode" "0,1"
|
|
bitfld.long 0x00 12.--13. "PRIO,Priority Level of this channel" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "MWIDTH,Transfer data size of memory" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "PWIDTH,Transfer data size of peripheral" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 7. "MNAGA,Next address generation algorithm of memory" "0,1"
|
|
bitfld.long 0x00 6. "PNAGA,Next address generation algorithm of peripheral" "0,1"
|
|
bitfld.long 0x00 5. "CMEN,Circular mode enable" "0,1"
|
|
bitfld.long 0x00 4. "DIR,Transfer direction" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x00 2. "HTFIE,Half Transfer Finish interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "FTFIE,Full Transfer Finish interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "CHEN,Channel enable" "0,1"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "CH4CNT,DMA channel 4 counter register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Transfer counter"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "CH4PADDR,DMA channel 4 peripheral base address register"
|
|
hexmask.long 0x00 0.--31. 1. "PADDR,Peripheral base address"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "CH4MADDR,DMA channel 4 memory base address register"
|
|
hexmask.long 0x00 0.--31. 1. "MADDR,Memory address"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "CH5CTL,DMA channel configuration register (DMA_CH5CTL)"
|
|
bitfld.long 0x00 14. "M2M,Memory to memory mode" "0,1"
|
|
bitfld.long 0x00 12.--13. "PRIO,Priority Level of this channel" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "MWIDTH,Transfer data size of memory" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "PWIDTH,Transfer data size of peripheral" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 7. "MNAGA,Next address generation algorithm of memory" "0,1"
|
|
bitfld.long 0x00 6. "PNAGA,Next address generation algorithm of peripheral" "0,1"
|
|
bitfld.long 0x00 5. "CMEN,Circular mode enable" "0,1"
|
|
bitfld.long 0x00 4. "DIR,Transfer direction" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x00 2. "HTFIE,Half Transfer Finish interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "FTFIE,Full Transfer Finish interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "CHEN,Channel enable" "0,1"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "CH5CNT,DMA channel 5 counter register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Transfer counter"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "CH5PADDR,DMA channel 5 peripheral base address register"
|
|
hexmask.long 0x00 0.--31. 1. "PADDR,Peripheral base address"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "CH5MADDR,DMA channel 5 memory base address register"
|
|
hexmask.long 0x00 0.--31. 1. "MADDR,Memory address"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "CH6CTL,DMA channel configuration register (DMA_CH6CTL)"
|
|
bitfld.long 0x00 14. "M2M,Memory to memory mode" "0,1"
|
|
bitfld.long 0x00 12.--13. "PRIO,Priority Level of this channel" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "MWIDTH,Transfer data size of memory" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "PWIDTH,Transfer data size of peripheral" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 7. "MNAGA,Next address generation algorithm of memory" "0,1"
|
|
bitfld.long 0x00 6. "PNAGA,Next address generation algorithm of peripheral" "0,1"
|
|
bitfld.long 0x00 5. "CMEN,Circular mode enable" "0,1"
|
|
bitfld.long 0x00 4. "DIR,Transfer direction" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x00 2. "HTFIE,Half Transfer Finish interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "FTFIE,Full Transfer Finish interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "CHEN,Channel enable" "0,1"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "CH6CNT,DMA channel 6 counter register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Transfer counter"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "CH6PADDR,DMA channel 6 peripheral base address register"
|
|
hexmask.long 0x00 0.--31. 1. "PADDR,Peripheral base address"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "CH6MADDR,DMA channel 6 memory base address register"
|
|
hexmask.long 0x00 0.--31. 1. "MADDR,Memory address"
|
|
tree.end
|
|
tree "EXTI (External interrupt/event controller)"
|
|
base ad:0x40010400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "INTEN,Interrupt enable register (EXTI_INTEN)"
|
|
bitfld.long 0x00 27. "INTEN27,Enable Interrupt on line 27" "0,1"
|
|
bitfld.long 0x00 26. "INTEN26,Enable Interrupt on line 26" "0,1"
|
|
bitfld.long 0x00 25. "INTEN25,Enable Interrupt on line 25" "0,1"
|
|
bitfld.long 0x00 24. "INTEN24,Enable Interrupt on line 24" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "INTEN23,Enable Interrupt on line 23" "0,1"
|
|
bitfld.long 0x00 22. "INTEN22,Enable Interrupt on line 22" "0,1"
|
|
bitfld.long 0x00 21. "INTEN21,Enable Interrupt on line 21" "0,1"
|
|
bitfld.long 0x00 20. "INTEN20,Enable Interrupt on line 20" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "INTEN19,Enable Interrupt on line 19" "0,1"
|
|
bitfld.long 0x00 18. "INTEN18,Enable Interrupt on line 18" "0,1"
|
|
bitfld.long 0x00 17. "INTEN17,Enable Interrupt on line 17" "0,1"
|
|
bitfld.long 0x00 16. "INTEN16,Enable Interrupt on line 16" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "INTEN15,Enable Interrupt on line 15" "0,1"
|
|
bitfld.long 0x00 14. "INTEN14,Enable Interrupt on line 14" "0,1"
|
|
bitfld.long 0x00 13. "INTEN13,Enable Interrupt on line 13" "0,1"
|
|
bitfld.long 0x00 12. "INTEN12,Enable Interrupt on line 12" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "INTEN11,Enable Interrupt on line 11" "0,1"
|
|
bitfld.long 0x00 10. "INTEN10,Enable Interrupt on line 10" "0,1"
|
|
bitfld.long 0x00 9. "INTEN9,Enable Interrupt on line 9" "0,1"
|
|
bitfld.long 0x00 8. "INTEN8,Enable Interrupt on line 8" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "INTEN7,Enable Interrupt on line 7" "0,1"
|
|
bitfld.long 0x00 6. "INTEN6,Enable Interrupt on line 6" "0,1"
|
|
bitfld.long 0x00 5. "INTEN5,Enable Interrupt on line 5" "0,1"
|
|
bitfld.long 0x00 4. "INTEN4,Enable Interrupt on line 4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "INTEN3,Enable Interrupt on line 3" "0,1"
|
|
bitfld.long 0x00 2. "INTEN2,Enable Interrupt on line 2" "0,1"
|
|
bitfld.long 0x00 1. "INTEN1,Enable Interrupt on line 1" "0,1"
|
|
bitfld.long 0x00 0. "INTEN0,Enable Interrupt on line 0" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "EVEN,Event enable register (EXTI_EVEN)"
|
|
bitfld.long 0x00 27. "EVEN27,Enable Event on line 27" "0,1"
|
|
bitfld.long 0x00 26. "EVEN26,Enable Event on line 26" "0,1"
|
|
bitfld.long 0x00 25. "EVEN25,Enable Event on line 25" "0,1"
|
|
bitfld.long 0x00 24. "EVEN24,Enable Event on line 24" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "EVEN23,Enable Event on line 23" "0,1"
|
|
bitfld.long 0x00 22. "EVEN22,Enable Event on line 22" "0,1"
|
|
bitfld.long 0x00 21. "EVEN21,Enable Event on line 21" "0,1"
|
|
bitfld.long 0x00 20. "EVEN20,Enable Event on line 20" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "EVEN19,Enable Event on line 19" "0,1"
|
|
bitfld.long 0x00 18. "EVEN18,Enable Event on line 18" "0,1"
|
|
bitfld.long 0x00 17. "EVEN17,Enable Event on line 17" "0,1"
|
|
bitfld.long 0x00 16. "EVEN16,Enable Event on line 16" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "EVEN15,Enable Event on line 15" "0,1"
|
|
bitfld.long 0x00 14. "EVEN14,Enable Event on line 14" "0,1"
|
|
bitfld.long 0x00 13. "EVEN13,Enable Event on line 13" "0,1"
|
|
bitfld.long 0x00 12. "EVEN12,Enable Event on line 12" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "EVEN11,Enable Event on line 11" "0,1"
|
|
bitfld.long 0x00 10. "EVEN10,Enable Event on line 10" "0,1"
|
|
bitfld.long 0x00 9. "EVEN9,Enable Event on line 9" "0,1"
|
|
bitfld.long 0x00 8. "EVEN8,Enable Event on line 8" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "EVEN7,Enable Event on line 7" "0,1"
|
|
bitfld.long 0x00 6. "EVEN6,Enable Event on line 6" "0,1"
|
|
bitfld.long 0x00 5. "EVEN5,Enable Event on line 5" "0,1"
|
|
bitfld.long 0x00 4. "EVEN4,Enable Event on line 4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "EVEN3,Enable Event on line 3" "0,1"
|
|
bitfld.long 0x00 2. "EVEN2,Enable Event on line 2" "0,1"
|
|
bitfld.long 0x00 1. "EVEN1,Enable Event on line 1" "0,1"
|
|
bitfld.long 0x00 0. "EVEN0,Enable Event on line 0" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RTEN,Rising Edge Trigger Enable register (EXTI_RTEN)"
|
|
bitfld.long 0x00 22. "RTEN22,Rising trigger event configuration of line 22" "0,1"
|
|
bitfld.long 0x00 21. "RTEN21,Rising trigger event configuration of line 21" "0,1"
|
|
bitfld.long 0x00 19. "RTEN19,Rising trigger event configuration of line 19" "0,1"
|
|
bitfld.long 0x00 18. "RTEN18,Rising trigger event configuration of line 18" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "RTEN17,Rising trigger event configuration of line 17" "0,1"
|
|
bitfld.long 0x00 16. "RTEN16,Rising trigger event configuration of line 16" "0,1"
|
|
bitfld.long 0x00 15. "RTEN15,Rising trigger event configuration of line 15" "0,1"
|
|
bitfld.long 0x00 14. "RTEN14,Rising trigger event configuration of line 14" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "RTEN13,Rising trigger event configuration of line 13" "0,1"
|
|
bitfld.long 0x00 12. "RTEN12,Rising trigger event configuration of line 12" "0,1"
|
|
bitfld.long 0x00 11. "RTEN11,Rising trigger event configuration of line 11" "0,1"
|
|
bitfld.long 0x00 10. "RTEN10,Rising trigger event configuration of line 10" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "RTEN9,Rising trigger event configuration of line 9" "0,1"
|
|
bitfld.long 0x00 8. "RTEN8,Rising trigger event configuration of line 8" "0,1"
|
|
bitfld.long 0x00 7. "RTEN7,Rising trigger event configuration of line 7" "0,1"
|
|
bitfld.long 0x00 6. "RTEN6,Rising trigger event configuration of line 6" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "RTEN5,Rising trigger event configuration of line 5" "0,1"
|
|
bitfld.long 0x00 4. "RTEN4,Rising trigger event configuration of line 4" "0,1"
|
|
bitfld.long 0x00 3. "RTEN3,Rising trigger event configuration of line 3" "0,1"
|
|
bitfld.long 0x00 2. "RTEN2,Rising trigger event configuration of line 2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "RTEN1,Rising trigger event configuration of line 1" "0,1"
|
|
bitfld.long 0x00 0. "RTEN0,Rising trigger event configuration of line 0" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "FTEN,Falling Egde Trigger Enable register (EXTI_FTEN)"
|
|
bitfld.long 0x00 22. "FTEN22,Falling trigger event configuration of line 22" "0,1"
|
|
bitfld.long 0x00 21. "FTEN21,Falling trigger event configuration of line 21" "0,1"
|
|
bitfld.long 0x00 19. "FTEN19,Falling trigger event configuration of line 19" "0,1"
|
|
bitfld.long 0x00 18. "FTEN18,Falling trigger event configuration of line 18" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "FTEN17,Falling trigger event configuration of line 17" "0,1"
|
|
bitfld.long 0x00 16. "FTEN16,Falling trigger event configuration of line 16" "0,1"
|
|
bitfld.long 0x00 15. "FTEN15,Falling trigger event configuration of line 15" "0,1"
|
|
bitfld.long 0x00 14. "FTEN14,Falling trigger event configuration of line 14" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "FTEN13,Falling trigger event configuration of line 13" "0,1"
|
|
bitfld.long 0x00 12. "FTEN12,Falling trigger event configuration of line 12" "0,1"
|
|
bitfld.long 0x00 11. "FTEN11,Falling trigger event configuration of line 11" "0,1"
|
|
bitfld.long 0x00 10. "FTEN10,Falling trigger event configuration of line 10" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "FTEN9,Falling trigger event configuration of line 9" "0,1"
|
|
bitfld.long 0x00 8. "FTEN8,Falling trigger event configuration of line 8" "0,1"
|
|
bitfld.long 0x00 7. "FTEN7,Falling trigger event configuration of line 7" "0,1"
|
|
bitfld.long 0x00 6. "FTEN6,Falling trigger event configuration of line 6" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "FTEN5,Falling trigger event configuration of line 5" "0,1"
|
|
bitfld.long 0x00 4. "FTEN4,Falling trigger event configuration of line 4" "0,1"
|
|
bitfld.long 0x00 3. "FTEN3,Falling trigger event configuration of line 3" "0,1"
|
|
bitfld.long 0x00 2. "FTEN2,Falling trigger event configuration of line 2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "FTEN1,Falling trigger event configuration of line 1" "0,1"
|
|
bitfld.long 0x00 0. "FTEN0,Falling trigger event configuration of line 0" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SWIEV,Software interrupt event register (EXTI_SWIEV)"
|
|
bitfld.long 0x00 22. "SWIEV22,Software Interrupt on line 22" "0,1"
|
|
bitfld.long 0x00 21. "SWIEV21,Software Interrupt on line 21" "0,1"
|
|
bitfld.long 0x00 19. "SWIEV19,Software Interrupt on line 19" "0,1"
|
|
bitfld.long 0x00 18. "SWIEV18,Software Interrupt on line 18" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "SWIEV17,Software Interrupt on line 17" "0,1"
|
|
bitfld.long 0x00 16. "SWIEV16,Software Interrupt on line 16" "0,1"
|
|
bitfld.long 0x00 15. "SWIEV15,Software Interrupt on line 15" "0,1"
|
|
bitfld.long 0x00 14. "SWIEV14,Software Interrupt on line 14" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "SWIEV13,Software Interrupt on line 13" "0,1"
|
|
bitfld.long 0x00 12. "SWIEV12,Software Interrupt on line 12" "0,1"
|
|
bitfld.long 0x00 11. "SWIEV11,Software Interrupt on line 11" "0,1"
|
|
bitfld.long 0x00 10. "SWIEV10,Software Interrupt on line 10" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "SWIEV9,Software Interrupt on line 9" "0,1"
|
|
bitfld.long 0x00 8. "SWIEV8,Software Interrupt on line 8" "0,1"
|
|
bitfld.long 0x00 7. "SWIEV7,Software Interrupt on line 7" "0,1"
|
|
bitfld.long 0x00 6. "SWIEV6,Software Interrupt on line 6" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "SWIEV5,Software Interrupt on line 5" "0,1"
|
|
bitfld.long 0x00 4. "SWIEV4,Software Interrupt on line 4" "0,1"
|
|
bitfld.long 0x00 3. "SWIEV3,Software Interrupt on line 3" "0,1"
|
|
bitfld.long 0x00 2. "SWIEV2,Software Interrupt on line 2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "SWIEV1,Software Interrupt on line 1" "0,1"
|
|
bitfld.long 0x00 0. "SWIEV0,Software Interrupt on line 0" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PD,Pending register (EXTI_PD)"
|
|
bitfld.long 0x00 22. "PD22,Pending bit 22" "0,1"
|
|
bitfld.long 0x00 21. "PD21,Pending bit 21" "0,1"
|
|
bitfld.long 0x00 19. "PD19,Pending bit 19" "0,1"
|
|
bitfld.long 0x00 18. "PD18,Pending bit 18" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "PD17,Pending bit 17" "0,1"
|
|
bitfld.long 0x00 16. "PD16,Pending bit 16" "0,1"
|
|
bitfld.long 0x00 15. "PD15,Pending bit 15" "0,1"
|
|
bitfld.long 0x00 14. "PD14,Pending bit 14" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "PD13,Pending bit 13" "0,1"
|
|
bitfld.long 0x00 12. "PD12,Pending bit 12" "0,1"
|
|
bitfld.long 0x00 11. "PD11,Pending bit 11" "0,1"
|
|
bitfld.long 0x00 10. "PD10,Pending bit 10" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "PD9,Pending bit 9" "0,1"
|
|
bitfld.long 0x00 8. "PD8,Pending bit 8" "0,1"
|
|
bitfld.long 0x00 7. "PD7,Pending bit 7" "0,1"
|
|
bitfld.long 0x00 6. "PD6,Pending bit 6" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "PD5,Pending bit 5" "0,1"
|
|
bitfld.long 0x00 4. "PD4,Pending bit 4" "0,1"
|
|
bitfld.long 0x00 3. "PD3,Pending bit 3" "0,1"
|
|
bitfld.long 0x00 2. "PD2,Pending bit 2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "PD1,Pending bit 1" "0,1"
|
|
bitfld.long 0x00 0. "PD0,Pending bit 0" "0,1"
|
|
tree.end
|
|
tree "FMC"
|
|
base ad:0x40022000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "WS,Wait state register"
|
|
bitfld.long 0x00 0.--2. "WSCNT,WSCNT" "0,1,2,3,4,5,6,7"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "KEY,Flash unlock key register"
|
|
hexmask.long 0x00 0.--31. 1. "KEY,FMC_CTL unlock register"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "OBKEY,Flash option byte unlock key register"
|
|
hexmask.long 0x00 0.--31. 1. "OBKEY,Option byte key"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "STAT,Flash status register"
|
|
bitfld.long 0x00 5. "ENDF,End of operation flag bit" "0,1"
|
|
bitfld.long 0x00 4. "WPERR,Erase/Program protection error flag bit" "0,1"
|
|
bitfld.long 0x00 2. "PGERR,Program error flag bit" "0,1"
|
|
rbitfld.long 0x00 0. "BUSY,Busy" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CTL,Flash control register"
|
|
bitfld.long 0x00 13. "OBRLD,Option byte reload bit" "0,1"
|
|
bitfld.long 0x00 12. "ENDIE,End of operation interrupt enable" "0,1"
|
|
bitfld.long 0x00 10. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "OBWEN,Option bytes write enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "LK,Lock" "0,1"
|
|
bitfld.long 0x00 6. "START,Start" "0,1"
|
|
bitfld.long 0x00 5. "OBER,Option byte erase" "0,1"
|
|
bitfld.long 0x00 4. "OBPG,Option byte programming" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "MER,Main flash mass erase command bit" "0,1"
|
|
bitfld.long 0x00 1. "PER,Main flash page erase command bit" "0,1"
|
|
bitfld.long 0x00 0. "PG,Programming" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "ADDR,Flash address register"
|
|
hexmask.long 0x00 0.--31. 1. "ADDR,Flash command address"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "OBSTAT,Option byte status register"
|
|
hexmask.long.word 0x00 16.--31. 1. "OB_DATA,OB_DATA"
|
|
hexmask.long.byte 0x00 8.--15. 1. "OB_USER,OB_USER"
|
|
bitfld.long 0x00 1.--2. "PLEVEL,PLEVEL" "0,1,2,3"
|
|
bitfld.long 0x00 0. "OBERR,Option byte error" "0,1"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "WP,Write protection register"
|
|
hexmask.long.word 0x00 0.--15. 1. "OB_WP,Write protect"
|
|
rgroup.long 0xFC++0x03
|
|
line.long 0x00 "WSEN,Flash wait state control register"
|
|
bitfld.long 0x00 1. "BPEN,FMC bit program enable register" "0,1"
|
|
bitfld.long 0x00 0. "WSEN,FMC wait state enable register" "0,1"
|
|
rgroup.long 0x100++0x03
|
|
line.long 0x00 "PID,Flash Product ID register"
|
|
hexmask.long 0x00 0.--31. 1. "PID,Product reserved ID code register1"
|
|
tree.end
|
|
tree "FWDGT (free watchdog timer)"
|
|
base ad:0x40003000
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "CTL,Control register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CMD,Key value"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "PSC,Prescaler register"
|
|
bitfld.long 0x00 0.--2. "PSC,Prescaler divider" "0,1,2,3,4,5,6,7"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RLD,Reload register"
|
|
hexmask.long.word 0x00 0.--11. 1. "RLD,Watchdog counter reload value"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "STAT,Status register"
|
|
bitfld.long 0x00 2. "WUD,Watchdog counter window value update" "0,1"
|
|
bitfld.long 0x00 1. "RUD,Watchdog counter reload value update" "0,1"
|
|
bitfld.long 0x00 0. "PUD,Watchdog prescaler value update" "0,1"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "WND,Window register"
|
|
hexmask.long.word 0x00 0.--11. 1. "WND,Watchdog counter window value"
|
|
tree.end
|
|
tree "GPIO (General Purpose I/O Ports And Peripheral I/O Lines)"
|
|
tree "GPIOA"
|
|
base ad:0x48000000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,GPIO port control register"
|
|
bitfld.long 0x00 30.--31. "CTL15,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "CTL14,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "CTL13,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "CTL12,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "CTL11,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "CTL10,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "CTL9,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "CTL8,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "CTL7,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "CTL6,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "CTL5,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CTL4,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "CTL3,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "CTL2,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "CTL1,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CTL0,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "OMODE,GPIO port output type register"
|
|
bitfld.long 0x00 15. "OM15,Port x configuration bit 15" "0,1"
|
|
bitfld.long 0x00 14. "OM14,Port x configuration bit 14" "0,1"
|
|
bitfld.long 0x00 13. "OM13,Port x configuration bit 13" "0,1"
|
|
bitfld.long 0x00 12. "OM12,Port x configuration bit 12" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "OM11,Port x configuration bit 11" "0,1"
|
|
bitfld.long 0x00 10. "OM10,Port x configuration bit 10" "0,1"
|
|
bitfld.long 0x00 9. "OM9,Port x configuration bit 9" "0,1"
|
|
bitfld.long 0x00 8. "OM8,Port x configuration bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "OM7,Port x configuration bit 7" "0,1"
|
|
bitfld.long 0x00 6. "OM6,Port x configuration bit 6" "0,1"
|
|
bitfld.long 0x00 5. "OM5,Port x configuration bit 5" "0,1"
|
|
bitfld.long 0x00 4. "OM4,Port x configuration bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "OM3,Port x configuration bit 3" "0,1"
|
|
bitfld.long 0x00 2. "OM2,Port x configuration bit 2" "0,1"
|
|
bitfld.long 0x00 1. "OM1,Port x configuration bit 1" "0,1"
|
|
bitfld.long 0x00 0. "OM0,Port x configuration bit 0" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "OSPD0,GPIO port output speed register 0"
|
|
bitfld.long 0x00 30.--31. "OSPD15,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "OSPD14,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "OSPD13,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "OSPD12,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "OSPD11,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "OSPD10,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "OSPD9,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "OSPD8,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "OSPD7,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "OSPD6,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "OSPD5,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "OSPD4,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "OSPD3,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "OSPD2,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "OSPD1,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "OSPD0,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PUD,GPIO port pull-up/pull-down register"
|
|
bitfld.long 0x00 30.--31. "PUD15,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "PUD14,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "PUD13,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "PUD12,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "PUD11,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "PUD10,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "PUD9,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "PUD8,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "PUD7,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "PUD6,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "PUD5,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "PUD4,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "PUD3,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "PUD2,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "PUD1,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "PUD0,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "ISTAT,GPIO port input data register"
|
|
bitfld.long 0x00 15. "ISTAT15,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 14. "ISTAT14,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 13. "ISTAT13,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 12. "ISTAT12,Port input data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "ISTAT11,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 10. "ISTAT10,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 9. "ISTAT9,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 8. "ISTAT8,Port input data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "ISTAT7,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 6. "ISTAT6,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 5. "ISTAT5,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 4. "ISTAT4,Port input data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ISTAT3,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 2. "ISTAT2,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 1. "ISTAT1,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 0. "ISTAT0,Port input data (y = 0..15)" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "OCTL,GPIO port output data register"
|
|
bitfld.long 0x00 15. "OCTL15,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 14. "OCTL14,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 13. "OCTL13,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 12. "OCTL12,Port output data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "OCTL11,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 10. "OCTL10,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 9. "OCTL9,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 8. "OCTL8,Port output data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "OCTL7,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 6. "OCTL6,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 5. "OCTL5,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 4. "OCTL4,Port output data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "OCTL3,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 2. "OCTL2,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 1. "OCTL1,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 0. "OCTL0,Port output data (y = 0..15)" "0,1"
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "BOP,GPIO port bit set/reset register"
|
|
bitfld.long 0x00 31. "CR15,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 30. "CR14,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 29. "CR13,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 28. "CR12,Port x reset bit y (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "CR11,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 26. "CR10,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 25. "CR9,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 24. "CR8,Port x reset bit y (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "CR7,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 22. "CR6,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 21. "CR5,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 20. "CR4,Port x reset bit y (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "CR3,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 18. "CR2,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 17. "CR1,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 16. "CR0,Port x reset bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "BOP15,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 14. "BOP14,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 13. "BOP13,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 12. "BOP12,Port x set bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "BOP11,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 10. "BOP10,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 9. "BOP9,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 8. "BOP8,Port x set bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "BOP7,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 6. "BOP6,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 5. "BOP5,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 4. "BOP4,Port x set bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "BOP3,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 2. "BOP2,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 1. "BOP1,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 0. "BOP0,Port x set bit y (y= 0..15)" "0,1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "LOCK,GPIO port configuration lock register"
|
|
bitfld.long 0x00 16. "LKK,Port x lock bit y" "0,1"
|
|
bitfld.long 0x00 15. "LK15,Port x lock bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 14. "LK14,Port x lock bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 13. "LK13,Port x lock bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "LK12,Port x lock bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 11. "LK11,Port x lock bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 10. "LK10,Port x lock bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 9. "LK9,Port x lock bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "LK8,Port x lock bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 7. "LK7,Port x lock bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 6. "LK6,Port x lock bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 5. "LK5,Port x lock bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "LK4,Port x lock bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 3. "LK3,Port x lock bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 2. "LK2,Port x lock bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 1. "LK1,Port x lock bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "LK0,Port x lock bit y (y= 0..15)" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "AFSEL0,GPIO alternate function low register"
|
|
bitfld.long 0x00 28.--31. "SEL7,Alternate function selection for port x bit y (y = 0..7)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "SEL6,Alternate function selection for port x bit y (y = 0..7)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. "SEL5,Alternate function selection for port x bit y (y = 0..7)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "SEL4,Alternate function selection for port x bit y (y = 0..7)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 12.--15. "SEL3,Alternate function selection for port x bit y (y = 0..7)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "SEL2,Alternate function selection for port x bit y (y = 0..7)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "SEL1,Alternate function selection for port x bit y (y = 0..7)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "SEL0,Alternate function selection for port x bit y (y = 0..7)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "AFSEL1,GPIO alternate function register 1"
|
|
bitfld.long 0x00 28.--31. "SEL15,Alternate function selection for port x bit y (y = 8..15)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "SEL14,Alternate function selection for port x bit y (y = 8..15)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. "SEL13,Alternate function selection for port x bit y (y = 8..15)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "SEL12,Alternate function selection for port x bit y (y = 8..15)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 12.--15. "SEL11,Alternate function selection for port x bit y (y = 8..15)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "SEL10,Alternate function selection for port x bit y (y = 8..15)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "SEL9,Alternate function selection for port x bit y (y = 8..15)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "SEL8,Alternate function selection for port x bit y (y = 8..15)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "BC,Port bit reset register"
|
|
bitfld.long 0x00 15. "CR15,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 14. "CR14,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 13. "CR13,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 12. "CR12,Port cleat bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "CR11,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 10. "CR10,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 9. "CR9,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 8. "CR8,Port cleat bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "CR7,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 6. "CR6,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 5. "CR5,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 4. "CR4,Port cleat bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CR3,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 2. "CR2,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 1. "CR1,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 0. "CR0,Port cleat bit" "0,1"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "TG,Port bit toggle register"
|
|
bitfld.long 0x00 15. "TG15,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 14. "TG14,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 13. "TG13,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 12. "TG12,Port toggle bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "TG11,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 10. "TG10,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 9. "TG9,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 8. "TG8,Port toggle bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "TG7,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 6. "TG6,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 5. "TG5,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 4. "TG4,Port toggle bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TG3,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 2. "TG2,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 1. "TG1,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 0. "TG0,Port toggle bit" "0,1"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "OSPD1,Port output speed register 1"
|
|
bitfld.long 0x00 15. "SPD15,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 14. "SPD14,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 13. "SPD13,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 12. "SPD12,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "SPD11,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 10. "SPD10,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 9. "SPD9,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 8. "SPD8,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "SPD7,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 6. "SPD6,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 5. "SPD5,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 4. "SPD4,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "SPD3,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 2. "SPD2,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 1. "SPD1,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 0. "SPD0,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
tree.end
|
|
tree "GPIOB"
|
|
base ad:0x48000400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,GPIO port control register"
|
|
bitfld.long 0x00 30.--31. "CTL15,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "CTL14,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "CTL13,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "CTL12,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "CTL11,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "CTL10,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "CTL9,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "CTL8,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "CTL7,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "CTL6,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "CTL5,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CTL4,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "CTL3,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "CTL2,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "CTL1,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CTL0,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "OMODE,GPIO port output type register"
|
|
bitfld.long 0x00 15. "OM15,Port x configuration bit 15" "0,1"
|
|
bitfld.long 0x00 14. "OM14,Port x configuration bit 14" "0,1"
|
|
bitfld.long 0x00 13. "OM13,Port x configuration bit 13" "0,1"
|
|
bitfld.long 0x00 12. "OM12,Port x configuration bit 12" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "OM11,Port x configuration bit 11" "0,1"
|
|
bitfld.long 0x00 10. "OM10,Port x configuration bit 10" "0,1"
|
|
bitfld.long 0x00 9. "OM9,Port x configuration bit 9" "0,1"
|
|
bitfld.long 0x00 8. "OM8,Port x configuration bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "OM7,Port x configuration bit 7" "0,1"
|
|
bitfld.long 0x00 6. "OM6,Port x configuration bit 6" "0,1"
|
|
bitfld.long 0x00 5. "OM5,Port x configuration bit 5" "0,1"
|
|
bitfld.long 0x00 4. "OM4,Port x configuration bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "OM3,Port x configuration bit 3" "0,1"
|
|
bitfld.long 0x00 2. "OM2,Port x configuration bit 2" "0,1"
|
|
bitfld.long 0x00 1. "OM1,Port x configuration bit 1" "0,1"
|
|
bitfld.long 0x00 0. "OM0,Port x configuration bit 0" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "OSPD0,GPIO port output speed register 0"
|
|
bitfld.long 0x00 30.--31. "OSPD15,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "OSPD14,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "OSPD13,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "OSPD12,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "OSPD11,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "OSPD10,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "OSPD9,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "OSPD8,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "OSPD7,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "OSPD6,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "OSPD5,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "OSPD4,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "OSPD3,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "OSPD2,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "OSPD1,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "OSPD0,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PUD,GPIO port pull-up/pull-down register"
|
|
bitfld.long 0x00 30.--31. "PUD15,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "PUD14,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "PUD13,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "PUD12,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "PUD11,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "PUD10,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "PUD9,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "PUD8,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "PUD7,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "PUD6,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "PUD5,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "PUD4,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "PUD3,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "PUD2,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "PUD1,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "PUD0,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "ISTAT,GPIO port input data register"
|
|
bitfld.long 0x00 15. "ISTAT15,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 14. "ISTAT14,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 13. "ISTAT13,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 12. "ISTAT12,Port input data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "ISTAT11,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 10. "ISTAT10,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 9. "ISTAT9,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 8. "ISTAT8,Port input data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "ISTAT7,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 6. "ISTAT6,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 5. "ISTAT5,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 4. "ISTAT4,Port input data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ISTAT3,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 2. "ISTAT2,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 1. "ISTAT1,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 0. "ISTAT0,Port input data (y = 0..15)" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "OCTL,GPIO port output data register"
|
|
bitfld.long 0x00 15. "OCTL15,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 14. "OCTL14,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 13. "OCTL13,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 12. "OCTL12,Port output data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "OCTL11,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 10. "OCTL10,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 9. "OCTL9,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 8. "OCTL8,Port output data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "OCTL7,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 6. "OCTL6,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 5. "OCTL5,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 4. "OCTL4,Port output data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "OCTL3,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 2. "OCTL2,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 1. "OCTL1,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 0. "OCTL0,Port output data (y = 0..15)" "0,1"
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "BOP,GPIO port bit set/reset register"
|
|
bitfld.long 0x00 31. "CR15,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 30. "CR14,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 29. "CR13,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 28. "CR12,Port x reset bit y (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "CR11,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 26. "CR10,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 25. "CR9,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 24. "CR8,Port x reset bit y (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "CR7,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 22. "CR6,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 21. "CR5,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 20. "CR4,Port x reset bit y (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "CR3,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 18. "CR2,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 17. "CR1,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 16. "CR0,Port x reset bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "BOP15,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 14. "BOP14,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 13. "BOP13,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 12. "BOP12,Port x set bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "BOP11,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 10. "BOP10,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 9. "BOP9,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 8. "BOP8,Port x set bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "BOP7,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 6. "BOP6,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 5. "BOP5,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 4. "BOP4,Port x set bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "BOP3,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 2. "BOP2,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 1. "BOP1,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 0. "BOP0,Port x set bit y (y= 0..15)" "0,1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "LOCK,GPIO port configuration lock register"
|
|
bitfld.long 0x00 16. "LKK,Port x lock bit y" "0,1"
|
|
bitfld.long 0x00 15. "LK15,Port x lock bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 14. "LK14,Port x lock bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 13. "LK13,Port x lock bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "LK12,Port x lock bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 11. "LK11,Port x lock bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 10. "LK10,Port x lock bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 9. "LK9,Port x lock bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "LK8,Port x lock bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 7. "LK7,Port x lock bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 6. "LK6,Port x lock bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 5. "LK5,Port x lock bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "LK4,Port x lock bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 3. "LK3,Port x lock bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 2. "LK2,Port x lock bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 1. "LK1,Port x lock bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "LK0,Port x lock bit y (y= 0..15)" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "AFSEL0,GPIO alternate function low register"
|
|
bitfld.long 0x00 28.--31. "SEL7,Alternate function selection for port x bit y (y = 0..7)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "SEL6,Alternate function selection for port x bit y (y = 0..7)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. "SEL5,Alternate function selection for port x bit y (y = 0..7)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "SEL4,Alternate function selection for port x bit y (y = 0..7)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 12.--15. "SEL3,Alternate function selection for port x bit y (y = 0..7)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "SEL2,Alternate function selection for port x bit y (y = 0..7)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "SEL1,Alternate function selection for port x bit y (y = 0..7)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "SEL0,Alternate function selection for port x bit y (y = 0..7)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "AFSEL1,GPIO alternate function register 1"
|
|
bitfld.long 0x00 28.--31. "SEL15,Alternate function selection for port x bit y (y = 8..15)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "SEL14,Alternate function selection for port x bit y (y = 8..15)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. "SEL13,Alternate function selection for port x bit y (y = 8..15)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "SEL12,Alternate function selection for port x bit y (y = 8..15)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 12.--15. "SEL11,Alternate function selection for port x bit y (y = 8..15)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "SEL10,Alternate function selection for port x bit y (y = 8..15)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "SEL9,Alternate function selection for port x bit y (y = 8..15)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "SEL8,Alternate function selection for port x bit y (y = 8..15)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "BC,Port bit reset register"
|
|
bitfld.long 0x00 15. "CR15,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 14. "CR14,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 13. "CR13,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 12. "CR12,Port cleat bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "CR11,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 10. "CR10,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 9. "CR9,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 8. "CR8,Port cleat bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "CR7,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 6. "CR6,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 5. "CR5,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 4. "CR4,Port cleat bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CR3,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 2. "CR2,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 1. "CR1,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 0. "CR0,Port cleat bit" "0,1"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "TG,Port bit toggle register"
|
|
bitfld.long 0x00 15. "TG15,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 14. "TG14,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 13. "TG13,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 12. "TG12,Port toggle bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "TG11,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 10. "TG10,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 9. "TG9,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 8. "TG8,Port toggle bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "TG7,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 6. "TG6,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 5. "TG5,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 4. "TG4,Port toggle bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TG3,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 2. "TG2,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 1. "TG1,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 0. "TG0,Port toggle bit" "0,1"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "OSPD1,Port output speed register 1"
|
|
bitfld.long 0x00 15. "SPD15,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 14. "SPD14,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 13. "SPD13,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 12. "SPD12,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "SPD11,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 10. "SPD10,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 9. "SPD9,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 8. "SPD8,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "SPD7,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 6. "SPD6,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 5. "SPD5,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 4. "SPD4,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "SPD3,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 2. "SPD2,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 1. "SPD1,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 0. "SPD0,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
tree.end
|
|
tree "GPIOC"
|
|
base ad:0x48000800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,GPIO port control register"
|
|
bitfld.long 0x00 30.--31. "CTL15,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "CTL14,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "CTL13,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "CTL12,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "CTL11,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "CTL10,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "CTL9,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "CTL8,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "CTL7,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "CTL6,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "CTL5,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CTL4,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "CTL3,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "CTL2,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "CTL1,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CTL0,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "OMODE,GPIO port output type register"
|
|
bitfld.long 0x00 15. "OM15,Port x configuration bit 15" "0,1"
|
|
bitfld.long 0x00 14. "OM14,Port x configuration bit 14" "0,1"
|
|
bitfld.long 0x00 13. "OM13,Port x configuration bit 13" "0,1"
|
|
bitfld.long 0x00 12. "OM12,Port x configuration bit 12" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "OM11,Port x configuration bit 11" "0,1"
|
|
bitfld.long 0x00 10. "OM10,Port x configuration bit 10" "0,1"
|
|
bitfld.long 0x00 9. "OM9,Port x configuration bit 9" "0,1"
|
|
bitfld.long 0x00 8. "OM8,Port x configuration bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "OM7,Port x configuration bit 7" "0,1"
|
|
bitfld.long 0x00 6. "OM6,Port x configuration bit 6" "0,1"
|
|
bitfld.long 0x00 5. "OM5,Port x configuration bit 5" "0,1"
|
|
bitfld.long 0x00 4. "OM4,Port x configuration bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "OM3,Port x configuration bit 3" "0,1"
|
|
bitfld.long 0x00 2. "OM2,Port x configuration bit 2" "0,1"
|
|
bitfld.long 0x00 1. "OM1,Port x configuration bit 1" "0,1"
|
|
bitfld.long 0x00 0. "OM0,Port x configuration bit 0" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "OSPD0,GPIO port output speed register 0"
|
|
bitfld.long 0x00 30.--31. "OSPD15,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "OSPD14,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "OSPD13,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "OSPD12,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "OSPD11,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "OSPD10,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "OSPD9,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "OSPD8,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "OSPD7,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "OSPD6,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "OSPD5,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "OSPD4,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "OSPD3,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "OSPD2,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "OSPD1,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "OSPD0,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PUD,GPIO port pull-up/pull-down register"
|
|
bitfld.long 0x00 30.--31. "PUD15,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "PUD14,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "PUD13,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "PUD12,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "PUD11,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "PUD10,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "PUD9,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "PUD8,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "PUD7,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "PUD6,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "PUD5,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "PUD4,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "PUD3,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "PUD2,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "PUD1,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "PUD0,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "ISTAT,GPIO port input data register"
|
|
bitfld.long 0x00 15. "ISTAT15,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 14. "ISTAT14,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 13. "ISTAT13,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 12. "ISTAT12,Port input data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "ISTAT11,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 10. "ISTAT10,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 9. "ISTAT9,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 8. "ISTAT8,Port input data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "ISTAT7,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 6. "ISTAT6,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 5. "ISTAT5,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 4. "ISTAT4,Port input data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ISTAT3,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 2. "ISTAT2,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 1. "ISTAT1,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 0. "ISTAT0,Port input data (y = 0..15)" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "OCTL,GPIO port output data register"
|
|
bitfld.long 0x00 15. "OCTL15,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 14. "OCTL14,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 13. "OCTL13,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 12. "OCTL12,Port output data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "OCTL11,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 10. "OCTL10,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 9. "OCTL9,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 8. "OCTL8,Port output data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "OCTL7,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 6. "OCTL6,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 5. "OCTL5,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 4. "OCTL4,Port output data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "OCTL3,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 2. "OCTL2,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 1. "OCTL1,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 0. "OCTL0,Port output data (y = 0..15)" "0,1"
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "BOP,GPIO port bit set/reset register"
|
|
bitfld.long 0x00 31. "CR15,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 30. "CR14,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 29. "CR13,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 28. "CR12,Port x reset bit y (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "CR11,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 26. "CR10,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 25. "CR9,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 24. "CR8,Port x reset bit y (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "CR7,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 22. "CR6,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 21. "CR5,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 20. "CR4,Port x reset bit y (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "CR3,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 18. "CR2,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 17. "CR1,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 16. "CR0,Port x reset bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "BOP15,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 14. "BOP14,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 13. "BOP13,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 12. "BOP12,Port x set bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "BOP11,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 10. "BOP10,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 9. "BOP9,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 8. "BOP8,Port x set bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "BOP7,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 6. "BOP6,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 5. "BOP5,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 4. "BOP4,Port x set bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "BOP3,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 2. "BOP2,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 1. "BOP1,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 0. "BOP0,Port x set bit y (y= 0..15)" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "AFSEL0,GPIO alternate function low register"
|
|
bitfld.long 0x00 28.--31. "SEL7,Alternate function selection for port x bit y (y = 0..7)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "SEL6,Alternate function selection for port x bit y (y = 0..7)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. "SEL5,Alternate function selection for port x bit y (y = 0..7)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "SEL4,Alternate function selection for port x bit y (y = 0..7)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 12.--15. "SEL3,Alternate function selection for port x bit y (y = 0..7)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "SEL2,Alternate function selection for port x bit y (y = 0..7)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "SEL1,Alternate function selection for port x bit y (y = 0..7)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "SEL0,Alternate function selection for port x bit y (y = 0..7)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "AFSEL1,GPIO alternate function register 1"
|
|
bitfld.long 0x00 28.--31. "SEL15,Alternate function selection for port x bit y (y = 8..15)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "SEL14,Alternate function selection for port x bit y (y = 8..15)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. "SEL13,Alternate function selection for port x bit y (y = 8..15)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "SEL12,Alternate function selection for port x bit y (y = 8..15)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 12.--15. "SEL11,Alternate function selection for port x bit y (y = 8..15)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "SEL10,Alternate function selection for port x bit y (y = 8..15)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "SEL9,Alternate function selection for port x bit y (y = 8..15)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "SEL8,Alternate function selection for port x bit y (y = 8..15)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "BC,Port bit reset register"
|
|
bitfld.long 0x00 15. "CR15,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 14. "CR14,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 13. "CR13,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 12. "CR12,Port cleat bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "CR11,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 10. "CR10,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 9. "CR9,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 8. "CR8,Port cleat bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "CR7,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 6. "CR6,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 5. "CR5,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 4. "CR4,Port cleat bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CR3,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 2. "CR2,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 1. "CR1,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 0. "CR0,Port cleat bit" "0,1"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "TG,Port bit toggle register"
|
|
bitfld.long 0x00 15. "TG15,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 14. "TG14,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 13. "TG13,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 12. "TG12,Port toggle bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "TG11,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 10. "TG10,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 9. "TG9,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 8. "TG8,Port toggle bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "TG7,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 6. "TG6,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 5. "TG5,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 4. "TG4,Port toggle bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TG3,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 2. "TG2,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 1. "TG1,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 0. "TG0,Port toggle bit" "0,1"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "OSPD1,Port output speed register 1"
|
|
bitfld.long 0x00 15. "SPD15,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 14. "SPD14,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 13. "SPD13,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 12. "SPD12,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "SPD11,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 10. "SPD10,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 9. "SPD9,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 8. "SPD8,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "SPD7,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 6. "SPD6,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 5. "SPD5,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 4. "SPD4,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "SPD3,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 2. "SPD2,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 1. "SPD1,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 0. "SPD0,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
tree.end
|
|
tree "GPIOD"
|
|
base ad:0x48000C00
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,GPIO port control register"
|
|
bitfld.long 0x00 30.--31. "CTL15,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "CTL14,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "CTL13,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "CTL12,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "CTL11,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "CTL10,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "CTL9,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "CTL8,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "CTL7,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "CTL6,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "CTL5,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CTL4,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "CTL3,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "CTL2,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "CTL1,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CTL0,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "OMODE,GPIO port output type register"
|
|
bitfld.long 0x00 15. "OM15,Port x configuration bit 15" "0,1"
|
|
bitfld.long 0x00 14. "OM14,Port x configuration bit 14" "0,1"
|
|
bitfld.long 0x00 13. "OM13,Port x configuration bit 13" "0,1"
|
|
bitfld.long 0x00 12. "OM12,Port x configuration bit 12" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "OM11,Port x configuration bit 11" "0,1"
|
|
bitfld.long 0x00 10. "OM10,Port x configuration bit 10" "0,1"
|
|
bitfld.long 0x00 9. "OM9,Port x configuration bit 9" "0,1"
|
|
bitfld.long 0x00 8. "OM8,Port x configuration bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "OM7,Port x configuration bit 7" "0,1"
|
|
bitfld.long 0x00 6. "OM6,Port x configuration bit 6" "0,1"
|
|
bitfld.long 0x00 5. "OM5,Port x configuration bit 5" "0,1"
|
|
bitfld.long 0x00 4. "OM4,Port x configuration bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "OM3,Port x configuration bit 3" "0,1"
|
|
bitfld.long 0x00 2. "OM2,Port x configuration bit 2" "0,1"
|
|
bitfld.long 0x00 1. "OM1,Port x configuration bit 1" "0,1"
|
|
bitfld.long 0x00 0. "OM0,Port x configuration bit 0" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "OSPD0,GPIO port output speed register 0"
|
|
bitfld.long 0x00 30.--31. "OSPD15,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "OSPD14,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "OSPD13,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "OSPD12,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "OSPD11,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "OSPD10,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "OSPD9,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "OSPD8,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "OSPD7,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "OSPD6,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "OSPD5,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "OSPD4,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "OSPD3,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "OSPD2,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "OSPD1,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "OSPD0,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PUD,GPIO port pull-up/pull-down register"
|
|
bitfld.long 0x00 30.--31. "PUD15,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "PUD14,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "PUD13,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "PUD12,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "PUD11,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "PUD10,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "PUD9,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "PUD8,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "PUD7,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "PUD6,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "PUD5,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "PUD4,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "PUD3,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "PUD2,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "PUD1,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "PUD0,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "ISTAT,GPIO port input data register"
|
|
bitfld.long 0x00 15. "ISTAT15,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 14. "ISTAT14,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 13. "ISTAT13,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 12. "ISTAT12,Port input data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "ISTAT11,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 10. "ISTAT10,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 9. "ISTAT9,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 8. "ISTAT8,Port input data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "ISTAT7,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 6. "ISTAT6,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 5. "ISTAT5,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 4. "ISTAT4,Port input data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ISTAT3,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 2. "ISTAT2,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 1. "ISTAT1,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 0. "ISTAT0,Port input data (y = 0..15)" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "OCTL,GPIO port output data register"
|
|
bitfld.long 0x00 15. "OCTL15,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 14. "OCTL14,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 13. "OCTL13,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 12. "OCTL12,Port output data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "OCTL11,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 10. "OCTL10,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 9. "OCTL9,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 8. "OCTL8,Port output data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "OCTL7,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 6. "OCTL6,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 5. "OCTL5,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 4. "OCTL4,Port output data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "OCTL3,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 2. "OCTL2,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 1. "OCTL1,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 0. "OCTL0,Port output data (y = 0..15)" "0,1"
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "BOP,GPIO port bit set/reset register"
|
|
bitfld.long 0x00 31. "CR15,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 30. "CR14,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 29. "CR13,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 28. "CR12,Port x reset bit y (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "CR11,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 26. "CR10,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 25. "CR9,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 24. "CR8,Port x reset bit y (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "CR7,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 22. "CR6,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 21. "CR5,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 20. "CR4,Port x reset bit y (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "CR3,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 18. "CR2,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 17. "CR1,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 16. "CR0,Port x reset bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "BOP15,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 14. "BOP14,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 13. "BOP13,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 12. "BOP12,Port x set bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "BOP11,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 10. "BOP10,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 9. "BOP9,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 8. "BOP8,Port x set bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "BOP7,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 6. "BOP6,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 5. "BOP5,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 4. "BOP4,Port x set bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "BOP3,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 2. "BOP2,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 1. "BOP1,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 0. "BOP0,Port x set bit y (y= 0..15)" "0,1"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "BC,Port bit reset register"
|
|
bitfld.long 0x00 15. "CR15,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 14. "CR14,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 13. "CR13,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 12. "CR12,Port cleat bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "CR11,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 10. "CR10,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 9. "CR9,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 8. "CR8,Port cleat bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "CR7,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 6. "CR6,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 5. "CR5,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 4. "CR4,Port cleat bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CR3,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 2. "CR2,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 1. "CR1,Port cleat bit" "0,1"
|
|
bitfld.long 0x00 0. "CR0,Port cleat bit" "0,1"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "TG,Port bit toggle register"
|
|
bitfld.long 0x00 15. "TG15,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 14. "TG14,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 13. "TG13,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 12. "TG12,Port toggle bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "TG11,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 10. "TG10,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 9. "TG9,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 8. "TG8,Port toggle bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "TG7,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 6. "TG6,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 5. "TG5,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 4. "TG4,Port toggle bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TG3,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 2. "TG2,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 1. "TG1,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 0. "TG0,Port toggle bit" "0,1"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "OSPD1,Port output speed register 1"
|
|
bitfld.long 0x00 15. "SPD15,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 14. "SPD14,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 13. "SPD13,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 12. "SPD12,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "SPD11,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 10. "SPD10,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 9. "SPD9,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 8. "SPD8,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "SPD7,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 6. "SPD6,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 5. "SPD5,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 4. "SPD4,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "SPD3,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 2. "SPD2,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 1. "SPD1,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 0. "SPD0,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
tree.end
|
|
tree "GPIOF"
|
|
base ad:0x48001400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,GPIOF port control register"
|
|
bitfld.long 0x00 30.--31. "CTL15,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "CTL14,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "CTL13,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "CTL12,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "CTL11,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "CTL10,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "CTL9,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "CTL8,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "CTL7,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "CTL6,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "CTL5,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CTL4,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "CTL3,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "CTL2,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "CTL1,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CTL0,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "OMODE,GPIO port output type register"
|
|
bitfld.long 0x00 15. "OM15,Port x configuration bit 15" "0,1"
|
|
bitfld.long 0x00 14. "OM14,Port x configuration bit 14" "0,1"
|
|
bitfld.long 0x00 13. "OM13,Port x configuration bit 13" "0,1"
|
|
bitfld.long 0x00 12. "OM12,Port x configuration bit 12" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "OM11,Port x configuration bit 11" "0,1"
|
|
bitfld.long 0x00 10. "OM10,Port x configuration bit 10" "0,1"
|
|
bitfld.long 0x00 9. "OM9,Port x configuration bit 9" "0,1"
|
|
bitfld.long 0x00 8. "OM8,Port x configuration bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "OM7,Port x configuration bit 7" "0,1"
|
|
bitfld.long 0x00 6. "OM6,Port x configuration bit 6" "0,1"
|
|
bitfld.long 0x00 5. "OM5,Port x configuration bit 5" "0,1"
|
|
bitfld.long 0x00 4. "OM4,Port x configuration bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "OM3,Port x configuration bit 3" "0,1"
|
|
bitfld.long 0x00 2. "OM2,Port x configuration bit 2" "0,1"
|
|
bitfld.long 0x00 1. "OM1,Port x configuration bit 1" "0,1"
|
|
bitfld.long 0x00 0. "OM0,Port x configuration bit 0" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "OSPD0,GPIO port output speed register 0"
|
|
bitfld.long 0x00 30.--31. "OSPD15,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "OSPD14,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "OSPD13,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "OSPD12,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "OSPD11,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "OSPD10,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "OSPD9,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "OSPD8,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "OSPD7,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "OSPD6,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "OSPD5,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "OSPD4,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "OSPD3,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "OSPD2,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "OSPD1,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "OSPD0,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PUD,GPIO port pull-up/pull-down register"
|
|
bitfld.long 0x00 30.--31. "PUD15,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. "PUD14,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. "PUD13,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "PUD12,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "PUD11,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "PUD10,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. "PUD9,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. "PUD8,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "PUD7,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. "PUD6,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "PUD5,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "PUD4,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "PUD3,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "PUD2,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "PUD1,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "PUD0,Port x configuration bits (y = 0..15)" "0,1,2,3"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "ISTAT,GPIO port input data register"
|
|
bitfld.long 0x00 15. "ISTAT15,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 14. "ISTAT14,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 13. "ISTAT13,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 12. "ISTAT12,Port input data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "ISTAT11,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 10. "ISTAT10,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 9. "ISTAT9,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 8. "ISTAT8,Port input data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "ISTAT7,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 6. "ISTAT6,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 5. "ISTAT5,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 4. "ISTAT4,Port input data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ISTAT3,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 2. "ISTAT2,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 1. "ISTAT1,Port input data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 0. "ISTAT0,Port input data (y = 0..15)" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "OCTL,GPIO port output data register"
|
|
bitfld.long 0x00 15. "OCTL15,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 14. "OCTL14,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 13. "OCTL13,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 12. "OCTL12,Port output data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "OCTL11,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 10. "OCTL10,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 9. "OCTL9,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 8. "OCTL8,Port output data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "OCTL7,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 6. "OCTL6,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 5. "OCTL5,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 4. "OCTL4,Port output data (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "OCTL3,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 2. "OCTL2,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 1. "OCTL1,Port output data (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 0. "OCTL0,Port output data (y = 0..15)" "0,1"
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "BOP,GPIO port bit set/reset register"
|
|
bitfld.long 0x00 31. "CR15,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 30. "CR14,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 29. "CR13,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 28. "CR12,Port x reset bit y (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "CR11,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 26. "CR10,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 25. "CR9,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 24. "CR8,Port x reset bit y (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "CR7,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 22. "CR6,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 21. "CR5,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 20. "CR4,Port x reset bit y (y = 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "CR3,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 18. "CR2,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 17. "CR1,Port x reset bit y (y = 0..15)" "0,1"
|
|
bitfld.long 0x00 16. "CR0,Port x set bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "BOP15,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 14. "BOP14,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 13. "BOP13,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 12. "BOP12,Port x set bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "BOP11,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 10. "BOP10,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 9. "BOP9,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 8. "BOP8,Port x set bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "BOP7,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 6. "BOP6,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 5. "BOP5,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 4. "BOP4,Port x set bit y (y= 0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "BOP3,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 2. "BOP2,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 1. "BOP1,Port x set bit y (y= 0..15)" "0,1"
|
|
bitfld.long 0x00 0. "BOP0,Port x set bit y (y= 0..15)" "0,1"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "BC,Port bit reset register"
|
|
bitfld.long 0x00 15. "CR15,Port x Reset bit y" "0,1"
|
|
bitfld.long 0x00 14. "CR14,Port x Reset bit y" "0,1"
|
|
bitfld.long 0x00 13. "CR13,Port x Reset bit y" "0,1"
|
|
bitfld.long 0x00 12. "CR12,Port x Reset bit y" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "CR11,Port x Reset bit y" "0,1"
|
|
bitfld.long 0x00 10. "CR10,Port x Reset bit y" "0,1"
|
|
bitfld.long 0x00 9. "CR9,Port x Reset bit y" "0,1"
|
|
bitfld.long 0x00 8. "CR8,Port x Reset bit y" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "CR7,Port x Reset bit y" "0,1"
|
|
bitfld.long 0x00 6. "CR6,Port x Reset bit y" "0,1"
|
|
bitfld.long 0x00 5. "CR5,Port x Reset bit y" "0,1"
|
|
bitfld.long 0x00 4. "CR4,Port x Reset bit y" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CR3,Port x Reset bit y" "0,1"
|
|
bitfld.long 0x00 2. "CR2,Port x Reset bit y" "0,1"
|
|
bitfld.long 0x00 1. "CR1,Port x Reset bit y" "0,1"
|
|
bitfld.long 0x00 0. "CR0,Port x Reset bit y" "0,1"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "TG,Port bit toggle register"
|
|
bitfld.long 0x00 15. "TG15,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 14. "TG14,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 13. "TG13,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 12. "TG12,Port toggle bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "TG11,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 10. "TG10,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 9. "TG9,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 8. "TG8,Port toggle bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "TG7,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 6. "TG6,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 5. "TG5,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 4. "TG4,Port toggle bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TG3,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 2. "TG2,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 1. "TG1,Port toggle bit" "0,1"
|
|
bitfld.long 0x00 0. "TG0,Port toggle bit" "0,1"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "OSPD1,Port output speed register 1"
|
|
bitfld.long 0x00 15. "SPD15,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 14. "SPD14,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 13. "SPD13,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 12. "SPD12,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "SPD11,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 10. "SPD10,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 9. "SPD9,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 8. "SPD8,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "SPD7,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 6. "SPD6,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 5. "SPD5,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 4. "SPD4,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "SPD3,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 2. "SPD2,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 1. "SPD1,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
bitfld.long 0x00 0. "SPD0,Set Very High output speed when OSPDy(y=0..15) is 0b11" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "I2C (Inter-Integrated Circuit)"
|
|
repeat 2. (list 0. 1.) (list ad:0x40005400 ad:0x40005800)
|
|
tree "I2C$1"
|
|
base $2
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,Control register 0"
|
|
bitfld.long 0x00 15. "SRESET,Software reset" "0,1"
|
|
bitfld.long 0x00 13. "SALT,SMBus alert" "0,1"
|
|
bitfld.long 0x00 12. "PECTRANS,Packet error checking" "0,1"
|
|
bitfld.long 0x00 11. "POAP,Acknowledge/PEC Position (for data reception)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "ACKEN,Acknowledge enable" "0,1"
|
|
bitfld.long 0x00 9. "STOP,Stop condition" "0,1"
|
|
bitfld.long 0x00 8. "START,Start generation" "0,1"
|
|
bitfld.long 0x00 7. "SS,Clock stretching disable (Slave mode)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "GCEN,General call enable" "0,1"
|
|
bitfld.long 0x00 5. "PECEN,PEC enable" "0,1"
|
|
bitfld.long 0x00 4. "ARPEN,ARP enable" "0,1"
|
|
bitfld.long 0x00 3. "SMBSEL,SMBus type" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "SMBEN,SMBus mode" "0,1"
|
|
bitfld.long 0x00 0. "I2CEN,Peripheral enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,Control register 1"
|
|
bitfld.long 0x00 12. "DMALST,Flag indicating DMA last transfer" "0,1"
|
|
bitfld.long 0x00 11. "DMAON,DMA mode switch" "0,1"
|
|
bitfld.long 0x00 10. "BUFIE,Buffer interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "EVIE,Event interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x00 0.--5. "I2CCLK,Peripheral clock frequency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SADDR0,Own address register 0"
|
|
bitfld.long 0x00 15. "ADDFORMAT,Addressing mode (slave mode)" "0,1"
|
|
hexmask.long.word 0x00 0.--9. 1. "ADDRESS,Interface address"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "SADDR1,Own address register 1"
|
|
hexmask.long.byte 0x00 1.--7. 1. "ADDRESS2,Interface address"
|
|
bitfld.long 0x00 0. "DUADEN,Dual addressing mode enable" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "DATA,Data register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "TRB,Transmission or reception data buffer"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "STAT0,Transfer status register 0"
|
|
bitfld.long 0x00 15. "SMBALT,SMBus alert" "0,1"
|
|
bitfld.long 0x00 14. "SMBTO,Timeout signal in SMBus mode" "0,1"
|
|
bitfld.long 0x00 12. "PECERR,PEC error when receiving data" "0,1"
|
|
bitfld.long 0x00 11. "OUERR,Overrun/Underrun occurs in slave mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "AERR,Acknowledge error" "0,1"
|
|
bitfld.long 0x00 9. "LOSTARB,Arbitration lost (master mode)" "0,1"
|
|
bitfld.long 0x00 8. "BERR,Bus error" "0,1"
|
|
rbitfld.long 0x00 7. "TBE,I2C_DATA is Empty during transmitting" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 6. "RBNE,I2C_DATA is not Empty during receiving" "0,1"
|
|
rbitfld.long 0x00 4. "STPDET,Stop detection (slave mode)" "0,1"
|
|
rbitfld.long 0x00 3. "ADD10SEND,Header of 10-bit address is sent in master mode" "0,1"
|
|
rbitfld.long 0x00 2. "BTC,Byte transmission completed" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 1. "ADDSEND,Address sent (master mode)/matched (slave mode)" "0,1"
|
|
rbitfld.long 0x00 0. "SBSEND,Start bit (Master mode)" "0,1"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "STAT1,Transfer status register 1"
|
|
hexmask.long.byte 0x00 8.--15. 1. "PECV,Packet error checking register"
|
|
bitfld.long 0x00 7. "DUMODF,Dual flag (Slave mode)" "0,1"
|
|
bitfld.long 0x00 6. "HSTSMB,SMBus host header (Slave mode)" "0,1"
|
|
bitfld.long 0x00 5. "DEFSMB,SMBus device default address (Slave mode)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "RXGC,General call address (Slave mode)" "0,1"
|
|
bitfld.long 0x00 2. "TR,Transmitter/receiver" "0,1"
|
|
bitfld.long 0x00 1. "I2CBSY,Bus busy" "0,1"
|
|
bitfld.long 0x00 0. "MASTER,Master/slave" "0,1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CKCFG,Clock configure register"
|
|
bitfld.long 0x00 15. "FAST,I2C master mode selection" "0,1"
|
|
bitfld.long 0x00 14. "DTCY,Fast mode duty cycle" "0,1"
|
|
hexmask.long.word 0x00 0.--11. 1. "CLKC,Clock control register in Fast/Standard mode (Master mode)"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "RT,Rise time register"
|
|
bitfld.long 0x00 0.--5. "RISETIME,Maximum rise time in master mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "FMPCFG,Fast-mode-plus configure register"
|
|
bitfld.long 0x00 0. "FMPEN,Fast-mode-plus enable" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "NVIC (Nested Vectored Interrupt Controller)"
|
|
base ad:0xE000E100
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ISER,Interrupt Set Enable Register"
|
|
hexmask.long 0x00 0.--31. 1. "SETENA,SETENA"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "ICER,Interrupt Clear Enable Register"
|
|
hexmask.long 0x00 0.--31. 1. "CLRENA,CLRENA"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "ISPR,Interrupt Set-Pending Register"
|
|
hexmask.long 0x00 0.--31. 1. "SETPEND,SETPEND"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "ICPR,Interrupt Clear-Pending Register"
|
|
hexmask.long 0x00 0.--31. 1. "CLRPEND,CLRPEND"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IABR,Interrupt Active bit Register"
|
|
hexmask.long 0x00 0.--31. 1. "IABR,IABR"
|
|
group.byte 0x300++0x00
|
|
line.byte 0x00 "IPR0,Interrupt Priority Register 0"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_00,PRI_00"
|
|
group.byte 0x301++0x00
|
|
line.byte 0x00 "IPR1,Interrupt Priority Register 1"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_01,PRI_01"
|
|
group.byte 0x302++0x00
|
|
line.byte 0x00 "IPR2,Interrupt Priority Register 2"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_02,PRI_02"
|
|
group.byte 0x303++0x00
|
|
line.byte 0x00 "IPR3,Interrupt Priority Register 3"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_03,PRI_03"
|
|
group.byte 0x304++0x00
|
|
line.byte 0x00 "IPR4,Interrupt Priority Register 4"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_04,PRI_04"
|
|
group.byte 0x305++0x00
|
|
line.byte 0x00 "IPR5,Interrupt Priority Register 5"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_05,PRI_05"
|
|
group.byte 0x306++0x00
|
|
line.byte 0x00 "IPR6,Interrupt Priority Register 6"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_06,PRI_06"
|
|
group.byte 0x307++0x00
|
|
line.byte 0x00 "IPR7,Interrupt Priority Register 7"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_07,PRI_07"
|
|
group.byte 0x308++0x00
|
|
line.byte 0x00 "IPR8,Interrupt Priority Register 8"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_08,PRI_08"
|
|
group.byte 0x309++0x00
|
|
line.byte 0x00 "IPR9,Interrupt Priority Register 9"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_09,PRI_09"
|
|
group.byte 0x30A++0x00
|
|
line.byte 0x00 "IPR10,Interrupt Priority Register 10"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_10,PRI_10"
|
|
group.byte 0x30B++0x00
|
|
line.byte 0x00 "IPR11,Interrupt Priority Register 11"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_11,PRI_11"
|
|
group.byte 0x30C++0x00
|
|
line.byte 0x00 "IPR12,Interrupt Priority Register 12"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_12,PRI_12"
|
|
group.byte 0x30D++0x00
|
|
line.byte 0x00 "IPR13,Interrupt Priority Register 13"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_13,PRI_13"
|
|
group.byte 0x30E++0x00
|
|
line.byte 0x00 "IPR14,Interrupt Priority Register 14"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_14,PRI_14"
|
|
group.byte 0x30F++0x00
|
|
line.byte 0x00 "IPR15,Interrupt Priority Register 15"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_15,PRI_15"
|
|
group.byte 0x310++0x00
|
|
line.byte 0x00 "IPR16,Interrupt Priority Register 16"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_16,PRI_16"
|
|
group.byte 0x311++0x00
|
|
line.byte 0x00 "IPR17,Interrupt Priority Register 17"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_17,PRI_17"
|
|
group.byte 0x312++0x00
|
|
line.byte 0x00 "IPR18,Interrupt Priority Register 18"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_18,PRI_18"
|
|
group.byte 0x313++0x00
|
|
line.byte 0x00 "IPR19,Interrupt Priority Register 19"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_19,PRI_19"
|
|
group.byte 0x314++0x00
|
|
line.byte 0x00 "IPR20,Interrupt Priority Register 20"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_20,PRI_20"
|
|
group.byte 0x315++0x00
|
|
line.byte 0x00 "IPR21,Interrupt Priority Register 21"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_21,PRI_21"
|
|
group.byte 0x316++0x00
|
|
line.byte 0x00 "IPR22,Interrupt Priority Register 22"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_22,PRI_22"
|
|
group.byte 0x317++0x00
|
|
line.byte 0x00 "IPR23,Interrupt Priority Register 23"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_23,PRI_23"
|
|
group.byte 0x318++0x00
|
|
line.byte 0x00 "IPR24,Interrupt Priority Register 24"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_24,PRI_24"
|
|
group.byte 0x319++0x00
|
|
line.byte 0x00 "IPR25,Interrupt Priority Register 25"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_25,PRI_25"
|
|
group.byte 0x31A++0x00
|
|
line.byte 0x00 "IPR26,Interrupt Priority Register 26"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_26,PRI_26"
|
|
group.byte 0x31B++0x00
|
|
line.byte 0x00 "IPR27,Interrupt Priority Register 27"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_27,PRI_27"
|
|
group.byte 0x31C++0x00
|
|
line.byte 0x00 "IPR28,Interrupt Priority Register 28"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_28,PRI_28"
|
|
group.byte 0x31D++0x00
|
|
line.byte 0x00 "IPR29,Interrupt Priority Register 29"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_29,PRI_29"
|
|
group.byte 0x31E++0x00
|
|
line.byte 0x00 "IPR30,Interrupt Priority Register 30"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_30,PRI_30"
|
|
group.byte 0x31F++0x00
|
|
line.byte 0x00 "IPR31,Interrupt Priority Register 31"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_31,PRI_31"
|
|
group.byte 0x320++0x00
|
|
line.byte 0x00 "IPR32,Interrupt Priority Register 32"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_32,PRI_32"
|
|
group.byte 0x321++0x00
|
|
line.byte 0x00 "IPR33,Interrupt Priority Register 33"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_33,PRI_33"
|
|
group.byte 0x322++0x00
|
|
line.byte 0x00 "IPR34,Interrupt Priority Register 34"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_34,PRI_34"
|
|
group.byte 0x323++0x00
|
|
line.byte 0x00 "IPR35,Interrupt Priority Register 35"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_35,PRI_35"
|
|
group.byte 0x324++0x00
|
|
line.byte 0x00 "IPR36,Interrupt Priority Register 36"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_36,PRI_36"
|
|
group.byte 0x325++0x00
|
|
line.byte 0x00 "IPR37,Interrupt Priority Register 37"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_37,PRI_37"
|
|
group.byte 0x326++0x00
|
|
line.byte 0x00 "IPR38,Interrupt Priority Register 38"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_38,PRI_38"
|
|
group.byte 0x327++0x00
|
|
line.byte 0x00 "IPR39,Interrupt Priority Register 39"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_39,PRI_39"
|
|
group.byte 0x328++0x00
|
|
line.byte 0x00 "IPR40,Interrupt Priority Register 40"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_40,PRI_40"
|
|
group.byte 0x329++0x00
|
|
line.byte 0x00 "IPR41,Interrupt Priority Register 41"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_41,PRI_41"
|
|
group.byte 0x32A++0x00
|
|
line.byte 0x00 "IPR42,Interrupt Priority Register 42"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_42,PRI_42"
|
|
group.byte 0x32B++0x00
|
|
line.byte 0x00 "IPR43,Interrupt Priority Register 43"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_43,PRI_43"
|
|
group.byte 0x32C++0x00
|
|
line.byte 0x00 "IPR44,Interrupt Priority Register 44"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_44,PRI_44"
|
|
group.byte 0x32D++0x00
|
|
line.byte 0x00 "IPR45,Interrupt Priority Register 45"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_45,PRI_45"
|
|
group.byte 0x32E++0x00
|
|
line.byte 0x00 "IPR46,Interrupt Priority Register 46"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_46,PRI_46"
|
|
group.byte 0x32F++0x00
|
|
line.byte 0x00 "IPR47,Interrupt Priority Register 47"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_47,PRI_47"
|
|
group.byte 0x330++0x00
|
|
line.byte 0x00 "IPR48,Interrupt Priority Register 48"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_48,PRI_48"
|
|
group.byte 0x331++0x00
|
|
line.byte 0x00 "IPR49,Interrupt Priority Register 49"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_49,PRI_49"
|
|
group.byte 0x332++0x00
|
|
line.byte 0x00 "IPR50,Interrupt Priority Register 50"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_50,PRI_50"
|
|
group.byte 0x333++0x00
|
|
line.byte 0x00 "IPR51,Interrupt Priority Register 51"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_51,PRI_51"
|
|
group.byte 0x334++0x00
|
|
line.byte 0x00 "IPR52,Interrupt Priority Register 52"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_52,PRI_52"
|
|
group.byte 0x335++0x00
|
|
line.byte 0x00 "IPR53,Interrupt Priority Register 53"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_53,PRI_53"
|
|
group.byte 0x336++0x00
|
|
line.byte 0x00 "IPR54,Interrupt Priority Register 54"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_54,PRI_54"
|
|
group.byte 0x337++0x00
|
|
line.byte 0x00 "IPR55,Interrupt Priority Register 55"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_55,PRI_55"
|
|
group.byte 0x338++0x00
|
|
line.byte 0x00 "IPR56,Interrupt Priority Register 56"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_56,PRI_56"
|
|
group.byte 0x339++0x00
|
|
line.byte 0x00 "IPR57,Interrupt Priority Register 57"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_57,PRI_57"
|
|
group.byte 0x33A++0x00
|
|
line.byte 0x00 "IPR58,Interrupt Priority Register 58"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_58,PRI_58"
|
|
group.byte 0x33B++0x00
|
|
line.byte 0x00 "IPR59,Interrupt Priority Register 59"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_59,PRI_59"
|
|
group.byte 0x33C++0x00
|
|
line.byte 0x00 "IPR60,Interrupt Priority Register 60"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_60,PRI_60"
|
|
group.byte 0x33D++0x00
|
|
line.byte 0x00 "IPR61,Interrupt Priority Register 61"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_61,PRI_61"
|
|
group.byte 0x33E++0x00
|
|
line.byte 0x00 "IPR62,Interrupt Priority Register 62"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_62,PRI_62"
|
|
group.byte 0x33F++0x00
|
|
line.byte 0x00 "IPR63,Interrupt Priority Register 63"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_63,PRI_63"
|
|
group.byte 0x340++0x00
|
|
line.byte 0x00 "IPR64,Interrupt Priority Register 64"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_64,PRI_64"
|
|
group.byte 0x341++0x00
|
|
line.byte 0x00 "IPR65,Interrupt Priority Register 65"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_65,PRI_65"
|
|
group.byte 0x342++0x00
|
|
line.byte 0x00 "IPR66,Interrupt Priority Register 66"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_66,PRI_66"
|
|
group.byte 0x343++0x00
|
|
line.byte 0x00 "IPR67,Interrupt Priority Register 67"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_67,PRI_67"
|
|
group.byte 0x344++0x00
|
|
line.byte 0x00 "IPR68,Interrupt Priority Register 68"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_68,PRI_68"
|
|
group.byte 0x345++0x00
|
|
line.byte 0x00 "IPR69,Interrupt Priority Register 69"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_69,PRI_69"
|
|
group.byte 0x346++0x00
|
|
line.byte 0x00 "IPR70,Interrupt Priority Register 70"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_70,PRI_70"
|
|
group.byte 0x347++0x00
|
|
line.byte 0x00 "IPR71,Interrupt Priority Register 71"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_71,PRI_71"
|
|
group.byte 0x348++0x00
|
|
line.byte 0x00 "IPR72,Interrupt Priority Register 72"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_72,PRI_72"
|
|
group.byte 0x349++0x00
|
|
line.byte 0x00 "IPR73,Interrupt Priority Register 73"
|
|
hexmask.byte 0x00 0.--7. 1. "PRI_73,PRI_73"
|
|
wgroup.long 0xE00++0x03
|
|
line.long 0x00 "STIR,Software Trigger Interrupt Register"
|
|
hexmask.long 0x00 0.--31. 1. "STIR,STIR"
|
|
tree.end
|
|
tree "PMU (Program Memory Unit)"
|
|
base ad:0x40007000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,power control register"
|
|
bitfld.long 0x00 18.--19. "LDEN,Low-driver mode enable in Deep-sleep mode" "0,1,2,3"
|
|
bitfld.long 0x00 17. "HDS,High-driver mode switch" "0,1"
|
|
bitfld.long 0x00 16. "HDEN,High-driver mode enable" "0,1"
|
|
bitfld.long 0x00 14.--15. "LDOVS,LDO output voltage select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 11. "LDNP,Low-driver mode when use normal power LDO" "0,1"
|
|
bitfld.long 0x00 10. "LDLP,Low-driver mode when use low power LDO" "0,1"
|
|
bitfld.long 0x00 8. "BKPWEN,Backup Domain Write Enable" "0,1"
|
|
bitfld.long 0x00 5.--7. "LVDT,Low Voltage Detector Threshold" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 4. "LVDEN,Low Voltage Detector Enable" "0,1"
|
|
bitfld.long 0x00 3. "STBRST,Standby Flag Reset" "0,1"
|
|
bitfld.long 0x00 2. "WURST,Wakeup Flag Reset" "0,1"
|
|
bitfld.long 0x00 1. "STBMOD,Standby Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "LDOLP,LDO Low Power Mode" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CS,power control/status register"
|
|
bitfld.long 0x00 18.--19. "LDRF,Low-driver mode ready flag" "0,1,2,3"
|
|
bitfld.long 0x00 17. "HDSRF,High-driver switch ready flag" "0,1"
|
|
bitfld.long 0x00 16. "HDRF,High-driver ready flag" "0,1"
|
|
bitfld.long 0x00 15. "LDOVSRF,LDO voltage select ready flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "WUPEN6,WKUP pin6 Enable" "0,1"
|
|
bitfld.long 0x00 13. "WUPEN5,WKUP pin5 Enable" "0,1"
|
|
bitfld.long 0x00 12. "WUPEN4,WKUP pin4 Enable" "0,1"
|
|
bitfld.long 0x00 9. "WUPEN1,WKUP pin1 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "WUPEN0,WKUP pin0 Enable" "0,1"
|
|
rbitfld.long 0x00 2. "LVDF,Low Voltage Detector Status Flag" "0,1"
|
|
rbitfld.long 0x00 1. "STBF,Standby flag" "0,1"
|
|
rbitfld.long 0x00 0. "WUF,Wakeup flag" "0,1"
|
|
tree.end
|
|
tree "RCU (Reset and clock unit)"
|
|
base ad:0x40021000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,Control register 0"
|
|
rbitfld.long 0x00 25. "PLLSTB,PLL Clock Stabilization Flag" "0,1"
|
|
bitfld.long 0x00 24. "PLLEN,PLL enable" "0,1"
|
|
bitfld.long 0x00 19. "CKMEN,HXTAL Clock Monitor Enable" "0,1"
|
|
bitfld.long 0x00 18. "HXTALBPS,External crystal oscillator (HXTAL) clock bypass mode enable" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 17. "HXTALSTB,External crystal oscillator (HXTAL) clock stabilization flag" "0,1"
|
|
bitfld.long 0x00 16. "HXTALEN,External High Speed oscillator Enable" "0,1"
|
|
hexmask.long.byte 0x00 8.--15. 1. "IRC8MCALIB,High Speed Internal Oscillator calibration value register"
|
|
bitfld.long 0x00 3.--7. "IRC8MADJ,High Speed Internal Oscillator clock trim adjust value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
rbitfld.long 0x00 1. "IRC8MSTB,IRC8M High Speed Internal Oscillator stabilization Flag" "0,1"
|
|
bitfld.long 0x00 0. "IRC8MEN,Internal High Speed oscillator Enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CFG0,Clock configuration register 0 (RCU_CFG0)"
|
|
bitfld.long 0x00 31. "PLLDV,The CK_PLL divide by 1 or 2 for CK_OUT" "0,1"
|
|
bitfld.long 0x00 28.--30. "CKOUTDIV,The CK_OUT divider which the CK_OUT frequency can be reduced" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 27. "PLLMF_MSB,Bit 4 of PLLMF register" "0,1"
|
|
bitfld.long 0x00 24.--26. "CKOUTSEL,CK_OUT Clock Source Selection" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "USBFSPSC,USBFS clock prescaler selection" "0,1,2,3"
|
|
bitfld.long 0x00 18.--21. "PLLMF,PLL multiply factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 17. "PLLPREDV,HXTAL divider for PLL source clock selection" "0,1"
|
|
bitfld.long 0x00 16. "PLLSEL,PLL Clock Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "ADCPSC,ADC clock prescaler selection" "0,1,2,3"
|
|
bitfld.long 0x00 11.--13. "APB2PSC,APB2 prescaler selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--10. "APB1PSC,APB1 prescaler selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--7. "AHBPSC,AHB prescaler selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
rbitfld.long 0x00 2.--3. "SCSS,System clock switch status" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "SCS,System clock switch" "0,1,2,3"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "INT,Clock interrupt register (RCU_INT)"
|
|
bitfld.long 0x00 23. "CKMIC,HXTAL Clock Stuck Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 21. "IRC28MSTBIC,IRC28M stabilization Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 20. "PLLSTBIC,PLL stabilization Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 19. "HXTALSTBIC,HXTAL Stabilization Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "IRC8MSTBIC,IRC8M Stabilization Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 17. "LXTALSTBIC,LXTAL Stabilization Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 16. "IRC40KSTBIC,IRC40K Stabilization Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 13. "IRC28MSTBIE,IRC28M Stabilization Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "PLLSTBIE,PLL Stabilization Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 11. "HXTALSTBIE,HXTAL Stabilization Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 10. "IRC8MSTBIE,IRC8M Stabilization Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 9. "LXTALSTBIE,LXTAL Stabilization Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "IRC40KSTBIE,IRC40K Stabilization interrupt enable" "0,1"
|
|
rbitfld.long 0x00 7. "CKMIF,HXTAL Clock Stuck Interrupt Flag" "0,1"
|
|
rbitfld.long 0x00 5. "IRC28MSTBIF,IRC28M stabilization interrupt flag" "0,1"
|
|
rbitfld.long 0x00 4. "PLLSTBIF,PLL stabilization interrupt flag" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 3. "HXTALSTBIF,HXTAL stabilization interrupt flag" "0,1"
|
|
rbitfld.long 0x00 2. "IRC8MSTBIF,IRC8M stabilization interrupt flag" "0,1"
|
|
rbitfld.long 0x00 1. "LXTALSTBIF,LXTAL stabilization interrupt flag" "0,1"
|
|
rbitfld.long 0x00 0. "IRC40KSTBIF,IRC40K stabilization interrupt flag" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "APB2RST,APB2 reset register (RCU_APB2RST)"
|
|
bitfld.long 0x00 18. "TIMER16RST,TIMER16 reset" "0,1"
|
|
bitfld.long 0x00 17. "TIMER15RST,TIMER15 reset" "0,1"
|
|
bitfld.long 0x00 16. "TIMER14RST,TIMER14 reset" "0,1"
|
|
bitfld.long 0x00 14. "USART0RST,USART0 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "SPI0RST,SPI0 Reset" "0,1"
|
|
bitfld.long 0x00 11. "TIMER0RST,TIMER0 reset" "0,1"
|
|
bitfld.long 0x00 9. "ADCRST,ADC reset" "0,1"
|
|
bitfld.long 0x00 0. "CFGCMPRST,System configuration and comparator reset" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "APB1RST,APB1 reset register (RCU_APB1RST)"
|
|
bitfld.long 0x00 30. "CECRST,HDMI CEC reset" "0,1"
|
|
bitfld.long 0x00 29. "DACRST,DAC reset" "0,1"
|
|
bitfld.long 0x00 28. "PMURST,Power control reset" "0,1"
|
|
bitfld.long 0x00 22. "I2C1RST,I2C1 reset" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "I2C0RST,I2C0 reset" "0,1"
|
|
bitfld.long 0x00 17. "USART1RST,USART1 reset" "0,1"
|
|
bitfld.long 0x00 14. "SPI1RST,SPI1 reset" "0,1"
|
|
bitfld.long 0x00 11. "WWDGTRST,Window watchdog timer reset" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "TIMER13RST,TIMER13 timer reset" "0,1"
|
|
bitfld.long 0x00 4. "TIMER5RST,TIMER5 timer reset" "0,1"
|
|
bitfld.long 0x00 1. "TIMER2RST,TIMER2 timer reset" "0,1"
|
|
bitfld.long 0x00 0. "TIMER1RST,TIMER1 timer reset" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "AHBEN,AHB enable register (RCU_AHBEN)"
|
|
bitfld.long 0x00 24. "TSIEN,TSI clock enable" "0,1"
|
|
bitfld.long 0x00 22. "PFEN,GPIO port F clock enable" "0,1"
|
|
bitfld.long 0x00 20. "PDEN,GPIO port D clock enable" "0,1"
|
|
bitfld.long 0x00 19. "PCEN,GPIO port C clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "PBEN,GPIO port B clock enable" "0,1"
|
|
bitfld.long 0x00 17. "PAEN,GPIO port A clock enable" "0,1"
|
|
bitfld.long 0x00 12. "USBFSEN,USBFS clock enable" "0,1"
|
|
bitfld.long 0x00 6. "CRCEN,CRC clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "FMCSPEN,FMC clock enable" "0,1"
|
|
bitfld.long 0x00 2. "SRAMSPEN,SRAM interface clock enable" "0,1"
|
|
bitfld.long 0x00 0. "DMAEN,DMA clock enable" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "APB2EN,APB2 enable register (RCU_APB2EN)"
|
|
bitfld.long 0x00 18. "TIMER16EN,TIMER16 timer clock enable" "0,1"
|
|
bitfld.long 0x00 17. "TIMER15EN,TIMER15 timer clock enable" "0,1"
|
|
bitfld.long 0x00 16. "TIMER14EN,TIMER14 timer clock enable" "0,1"
|
|
bitfld.long 0x00 14. "USART0EN,USART0 clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "SPI0EN,SPI0 clock enable" "0,1"
|
|
bitfld.long 0x00 11. "TIMER0EN,TIMER0 timer clock enable" "0,1"
|
|
bitfld.long 0x00 9. "ADCEN,ADC interface clock enable" "0,1"
|
|
bitfld.long 0x00 0. "CFGCMPEN,System configuration and comparator clock enable" "0,1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "APB1EN,APB1 enable register (RCU_APB1EN)"
|
|
bitfld.long 0x00 30. "CECEN,HDMI CEC interface clock enable" "0,1"
|
|
bitfld.long 0x00 29. "DACEN,DAC interface clock enable" "0,1"
|
|
bitfld.long 0x00 28. "PMUEN,Power interface clock enable" "0,1"
|
|
bitfld.long 0x00 22. "I2C1EN,I2C1 clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "I2C0EN,I2C0 clock enable" "0,1"
|
|
bitfld.long 0x00 17. "USART1EN,USART1 clock enable" "0,1"
|
|
bitfld.long 0x00 14. "SPI1EN,SPI1 clock enable" "0,1"
|
|
bitfld.long 0x00 11. "WWDGTEN,Window watchdog timer clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "TIMER13EN,TIMER13 timer clock enable" "0,1"
|
|
bitfld.long 0x00 4. "TIMER5EN,TIMER5 timer clock enable" "0,1"
|
|
bitfld.long 0x00 1. "TIMER2EN,TIMER2 timer clock enable" "0,1"
|
|
bitfld.long 0x00 0. "TIMER1EN,TIMER1 timer clock enable" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "BDCTL,Backup domain control register (RCU_BDCTL)"
|
|
bitfld.long 0x00 16. "BKPRST,Backup domain reset" "0,1"
|
|
bitfld.long 0x00 15. "RTCEN,RTC clock enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "RTCSRC,RTC clock entry selection" "0,1,2,3"
|
|
bitfld.long 0x00 3.--4. "LXTALDRI,LXTAL drive capability" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 2. "LXTALBPS,LXTAL bypass mode enable" "0,1"
|
|
rbitfld.long 0x00 1. "LXTALSTB,External low-speed oscillator stabilization" "0,1"
|
|
bitfld.long 0x00 0. "LXTALEN,LXTAL enable" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "RSTSCK,Reset source /clock register (RCU_RSTSCK)"
|
|
bitfld.long 0x00 31. "LPRSTF,Low-power reset flag" "0,1"
|
|
bitfld.long 0x00 30. "WWDGTRSTF,Window watchdog timer reset flag" "0,1"
|
|
bitfld.long 0x00 29. "FWDGTRSTF,Free Watchdog timer reset flag" "0,1"
|
|
bitfld.long 0x00 28. "SWRSTF,Software reset flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "PORRSTF,Power reset flag" "0,1"
|
|
bitfld.long 0x00 26. "EPRSTF,External PIN reset flag" "0,1"
|
|
bitfld.long 0x00 25. "OBLRSTF,Option byte loader reset flag" "0,1"
|
|
bitfld.long 0x00 24. "RSTFC,Reset flag clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "V12RSTF,V12 domain Power reset flag" "0,1"
|
|
rbitfld.long 0x00 1. "IRC40KSTB,IRC40K stabilization" "0,1"
|
|
bitfld.long 0x00 0. "IRC40KEN,IRC40K enable" "0,1"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "AHBRST,AHB reset register"
|
|
bitfld.long 0x00 24. "TSIRST,TSI unit reset" "0,1"
|
|
bitfld.long 0x00 22. "PFRST,GPIO port F reset" "0,1"
|
|
bitfld.long 0x00 20. "PDRST,GPIO port D reset" "0,1"
|
|
bitfld.long 0x00 19. "PCRST,GPIO port C reset" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "PBRST,GPIO port B reset" "0,1"
|
|
bitfld.long 0x00 17. "PARST,GPIO port A reset" "0,1"
|
|
bitfld.long 0x00 12. "USBFSRST,USBFS unit reset" "0,1"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CFG1,Configuration register 1"
|
|
bitfld.long 0x00 31. "PLLMF,Bit 5 of PLLMF" "0,1"
|
|
bitfld.long 0x00 30. "PLLPRESEL,PLL clock source preselection" "0,1"
|
|
bitfld.long 0x00 0.--3. "PREDV,CK_HXTAL or CK_IRC48M divider previous PLL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CFG2,Configuration register 2"
|
|
bitfld.long 0x00 31. "ADCPSC,Bit 2 of ADCPSC" "0,1"
|
|
bitfld.long 0x00 30. "USBFSPSC,Bit 2 of USBFSPSC" "0,1"
|
|
bitfld.long 0x00 16. "IRC28MDIV,CK_IRC28M divider 2 or not" "0,1"
|
|
bitfld.long 0x00 8. "ADCSEL,CK_ADC clock source selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "CECSEL,CK_CEC clock source selection" "0,1"
|
|
bitfld.long 0x00 0.--1. "USART0SEL,CK_USART0 clock source selection" "0,1,2,3"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CTL1,Control register 1"
|
|
hexmask.long.byte 0x00 8.--15. 1. "IRC28MCALIB,Internal 28M RC Oscillator calibration value register"
|
|
bitfld.long 0x00 3.--7. "IRC28MADJ,Internal 28M RC Oscillator clock trim adjust value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rbitfld.long 0x00 1. "IRC28MSTB,IRC28M Internal 28M RC Oscillator stabilization Flag" "0,1"
|
|
bitfld.long 0x00 0. "IRC28MEN,IRC28M Internal 28M RC oscillator Enable" "0,1"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "ADDCTL,Additional clock control register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "IRC48MCALIB,Internal 48MHz RC oscillator calibration value register"
|
|
bitfld.long 0x00 17. "IRC48MSTB,Internal 48MHz RC oscillator clock stabilization Flag" "0,1"
|
|
bitfld.long 0x00 16. "IRC48MEN,Internal 48MHz RC oscillator enable" "0,1"
|
|
bitfld.long 0x00 0. "CK48MSEL,48MHz clock selection" "0,1"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "ADDINT,Additional clock interrupt register"
|
|
bitfld.long 0x00 22. "IRC48MSTBIC,Internal 48 MHz RC oscillator Stabilization Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 14. "IRC48MSTBIE,Internal 48 MHz RC oscillator Stabilization Interrupt Enable" "0,1"
|
|
rbitfld.long 0x00 6. "IRC48MSTBIF,IRC48M stabilization interrupt flag" "0,1"
|
|
group.long 0xF8++0x03
|
|
line.long 0x00 "ADDAPB1EN,APB1 additional enable register"
|
|
bitfld.long 0x00 27. "CTCEN,CTC clock enable" "0,1"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "ADDAPB1RST,APB1 additional reset register"
|
|
bitfld.long 0x00 27. "CTCRST,CTC reset" "0,1"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "VKEY,Voltage key register"
|
|
hexmask.long 0x00 0.--31. 1. "KEY,The key of RCU_DSV register"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "DSV,Deep-sleep mode voltage register"
|
|
bitfld.long 0x00 0.--1. "DSLPVS,Deep-sleep mode voltage select" "0,1,2,3"
|
|
tree.end
|
|
tree "RTC (Real-time Counter)"
|
|
base ad:0x40002800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "TIME,time register"
|
|
bitfld.long 0x00 22. "PM,AM/PM mark" "0,1"
|
|
bitfld.long 0x00 20.--21. "HRT,Hour tens in BCD code" "0,1,2,3"
|
|
bitfld.long 0x00 16.--19. "HRU,Hour units in BCD format" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--14. "MNT,Minute tens in BCD code" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "MNU,Minute units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--6. "SCT,Second tens in BCD code" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--3. "SCU,Second units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "DATE,date register"
|
|
bitfld.long 0x00 20.--23. "YRT,Year tens in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "YRU,Year units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 13.--15. "DOW,Days of the week" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12. "MONT,Month tens in BCD code" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "MONU,Month units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--5. "DAYT,Date tens in BCD code" "0,1,2,3"
|
|
bitfld.long 0x00 0.--3. "DAYU,Date units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTL,control register"
|
|
bitfld.long 0x00 23. "COEN,Calibration output enable" "0,1"
|
|
bitfld.long 0x00 21.--22. "OS,Output selection" "0,1,2,3"
|
|
bitfld.long 0x00 20. "OPOL,Output polarity" "0,1"
|
|
bitfld.long 0x00 19. "COS,Calibration output selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "DSM,Backup" "0,1"
|
|
bitfld.long 0x00 17. "S1H,Subtract 1 hour (winter time change)" "0,1"
|
|
bitfld.long 0x00 16. "A1H,Add 1 hour (summer time change)" "0,1"
|
|
bitfld.long 0x00 15. "TSIE,Time-stamp interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "ALRM0IE,Alarm A interrupt enable" "0,1"
|
|
bitfld.long 0x00 11. "TSEN,timestamp enable" "0,1"
|
|
bitfld.long 0x00 8. "ALRM0EN,Alarm A enable" "0,1"
|
|
bitfld.long 0x00 6. "CS,Hour format" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "BPSHAD,Bypass the shadow registers" "0,1"
|
|
bitfld.long 0x00 4. "REFEN,RTC_REFIN reference clock detection enable (50 or 60 Hz)" "0,1"
|
|
bitfld.long 0x00 3. "TSEG,Time-stamp event active edge" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "STAT,initialization and status register"
|
|
rbitfld.long 0x00 16. "SCPF,Recalibration pending Flag" "0,1"
|
|
bitfld.long 0x00 14. "TP1F,RTC_TAMP1 detection flag" "0,1"
|
|
bitfld.long 0x00 13. "TP0F,RTC_TAMP0 detection flag" "0,1"
|
|
bitfld.long 0x00 12. "TSOVRF,Time-stamp overflow flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "TSF,Time-stamp flag" "0,1"
|
|
bitfld.long 0x00 8. "ALRM0F,Alarm A flag" "0,1"
|
|
bitfld.long 0x00 7. "INITM,Initialization mode" "0,1"
|
|
rbitfld.long 0x00 6. "INITF,Initialization flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "RSYNF,Registers synchronization flag" "0,1"
|
|
rbitfld.long 0x00 4. "YCM,Initialization status flag" "0,1"
|
|
bitfld.long 0x00 3. "SOPF,Shift operation pending" "0,1"
|
|
rbitfld.long 0x00 0. "ALRM0WF,Alarm A write flag" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PSC,prescaler register"
|
|
hexmask.long.byte 0x00 16.--22. 1. "FACTOR_A,Asynchronous prescaler factor"
|
|
hexmask.long.word 0x00 0.--14. 1. "FACTOR_S,Synchronous prescaler factor"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "ALRM0TD,alarm A register"
|
|
bitfld.long 0x00 31. "MSKD,Alarm date mask" "0,1"
|
|
bitfld.long 0x00 30. "DOWS,Week day selection" "0,1"
|
|
bitfld.long 0x00 28.--29. "DAYT,Date tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x00 24.--27. "DAYU,Date units or day in BCD format" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 23. "MSKH,Alarm hours mask" "0,1"
|
|
bitfld.long 0x00 22. "PM,AM/PM notation" "0,1"
|
|
bitfld.long 0x00 20.--21. "HRT,Hour tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x00 16.--19. "HRU,Hour units in BCD format" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 15. "MSKM,Alarm minutes mask" "0,1"
|
|
bitfld.long 0x00 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. "MNU,Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 7. "MSKS,Alarm seconds mask" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4.--6. "SCT,Second tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--3. "SCU,Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "WPK,write protection register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "WPK,Write protection key"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "SS,sub second register"
|
|
hexmask.long.word 0x00 0.--15. 1. "SSC,Sub second value"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "SHIFTCTL,shift control register"
|
|
bitfld.long 0x00 31. "A1S,One second add" "0,1"
|
|
hexmask.long.word 0x00 0.--14. 1. "SFS,Subtract a fraction of a second"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "TTS,timestamp time register"
|
|
bitfld.long 0x00 22. "PM,AM/PM mark" "0,1"
|
|
bitfld.long 0x00 20.--21. "HRT,Hour tens in BCD code" "0,1,2,3"
|
|
bitfld.long 0x00 16.--19. "HRU,Hour units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--14. "MNT,Minute tens in BCD code" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "MNU,Minute units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--6. "SCT,Second tens in BCD code" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--3. "SCU,Second units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "DTS,Date of time stamp register"
|
|
bitfld.long 0x00 13.--15. "DOW,Week day units" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12. "MONT,Month tens in BCD code" "0,1"
|
|
bitfld.long 0x00 8.--11. "MONU,Month units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--5. "DAYT,Date tens in BCD code" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "DAYU,Date units in BCD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "SSTS,time-stamp sub second register"
|
|
hexmask.long.word 0x00 0.--15. 1. "SSC,Sub second value"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "HRFC,High resolution frequency compensation register"
|
|
bitfld.long 0x00 15. "FREQI,Increase RTC frequency by 488.5PPM" "0,1"
|
|
bitfld.long 0x00 14. "CWND8,Frequency compensation window 8 second selected" "0,1"
|
|
bitfld.long 0x00 13. "CWND16,Frequency compensation window 16 second selected" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. "CMSK,Calibration mask number"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "TAMP,tamper and alternate function configuration register"
|
|
bitfld.long 0x00 23. "PC15MDE,PC15 mode" "0,1"
|
|
bitfld.long 0x00 22. "PC15VAL,PC15 value" "0,1"
|
|
bitfld.long 0x00 21. "PC14MDE,PC14 mode" "0,1"
|
|
bitfld.long 0x00 20. "PC14VAL,PC14 value" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "PC13MDE,PC13 mode" "0,1"
|
|
bitfld.long 0x00 18. "PC13VAL,RTC_ALARM output type/PC13 value" "0,1"
|
|
bitfld.long 0x00 15. "DISPU,RTC_TAMPx pull-up disable" "0,1"
|
|
bitfld.long 0x00 13.--14. "PRCH,RTC_TAMPx precharge duration" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 11.--12. "FLT,RTC_TAMPx filter count" "0,1,2,3"
|
|
bitfld.long 0x00 8.--10. "FREQ,Tamper sampling frequency" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 7. "TPTS,Activate timestamp on tamper detection event" "0,1"
|
|
bitfld.long 0x00 4. "TP1EG,Tamper 1 event trigger edge" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TP1EN,Tamper 1 detection enable" "0,1"
|
|
bitfld.long 0x00 2. "TPIE,Tamper detection interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "TP0EG,Active level for RTC_TAMP1 input" "0,1"
|
|
bitfld.long 0x00 0. "TP0EN,Tamper 0 event trigger edge" "0,1"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "ALRM0SS,alarm 0 sub second register"
|
|
bitfld.long 0x00 24.--27. "MSKSSC,Mask control bit of SSC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--14. 1. "SSC,Alarm sub second value"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "BKP0,backup register"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,BKP data"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "BKP1,backup register"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,BKP data"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "BKP2,backup register"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,BKP data"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "BKP3,backup register"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,BKP data"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "BKP4,backup register"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,BKP data"
|
|
tree.end
|
|
tree "SPI (Serial peripheral interface)"
|
|
repeat 2. (list 0. 1.) (list ad:0x40013000 ad:0x40003800)
|
|
tree "SPI$1"
|
|
base $2
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 15. "BDEN,Bidirectional enable" "0,1"
|
|
bitfld.long 0x00 14. "BDOEN,Bidirectional Transmit output enable" "0,1"
|
|
bitfld.long 0x00 13. "CRCEN,Hardware CRC calculation enable" "0,1"
|
|
bitfld.long 0x00 12. "CRCNT,CRC transfer next" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "FF16,Data frame format" "0,1"
|
|
bitfld.long 0x00 10. "RO,Receive only" "0,1"
|
|
bitfld.long 0x00 9. "SWNSSEN,NSS Software Mode Selection" "0,1"
|
|
bitfld.long 0x00 8. "SWNSS,NSS Pin Selection In NSS Software Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "LF,LSB First Mode" "0,1"
|
|
bitfld.long 0x00 6. "SPIEN,SPI enable" "0,1"
|
|
bitfld.long 0x00 3.--5. "PSC,Master Clock Prescaler Selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 2. "MSTMOD,Master Mode Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CKPL,Clock Polarity Selection" "0,1"
|
|
bitfld.long 0x00 0. "CKPH,Clock Phase Selection" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 7. "TBEIE,Transmit Buffer Empty Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 6. "RBNEIE,Receive Buffer Not Empty Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 5. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "TMOD,SPI TI Mode Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "NSSP,SPI NSS Pulse Mode Enable" "0,1"
|
|
bitfld.long 0x00 2. "NSSDRV,NSS output enable" "0,1"
|
|
bitfld.long 0x00 1. "DMATEN,Tx buffer DMA enable" "0,1"
|
|
bitfld.long 0x00 0. "DMAREN,Rx buffer DMA enable" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STAT,status register"
|
|
rbitfld.long 0x00 8. "FERR,Format Error" "0,1"
|
|
rbitfld.long 0x00 7. "TRANS,Transmitting On-going Bit" "0,1"
|
|
rbitfld.long 0x00 6. "RXORERR,Reception Overrun Error Bit" "0,1"
|
|
rbitfld.long 0x00 5. "CONFERR,SPI Configuration error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "CRCERR,SPI CRC Error Bit" "0,1"
|
|
rbitfld.long 0x00 3. "TXURERR,Transmission underrun error bit" "0,1"
|
|
rbitfld.long 0x00 2. "I2SCH,I2S channel side" "0,1"
|
|
rbitfld.long 0x00 1. "TBE,Transmit Buffer Empty" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 0. "RBNE,Receive Buffer Not Empty" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DATA,data register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DATA,Data register"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CPCPOLY,CRC polynomial register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CPR,CRC polynomial register"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "RCRC,RX CRC register"
|
|
hexmask.long.word 0x00 0.--15. 1. "RCR,RX RCR register"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "TCRC,TX CRC register"
|
|
hexmask.long.word 0x00 0.--15. 1. "TCR,Tx CRC register"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "I2SCTL,I2S configuration register"
|
|
bitfld.long 0x00 11. "I2SSEL,I2S mode selection" "0,1"
|
|
bitfld.long 0x00 10. "I2SEN,I2S Enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "I2SOPMOD,I2S configuration mode" "0,1,2,3"
|
|
bitfld.long 0x00 7. "PCMSMOD,PCM frame synchronization" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "I2SSTD,I2S standard selection" "0,1,2,3"
|
|
bitfld.long 0x00 3. "CKPL,Idle state clock polarity" "0,1"
|
|
bitfld.long 0x00 1.--2. "DTLEN,Data length to be transferred" "0,1,2,3"
|
|
bitfld.long 0x00 0. "CHLEN,Channel length (number of bits per audio channel)" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "I2SPSC,I2S prescaler register"
|
|
bitfld.long 0x00 9. "MCKOEN,I2S_MCK output enable" "0,1"
|
|
bitfld.long 0x00 8. "OF,Odd factor for the prescaler" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DIV,Dividing factor for the prescaler"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "QCTL,SPI quad wird control register"
|
|
bitfld.long 0x00 2. "IO23_DRV,Drive IO2 and IO3 enable" "0,1"
|
|
bitfld.long 0x00 1. "QRD,Quad wire read select" "0,1"
|
|
bitfld.long 0x00 0. "QMOD,Quad wire mode enable" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "SYSCFG (System configuration controller)"
|
|
base ad:0x40010000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CFG0,System configuration register 0"
|
|
bitfld.long 0x00 19. "PB9_HCCE,PB9 pin high current capability enable" "0,1"
|
|
bitfld.long 0x00 12. "TIMER16_DMA_RMP,Timer 16 DMA request remapping enable" "0,1"
|
|
bitfld.long 0x00 11. "TIMER15_DMA_RMP,Timer 15 DMA request remapping enable" "0,1"
|
|
bitfld.long 0x00 10. "USART0_RX_DMA_RMP,USART0_RX DMA request remapping enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "USART0_TX_DMA_RMP,USART0_TX DMA request remapping enable" "0,1"
|
|
bitfld.long 0x00 8. "ADC_DMA_RMP,ADC DMA request remapping enable" "0,1"
|
|
rbitfld.long 0x00 0.--1. "BOOT_MODE,Boot mode" "0,1,2,3"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "EXTISS0,EXTI sources selection register 0"
|
|
bitfld.long 0x00 12.--15. "EXTI3_SS,EXTI 3 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "EXTI2_SS,EXTI 2 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "EXTI1_SS,EXTI 1 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "EXTI0_SS,EXTI 0 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "EXTISS1,EXTI sources selection register 1"
|
|
bitfld.long 0x00 12.--15. "EXTI7_SS,EXTI 7 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "EXTI6_SS,EXTI 6 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "EXTI5_SS,EXTI 5 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "EXTI4_SS,EXTI 4 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "EXTISS2,EXTI sources selection register 2"
|
|
bitfld.long 0x00 12.--15. "EXTI11_SS,EXTI 11 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "EXTI10_SS,EXTI 10 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "EXTI9_SS,EXTI 9 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "EXTI8_SS,EXTI 8 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "EXTISS3,EXTI sources selection register 3"
|
|
bitfld.long 0x00 12.--15. "EXTI15_SS,EXTI 15 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "EXTI14_SS,EXTI 14 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "EXTI13_SS,EXTI 13 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "EXTI12_SS,EXTI 12 sources selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CFG2,System configuration register 2"
|
|
bitfld.long 0x00 8. "SRAM_PCEF,SRAM parity check error flag" "0,1"
|
|
bitfld.long 0x00 2. "LVD_LOCK,LVD lock" "0,1"
|
|
bitfld.long 0x00 1. "SRAM_PARITY_ERROR_LOCK,SRAM parity check error lock" "0,1"
|
|
bitfld.long 0x00 0. "LOCKUP_LOCK,Cortex-M4 LOCKUP output lock" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CPSCTL,I/O compensation control register"
|
|
bitfld.long 0x00 8. "CPS_RDY,I/O compensation cell is ready" "0,1"
|
|
bitfld.long 0x00 0. "CPS_EN,I/O compensation cell enable" "0,1"
|
|
tree.end
|
|
tree "TIMER (Timer/Counter)"
|
|
tree "TIMER0"
|
|
base ad:0x40012C00
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 8.--9. "CKDIV,Clock division" "0,1,2,3"
|
|
bitfld.long 0x00 7. "ARSE,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x00 5.--6. "CAM,Center-aligned mode selection" "0,1,2,3"
|
|
bitfld.long 0x00 4. "DIR,Direction" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "SPM,One-pulse mode" "0,1"
|
|
bitfld.long 0x00 2. "UPS,Update request source" "0,1"
|
|
bitfld.long 0x00 1. "UPDIS,Update disable" "0,1"
|
|
bitfld.long 0x00 0. "CEN,Counter enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 14. "ISO3,Idle state of channel 3 output" "0,1"
|
|
bitfld.long 0x00 13. "ISO2N,Idle state of channel 2 complementary output" "0,1"
|
|
bitfld.long 0x00 12. "ISO2,Idle state of channel 2 output" "0,1"
|
|
bitfld.long 0x00 11. "ISO1N,Idle state of channel 1 complementary output" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "ISO1,Idle state of channel 1 output" "0,1"
|
|
bitfld.long 0x00 9. "ISO0N,Idle state of channel 0 complementary output" "0,1"
|
|
bitfld.long 0x00 8. "ISO0,Idle state of channel 0 output" "0,1"
|
|
bitfld.long 0x00 7. "TI0S,Channel 0 trigger input selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4.--6. "MMC,Master mode control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "DMAS,DMA request source selection" "0,1"
|
|
bitfld.long 0x00 2. "CCUC,Commutation control shadow register update control" "0,1"
|
|
bitfld.long 0x00 0. "CCSE,Commutation control shadow enable" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SMCFG,slave mode configuration register"
|
|
bitfld.long 0x00 15. "ETP,External trigger polarity" "0,1"
|
|
bitfld.long 0x00 14. "SMC1,Part of SMC for enable External clock mode1" "0,1"
|
|
bitfld.long 0x00 12.--13. "ETPSC,External trigger prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--11. "ETFC,External trigger filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 7. "MSM,Master/Slave mode" "0,1"
|
|
bitfld.long 0x00 4.--6. "TRGS,Trigger selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "OCRC,Trigger selection" "0,1"
|
|
bitfld.long 0x00 0.--2. "SMC,Slave mode selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DMAINTEN,DMA/Interrupt enable register"
|
|
bitfld.long 0x00 14. "TRGDEN,Trigger DMA request enable" "0,1"
|
|
bitfld.long 0x00 13. "CMTDEN,Reserved" "0,1"
|
|
bitfld.long 0x00 12. "CH3DEN,Capture/Compare 3 DMA request enable" "0,1"
|
|
bitfld.long 0x00 11. "CH2DEN,Capture/Compare 2 DMA request enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "CH1DEN,Capture/Compare 1 DMA request enable" "0,1"
|
|
bitfld.long 0x00 9. "CH0DEN,Capture/Compare 0 DMA request enable" "0,1"
|
|
bitfld.long 0x00 8. "UPDEN,Update DMA request enable" "0,1"
|
|
bitfld.long 0x00 7. "BRKIE,Break interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "TRGIE,Trigger interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "CMTIE,COM interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "CH3IE,Capture/Compare 3 interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "CH2IE,Capture/Compare 2 interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CH1IE,Capture/Compare 1 interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CH0IE,Capture/Compare 0 interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "UPIE,Update interrupt enable" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INTF,status register"
|
|
bitfld.long 0x00 12. "CH3OF,Channel 3 over capture flag" "0,1"
|
|
bitfld.long 0x00 11. "CH2OF,Channel 2 over capture flag" "0,1"
|
|
bitfld.long 0x00 10. "CH1OF,Channel 1 over capture flag" "0,1"
|
|
bitfld.long 0x00 9. "CH0OF,Channel 0 over capture flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "BRKIF,Break interrupt flag" "0,1"
|
|
bitfld.long 0x00 6. "TRGIF,Trigger interrupt flag" "0,1"
|
|
bitfld.long 0x00 5. "CMTIF,COM interrupt flag" "0,1"
|
|
bitfld.long 0x00 4. "CH3IF,Capture/Compare 3 interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CH2IF,Capture/Compare 2 interrupt flag" "0,1"
|
|
bitfld.long 0x00 2. "CH1IF,Capture/Compare 1 interrupt flag" "0,1"
|
|
bitfld.long 0x00 1. "CH0IF,Capture/compare 0 interrupt flag" "0,1"
|
|
bitfld.long 0x00 0. "UPIF,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "SWEVG,Software event generation register"
|
|
bitfld.long 0x00 7. "BRKG,Break event generation" "0,1"
|
|
bitfld.long 0x00 6. "TRGG,Trigger event generation" "0,1"
|
|
bitfld.long 0x00 5. "CMTG,Channel commutation event generation" "0,1"
|
|
bitfld.long 0x00 4. "CH3G,Channel 3's capture or compare event generation" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CH2G,Channel 2's capture or compare event generation" "0,1"
|
|
bitfld.long 0x00 2. "CH1G,Channel 1's capture or compare event generation" "0,1"
|
|
bitfld.long 0x00 1. "CH0G,Channel 0's capture or compare event generation" "0,1"
|
|
bitfld.long 0x00 0. "UPG,Update event generation" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Output,capture/compare mode register (output mode)"
|
|
bitfld.long 0x00 15. "CH1COMCEN,Channel 1 output compare clear enable" "0,1"
|
|
bitfld.long 0x00 12.--14. "CH1COMCTL,Channel 1 compare output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "CH1COMSEN,Channel 1 output compare shadow enable" "0,1"
|
|
bitfld.long 0x00 10. "CH1COMFEN,Channel 1 output compare fast enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "CH1MS,Channel 1 mode selection" "0,1,2,3"
|
|
bitfld.long 0x00 7. "CH0COMCEN,Channel 0 output compare clear enable" "0,1"
|
|
bitfld.long 0x00 4.--6. "CH0COMCTL,Channel 0 compare output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH0COMSEN,Channel 0 compare output shadow enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CH0COMFEN,Channel 0 output compare fast enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Channel 0 I/O mode selection" "0,1,2,3"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Input,capture/compare mode register 0 (input mode)"
|
|
bitfld.long 0x00 12.--15. "CH1CAPFLT,Channel 1 input capture filter control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. "CH1CAPPSC,Channel 1 input capture prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CH1MS,Channel 1 mode selection" "0,1,2,3"
|
|
bitfld.long 0x00 4.--7. "CH0CAPFLT,Channel 0 input capture filter control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 2.--3. "CH0CAPPSC,Channel 0 input capture prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Channel 0 mode selection" "0,1,2,3"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CHCTL1_Output,capture/compare mode register (output mode)"
|
|
bitfld.long 0x00 15. "CH3COMCEN,Channel 3 output compare clear enable" "0,1"
|
|
bitfld.long 0x00 12.--14. "CH3COMCTL,Channel 3 compare output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "CH3COMSEN,Channel 3 output compare shadow enable" "0,1"
|
|
bitfld.long 0x00 10. "CH3COMFEN,Channel 3 output compare fast enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "CH3MS,Channel 3 mode selection" "0,1,2,3"
|
|
bitfld.long 0x00 7. "CH2COMCEN,Channel 2 output compare clear enable" "0,1"
|
|
bitfld.long 0x00 4.--6. "CH2COMCTL,Channel 2 compare output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH2COMSEN,Channel 2 compare output shadow enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CH2COMFEN,Channel 2 output compare fast enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "CH2MS,Channel 2 I/O mode selection" "0,1,2,3"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CHCTL1_Input,capture/compare mode register 1 (input mode)"
|
|
bitfld.long 0x00 12.--15. "CH3CAPFLT,Channel 3 input capture filter control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. "CH3CAPPSC,Channel 3 input capture prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CH3MS,Channel 3 mode selection" "0,1,2,3"
|
|
bitfld.long 0x00 4.--7. "CH2CAPFLT,Input capture 2 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 2.--3. "CH2CAPPSC,Input capture 2 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH2MS,Capture/compare 2 selection" "0,1,2,3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CHCTL2,capture/compare enable register"
|
|
bitfld.long 0x00 13. "CH3P,Capture/Compare 3 output Polarity" "0,1"
|
|
bitfld.long 0x00 12. "CH3EN,Capture/Compare 3 output enable" "0,1"
|
|
bitfld.long 0x00 11. "CH2NP,Capture/Compare 2 output Polarity" "0,1"
|
|
bitfld.long 0x00 10. "CH2NEN,Capture/Compare 2 complementary output enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "CH2P,Capture/Compare 2 output Polarity" "0,1"
|
|
bitfld.long 0x00 8. "CH2EN,Capture/Compare 2 output enable" "0,1"
|
|
bitfld.long 0x00 7. "CH1NP,Capture/Compare 1 output Polarity" "0,1"
|
|
bitfld.long 0x00 6. "CH1NEN,Capture/Compare 1 complementary output enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "CH1P,Capture/Compare 1 output Polarity" "0,1"
|
|
bitfld.long 0x00 4. "CH1EN,Capture/Compare 1 output enable" "0,1"
|
|
bitfld.long 0x00 3. "CH0NP,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 2. "CH0NEN,Capture/Compare 0 complementary output enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CH0P,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 0. "CH0EN,Capture/Compare 1 output enable" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CNT,counter"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,counter value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PSC,prescaler"
|
|
hexmask.long.word 0x00 0.--15. 1. "PSC,Prescaler value"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CAR,auto-reload register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CARL,Counter auto reload value"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CREP,repetition counter register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "CREP,Repetition counter value"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CH0CV,capture/compare register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH0VAL,Capture/Compare 0 value"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CH1CV,capture/compare register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH1VAL,Capture/Compare 1 value"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "CH2CV,capture/compare register 2"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH2VAL,Capture/Compare 2 value"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CH3CV,capture/compare register 3"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH3VAL,Capture/Compare 3 value"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CCHP,channel complementary protection register"
|
|
bitfld.long 0x00 15. "POEN,Main output enable" "0,1"
|
|
bitfld.long 0x00 14. "OAEN,Automatic output enable" "0,1"
|
|
bitfld.long 0x00 13. "BRKP,Break polarity" "0,1"
|
|
bitfld.long 0x00 12. "BRKEN,Break enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "ROS,Off-state selection for Run mode" "0,1"
|
|
bitfld.long 0x00 10. "IOS,Off-state selection for Idle mode" "0,1"
|
|
bitfld.long 0x00 8.--9. "PROT,Lock configuration" "0,1,2,3"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DTCFG,Dead-time generator setup"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DMACFG,DMA configuration register"
|
|
bitfld.long 0x00 8.--12. "DMATC,DMA transfer count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "DMATA,DMA transfer access start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "DMATB,DMA address for full transfer"
|
|
hexmask.long.word 0x00 0.--15. 1. "DMATB,DMA register for burst accesses"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "CFG,Configuration register"
|
|
bitfld.long 0x00 1. "CHVSEL,Write CHxVAL register selection" "0,1"
|
|
bitfld.long 0x00 0. "OUTSEL,The output value selection" "0,1"
|
|
tree.end
|
|
repeat 2. (list 1. 2.) (list ad:0x40000000 ad:0x40000400)
|
|
tree "TIMER$1"
|
|
base $2
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 8.--9. "CKDIV,Clock division" "0,1,2,3"
|
|
bitfld.long 0x00 7. "ARSE,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x00 5.--6. "CAM,Center-aligned mode selection" "0,1,2,3"
|
|
bitfld.long 0x00 4. "DIR,Direction" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "SPM,One-pulse mode" "0,1"
|
|
bitfld.long 0x00 2. "UPS,Update request source" "0,1"
|
|
bitfld.long 0x00 1. "UPDIS,Update disable" "0,1"
|
|
bitfld.long 0x00 0. "CEN,Counter enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 7. "TI0S,TI0 selection" "0,1"
|
|
bitfld.long 0x00 4.--6. "MMC,Master mode selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "DMAS,Capture/compare DMA selection" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SMCFG,slave mode control register"
|
|
bitfld.long 0x00 15. "ETP,External trigger polarity" "0,1"
|
|
bitfld.long 0x00 14. "SMC1,External clock enable" "0,1"
|
|
bitfld.long 0x00 12.--13. "ETPSC,External trigger prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--11. "ETFC,External trigger filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 7. "MSM,Master/Slave mode" "0,1"
|
|
bitfld.long 0x00 4.--6. "TRGS,Trigger selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "OCRC,OCREF clear source selection" "0,1"
|
|
bitfld.long 0x00 0.--2. "SMC,Slave mode selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DMAINTEN,DMA/Interrupt enable register"
|
|
bitfld.long 0x00 14. "TRGDEN,Trigger DMA request enable" "0,1"
|
|
bitfld.long 0x00 12. "CH3DEN,Capture/Compare 3 DMA request enable" "0,1"
|
|
bitfld.long 0x00 11. "CH2DEN,Capture/Compare 2 DMA request enable" "0,1"
|
|
bitfld.long 0x00 10. "CH1DEN,Capture/Compare 1 DMA request enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "CH0DEN,Capture/Compare 1 DMA request enable" "0,1"
|
|
bitfld.long 0x00 8. "UPDEN,Update DMA request enable" "0,1"
|
|
bitfld.long 0x00 6. "TRGIE,Trigger interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "CH3IE,Capture/Compare 3 interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CH2IE,Capture/Compare 2 interrupt enable" "0,1"
|
|
bitfld.long 0x00 2. "CH1IE,Capture/Compare 1 interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CH0IE,Capture/Compare 0 interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "UPIE,Update interrupt enable" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INTF,interrupt flag register"
|
|
bitfld.long 0x00 12. "CH3OF,Capture/Compare 3 overcapture flag" "0,1"
|
|
bitfld.long 0x00 11. "CH2OF,Capture/Compare 2 overcapture flag" "0,1"
|
|
bitfld.long 0x00 10. "CH1OF,Capture/compare 1 overcapture flag" "0,1"
|
|
bitfld.long 0x00 9. "CH0OF,Capture/Compare 0 overcapture flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "TRGIF,Trigger interrupt flag" "0,1"
|
|
bitfld.long 0x00 4. "CH3IF,Capture/Compare 3 interrupt flag" "0,1"
|
|
bitfld.long 0x00 3. "CH2IF,Capture/Compare 2 interrupt flag" "0,1"
|
|
bitfld.long 0x00 2. "CH1IF,Capture/Compare 1 interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CH0IF,Capture/compare 0 interrupt flag" "0,1"
|
|
bitfld.long 0x00 0. "UPIF,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "SWEVG,event generation register"
|
|
bitfld.long 0x00 6. "TRGG,Trigger generation" "0,1"
|
|
bitfld.long 0x00 4. "CH3G,Capture/compare 3 generation" "0,1"
|
|
bitfld.long 0x00 3. "CH2G,Capture/compare 2 generation" "0,1"
|
|
bitfld.long 0x00 2. "CH1G,Capture/compare 1 generation" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CH0G,Capture/compare 0 generation" "0,1"
|
|
bitfld.long 0x00 0. "UPG,Update generation" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Output,capture/compare mode register 0 (output mode)"
|
|
bitfld.long 0x00 15. "CH1COMCEN,Output compare 1 clear enable" "0,1"
|
|
bitfld.long 0x00 12.--14. "CH1COMCTL,Output compare 1 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "CH1COMSEN,Output compare 1 preload enable" "0,1"
|
|
bitfld.long 0x00 10. "CH1COMFEN,Output compare 1 fast enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "CH1MS,Capture/Compare 1 selection" "0,1,2,3"
|
|
bitfld.long 0x00 7. "CH0COMCEN,Output compare 0 clear enable" "0,1"
|
|
bitfld.long 0x00 4.--6. "CH0COMCTL,Output compare 0 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH0COMSEN,Output compare 0 preload enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CH0COMFEN,Output compare 0 fast enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Input,capture/compare mode register 0 (input mode)"
|
|
bitfld.long 0x00 12.--15. "CH1CAPFLT,Input capture 1 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. "CH1CAPPSC,Input capture 1 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CH1MS,Capture/compare 1 selection" "0,1,2,3"
|
|
bitfld.long 0x00 4.--7. "CH0CAPFLT,Input capture 0 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 2.--3. "CH0CAPPSC,Input capture 0 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CHCTL1_Output,capture/compare mode register 1 (output mode)"
|
|
bitfld.long 0x00 15. "CH3COMCEN,Output compare 3 clear enable" "0,1"
|
|
bitfld.long 0x00 12.--14. "CH3COMCTL,Output compare 3 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "CH3COMSEN,Output compare 3 preload enable" "0,1"
|
|
bitfld.long 0x00 10. "CH3COMFEN,Output compare 3 fast enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "CH3MS,Capture/Compare 3 selection" "0,1,2,3"
|
|
bitfld.long 0x00 7. "CH2COMCEN,Output compare 2 clear enable" "0,1"
|
|
bitfld.long 0x00 4.--6. "CH2COMCTL,Output compare 2 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH2COMSEN,Output compare 2 preload enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CH2COMFEN,Output compare 2 fast enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "CH2MS,Capture/Compare 2 selection" "0,1,2,3"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CHCTL1_Input,capture/compare mode register 1 (input mode)"
|
|
bitfld.long 0x00 12.--15. "CH3CAPFLT,Input capture 3 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. "CH3CAPPSC,Input capture 3 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CH3MS,Capture/Compare 3 selection" "0,1,2,3"
|
|
bitfld.long 0x00 4.--7. "CH2CAPFLT,Input capture 2 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 2.--3. "CH2CAPPSC,Input capture 2 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH2MS,Capture/Compare 2 selection" "0,1,2,3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CHCTL2,capture/compare enable register"
|
|
bitfld.long 0x00 15. "CH3NP,Capture/Compare 3 output Polarity" "0,1"
|
|
bitfld.long 0x00 13. "CH3P,Capture/Compare 3 output Polarity" "0,1"
|
|
bitfld.long 0x00 12. "CH3EN,Capture/Compare 3 output enable" "0,1"
|
|
bitfld.long 0x00 11. "CH2NP,Capture/Compare 2 output Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "CH2P,Capture/Compare 2 output Polarity" "0,1"
|
|
bitfld.long 0x00 8. "CH2EN,Capture/Compare 2 output enable" "0,1"
|
|
bitfld.long 0x00 7. "CH1NP,Capture/Compare 1 output Polarity" "0,1"
|
|
bitfld.long 0x00 5. "CH1P,Capture/Compare 1 output Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "CH1EN,Capture/Compare 1 output enable" "0,1"
|
|
bitfld.long 0x00 3. "CH0NP,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 1. "CH0P,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 0. "CH0EN,Capture/Compare 0 output enable" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CNT,counter"
|
|
hexmask.long 0x00 0.--31. 1. "CNT,counter value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PSC,prescaler"
|
|
hexmask.long.word 0x00 0.--15. 1. "PSC,Prescaler value"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CAR,auto-reload register"
|
|
hexmask.long 0x00 0.--31. 1. "CARL,Low Auto-reload value"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CH0CV,capture/compare register 1"
|
|
hexmask.long 0x00 0.--31. 1. "CH0VAL,Low Capture/Compare 1 value"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CH1CV,capture/compare register 2"
|
|
hexmask.long 0x00 0.--31. 1. "CH1VAL,Low Capture/Compare 2 value"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "CH2CV,capture/compare register 2"
|
|
hexmask.long 0x00 0.--31. 1. "CH2VAL,High Capture/Compare value (TIM2 only)"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CH3CV,capture/compare register 3"
|
|
hexmask.long 0x00 0.--31. 1. "CH3VAL,High Capture/Compare value (TIM2 only)"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DMACFG,DMA control register"
|
|
bitfld.long 0x00 8.--12. "DMATC,DMA burst length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "DMATA,DMA base address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "DMATB,DMA address for full transfer"
|
|
hexmask.long.word 0x00 0.--15. 1. "DMATB,DMA register for burst accesses"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "CFG,Configuration"
|
|
bitfld.long 0x00 1. "CHVSEL,Write CHxVAL register selection" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
tree "TIMER5"
|
|
base ad:0x40001000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 7. "ARSE,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x00 3. "SPM,One-pulse mode" "0,1"
|
|
bitfld.long 0x00 2. "UPS,Update request source" "0,1"
|
|
bitfld.long 0x00 1. "UPDIS,Update disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "CEN,Counter enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 4.--6. "MMC,Master mode selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DMAINTEN,DMA/Interrupt enable register"
|
|
bitfld.long 0x00 8. "UPDEN,Update DMA request enable" "0,1"
|
|
bitfld.long 0x00 0. "UPIE,Update interrupt enable" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INTF,status register"
|
|
bitfld.long 0x00 0. "UPIF,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "SWEVG,event generation register"
|
|
bitfld.long 0x00 0. "UPG,Update generation" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CNT,counter"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Low counter value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PSC,prescaler"
|
|
hexmask.long.word 0x00 0.--15. 1. "PSC,Prescaler value"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CAR,auto-reload register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CARL,Low Auto-reload value"
|
|
tree.end
|
|
tree "TIMER13"
|
|
base ad:0x40002000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register 1"
|
|
bitfld.long 0x00 8.--9. "CKDIV,Clock division" "0,1,2,3"
|
|
bitfld.long 0x00 7. "ARSE,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x00 2. "UPS,Update request source" "0,1"
|
|
bitfld.long 0x00 1. "UPDIS,Update disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "CEN,Counter enable" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DMAINTEN,DMA/Interrupt enable register"
|
|
bitfld.long 0x00 1. "CH0IE,Capture/Compare 0 interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "UPIE,Update interrupt enable" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INTF,interrupt flag register"
|
|
bitfld.long 0x00 9. "CH0OF,Capture/Compare 0 overcapture flag" "0,1"
|
|
bitfld.long 0x00 1. "CH0IF,Capture/compare 0 interrupt flag" "0,1"
|
|
bitfld.long 0x00 0. "UPIF,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "SWEVG,event generation register"
|
|
bitfld.long 0x00 1. "CH0G,Capture/compare 0 generation" "0,1"
|
|
bitfld.long 0x00 0. "UPG,Update generation" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Output,capture/compare mode register (output mode)"
|
|
bitfld.long 0x00 4.--6. "CH0COMCTL,Output Compare 0 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH0COMSEN,Output Compare 0 preload enable" "0,1"
|
|
bitfld.long 0x00 2. "CH0COMFEN,Output compare 0 fast enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Input,capture/compare mode register (input mode)"
|
|
bitfld.long 0x00 4.--7. "CH0CAPFLT,Input capture 0 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. "CH0CAPPSC,Input capture 0 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CHCTL2,capture/compare enable register"
|
|
bitfld.long 0x00 3. "CH0NP,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 1. "CH0P,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 0. "CH0EN,Capture/Compare 1 output enable" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CNT,counter"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,counter value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PSC,prescaler"
|
|
hexmask.long.word 0x00 0.--15. 1. "PSC,Prescaler value"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CAR,auto-reload register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CARL,Auto-reload value"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CH0CV,capture/compare register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH0VAL,Capture/Compare 1 value"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "IRMP,channel input remap register"
|
|
bitfld.long 0x00 0.--1. "CI0_RMP,Timer input 0 remap" "0,1,2,3"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "CFG,configuration register"
|
|
bitfld.long 0x00 1. "CHVSEL,Write CHxVAL register selection" "0,1"
|
|
tree.end
|
|
tree "TIMER14"
|
|
base ad:0x40014000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 8.--9. "CKDIV,Clock division" "0,1,2,3"
|
|
bitfld.long 0x00 7. "ARSE,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x00 3. "SPM,One-pulse mode" "0,1"
|
|
bitfld.long 0x00 2. "UPS,Update request source" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "UPDIS,Update disable" "0,1"
|
|
bitfld.long 0x00 0. "CEN,Counter enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 10. "ISO1,Output Idle state 1" "0,1"
|
|
bitfld.long 0x00 9. "ISO0N,Output Idle state 0" "0,1"
|
|
bitfld.long 0x00 8. "ISO0,Output Idle state 0" "0,1"
|
|
bitfld.long 0x00 4.--6. "MMC,Master mode selection" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3. "DMAS,Capture/compare DMA selection" "0,1"
|
|
bitfld.long 0x00 2. "CCUC,Capture/compare control update selection" "0,1"
|
|
bitfld.long 0x00 0. "CCSE,Capture/compare preloaded control" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SMCFG,slave mode configuration register"
|
|
bitfld.long 0x00 7. "MSM,Master/Slave mode" "0,1"
|
|
bitfld.long 0x00 4.--6. "TRGS,Trigger selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "SMC,Slave mode selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DMAINTEN,DMA/Interrupt enable register"
|
|
bitfld.long 0x00 14. "TRGDEN,Trigger DMA request enable" "0,1"
|
|
bitfld.long 0x00 13. "CMTDEN,Commutation DMA request enable" "0,1"
|
|
bitfld.long 0x00 10. "CH1DEN,Capture/Compare 1 DMA request enable" "0,1"
|
|
bitfld.long 0x00 9. "CH0DEN,Capture/Compare 0 DMA request enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "UPDEN,Update DMA request enable" "0,1"
|
|
bitfld.long 0x00 7. "BRKIE,Break interrupt enable" "0,1"
|
|
bitfld.long 0x00 6. "TRGIE,Trigger interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "CMTIE,COM interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CH1IE,Capture/Compare 2 interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CH0IE,Capture/Compare 1 interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "UPIE,Update interrupt enable" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INTF,interrupt flag register"
|
|
bitfld.long 0x00 10. "CH1OF,Capture/compare 1 overcapture flag" "0,1"
|
|
bitfld.long 0x00 9. "CH0OF,Capture/Compare 0 overcapture flag" "0,1"
|
|
bitfld.long 0x00 7. "BRKIF,Break interrupt flag" "0,1"
|
|
bitfld.long 0x00 6. "TRGIF,Trigger interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "CMTIF,COM interrupt flag" "0,1"
|
|
bitfld.long 0x00 2. "CH1IF,Capture/Compare 1 interrupt flag" "0,1"
|
|
bitfld.long 0x00 1. "CH0IF,Capture/compare 0 interrupt flag" "0,1"
|
|
bitfld.long 0x00 0. "UPIF,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "SWEVG,event generation register"
|
|
bitfld.long 0x00 7. "BRKG,Break generation" "0,1"
|
|
bitfld.long 0x00 6. "TRGG,Trigger generation" "0,1"
|
|
bitfld.long 0x00 5. "CMTG,Capture/Compare control update generation" "0,1"
|
|
bitfld.long 0x00 2. "CH1G,Capture/compare 1 generation" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CH0G,Capture/compare 0 generation" "0,1"
|
|
bitfld.long 0x00 0. "UPG,Update generation" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Output,capture/compare mode register (output mode)"
|
|
bitfld.long 0x00 12.--14. "CH1COMCTL,Output Compare 1 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "CH1COMSEN,Output Compare 1 preload enable" "0,1"
|
|
bitfld.long 0x00 10. "CH1COMFEN,Output Compare 1 fast enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "CH1MS,Capture/Compare 1 selection" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 4.--6. "CH0COMCTL,Output Compare 0 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH0COMSEN,Output Compare 0 preload enable" "0,1"
|
|
bitfld.long 0x00 2. "CH0COMFEN,Output Compare 0 fast enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Input,capture/compare mode register 0 (input mode)"
|
|
bitfld.long 0x00 12.--15. "CH1CAPFLT,Input capture 1 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. "CH1CAPPSC,Input capture 1 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "CH1MS,Capture/Compare 1 selection" "0,1,2,3"
|
|
bitfld.long 0x00 4.--7. "CH0CAPFLT,Input capture 0 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 2.--3. "CH0CAPPSC,Input capture 0 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CHCTL2,capture/compare enable register"
|
|
bitfld.long 0x00 7. "CH1NP,Capture/Compare 1 output Polarity" "0,1"
|
|
bitfld.long 0x00 5. "CH1P,Capture/Compare 1 output Polarity" "0,1"
|
|
bitfld.long 0x00 4. "CH1EN,Capture/Compare 1 output enable" "0,1"
|
|
bitfld.long 0x00 3. "CH0NP,Capture/Compare 0 output Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CH0NEN,Capture/Compare 0 complementary output enable" "0,1"
|
|
bitfld.long 0x00 1. "CH0P,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 0. "CH0EN,Capture/Compare 0 output enable" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CNT,counter"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,counter value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PSC,prescaler"
|
|
hexmask.long.word 0x00 0.--15. 1. "PSC,Prescaler value"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CAR,auto-reload register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CARL,Auto-reload value"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CREP,repetition counter register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "CREP,Repetition counter value"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CH0CV,capture/compare register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH0VAL,Capture/Compare 0 value"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CH1CV,capture/compare register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH1VAL,Capture/Compare 1 value"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CCHP,break and dead-time register"
|
|
bitfld.long 0x00 15. "POEN,Main output enable" "0,1"
|
|
bitfld.long 0x00 14. "OAEN,Automatic output enable" "0,1"
|
|
bitfld.long 0x00 13. "BRKP,Break polarity" "0,1"
|
|
bitfld.long 0x00 12. "BRKEN,Break enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "ROS,Off-state selection for Run mode" "0,1"
|
|
bitfld.long 0x00 10. "IOS,Off-state selection for Idle mode" "0,1"
|
|
bitfld.long 0x00 8.--9. "PROT,complementary register protect control" "0,1,2,3"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DTCFG,Dead-time generator configure"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DMACFG,DMA configuration register"
|
|
bitfld.long 0x00 8.--12. "DMATC,DMA burst length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "DMATA,DMA base address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "DMATB,DMA transfer buffer register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DMATB,DMA register for burst accesses"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "CFG,configuration register"
|
|
bitfld.long 0x00 1. "CHVSEL,Write CHxVAL register selection" "0,1"
|
|
bitfld.long 0x00 0. "OUTSEL,The output value selection" "0,1"
|
|
tree.end
|
|
repeat 2. (list 15. 16.) (list ad:0x40014400 ad:0x40014800)
|
|
tree "TIMER$1"
|
|
base $2
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register 0"
|
|
bitfld.long 0x00 8.--9. "CKDIV,Clock division" "0,1,2,3"
|
|
bitfld.long 0x00 7. "ARSE,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x00 3. "SPM,One-pulse mode" "0,1"
|
|
bitfld.long 0x00 2. "UPS,Update request source" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "UPDIS,Update disable" "0,1"
|
|
bitfld.long 0x00 0. "CEN,Counter enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 9. "ISO0N,Output Idle state 0" "0,1"
|
|
bitfld.long 0x00 8. "ISO0,Output Idle state 0" "0,1"
|
|
bitfld.long 0x00 3. "DMAS,Capture/compare DMA selection" "0,1"
|
|
bitfld.long 0x00 2. "CCUC,Capture/compare control update selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "CCSE,Capture/compare preloaded control" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DMAINTEN,DMA/Interrupt enable register"
|
|
bitfld.long 0x00 9. "CH0DEN,Capture/Compare 0 DMA request enable" "0,1"
|
|
bitfld.long 0x00 8. "UPDEN,Update DMA request enable" "0,1"
|
|
bitfld.long 0x00 7. "BRKIE,Break interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "CMTIE,COM interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CH0IE,Capture/Compare 0 interrupt enable" "0,1"
|
|
bitfld.long 0x00 0. "UPIE,Update interrupt enable" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INTF,interrupt flag register"
|
|
bitfld.long 0x00 9. "CH0OF,Capture/Compare 0 overcapture flag" "0,1"
|
|
bitfld.long 0x00 7. "BRKIF,Break interrupt flag" "0,1"
|
|
bitfld.long 0x00 5. "CMTIF,COM interrupt flag" "0,1"
|
|
bitfld.long 0x00 1. "CH0IF,Capture/compare 0 interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "UPIF,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "SWEVG,event generation register"
|
|
bitfld.long 0x00 7. "BRKG,Break generation" "0,1"
|
|
bitfld.long 0x00 5. "CMTG,Capture/Compare control update generation" "0,1"
|
|
bitfld.long 0x00 1. "CH0G,Capture/compare 0 generation" "0,1"
|
|
bitfld.long 0x00 0. "UPG,Update generation" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Output,capture/compare mode register (output mode)"
|
|
bitfld.long 0x00 4.--6. "CH0COMCTL,Output Compare 0 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. "CH0COMSEN,Output Compare 0 preload enable" "0,1"
|
|
bitfld.long 0x00 2. "CH0COMFEN,Output Compare 0 fast enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCTL0_Input,capture/compare mode register 0 (input mode)"
|
|
bitfld.long 0x00 4.--7. "CH0CAPFLT,Input capture 0 filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. "CH0CAPPSC,Input capture 0 prescaler" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. "CH0MS,Capture/Compare 0 selection" "0,1,2,3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CHCTL2,capture/compare enable register"
|
|
bitfld.long 0x00 3. "CH0NP,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 2. "CH0NEN,Capture/Compare 0 complementary output enable" "0,1"
|
|
bitfld.long 0x00 1. "CH0P,Capture/Compare 0 output Polarity" "0,1"
|
|
bitfld.long 0x00 0. "CH0EN,Capture/Compare 0 output enable" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CNT,counter"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,counter value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PSC,prescaler"
|
|
hexmask.long.word 0x00 0.--15. 1. "PSC,Prescaler value"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CAR,auto-reload register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CARL,Auto-reload value"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CREP,repetition counter register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "CREP,Repetition counter value"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CH0CV,capture/compare register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. "CH0VAL,Capture/Compare 0 value"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CCHP,break and dead-time register"
|
|
bitfld.long 0x00 15. "POEN,Main output enable" "0,1"
|
|
bitfld.long 0x00 14. "OAEN,Automatic output enable" "0,1"
|
|
bitfld.long 0x00 13. "BRKP,Break polarity" "0,1"
|
|
bitfld.long 0x00 12. "BRKEN,Break enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "ROS,Off-state selection for Run mode" "0,1"
|
|
bitfld.long 0x00 10. "IOS,Off-state selection for Idle mode" "0,1"
|
|
bitfld.long 0x00 8.--9. "PROT,complementary register protect control" "0,1,2,3"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DTCFG,Dead-time generator setup"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DMACFG,DMA configuration register"
|
|
bitfld.long 0x00 8.--12. "DMATC,DMA transfer count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "DMATA,DMA transfer access start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "DMATB,DMA transfer buffer register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DMATB,DMA register for burst accesses"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "CFG,configuration register"
|
|
bitfld.long 0x00 1. "CHVSEL,Write CHxVAL register selection" "0,1"
|
|
bitfld.long 0x00 0. "OUTSEL,The output value selection" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "TSI (Touch sensing Interface)"
|
|
base ad:0x40024000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,control register"
|
|
bitfld.long 0x00 28.--31. "CDT,Charge transfer pulse high" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "CTDT,Charge transfer pulse low" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 17.--23. 1. "ECDT,Spread spectrum deviation"
|
|
bitfld.long 0x00 16. "ECEN,Spread spectrum enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "ECDIV,Spread spectrum prescaler" "0,1"
|
|
bitfld.long 0x00 12.--14. "CTCDIV,pulse generator prescaler" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 5.--7. "MCN,Max count value" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4. "PINMOD,I/O Default mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "EGSEL,Edge selection" "0,1"
|
|
bitfld.long 0x00 2. "TRGMOD,Trigger mode selection" "0,1"
|
|
bitfld.long 0x00 1. "TSIS,Start a new acquisition" "0,1"
|
|
bitfld.long 0x00 0. "TSIEN,Touch sensing controller enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "INTEN,interrupt enable register"
|
|
bitfld.long 0x00 1. "MNERRIE,Max Cycle Number Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. "CTCFIE,Charge-transfer complete flag Interrupt Enable" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "INTC,interrupt flag clear register"
|
|
bitfld.long 0x00 1. "CMNERR,Clear max cycle number error" "0,1"
|
|
bitfld.long 0x00 0. "CCTCF,Clear charge-transfer complete flag" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "INTF,interrupt flag register"
|
|
bitfld.long 0x00 1. "MNERR,Max count error flag" "0,1"
|
|
bitfld.long 0x00 0. "CTCF,End of acquisition flag" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PHM,Pin hysteresis mode register"
|
|
bitfld.long 0x00 23. "G5P3,G5P3 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 22. "G5P2,G5P2 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 21. "G5P1,G5P1 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 20. "G5P0,G5P0 Schmitt trigger hysteresis mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "G4P3,G4P3 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 18. "G4P2,G4P2 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 17. "G4P1,G4P1 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 16. "G4P0,G4P0 Schmitt trigger hysteresis mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "G3P3,G3P3 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 14. "G3P2,G3P2 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 13. "G3P1,G3P1 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 12. "G3P0,G3P0 Schmitt trigger hysteresis mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "G2P3,G2P3 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 10. "G2P2,G2P2 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 9. "G2P1,G2P1 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 8. "G2P0,G2P0 Schmitt trigger hysteresis mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "G1P3,G1P3 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 6. "G1P2,G1P2 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 5. "G1P1,G1P1 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 4. "G1P0,G1P0 Schmitt trigger hysteresis mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "G0P3,G0P3 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 2. "G0P2,G0P2 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 1. "G0P1,G0P1 Schmitt trigger hysteresis mode" "0,1"
|
|
bitfld.long 0x00 0. "G0P0,G0P0 Schmitt trigger hysteresis mode" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "ASW,I/O analog switch register"
|
|
bitfld.long 0x00 23. "G5P3,G5P3 analog switch enable" "0,1"
|
|
bitfld.long 0x00 22. "G5P2,G5P2 analog switch enable" "0,1"
|
|
bitfld.long 0x00 21. "G5P1,G5P1 analog switch enable" "0,1"
|
|
bitfld.long 0x00 20. "G5P0,G5P0 analog switch enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "G4P3,G4P3 analog switch enable" "0,1"
|
|
bitfld.long 0x00 18. "G4P2,G4P2 analog switch enable" "0,1"
|
|
bitfld.long 0x00 17. "G4P1,G4P1 analog switch enable" "0,1"
|
|
bitfld.long 0x00 16. "G4P0,G4P0 analog switch enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "G3P3,G3P3 analog switch enable" "0,1"
|
|
bitfld.long 0x00 14. "G3P2,G3P2 analog switch enable" "0,1"
|
|
bitfld.long 0x00 13. "G3P1,G3P1 analog switch enable" "0,1"
|
|
bitfld.long 0x00 12. "G3P0,G3P0 analog switch enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "G2P3,G2P3 analog switch enable" "0,1"
|
|
bitfld.long 0x00 10. "G2P2,G2P2 analog switch enable" "0,1"
|
|
bitfld.long 0x00 9. "G2P1,G2P1 analog switch enable" "0,1"
|
|
bitfld.long 0x00 8. "G2P0,G2P0 analog switch enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "G1P3,G1P3 analog switch enable" "0,1"
|
|
bitfld.long 0x00 6. "G1P2,G1P2 analog switch enable" "0,1"
|
|
bitfld.long 0x00 5. "G1P1,G1P1 analog switch enable" "0,1"
|
|
bitfld.long 0x00 4. "G1P0,G1P0 analog switch enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "G0P3,G0P3 analog switch enable" "0,1"
|
|
bitfld.long 0x00 2. "G0P2,G0P2 analog switch enable" "0,1"
|
|
bitfld.long 0x00 1. "G0P1,G0P1 analog switch enable" "0,1"
|
|
bitfld.long 0x00 0. "G0P0,G0P0 analog switch enable" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "SAMPCFG,I/O sample configuration register"
|
|
bitfld.long 0x00 23. "G5P3,G5P3 sampling mode" "0,1"
|
|
bitfld.long 0x00 22. "G5P2,G5P2 sampling mode" "0,1"
|
|
bitfld.long 0x00 21. "G5P1,G5P1 sampling mode" "0,1"
|
|
bitfld.long 0x00 20. "G5P0,G5P0 sampling mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "G4P3,G4P3 sampling mode" "0,1"
|
|
bitfld.long 0x00 18. "G4P2,G4P2 sampling mode" "0,1"
|
|
bitfld.long 0x00 17. "G4P1,G4P1 sampling mode" "0,1"
|
|
bitfld.long 0x00 16. "G4P0,G4P0 sampling mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "G3P3,G3P3 sampling mode" "0,1"
|
|
bitfld.long 0x00 14. "G3P2,G3P2 sampling mode" "0,1"
|
|
bitfld.long 0x00 13. "G3P1,G3P1 sampling mode" "0,1"
|
|
bitfld.long 0x00 12. "G3P0,G3P0 sampling mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "G2P3,G2P3 sampling mode" "0,1"
|
|
bitfld.long 0x00 10. "G2P2,G2P2 sampling mode" "0,1"
|
|
bitfld.long 0x00 9. "G2P1,G2P1 sampling mode" "0,1"
|
|
bitfld.long 0x00 8. "G2P0,G2P0 sampling mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "G1P3,G1P3 sampling mode" "0,1"
|
|
bitfld.long 0x00 6. "G1P2,G1P2 sampling mode" "0,1"
|
|
bitfld.long 0x00 5. "G1P1,G1P1 sampling mode" "0,1"
|
|
bitfld.long 0x00 4. "G1P0,G1P0 sampling mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "G0P3,G0P3 sampling mode" "0,1"
|
|
bitfld.long 0x00 2. "G0P2,G0P2 sampling mode" "0,1"
|
|
bitfld.long 0x00 1. "G0P1,G0P1 sampling mode" "0,1"
|
|
bitfld.long 0x00 0. "G0P0,G0P0 sampling mode" "0,1"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CHCFG,I/O channel configuration register"
|
|
bitfld.long 0x00 23. "G5P3,G5P3 channel mode" "0,1"
|
|
bitfld.long 0x00 22. "G5P2,G5P2 channel mode" "0,1"
|
|
bitfld.long 0x00 21. "G5P1,G5P1 channel mode" "0,1"
|
|
bitfld.long 0x00 20. "G5P0,G5P0 channel mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "G4P3,G4P3 channel mode" "0,1"
|
|
bitfld.long 0x00 18. "G4P2,G4P2 channel mode" "0,1"
|
|
bitfld.long 0x00 17. "G4P1,G4P1 channel mode" "0,1"
|
|
bitfld.long 0x00 16. "G4P0,G4P0 channel mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "G3P3,G3P3 channel mode" "0,1"
|
|
bitfld.long 0x00 14. "G3P2,G3P2 channel mode" "0,1"
|
|
bitfld.long 0x00 13. "G3P1,G3P1 channel mode" "0,1"
|
|
bitfld.long 0x00 12. "G3P0,G3P0 channel mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "G2P3,G2P3 channel mode" "0,1"
|
|
bitfld.long 0x00 10. "G2P2,G2P2 channel mode" "0,1"
|
|
bitfld.long 0x00 9. "G2P1,G2P1 channel mode" "0,1"
|
|
bitfld.long 0x00 8. "G2P0,G2P0 channel mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "G1P3,G1P3 channel mode" "0,1"
|
|
bitfld.long 0x00 6. "G1P2,G1P2 channel mode" "0,1"
|
|
bitfld.long 0x00 5. "G1P1,G1P1 channel mode" "0,1"
|
|
bitfld.long 0x00 4. "G1P0,G1P0 channel mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "G0P3,G0P3 channel mode" "0,1"
|
|
bitfld.long 0x00 2. "G0P2,G0P2 channel mode" "0,1"
|
|
bitfld.long 0x00 1. "G0P1,G0P1 channel mode" "0,1"
|
|
bitfld.long 0x00 0. "G0P0,G0P0 channel mode" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "GCTL,I/O group control register"
|
|
rbitfld.long 0x00 21. "GC5,Analog I/O group x status" "0,1"
|
|
rbitfld.long 0x00 20. "GC4,Analog I/O group x status" "0,1"
|
|
rbitfld.long 0x00 19. "GC3,Analog I/O group x status" "0,1"
|
|
rbitfld.long 0x00 18. "GC2,Analog I/O group x status" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 17. "GC1,Analog I/O group x status" "0,1"
|
|
rbitfld.long 0x00 16. "GC0,Analog I/O group x status" "0,1"
|
|
bitfld.long 0x00 5. "GE5,Analog I/O group x enable" "0,1"
|
|
bitfld.long 0x00 4. "GE4,Analog I/O group x enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "GE3,Analog I/O group x enable" "0,1"
|
|
bitfld.long 0x00 2. "GE2,Analog I/O group x enable" "0,1"
|
|
bitfld.long 0x00 1. "GE1,Analog I/O group x enable" "0,1"
|
|
bitfld.long 0x00 0. "GE0,Analog I/O group x enable" "0,1"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "G0CYCN,I/O group x cycle number register"
|
|
hexmask.long.word 0x00 0.--13. 1. "CYCN,Cycle number"
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "G1CYCN,I/O group x cycle number register"
|
|
hexmask.long.word 0x00 0.--13. 1. "CYCN,Cycle number"
|
|
rgroup.long 0x3C++0x03
|
|
line.long 0x00 "G2CYCN,I/O group x cycle number register"
|
|
hexmask.long.word 0x00 0.--13. 1. "CYCN,Cycle number"
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "G3CYCN,I/O group x cycle number register"
|
|
hexmask.long.word 0x00 0.--13. 1. "CYCN,Cycle number"
|
|
rgroup.long 0x44++0x03
|
|
line.long 0x00 "G4CYCN,I/O group x cycle number register"
|
|
hexmask.long.word 0x00 0.--13. 1. "CYCN,Cycle number"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "G5CYCN,I/O group x cycle number register"
|
|
hexmask.long.word 0x00 0.--13. 1. "CYCN,Cycle number"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "CTL1,control register 1"
|
|
bitfld.long 0x00 28.--29. "ECDIV,Extend Charge clock division factor" "0,1,2,3"
|
|
bitfld.long 0x00 24. "CTCDIV_MSB,Charge Transfer clock division factor" "0,1"
|
|
tree.end
|
|
tree "USART (Universal synchronous asynchronous receiver transmitter)"
|
|
repeat 2. (list 0. 1.) (list ad:0x40013800 ad:0x40004400)
|
|
tree "USART$1"
|
|
base $2
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL0,Control register 0"
|
|
bitfld.long 0x00 27. "EBIE,End of Block interrupt enable" "0,1"
|
|
bitfld.long 0x00 26. "RTIE,Receiver timeout interrupt enable" "0,1"
|
|
bitfld.long 0x00 21.--25. "DEA,Driver Enable assertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--20. "DED,Driver Enable deassertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 15. "OVSMOD,Oversampling mode" "0,1"
|
|
bitfld.long 0x00 14. "AMIE,Character match interrupt enable" "0,1"
|
|
bitfld.long 0x00 13. "MEN,Mute mode enable" "0,1"
|
|
bitfld.long 0x00 12. "WL,Word length" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "WM,Receiver wakeup method" "0,1"
|
|
bitfld.long 0x00 10. "PCEN,Parity control enable" "0,1"
|
|
bitfld.long 0x00 9. "PM,Parity selection" "0,1"
|
|
bitfld.long 0x00 8. "PERRIE,PE interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "TBEIE,interrupt enable" "0,1"
|
|
bitfld.long 0x00 6. "TCIE,Transmission complete interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "RBNEIE,RXNE interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "IDLEIE,IDLE interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TEN,Transmitter enable" "0,1"
|
|
bitfld.long 0x00 2. "REN,Receiver enable" "0,1"
|
|
bitfld.long 0x00 1. "UESM,USART enable in Stop mode" "0,1"
|
|
bitfld.long 0x00 0. "UEN,USART enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTL1,Control register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. "ADDR,Address of the USART node"
|
|
bitfld.long 0x00 23. "RTEN,Receiver timeout enable" "0,1"
|
|
bitfld.long 0x00 21.--22. "ABDM,Auto baud rate mode" "0,1,2,3"
|
|
bitfld.long 0x00 20. "ABDEN,Auto baud rate enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "MSBF,Most significant bit first" "0,1"
|
|
bitfld.long 0x00 18. "DINV,Binary data inversion" "0,1"
|
|
bitfld.long 0x00 17. "TINV,TX pin active level inversion" "0,1"
|
|
bitfld.long 0x00 16. "RINV,RX pin active level inversion" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "STRP,Swap TX/RX pins" "0,1"
|
|
bitfld.long 0x00 14. "LMEN,LIN mode enable" "0,1"
|
|
bitfld.long 0x00 12.--13. "STB,STOP bits" "0,1,2,3"
|
|
bitfld.long 0x00 11. "CKEN,Clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "CPL,Clock polarity" "0,1"
|
|
bitfld.long 0x00 9. "CPH,Clock phase" "0,1"
|
|
bitfld.long 0x00 8. "CLEN,Last bit clock pulse" "0,1"
|
|
bitfld.long 0x00 6. "LBDIE,LIN break detection interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "LBLEN,LIN break detection length" "0,1"
|
|
bitfld.long 0x00 4. "ADDM,7-bit Address Detection/4-bit Address Detection" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTL2,Control register 2"
|
|
bitfld.long 0x00 22. "WUIE,Wakeup from Stop mode interrupt enable" "0,1"
|
|
bitfld.long 0x00 20.--21. "WUM,Wakeup from Stop mode interrupt flag selection" "0,1,2,3"
|
|
bitfld.long 0x00 17.--19. "SCRTNUM,Smartcard auto-retry count" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "DEP,Driver enable polarity selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "DEM,Driver enable mode" "0,1"
|
|
bitfld.long 0x00 13. "DDRE,DMA Disable on Reception Error" "0,1"
|
|
bitfld.long 0x00 12. "OVRD,Overrun Disable" "0,1"
|
|
bitfld.long 0x00 11. "OSB,One sample bit method enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "CTSIE,CTS interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "CTSEN,CTS enable" "0,1"
|
|
bitfld.long 0x00 8. "RTSEN,RTS enable" "0,1"
|
|
bitfld.long 0x00 7. "DENT,DMA enable transmitter" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "DENR,DMA enable receiver" "0,1"
|
|
bitfld.long 0x00 5. "SCEN,Smartcard mode enable" "0,1"
|
|
bitfld.long 0x00 4. "NKEN,Smartcard NACK enable" "0,1"
|
|
bitfld.long 0x00 3. "HDEN,Half-duplex selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "IRLP,IrDA low-power" "0,1"
|
|
bitfld.long 0x00 1. "IREN,IrDA mode enable" "0,1"
|
|
bitfld.long 0x00 0. "ERRIE,Error interrupt enable" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "BAUD,Baud rate register"
|
|
hexmask.long.word 0x00 4.--15. 1. "BRR_INT,integer of baud-rate divider"
|
|
bitfld.long 0x00 0.--3. "BRR_FRA,integer of baud-rate divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "GP,Guard time and prescaler register"
|
|
hexmask.long.byte 0x00 8.--15. 1. "GUAT,Guard time value"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PSC,Prescaler value"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "RT,Receiver timeout register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "BL,Block Length"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "RT,Receiver timeout value"
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "CMD,Request register"
|
|
bitfld.long 0x00 4. "TXFCMD,Transmit data flush request" "0,1"
|
|
bitfld.long 0x00 3. "RXFCMD,Receive data flush request" "0,1"
|
|
bitfld.long 0x00 2. "MMCMD,Mute mode request" "0,1"
|
|
bitfld.long 0x00 1. "SBKCMD,Send break request" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "ABDCMD,Auto baud rate request" "0,1"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "STAT,Interrupt & status register"
|
|
bitfld.long 0x00 22. "REA,Receive enable acknowledge flag" "0,1"
|
|
bitfld.long 0x00 21. "TEA,Transmit enable acknowledge flag" "0,1"
|
|
bitfld.long 0x00 20. "WUF,Wakeup from Stop mode flag" "0,1"
|
|
bitfld.long 0x00 19. "RWU,Receiver wakeup from Mute mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "SBF,Send break flag" "0,1"
|
|
bitfld.long 0x00 17. "AMF,character match flag" "0,1"
|
|
bitfld.long 0x00 16. "BSY,Busy flag" "0,1"
|
|
bitfld.long 0x00 15. "ABDF,Auto baud rate flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "ABDE,Auto baud rate error" "0,1"
|
|
bitfld.long 0x00 12. "EBF,End of block flag" "0,1"
|
|
bitfld.long 0x00 11. "RTF,Receiver timeout" "0,1"
|
|
bitfld.long 0x00 10. "CTS,CTS flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "CTSF,CTS interrupt flag" "0,1"
|
|
bitfld.long 0x00 8. "LBDF,LIN break detection flag" "0,1"
|
|
bitfld.long 0x00 7. "TBE,Transmit data register empty" "0,1"
|
|
bitfld.long 0x00 6. "TC,Transmission complete" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "RBNE,Read data register not empty" "0,1"
|
|
bitfld.long 0x00 4. "IDLEF,Idle line detected" "0,1"
|
|
bitfld.long 0x00 3. "ORERR,Overrun error" "0,1"
|
|
bitfld.long 0x00 2. "NERR,Noise detected flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "FERR,Framing error" "0,1"
|
|
bitfld.long 0x00 0. "PERR,Parity error" "0,1"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "INTC,Interrupt flag clear register"
|
|
bitfld.long 0x00 20. "WUC,Wakeup from Stop mode clear flag" "0,1"
|
|
bitfld.long 0x00 17. "AMC,Character match clear flag" "0,1"
|
|
bitfld.long 0x00 12. "EBC,End of timeout clear flag" "0,1"
|
|
bitfld.long 0x00 11. "RTC,Receiver timeout clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "CTSC,CTS clear flag" "0,1"
|
|
bitfld.long 0x00 8. "LBDC,LIN break detection clear flag" "0,1"
|
|
bitfld.long 0x00 6. "TCC,Transmission complete clear flag" "0,1"
|
|
bitfld.long 0x00 4. "IDLEC,Idle line detected clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "OREC,Overrun error clear flag" "0,1"
|
|
bitfld.long 0x00 2. "NEC,Noise detected clear flag" "0,1"
|
|
bitfld.long 0x00 1. "FEC,Framing error clear flag" "0,1"
|
|
bitfld.long 0x00 0. "PEC,Parity error clear flag" "0,1"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "RDATA,Receive data register"
|
|
hexmask.long.word 0x00 0.--8. 1. "RDATA,Receive data value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "TDATA,Transmit data register"
|
|
hexmask.long.word 0x00 0.--8. 1. "TDATA,Transmit data value"
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "RFCS,USART receive FIFO control and status register"
|
|
bitfld.long 0x00 15. "RFFINT,Receive FIFO full interrupt flag" "0,1"
|
|
bitfld.long 0x00 12.--14. "RFCNT,Receive FIFO count number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "RFF,Receive FIFO full flag" "0,1"
|
|
bitfld.long 0x00 10. "RFE,Receive FIFO empty flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "RFFIE,Receive FIFO full interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "RFEN,Receive FIFO enable" "0,1"
|
|
bitfld.long 0x00 0. "ELNACK,Early NKEN when smartcard mode is selected" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "USBFS (USB on the go full speed device)"
|
|
tree "USBFS_DEVICE"
|
|
base ad:0x50000800
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DCFG,device configuration register (DCFG)"
|
|
bitfld.long 0x00 11.--12. "EOPFT,end of periodic frame time" "0,1,2,3"
|
|
hexmask.long.byte 0x00 4.--10. 1. "DAR,Device address"
|
|
bitfld.long 0x00 2. "NZLSOH,Non-zero-length status OUT handshake" "0,1"
|
|
bitfld.long 0x00 0.--1. "DS,Device speed" "0,1,2,3"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "DCTL,device control register (DCTL)"
|
|
bitfld.long 0x00 11. "POIF,Power-on initialization flag" "0,1"
|
|
bitfld.long 0x00 10. "CGONAK,Clear global OUT NAK" "0,1"
|
|
bitfld.long 0x00 9. "SGONAK,Set global OUT NAK" "0,1"
|
|
bitfld.long 0x00 8. "CGINAK,Clear global IN NAK" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "SGINAK,Set global IN NAK" "0,1"
|
|
rbitfld.long 0x00 3. "GONS,Global OUT NAK status" "0,1"
|
|
rbitfld.long 0x00 2. "GINS,Global IN NAK status" "0,1"
|
|
bitfld.long 0x00 1. "SD,Soft disconnect" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "RWKUP,Remote wakeup" "0,1"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "DSTAT,device status register (DSTAT)"
|
|
hexmask.long.word 0x00 8.--21. 1. "FNRSOF,Frame number of the received SOF"
|
|
bitfld.long 0x00 1.--2. "ES,Enumerated speed" "0,1,2,3"
|
|
bitfld.long 0x00 0. "SPST,Suspend status" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "DIEPINTEN,device IN endpoint common interrupt mask register (DIEPINTEN)"
|
|
bitfld.long 0x00 6. "IEPNEEN,IN endpoint NAK effective interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "EPTXFUDEN,Endpoint Tx FIFO underrun interrupt enable bit" "0,1"
|
|
bitfld.long 0x00 3. "CITOEN,Control IN timeout condition interrupt enable (Non-isochronous endpoints)" "0,1"
|
|
bitfld.long 0x00 1. "EPDISEN,Endpoint disabled interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TFEN,Transfer finished interrupt enable" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "DOEPINTEN,device OUT endpoint common interrupt enable register (DOEPINTEN)"
|
|
bitfld.long 0x00 6. "BTBSTPEN,Back-to-back SETUP packets interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "EPRXFOVREN,Endpoint Rx FIFO overrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "STPFEN,SETUP phase finished interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "EPDISEN,Endpoint disabled interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TFEN,Transfer finished interrupt enable" "0,1"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "DAEPINT,device all endpoints interrupt register (DAEPINT)"
|
|
bitfld.long 0x00 16.--19. "OEPITB,Device all OUT endpoint interrupt bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "IEPITB,Device all IN endpoint interrupt bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "DAEPINTEN,Device all endpoints interrupt enable register (DAEPINTEN)"
|
|
bitfld.long 0x00 16.--19. "OEPIE,OUT endpoint interrupt enable bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "IEPIE,IN EP interrupt interrupt enable bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DVBUSDT,device VBUS discharge time register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DVBUSDT,Device VBUS discharge time"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "DVBUSPT,device VBUS pulsing time register"
|
|
hexmask.long.word 0x00 0.--11. 1. "DVBUSPT,Device VBUS pulsing time"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "DIEPFEINTEN,device IN endpoint FIFO empty interrupt enable register"
|
|
bitfld.long 0x00 0.--3. "IEPTXFEIE,IN EP Tx FIFO empty interrupt enable bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "DIEP0CTL,device IN endpoint 0 control register (DIEP0CTL)"
|
|
bitfld.long 0x00 31. "EPEN,Endpoint enable" "0,1"
|
|
bitfld.long 0x00 30. "EPD,Endpoint disable" "0,1"
|
|
bitfld.long 0x00 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x00 26. "CNAK,Clear NAK" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22.--25. "TXFNUM,TxFIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 21. "STALL,STALL handshake" "0,1"
|
|
rbitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x00 17. "NAKS,NAK status" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 15. "EPACT,endpoint active" "0,1"
|
|
bitfld.long 0x00 0.--1. "MPL,Maximum packet length" "0,1,2,3"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "DIEP1CTL,device in endpoint-1 control register"
|
|
bitfld.long 0x00 31. "EPEN,Endpoint enable" "0,1"
|
|
bitfld.long 0x00 30. "EPD,Endpoint disable" "0,1"
|
|
bitfld.long 0x00 29. "SD1PID_SODDFRM,Set DATA1 PID/Set odd frame" "0,1"
|
|
bitfld.long 0x00 28. "SD0PID_SEVENFRM,SD0PID/SEVNFRM" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x00 26. "CNAK,Clear NAK" "0,1"
|
|
bitfld.long 0x00 22.--25. "TXFNUM,Tx FIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 21. "STALL,STALL handshake" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x00 17. "NAKS,NAK status" "0,1"
|
|
rbitfld.long 0x00 16. "EOFRM_DPID,EOFRM/DPID" "0,1"
|
|
bitfld.long 0x00 15. "EPACT,Endpoint active" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,maximum packet length"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "DIEP2CTL,device endpoint-2 control register"
|
|
bitfld.long 0x00 31. "EPEN,Endpoint enable" "0,1"
|
|
bitfld.long 0x00 30. "EPD,Endpoint disable" "0,1"
|
|
bitfld.long 0x00 29. "SD1PID_SODDFRM,Set DATA1 PID/Set odd frame" "0,1"
|
|
bitfld.long 0x00 28. "SD0PID_SEVENFRM,SD0PID/SEVNFRM" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x00 26. "CNAK,Clear NAK" "0,1"
|
|
bitfld.long 0x00 22.--25. "TXFNUM,Tx FIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 21. "STALL,STALL handshake" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x00 17. "NAKS,NAK status" "0,1"
|
|
rbitfld.long 0x00 16. "EOFRM_DPID,EOFRM/DPID" "0,1"
|
|
bitfld.long 0x00 15. "EPACT,Endpoint active" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,maximum packet length"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "DIEP3CTL,device endpoint-3 control register"
|
|
bitfld.long 0x00 31. "EPEN,Endpoint enable" "0,1"
|
|
bitfld.long 0x00 30. "EPD,Endpoint disable" "0,1"
|
|
bitfld.long 0x00 29. "SD1PID_SODDFRM,Set DATA1 PID/Set odd frame" "0,1"
|
|
bitfld.long 0x00 28. "SD0PID_SEVENFRM,SD0PID/SEVNFRM" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x00 26. "CNAK,Clear NAK" "0,1"
|
|
bitfld.long 0x00 22.--25. "TXFNUM,Tx FIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 21. "STALL,STALL handshake" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x00 17. "NAKS,NAK status" "0,1"
|
|
rbitfld.long 0x00 16. "EOFRM_DPID,EOFRM/DPID" "0,1"
|
|
bitfld.long 0x00 15. "EPACT,Endpoint active" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,maximum packet length"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "DOEP0CTL,device endpoint-0 control register"
|
|
bitfld.long 0x00 31. "EPEN,Endpoint enable" "0,1"
|
|
rbitfld.long 0x00 30. "EPD,Endpoint disable" "0,1"
|
|
bitfld.long 0x00 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x00 26. "CNAK,Clear NAK" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x00 20. "SNOOP,Snoop mode" "0,1"
|
|
rbitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x00 17. "NAKS,NAK status" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 15. "EPACT,Endpoint active" "0,1"
|
|
rbitfld.long 0x00 0.--1. "MPL,Maximum packet length" "0,1,2,3"
|
|
group.long 0x320++0x03
|
|
line.long 0x00 "DOEP1CTL,device endpoint-1 control register"
|
|
bitfld.long 0x00 31. "EPEN,Endpoint enable" "0,1"
|
|
bitfld.long 0x00 30. "EPD,Endpoint disable" "0,1"
|
|
bitfld.long 0x00 29. "SD1PID_SODDFRM,SD1PID/SODDFRM" "0,1"
|
|
bitfld.long 0x00 28. "SD0PID_SEVENFRM,SD0PID/SEVENFRM" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x00 26. "CNAK,Clear NAK" "0,1"
|
|
bitfld.long 0x00 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x00 20. "SNOOP,Snoop mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x00 17. "NAKS,NAK status" "0,1"
|
|
rbitfld.long 0x00 16. "EOFRM_DPID,EOFRM/DPID" "0,1"
|
|
bitfld.long 0x00 15. "EPACT,Endpoint active" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,maximum packet length"
|
|
group.long 0x340++0x03
|
|
line.long 0x00 "DOEP2CTL,device endpoint-2 control register"
|
|
bitfld.long 0x00 31. "EPEN,Endpoint enable" "0,1"
|
|
bitfld.long 0x00 30. "EPD,Endpoint disable" "0,1"
|
|
bitfld.long 0x00 29. "SD1PID_SODDFRM,SD1PID/SODDFRM" "0,1"
|
|
bitfld.long 0x00 28. "SD0PID_SEVENFRM,SD0PID/SEVENFRM" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x00 26. "CNAK,Clear NAK" "0,1"
|
|
bitfld.long 0x00 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x00 20. "SNOOP,Snoop mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x00 17. "NAKS,NAK status" "0,1"
|
|
rbitfld.long 0x00 16. "EOFRM_DPID,EOFRM/DPID" "0,1"
|
|
bitfld.long 0x00 15. "EPACT,Endpoint active" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,maximum packet length"
|
|
group.long 0x360++0x03
|
|
line.long 0x00 "DOEP3CTL,device endpoint-3 control register"
|
|
bitfld.long 0x00 31. "EPEN,Endpoint enable" "0,1"
|
|
bitfld.long 0x00 30. "EPD,Endpoint disable" "0,1"
|
|
bitfld.long 0x00 29. "SD1PID_SODDFRM,SD1PID/SODDFRM" "0,1"
|
|
bitfld.long 0x00 28. "SD0PID_SEVENFRM,SD0PID/SEVENFRM" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x00 26. "CNAK,Clear NAK" "0,1"
|
|
bitfld.long 0x00 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x00 20. "SNOOP,Snoop mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x00 17. "NAKS,NAK status" "0,1"
|
|
rbitfld.long 0x00 16. "EOFRM_DPID,EOFRM/DPID" "0,1"
|
|
bitfld.long 0x00 15. "EPACT,Endpoint active" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,maximum packet length"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "DIEP0INTF,device endpoint-0 interrupt register"
|
|
rbitfld.long 0x00 7. "TXFE,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x00 6. "IEPNE,IN endpoint NAK effective" "0,1"
|
|
bitfld.long 0x00 4. "EPTXFUD,Endpoint Tx FIFO underrun" "0,1"
|
|
bitfld.long 0x00 3. "CITO,Control in timeout interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "EPDIS,Endpoint finished" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "DIEP1INTF,device endpoint-1 interrupt register"
|
|
rbitfld.long 0x00 7. "TXFE,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x00 6. "IEPNE,IN endpoint NAK effective" "0,1"
|
|
bitfld.long 0x00 4. "EPTXFUD,Endpoint Tx FIFO underrun" "0,1"
|
|
bitfld.long 0x00 3. "CITO,Control in timeout interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "EPDIS,Endpoint finished" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "DIEP2INTF,device endpoint-2 interrupt register"
|
|
rbitfld.long 0x00 7. "TXFE,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x00 6. "IEPNE,IN endpoint NAK effective" "0,1"
|
|
bitfld.long 0x00 4. "EPTXFUD,Endpoint Tx FIFO underrun" "0,1"
|
|
bitfld.long 0x00 3. "CITO,Control in timeout interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "EPDIS,Endpoint finished" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x168++0x03
|
|
line.long 0x00 "DIEP3INTF,device endpoint-3 interrupt register"
|
|
rbitfld.long 0x00 7. "TXFE,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x00 6. "IEPNE,IN endpoint NAK effective" "0,1"
|
|
bitfld.long 0x00 4. "EPTXFUD,Endpoint Tx FIFO underrun" "0,1"
|
|
bitfld.long 0x00 3. "CITO,Control in timeout interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "EPDIS,Endpoint finished" "0,1"
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x308++0x03
|
|
line.long 0x00 "DOEP0INTF,device out endpoint-0 interrupt flag register"
|
|
bitfld.long 0x00 6. "BTBSTP,Back-to-back SETUP packets" "0,1"
|
|
bitfld.long 0x00 4. "EPRXFOVR,Endpoint Rx FIFO overrun" "0,1"
|
|
bitfld.long 0x00 3. "STPF,Setup phase finished" "0,1"
|
|
bitfld.long 0x00 1. "EPDIS,Endpoint disabled" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x328++0x03
|
|
line.long 0x00 "DOEP1INTF,device out endpoint-1 interrupt flag register"
|
|
bitfld.long 0x00 6. "BTBSTP,Back-to-back SETUP packets" "0,1"
|
|
bitfld.long 0x00 4. "EPRXFOVR,Endpoint Rx FIFO overrun" "0,1"
|
|
bitfld.long 0x00 3. "STPF,Setup phase finished" "0,1"
|
|
bitfld.long 0x00 1. "EPDIS,Endpoint disabled" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x348++0x03
|
|
line.long 0x00 "DOEP2INTF,device out endpoint-2 interrupt flag register"
|
|
bitfld.long 0x00 6. "BTBSTP,Back-to-back SETUP packets" "0,1"
|
|
bitfld.long 0x00 4. "EPRXFOVR,Endpoint Rx FIFO overrun" "0,1"
|
|
bitfld.long 0x00 3. "STPF,Setup phase finished" "0,1"
|
|
bitfld.long 0x00 1. "EPDIS,Endpoint disabled" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x368++0x03
|
|
line.long 0x00 "DOEP3INTF,device out endpoint-3 interrupt flag register"
|
|
bitfld.long 0x00 6. "BTBSTP,Back-to-back SETUP packets" "0,1"
|
|
bitfld.long 0x00 4. "EPRXFOVR,Endpoint Rx FIFO overrun" "0,1"
|
|
bitfld.long 0x00 3. "STPF,Setup phase finished" "0,1"
|
|
bitfld.long 0x00 1. "EPDIS,Endpoint disabled" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "DIEP0LEN,device IN endpoint-0 transfer length register"
|
|
bitfld.long 0x00 19.--20. "PCNT,Packet count" "0,1,2,3"
|
|
hexmask.long.byte 0x00 0.--6. 1. "TLEN,Transfer length"
|
|
group.long 0x310++0x03
|
|
line.long 0x00 "DOEP0LEN,device OUT endpoint-0 transfer length register"
|
|
bitfld.long 0x00 29.--30. "STPCNT,SETUP packet count" "0,1,2,3"
|
|
bitfld.long 0x00 19. "PCNT,Packet count" "0,1"
|
|
hexmask.long.byte 0x00 0.--6. 1. "TLEN,Transfer length"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "DIEP1LEN,device IN endpoint-1 transfer length register"
|
|
bitfld.long 0x00 29.--30. "MCPF,Multi packet count per frame" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "DIEP2LEN,device IN endpoint-2 transfer length register"
|
|
bitfld.long 0x00 29.--30. "MCPF,Multi packet count per frame" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x170++0x03
|
|
line.long 0x00 "DIEP3LEN,device IN endpoint-3 transfer length register"
|
|
bitfld.long 0x00 29.--30. "MCPF,Multi packet count per frame" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x330++0x03
|
|
line.long 0x00 "DOEP1LEN,device OUT endpoint-1 transfer length register"
|
|
bitfld.long 0x00 29.--30. "STPCNT_RXDPID,SETUP packet count/Received data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x350++0x03
|
|
line.long 0x00 "DOEP2LEN,device OUT endpoint-2 transfer length register"
|
|
bitfld.long 0x00 29.--30. "STPCNT_RXDPID,SETUP packet count/Received data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x370++0x03
|
|
line.long 0x00 "DOEP3LEN,device OUT endpoint-3 transfer length register"
|
|
bitfld.long 0x00 29.--30. "STPCNT_RXDPID,SETUP packet count/Received data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
rgroup.long 0x118++0x03
|
|
line.long 0x00 "DIEP0TFSTAT,device IN endpoint 0 transmit FIFO status register"
|
|
hexmask.long.word 0x00 0.--15. 1. "IEPTFS,IN endpoint TxFIFO space remaining"
|
|
rgroup.long 0x138++0x03
|
|
line.long 0x00 "DIEP1TFSTAT,device IN endpoint 1 transmit FIFO status register"
|
|
hexmask.long.word 0x00 0.--15. 1. "IEPTFS,IN endpoint TxFIFO space remaining"
|
|
rgroup.long 0x158++0x03
|
|
line.long 0x00 "DIEP2TFSTAT,device IN endpoint 2 transmit FIFO status register"
|
|
hexmask.long.word 0x00 0.--15. 1. "IEPTFS,IN endpoint TxFIFO space remaining"
|
|
rgroup.long 0x178++0x03
|
|
line.long 0x00 "DIEP3TFSTAT,device IN endpoint 3 transmit FIFO status register"
|
|
hexmask.long.word 0x00 0.--15. 1. "IEPTFS,IN endpoint TxFIFO space remaining"
|
|
tree.end
|
|
tree "USBFS_GLOBAL"
|
|
base ad:0x50000000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GOTGCS,Global OTG control and status register (USBFS_GOTGCS)"
|
|
rbitfld.long 0x00 19. "BSV,B-session valid" "0,1"
|
|
rbitfld.long 0x00 18. "ASV,A-session valid" "0,1"
|
|
rbitfld.long 0x00 17. "DI,Debounce interval" "0,1"
|
|
rbitfld.long 0x00 16. "IDPS,ID pin status" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "DHNPEN,Device HNP enabled" "0,1"
|
|
bitfld.long 0x00 10. "HHNPEN,Host HNP enable" "0,1"
|
|
bitfld.long 0x00 9. "HNPREQ,HNP request" "0,1"
|
|
rbitfld.long 0x00 8. "HNPS,Host success" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "SRPREQ,SRP request" "0,1"
|
|
rbitfld.long 0x00 0. "SRPS,SRP success" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "GOTGINTF,Global OTG interrupt flag register (USBFS_GOTGINTF)"
|
|
bitfld.long 0x00 19. "DF,Debounce finish" "0,1"
|
|
bitfld.long 0x00 18. "ADTO,A-device timeout" "0,1"
|
|
bitfld.long 0x00 17. "HNPDET,Host negotiation request detected" "0,1"
|
|
bitfld.long 0x00 9. "HNPEND,HNP end" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "SRPEND,Session request success status change" "0,1"
|
|
bitfld.long 0x00 2. "SESEND,Session end" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "GAHBCS,Global AHB control and status register (USBFS_GAHBCS)"
|
|
bitfld.long 0x00 8. "PTXFTH,Periodic Tx FIFO threshold" "0,1"
|
|
bitfld.long 0x00 7. "TXFTH,Tx FIFO threshold" "0,1"
|
|
bitfld.long 0x00 0. "GINTEN,Global interrupt enable" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "GUSBCS,Global USB control and status register (OTG_FS_GUSBCS)"
|
|
bitfld.long 0x00 30. "FDM,Force device mode" "0,1"
|
|
bitfld.long 0x00 29. "FHM,Force host mode" "0,1"
|
|
bitfld.long 0x00 10.--13. "UTT,USB turnaround time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 9. "HNPCEN,HNP capability enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "SRPCEN,SRP capability enable" "0,1"
|
|
bitfld.long 0x00 0.--2. "TOC,Timeout calibration" "0,1,2,3,4,5,6,7"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "GRSTCTL,Global reset control register (USBFS_GRSTCTL)"
|
|
bitfld.long 0x00 6.--10. "TXFNUM,TxFIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5. "TXFF,TxFIFO flush" "0,1"
|
|
bitfld.long 0x00 4. "RXFF,RxFIFO flush" "0,1"
|
|
bitfld.long 0x00 2. "HFCRST,Host frame counter reset" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "HCSRST,HCLK soft reset" "0,1"
|
|
bitfld.long 0x00 0. "CSRST,Core soft reset" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GINTF,Global interrupt flag register (USBFS_GINTF)"
|
|
bitfld.long 0x00 31. "WKUPIF,Wakeup interrupt flag" "0,1"
|
|
bitfld.long 0x00 30. "SESIF,Session interrupt flag" "0,1"
|
|
bitfld.long 0x00 29. "DISCIF,Disconnect interrupt flag" "0,1"
|
|
bitfld.long 0x00 28. "IDPSC,ID pin status change" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 26. "PTXFEIF,Periodic TxFIFO empty interrupt flag" "0,1"
|
|
rbitfld.long 0x00 25. "HCIF,Host channels interrupt flag" "0,1"
|
|
rbitfld.long 0x00 24. "HPIF,Host port interrupt flag" "0,1"
|
|
bitfld.long 0x00 21. "PXNCIF_ISOONCIF,periodic transfer not complete interrupt flag(Host mode)/isochronous OUT transfer not complete interrupt flag(Device mode)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "ISOINCIF,Isochronous IN transfer Not Complete Interrupt Flag" "0,1"
|
|
rbitfld.long 0x00 19. "OEPIF,OUT endpoint interrupt flag" "0,1"
|
|
rbitfld.long 0x00 18. "IEPIF,IN endpoint interrupt flag" "0,1"
|
|
bitfld.long 0x00 15. "EOPFIF,End of periodic frame interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "ISOOPDIF,Isochronous OUT packet dropped interrupt" "0,1"
|
|
bitfld.long 0x00 13. "ENUMF,Enumeration finished" "0,1"
|
|
bitfld.long 0x00 12. "RST,USB reset" "0,1"
|
|
bitfld.long 0x00 11. "SP,USB suspend" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "ESP,Early suspend" "0,1"
|
|
rbitfld.long 0x00 7. "GONAK,Global OUT NAK effective" "0,1"
|
|
rbitfld.long 0x00 6. "GNPINAK,Global Non-Periodic IN NAK effective" "0,1"
|
|
rbitfld.long 0x00 5. "NPTXFEIF,Non-periodic TxFIFO empty interrupt flag" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 4. "RXFNEIF,RxFIFO non-empty interrupt flag" "0,1"
|
|
bitfld.long 0x00 3. "SOF,Start of frame" "0,1"
|
|
rbitfld.long 0x00 2. "OTGIF,OTG interrupt flag" "0,1"
|
|
bitfld.long 0x00 1. "MFIF,Mode fault interrupt flag" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 0. "COPM,Current operation mode" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "GINTEN,Global interrupt enable register (USBFS_GINTEN)"
|
|
bitfld.long 0x00 31. "WKUPIE,Wakeup interrupt enable" "0,1"
|
|
bitfld.long 0x00 30. "SESIE,Session interrupt enable" "0,1"
|
|
bitfld.long 0x00 29. "DISCIE,Disconnect interrupt enable" "0,1"
|
|
bitfld.long 0x00 28. "IDPSCIE,ID pin status change interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26. "PTXFEIE,Periodic TxFIFO empty interrupt enable" "0,1"
|
|
bitfld.long 0x00 25. "HCIE,Host channels interrupt enable" "0,1"
|
|
rbitfld.long 0x00 24. "HPIE,Host port interrupt enable" "0,1"
|
|
bitfld.long 0x00 21. "PXNCIE_ISOONCIE,periodic transfer not compelete Interrupt enable(Host mode)/isochronous OUT transfer not complete interrupt enable(Device mode)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "ISOINCIE,isochronous IN transfer not complete interrupt enable" "0,1"
|
|
bitfld.long 0x00 19. "OEPIE,OUT endpoints interrupt enable" "0,1"
|
|
bitfld.long 0x00 18. "IEPIE,IN endpoints interrupt enable" "0,1"
|
|
bitfld.long 0x00 15. "EOPFIE,End of periodic frame interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "ISOOPDIE,Isochronous OUT packet dropped interrupt enable" "0,1"
|
|
bitfld.long 0x00 13. "ENUMFIE,Enumeration finish interrupt enable" "0,1"
|
|
bitfld.long 0x00 12. "RSTIE,USB reset interrupt enable" "0,1"
|
|
bitfld.long 0x00 11. "SPIE,USB suspend interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "ESPIE,Early suspend interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "GONAKIE,Global OUT NAK effective interrupt enable" "0,1"
|
|
bitfld.long 0x00 6. "GNPINAKIE,Global non-periodic IN NAK effective interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "NPTXFEIE,Non-periodic TxFIFO empty interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "RXFNEIE,Receive FIFO non-empty interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "SOFIE,Start of frame interrupt enable" "0,1"
|
|
bitfld.long 0x00 2. "OTGIE,OTG interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "MFIE,Mode fault interrupt enable" "0,1"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "GRSTATR_Device,Global Receive status read(Device mode)"
|
|
bitfld.long 0x00 17.--20. "RPCKST,Recieve packet status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15.--16. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 4.--14. 1. "BCOUNT,Byte count"
|
|
bitfld.long 0x00 0.--3. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "GRSTATR_Host,Global Receive status read(Host mode)"
|
|
bitfld.long 0x00 17.--20. "RPCKST,Reivece packet status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15.--16. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 4.--14. 1. "BCOUNT,Byte count"
|
|
bitfld.long 0x00 0.--3. "CNUM,Channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "GRSTATP_Device,Global Receive status pop(Device mode)"
|
|
bitfld.long 0x00 17.--20. "RPCKST,Recieve packet status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15.--16. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 4.--14. 1. "BCOUNT,Byte count"
|
|
bitfld.long 0x00 0.--3. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "GRSTATP_Host,Global Receive status pop(Host mode)"
|
|
bitfld.long 0x00 17.--20. "RPCKST,Reivece packet status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15.--16. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 4.--14. 1. "BCOUNT,Byte count"
|
|
bitfld.long 0x00 0.--3. "CNUM,Channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "GRFLEN,Global Receive FIFO size register (USBFS_GRFLEN)"
|
|
hexmask.long.word 0x00 0.--15. 1. "RXFD,Rx FIFO depth"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "HNPTFLEN,Host non-periodic transmit FIFO length register (Host mode)"
|
|
hexmask.long.word 0x00 16.--31. 1. "HNPTXFD,host non-periodic TxFIFO depth"
|
|
hexmask.long.word 0x00 0.--15. 1. "HNPTXRSAR,host non-periodic transmit Tx RAM start address"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DIEP0TFLEN,Device IN endpoint 0 transmit FIFO length (Device mode)"
|
|
hexmask.long.word 0x00 16.--31. 1. "IEP0TXFD,in endpoint 0 Tx FIFO depth"
|
|
hexmask.long.word 0x00 0.--15. 1. "IEP0TXRSAR,in endpoint 0 Tx RAM start address"
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "HNPTFQSTAT,Host non-periodic transmit FIFO/queue status register (HNPTFQSTAT)"
|
|
hexmask.long.byte 0x00 24.--30. 1. "NPTXRQTOP,Top of the non-periodic transmit request queue"
|
|
hexmask.long.byte 0x00 16.--23. 1. "NPTXRQS,Non-periodic transmit request queue space"
|
|
hexmask.long.word 0x00 0.--15. 1. "NPTXFS,Non-periodic TxFIFO space"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "GCCFG,Global core configuration register (USBFS_GCCFG)"
|
|
bitfld.long 0x00 21. "VBUSIG,VBUS ignored" "0,1"
|
|
bitfld.long 0x00 20. "SOFOEN,SOF output enable" "0,1"
|
|
bitfld.long 0x00 19. "VBUSBCEN,The VBUS B-device Comparer enable" "0,1"
|
|
bitfld.long 0x00 18. "VBUSACEN,The VBUS A-device Comparer enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "PWRON,Power on" "0,1"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "CID,core ID register"
|
|
hexmask.long 0x00 0.--31. 1. "CID,Core ID"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "HPTFLEN,Host periodic transmit FIFO length register (HPTFLEN)"
|
|
hexmask.long.word 0x00 16.--31. 1. "HPTXFD,Host periodic TxFIFO depth"
|
|
hexmask.long.word 0x00 0.--15. 1. "HPTXFSAR,Host periodic TxFIFO start address"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "DIEP1TFLEN,device IN endpoint transmit FIFO size register (DIEP1TFLEN)"
|
|
hexmask.long.word 0x00 16.--31. 1. "IEPTXFD,IN endpoint TxFIFO depth"
|
|
hexmask.long.word 0x00 0.--15. 1. "IEPTXRSAR,IN endpoint FIFO transmit RAM start address"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "DIEP2TFLEN,device IN endpoint transmit FIFO size register (DIEP2TFLEN)"
|
|
hexmask.long.word 0x00 16.--31. 1. "IEPTXFD,IN endpoint TxFIFO depth"
|
|
hexmask.long.word 0x00 0.--15. 1. "IEPTXRSAR,IN endpoint FIFO transmit RAM start address"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "DIEP3TFLEN,device IN endpoint transmit FIFO size register (FS_DIEP3TXFLEN)"
|
|
hexmask.long.word 0x00 16.--31. 1. "IEPTXFD,IN endpoint TxFIFO depth"
|
|
hexmask.long.word 0x00 0.--15. 1. "IEPTXRSAR,IN endpoint FIFO4 transmit RAM start address"
|
|
tree.end
|
|
tree "USBFS_HOST"
|
|
base ad:0x50000400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "HCTL,host configuration register (HCTL)"
|
|
bitfld.long 0x00 0.--1. "CLKSEL,clock select for USB clock" "0,1,2,3"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "HFT,Host frame interval register"
|
|
hexmask.long.word 0x00 0.--15. 1. "FRI,Frame interval"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "HFINFR,OTG_FS host frame number/frame time remaining register (HFINFR)"
|
|
hexmask.long.word 0x00 16.--31. 1. "FRT,Frame remaining time"
|
|
hexmask.long.word 0x00 0.--15. 1. "FRNUM,Frame number"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "HPTFQSTAT,Host periodic transmit FIFO/queue status register (HPTFQSTAT)"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PTXREQT,Top of the periodic transmit request queue"
|
|
hexmask.long.byte 0x00 16.--23. 1. "PTXREQS,Periodic transmit request queue space available"
|
|
hexmask.long.word 0x00 0.--15. 1. "PTXFS,Periodic transmit data FIFO space available"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "HACHINT,Host all channels interrupt register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "HACHINT,Host all channel interrupts"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "HACHINTEN,host all channels interrupt mask register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "CINTEN,Channel interrupt enable"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "HPCS,Host port control and status register (USBFS_HPCS)"
|
|
rbitfld.long 0x00 17.--18. "PS,Port speed" "0,1,2,3"
|
|
bitfld.long 0x00 12. "PP,Port power" "0,1"
|
|
rbitfld.long 0x00 10.--11. "PLST,Port line status" "0,1,2,3"
|
|
bitfld.long 0x00 8. "PRST,Port reset" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "PSP,Port suspend" "0,1"
|
|
bitfld.long 0x00 6. "PREM,Port resume" "0,1"
|
|
bitfld.long 0x00 3. "PEDC,Port enable/disable change" "0,1"
|
|
bitfld.long 0x00 2. "PE,Port enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "PCD,Port connect detected" "0,1"
|
|
rbitfld.long 0x00 0. "PCST,Port connect status" "0,1"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "HCH0CTL,host channel-0 characteristics register (HCH0CTL)"
|
|
bitfld.long 0x00 31. "CEN,Channel enable" "0,1"
|
|
bitfld.long 0x00 30. "CDIS,Channel disable" "0,1"
|
|
bitfld.long 0x00 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x00 22.--28. 1. "DAR,Device address"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x00 17. "LSD,Low-speed device" "0,1"
|
|
bitfld.long 0x00 15. "EPDIR,Endpoint direction" "0,1"
|
|
bitfld.long 0x00 11.--14. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,Maximum packet size"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "HCH1CTL,host channel-1 characteristics register (HCH1CTL)"
|
|
bitfld.long 0x00 31. "CEN,Channel enable" "0,1"
|
|
bitfld.long 0x00 30. "CDIS,Channel disable" "0,1"
|
|
bitfld.long 0x00 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x00 22.--28. 1. "DAR,Device address"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x00 17. "LSD,Low-speed device" "0,1"
|
|
bitfld.long 0x00 15. "EPDIR,Endpoint direction" "0,1"
|
|
bitfld.long 0x00 11.--14. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,Maximum packet size"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "HCH2CTL,host channel-2 characteristics register (HCH2CTL)"
|
|
bitfld.long 0x00 31. "CEN,Channel enable" "0,1"
|
|
bitfld.long 0x00 30. "CDIS,Channel disable" "0,1"
|
|
bitfld.long 0x00 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x00 22.--28. 1. "DAR,Device address"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x00 17. "LSD,Low-speed device" "0,1"
|
|
bitfld.long 0x00 15. "EPDIR,Endpoint direction" "0,1"
|
|
bitfld.long 0x00 11.--14. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,Maximum packet size"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "HCH3CTL,host channel-3 characteristics register (HCH3CTL)"
|
|
bitfld.long 0x00 31. "CEN,Channel enable" "0,1"
|
|
bitfld.long 0x00 30. "CDIS,Channel disable" "0,1"
|
|
bitfld.long 0x00 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x00 22.--28. 1. "DAR,Device address"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x00 17. "LSD,Low-speed device" "0,1"
|
|
bitfld.long 0x00 15. "EPDIR,Endpoint direction" "0,1"
|
|
bitfld.long 0x00 11.--14. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,Maximum packet size"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "HCH4CTL,host channel-4 characteristics register (HCH4CTL)"
|
|
bitfld.long 0x00 31. "CEN,Channel enable" "0,1"
|
|
bitfld.long 0x00 30. "CDIS,Channel disable" "0,1"
|
|
bitfld.long 0x00 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x00 22.--28. 1. "DAR,Device address"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x00 17. "LSD,Low-speed device" "0,1"
|
|
bitfld.long 0x00 15. "EPDIR,Endpoint direction" "0,1"
|
|
bitfld.long 0x00 11.--14. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,Maximum packet size"
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "HCH5CTL,host channel-5 characteristics register (HCH5CTL)"
|
|
bitfld.long 0x00 31. "CEN,Channel enable" "0,1"
|
|
bitfld.long 0x00 30. "CDIS,Channel disable" "0,1"
|
|
bitfld.long 0x00 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x00 22.--28. 1. "DAR,Device address"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x00 17. "LSD,Low-speed device" "0,1"
|
|
bitfld.long 0x00 15. "EPDIR,Endpoint direction" "0,1"
|
|
bitfld.long 0x00 11.--14. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,Maximum packet size"
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "HCH6CTL,host channel-6 characteristics register (HCH6CTL)"
|
|
bitfld.long 0x00 31. "CEN,Channel enable" "0,1"
|
|
bitfld.long 0x00 30. "CDIS,Channel disable" "0,1"
|
|
bitfld.long 0x00 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x00 22.--28. 1. "DAR,Device address"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x00 17. "LSD,Low-speed device" "0,1"
|
|
bitfld.long 0x00 15. "EPDIR,Endpoint direction" "0,1"
|
|
bitfld.long 0x00 11.--14. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,Maximum packet size"
|
|
group.long 0x1E0++0x03
|
|
line.long 0x00 "HCH7CTL,host channel-7 characteristics register (HCH7CTL)"
|
|
bitfld.long 0x00 31. "CEN,Channel enable" "0,1"
|
|
bitfld.long 0x00 30. "CDIS,Channel disable" "0,1"
|
|
bitfld.long 0x00 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x00 22.--28. 1. "DAR,Device address"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x00 17. "LSD,Low-speed device" "0,1"
|
|
bitfld.long 0x00 15. "EPDIR,Endpoint direction" "0,1"
|
|
bitfld.long 0x00 11.--14. "EPNUM,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "MPL,Maximum packet size"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "HCH0INTF,host channel-0 interrupt register (USBFS_HCHxINTF)"
|
|
bitfld.long 0x00 10. "DTER,Data toggle error" "0,1"
|
|
bitfld.long 0x00 9. "REQOVR,Request queue overrun" "0,1"
|
|
bitfld.long 0x00 8. "BBER,Babble error" "0,1"
|
|
bitfld.long 0x00 7. "USBER,USB bus error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x00 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x00 3. "STALL,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x00 1. "CH,Channel halted" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "HCH1INTF,host channel-1 interrupt register (HCH1INTF)"
|
|
bitfld.long 0x00 10. "DTER,Data toggle error" "0,1"
|
|
bitfld.long 0x00 9. "REQOVR,Request queue overrun" "0,1"
|
|
bitfld.long 0x00 8. "BBER,Babble error" "0,1"
|
|
bitfld.long 0x00 7. "USBER,USB bus error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x00 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x00 3. "STALL,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x00 1. "CH,Channel halted" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "HCH2INTF,host channel-2 interrupt register (HCH2INTF)"
|
|
bitfld.long 0x00 10. "DTER,Data toggle error" "0,1"
|
|
bitfld.long 0x00 9. "REQOVR,Request queue overrun" "0,1"
|
|
bitfld.long 0x00 8. "BBER,Babble error" "0,1"
|
|
bitfld.long 0x00 7. "USBER,USB bus error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x00 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x00 3. "STALL,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x00 1. "CH,Channel halted" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x168++0x03
|
|
line.long 0x00 "HCH3INTF,host channel-3 interrupt register (HCH3INTF)"
|
|
bitfld.long 0x00 10. "DTER,Data toggle error" "0,1"
|
|
bitfld.long 0x00 9. "REQOVR,Request queue overrun" "0,1"
|
|
bitfld.long 0x00 8. "BBER,Babble error" "0,1"
|
|
bitfld.long 0x00 7. "USBER,USB bus error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x00 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x00 3. "STALL,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x00 1. "CH,Channel halted" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x188++0x03
|
|
line.long 0x00 "HCH4INTF,host channel-4 interrupt register (HCH4INTF)"
|
|
bitfld.long 0x00 10. "DTER,Data toggle error" "0,1"
|
|
bitfld.long 0x00 9. "REQOVR,Request queue overrun" "0,1"
|
|
bitfld.long 0x00 8. "BBER,Babble error" "0,1"
|
|
bitfld.long 0x00 7. "USBER,USB bus error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x00 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x00 3. "STALL,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x00 1. "CH,Channel halted" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x1A8++0x03
|
|
line.long 0x00 "HCH5INTF,host channel-5 interrupt register (HCH5INTF)"
|
|
bitfld.long 0x00 10. "DTER,Data toggle error" "0,1"
|
|
bitfld.long 0x00 9. "REQOVR,Request queue overrun" "0,1"
|
|
bitfld.long 0x00 8. "BBER,Babble error" "0,1"
|
|
bitfld.long 0x00 7. "USBER,USB bus error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x00 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x00 3. "STALL,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x00 1. "CH,Channel halted" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x1C8++0x03
|
|
line.long 0x00 "HCH6INTF,host channel-6 interrupt register (HCH6INTF)"
|
|
bitfld.long 0x00 10. "DTER,Data toggle error" "0,1"
|
|
bitfld.long 0x00 9. "REQOVR,Request queue overrun" "0,1"
|
|
bitfld.long 0x00 8. "BBER,Babble error" "0,1"
|
|
bitfld.long 0x00 7. "USBER,USB bus error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x00 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x00 3. "STALL,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x00 1. "CH,Channel halted" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x1E8++0x03
|
|
line.long 0x00 "HCH7INTF,host channel-7 interrupt register (HCH7INTF)"
|
|
bitfld.long 0x00 10. "DTER,Data toggle error" "0,1"
|
|
bitfld.long 0x00 9. "REQOVR,Request queue overrun" "0,1"
|
|
bitfld.long 0x00 8. "BBER,Babble error" "0,1"
|
|
bitfld.long 0x00 7. "USBER,USB bus error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x00 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x00 3. "STALL,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x00 1. "CH,Channel halted" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TF,Transfer finished" "0,1"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "HCH0INTEN,host channel-0 interrupt enable register (HCH0INTEN)"
|
|
bitfld.long 0x00 10. "DTERIE,Data toggle error interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "REQOVRIE,request queue overrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "BBERIE,Babble error interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "USBERIE,USB bus error interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "ACKIE,ACK interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NAKIE,NAK interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "STALLIE,STALL interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CHIE,Channel halted interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TFIE,Transfer completed interrupt enable" "0,1"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "HCH1INTEN,host channel-1 interrupt enable register (HCH1INTEN)"
|
|
bitfld.long 0x00 10. "DTERIE,Data toggle error interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "REQOVRIE,request queue overrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "BBERIE,Babble error interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "USBERIE,USB bus error interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "ACKIE,ACK interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NAKIE,NAK interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "STALLIE,STALL interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CHIE,Channel halted interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TFIE,Transfer completed interrupt enable" "0,1"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "HCH2INTEN,host channel-2 interrupt enable register (HCH2INTEN)"
|
|
bitfld.long 0x00 10. "DTERIE,Data toggle error interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "REQOVRIE,request queue overrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "BBERIE,Babble error interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "USBERIE,USB bus error interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "ACKIE,ACK interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NAKIE,NAK interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "STALLIE,STALL interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CHIE,Channel halted interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TFIE,Transfer completed interrupt enable" "0,1"
|
|
group.long 0x16C++0x03
|
|
line.long 0x00 "HCH3INTEN,host channel-3 interrupt enable register (HCH3INTEN)"
|
|
bitfld.long 0x00 10. "DTERIE,Data toggle error interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "REQOVRIE,request queue overrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "BBERIE,Babble error interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "USBERIE,USB bus error interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "ACKIE,ACK interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NAKIE,NAK interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "STALLIE,STALL interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CHIE,Channel halted interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TFIE,Transfer completed interrupt enable" "0,1"
|
|
group.long 0x18C++0x03
|
|
line.long 0x00 "HCH4INTEN,host channel-4 interrupt enable register (HCH4INTEN)"
|
|
bitfld.long 0x00 10. "DTERIE,Data toggle error interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "REQOVRIE,request queue overrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "BBERIE,Babble error interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "USBERIE,USB bus error interrupt enable" "0,1"
|
|
newline
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bitfld.long 0x00 5. "ACKIE,ACK interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NAKIE,NAK interrupt enable" "0,1"
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|
bitfld.long 0x00 3. "STALLIE,STALL interrupt enable" "0,1"
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|
bitfld.long 0x00 1. "CHIE,Channel halted interrupt enable" "0,1"
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|
newline
|
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bitfld.long 0x00 0. "TFIE,Transfer completed interrupt enable" "0,1"
|
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group.long 0x1AC++0x03
|
|
line.long 0x00 "HCH5INTEN,host channel-5 interrupt enable register (HCH5INTEN)"
|
|
bitfld.long 0x00 10. "DTERIE,Data toggle error interrupt enable" "0,1"
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|
bitfld.long 0x00 9. "REQOVRIE,request queue overrun interrupt enable" "0,1"
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|
bitfld.long 0x00 8. "BBERIE,Babble error interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "USBERIE,USB bus error interrupt enable" "0,1"
|
|
newline
|
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bitfld.long 0x00 5. "ACKIE,ACK interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NAKIE,NAK interrupt enable" "0,1"
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|
bitfld.long 0x00 3. "STALLIE,STALL interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CHIE,Channel halted interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TFIE,Transfer completed interrupt enable" "0,1"
|
|
group.long 0x1CC++0x03
|
|
line.long 0x00 "HCH6INTEN,host channel-6 interrupt enable register (HCH6INTEN)"
|
|
bitfld.long 0x00 10. "DTERIE,Data toggle error interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "REQOVRIE,request queue overrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "BBERIE,Babble error interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "USBERIE,USB bus error interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "ACKIE,ACK interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NAKIE,NAK interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "STALLIE,STALL interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CHIE,Channel halted interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TFIE,Transfer completed interrupt enable" "0,1"
|
|
group.long 0x1EC++0x03
|
|
line.long 0x00 "HCH7INTEN,host channel-7 interrupt enable register (HCH7INTEN)"
|
|
bitfld.long 0x00 10. "DTERIE,Data toggle error interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "REQOVRIE,request queue overrun interrupt enable" "0,1"
|
|
bitfld.long 0x00 8. "BBERIE,Babble error interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "USBERIE,USB bus error interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "ACKIE,ACK interrupt enable" "0,1"
|
|
bitfld.long 0x00 4. "NAKIE,NAK interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "STALLIE,STALL interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CHIE,Channel halted interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TFIE,Transfer completed interrupt enable" "0,1"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "HCH0LEN,host channel-0 transfer length register"
|
|
bitfld.long 0x00 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "HCH1LEN,host channel-1 transfer length register"
|
|
bitfld.long 0x00 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "HCH2LEN,host channel-2 transfer length register"
|
|
bitfld.long 0x00 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x170++0x03
|
|
line.long 0x00 "HCH3LEN,host channel-3 transfer length register"
|
|
bitfld.long 0x00 29.--30. "DPID,Data PID" "0,1,2,3"
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|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x190++0x03
|
|
line.long 0x00 "HCH4LEN,host channel-4 transfer length register"
|
|
bitfld.long 0x00 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x1B0++0x03
|
|
line.long 0x00 "HCH5LEN,host channel-5 transfer length register"
|
|
bitfld.long 0x00 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x1D0++0x03
|
|
line.long 0x00 "HCH6LEN,host channel-6 transfer length register"
|
|
bitfld.long 0x00 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
group.long 0x1F0++0x03
|
|
line.long 0x00 "HCH7LEN,host channel-7 transfer length register"
|
|
bitfld.long 0x00 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. "PCNT,Packet count"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TLEN,Transfer length"
|
|
tree.end
|
|
tree "USBFS_PWRCLK"
|
|
base ad:0x50000E00
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PWRCLKCTL,power and clock gating control register (PWRCLKCTL)"
|
|
bitfld.long 0x00 1. "SHCLK,Stop HCLK" "0,1"
|
|
bitfld.long 0x00 0. "SUCLK,Stop the USB clock" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "WWDGT (Window watchdog timer)"
|
|
base ad:0x40002C00
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTL,Control register"
|
|
bitfld.long 0x00 7. "WDGTEN,Activation bit" "0,1"
|
|
hexmask.long.byte 0x00 0.--6. 1. "CNT,The value of the watchdog timer counter"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CFG,Configuration register"
|
|
bitfld.long 0x00 9. "EWIE,Early wakeup interrupt" "0,1"
|
|
bitfld.long 0x00 7.--8. "PSC,Prescaler" "0,1,2,3"
|
|
hexmask.long.byte 0x00 0.--6. 1. "WIN,7-bit window value"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STAT,Status register"
|
|
bitfld.long 0x00 0. "EWIF,Early wakeup interrupt flag" "0,1"
|
|
tree.end
|
|
autoindent.off
|
|
newline
|