26822 lines
1.5 MiB
26822 lines
1.5 MiB
; --------------------------------------------------------------------------------
|
|
; @Title: EFR32XG22 On-Chip Peripherals
|
|
; @Props: Released
|
|
; @Author: NEJ
|
|
; @Changelog: 2023-03-28 NEJ
|
|
; 2023-11-16 NEJ
|
|
; @Manufacturer: SILICONLABS - Silicon Laboratories Inc.
|
|
; @Doc: Generated (TRACE32, build: 164363.), based on:
|
|
; EFR32BG22C224F512IM40.svd (Rev. C),
|
|
; EFR32BG22C224F512IM32.svd (Rev. C),
|
|
; EFR32BG22C224F512GN32.svd (Rev. C),
|
|
; EFR32BG22C224F512GM40.svd (Rev. C),
|
|
; EFR32BG22C224F512GM32.svd (Rev. C),
|
|
; EFR32BG22C222F352GN32.svd (Rev. C),
|
|
; EFR32BG22C222F352GM40.svd (Rev. C),
|
|
; EFR32BG22C222F352GM32.svd (Rev. C),
|
|
; EFR32BG22C112F352GM40.svd (Rev. C),
|
|
; EFR32BG22C112F352GM32.svd (Rev. C),
|
|
; EFR32FG22C121F512GM40.svd (Rev. C),
|
|
; EFR32FG22C121F512GM32.svd (Rev. C),
|
|
; EFR32FG22C121F256GM40.svd (Rev. C),
|
|
; EFR32FG22C121F256GM32.svd (Rev. C),
|
|
; EFR32MG22C224F512IM40.svd (Rev. C),
|
|
; EFR32MG22C224F512IM32.svd (Rev. C),
|
|
; EFR32MG22C224F512GN32.svd (Rev. C),
|
|
; EFR32MG22A224F512IM40.svd (Rev. B)
|
|
; @Core: Cortex-M33F
|
|
; @Chip: EFR32BG22C112F352, EFR32BG22C222F352, EFR32BG22C224F512,
|
|
; EFR32FG22C121F512, EFR32MG22C224F512
|
|
; @Copyright: (C) 1989-2023 Lauterbach GmbH, licensed for use with TRACE32(R) only
|
|
; --------------------------------------------------------------------------------
|
|
; $Id: perefr32xg22.per 17060 2023-11-22 14:23:20Z kwisniewski $
|
|
|
|
AUTOINDENT.ON CENTER TREE
|
|
ENUMDELIMITER ","
|
|
base ad:0x0
|
|
tree.close "Core Registers (Cortex-M33F)"
|
|
AUTOINDENT.PUSH
|
|
AUTOINDENT.OFF
|
|
tree "System Control"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 12.
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "ACTLR,Auxiliary Control Register"
|
|
bitfld.long 0x00 29. " EXTEXCLALL ,Allows external exclusive operations to be used in a configuration with no MPU" "No,Yes"
|
|
bitfld.long 0x00 12. " DISITMATBFLUSH ,Disables ITM and DWT ATB flush" "No,Yes"
|
|
bitfld.long 0x00 10. " FPEXCODIS ,Disables FPU exception outputs" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DISOOFP ,Disables floating-point" "No,Yes"
|
|
bitfld.long 0x00 2. " DISFOLD ,Disables dual-issue functionality" "No,Yes"
|
|
bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle" "No,Yes"
|
|
group.long 0x0C++0x0F
|
|
line.long 0x00 "CPPWR,Coprocessor Power Control Register"
|
|
bitfld.long 0x00 21. " SUS10 ,State unknown Secure only" "Both states,Secure only"
|
|
bitfld.long 0x00 20. " SU10 ,This bit indicates and allows modification of whether the state associated with the floating point unit is permitted to become UNKNOWN" "Not permitted,Permitted"
|
|
bitfld.long 0x00 15. " SUS7 ,State unknown Secure only" "Both states,Secure only"
|
|
textline " "
|
|
bitfld.long 0x00 14. " SU7 ,This bit indicates and allows modification of whether the state associated with the coprocessor 7 is permitted to become UNKNOWN" "Not permitted,Permitted"
|
|
bitfld.long 0x00 13. " SUS6 ,State unknown Secure only" "Both states,Secure only"
|
|
bitfld.long 0x00 12. " SU6 ,This bit indicates and allows modification of whether the state associated with the coprocessor 6 is permitted to become UNKNOWN" "Not permitted,Permitted"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SUS5 ,State unknown Secure only" "Both states,Secure only"
|
|
bitfld.long 0x00 10. " SU5 ,This bit indicates and allows modification of whether the state associated with the coprocessor 5 is permitted to become UNKNOWN" "Not permitted,Permitted"
|
|
bitfld.long 0x00 9. " SUS4 ,State unknown Secure only" "Both states,Secure only"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SU4 ,This bit indicates and allows modification of whether the state associated with the coprocessor 4 is permitted to become UNKNOWN" "Not permitted,Permitted"
|
|
bitfld.long 0x00 7. " SUS3 ,State unknown Secure only" "Both states,Secure only"
|
|
bitfld.long 0x00 6. " SU3 ,This bit indicates and allows modification of whether the state associated with the coprocessor 3 is permitted to become UNKNOWN" "Not permitted,Permitted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SUS2 ,State unknown Secure only" "Both states,Secure only"
|
|
bitfld.long 0x00 4. " SU2 ,This bit indicates and allows modification of whether the state associated with the coprocessor 2 is permitted to become UNKNOWN" "Not permitted,Permitted"
|
|
bitfld.long 0x00 3. " SUS1 ,State unknown Secure only" "Both states,Secure only"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SU1 ,This bit indicates and allows modification of whether the state associated with the coprocessor 1 is permitted to become UNKNOWN" "Not permitted,Permitted"
|
|
bitfld.long 0x00 1. " SUS0 ,State unknown Secure only" "Both states,Secure only"
|
|
bitfld.long 0x00 0. " SU0 ,This bit indicates and allows modification of whether the state associated with the coprocessor 0 is permitted to become UNKNOWN" "Not permitted,Permitted"
|
|
line.long 0x04 "SYST_CSR,SysTick Control and Status Register"
|
|
rbitfld.long 0x04 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
|
|
bitfld.long 0x04 2. " CLKSOURCE ,SysTick clock source" "External,Core"
|
|
bitfld.long 0x04 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick"
|
|
textline " "
|
|
bitfld.long 0x04 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
|
|
line.long 0x08 "SYST_RVR,SysTick Reload Value Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
|
|
line.long 0x0C "SYST_CVR,SysTick Current Value Register"
|
|
hexmask.long.tbyte 0x0C 0.--23. 1. " CURRENT ,Current counter value"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "SYST_CALIB,SysTick Calibration value Register"
|
|
bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
|
|
bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
|
|
rgroup.long 0xD00++0x03
|
|
line.long 0x00 "CPUID,CPUID Base Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Indicates implementer"
|
|
bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,?..."
|
|
bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8-M w/ Main extension"
|
|
textline " "
|
|
hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number"
|
|
bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "Reserved,Reserved,Patch 2,?..."
|
|
group.long 0xD04++0x23
|
|
line.long 0x00 "ICSR,Interrupt Control and State Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x00 30. " PENDNMISET , On writes allows the NMI exception to be set as pending. On reads indicates whether the NMI exception is pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x00 27. " PENDSVSET , On writes allows the PendSV exception for the selected Security state to be set as pending. On reads indicates whether the PendSV for the selected Security state exception is pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x00 25. " PENDSTSET ,On writes, sets the SysTick exception as pending. On reads, indicates the current state of the exception" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 24. " STTNS ,Controls whether in a single SysTick implementation the SysTick is Secure or Non-secure" "Secure,Non-secure"
|
|
rbitfld.long 0x00 23. " ISRPREEMPT ,Indicates whether a pending exception will be serviced on exit from debug halt state" "Disabled,Enabled"
|
|
rbitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt, generated by the NVIC, is pending" "Not pending,Pending"
|
|
textline " "
|
|
hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,The exception number of the highest priority pending and enabled interrupt"
|
|
rbitfld.long 0x00 11. " RETTOBASE ,Indicates whether there is an active exception other than the exception indicated by the current value of the IPSR" "Present,Absent"
|
|
hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception"
|
|
line.long 0x04 "VTOR,Vector Table Offset Register"
|
|
hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Bits[31:7] of the vector table address"
|
|
line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
|
|
hexmask.long.word 0x08 16.--31. 1. " VECTKEYSTAT ,Vector Key"
|
|
rbitfld.long 0x08 15. " ENDIANNESS ,Indicates the memory system endianness" "Little endian,Big endian"
|
|
bitfld.long 0x08 14. " PRIS ,Prioritize Secure exceptions" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " BFHFNMINS ,BusFault BusFault HardFault and NMI Non-secure enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 8.--10. " PRIGROUP ,Priority grouping. Group priority field bits/Subpriority field bits" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
bitfld.long 0x08 3. " SYSRESETREQS ,System reset request Secure only" "Both states,Secure only"
|
|
textline " "
|
|
bitfld.long 0x08 2. " SYSRESETREQ ,System reset request" "Not requested,Requested"
|
|
bitfld.long 0x08 1. " VECTCLRACTIVE ,Writing 1 to this bit clears all active state information for fixed and configurable exceptions" "No effect,Clear"
|
|
line.long 0x0C "SCR,System Control Register"
|
|
bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
|
|
bitfld.long 0x0C 3. " SLEEPDEEPS ,Controls whether the SLEEPDEEP bit is only accessible from the secure state" "Both states,Secure only"
|
|
bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
|
|
line.long 0x10 "CCR,Configuration and Control Register"
|
|
bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 10. " STKOFHFNMIGN ,Controls the effect of a stack limit violation while executing at a requested priority less than 0" "Not ignored,Ignored"
|
|
bitfld.long 0x10 8. " BFHFNMIGN ,Determines the effect of precise busfaults on handlers running at a requested priority less than 0" "Not ignored,Ignored"
|
|
bitfld.long 0x10 4. " DIV_0_TRP ,Controls the trap on divide by 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 3. " UNALIGN_TRP ,Controls the trapping of unaligned word or halfword accesses" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Disabled,Enabled"
|
|
line.long 0x14 "SHPR1,System Handler Priority Register 1"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of system handler 7, SecureFault"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6, UsageFault"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5, BusFault"
|
|
textline " "
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4, MemManage"
|
|
line.long 0x18 "SHPR2,System Handler Priority Register 2"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11, SVCall"
|
|
line.long 0x1C "SHPR3,System Handler Priority Register 3"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of system handler 15, SysTick"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of system handler 14, PendSV"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of system handler 12, DebugMonitor"
|
|
line.long 0x20 "SHCSR,System Handler Control and State Register"
|
|
bitfld.long 0x20 21. " HARDFAULTPENDED ,HardFault exception status" "Not pending,Pending"
|
|
bitfld.long 0x20 20. " SECUREFAULTPENDED ,SecureFault exception status" "Not pending,Pending"
|
|
bitfld.long 0x20 19. " SECUREFAULTENA ,SecureFault exception enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 18. " USGFAULTENA ,UsageFault exception enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 17. " BUSFAULTENA ,BusFault exception enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 16. " MEMFAULTENA ,MemManage exception enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 15. " SVCALLPENDED ,SVCall exception status" "Not pending,Pending"
|
|
bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault exception status" "Not pending,Pending"
|
|
bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage exception status" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault exception status" "Not pending,Pending"
|
|
bitfld.long 0x20 11. " SYSTICKACT ,SysTick exception status" "Not active,Active"
|
|
bitfld.long 0x20 10. " PENDSVACT ,PendSV exception status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x20 8. " MONITORACT ,Monitor exception status" "Not active,Active"
|
|
bitfld.long 0x20 7. " SVCALLACT ,SVCall exception status" "Not active,Active"
|
|
bitfld.long 0x20 5. " NMIACT ,NMI exception status" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x20 4. " SECUREFAULTACT ,SecureFault exception status" "Not active,Active"
|
|
bitfld.long 0x20 3. " USGFAULTACT ,UsageFault exception status" "Not active,Active"
|
|
bitfld.long 0x20 2. " HARDFAULTACT ,HardFault exception status for the selected Security state" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x20 1. " BUSFAULTACT ,BusFault exception status" "Not active,Active"
|
|
bitfld.long 0x20 0. " MEMFAULTACT ,MemManage exception status" "Not active,Active"
|
|
group.byte 0xD28++0x1
|
|
line.byte 0x00 "MMFSR,MemManage Status Register"
|
|
bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
|
|
bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 4. " MSTKERR ,Stacking Access Violations" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " MUNSTKERR ,Unstacking Access Violations" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred"
|
|
line.byte 0x01 "BFSR,Bus Fault Status Register"
|
|
bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid"
|
|
bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred"
|
|
bitfld.byte 0x01 4. " STKERR ,Derived bus fault (exception entry)" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault (exception return)" "Not occurred,Occurred"
|
|
bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred"
|
|
bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred"
|
|
group.word 0xD2A++0x1
|
|
line.word 0x00 "UFSR,Usage Fault Status Register"
|
|
eventfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error"
|
|
eventfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error"
|
|
eventfld.word 0x00 4. " STKOF ,Stack overflow error" "No error,Error"
|
|
textline " "
|
|
eventfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error"
|
|
eventfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error"
|
|
eventfld.word 0x00 1. " INVSTATE , Invalid Combination of EPSR and Instruction" "No error,Error"
|
|
textline " "
|
|
eventfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error"
|
|
group.long 0xD2C++0x03
|
|
line.long 0x00 "HFSR,HardFault Status Register"
|
|
bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority has been escalated to a HardFault exception" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred"
|
|
group.long 0xD34++0x0B
|
|
line.long 0x00 "MMFAR,MemManage Fault Address Register"
|
|
line.long 0x04 "BFAR,BusFault Address Register"
|
|
line.long 0x08 "AFSR,Auxiliary Fault Status Register"
|
|
group.long 0xD88++0x03
|
|
line.long 0x00 "CPACR,Coprocessor Access Control Register"
|
|
bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Denied,Privileged,,Full"
|
|
bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Denied,Privileged,,Full"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Denied,Privileged,,Full"
|
|
bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Denied,Privileged,,Full"
|
|
bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Denied,Privileged,,Full"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Denied,Privileged,,Full"
|
|
bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Denied,Privileged,,Full"
|
|
bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Denied,Privileged,,Full"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Denied,Privileged,,Full"
|
|
if PER.ADDRESS.isSECUREEX(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD48)
|
|
group.long 0xD8C++0x03
|
|
line.long 0x00 "NSACR,Non-Secure Access Control Register"
|
|
bitfld.long 0x00 11. " CP11 ,Enables Non-secure access to coprocessor CP11" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " CP10 ,Enables Non-secure access to coprocessor CP10" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " CP7 ,Enables Non-secure access to coprocessor CP7" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CP6 ,Enables Non-secure access to coprocessor CP6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " CP5 ,Enables Non-secure access to coprocessor CP5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CP4 ,Enables Non-secure access to coprocessor CP4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CP3 ,Enables Non-secure access to coprocessor CP3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CP2 ,Enables Non-secure access to coprocessor CP2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " CP1 ,Enables Non-secure access to coprocessor CP1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CP0 ,Enables Non-secure access to coprocessor CP0" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD8C++0x03
|
|
hide.long 0x00 "NSACR,Non-Secure Access Control Register (not accessible)"
|
|
endif
|
|
wgroup.long 0xF00++0x03
|
|
line.long 0x00 "STIR,Software Triggered Interrupt Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be pended"
|
|
tree "Memory System"
|
|
width 10.
|
|
rgroup.long 0xD78++0x03
|
|
line.long 0x00 "CLIDR,Cache Level ID Register"
|
|
bitfld.long 0x00 30.--31. " ICB ,Inner cache boundary" "Not disclosed,L1 cache highest,L2 cache highest,L3 cache highest"
|
|
bitfld.long 0x00 27.--29. " LOU ,LOUU" "Level 1,Level 2,?..."
|
|
bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,Level 2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 18.--20. " CL7 ,Cache type field level 7" "No cache,Instr. only,Data only,Data and Instr.,Unified cache,?..."
|
|
bitfld.long 0x00 15.--17. " CL6 ,Cache type field level 6" "No cache,?..."
|
|
bitfld.long 0x00 12.--14. " CL5 ,Cache type field level 5" "No cache,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " CL4 ,Cache type field level 4" "No cache,?..."
|
|
bitfld.long 0x00 6.--8. " CL3 ,Cache type field level 3" "No cache,?..."
|
|
bitfld.long 0x00 3.--5. " CL2 ,Cache type field level 2" "No cache,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " CL1 ,Cache type field level 1" "No cache,Instr. only,Data only,Data and Instr.,?..."
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD7C)&0xE0000000)==0x80000000)
|
|
rgroup.long 0xD7C++0x03
|
|
line.long 0x00 "CTR,Cache Type Register"
|
|
bitfld.long 0x00 29.--31. " FORMAT ,Indicates the implemented CTR format" "No Cache,,,,Cache,?..."
|
|
bitfld.long 0x00 24.--27. " CWG ,Cache Write-back Granule" "0,1,2,3,4,5,6,7,8,9,?..."
|
|
bitfld.long 0x00 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DMINLINE ,Log 2 of the number of words in the smallest cache line of all the data caches and unified caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " IMINLINE ,Log 2 of the number of words in the smallest cache line of all the instruction caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
rgroup.long 0xD7C++0x03
|
|
line.long 0x00 "CTR,Cache Type Register"
|
|
bitfld.long 0x00 29.--31. " FORMAT ,Indicates the implemented CTR format" "No Cache,,,,Cache,?..."
|
|
endif
|
|
rgroup.long 0xD80++0x03
|
|
line.long 0x00 "CCSIDR,Cache Size ID Register"
|
|
bitfld.long 0x00 31. " WT ,Indicates support available for Write-Through" "Not supported,Supported"
|
|
bitfld.long 0x00 30. " WB ,Indicates support available for Write-Back" "Not supported,Supported"
|
|
bitfld.long 0x00 29. " RA ,Indicates support available for read allocation" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x00 28. " WA ,Indicates support available for write allocation" "Not supported,Supported"
|
|
hexmask.long.word 0x00 13.--27. 1. " NUMSETS ,Indicates the number of sets as (number of sets) - 1"
|
|
hexmask.long.word 0x00 3.--12. 1. " ASSOCIATIVITY ,Indicates the number of ways as (number of ways) - 1"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " LINESIZE ,Indicates the number of words in each cache line" "4,8,16,32,64,128,256,512"
|
|
group.long 0xD84++0x03
|
|
line.long 0x00 "CSSELR,Cache Size Selection Register"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Identifies which cache level to select" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,?..."
|
|
bitfld.long 0x00 0. " IND ,Identifies instruction or data cache to use" "Data/Unified,Instruction"
|
|
wgroup.long 0xF50++0x03
|
|
line.long 0x00 "ICIALLU,I-Cache Invalidate All to PoU"
|
|
wgroup.long 0xF58++0x23
|
|
line.long 0x00 "ICIMVAU,I-Cache Invalidate by MVA to PoU"
|
|
line.long 0x04 "DCIMVAC,D-Cache Invalidate by MVA to PoC"
|
|
line.long 0x08 "DCISW,D-Cache Invalidate by Set-Way"
|
|
hexmask.long 0x08 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on"
|
|
bitfld.long 0x08 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
|
|
line.long 0x0C "DCCMVAU,D-Cache Clean by MVA to PoU"
|
|
line.long 0x10 "DCCMVAC,D-Cache Clean by MVA to PoC"
|
|
line.long 0x14 "DCCSW,D-Cache Clean by Set-Way"
|
|
hexmask.long 0x14 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on"
|
|
bitfld.long 0x14 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
|
|
line.long 0x18 "DCCIMVAC,D-Cache Clean and Invalidate by MVA to PoC"
|
|
line.long 0x1C "DCCISW,D-Cache Clean and Invalidate by Set-Way"
|
|
hexmask.long 0x1C 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on"
|
|
bitfld.long 0x1C 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
|
|
line.long 0x20 "BPIALL,Branch Predictor Invalidate All"
|
|
tree.end
|
|
tree "Feature Registers"
|
|
width 10.
|
|
rgroup.long 0xD40++0x0B
|
|
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
|
|
bitfld.long 0x00 4.--7. " STATE1 ,T32 instruction set support" ",,,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
|
|
line.long 0x04 "ID_PFR1,Processor Feature Register 1"
|
|
bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
|
|
bitfld.long 0x04 4.--7. " SECURITY ,Security support" "Not implemented,Implemented,?..."
|
|
line.long 0x08 "ID_DFR0,Debug Feature Register 0"
|
|
bitfld.long 0x08 20.--23. " MPROFDBG ,M-profile debug. Indicates the supported M-profile debug architecture" "Not supported,ARMv8-M Debug architecture,?..."
|
|
rgroup.long 0xD4C++0x03
|
|
line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
|
|
rgroup.long 0xD50++0x03
|
|
line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
|
|
bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " TCM ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "1 level,2 levels,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,HW coherency,,,,,,,,,,,,,,Ignored"
|
|
bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,,PMSAv8,?..."
|
|
rgroup.long 0xD54++0x03
|
|
line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
|
|
rgroup.long 0xD58++0x03
|
|
line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
|
|
bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
|
|
rgroup.long 0xD5C++0x03
|
|
line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3"
|
|
bitfld.long 0x00 8.--11. " BPMAINT ,Indicates the supported branch predictor maintenance" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 4.--7. " CMAINTSW ,Indicates the supported cache maintenance operations by set/way" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " CMAINTVA ,Indicates the supported cache maintenance operations by virtual-address" "Not supported,Supported,?..."
|
|
rgroup.long 0xD60++0x03
|
|
line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
|
|
bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
|
|
bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
|
|
bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
|
|
bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
|
|
bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
|
|
rgroup.long 0xD64++0x03
|
|
line.long 0x00 "ID_ISAR1,Instruction Set Attributes Register 1"
|
|
bitfld.long 0x00 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
|
|
bitfld.long 0x00 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
|
|
bitfld.long 0x00 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Basic,Extended,?..."
|
|
rgroup.long 0xD68++0x03
|
|
line.long 0x00 "ID_ISAR2,Instruction Set Attributes Register 2"
|
|
bitfld.long 0x00 28.--31. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
|
|
bitfld.long 0x00 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
|
|
bitfld.long 0x00 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,SMULL/SMLAL,,SMULL/SMLAL/DSP,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MUL,MUL/MLA/MLS,?..."
|
|
bitfld.long 0x00 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
|
|
bitfld.long 0x00 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,,Load-acquire/Store-release/Exclusive,?..."
|
|
rgroup.long 0xD6C++0x03
|
|
line.long 0x00 "ID_ISAR3,Instruction Set Attributes Register 3"
|
|
bitfld.long 0x00 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
|
|
bitfld.long 0x00 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Extended,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB/Q-bit,?..."
|
|
rgroup.long 0xD70++0x03
|
|
line.long 0x00 "ID_ISAR4,Instruction Set Attributes Register 4"
|
|
bitfld.long 0x00 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,CPS/MRS/MSR,?..."
|
|
bitfld.long 0x00 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" ",,,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,,,DMB/DSB/ISB,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
|
|
bitfld.long 0x00 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,,,Load/store,?..."
|
|
bitfld.long 0x00 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,?..."
|
|
tree.end
|
|
tree "CoreSight Identification Registers"
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 11.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xFBC))&0x100000)==0x100000)
|
|
rgroup.long 0xFBC++0x03
|
|
line.long 0x00 "DDEVARCH,SCS CoreSight Device Architecture Register"
|
|
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect"
|
|
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
|
|
bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part"
|
|
else
|
|
rgroup.long 0xFBC++0x03
|
|
line.long 0x00 "DDEVARCH,SCS CoreSight Device Architecture Register"
|
|
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
|
|
endif
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "DPIDR0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "DPIDR1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "DPIDR2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "DPIDR3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "DCIDR0,Component ID0 (Preamble)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble"
|
|
line.long 0x04 "DCIDR1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class"
|
|
line.long 0x08 "DCIDR2,Component ID2"
|
|
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble"
|
|
line.long 0x0c "DCIDR3,Component ID3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble"
|
|
tree.end
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit (MPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,?..."
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
|
|
group.long 0xD9C++0x03 "Region 8"
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
|
|
group.long 0xD9C++0x03 "Region 9"
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
|
|
group.long 0xD9C++0x03 "Region 10"
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
|
|
group.long 0xD9C++0x03 "Region 11"
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
|
|
group.long 0xD9C++0x03 "Region 12"
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
|
|
group.long 0xD9C++0x03 "Region 13"
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
|
|
group.long 0xD9C++0x03 "Region 14"
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
|
|
group.long 0xD9C++0x03 "Region 15"
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
|
|
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
textline " "
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15"
|
|
endif
|
|
tree.end
|
|
newline
|
|
group.long 0xDC0++0x07
|
|
line.long 0x00 "MPU_MAIR0,MPU Memory Attribute Indirection Register 0"
|
|
bitfld.long 0x00 28.--31. " ATTR3H ,Attribute 3 High. Outer memory attributes for MPU regions with an AttrIndex of 3" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
|
|
bitfld.long 0x00 24.--27. " ATTR3L ,Attribute 3 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 3 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
|
|
newline
|
|
bitfld.long 0x00 20.--23. " ATTR2H ,Attribute 2 High. Outer memory attributes for MPU regions with an AttrIndex of 2" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
|
|
bitfld.long 0x00 16.--19. " ATTR2L ,Attribute 2 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 2 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
|
|
newline
|
|
bitfld.long 0x00 12.--15. " ATTR1H ,Attribute 1 High. Outer memory attributes for MPU regions with an AttrIndex of 1" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
|
|
bitfld.long 0x00 8.--11. " ATTR1L ,Attribute 1 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 1 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
|
|
newline
|
|
bitfld.long 0x00 4.--7. " ATTR0H ,Attribute 0 High. Outer memory attributes for MPU regions with an AttrIndex of 0" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
|
|
bitfld.long 0x00 0.--3. " ATTR0L ,Attribute 0 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 0 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
|
|
line.long 0x04 "MPU_MAIR1,MPU Memory Attribute Indirection Register 1"
|
|
bitfld.long 0x04 28.--31. " ATTR7H ,Attribute 7 High. Outer memory attributes for MPU regions with an AttrIndex of 7" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
|
|
bitfld.long 0x04 24.--27. " ATTR7L ,Attribute 7 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 7 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
|
|
newline
|
|
bitfld.long 0x04 20.--23. " ATTR6H ,Attribute 6 High. Outer memory attributes for MPU regions with an AttrIndex of 6" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
|
|
bitfld.long 0x04 16.--19. " ATTR6L ,Attribute 6 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 6 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
|
|
newline
|
|
bitfld.long 0x04 12.--15. " ATTR5H ,Attribute 5 High. Outer memory attributes for MPU regions with an AttrIndex of 5" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
|
|
bitfld.long 0x04 8.--11. " ATTR5L ,Attribute 5 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 5 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
|
|
newline
|
|
bitfld.long 0x04 4.--7. " ATTR4H ,Attribute 4 High. Outer memory attributes for MPU regions with an AttrIndex of 4" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
|
|
bitfld.long 0x04 0.--3. " ATTR4L ,Attribute 4 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 4 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Security Attribution Unit (SAU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
group.long 0xDD0++0x03
|
|
line.long 0x00 "SAU_CTRL,SAU Control Register"
|
|
bitfld.long 0x00 1. " ALLNS ,When SAU_CTRL.ENABLE is 0 this bit controls if the memory is marked as Non-secure or Secure" "Secure,Non-Secure"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the SAU" "Disabled,Enabled"
|
|
rgroup.long 0xDD4++0x03
|
|
line.long 0x00 "SAU_TYPE,SAU Type Register"
|
|
bitfld.long 0x00 0.--7. " SREGION ,The number of implemented SAU regions" "0,1,2,3,4,5,6,7,8,?..."
|
|
group.long 0xDD8++0x03
|
|
line.long 0x00 "SAU_RNR,SAU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SAU_RNR ,Indicates the SAU region accessed by SAU_RBAR and SAU_RLAR"
|
|
tree.close "SAU regions"
|
|
if PER.ADDRESS.isSECUREEX(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD0)
|
|
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x0
|
|
group.long 0xDDC++0x03 "Region 0"
|
|
saveout 0xDD8 %l 0x0
|
|
line.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x0
|
|
line.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 0 (not implemented)"
|
|
saveout 0xDD8 %l 0x0
|
|
hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x0
|
|
hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
|
|
endif
|
|
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x1
|
|
group.long 0xDDC++0x03 "Region 1"
|
|
saveout 0xDD8 %l 0x1
|
|
line.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x1
|
|
line.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 1 (not implemented)"
|
|
saveout 0xDD8 %l 0x1
|
|
hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x1
|
|
hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
|
|
endif
|
|
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x2
|
|
group.long 0xDDC++0x03 "Region 2"
|
|
saveout 0xDD8 %l 0x2
|
|
line.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x2
|
|
line.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 2 (not implemented)"
|
|
saveout 0xDD8 %l 0x2
|
|
hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x2
|
|
hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
|
|
endif
|
|
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x3
|
|
group.long 0xDDC++0x03 "Region 3"
|
|
saveout 0xDD8 %l 0x3
|
|
line.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x3
|
|
line.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 3 (not implemented)"
|
|
saveout 0xDD8 %l 0x3
|
|
hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x3
|
|
hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
|
|
endif
|
|
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x4
|
|
group.long 0xDDC++0x03 "Region 4"
|
|
saveout 0xDD8 %l 0x4
|
|
line.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x4
|
|
line.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 4 (not implemented)"
|
|
saveout 0xDD8 %l 0x4
|
|
hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x4
|
|
hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
|
|
endif
|
|
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x5
|
|
group.long 0xDDC++0x03 "Region 5"
|
|
saveout 0xDD8 %l 0x5
|
|
line.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x5
|
|
line.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 5 (not implemented)"
|
|
saveout 0xDD8 %l 0x5
|
|
hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x5
|
|
hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
|
|
endif
|
|
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x6
|
|
group.long 0xDDC++0x03 "Region 6"
|
|
saveout 0xDD8 %l 0x6
|
|
line.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x6
|
|
line.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 6 (not implemented)"
|
|
saveout 0xDD8 %l 0x6
|
|
hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x6
|
|
hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
|
|
endif
|
|
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x7
|
|
group.long 0xDDC++0x03 "Region 7"
|
|
saveout 0xDD8 %l 0x7
|
|
line.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x7
|
|
line.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
|
|
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
|
|
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 7 (not implemented)"
|
|
saveout 0xDD8 %l 0x7
|
|
hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x7
|
|
hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
|
|
endif
|
|
else
|
|
hgroup.long 0xDDC++0x03 "Region 0 (not accessible)"
|
|
saveout 0xDD8 %l 0x0
|
|
hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x0
|
|
hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
|
|
hgroup.long 0xDDC++0x03 "Region 1 (not accessible)"
|
|
saveout 0xDD8 %l 0x1
|
|
hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x1
|
|
hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
|
|
hgroup.long 0xDDC++0x03 "Region 2 (not accessible)"
|
|
saveout 0xDD8 %l 0x2
|
|
hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x2
|
|
hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
|
|
hgroup.long 0xDDC++0x03 "Region 3 (not accessible)"
|
|
saveout 0xDD8 %l 0x3
|
|
hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x3
|
|
hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
|
|
hgroup.long 0xDDC++0x03 "Region 4 (not accessible)"
|
|
saveout 0xDD8 %l 0x4
|
|
hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x4
|
|
hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
|
|
hgroup.long 0xDDC++0x03 "Region 5 (not accessible)"
|
|
saveout 0xDD8 %l 0x5
|
|
hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x5
|
|
hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
|
|
hgroup.long 0xDDC++0x03 "Region 6 (not accessible)"
|
|
saveout 0xDD8 %l 0x6
|
|
hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x6
|
|
hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
|
|
hgroup.long 0xDDC++0x03 "Region 7 (not accessible)"
|
|
saveout 0xDD8 %l 0x7
|
|
hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
|
|
hgroup.long 0xDE0++0x03
|
|
saveout 0xDD8 %l 0x7
|
|
hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
|
|
endif
|
|
tree.end
|
|
group.long 0xDE4++0x03
|
|
line.long 0x00 "SFSR,Secure Fault Status Register"
|
|
bitfld.long 0x00 7. " LSERR ,Lazy state error flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " SFARVALID ,Secure fault address valid" "Not valid,Valid"
|
|
bitfld.long 0x00 5. " LSPERR ,Lazy state preservation error flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INVTRAN ,Invalid transition flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " AUVIOL ,Attribution unit violation flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " INVER ,Invalid exception return flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " INVIS ,Invalid integrity signature flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " INVEP ,Invalid entry point" "Not occurred,Occurred"
|
|
group.long 0xDE8++0x03
|
|
line.long 0x00 "SFAR,Secure Fault Address Register"
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller (NVIC)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 6.
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,0-64,0-96,0-128,0-160,0-192,0-224,0-255,0-287,0-319,0-351,0-383,0-415,0-447,0-479,0-511"
|
|
width 24.
|
|
tree "Interrupt Enable Registers"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x104++0x03
|
|
hide.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x108++0x03
|
|
hide.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x10C++0x03
|
|
hide.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x110++0x03
|
|
hide.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x114++0x03
|
|
hide.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x118++0x03
|
|
hide.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "IRQ224_255_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA255 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA254 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA253 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA252 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA251 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA250 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA249 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA248 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA247 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA246 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA245 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA244 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA243 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA242 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA241 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA240 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x11C++0x03
|
|
hide.long 0x00 "IRQ224_255_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "IRQ256_287_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA287 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA286 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA285 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA284 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA283 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA282 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA281 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA280 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA279 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA278 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA277 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA276 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA275 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA274 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA273 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA272 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA271 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA270 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA269 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA268 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA267 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA266 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA265 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA264 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA263 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA262 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA261 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA260 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA259 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA258 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA257 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA256 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x120++0x03
|
|
hide.long 0x00 "IRQ256_287_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "IRQ288_319_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA319 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA318 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA317 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA316 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA315 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA314 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA313 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA312 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA311 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA310 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA309 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA308 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA307 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA306 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA305 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA304 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA303 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA302 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA301 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA300 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA299 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA298 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA297 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA296 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA295 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA294 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA293 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA292 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA291 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA290 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA289 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA288 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x124++0x03
|
|
hide.long 0x00 "IRQ288_319_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "IRQ320_351_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA351 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA350 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA349 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA348 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA347 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA346 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA345 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA344 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA343 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA342 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA341 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA340 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA339 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA338 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA337 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA336 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA335 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA334 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA333 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA332 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA331 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA330 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA329 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA328 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA327 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA326 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA325 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA324 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA323 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA322 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA321 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA320 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x128++0x03
|
|
hide.long 0x00 "IRQ320_351_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "IRQ352_383_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA383 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA382 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA381 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA380 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA379 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA378 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA377 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA376 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA375 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA374 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA373 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA372 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA371 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA370 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA369 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA368 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA367 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA366 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA365 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA364 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA363 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA362 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA361 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA360 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA359 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA358 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA357 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA356 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA355 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA354 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA353 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA352 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x12C++0x03
|
|
hide.long 0x00 "IRQ352_383_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "IRQ384_415_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA415 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA414 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA413 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA412 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA411 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA410 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA409 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA408 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA407 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA406 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA405 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA404 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA403 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA402 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA401 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA400 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA399 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA398 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA397 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA396 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA395 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA394 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA393 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA392 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA391 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA390 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA389 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA388 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA387 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA386 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA385 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA384 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x130++0x03
|
|
hide.long 0x00 "IRQ384_415_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "IRQ416_447_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA447 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA446 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA445 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA444 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA443 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA442 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA441 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA440 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA439 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA438 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA437 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA436 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA435 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA434 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA433 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA432 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA431 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA430 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA429 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA428 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA427 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA426 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA425 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA424 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA423 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA422 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA421 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA420 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA419 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA418 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA417 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA416 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x134++0x03
|
|
hide.long 0x00 "IRQ416_447_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "IRQ448_479_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA479 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA478 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA477 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA476 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA475 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA474 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA473 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA472 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA471 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA470 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA469 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA468 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA467 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA466 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA465 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA464 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA463 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA462 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA461 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA460 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA459 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA458 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA457 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA456 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA455 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA454 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA453 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA452 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA451 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA450 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA449 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA448 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x138++0x03
|
|
hide.long 0x00 "IRQ448_479_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F)
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "IRQ480_511_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA511 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA510 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA509 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA508 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA507 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA506 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA505 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA504 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA503 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA502 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA501 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA500 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA499 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA498 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA497 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA496 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA495 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA494 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA493 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA492 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA491 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA490 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA489 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA488 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA487 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA486 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA485 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA484 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA483 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA482 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA481 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA480 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x13C++0x03
|
|
hide.long 0x00 "IRQ480_511_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
tree.end
|
|
width 24.
|
|
tree "Interrupt Pending Registers"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x204++0x03
|
|
hide.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
|
|
group.long 0x208++0x03
|
|
line.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x208++0x03
|
|
hide.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
|
|
group.long 0x20C++0x03
|
|
line.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x20C++0x03
|
|
hide.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
|
|
group.long 0x210++0x03
|
|
line.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x210++0x03
|
|
hide.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
|
|
group.long 0x214++0x03
|
|
line.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x214++0x03
|
|
hide.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
|
|
group.long 0x218++0x03
|
|
line.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x218++0x03
|
|
hide.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
|
|
group.long 0x21C++0x03
|
|
line.long 0x00 "IRQ224_255_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN255 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN254 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN253 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN252 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN251 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN250 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN249 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN248 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN247 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN246 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN245 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN244 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN243 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN242 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN241 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN240 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x21C++0x03
|
|
hide.long 0x00 "IRQ224_255_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
|
|
group.long 0x220++0x03
|
|
line.long 0x00 "IRQ256_287_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN287 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN286 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN285 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN284 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN283 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN282 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN281 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN280 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN279 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN278 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN277 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN276 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN275 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN274 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN273 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN272 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN271 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN270 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN269 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN268 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN267 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN266 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN265 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN264 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN263 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN262 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN261 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN260 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN259 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN258 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN257 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN256 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x220++0x03
|
|
hide.long 0x00 "IRQ256_287_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
|
|
group.long 0x224++0x03
|
|
line.long 0x00 "IRQ288_319_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN319 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN318 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN317 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN316 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN315 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN314 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN313 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN312 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN311 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN310 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN309 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN308 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN307 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN306 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN305 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN304 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN303 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN302 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN301 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN300 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN299 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN298 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN297 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN296 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN295 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN294 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN293 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN292 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN291 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN290 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN289 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN288 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x224++0x03
|
|
hide.long 0x00 "IRQ288_319_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
|
|
group.long 0x228++0x03
|
|
line.long 0x00 "IRQ320_351_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN351 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN350 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN349 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN348 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN347 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN346 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN345 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN344 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN343 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN342 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN341 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN340 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN339 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN338 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN337 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN336 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN335 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN334 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN333 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN332 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN331 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN330 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN329 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN328 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN327 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN326 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN325 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN324 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN323 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN322 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN321 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN320 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x228++0x03
|
|
hide.long 0x00 "IRQ320_351_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
|
|
group.long 0x22C++0x03
|
|
line.long 0x00 "IRQ352_383_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN383 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN382 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN381 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN380 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN379 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN378 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN377 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN376 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN375 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN374 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN373 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN372 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN371 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN370 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN369 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN368 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN367 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN366 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN365 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN364 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN363 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN362 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN361 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN360 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN359 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN358 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN357 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN356 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN355 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN354 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN353 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN352 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x22C++0x03
|
|
hide.long 0x00 "IRQ352_383_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
|
|
group.long 0x230++0x03
|
|
line.long 0x00 "IRQ384_415_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN415 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN414 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN413 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN412 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN411 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN410 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN409 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN408 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN407 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN406 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN405 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN404 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN403 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN402 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN401 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN400 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN399 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN398 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN397 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN396 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN395 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN394 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN393 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN392 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN391 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN390 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN389 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN388 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN387 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN386 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN385 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN384 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x230++0x03
|
|
hide.long 0x00 "IRQ384_415_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
|
|
group.long 0x234++0x03
|
|
line.long 0x00 "IRQ416_447_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN447 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN446 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN445 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN444 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN443 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN442 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN441 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN440 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN439 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN438 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN437 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN436 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN435 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN434 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN433 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN432 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN431 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN430 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN429 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN428 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN427 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN426 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN425 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN424 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN423 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN422 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN421 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN420 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN419 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN418 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN417 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN416 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x234++0x03
|
|
hide.long 0x00 "IRQ416_447_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
|
|
group.long 0x238++0x03
|
|
line.long 0x00 "IRQ448_479_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN479 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN478 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN477 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN476 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN475 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN474 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN473 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN472 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN471 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN470 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN469 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN468 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN467 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN466 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN465 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN464 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN463 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN462 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN461 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN460 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN459 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN458 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN457 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN456 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN455 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN454 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN453 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN452 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN451 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN450 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN449 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN448 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x238++0x03
|
|
hide.long 0x00 "IRQ448_479_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F)
|
|
group.long 0x23C++0x03
|
|
line.long 0x00 "IRQ480_511_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN511 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN510 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN509 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN508 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN507 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN506 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN505 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN504 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN503 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN502 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN501 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN500 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN499 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN498 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN497 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN496 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN495 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN494 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN493 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN492 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN491 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN490 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN489 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN488 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN487 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN486 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN485 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN484 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN483 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN482 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN481 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN480 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x23C++0x03
|
|
hide.long 0x00 "IRQ480_511_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
tree.end
|
|
width 11.
|
|
tree "Interrupt Active Bit Registers"
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ACTIVE0,Active Bit Register 0"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
|
|
rgroup.long 0x304++0x03
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x304++0x03
|
|
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
|
|
rgroup.long 0x308++0x03
|
|
line.long 0x00 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x00 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x308++0x03
|
|
hide.long 0x00 "ACTIVE2,Active Bit Register 2"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
|
|
rgroup.long 0x30C++0x03
|
|
line.long 0x00 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x00 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x30C++0x03
|
|
hide.long 0x00 "ACTIVE3,Active Bit Register 3"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
|
|
rgroup.long 0x310++0x03
|
|
line.long 0x00 "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x00 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x310++0x03
|
|
hide.long 0x00 "ACTIVE4,Active Bit Register 4"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
|
|
rgroup.long 0x314++0x03
|
|
line.long 0x00 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x00 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x314++0x03
|
|
hide.long 0x00 "ACTIVE5,Active Bit Register 5"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
|
|
rgroup.long 0x318++0x03
|
|
line.long 0x00 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x00 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x318++0x03
|
|
hide.long 0x00 "ACTIVE6,Active Bit Register 6"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
|
|
rgroup.long 0x31C++0x03
|
|
line.long 0x00 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x00 31. " ACTIVE255 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE254 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE253 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE252 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE251 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE250 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE249 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE248 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE247 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE246 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE245 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE244 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE243 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE242 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE241 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE240 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x31C++0x03
|
|
hide.long 0x00 "ACTIVE7,Active Bit Register 7"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
|
|
rgroup.long 0x320++0x03
|
|
line.long 0x00 "ACTIVE8,Active Bit Register 8"
|
|
bitfld.long 0x00 31. " ACTIVE287 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE286 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE285 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE284 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE283 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE282 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE281 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE280 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE279 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE278 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE277 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE276 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE275 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE274 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE273 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE272 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE271 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE270 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE269 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE268 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE267 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE266 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE265 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE264 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE263 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE262 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE261 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE260 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE259 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE258 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE257 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE256 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x320++0x03
|
|
hide.long 0x00 "ACTIVE8,Active Bit Register 8"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
|
|
rgroup.long 0x324++0x03
|
|
line.long 0x00 "ACTIVE9,Active Bit Register 9"
|
|
bitfld.long 0x00 31. " ACTIVE319 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE318 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE317 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE316 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE315 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE314 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE313 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE312 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE311 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE310 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE309 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE308 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE307 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE306 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE305 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE304 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE303 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE302 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE301 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE300 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE299 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE298 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE297 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE296 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE295 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE294 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE293 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE292 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE291 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE290 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE289 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE288 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x324++0x03
|
|
hide.long 0x00 "ACTIVE9,Active Bit Register 9"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
|
|
rgroup.long 0x328++0x03
|
|
line.long 0x00 "ACTIVE10,Active Bit Register 10"
|
|
bitfld.long 0x00 31. " ACTIVE351 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE350 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE349 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE348 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE347 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE346 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE345 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE344 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE343 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE342 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE341 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE340 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE339 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE338 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE337 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE336 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE335 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE334 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE333 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE332 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE331 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE330 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE329 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE328 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE327 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE326 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE325 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE324 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE323 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE322 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE321 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE320 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x328++0x03
|
|
hide.long 0x00 "ACTIVE10,Active Bit Register 10"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
|
|
rgroup.long 0x32C++0x03
|
|
line.long 0x00 "ACTIVE11,Active Bit Register 11"
|
|
bitfld.long 0x00 31. " ACTIVE383 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE382 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE381 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE380 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE379 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE378 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE377 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE376 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE375 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE374 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE373 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE372 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE371 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE370 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE369 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE368 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE367 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE366 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE365 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE364 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE363 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE362 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE361 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE360 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE359 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE358 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE357 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE356 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE355 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE354 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE353 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE352 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x32C++0x03
|
|
hide.long 0x00 "ACTIVE11,Active Bit Register 11"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
|
|
rgroup.long 0x330++0x03
|
|
line.long 0x00 "ACTIVE12,Active Bit Register 12"
|
|
bitfld.long 0x00 31. " ACTIVE415 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE414 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE413 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE412 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE411 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE410 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE409 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE408 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE407 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE406 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE405 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE404 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE403 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE402 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE401 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE400 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE399 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE398 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE397 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE396 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE395 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE394 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE393 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE392 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE391 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE390 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE389 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE388 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE387 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE386 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE385 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE384 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x330++0x03
|
|
hide.long 0x00 "ACTIVE12,Active Bit Register 12"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
|
|
rgroup.long 0x334++0x03
|
|
line.long 0x00 "ACTIVE13,Active Bit Register 13"
|
|
bitfld.long 0x00 31. " ACTIVE447 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE446 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE445 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE444 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE443 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE442 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE441 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE440 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE439 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE438 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE437 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE436 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE435 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE434 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE433 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE432 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE431 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE430 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE429 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE428 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE427 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE426 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE425 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE424 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE423 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE422 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE421 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE420 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE419 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE418 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE417 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE416 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x334++0x03
|
|
hide.long 0x00 "ACTIVE13,Active Bit Register 13"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
|
|
rgroup.long 0x338++0x03
|
|
line.long 0x00 "ACTIVE14,Active Bit Register 14"
|
|
bitfld.long 0x00 31. " ACTIVE479 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE478 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE477 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE476 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE475 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE474 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE473 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE472 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE471 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE470 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE469 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE468 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE467 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE466 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE465 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE464 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE463 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE462 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE461 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE460 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE459 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE458 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE457 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE456 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE455 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE454 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE453 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE452 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE451 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE450 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE449 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE448 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x338++0x03
|
|
hide.long 0x00 "ACTIVE14,Active Bit Register 14"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F)
|
|
rgroup.long 0x33C++0x03
|
|
line.long 0x00 "ACTIVE15,Active Bit Register 15"
|
|
bitfld.long 0x00 31. " ACTIVE511 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE510 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE509 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE508 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE507 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE506 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE505 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE504 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE503 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE502 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE501 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE500 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE499 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE498 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE497 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE496 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE495 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE494 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE493 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE492 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE491 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE490 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE489 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE488 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE487 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE486 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE485 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE484 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE483 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE482 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE481 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE480 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x33C++0x03
|
|
hide.long 0x00 "ACTIVE15,Active Bit Register 15"
|
|
endif
|
|
tree.end
|
|
width 13.
|
|
tree "Interrupt Target Non-Secure Registers"
|
|
group.long 0x380++0x03
|
|
line.long 0x00 "NVIC_ITNS0,Interrupt Target Non-Secure Register 0"
|
|
bitfld.long 0x00 31. " ITNS31 ,Interrupt Targets Non-secure 31" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS30 ,Interrupt Targets Non-secure 30" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS29 ,Interrupt Targets Non-secure 29" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS28 ,Interrupt Targets Non-secure 28" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS27 ,Interrupt Targets Non-secure 27" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS26 ,Interrupt Targets Non-secure 26" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS25 ,Interrupt Targets Non-secure 25" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS24 ,Interrupt Targets Non-secure 24" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS23 ,Interrupt Targets Non-secure 23" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS22 ,Interrupt Targets Non-secure 22" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS21 ,Interrupt Targets Non-secure 21" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS20 ,Interrupt Targets Non-secure 20" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS19 ,Interrupt Targets Non-secure 19" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS18 ,Interrupt Targets Non-secure 18" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS17 ,Interrupt Targets Non-secure 17" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS16 ,Interrupt Targets Non-secure 16" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS15 ,Interrupt Targets Non-secure 15" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS14 ,Interrupt Targets Non-secure 14" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS13 ,Interrupt Targets Non-secure 13" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS12 ,Interrupt Targets Non-secure 12" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS11 ,Interrupt Targets Non-secure 11" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS10 ,Interrupt Targets Non-secure 10" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS9 ,Interrupt Targets Non-secure 9" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS8 ,Interrupt Targets Non-secure 8" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS7 ,Interrupt Targets Non-secure 7" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS6 ,Interrupt Targets Non-secure 6" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS5 ,Interrupt Targets Non-secure 5" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS4 ,Interrupt Targets Non-secure 4" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS3 ,Interrupt Targets Non-secure 3" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS2 ,Interrupt Targets Non-secure 2" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS1 ,Interrupt Targets Non-secure 1" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS0 ,Interrupt Targets Non-secure 0" "Secure,Non-secure"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
|
|
group.long 0x384++0x03
|
|
line.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1"
|
|
bitfld.long 0x00 31. " ITNS63 ,Interrupt Targets Non-secure 63" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS62 ,Interrupt Targets Non-secure 62" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS61 ,Interrupt Targets Non-secure 61" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS60 ,Interrupt Targets Non-secure 60" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS59 ,Interrupt Targets Non-secure 59" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS58 ,Interrupt Targets Non-secure 58" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS57 ,Interrupt Targets Non-secure 57" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS56 ,Interrupt Targets Non-secure 56" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS55 ,Interrupt Targets Non-secure 55" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS54 ,Interrupt Targets Non-secure 54" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS53 ,Interrupt Targets Non-secure 53" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS52 ,Interrupt Targets Non-secure 52" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS51 ,Interrupt Targets Non-secure 51" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS50 ,Interrupt Targets Non-secure 50" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS49 ,Interrupt Targets Non-secure 49" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS48 ,Interrupt Targets Non-secure 48" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS47 ,Interrupt Targets Non-secure 47" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS46 ,Interrupt Targets Non-secure 46" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS45 ,Interrupt Targets Non-secure 45" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS44 ,Interrupt Targets Non-secure 44" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS43 ,Interrupt Targets Non-secure 43" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS42 ,Interrupt Targets Non-secure 42" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS41 ,Interrupt Targets Non-secure 41" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS40 ,Interrupt Targets Non-secure 40" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS39 ,Interrupt Targets Non-secure 39" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS38 ,Interrupt Targets Non-secure 38" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS37 ,Interrupt Targets Non-secure 37" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS36 ,Interrupt Targets Non-secure 36" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS35 ,Interrupt Targets Non-secure 35" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS34 ,Interrupt Targets Non-secure 34" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS33 ,Interrupt Targets Non-secure 33" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS32 ,Interrupt Targets Non-secure 32" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x384++0x03
|
|
hide.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
|
|
group.long 0x388++0x03
|
|
line.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2"
|
|
bitfld.long 0x00 31. " ITNS95 ,Interrupt Targets Non-secure 95" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS94 ,Interrupt Targets Non-secure 94" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS93 ,Interrupt Targets Non-secure 93" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS92 ,Interrupt Targets Non-secure 92" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS91 ,Interrupt Targets Non-secure 91" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS90 ,Interrupt Targets Non-secure 90" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS89 ,Interrupt Targets Non-secure 89" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS88 ,Interrupt Targets Non-secure 88" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS87 ,Interrupt Targets Non-secure 87" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS86 ,Interrupt Targets Non-secure 86" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS85 ,Interrupt Targets Non-secure 85" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS84 ,Interrupt Targets Non-secure 84" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS83 ,Interrupt Targets Non-secure 83" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS82 ,Interrupt Targets Non-secure 82" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS81 ,Interrupt Targets Non-secure 81" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS80 ,Interrupt Targets Non-secure 80" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS79 ,Interrupt Targets Non-secure 79" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS78 ,Interrupt Targets Non-secure 78" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS77 ,Interrupt Targets Non-secure 77" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS76 ,Interrupt Targets Non-secure 76" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS75 ,Interrupt Targets Non-secure 75" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS74 ,Interrupt Targets Non-secure 74" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS73 ,Interrupt Targets Non-secure 73" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS72 ,Interrupt Targets Non-secure 72" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS71 ,Interrupt Targets Non-secure 71" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS70 ,Interrupt Targets Non-secure 70" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS69 ,Interrupt Targets Non-secure 69" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS68 ,Interrupt Targets Non-secure 68" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS67 ,Interrupt Targets Non-secure 67" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS66 ,Interrupt Targets Non-secure 66" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS65 ,Interrupt Targets Non-secure 65" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS64 ,Interrupt Targets Non-secure 64" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x388++0x03
|
|
hide.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
|
|
group.long 0x38C++0x03
|
|
line.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3"
|
|
bitfld.long 0x00 31. " ITNS127 ,Interrupt Targets Non-secure 127" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS126 ,Interrupt Targets Non-secure 126" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS125 ,Interrupt Targets Non-secure 125" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS124 ,Interrupt Targets Non-secure 124" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS123 ,Interrupt Targets Non-secure 123" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS122 ,Interrupt Targets Non-secure 122" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS121 ,Interrupt Targets Non-secure 121" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS120 ,Interrupt Targets Non-secure 120" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS119 ,Interrupt Targets Non-secure 119" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS118 ,Interrupt Targets Non-secure 118" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS117 ,Interrupt Targets Non-secure 117" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS116 ,Interrupt Targets Non-secure 116" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS115 ,Interrupt Targets Non-secure 115" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS114 ,Interrupt Targets Non-secure 114" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS113 ,Interrupt Targets Non-secure 113" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS112 ,Interrupt Targets Non-secure 112" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS111 ,Interrupt Targets Non-secure 111" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS110 ,Interrupt Targets Non-secure 110" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS109 ,Interrupt Targets Non-secure 109" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS108 ,Interrupt Targets Non-secure 108" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS107 ,Interrupt Targets Non-secure 107" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS106 ,Interrupt Targets Non-secure 106" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS105 ,Interrupt Targets Non-secure 105" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS104 ,Interrupt Targets Non-secure 104" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS103 ,Interrupt Targets Non-secure 103" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS102 ,Interrupt Targets Non-secure 102" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS101 ,Interrupt Targets Non-secure 101" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS100 ,Interrupt Targets Non-secure 100" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS99 ,Interrupt Targets Non-secure 99" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS98 ,Interrupt Targets Non-secure 98" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS97 ,Interrupt Targets Non-secure 97" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS96 ,Interrupt Targets Non-secure 96" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x38C++0x03
|
|
hide.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
|
|
group.long 0x390++0x03
|
|
line.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4"
|
|
bitfld.long 0x00 31. " ITNS159 ,Interrupt Targets Non-secure 159" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS158 ,Interrupt Targets Non-secure 158" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS157 ,Interrupt Targets Non-secure 157" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS156 ,Interrupt Targets Non-secure 156" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS155 ,Interrupt Targets Non-secure 155" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS154 ,Interrupt Targets Non-secure 154" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS153 ,Interrupt Targets Non-secure 153" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS152 ,Interrupt Targets Non-secure 152" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS151 ,Interrupt Targets Non-secure 151" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS150 ,Interrupt Targets Non-secure 150" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS149 ,Interrupt Targets Non-secure 149" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS148 ,Interrupt Targets Non-secure 148" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS147 ,Interrupt Targets Non-secure 147" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS146 ,Interrupt Targets Non-secure 146" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS145 ,Interrupt Targets Non-secure 145" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS144 ,Interrupt Targets Non-secure 144" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS143 ,Interrupt Targets Non-secure 143" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS142 ,Interrupt Targets Non-secure 142" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS141 ,Interrupt Targets Non-secure 141" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS140 ,Interrupt Targets Non-secure 140" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS139 ,Interrupt Targets Non-secure 139" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS138 ,Interrupt Targets Non-secure 138" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS137 ,Interrupt Targets Non-secure 137" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS136 ,Interrupt Targets Non-secure 136" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS135 ,Interrupt Targets Non-secure 135" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS134 ,Interrupt Targets Non-secure 134" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS133 ,Interrupt Targets Non-secure 133" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS132 ,Interrupt Targets Non-secure 132" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS131 ,Interrupt Targets Non-secure 131" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS130 ,Interrupt Targets Non-secure 130" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS129 ,Interrupt Targets Non-secure 129" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS128 ,Interrupt Targets Non-secure 128" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x390++0x03
|
|
hide.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
|
|
group.long 0x394++0x03
|
|
line.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5"
|
|
bitfld.long 0x00 31. " ITNS191 ,Interrupt Targets Non-secure 191" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS190 ,Interrupt Targets Non-secure 190" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS189 ,Interrupt Targets Non-secure 189" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS188 ,Interrupt Targets Non-secure 188" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS187 ,Interrupt Targets Non-secure 187" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS186 ,Interrupt Targets Non-secure 186" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS185 ,Interrupt Targets Non-secure 185" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS184 ,Interrupt Targets Non-secure 184" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS183 ,Interrupt Targets Non-secure 183" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS182 ,Interrupt Targets Non-secure 182" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS181 ,Interrupt Targets Non-secure 181" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS180 ,Interrupt Targets Non-secure 180" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS179 ,Interrupt Targets Non-secure 179" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS178 ,Interrupt Targets Non-secure 178" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS177 ,Interrupt Targets Non-secure 177" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS176 ,Interrupt Targets Non-secure 176" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS175 ,Interrupt Targets Non-secure 175" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS174 ,Interrupt Targets Non-secure 174" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS173 ,Interrupt Targets Non-secure 173" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS172 ,Interrupt Targets Non-secure 172" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS171 ,Interrupt Targets Non-secure 171" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS170 ,Interrupt Targets Non-secure 170" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS169 ,Interrupt Targets Non-secure 169" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS168 ,Interrupt Targets Non-secure 168" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS167 ,Interrupt Targets Non-secure 167" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS166 ,Interrupt Targets Non-secure 166" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS165 ,Interrupt Targets Non-secure 165" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS164 ,Interrupt Targets Non-secure 164" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS163 ,Interrupt Targets Non-secure 163" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS162 ,Interrupt Targets Non-secure 162" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS161 ,Interrupt Targets Non-secure 161" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS160 ,Interrupt Targets Non-secure 160" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x394++0x03
|
|
hide.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
|
|
group.long 0x398++0x03
|
|
line.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6"
|
|
bitfld.long 0x00 31. " ITNS223 ,Interrupt Targets Non-secure 223" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS222 ,Interrupt Targets Non-secure 222" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS221 ,Interrupt Targets Non-secure 221" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS220 ,Interrupt Targets Non-secure 220" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS219 ,Interrupt Targets Non-secure 219" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS218 ,Interrupt Targets Non-secure 218" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS217 ,Interrupt Targets Non-secure 217" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS216 ,Interrupt Targets Non-secure 216" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS215 ,Interrupt Targets Non-secure 215" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS214 ,Interrupt Targets Non-secure 214" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS213 ,Interrupt Targets Non-secure 213" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS212 ,Interrupt Targets Non-secure 212" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS211 ,Interrupt Targets Non-secure 211" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS210 ,Interrupt Targets Non-secure 210" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS209 ,Interrupt Targets Non-secure 209" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS208 ,Interrupt Targets Non-secure 208" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS207 ,Interrupt Targets Non-secure 207" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS206 ,Interrupt Targets Non-secure 206" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS205 ,Interrupt Targets Non-secure 205" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS204 ,Interrupt Targets Non-secure 204" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS203 ,Interrupt Targets Non-secure 203" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS202 ,Interrupt Targets Non-secure 202" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS201 ,Interrupt Targets Non-secure 201" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS200 ,Interrupt Targets Non-secure 200" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS199 ,Interrupt Targets Non-secure 199" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS198 ,Interrupt Targets Non-secure 198" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS197 ,Interrupt Targets Non-secure 197" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS196 ,Interrupt Targets Non-secure 196" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS195 ,Interrupt Targets Non-secure 195" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS194 ,Interrupt Targets Non-secure 194" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS193 ,Interrupt Targets Non-secure 193" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS192 ,Interrupt Targets Non-secure 192" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x398++0x03
|
|
hide.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
|
|
group.long 0x39C++0x03
|
|
line.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7"
|
|
bitfld.long 0x00 31. " ITNS255 ,Interrupt Targets Non-secure 255" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS254 ,Interrupt Targets Non-secure 254" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS253 ,Interrupt Targets Non-secure 253" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS252 ,Interrupt Targets Non-secure 252" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS251 ,Interrupt Targets Non-secure 251" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS250 ,Interrupt Targets Non-secure 250" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS249 ,Interrupt Targets Non-secure 249" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS248 ,Interrupt Targets Non-secure 248" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS247 ,Interrupt Targets Non-secure 247" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS246 ,Interrupt Targets Non-secure 246" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS245 ,Interrupt Targets Non-secure 245" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS244 ,Interrupt Targets Non-secure 244" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS243 ,Interrupt Targets Non-secure 243" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS242 ,Interrupt Targets Non-secure 242" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS241 ,Interrupt Targets Non-secure 241" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS240 ,Interrupt Targets Non-secure 240" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS239 ,Interrupt Targets Non-secure 239" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS238 ,Interrupt Targets Non-secure 238" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS237 ,Interrupt Targets Non-secure 237" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS236 ,Interrupt Targets Non-secure 236" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS235 ,Interrupt Targets Non-secure 235" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS234 ,Interrupt Targets Non-secure 234" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS233 ,Interrupt Targets Non-secure 233" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS232 ,Interrupt Targets Non-secure 232" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS231 ,Interrupt Targets Non-secure 231" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS230 ,Interrupt Targets Non-secure 230" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS229 ,Interrupt Targets Non-secure 229" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS228 ,Interrupt Targets Non-secure 228" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS227 ,Interrupt Targets Non-secure 227" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS226 ,Interrupt Targets Non-secure 226" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS225 ,Interrupt Targets Non-secure 225" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS224 ,Interrupt Targets Non-secure 224" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x39C++0x03
|
|
hide.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
|
|
group.long 0x3A0++0x03
|
|
line.long 0x00 "NVIC_ITNS8,Interrupt Target Non-Secure Register 8"
|
|
bitfld.long 0x00 31. " ITNS287 ,Interrupt Targets Non-secure 287" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS286 ,Interrupt Targets Non-secure 286" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS285 ,Interrupt Targets Non-secure 285" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS284 ,Interrupt Targets Non-secure 284" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS283 ,Interrupt Targets Non-secure 283" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS282 ,Interrupt Targets Non-secure 282" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS281 ,Interrupt Targets Non-secure 281" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS280 ,Interrupt Targets Non-secure 280" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS279 ,Interrupt Targets Non-secure 279" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS278 ,Interrupt Targets Non-secure 278" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS277 ,Interrupt Targets Non-secure 277" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS276 ,Interrupt Targets Non-secure 276" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS275 ,Interrupt Targets Non-secure 275" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS274 ,Interrupt Targets Non-secure 274" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS273 ,Interrupt Targets Non-secure 273" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS272 ,Interrupt Targets Non-secure 272" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS271 ,Interrupt Targets Non-secure 271" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS270 ,Interrupt Targets Non-secure 270" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS269 ,Interrupt Targets Non-secure 269" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS268 ,Interrupt Targets Non-secure 268" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS267 ,Interrupt Targets Non-secure 267" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS266 ,Interrupt Targets Non-secure 266" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS265 ,Interrupt Targets Non-secure 265" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS264 ,Interrupt Targets Non-secure 264" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS263 ,Interrupt Targets Non-secure 263" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS262 ,Interrupt Targets Non-secure 262" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS261 ,Interrupt Targets Non-secure 261" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS260 ,Interrupt Targets Non-secure 260" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS259 ,Interrupt Targets Non-secure 259" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS258 ,Interrupt Targets Non-secure 258" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS257 ,Interrupt Targets Non-secure 257" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS256 ,Interrupt Targets Non-secure 256" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x3A0++0x03
|
|
hide.long 0x00 "NVIC_ITNS8,Interrupt Target Non-Secure Register 8"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
|
|
group.long 0x3A4++0x03
|
|
line.long 0x00 "NVIC_ITNS9,Interrupt Target Non-Secure Register 9"
|
|
bitfld.long 0x00 31. " ITNS319 ,Interrupt Targets Non-secure 319" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS318 ,Interrupt Targets Non-secure 318" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS317 ,Interrupt Targets Non-secure 317" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS316 ,Interrupt Targets Non-secure 316" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS315 ,Interrupt Targets Non-secure 315" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS314 ,Interrupt Targets Non-secure 314" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS313 ,Interrupt Targets Non-secure 313" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS312 ,Interrupt Targets Non-secure 312" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS311 ,Interrupt Targets Non-secure 311" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS310 ,Interrupt Targets Non-secure 310" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS309 ,Interrupt Targets Non-secure 309" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS308 ,Interrupt Targets Non-secure 308" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS307 ,Interrupt Targets Non-secure 307" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS306 ,Interrupt Targets Non-secure 306" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS305 ,Interrupt Targets Non-secure 305" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS304 ,Interrupt Targets Non-secure 304" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS303 ,Interrupt Targets Non-secure 303" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS302 ,Interrupt Targets Non-secure 302" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS301 ,Interrupt Targets Non-secure 301" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS300 ,Interrupt Targets Non-secure 300" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS299 ,Interrupt Targets Non-secure 299" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS298 ,Interrupt Targets Non-secure 298" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS297 ,Interrupt Targets Non-secure 297" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS296 ,Interrupt Targets Non-secure 296" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS295 ,Interrupt Targets Non-secure 295" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS294 ,Interrupt Targets Non-secure 294" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS293 ,Interrupt Targets Non-secure 293" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS292 ,Interrupt Targets Non-secure 292" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS291 ,Interrupt Targets Non-secure 291" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS290 ,Interrupt Targets Non-secure 290" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS289 ,Interrupt Targets Non-secure 289" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS288 ,Interrupt Targets Non-secure 288" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x3A4++0x03
|
|
hide.long 0x00 "NVIC_ITNS9,Interrupt Target Non-Secure Register 9"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
|
|
group.long 0x3A8++0x03
|
|
line.long 0x00 "NVIC_ITNS10,Interrupt Target Non-Secure Register 10"
|
|
bitfld.long 0x00 31. " ITNS351 ,Interrupt Targets Non-secure 351" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS350 ,Interrupt Targets Non-secure 350" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS349 ,Interrupt Targets Non-secure 349" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS348 ,Interrupt Targets Non-secure 348" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS347 ,Interrupt Targets Non-secure 347" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS346 ,Interrupt Targets Non-secure 346" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS345 ,Interrupt Targets Non-secure 345" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS344 ,Interrupt Targets Non-secure 344" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS343 ,Interrupt Targets Non-secure 343" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS342 ,Interrupt Targets Non-secure 342" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS341 ,Interrupt Targets Non-secure 341" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS340 ,Interrupt Targets Non-secure 340" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS339 ,Interrupt Targets Non-secure 339" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS338 ,Interrupt Targets Non-secure 338" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS337 ,Interrupt Targets Non-secure 337" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS336 ,Interrupt Targets Non-secure 336" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS335 ,Interrupt Targets Non-secure 335" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS334 ,Interrupt Targets Non-secure 334" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS333 ,Interrupt Targets Non-secure 333" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS332 ,Interrupt Targets Non-secure 332" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS331 ,Interrupt Targets Non-secure 331" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS330 ,Interrupt Targets Non-secure 330" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS329 ,Interrupt Targets Non-secure 329" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS328 ,Interrupt Targets Non-secure 328" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS327 ,Interrupt Targets Non-secure 327" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS326 ,Interrupt Targets Non-secure 326" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS325 ,Interrupt Targets Non-secure 325" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS324 ,Interrupt Targets Non-secure 324" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS323 ,Interrupt Targets Non-secure 323" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS322 ,Interrupt Targets Non-secure 322" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS321 ,Interrupt Targets Non-secure 321" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS320 ,Interrupt Targets Non-secure 320" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x3A8++0x03
|
|
hide.long 0x00 "NVIC_ITNS10,Interrupt Target Non-Secure Register 10"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
|
|
group.long 0x3AC++0x03
|
|
line.long 0x00 "NVIC_ITNS11,Interrupt Target Non-Secure Register 11"
|
|
bitfld.long 0x00 31. " ITNS383 ,Interrupt Targets Non-secure 383" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS382 ,Interrupt Targets Non-secure 382" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS381 ,Interrupt Targets Non-secure 381" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS380 ,Interrupt Targets Non-secure 380" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS379 ,Interrupt Targets Non-secure 379" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS378 ,Interrupt Targets Non-secure 378" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS377 ,Interrupt Targets Non-secure 377" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS376 ,Interrupt Targets Non-secure 376" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS375 ,Interrupt Targets Non-secure 375" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS374 ,Interrupt Targets Non-secure 374" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS373 ,Interrupt Targets Non-secure 373" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS372 ,Interrupt Targets Non-secure 372" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS371 ,Interrupt Targets Non-secure 371" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS370 ,Interrupt Targets Non-secure 370" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS369 ,Interrupt Targets Non-secure 369" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS368 ,Interrupt Targets Non-secure 368" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS367 ,Interrupt Targets Non-secure 367" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS366 ,Interrupt Targets Non-secure 366" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS365 ,Interrupt Targets Non-secure 365" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS364 ,Interrupt Targets Non-secure 364" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS363 ,Interrupt Targets Non-secure 363" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS362 ,Interrupt Targets Non-secure 362" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS361 ,Interrupt Targets Non-secure 361" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS360 ,Interrupt Targets Non-secure 360" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS359 ,Interrupt Targets Non-secure 359" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS358 ,Interrupt Targets Non-secure 358" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS357 ,Interrupt Targets Non-secure 357" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS356 ,Interrupt Targets Non-secure 356" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS355 ,Interrupt Targets Non-secure 355" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS354 ,Interrupt Targets Non-secure 354" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS353 ,Interrupt Targets Non-secure 353" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS352 ,Interrupt Targets Non-secure 352" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x3AC++0x03
|
|
hide.long 0x00 "NVIC_ITNS11,Interrupt Target Non-Secure Register 11"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
|
|
group.long 0x3B0++0x03
|
|
line.long 0x00 "NVIC_ITNS12,Interrupt Target Non-Secure Register 12"
|
|
bitfld.long 0x00 31. " ITNS415 ,Interrupt Targets Non-secure 415" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS414 ,Interrupt Targets Non-secure 414" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS413 ,Interrupt Targets Non-secure 413" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS412 ,Interrupt Targets Non-secure 412" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS411 ,Interrupt Targets Non-secure 411" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS410 ,Interrupt Targets Non-secure 410" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS409 ,Interrupt Targets Non-secure 409" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS408 ,Interrupt Targets Non-secure 408" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS407 ,Interrupt Targets Non-secure 407" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS406 ,Interrupt Targets Non-secure 406" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS405 ,Interrupt Targets Non-secure 405" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS404 ,Interrupt Targets Non-secure 404" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS403 ,Interrupt Targets Non-secure 403" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS402 ,Interrupt Targets Non-secure 402" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS401 ,Interrupt Targets Non-secure 401" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS400 ,Interrupt Targets Non-secure 400" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS399 ,Interrupt Targets Non-secure 399" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS398 ,Interrupt Targets Non-secure 398" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS397 ,Interrupt Targets Non-secure 397" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS396 ,Interrupt Targets Non-secure 396" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS395 ,Interrupt Targets Non-secure 395" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS394 ,Interrupt Targets Non-secure 394" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS393 ,Interrupt Targets Non-secure 393" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS392 ,Interrupt Targets Non-secure 392" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS391 ,Interrupt Targets Non-secure 391" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS390 ,Interrupt Targets Non-secure 390" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS389 ,Interrupt Targets Non-secure 389" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS388 ,Interrupt Targets Non-secure 388" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS387 ,Interrupt Targets Non-secure 387" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS386 ,Interrupt Targets Non-secure 386" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS385 ,Interrupt Targets Non-secure 385" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS384 ,Interrupt Targets Non-secure 384" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x3B0++0x03
|
|
hide.long 0x00 "NVIC_ITNS12,Interrupt Target Non-Secure Register 12"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
|
|
group.long 0x3B4++0x03
|
|
line.long 0x00 "NVIC_ITNS13,Interrupt Target Non-Secure Register 13"
|
|
bitfld.long 0x00 31. " ITNS447 ,Interrupt Targets Non-secure 447" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS446 ,Interrupt Targets Non-secure 446" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS445 ,Interrupt Targets Non-secure 445" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS444 ,Interrupt Targets Non-secure 444" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS443 ,Interrupt Targets Non-secure 443" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS442 ,Interrupt Targets Non-secure 442" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS441 ,Interrupt Targets Non-secure 441" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS440 ,Interrupt Targets Non-secure 440" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS439 ,Interrupt Targets Non-secure 439" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS438 ,Interrupt Targets Non-secure 438" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS437 ,Interrupt Targets Non-secure 437" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS436 ,Interrupt Targets Non-secure 436" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS435 ,Interrupt Targets Non-secure 435" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS434 ,Interrupt Targets Non-secure 434" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS433 ,Interrupt Targets Non-secure 433" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS432 ,Interrupt Targets Non-secure 432" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS431 ,Interrupt Targets Non-secure 431" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS430 ,Interrupt Targets Non-secure 430" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS429 ,Interrupt Targets Non-secure 429" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS428 ,Interrupt Targets Non-secure 428" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS427 ,Interrupt Targets Non-secure 427" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS426 ,Interrupt Targets Non-secure 426" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS425 ,Interrupt Targets Non-secure 425" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS424 ,Interrupt Targets Non-secure 424" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS423 ,Interrupt Targets Non-secure 423" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS422 ,Interrupt Targets Non-secure 422" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS421 ,Interrupt Targets Non-secure 421" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS420 ,Interrupt Targets Non-secure 420" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS419 ,Interrupt Targets Non-secure 419" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS418 ,Interrupt Targets Non-secure 418" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS417 ,Interrupt Targets Non-secure 417" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS416 ,Interrupt Targets Non-secure 416" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x3B4++0x03
|
|
hide.long 0x00 "NVIC_ITNS13,Interrupt Target Non-Secure Register 13"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
|
|
group.long 0x3B8++0x03
|
|
line.long 0x00 "NVIC_ITNS14,Interrupt Target Non-Secure Register 14"
|
|
bitfld.long 0x00 31. " ITNS479 ,Interrupt Targets Non-secure 479" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS478 ,Interrupt Targets Non-secure 478" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS477 ,Interrupt Targets Non-secure 477" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS476 ,Interrupt Targets Non-secure 476" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS475 ,Interrupt Targets Non-secure 475" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS474 ,Interrupt Targets Non-secure 474" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS473 ,Interrupt Targets Non-secure 473" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS472 ,Interrupt Targets Non-secure 472" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS471 ,Interrupt Targets Non-secure 471" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS470 ,Interrupt Targets Non-secure 470" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS469 ,Interrupt Targets Non-secure 469" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS468 ,Interrupt Targets Non-secure 468" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS467 ,Interrupt Targets Non-secure 467" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS466 ,Interrupt Targets Non-secure 466" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS465 ,Interrupt Targets Non-secure 465" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS464 ,Interrupt Targets Non-secure 464" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS463 ,Interrupt Targets Non-secure 463" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS462 ,Interrupt Targets Non-secure 462" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS461 ,Interrupt Targets Non-secure 461" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS460 ,Interrupt Targets Non-secure 460" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS459 ,Interrupt Targets Non-secure 459" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS458 ,Interrupt Targets Non-secure 458" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS457 ,Interrupt Targets Non-secure 457" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS456 ,Interrupt Targets Non-secure 456" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS455 ,Interrupt Targets Non-secure 455" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS454 ,Interrupt Targets Non-secure 454" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS453 ,Interrupt Targets Non-secure 453" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS452 ,Interrupt Targets Non-secure 452" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS451 ,Interrupt Targets Non-secure 451" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS450 ,Interrupt Targets Non-secure 450" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS449 ,Interrupt Targets Non-secure 449" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS448 ,Interrupt Targets Non-secure 448" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x3B8++0x03
|
|
hide.long 0x00 "NVIC_ITNS14,Interrupt Target Non-Secure Register 14"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x0F)
|
|
group.long 0x3BC++0x03
|
|
line.long 0x00 "NVIC_ITNS15,Interrupt Target Non-Secure Register 15"
|
|
bitfld.long 0x00 31. " ITNS511 ,Interrupt Targets Non-secure 511" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " ITNS510 ,Interrupt Targets Non-secure 510" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " ITNS509 ,Interrupt Targets Non-secure 509" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITNS508 ,Interrupt Targets Non-secure 508" "Secure,Non-secure"
|
|
bitfld.long 0x00 27. " ITNS507 ,Interrupt Targets Non-secure 507" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " ITNS506 ,Interrupt Targets Non-secure 506" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITNS505 ,Interrupt Targets Non-secure 505" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " ITNS504 ,Interrupt Targets Non-secure 504" "Secure,Non-secure"
|
|
bitfld.long 0x00 23. " ITNS503 ,Interrupt Targets Non-secure 503" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITNS502 ,Interrupt Targets Non-secure 502" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " ITNS501 ,Interrupt Targets Non-secure 501" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " ITNS500 ,Interrupt Targets Non-secure 500" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITNS499 ,Interrupt Targets Non-secure 499" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " ITNS498 ,Interrupt Targets Non-secure 498" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " ITNS497 ,Interrupt Targets Non-secure 497" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITNS496 ,Interrupt Targets Non-secure 496" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " ITNS495 ,Interrupt Targets Non-secure 495" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " ITNS494 ,Interrupt Targets Non-secure 494" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITNS493 ,Interrupt Targets Non-secure 493" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " ITNS492 ,Interrupt Targets Non-secure 492" "Secure,Non-secure"
|
|
bitfld.long 0x00 11. " ITNS491 ,Interrupt Targets Non-secure 491" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITNS490 ,Interrupt Targets Non-secure 490" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " ITNS489 ,Interrupt Targets Non-secure 489" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " ITNS488 ,Interrupt Targets Non-secure 488" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITNS487 ,Interrupt Targets Non-secure 487" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " ITNS486 ,Interrupt Targets Non-secure 486" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " ITNS485 ,Interrupt Targets Non-secure 485" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITNS484 ,Interrupt Targets Non-secure 484" "Secure,Non-secure"
|
|
bitfld.long 0x00 3. " ITNS483 ,Interrupt Targets Non-secure 483" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " ITNS482 ,Interrupt Targets Non-secure 482" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITNS481 ,Interrupt Targets Non-secure 481" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " ITNS480 ,Interrupt Targets Non-secure 480" "Secure,Non-secure"
|
|
else
|
|
hgroup.long 0x3BC++0x03
|
|
hide.long 0x00 "NVIC_ITNS15,Interrupt Target Non-Secure Register 15"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
group.long 0x400++0x1F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
|
|
group.long 0x420++0x1F
|
|
line.long 0x0 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x4 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x8 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0xC "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x10 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x14 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x18 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x1C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
else
|
|
hgroup.long 0x420++0x1F
|
|
hide.long 0x0 "IPR8,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR9,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR10,Interrupt Priority Register"
|
|
hide.long 0xC "IPR11,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR12,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR13,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR14,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR15,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
|
|
group.long 0x440++0x1F
|
|
line.long 0x0 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x4 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x8 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0xC "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x10 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x14 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x18 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x1C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
else
|
|
hgroup.long 0x440++0x1F
|
|
hide.long 0x0 "IPR16,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR17,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR18,Interrupt Priority Register"
|
|
hide.long 0xC "IPR19,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR20,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR21,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR22,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR23,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
|
|
group.long 0x460++0x1F
|
|
line.long 0x0 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x4 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x8 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0xC "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x10 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x14 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x18 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x1C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
else
|
|
hgroup.long 0x460++0x1F
|
|
hide.long 0x0 "IPR24,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR25,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR26,Interrupt Priority Register"
|
|
hide.long 0xC "IPR27,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR28,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR29,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR30,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR31,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
|
|
group.long 0x480++0x1F
|
|
line.long 0x0 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x4 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x8 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0xC "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x10 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x14 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x18 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x1C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
else
|
|
hgroup.long 0x480++0x1F
|
|
hide.long 0x0 "IPR32,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR33,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR34,Interrupt Priority Register"
|
|
hide.long 0xC "IPR35,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR36,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR37,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR38,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR39,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
|
|
group.long 0x4A0++0x1F
|
|
line.long 0x0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0x4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0x8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0x10 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0x14 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0x18 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0x1C "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
else
|
|
hgroup.long 0x4A0++0x1F
|
|
hide.long 0x0 "IPR40,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR41,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR42,Interrupt Priority Register"
|
|
hide.long 0xC "IPR43,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR44,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR45,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR46,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR47,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
|
|
group.long 0x4C0++0x1F
|
|
line.long 0x0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0x4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0x8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0x10 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0x14 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0x18 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0x1C "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
else
|
|
hgroup.long 0x4C0++0x1F
|
|
hide.long 0x0 "IPR48,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR49,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR50,Interrupt Priority Register"
|
|
hide.long 0xC "IPR51,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR52,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR53,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR54,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR55,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
|
|
group.long 0x4E0++0x1F
|
|
line.long 0x0 "IPR56,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
|
|
line.long 0x4 "IPR57,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
|
|
line.long 0x8 "IPR58,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
|
|
line.long 0xC "IPR59,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
|
|
line.long 0x10 "IPR60,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_243 ,Interrupt 243 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_242 ,Interrupt 242 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_241 ,Interrupt 241 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_240 ,Interrupt 240 Priority"
|
|
line.long 0x14 "IPR61,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_247 ,Interrupt 247 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_246 ,Interrupt 246 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_245 ,Interrupt 245 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_244 ,Interrupt 244 Priority"
|
|
line.long 0x18 "IPR62,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_251 ,Interrupt 251 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_250 ,Interrupt 250 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_249 ,Interrupt 249 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_248 ,Interrupt 248 Priority"
|
|
line.long 0x1C "IPR63,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_255 ,Interrupt 255 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_254 ,Interrupt 254 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_253 ,Interrupt 253 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_252 ,Interrupt 252 Priority"
|
|
else
|
|
hgroup.long 0x4E0++0x1F
|
|
hide.long 0x0 "IPR56,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR57,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR58,Interrupt Priority Register"
|
|
hide.long 0xC "IPR59,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR60,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR61,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR62,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR63,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
|
|
group.long 0x500++0x1F
|
|
line.long 0x0 "IPR64,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_259 ,Interrupt 259 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_258 ,Interrupt 258 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_257 ,Interrupt 257 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_256 ,Interrupt 256 Priority"
|
|
line.long 0x4 "IPR65,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_263 ,Interrupt 263 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_262 ,Interrupt 262 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_261 ,Interrupt 261 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_260 ,Interrupt 260 Priority"
|
|
line.long 0x8 "IPR66,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_267 ,Interrupt 267 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_266 ,Interrupt 266 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_265 ,Interrupt 265 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_264 ,Interrupt 264 Priority"
|
|
line.long 0xC "IPR67,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_271 ,Interrupt 271 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_270 ,Interrupt 270 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_269 ,Interrupt 269 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_268 ,Interrupt 268 Priority"
|
|
line.long 0x10 "IPR68,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_275 ,Interrupt 275 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_274 ,Interrupt 274 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_273 ,Interrupt 273 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_272 ,Interrupt 272 Priority"
|
|
line.long 0x14 "IPR69,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_279 ,Interrupt 279 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_278 ,Interrupt 278 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_277 ,Interrupt 277 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_276 ,Interrupt 276 Priority"
|
|
line.long 0x18 "IPR70,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_283 ,Interrupt 283 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_282 ,Interrupt 282 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_281 ,Interrupt 281 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_280 ,Interrupt 280 Priority"
|
|
line.long 0x1C "IPR71,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_287 ,Interrupt 287 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_286 ,Interrupt 286 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_285 ,Interrupt 285 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_284 ,Interrupt 284 Priority"
|
|
else
|
|
hgroup.long 0x500++0x1F
|
|
hide.long 0x0 "IPR64,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR65,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR66,Interrupt Priority Register"
|
|
hide.long 0xC "IPR67,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR68,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR69,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR70,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR71,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
|
|
group.long 0x520++0x1F
|
|
line.long 0x0 "IPR72,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_291 ,Interrupt 291 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_290 ,Interrupt 290 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_289 ,Interrupt 289 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_288 ,Interrupt 288 Priority"
|
|
line.long 0x4 "IPR73,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_295 ,Interrupt 295 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_294 ,Interrupt 294 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_293 ,Interrupt 293 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_292 ,Interrupt 292 Priority"
|
|
line.long 0x8 "IPR74,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_299 ,Interrupt 299 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_298 ,Interrupt 298 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_297 ,Interrupt 297 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_296 ,Interrupt 296 Priority"
|
|
line.long 0xC "IPR75,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_303 ,Interrupt 303 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_302 ,Interrupt 302 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_301 ,Interrupt 301 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_300 ,Interrupt 300 Priority"
|
|
line.long 0x10 "IPR76,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_307 ,Interrupt 307 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_306 ,Interrupt 306 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_305 ,Interrupt 305 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_304 ,Interrupt 304 Priority"
|
|
line.long 0x14 "IPR77,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_311 ,Interrupt 311 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_310 ,Interrupt 310 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_309 ,Interrupt 309 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_308 ,Interrupt 308 Priority"
|
|
line.long 0x18 "IPR78,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_315 ,Interrupt 315 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_314 ,Interrupt 314 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_313 ,Interrupt 313 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_312 ,Interrupt 312 Priority"
|
|
line.long 0x1C "IPR79,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_319 ,Interrupt 319 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_318 ,Interrupt 318 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_317 ,Interrupt 317 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_316 ,Interrupt 316 Priority"
|
|
else
|
|
hgroup.long 0x520++0x1F
|
|
hide.long 0x0 "IPR72,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR73,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR74,Interrupt Priority Register"
|
|
hide.long 0xC "IPR75,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR76,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR77,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR78,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR79,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
|
|
group.long 0x540++0x1F
|
|
line.long 0x0 "IPR80,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_323 ,Interrupt 323 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_322 ,Interrupt 322 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_321 ,Interrupt 321 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_320 ,Interrupt 320 Priority"
|
|
line.long 0x4 "IPR81,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_327 ,Interrupt 327 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_326 ,Interrupt 326 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_325 ,Interrupt 325 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_324 ,Interrupt 324 Priority"
|
|
line.long 0x8 "IPR82,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_331 ,Interrupt 331 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_330 ,Interrupt 330 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_329 ,Interrupt 329 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_328 ,Interrupt 328 Priority"
|
|
line.long 0xC "IPR83,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_335 ,Interrupt 335 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_334 ,Interrupt 334 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_333 ,Interrupt 333 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_332 ,Interrupt 332 Priority"
|
|
line.long 0x10 "IPR84,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_339 ,Interrupt 339 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_338 ,Interrupt 338 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_337 ,Interrupt 337 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_336 ,Interrupt 336 Priority"
|
|
line.long 0x14 "IPR85,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_343 ,Interrupt 343 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_342 ,Interrupt 342 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_341 ,Interrupt 341 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_340 ,Interrupt 340 Priority"
|
|
line.long 0x18 "IPR86,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_347 ,Interrupt 347 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_346 ,Interrupt 346 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_345 ,Interrupt 345 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_344 ,Interrupt 344 Priority"
|
|
line.long 0x1C "IPR87,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_351 ,Interrupt 351 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_350 ,Interrupt 350 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_349 ,Interrupt 349 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_348 ,Interrupt 348 Priority"
|
|
else
|
|
hgroup.long 0x540++0x1F
|
|
hide.long 0x0 "IPR80,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR81,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR82,Interrupt Priority Register"
|
|
hide.long 0xC "IPR83,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR84,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR85,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR86,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR87,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
|
|
group.long 0x560++0x1F
|
|
line.long 0x0 "IPR88,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_355 ,Interrupt 355 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_354 ,Interrupt 354 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_353 ,Interrupt 353 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_352 ,Interrupt 352 Priority"
|
|
line.long 0x4 "IPR89,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_359 ,Interrupt 359 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_358 ,Interrupt 358 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_357 ,Interrupt 357 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_356 ,Interrupt 356 Priority"
|
|
line.long 0x8 "IPR90,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_363 ,Interrupt 363 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_362 ,Interrupt 362 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_361 ,Interrupt 361 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_360 ,Interrupt 360 Priority"
|
|
line.long 0xC "IPR91,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_367 ,Interrupt 367 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_366 ,Interrupt 366 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_365 ,Interrupt 365 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_364 ,Interrupt 364 Priority"
|
|
line.long 0x10 "IPR92,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_371 ,Interrupt 371 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_370 ,Interrupt 370 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_369 ,Interrupt 369 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_368 ,Interrupt 368 Priority"
|
|
line.long 0x14 "IPR93,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_375 ,Interrupt 375 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_374 ,Interrupt 374 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_373 ,Interrupt 373 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_372 ,Interrupt 372 Priority"
|
|
line.long 0x18 "IPR94,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_379 ,Interrupt 379 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_378 ,Interrupt 378 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_377 ,Interrupt 377 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_376 ,Interrupt 376 Priority"
|
|
line.long 0x1C "IPR95,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_383 ,Interrupt 383 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_382 ,Interrupt 382 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_381 ,Interrupt 381 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_380 ,Interrupt 380 Priority"
|
|
else
|
|
hgroup.long 0x560++0x1F
|
|
hide.long 0x0 "IPR88,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR89,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR90,Interrupt Priority Register"
|
|
hide.long 0xC "IPR91,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR92,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR93,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR94,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR95,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
|
|
group.long 0x580++0x1F
|
|
line.long 0x0 "IPR96,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_387 ,Interrupt 387 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_386 ,Interrupt 386 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_385 ,Interrupt 385 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_384 ,Interrupt 384 Priority"
|
|
line.long 0x4 "IPR97,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_391 ,Interrupt 391 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_390 ,Interrupt 390 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_389 ,Interrupt 389 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_388 ,Interrupt 388 Priority"
|
|
line.long 0x8 "IPR98,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_395 ,Interrupt 395 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_394 ,Interrupt 394 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_393 ,Interrupt 393 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_392 ,Interrupt 392 Priority"
|
|
line.long 0xC "IPR99,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_399 ,Interrupt 399 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_398 ,Interrupt 398 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_397 ,Interrupt 397 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_396 ,Interrupt 396 Priority"
|
|
line.long 0x10 "IPR100,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_403 ,Interrupt 403 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_402 ,Interrupt 402 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_401 ,Interrupt 401 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_400 ,Interrupt 400 Priority"
|
|
line.long 0x14 "IPR101,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_407 ,Interrupt 407 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_406 ,Interrupt 406 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_405 ,Interrupt 405 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_404 ,Interrupt 404 Priority"
|
|
line.long 0x18 "IPR102,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_411 ,Interrupt 411 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_410 ,Interrupt 410 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_409 ,Interrupt 409 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_408 ,Interrupt 408 Priority"
|
|
line.long 0x1C "IPR103,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_415 ,Interrupt 415 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_414 ,Interrupt 414 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_413 ,Interrupt 413 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_412 ,Interrupt 412 Priority"
|
|
else
|
|
hgroup.long 0x580++0x1F
|
|
hide.long 0x0 "IPR96,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR97,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR98,Interrupt Priority Register"
|
|
hide.long 0xC "IPR99,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR100,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR101,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR102,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR103,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
|
|
group.long 0x5A0++0x1F
|
|
line.long 0x0 "IPR104,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_419 ,Interrupt 419 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_418 ,Interrupt 418 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_417 ,Interrupt 417 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_416 ,Interrupt 416 Priority"
|
|
line.long 0x4 "IPR105,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_423 ,Interrupt 423 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_422 ,Interrupt 422 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_421 ,Interrupt 421 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_420 ,Interrupt 420 Priority"
|
|
line.long 0x8 "IPR106,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_427 ,Interrupt 427 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_426 ,Interrupt 426 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_425 ,Interrupt 425 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_424 ,Interrupt 424 Priority"
|
|
line.long 0xC "IPR107,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_431 ,Interrupt 431 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_430 ,Interrupt 430 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_429 ,Interrupt 429 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_428 ,Interrupt 428 Priority"
|
|
line.long 0x10 "IPR108,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_435 ,Interrupt 435 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_434 ,Interrupt 434 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_433 ,Interrupt 433 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_432 ,Interrupt 432 Priority"
|
|
line.long 0x14 "IPR109,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_439 ,Interrupt 439 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_438 ,Interrupt 438 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_437 ,Interrupt 437 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_436 ,Interrupt 436 Priority"
|
|
line.long 0x18 "IPR110,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_443 ,Interrupt 443 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_442 ,Interrupt 442 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_441 ,Interrupt 441 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_440 ,Interrupt 440 Priority"
|
|
line.long 0x1C "IPR111,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_447 ,Interrupt 447 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_446 ,Interrupt 446 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_445 ,Interrupt 445 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_444 ,Interrupt 444 Priority"
|
|
else
|
|
hgroup.long 0x5A0++0x1F
|
|
hide.long 0x0 "IPR104,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR105,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR106,Interrupt Priority Register"
|
|
hide.long 0xC "IPR107,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR108,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR109,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR110,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR111,Interrupt Priority Register"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
|
|
group.long 0x5C0++0x1F
|
|
line.long 0x0 "IPR112,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_451 ,Interrupt 451 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_450 ,Interrupt 450 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_449 ,Interrupt 449 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_448 ,Interrupt 448 Priority"
|
|
line.long 0x4 "IPR113,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_455 ,Interrupt 455 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_454 ,Interrupt 454 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_453 ,Interrupt 453 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_452 ,Interrupt 452 Priority"
|
|
line.long 0x8 "IPR114,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_459 ,Interrupt 459 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_458 ,Interrupt 458 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_457 ,Interrupt 457 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_456 ,Interrupt 456 Priority"
|
|
line.long 0xC "IPR115,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_463 ,Interrupt 463 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_462 ,Interrupt 462 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_461 ,Interrupt 461 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_460 ,Interrupt 460 Priority"
|
|
line.long 0x10 "IPR116,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_467 ,Interrupt 467 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_466 ,Interrupt 466 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_465 ,Interrupt 465 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_464 ,Interrupt 464 Priority"
|
|
line.long 0x14 "IPR117,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_471 ,Interrupt 471 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_470 ,Interrupt 470 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_469 ,Interrupt 469 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_468 ,Interrupt 468 Priority"
|
|
line.long 0x18 "IPR118,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_475 ,Interrupt 475 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_474 ,Interrupt 474 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_473 ,Interrupt 473 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_472 ,Interrupt 472 Priority"
|
|
line.long 0x1C "IPR119,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_479 ,Interrupt 479 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_478 ,Interrupt 478 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_477 ,Interrupt 477 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_476 ,Interrupt 476 Priority"
|
|
else
|
|
hgroup.long 0x5C0++0x1F
|
|
hide.long 0x0 "IPR112,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR113,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR114,Interrupt Priority Register"
|
|
hide.long 0xC "IPR115,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR116,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR117,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR118,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR119,Interrupt Priority Register"
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
sif (CORENAME()=="CORTEXM33F")
|
|
tree "Floating-point Unit (FPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 8.
|
|
group.long 0xF34++0x0B
|
|
line.long 0x00 "FPCCR,Floating-Point Context Control Register"
|
|
bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " LSPENS ,This bit controls whether the LSPEN bit is writeable from the Non-secure state" "Writeable,Write ignored"
|
|
newline
|
|
bitfld.long 0x00 28. " CLRONRET ,Clear floating point caller saved registers on exception return" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " CLRONRETS ,Clear on return Secure only" "Both states,Secure only"
|
|
bitfld.long 0x00 26. " TS ,Treat as Secure" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 10. " UFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the UsageFault exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 9. " SPLIMVIOL ,Indicates whether the FP context violates the stack pointer limit that was active when lazy state preservation was activated" "Low,High"
|
|
bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able"
|
|
newline
|
|
bitfld.long 0x00 7. " SFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the SecureFault exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able"
|
|
newline
|
|
bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread"
|
|
bitfld.long 0x00 2. " S ,Indicates the FP context belongs to the specified security state" "Non-secure,Secure"
|
|
newline
|
|
bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged"
|
|
bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active"
|
|
line.long 0x04 "FPCAR,Floating-Point Context Address Register"
|
|
hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame"
|
|
line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register"
|
|
bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative"
|
|
bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation"
|
|
bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode"
|
|
newline
|
|
bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero"
|
|
rgroup.long 0xF40++0x0B
|
|
line.long 0x00 "MVFR0,Media and FP Feature Register 0"
|
|
bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..."
|
|
bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..."
|
|
bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..."
|
|
bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..."
|
|
line.long 0x04 "MVFR1,Media and FP Feature Register 1"
|
|
bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..."
|
|
bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..."
|
|
newline
|
|
bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..."
|
|
bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Fully denormalized,?..."
|
|
line.long 0x08 "MVFR2,Media and FP Feature Register 2"
|
|
bitfld.long 0x08 4.--7. " VFP_MISC ,Indicates the hardware support for FP miscellaneous features" "Not supported,,,,Supported,?..."
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
endif
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 13.
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Debug Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
|
|
eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
|
|
eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated"
|
|
newline
|
|
eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
|
|
eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
|
|
newline
|
|
hgroup.long 0xDF0++0x03
|
|
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
in
|
|
newline
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x00 16. " REGWNR ,Specifies the access type for the transfer" "Read,Write"
|
|
hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register, special-purpose register or Floating-point extension register"
|
|
group.long 0xDF8++0x03
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
group.long 0xE04++0x07
|
|
line.long 0x00 "DAUTHCTRL,Debug Authentication Control Register"
|
|
bitfld.long 0x00 3. " INTSPNIDEN ,Internal secure non-invasive debug enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SPNIDENSEL ,Secure non-invasive debug enable select.Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure non-invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPNIDEN"
|
|
bitfld.long 0x00 1. " INTSPIDEN ,Internal secure invasive debug enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SPIDENSEL ,Secure invasive debug enable select. Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPIDEN"
|
|
line.long 0x04 "DSCSR,Debug Security Control and Status Register"
|
|
bitfld.long 0x04 16. " CDS ,This field indicates the current security state of the processor" "Non-secure,Secure"
|
|
bitfld.long 0x04 1. " SBRSEL ,Secure banked register select" "Non-secure,Secure"
|
|
bitfld.long 0x04 0. " SBRSELEN ,Secure banked register select enable" "Disabled,Enabled"
|
|
rgroup.long 0xFB8++0x03
|
|
line.long 0x00 "DAUTHSTATUS,Debug Authentication Status Register"
|
|
bitfld.long 0x00 7. " SNI ,Secure non-invasive debug implemented" ",Implemented"
|
|
bitfld.long 0x00 6. " SNE ,Secure non-invasive debug enabled" "0,1"
|
|
bitfld.long 0x00 5. " SI ,Secure invasive debug features implemented" ",Implemented"
|
|
bitfld.long 0x00 4. " SE ,Secure invasive debug enabled" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. " NSNI ,Non-secure non-invasive debug features implemented" ",Implemented"
|
|
bitfld.long 0x00 2. " NSNE ,Non-secure non-invasive debug enabled" "0,1"
|
|
bitfld.long 0x00 1. " NSI ,Non-secure invasive debug features implemented" ",Implemented"
|
|
bitfld.long 0x00 0. " NSE ,Non-secure invasive debug enabled" "0,1"
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Flash Patch and Breakpoint Unit (FPB)"
|
|
sif COMPonent.AVAILABLE("FPB")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
|
|
width 12.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Reserved,Version 2,?..."
|
|
rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,?..."
|
|
rbitfld.long 0x00 8.--11. " NUM_LIT ,Number of literal comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
|
|
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
|
|
textline " "
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x04))&0x20000000)==0x20000000)
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "FP_REMAP,Flash Patch Remap Register"
|
|
bitfld.long 0x00 29. " RMPSPT ,Indicates whether the FPB unit supports Flash Patch remap" "Not supported,Supported"
|
|
hexmask.long 0x00 5.--28. 0x20 " REMAP ,Remap address"
|
|
else
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "FP_REMAP,Flash Patch Remap Register"
|
|
bitfld.long 0x00 29. " RMPSPT ,Indicates whether the FPB unit supports Flash Patch remap" "Not supported,Supported"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
|
|
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
textfld " "
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
|
|
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
textfld " "
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
|
|
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
textfld " "
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
|
|
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
textfld " "
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
|
|
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
textfld " "
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
|
|
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
textfld " "
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
|
|
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
textfld " "
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
|
|
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
textfld " "
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
|
|
endif
|
|
tree "CoreSight Identification Registers"
|
|
width 12.
|
|
rgroup.long 0xFCC++0x03
|
|
line.long 0x00 "FP_DEVTYPE,FPB CoreSight Device Type Register"
|
|
hexmask.long.byte 0x00 4.--7. 1. " SUB ,Sub-type"
|
|
hexmask.long.byte 0x00 0.--3. 1. " MAJOR ,Major type"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xFBC))&0x100000)==0x100000)
|
|
rgroup.long 0xFBC++0x03
|
|
line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register"
|
|
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect"
|
|
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
|
|
bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part"
|
|
else
|
|
rgroup.long 0xFBC++0x03
|
|
line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register"
|
|
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
|
|
endif
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "FP_PIDR0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "FP_PIDR1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "FP_PIDR2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0C "FP_PIDR3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "FP_PIDR4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "FP_CIDR0,Component ID0 (Preamble)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble"
|
|
line.long 0x04 "FP_CIDR1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class"
|
|
line.long 0x08 "FP_CIDR2,Component ID2"
|
|
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble"
|
|
line.long 0x0c "FP_CIDR3,Component ID3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble"
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "FPB component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 16.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DWT_CTRL,Control Register"
|
|
rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,?..."
|
|
rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
|
|
rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
|
|
textline " "
|
|
rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
|
|
bitfld.long 0x00 23. " CYCDISS ,Controls whether the cycle counter is prevented from incrementing while the PE is in Secure state" "No,Yes"
|
|
bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PCSAMPLENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
|
|
bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
|
|
textline " "
|
|
bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)))&0x1000000)==0x0000000)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "DWT_CYCCNT,Cycle Count register"
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)))&0x2000000)==0x0000000)
|
|
group.long 0x08++0x17
|
|
line.long 0x00 "DWT_CPICNT,CPI Count register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPICNT ,Base instruction overhead counter"
|
|
line.long 0x04 "DWT_EXCCNT,Exception Overhead Count Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " EXCCNT ,The exception overhead counter"
|
|
line.long 0x08 "DWT_SLEEPCNT,Sleep Count Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " SLEEPCNT ,Sleep Counter"
|
|
line.long 0x10 "DWT_LSUCNT,LSU Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LSUCNT ,Load-store overhead counter"
|
|
line.long 0x14 "DWT_FOLDCNT,Folded-instruction Count register"
|
|
hexmask.long.byte 0x14 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
|
|
endif
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
|
|
textline " "
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)==0x1)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x4)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xC)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xF)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
endif
|
|
group.long (0x20+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Register 0"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)==0x1)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x4)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xC)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xF)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
endif
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Register 1"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)==0x1)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x4)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xC)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xF)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
endif
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Register 2"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)==0x1)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x4)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xC)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
|
|
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xF)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
|
|
else
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
endif
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Register 3"
|
|
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
|
|
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
|
|
tree "CoreSight Identification Registers"
|
|
width 13.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xFBC))&0x100000)==0x100000)
|
|
rgroup.long 0xFBC++0x03
|
|
line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register"
|
|
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect"
|
|
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
|
|
bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part"
|
|
else
|
|
rgroup.long 0xFBC++0x03
|
|
line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register"
|
|
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
|
|
endif
|
|
rgroup.long 0xFCC++0x03
|
|
line.long 0x00 "DWT_DEVTYPE,Device Type Identifier register"
|
|
hexmask.long.byte 0x00 4.--7. 1. " SUB ,Sub-type"
|
|
hexmask.long.byte 0x00 0.--3. 1. " MAJOR ,Major type"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "DWT_PIDR0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "DWT_PIDR1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "DWT_PIDR2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "DWT_PIDR3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "DWT_PIDR4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "DWT_CIDR0,Component ID0 (Preamble)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble"
|
|
line.long 0x04 "DWT_CIDR1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class"
|
|
line.long 0x08 "DWT_CIDR2,Component ID2"
|
|
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble"
|
|
line.long 0x0c "DWT_CIDR3,Component ID3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble"
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
tree "AGC (Automatic Gain Control)"
|
|
base ad:0x0
|
|
tree "AGC_NS"
|
|
base ad:0xB800C000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "IPVERSION,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "IPVERSION,IP Version"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "EN,No Description"
|
|
bitfld.long 0x00 0. "EN,Enable peripheral clock to this module" "0,1"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "STATUS0,No Description"
|
|
bitfld.long 0x00 24.--25. "ADCINDEX,ADC Attenuator INDEX" "0,1,2,3"
|
|
bitfld.long 0x00 19.--23. "PNINDEX,PN GAIN INDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 15.--18. "LNAINDEX,LNA GAIN INDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11.--14. "PGAINDEX,PGA GAIN INDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10. "GAINOK,Gain OK" "0,1"
|
|
bitfld.long 0x00 9. "CCA,Clear Channel Assessment" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "IFPKDHILAT,IFPKD Hi threshold pass Latch" "0,1"
|
|
bitfld.long 0x00 7. "IFPKDLOLAT,IFPKD Lo threshold pass Latch" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "RFPKDLAT,RFPKD Latch" "0,1"
|
|
bitfld.long 0x00 0.--5. "GAININDEX,Gain Table Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "STATUS2,No Description"
|
|
hexmask.long.word 0x00 16.--31. 1. "RFPKDPRDCNT,RF PKD PERIOD CNT"
|
|
bitfld.long 0x00 14. "PNDWNUP,Allow PN GAIN UP" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--11. 1. "RFPKTLATCNT,RF PKD Latch CNT"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "RSSI,No Description"
|
|
hexmask.long.byte 0x00 8.--15. 1. "RSSIINT,RSSI integer part"
|
|
bitfld.long 0x00 6.--7. "RSSIFRAC,RSSI fractional part" "0,1,2,3"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "FRAMERSSI,No Description"
|
|
hexmask.long.byte 0x00 8.--15. 1. "FRAMERSSIINT,FRAMERSSI integer part"
|
|
bitfld.long 0x00 6.--7. "FRAMERSSIFRAC,FRAMERSSI fractional part" "0,1,2,3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CTRL0,No Description"
|
|
bitfld.long 0x00 31. "AGCRST,AGC reset" "0,1"
|
|
bitfld.long 0x00 30. "DISPNDWNCOMP,Disable PN gain decrease compensation" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "DISPNGAINUP,Disable PN gain increase" "0,1"
|
|
bitfld.long 0x00 28. "DSADISCFLOOP,Disable channel filter loop" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "ENRSSIRESET,Enables reset of RSSI and CCA" "0,1"
|
|
bitfld.long 0x00 25.--26. "ADCATTENCODE,ADC Attenuator code" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 23. "ADCATTENMODE,ADC Attenuator mode" "0: ADC attenuator back-off will not be done by AGC,1: ADC attenuator is backed-off if rxgain is NOT.."
|
|
bitfld.long 0x00 22. "DISRESETCHPWR,Disable Reset of CHPWR" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "DISCFLOOPADJ,Disable gain adjustment by CFLOOP" "0,1"
|
|
hexmask.long.byte 0x00 11.--18. 1. "RSSISHIFT,RSSI Shift"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "MODE,Mode" "0: AGC loop is adjusting gain continuously,1: Gain is locked once a preamble is detected,2: Gain is locked once a sync word is detected,3: Gain is locked once DSA is detected,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. "PWRTARGET,Power Target"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CTRL1,No Description"
|
|
bitfld.long 0x00 26.--31. "SUBINT,Subperiod integer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 21.--25. "SUBDEN,Subperiod denominator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 16.--20. "SUBNUM,Subperiod numerator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 15. "SUBPERIOD,Subperiod" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12.--14. "PWRPERIOD,AGC measure period" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. "RSSIPERIOD,RSSI measure period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "CCATHRSH,Clear Channel Assessment (CCA) Threshold"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CTRL2,No Description"
|
|
bitfld.long 0x00 31. "DISRFPKD,Disable RF PEAKDET" "0,1"
|
|
bitfld.long 0x00 30. "PRSDEBUGEN,PRS Debug Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "DEBCNTRST,Debonce CNT Reset MODE" "0,1"
|
|
hexmask.long.byte 0x00 18.--25. 1. "RELTARGETPWR,Safe Mode Release Power Target"
|
|
newline
|
|
bitfld.long 0x00 16.--17. "RELBYCHPWR,Safe mode release mode" "0: Increment counter if IFPKD_LO_LAT signal is..,1: Increment counter if channel power is below..,2: Increment if either LO_CNT or PWR,3: Increment if both LO_CNT and PWR"
|
|
bitfld.long 0x00 13.--15. "RELOTHD,Exit threshold based on Release Counter" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x00 5.--12. 1. "REHICNTTHD,Exit threshold based on HICNT"
|
|
bitfld.long 0x00 2.--4. "SAFEMODETHD,Enter threshold" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 1. "SAFEMODE,AGC safe mode" "0,1"
|
|
bitfld.long 0x00 0. "DMASEL,DMA select" "0: RSSI,1: GAIN"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CTRL3,No Description"
|
|
bitfld.long 0x00 27.--31. "RFPKDDEBRST,RFPKD_LAT debounce reset delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 19.--26. 1. "RFPKDDEBPRD,RF PEAKDET debance period"
|
|
newline
|
|
bitfld.long 0x00 14.--18. "RFPKDDEBTHD,RF PEAKDET debance thrshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 13. "RFPKDDEB,RF PEAKDET debounce mode enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9.--12. "IFPKDDEBRST,IF PEAKDET debounce period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3.--8. "IFPKDDEBPRD,IF PEAKDET debance period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 1.--2. "IFPKDDEBTHD,IF PEAKDET debance thrshold" "0,1,2,3"
|
|
bitfld.long 0x00 0. "IFPKDDEB,IF PEAKDET debounce mode enable" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CTRL4,No Description"
|
|
bitfld.long 0x00 31. "RFPKDCNTEN,Counter-based RFPKD Enable" "0,1"
|
|
bitfld.long 0x00 30. "FRZPKDEN,PKD Freeze Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "RFPKDSEL,RF PKD OUTPUT SELECT" "0,1"
|
|
bitfld.long 0x00 28. "RFPKDSYNCSEL,SYNC RF PKD OUTPUT SELECT" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25.--27. "RFPKDPRDGEAR,RFPKD Period Gear" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--15. 1. "PERIODRFPKD,RFPKD trigger measure period"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CTRL5,No Description"
|
|
hexmask.long.word 0x00 12.--23. 1. "PNUPRELTHD,Enable PN GAIN increase THD"
|
|
hexmask.long.word 0x00 0.--11. 1. "PNUPDISTHD,Disable PN GAIN increase THD"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CTRL6,No Description"
|
|
bitfld.long 0x00 31. "SEQRFPKDEN,SEQ-based RFPKD Enable" "0,1"
|
|
bitfld.long 0x00 30. "SEQPNUPALLOW,SEQ Set PN GAIN UP ALLOW" "0,1"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "RSSISTEPTHR,No Description"
|
|
bitfld.long 0x00 29. "RSSIFAST,RSSI fast startup" "0,1"
|
|
hexmask.long.byte 0x00 21.--28. 1. "DEMODRESTARTTHR,Demodulator Restart Threshold"
|
|
newline
|
|
bitfld.long 0x00 17.--20. "DEMODRESTARTPER,Demodulator Restart Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16. "STEPPER,Step Period" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "NEGSTEPTHR,Negative Step Threshold"
|
|
hexmask.long.byte 0x00 0.--7. 1. "POSSTEPTHR,Positive Step Threshold"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "IF,No Description"
|
|
bitfld.long 0x00 9. "RFPKDCNTDONE,RF PKD pulse CNT TOMEOUT" "0,1"
|
|
bitfld.long 0x00 8. "RFPKDPRDDONE,RF PKD PERIOD CNT TOMEOUT" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "SHORTRSSIPOSSTEP,Short-term Positive RSSI Step Detected" "0,1"
|
|
bitfld.long 0x00 4. "RSSINEGSTEP,Negative RSSI Step Detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "RSSIPOSSTEP,Positive RSSI Step Detected" "0,1"
|
|
bitfld.long 0x00 2. "CCA,Clear Channel Assessment" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "RSSIVALID,RSSI Value is Valid" "0,1"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "IEN,No Description"
|
|
bitfld.long 0x00 9. "RFPKDCNTDONE,RF PKD pulse CNT Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 8. "RFPKDPRDDONE,RF PKD PERIOD CNT Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "SHORTRSSIPOSSTEP,SHORTRSSIPOSSTEP Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 4. "RSSINEGSTEP,RSSINEGSTEP Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "RSSIPOSSTEP,RSSIPOSSTEP Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. "CCA,CCA Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "RSSIVALID,RSSIVALID Interrupt Enable" "0,1"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "GAINRANGE,No Description"
|
|
bitfld.long 0x00 27. "LNABWADJ,LNA BW ADJUST" "0,1"
|
|
bitfld.long 0x00 26. "BOOSTLNA,LNA GAIN BOOST mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20.--25. "HIPWRTHD,High power detect thrshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--19. "LATCHEDHISTEP,Ltached Hi step size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 12.--15. "PNGAINSTEP,PN Gain Step size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "GAININCSTEP,AGC gain increase step size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "PGAINDEXBORDER,PGA gain border" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "LNAINDEXBORDER,LNA gain border" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "AGCPERIOD,No Description"
|
|
bitfld.long 0x00 28.--31. "SETTLETIMERF,RF peak Detector settling time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "SETTLETIMEIF,IF peak Detector settling time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "MAXHICNTTHD,max hi-countrer threshold"
|
|
hexmask.long.byte 0x00 8.--15. 1. "PERIODLO,AGC measure period low"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PERIODHI,AGC measure period hi"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "HICNTREGION,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "HICNTREGION4,AGC HICNT to step size map region 4"
|
|
hexmask.long.byte 0x00 16.--23. 1. "HICNTREGION3,AGC HICNT to step size map region 3"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "HICNTREGION2,AGC HICNT to step size map region 2"
|
|
bitfld.long 0x00 4.--7. "HICNTREGION1,AGC HICNT to step size map region 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "HICNTREGION0,AGC HICNT to step size map region 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "STEPDWN,No Description"
|
|
bitfld.long 0x00 15.--17. "STEPDWN5,AGC gain step size 5" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "STEPDWN4,AGC gain step size 4" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "STEPDWN3,AGC gain step size 3" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "STEPDWN2,AGC gain step size 2" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "STEPDWN1,AGC gain step size 1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "STEPDWN0,AGC gain step size 0" "0,1,2,3,4,5,6,7"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "GAINSTEPLIM,No Description"
|
|
bitfld.long 0x00 25.--29. "PNINDEXMAX,MAX PN INDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. "TRANRSTAGC,power transient detector Reset AGC" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "MAXPWRVAR,Maximum Power Variation"
|
|
bitfld.long 0x00 12.--15. "HYST,Hysteresis" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.byte 0x00 5.--11. 1. "CFLOOPDEL,Channel Filter Loop Delay"
|
|
bitfld.long 0x00 0.--4. "CFLOOPSTEPMAX,Maximum step in slow loop" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "PNRFATT0,No Description"
|
|
bitfld.long 0x00 24.--29. "LNAMIXRFATT5,PN RF attenuation code for index 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 18.--23. "LNAMIXRFATT4,PN RF attenuation code for index 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 12.--17. "LNAMIXRFATT3,PN RF attenuation code for index 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 6.--11. "LNAMIXRFATT2,PN RF attenuation code for index 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "LNAMIXRFATT1,PN RF attenuation code for index 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "PNRFATT1,No Description"
|
|
bitfld.long 0x00 24.--29. "LNAMIXRFATT10,PN RF attenuation code for index 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 18.--23. "LNAMIXRFATT9,PN RF attenuation code for index 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 12.--17. "LNAMIXRFATT8,PN RF attenuation code for index 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 6.--11. "LNAMIXRFATT7,PN RF attenuation code for index 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "LNAMIXRFATT6,PN RF attenuation code for index 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "PNRFATT2,No Description"
|
|
hexmask.long.byte 0x00 18.--25. 1. "LNAMIXRFATT14,PN RF attenuation code for index 14"
|
|
bitfld.long 0x00 12.--17. "LNAMIXRFATT13,PN RF attenuation code for index 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 6.--11. "LNAMIXRFATT12,PN RF attenuation code for index 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. "LNAMIXRFATT11,PN RF attenuation code for index 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "PNRFATT3,No Description"
|
|
hexmask.long.word 0x00 17.--26. 1. "LNAMIXRFATT17,PN RF attenuation code for index 17"
|
|
hexmask.long.word 0x00 8.--16. 1. "LNAMIXRFATT16,PN RF attenuation code for index 16"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "LNAMIXRFATT15,PN RF attenuation code for index 15"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "LNAMIXCODE0,No Description"
|
|
bitfld.long 0x00 24.--29. "LNAMIXSLICE5,LNA/MIX slice code for index 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 18.--23. "LNAMIXSLICE4,LNA/MIX slice code for index 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 12.--17. "LNAMIXSLICE3,LNA/MIX slice code for index 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 6.--11. "LNAMIXSLICE2,LNA/MIX slice code for index 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "LNAMIXSLICE1,LNA/MIX slice code for index 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "LNAMIXCODE1,No Description"
|
|
bitfld.long 0x00 24.--29. "LNAMIXSLICE10,LNA/MIX slice code for index 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 18.--23. "LNAMIXSLICE9,LNA/MIX slice code for index 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 12.--17. "LNAMIXSLICE8,LNA/MIX slice code for index 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 6.--11. "LNAMIXSLICE7,LNA/MIX slice code for index 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "LNAMIXSLICE6,LNA/MIX slice code for index 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "PGACODE0,No Description"
|
|
bitfld.long 0x00 28.--31. "PGAGAIN8,PGA GAIN code for index 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "PGAGAIN7,PGA GAIN code for index 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 20.--23. "PGAGAIN6,PGA GAIN code for index 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "PGAGAIN5,PGA GAIN code for index 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 12.--15. "PGAGAIN4,PGA GAIN code for index 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "PGAGAIN3,PGA GAIN code for index 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "PGAGAIN2,PGA GAIN code for index 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "PGAGAIN1,PGA GAIN code for index 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "PGACODE1,No Description"
|
|
bitfld.long 0x00 8.--11. "PGAGAIN11,PGA GAIN code for index 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "PGAGAIN10,PGA GAIN code for index 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "PGAGAIN9,PGA GAIN code for index 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "LBT,No Description"
|
|
bitfld.long 0x00 6. "ENCCARSSIMAX,Use RSSIMAX to indicate CCA" "0,1"
|
|
bitfld.long 0x00 5. "ENCCAGAINREDUCED,CCA gain reduced" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "ENCCARSSIPERIOD,RSSI PERIOD during CCA measurements" "0,1"
|
|
bitfld.long 0x00 0.--3. "CCARSSIPERIOD,RSSI Period during CCA measurements" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "MIRRORIF,No Description"
|
|
bitfld.long 0x00 3. "IFMIRRORCLEAR,Clear bit for the AGC IF MIRROR Register" "0,1"
|
|
rbitfld.long 0x00 2. "SHORTRSSIPOSSTEPM,Short-term Positive RSSI Step Detected" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 1. "RSSINEGSTEPM,Negative RSSI Step Detected" "0,1"
|
|
rbitfld.long 0x00 0. "RSSIPOSSTEPM,Positive RSSI Step Detected" "0,1"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "SEQIF,No Description"
|
|
bitfld.long 0x00 9. "RFPKDCNTDONE,RF PKD pulse CNT TOMEOUT" "0,1"
|
|
bitfld.long 0x00 8. "RFPKDPRDDONE,RF PKD PERIOD CNT TOMEOUT" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "SHORTRSSIPOSSTEP,Short-term Positive RSSI Step Detected" "0,1"
|
|
bitfld.long 0x00 4. "RSSINEGSTEP,Negative RSSI Step Detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "RSSIPOSSTEP,Positive RSSI Step Detected" "0,1"
|
|
bitfld.long 0x00 2. "CCA,Clear Channel Assessment" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "RSSIVALID,RSSI Value is Valid" "0,1"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "SEQIEN,No Description"
|
|
bitfld.long 0x00 9. "RFPKDCNTDONE,RF PKD pulse CNT Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 8. "RFPKDPRDDONE,RF PKD PERIOD CNT Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "SHORTRSSIPOSSTEP,SHORTRSSIPOSSTEP Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 4. "RSSINEGSTEP,RSSINEGSTEP Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "RSSIPOSSTEP,RSSIPOSSTEP Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. "CCA,CCA Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "RSSIVALID,RSSIVALID Interrupt Enable" "0,1"
|
|
tree.end
|
|
tree "AGC_S"
|
|
base ad:0xA800C000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "IPVERSION,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "IPVERSION,IP Version"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "EN,No Description"
|
|
bitfld.long 0x00 0. "EN,Enable peripheral clock to this module" "0,1"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "STATUS0,No Description"
|
|
bitfld.long 0x00 24.--25. "ADCINDEX,ADC Attenuator INDEX" "0,1,2,3"
|
|
bitfld.long 0x00 19.--23. "PNINDEX,PN GAIN INDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 15.--18. "LNAINDEX,LNA GAIN INDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11.--14. "PGAINDEX,PGA GAIN INDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10. "GAINOK,Gain OK" "0,1"
|
|
bitfld.long 0x00 9. "CCA,Clear Channel Assessment" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "IFPKDHILAT,IFPKD Hi threshold pass Latch" "0,1"
|
|
bitfld.long 0x00 7. "IFPKDLOLAT,IFPKD Lo threshold pass Latch" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "RFPKDLAT,RFPKD Latch" "0,1"
|
|
bitfld.long 0x00 0.--5. "GAININDEX,Gain Table Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "STATUS2,No Description"
|
|
hexmask.long.word 0x00 16.--31. 1. "RFPKDPRDCNT,RF PKD PERIOD CNT"
|
|
bitfld.long 0x00 14. "PNDWNUP,Allow PN GAIN UP" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--11. 1. "RFPKTLATCNT,RF PKD Latch CNT"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "RSSI,No Description"
|
|
hexmask.long.byte 0x00 8.--15. 1. "RSSIINT,RSSI integer part"
|
|
bitfld.long 0x00 6.--7. "RSSIFRAC,RSSI fractional part" "0,1,2,3"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "FRAMERSSI,No Description"
|
|
hexmask.long.byte 0x00 8.--15. 1. "FRAMERSSIINT,FRAMERSSI integer part"
|
|
bitfld.long 0x00 6.--7. "FRAMERSSIFRAC,FRAMERSSI fractional part" "0,1,2,3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CTRL0,No Description"
|
|
bitfld.long 0x00 31. "AGCRST,AGC reset" "0,1"
|
|
bitfld.long 0x00 30. "DISPNDWNCOMP,Disable PN gain decrease compensation" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "DISPNGAINUP,Disable PN gain increase" "0,1"
|
|
bitfld.long 0x00 28. "DSADISCFLOOP,Disable channel filter loop" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "ENRSSIRESET,Enables reset of RSSI and CCA" "0,1"
|
|
bitfld.long 0x00 25.--26. "ADCATTENCODE,ADC Attenuator code" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 23. "ADCATTENMODE,ADC Attenuator mode" "0: ADC attenuator back-off will not be done by AGC,1: ADC attenuator is backed-off if rxgain is NOT.."
|
|
bitfld.long 0x00 22. "DISRESETCHPWR,Disable Reset of CHPWR" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "DISCFLOOPADJ,Disable gain adjustment by CFLOOP" "0,1"
|
|
hexmask.long.byte 0x00 11.--18. 1. "RSSISHIFT,RSSI Shift"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "MODE,Mode" "0: AGC loop is adjusting gain continuously,1: Gain is locked once a preamble is detected,2: Gain is locked once a sync word is detected,3: Gain is locked once DSA is detected,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. "PWRTARGET,Power Target"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CTRL1,No Description"
|
|
bitfld.long 0x00 26.--31. "SUBINT,Subperiod integer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 21.--25. "SUBDEN,Subperiod denominator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 16.--20. "SUBNUM,Subperiod numerator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 15. "SUBPERIOD,Subperiod" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12.--14. "PWRPERIOD,AGC measure period" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. "RSSIPERIOD,RSSI measure period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "CCATHRSH,Clear Channel Assessment (CCA) Threshold"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CTRL2,No Description"
|
|
bitfld.long 0x00 31. "DISRFPKD,Disable RF PEAKDET" "0,1"
|
|
bitfld.long 0x00 30. "PRSDEBUGEN,PRS Debug Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "DEBCNTRST,Debonce CNT Reset MODE" "0,1"
|
|
hexmask.long.byte 0x00 18.--25. 1. "RELTARGETPWR,Safe Mode Release Power Target"
|
|
newline
|
|
bitfld.long 0x00 16.--17. "RELBYCHPWR,Safe mode release mode" "0: Increment counter if IFPKD_LO_LAT signal is..,1: Increment counter if channel power is below..,2: Increment if either LO_CNT or PWR,3: Increment if both LO_CNT and PWR"
|
|
bitfld.long 0x00 13.--15. "RELOTHD,Exit threshold based on Release Counter" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x00 5.--12. 1. "REHICNTTHD,Exit threshold based on HICNT"
|
|
bitfld.long 0x00 2.--4. "SAFEMODETHD,Enter threshold" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 1. "SAFEMODE,AGC safe mode" "0,1"
|
|
bitfld.long 0x00 0. "DMASEL,DMA select" "0: RSSI,1: GAIN"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CTRL3,No Description"
|
|
bitfld.long 0x00 27.--31. "RFPKDDEBRST,RFPKD_LAT debounce reset delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 19.--26. 1. "RFPKDDEBPRD,RF PEAKDET debance period"
|
|
newline
|
|
bitfld.long 0x00 14.--18. "RFPKDDEBTHD,RF PEAKDET debance thrshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 13. "RFPKDDEB,RF PEAKDET debounce mode enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9.--12. "IFPKDDEBRST,IF PEAKDET debounce period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3.--8. "IFPKDDEBPRD,IF PEAKDET debance period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 1.--2. "IFPKDDEBTHD,IF PEAKDET debance thrshold" "0,1,2,3"
|
|
bitfld.long 0x00 0. "IFPKDDEB,IF PEAKDET debounce mode enable" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CTRL4,No Description"
|
|
bitfld.long 0x00 31. "RFPKDCNTEN,Counter-based RFPKD Enable" "0,1"
|
|
bitfld.long 0x00 30. "FRZPKDEN,PKD Freeze Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "RFPKDSEL,RF PKD OUTPUT SELECT" "0,1"
|
|
bitfld.long 0x00 28. "RFPKDSYNCSEL,SYNC RF PKD OUTPUT SELECT" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25.--27. "RFPKDPRDGEAR,RFPKD Period Gear" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--15. 1. "PERIODRFPKD,RFPKD trigger measure period"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CTRL5,No Description"
|
|
hexmask.long.word 0x00 12.--23. 1. "PNUPRELTHD,Enable PN GAIN increase THD"
|
|
hexmask.long.word 0x00 0.--11. 1. "PNUPDISTHD,Disable PN GAIN increase THD"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CTRL6,No Description"
|
|
bitfld.long 0x00 31. "SEQRFPKDEN,SEQ-based RFPKD Enable" "0,1"
|
|
bitfld.long 0x00 30. "SEQPNUPALLOW,SEQ Set PN GAIN UP ALLOW" "0,1"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "RSSISTEPTHR,No Description"
|
|
bitfld.long 0x00 29. "RSSIFAST,RSSI fast startup" "0,1"
|
|
hexmask.long.byte 0x00 21.--28. 1. "DEMODRESTARTTHR,Demodulator Restart Threshold"
|
|
newline
|
|
bitfld.long 0x00 17.--20. "DEMODRESTARTPER,Demodulator Restart Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16. "STEPPER,Step Period" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "NEGSTEPTHR,Negative Step Threshold"
|
|
hexmask.long.byte 0x00 0.--7. 1. "POSSTEPTHR,Positive Step Threshold"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "IF,No Description"
|
|
bitfld.long 0x00 9. "RFPKDCNTDONE,RF PKD pulse CNT TOMEOUT" "0,1"
|
|
bitfld.long 0x00 8. "RFPKDPRDDONE,RF PKD PERIOD CNT TOMEOUT" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "SHORTRSSIPOSSTEP,Short-term Positive RSSI Step Detected" "0,1"
|
|
bitfld.long 0x00 4. "RSSINEGSTEP,Negative RSSI Step Detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "RSSIPOSSTEP,Positive RSSI Step Detected" "0,1"
|
|
bitfld.long 0x00 2. "CCA,Clear Channel Assessment" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "RSSIVALID,RSSI Value is Valid" "0,1"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "IEN,No Description"
|
|
bitfld.long 0x00 9. "RFPKDCNTDONE,RF PKD pulse CNT Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 8. "RFPKDPRDDONE,RF PKD PERIOD CNT Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "SHORTRSSIPOSSTEP,SHORTRSSIPOSSTEP Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 4. "RSSINEGSTEP,RSSINEGSTEP Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "RSSIPOSSTEP,RSSIPOSSTEP Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. "CCA,CCA Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "RSSIVALID,RSSIVALID Interrupt Enable" "0,1"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "GAINRANGE,No Description"
|
|
bitfld.long 0x00 27. "LNABWADJ,LNA BW ADJUST" "0,1"
|
|
bitfld.long 0x00 26. "BOOSTLNA,LNA GAIN BOOST mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20.--25. "HIPWRTHD,High power detect thrshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--19. "LATCHEDHISTEP,Ltached Hi step size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 12.--15. "PNGAINSTEP,PN Gain Step size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "GAININCSTEP,AGC gain increase step size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "PGAINDEXBORDER,PGA gain border" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "LNAINDEXBORDER,LNA gain border" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "AGCPERIOD,No Description"
|
|
bitfld.long 0x00 28.--31. "SETTLETIMERF,RF peak Detector settling time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "SETTLETIMEIF,IF peak Detector settling time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "MAXHICNTTHD,max hi-countrer threshold"
|
|
hexmask.long.byte 0x00 8.--15. 1. "PERIODLO,AGC measure period low"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PERIODHI,AGC measure period hi"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "HICNTREGION,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "HICNTREGION4,AGC HICNT to step size map region 4"
|
|
hexmask.long.byte 0x00 16.--23. 1. "HICNTREGION3,AGC HICNT to step size map region 3"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "HICNTREGION2,AGC HICNT to step size map region 2"
|
|
bitfld.long 0x00 4.--7. "HICNTREGION1,AGC HICNT to step size map region 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "HICNTREGION0,AGC HICNT to step size map region 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "STEPDWN,No Description"
|
|
bitfld.long 0x00 15.--17. "STEPDWN5,AGC gain step size 5" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. "STEPDWN4,AGC gain step size 4" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "STEPDWN3,AGC gain step size 3" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--8. "STEPDWN2,AGC gain step size 2" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "STEPDWN1,AGC gain step size 1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "STEPDWN0,AGC gain step size 0" "0,1,2,3,4,5,6,7"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "GAINSTEPLIM,No Description"
|
|
bitfld.long 0x00 25.--29. "PNINDEXMAX,MAX PN INDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 24. "TRANRSTAGC,power transient detector Reset AGC" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "MAXPWRVAR,Maximum Power Variation"
|
|
bitfld.long 0x00 12.--15. "HYST,Hysteresis" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.byte 0x00 5.--11. 1. "CFLOOPDEL,Channel Filter Loop Delay"
|
|
bitfld.long 0x00 0.--4. "CFLOOPSTEPMAX,Maximum step in slow loop" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "PNRFATT0,No Description"
|
|
bitfld.long 0x00 24.--29. "LNAMIXRFATT5,PN RF attenuation code for index 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 18.--23. "LNAMIXRFATT4,PN RF attenuation code for index 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 12.--17. "LNAMIXRFATT3,PN RF attenuation code for index 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 6.--11. "LNAMIXRFATT2,PN RF attenuation code for index 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "LNAMIXRFATT1,PN RF attenuation code for index 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "PNRFATT1,No Description"
|
|
bitfld.long 0x00 24.--29. "LNAMIXRFATT10,PN RF attenuation code for index 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 18.--23. "LNAMIXRFATT9,PN RF attenuation code for index 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 12.--17. "LNAMIXRFATT8,PN RF attenuation code for index 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 6.--11. "LNAMIXRFATT7,PN RF attenuation code for index 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "LNAMIXRFATT6,PN RF attenuation code for index 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "PNRFATT2,No Description"
|
|
hexmask.long.byte 0x00 18.--25. 1. "LNAMIXRFATT14,PN RF attenuation code for index 14"
|
|
bitfld.long 0x00 12.--17. "LNAMIXRFATT13,PN RF attenuation code for index 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 6.--11. "LNAMIXRFATT12,PN RF attenuation code for index 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. "LNAMIXRFATT11,PN RF attenuation code for index 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "PNRFATT3,No Description"
|
|
hexmask.long.word 0x00 17.--26. 1. "LNAMIXRFATT17,PN RF attenuation code for index 17"
|
|
hexmask.long.word 0x00 8.--16. 1. "LNAMIXRFATT16,PN RF attenuation code for index 16"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "LNAMIXRFATT15,PN RF attenuation code for index 15"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "LNAMIXCODE0,No Description"
|
|
bitfld.long 0x00 24.--29. "LNAMIXSLICE5,LNA/MIX slice code for index 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 18.--23. "LNAMIXSLICE4,LNA/MIX slice code for index 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 12.--17. "LNAMIXSLICE3,LNA/MIX slice code for index 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 6.--11. "LNAMIXSLICE2,LNA/MIX slice code for index 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "LNAMIXSLICE1,LNA/MIX slice code for index 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "LNAMIXCODE1,No Description"
|
|
bitfld.long 0x00 24.--29. "LNAMIXSLICE10,LNA/MIX slice code for index 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 18.--23. "LNAMIXSLICE9,LNA/MIX slice code for index 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 12.--17. "LNAMIXSLICE8,LNA/MIX slice code for index 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 6.--11. "LNAMIXSLICE7,LNA/MIX slice code for index 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "LNAMIXSLICE6,LNA/MIX slice code for index 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "PGACODE0,No Description"
|
|
bitfld.long 0x00 28.--31. "PGAGAIN8,PGA GAIN code for index 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "PGAGAIN7,PGA GAIN code for index 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 20.--23. "PGAGAIN6,PGA GAIN code for index 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "PGAGAIN5,PGA GAIN code for index 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 12.--15. "PGAGAIN4,PGA GAIN code for index 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "PGAGAIN3,PGA GAIN code for index 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "PGAGAIN2,PGA GAIN code for index 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "PGAGAIN1,PGA GAIN code for index 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "PGACODE1,No Description"
|
|
bitfld.long 0x00 8.--11. "PGAGAIN11,PGA GAIN code for index 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "PGAGAIN10,PGA GAIN code for index 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "PGAGAIN9,PGA GAIN code for index 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "LBT,No Description"
|
|
bitfld.long 0x00 6. "ENCCARSSIMAX,Use RSSIMAX to indicate CCA" "0,1"
|
|
bitfld.long 0x00 5. "ENCCAGAINREDUCED,CCA gain reduced" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "ENCCARSSIPERIOD,RSSI PERIOD during CCA measurements" "0,1"
|
|
bitfld.long 0x00 0.--3. "CCARSSIPERIOD,RSSI Period during CCA measurements" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "MIRRORIF,No Description"
|
|
bitfld.long 0x00 3. "IFMIRRORCLEAR,Clear bit for the AGC IF MIRROR Register" "0,1"
|
|
rbitfld.long 0x00 2. "SHORTRSSIPOSSTEPM,Short-term Positive RSSI Step Detected" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 1. "RSSINEGSTEPM,Negative RSSI Step Detected" "0,1"
|
|
rbitfld.long 0x00 0. "RSSIPOSSTEPM,Positive RSSI Step Detected" "0,1"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "SEQIF,No Description"
|
|
bitfld.long 0x00 9. "RFPKDCNTDONE,RF PKD pulse CNT TOMEOUT" "0,1"
|
|
bitfld.long 0x00 8. "RFPKDPRDDONE,RF PKD PERIOD CNT TOMEOUT" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "SHORTRSSIPOSSTEP,Short-term Positive RSSI Step Detected" "0,1"
|
|
bitfld.long 0x00 4. "RSSINEGSTEP,Negative RSSI Step Detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "RSSIPOSSTEP,Positive RSSI Step Detected" "0,1"
|
|
bitfld.long 0x00 2. "CCA,Clear Channel Assessment" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "RSSIVALID,RSSI Value is Valid" "0,1"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "SEQIEN,No Description"
|
|
bitfld.long 0x00 9. "RFPKDCNTDONE,RF PKD pulse CNT Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 8. "RFPKDPRDDONE,RF PKD PERIOD CNT Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "SHORTRSSIPOSSTEP,SHORTRSSIPOSSTEP Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 4. "RSSINEGSTEP,RSSINEGSTEP Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "RSSIPOSSTEP,RSSIPOSSTEP Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. "CCA,CCA Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "RSSIVALID,RSSIVALID Interrupt Enable" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "AMUXCP"
|
|
base ad:0x0
|
|
tree "AMUXCP"
|
|
tree "AMUXCP0_NS"
|
|
base ad:0x5A020000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,IPVERSION"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IPVERSION"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "CTRL,Control"
|
|
bitfld.long 0x0 5. "FORCESTOP,Force stop" "0,1"
|
|
bitfld.long 0x0 4. "FORCERUN,Force run" "0,1"
|
|
bitfld.long 0x0 1. "FORCELP,Force Low Power" "0,1"
|
|
bitfld.long 0x0 0. "FORCEHP,Force High Power" "0,1"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "STATUS,Status"
|
|
bitfld.long 0x0 1. "HICAP,high cap" "0,1"
|
|
bitfld.long 0x0 0. "RUN,running" "0,1"
|
|
group.long 0x10++0x7
|
|
line.long 0x0 "TEST,Test"
|
|
bitfld.long 0x0 31. "STATUSEN,Enable write to status bits" "0,1"
|
|
bitfld.long 0x0 13. "FORCEBOOSTOFF,Force Boost Off" "0,1"
|
|
bitfld.long 0x0 12. "FORCEBOOSTON,Force Boost On" "0,1"
|
|
bitfld.long 0x0 9. "FORCELOCAP,Force low capacitance driver" "0,1"
|
|
bitfld.long 0x0 8. "FORCEHICAP,Force high capacitance driver" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "FORCEREQUEST,Force Request" "0,1"
|
|
bitfld.long 0x0 1. "SYNCMODE,Sync Mode" "0,1"
|
|
bitfld.long 0x0 0. "SYNCCLK,Sync Clock" "0,1"
|
|
line.long 0x4 "TRIM,Trim"
|
|
bitfld.long 0x4 28.--30. "PUMPCAPHI,Pump Cap High Power" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 24.--26. "PUMPCAPLO,Pump Cap Low Power" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 21.--23. "BIASCTRLHI,Bias Control High Power" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 18.--20. "BIASCTRLLOCONT,Bias Control Low Power Continuous" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 15.--17. "BIASCTRLLO,Bias Control Low Power" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 13.--14. "VOLTAGECTRLHI,Charge Pump Voltage Control High Power" "0,1,2,3"
|
|
bitfld.long 0x4 10.--11. "VOLTAGECTRLLO,Charge Pump Voltage Control Low Power" "0,1,2,3"
|
|
bitfld.long 0x4 9. "BIAS2XHI,Bias 2x High Power" "0,1"
|
|
bitfld.long 0x4 8. "BIAS2XLO,Bias 2x Low Power" "0,1"
|
|
bitfld.long 0x4 7. "BUMP0P5XHI,Bump 0.5X High Power" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "BUMP0P5XLO,Bump 0.5X Low Power" "0,1"
|
|
bitfld.long 0x4 5. "BYPASSDIV2HI,Bypass Div2 High Power" "0,1"
|
|
bitfld.long 0x4 4. "BYPASSDIV2LO,Bypass Div2 Low Power" "0,1"
|
|
bitfld.long 0x4 3. "FLOATVDDCPHI,Float VDDCP High Power" "0,1"
|
|
bitfld.long 0x4 2. "FLOATVDDCPLO,Float VDDCP Low Power" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "WARMUPTIME,Warm up time" "0: Warm up cycle = 72; 3.6us @20 MHz,1: Warm up cycle = 96; 4.8us @ 20 MHz,2: Warm up cycle = 128; 6.4us @ 20 MHz,3: Warm up cycle = 160; 8.0us @ 20 MHz"
|
|
tree.end
|
|
tree "AMUXCP0_S"
|
|
base ad:0x4A020000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,IPVERSION"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IPVERSION"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "CTRL,Control"
|
|
bitfld.long 0x0 5. "FORCESTOP,Force stop" "0,1"
|
|
bitfld.long 0x0 4. "FORCERUN,Force run" "0,1"
|
|
bitfld.long 0x0 1. "FORCELP,Force Low Power" "0,1"
|
|
bitfld.long 0x0 0. "FORCEHP,Force High Power" "0,1"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "STATUS,Status"
|
|
bitfld.long 0x0 1. "HICAP,high cap" "0,1"
|
|
bitfld.long 0x0 0. "RUN,running" "0,1"
|
|
group.long 0x10++0x7
|
|
line.long 0x0 "TEST,Test"
|
|
bitfld.long 0x0 31. "STATUSEN,Enable write to status bits" "0,1"
|
|
bitfld.long 0x0 13. "FORCEBOOSTOFF,Force Boost Off" "0,1"
|
|
bitfld.long 0x0 12. "FORCEBOOSTON,Force Boost On" "0,1"
|
|
bitfld.long 0x0 9. "FORCELOCAP,Force low capacitance driver" "0,1"
|
|
bitfld.long 0x0 8. "FORCEHICAP,Force high capacitance driver" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "FORCEREQUEST,Force Request" "0,1"
|
|
bitfld.long 0x0 1. "SYNCMODE,Sync Mode" "0,1"
|
|
bitfld.long 0x0 0. "SYNCCLK,Sync Clock" "0,1"
|
|
line.long 0x4 "TRIM,Trim"
|
|
bitfld.long 0x4 28.--30. "PUMPCAPHI,Pump Cap High Power" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 24.--26. "PUMPCAPLO,Pump Cap Low Power" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 21.--23. "BIASCTRLHI,Bias Control High Power" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 18.--20. "BIASCTRLLOCONT,Bias Control Low Power Continuous" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 15.--17. "BIASCTRLLO,Bias Control Low Power" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 13.--14. "VOLTAGECTRLHI,Charge Pump Voltage Control High Power" "0,1,2,3"
|
|
bitfld.long 0x4 10.--11. "VOLTAGECTRLLO,Charge Pump Voltage Control Low Power" "0,1,2,3"
|
|
bitfld.long 0x4 9. "BIAS2XHI,Bias 2x High Power" "0,1"
|
|
bitfld.long 0x4 8. "BIAS2XLO,Bias 2x Low Power" "0,1"
|
|
bitfld.long 0x4 7. "BUMP0P5XHI,Bump 0.5X High Power" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "BUMP0P5XLO,Bump 0.5X Low Power" "0,1"
|
|
bitfld.long 0x4 5. "BYPASSDIV2HI,Bypass Div2 High Power" "0,1"
|
|
bitfld.long 0x4 4. "BYPASSDIV2LO,Bypass Div2 Low Power" "0,1"
|
|
bitfld.long 0x4 3. "FLOATVDDCPHI,Float VDDCP High Power" "0,1"
|
|
bitfld.long 0x4 2. "FLOATVDDCPLO,Float VDDCP Low Power" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "WARMUPTIME,Warm up time" "0: Warm up cycle = 72; 3.6us @20 MHz,1: Warm up cycle = 96; 4.8us @ 20 MHz,2: Warm up cycle = 128; 6.4us @ 20 MHz,3: Warm up cycle = 160; 8.0us @ 20 MHz"
|
|
tree.end
|
|
tree.end
|
|
tree.end
|
|
tree "BUFC (Buffer Controller)"
|
|
base ad:0x0
|
|
tree "BUFC_NS"
|
|
base ad:0xBA000000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "IPVERSION,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "IPVERSION,IP Version"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "EN,No Description"
|
|
bitfld.long 0x00 0. "EN,Enable peripheral clock to this module" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "LPMODE,No Description"
|
|
bitfld.long 0x00 1. "LPENBYM33,Low power mode enable from M33" "0,1"
|
|
bitfld.long 0x00 0. "LPENBYSEQ,Low power mode enable from M0p sequencer" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "BUF0_CTRL,No Description"
|
|
bitfld.long 0x00 0.--2. "SIZE,Buffer Size" "0: Sets Buffer size to 64 bytes,1: Sets Buffer size to 128 bytes,2: Sets Buffer size to 256 bytes,3: Sets Buffer size to 512 bytes,4: Sets Buffer size to 1024 bytes,5: Sets Buffer size to 2048 bytes,6: Sets Buffer size to 4096 bytes,?..."
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "BUF0_ADDR,No Description"
|
|
hexmask.long 0x00 2.--31. 1. "ADDR,Buffer Address"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "BUF0_WRITEOFFSET,No Description"
|
|
hexmask.long.word 0x00 0.--12. 1. "WRITEOFFSET,Write Offset"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "BUF0_READOFFSET,No Description"
|
|
hexmask.long.word 0x00 0.--12. 1. "READOFFSET,Read Offset"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "BUF0_READDATA,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "READDATA,Buffer Read Data"
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "BUF0_WRITEDATA,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "WRITEDATA,Buffer Write Data"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "BUF0_XWRITE,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "XORWRITEDATA,Buffer XOR Write Data"
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "BUF0_STATUS,No Description"
|
|
bitfld.long 0x00 20. "THRESHOLDFLAG,Buffer Threshold Flag" "0,1"
|
|
hexmask.long.word 0x00 0.--12. 1. "BYTES,Number of Bytes in the Buffer"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "BUF0_THRESHOLDCTRL,No Description"
|
|
bitfld.long 0x00 13. "THRESHOLDMODE,Buffer Threshold Mode" "0: THRESHOLDIF will be set if BYTES is larger..,1: THRESHOLDIF will be set if BYTES is less than.."
|
|
hexmask.long.word 0x00 0.--11. 1. "THRESHOLD,Buffer Threshold Value"
|
|
wgroup.long 0x34++0x03
|
|
line.long 0x00 "BUF0_CMD,No Description"
|
|
bitfld.long 0x00 1. "PREFETCH,Prefetch" "0,1"
|
|
bitfld.long 0x00 0. "CLEAR,Buffer Clear" "0,1"
|
|
wgroup.long 0x38++0x03
|
|
line.long 0x00 "BUF0_FIFOASYNC,No Description"
|
|
bitfld.long 0x00 0. "RST,Reset ASYNC" "0,1"
|
|
rgroup.long 0x3C++0x03
|
|
line.long 0x00 "BUF0_READDATA32,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "READDATA32,Buffer Read Data"
|
|
wgroup.long 0x40++0x03
|
|
line.long 0x00 "BUF0_WRITEDATA32,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRITEDATA32,Buffer Write Data"
|
|
wgroup.long 0x44++0x03
|
|
line.long 0x00 "BUF0_XWRITE32,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "XORWRITEDATA32,Buffer XOR Write Data"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "BUF1_CTRL,No Description"
|
|
bitfld.long 0x00 0.--2. "SIZE,Buffer Size" "0: Sets Buffer size to 64 bytes,1: Sets Buffer size to 128 bytes,2: Sets Buffer size to 256 bytes,3: Sets Buffer size to 512 bytes,4: Sets Buffer size to 1024 bytes,5: Sets Buffer size to 2048 bytes,6: Sets Buffer size to 4096 bytes,?..."
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "BUF1_ADDR,No Description"
|
|
hexmask.long 0x00 2.--31. 1. "ADDR,Buffer Address"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "BUF1_WRITEOFFSET,No Description"
|
|
hexmask.long.word 0x00 0.--12. 1. "WRITEOFFSET,Write Offset"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "BUF1_READOFFSET,No Description"
|
|
hexmask.long.word 0x00 0.--12. 1. "READOFFSET,Read Offset"
|
|
rgroup.long 0x60++0x03
|
|
line.long 0x00 "BUF1_READDATA,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "READDATA,Buffer Read Data"
|
|
wgroup.long 0x64++0x03
|
|
line.long 0x00 "BUF1_WRITEDATA,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "WRITEDATA,Buffer Write Data"
|
|
wgroup.long 0x68++0x03
|
|
line.long 0x00 "BUF1_XWRITE,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "XORWRITEDATA,Buffer XOR Write Data"
|
|
rgroup.long 0x6C++0x03
|
|
line.long 0x00 "BUF1_STATUS,No Description"
|
|
bitfld.long 0x00 20. "THRESHOLDFLAG,Buffer Threshold Flag" "0,1"
|
|
hexmask.long.word 0x00 0.--12. 1. "BYTES,Number of Bytes in the Buffer"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "BUF1_THRESHOLDCTRL,No Description"
|
|
bitfld.long 0x00 13. "THRESHOLDMODE,Buffer Threshold Mode" "0: THRESHOLDIF will be set if BYTES is larger..,1: THRESHOLDIF will be set if BYTES is less than.."
|
|
hexmask.long.word 0x00 0.--11. 1. "THRESHOLD,Buffer Threshold Value"
|
|
wgroup.long 0x74++0x03
|
|
line.long 0x00 "BUF1_CMD,No Description"
|
|
bitfld.long 0x00 1. "PREFETCH,Prefetch" "0,1"
|
|
bitfld.long 0x00 0. "CLEAR,Buffer Clear" "0,1"
|
|
wgroup.long 0x78++0x03
|
|
line.long 0x00 "BUF1_FIFOASYNC,No Description"
|
|
bitfld.long 0x00 0. "RST,Reset ASYNC" "0,1"
|
|
rgroup.long 0x7C++0x03
|
|
line.long 0x00 "BUF1_READDATA32,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "READDATA32,Buffer Read Data"
|
|
wgroup.long 0x80++0x03
|
|
line.long 0x00 "BUF1_WRITEDATA32,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRITEDATA32,Buffer Write Data"
|
|
wgroup.long 0x84++0x03
|
|
line.long 0x00 "BUF1_XWRITE32,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "XORWRITEDATA32,Buffer XOR Write Data"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "BUF2_CTRL,No Description"
|
|
bitfld.long 0x00 0.--2. "SIZE,Buffer Size" "0: Sets Buffer size to 64 bytes,1: Sets Buffer size to 128 bytes,2: Sets Buffer size to 256 bytes,3: Sets Buffer size to 512 bytes,4: Sets Buffer size to 1024 bytes,5: Sets Buffer size to 2048 bytes,6: Sets Buffer size to 4096 bytes,?..."
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "BUF2_ADDR,No Description"
|
|
hexmask.long 0x00 2.--31. 1. "ADDR,Buffer Address"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "BUF2_WRITEOFFSET,No Description"
|
|
hexmask.long.word 0x00 0.--12. 1. "WRITEOFFSET,Write Offset"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "BUF2_READOFFSET,No Description"
|
|
hexmask.long.word 0x00 0.--12. 1. "READOFFSET,Read Offset"
|
|
rgroup.long 0xA0++0x03
|
|
line.long 0x00 "BUF2_READDATA,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "READDATA,Buffer Read Data"
|
|
wgroup.long 0xA4++0x03
|
|
line.long 0x00 "BUF2_WRITEDATA,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "WRITEDATA,Buffer Write Data"
|
|
wgroup.long 0xA8++0x03
|
|
line.long 0x00 "BUF2_XWRITE,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "XORWRITEDATA,Buffer XOR Write Data"
|
|
rgroup.long 0xAC++0x03
|
|
line.long 0x00 "BUF2_STATUS,No Description"
|
|
bitfld.long 0x00 20. "THRESHOLDFLAG,Buffer Threshold Flag" "0,1"
|
|
hexmask.long.word 0x00 0.--12. 1. "BYTES,Number of Bytes in the Buffer"
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "BUF2_THRESHOLDCTRL,No Description"
|
|
bitfld.long 0x00 13. "THRESHOLDMODE,Buffer Threshold Mode" "0: THRESHOLDIF will be set if BYTES is larger..,1: THRESHOLDIF will be set if BYTES is less than.."
|
|
hexmask.long.word 0x00 0.--11. 1. "THRESHOLD,Buffer Threshold Value"
|
|
wgroup.long 0xB4++0x03
|
|
line.long 0x00 "BUF2_CMD,No Description"
|
|
bitfld.long 0x00 1. "PREFETCH,Prefetch" "0,1"
|
|
bitfld.long 0x00 0. "CLEAR,Buffer Clear" "0,1"
|
|
wgroup.long 0xB8++0x03
|
|
line.long 0x00 "BUF2_FIFOASYNC,No Description"
|
|
bitfld.long 0x00 0. "RST,Reset ASYNC" "0,1"
|
|
rgroup.long 0xBC++0x03
|
|
line.long 0x00 "BUF2_READDATA32,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "READDATA32,Buffer Read Data"
|
|
wgroup.long 0xC0++0x03
|
|
line.long 0x00 "BUF2_WRITEDATA32,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRITEDATA32,Buffer Write Data"
|
|
wgroup.long 0xC4++0x03
|
|
line.long 0x00 "BUF2_XWRITE32,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "XORWRITEDATA32,Buffer XOR Write Data"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "BUF3_CTRL,No Description"
|
|
bitfld.long 0x00 0.--2. "SIZE,Buffer Size" "0: Sets Buffer size to 64 bytes,1: Sets Buffer size to 128 bytes,2: Sets Buffer size to 256 bytes,3: Sets Buffer size to 512 bytes,4: Sets Buffer size to 1024 bytes,5: Sets Buffer size to 2048 bytes,6: Sets Buffer size to 4096 bytes,?..."
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "BUF3_ADDR,No Description"
|
|
hexmask.long 0x00 2.--31. 1. "ADDR,Buffer Address"
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "BUF3_WRITEOFFSET,No Description"
|
|
hexmask.long.word 0x00 0.--12. 1. "WRITEOFFSET,Write Offset"
|
|
group.long 0xD8++0x03
|
|
line.long 0x00 "BUF3_READOFFSET,No Description"
|
|
hexmask.long.word 0x00 0.--12. 1. "READOFFSET,Read Offset"
|
|
rgroup.long 0xE0++0x03
|
|
line.long 0x00 "BUF3_READDATA,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "READDATA,Buffer Read Data"
|
|
wgroup.long 0xE4++0x03
|
|
line.long 0x00 "BUF3_WRITEDATA,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "WRITEDATA,Buffer Write Data"
|
|
wgroup.long 0xE8++0x03
|
|
line.long 0x00 "BUF3_XWRITE,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "XORWRITEDATA,Buffer XOR Write Data"
|
|
rgroup.long 0xEC++0x03
|
|
line.long 0x00 "BUF3_STATUS,No Description"
|
|
bitfld.long 0x00 20. "THRESHOLDFLAG,Buffer Threshold Flag" "0,1"
|
|
hexmask.long.word 0x00 0.--12. 1. "BYTES,Number of Bytes in the Buffer"
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "BUF3_THRESHOLDCTRL,No Description"
|
|
bitfld.long 0x00 13. "THRESHOLDMODE,Buffer Threshold Mode" "0: THRESHOLDIF will be set if BYTES is larger..,1: THRESHOLDIF will be set if BYTES is less than.."
|
|
hexmask.long.word 0x00 0.--11. 1. "THRESHOLD,Buffer Threshold Value"
|
|
wgroup.long 0xF4++0x03
|
|
line.long 0x00 "BUF3_CMD,No Description"
|
|
bitfld.long 0x00 1. "PREFETCH,Prefetch" "0,1"
|
|
bitfld.long 0x00 0. "CLEAR,Buffer Clear" "0,1"
|
|
wgroup.long 0xF8++0x03
|
|
line.long 0x00 "BUF3_FIFOASYNC,No Description"
|
|
bitfld.long 0x00 0. "RST,Reset ASYNC" "0,1"
|
|
rgroup.long 0xFC++0x03
|
|
line.long 0x00 "BUF3_READDATA32,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "READDATA32,Buffer Read Data"
|
|
wgroup.long 0x100++0x03
|
|
line.long 0x00 "BUF3_WRITEDATA32,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRITEDATA32,Buffer Write Data"
|
|
wgroup.long 0x104++0x03
|
|
line.long 0x00 "BUF3_XWRITE32,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "XORWRITEDATA32,Buffer XOR Write Data"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "IF,No Description"
|
|
bitfld.long 0x00 31. "BUSERROR,Bus Error" "0,1"
|
|
bitfld.long 0x00 28. "BUF3NWA,Buffer 3 Not Word-Aligned" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "BUF3CORR,Buffer 3 Corrupt" "0,1"
|
|
bitfld.long 0x00 26. "BUF3THR,Buffer 3 Threshold Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "BUF3UF,Buffer 3 Underflow" "0,1"
|
|
bitfld.long 0x00 24. "BUF3OF,Buffer 3 Overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "BUF2NWA,Buffer 2 Not Word-Aligned" "0,1"
|
|
bitfld.long 0x00 19. "BUF2CORR,Buffer 2 Corrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "BUF2THR,Buffer 2 Threshold Event" "0,1"
|
|
bitfld.long 0x00 17. "BUF2UF,Buffer 2 Underflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "BUF2OF,Buffer 2 Overflow" "0,1"
|
|
bitfld.long 0x00 12. "BUF1NWA,Buffer 1 Not Word-Aligned" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "BUF1CORR,Buffer 1 Corrupt" "0,1"
|
|
bitfld.long 0x00 10. "BUF1THR,Buffer 1 Threshold Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "BUF1UF,Buffer 1 Underflow" "0,1"
|
|
bitfld.long 0x00 8. "BUF1OF,Buffer 1 Overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "BUF0NWA,Buffer 0 Not Word-Aligned" "0,1"
|
|
bitfld.long 0x00 3. "BUF0CORR,Buffer 0 Corrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "BUF0THR,Buffer 0 Threshold Event" "0,1"
|
|
bitfld.long 0x00 1. "BUF0UF,Buffer 0 Underflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "BUF0OF,Buffer 0 Overflow" "0,1"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "IEN,No Description"
|
|
bitfld.long 0x00 31. "BUSERROR,BUSERROR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 28. "BUF3NWA,BUF3NWA Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "BUF3CORR,BUF3CORR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 26. "BUF3THR,BUF3THR Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "BUF3UF,BUF3UF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 24. "BUF3OF,BUF3OF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "BUF2NWA,BUF2NWA Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 19. "BUF2CORR,BUF2CORR Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "BUF2THR,BUF2THR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 17. "BUF2UF,BUF2UF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "BUF2OF,BUF2OF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 12. "BUF1NWA,BUF1NWA Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "BUF1CORR,BUF1CORR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 10. "BUF1THR,BUF1THR Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "BUF1UF,BUF1UF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 8. "BUF1OF,BUF1OF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "BUF0NWA,BUF0NWA Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. "BUF0CORR,BUF0CORR Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "BUF0THR,BUF0THR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. "BUF0UF,BUF0UF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "BUF0OF,BUF0OF Interrupt Enable" "0,1"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "SEQIF,No Description"
|
|
bitfld.long 0x00 31. "BUSERROR,Bus Error" "0,1"
|
|
bitfld.long 0x00 28. "BUF3NWA,Buffer 3 Not Word-Aligned" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "BUF3CORR,Buffer 3 Corrupt" "0,1"
|
|
bitfld.long 0x00 26. "BUF3THR,Buffer 3 Threshold Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "BUF3UF,Buffer 3 Underflow" "0,1"
|
|
bitfld.long 0x00 24. "BUF3OF,Buffer 3 Overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "BUF2NWA,Buffer 2 Not Word-Aligned" "0,1"
|
|
bitfld.long 0x00 19. "BUF2CORR,Buffer 2 Corrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "BUF2THR,Buffer 2 Threshold Event" "0,1"
|
|
bitfld.long 0x00 17. "BUF2UF,Buffer 2 Underflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "BUF2OF,Buffer 2 Overflow" "0,1"
|
|
bitfld.long 0x00 12. "BUF1NWA,Buffer 1 Not Word-Aligned" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "BUF1CORR,Buffer 1 Corrupt" "0,1"
|
|
bitfld.long 0x00 10. "BUF1THR,Buffer 1 Threshold Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "BUF1UF,Buffer 1 Underflow" "0,1"
|
|
bitfld.long 0x00 8. "BUF1OF,Buffer 1 Overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "BUF0NWA,Buffer 0 Not Word-Aligned" "0,1"
|
|
bitfld.long 0x00 3. "BUF0CORR,Buffer 0 Corrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "BUF0THR,Buffer 0 Threshold Event" "0,1"
|
|
bitfld.long 0x00 1. "BUF0UF,Buffer 0 Underflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "BUF0OF,Buffer 0 Overflow" "0,1"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "SEQIEN,No Description"
|
|
bitfld.long 0x00 31. "BUSERROR,BUSERROR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 28. "BUF3NWA,BUF3NWA Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "BUF3CORR,BUF3CORR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 26. "BUF3THR,BUF3THR Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "BUF3UF,BUF3UF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 24. "BUF3OF,BUF3OF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "BUF2NWA,BUF2NWA Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 19. "BUF2CORR,BUF2CORR Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "BUF2THR,BUF2THR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 17. "BUF2UF,BUF2UF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "BUF2OF,BUF2OF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 12. "BUF1NWA,BUF1NWA Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "BUF1CORR,BUF1CORR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 10. "BUF1THR,BUF1THR Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "BUF1UF,BUF1UF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 8. "BUF1OF,BUF1OF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "BUF0NWA,BUF0NWA Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. "BUF0CORR,BUF0CORR Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "BUF0THR,BUF0THR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. "BUF0UF,BUF0UF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "BUF0OF,BUF0OF Interrupt Enable" "0,1"
|
|
tree.end
|
|
tree "BUFC_S"
|
|
base ad:0xAA000000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "IPVERSION,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "IPVERSION,IP Version"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "EN,No Description"
|
|
bitfld.long 0x00 0. "EN,Enable peripheral clock to this module" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "LPMODE,No Description"
|
|
bitfld.long 0x00 1. "LPENBYM33,Low power mode enable from M33" "0,1"
|
|
bitfld.long 0x00 0. "LPENBYSEQ,Low power mode enable from M0p sequencer" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "BUF0_CTRL,No Description"
|
|
bitfld.long 0x00 0.--2. "SIZE,Buffer Size" "0: Sets Buffer size to 64 bytes,1: Sets Buffer size to 128 bytes,2: Sets Buffer size to 256 bytes,3: Sets Buffer size to 512 bytes,4: Sets Buffer size to 1024 bytes,5: Sets Buffer size to 2048 bytes,6: Sets Buffer size to 4096 bytes,?..."
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "BUF0_ADDR,No Description"
|
|
hexmask.long 0x00 2.--31. 1. "ADDR,Buffer Address"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "BUF0_WRITEOFFSET,No Description"
|
|
hexmask.long.word 0x00 0.--12. 1. "WRITEOFFSET,Write Offset"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "BUF0_READOFFSET,No Description"
|
|
hexmask.long.word 0x00 0.--12. 1. "READOFFSET,Read Offset"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "BUF0_READDATA,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "READDATA,Buffer Read Data"
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "BUF0_WRITEDATA,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "WRITEDATA,Buffer Write Data"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "BUF0_XWRITE,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "XORWRITEDATA,Buffer XOR Write Data"
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "BUF0_STATUS,No Description"
|
|
bitfld.long 0x00 20. "THRESHOLDFLAG,Buffer Threshold Flag" "0,1"
|
|
hexmask.long.word 0x00 0.--12. 1. "BYTES,Number of Bytes in the Buffer"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "BUF0_THRESHOLDCTRL,No Description"
|
|
bitfld.long 0x00 13. "THRESHOLDMODE,Buffer Threshold Mode" "0: THRESHOLDIF will be set if BYTES is larger..,1: THRESHOLDIF will be set if BYTES is less than.."
|
|
hexmask.long.word 0x00 0.--11. 1. "THRESHOLD,Buffer Threshold Value"
|
|
wgroup.long 0x34++0x03
|
|
line.long 0x00 "BUF0_CMD,No Description"
|
|
bitfld.long 0x00 1. "PREFETCH,Prefetch" "0,1"
|
|
bitfld.long 0x00 0. "CLEAR,Buffer Clear" "0,1"
|
|
wgroup.long 0x38++0x03
|
|
line.long 0x00 "BUF0_FIFOASYNC,No Description"
|
|
bitfld.long 0x00 0. "RST,Reset ASYNC" "0,1"
|
|
rgroup.long 0x3C++0x03
|
|
line.long 0x00 "BUF0_READDATA32,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "READDATA32,Buffer Read Data"
|
|
wgroup.long 0x40++0x03
|
|
line.long 0x00 "BUF0_WRITEDATA32,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRITEDATA32,Buffer Write Data"
|
|
wgroup.long 0x44++0x03
|
|
line.long 0x00 "BUF0_XWRITE32,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "XORWRITEDATA32,Buffer XOR Write Data"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "BUF1_CTRL,No Description"
|
|
bitfld.long 0x00 0.--2. "SIZE,Buffer Size" "0: Sets Buffer size to 64 bytes,1: Sets Buffer size to 128 bytes,2: Sets Buffer size to 256 bytes,3: Sets Buffer size to 512 bytes,4: Sets Buffer size to 1024 bytes,5: Sets Buffer size to 2048 bytes,6: Sets Buffer size to 4096 bytes,?..."
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "BUF1_ADDR,No Description"
|
|
hexmask.long 0x00 2.--31. 1. "ADDR,Buffer Address"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "BUF1_WRITEOFFSET,No Description"
|
|
hexmask.long.word 0x00 0.--12. 1. "WRITEOFFSET,Write Offset"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "BUF1_READOFFSET,No Description"
|
|
hexmask.long.word 0x00 0.--12. 1. "READOFFSET,Read Offset"
|
|
rgroup.long 0x60++0x03
|
|
line.long 0x00 "BUF1_READDATA,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "READDATA,Buffer Read Data"
|
|
wgroup.long 0x64++0x03
|
|
line.long 0x00 "BUF1_WRITEDATA,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "WRITEDATA,Buffer Write Data"
|
|
wgroup.long 0x68++0x03
|
|
line.long 0x00 "BUF1_XWRITE,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "XORWRITEDATA,Buffer XOR Write Data"
|
|
rgroup.long 0x6C++0x03
|
|
line.long 0x00 "BUF1_STATUS,No Description"
|
|
bitfld.long 0x00 20. "THRESHOLDFLAG,Buffer Threshold Flag" "0,1"
|
|
hexmask.long.word 0x00 0.--12. 1. "BYTES,Number of Bytes in the Buffer"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "BUF1_THRESHOLDCTRL,No Description"
|
|
bitfld.long 0x00 13. "THRESHOLDMODE,Buffer Threshold Mode" "0: THRESHOLDIF will be set if BYTES is larger..,1: THRESHOLDIF will be set if BYTES is less than.."
|
|
hexmask.long.word 0x00 0.--11. 1. "THRESHOLD,Buffer Threshold Value"
|
|
wgroup.long 0x74++0x03
|
|
line.long 0x00 "BUF1_CMD,No Description"
|
|
bitfld.long 0x00 1. "PREFETCH,Prefetch" "0,1"
|
|
bitfld.long 0x00 0. "CLEAR,Buffer Clear" "0,1"
|
|
wgroup.long 0x78++0x03
|
|
line.long 0x00 "BUF1_FIFOASYNC,No Description"
|
|
bitfld.long 0x00 0. "RST,Reset ASYNC" "0,1"
|
|
rgroup.long 0x7C++0x03
|
|
line.long 0x00 "BUF1_READDATA32,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "READDATA32,Buffer Read Data"
|
|
wgroup.long 0x80++0x03
|
|
line.long 0x00 "BUF1_WRITEDATA32,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRITEDATA32,Buffer Write Data"
|
|
wgroup.long 0x84++0x03
|
|
line.long 0x00 "BUF1_XWRITE32,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "XORWRITEDATA32,Buffer XOR Write Data"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "BUF2_CTRL,No Description"
|
|
bitfld.long 0x00 0.--2. "SIZE,Buffer Size" "0: Sets Buffer size to 64 bytes,1: Sets Buffer size to 128 bytes,2: Sets Buffer size to 256 bytes,3: Sets Buffer size to 512 bytes,4: Sets Buffer size to 1024 bytes,5: Sets Buffer size to 2048 bytes,6: Sets Buffer size to 4096 bytes,?..."
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "BUF2_ADDR,No Description"
|
|
hexmask.long 0x00 2.--31. 1. "ADDR,Buffer Address"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "BUF2_WRITEOFFSET,No Description"
|
|
hexmask.long.word 0x00 0.--12. 1. "WRITEOFFSET,Write Offset"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "BUF2_READOFFSET,No Description"
|
|
hexmask.long.word 0x00 0.--12. 1. "READOFFSET,Read Offset"
|
|
rgroup.long 0xA0++0x03
|
|
line.long 0x00 "BUF2_READDATA,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "READDATA,Buffer Read Data"
|
|
wgroup.long 0xA4++0x03
|
|
line.long 0x00 "BUF2_WRITEDATA,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "WRITEDATA,Buffer Write Data"
|
|
wgroup.long 0xA8++0x03
|
|
line.long 0x00 "BUF2_XWRITE,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "XORWRITEDATA,Buffer XOR Write Data"
|
|
rgroup.long 0xAC++0x03
|
|
line.long 0x00 "BUF2_STATUS,No Description"
|
|
bitfld.long 0x00 20. "THRESHOLDFLAG,Buffer Threshold Flag" "0,1"
|
|
hexmask.long.word 0x00 0.--12. 1. "BYTES,Number of Bytes in the Buffer"
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "BUF2_THRESHOLDCTRL,No Description"
|
|
bitfld.long 0x00 13. "THRESHOLDMODE,Buffer Threshold Mode" "0: THRESHOLDIF will be set if BYTES is larger..,1: THRESHOLDIF will be set if BYTES is less than.."
|
|
hexmask.long.word 0x00 0.--11. 1. "THRESHOLD,Buffer Threshold Value"
|
|
wgroup.long 0xB4++0x03
|
|
line.long 0x00 "BUF2_CMD,No Description"
|
|
bitfld.long 0x00 1. "PREFETCH,Prefetch" "0,1"
|
|
bitfld.long 0x00 0. "CLEAR,Buffer Clear" "0,1"
|
|
wgroup.long 0xB8++0x03
|
|
line.long 0x00 "BUF2_FIFOASYNC,No Description"
|
|
bitfld.long 0x00 0. "RST,Reset ASYNC" "0,1"
|
|
rgroup.long 0xBC++0x03
|
|
line.long 0x00 "BUF2_READDATA32,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "READDATA32,Buffer Read Data"
|
|
wgroup.long 0xC0++0x03
|
|
line.long 0x00 "BUF2_WRITEDATA32,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRITEDATA32,Buffer Write Data"
|
|
wgroup.long 0xC4++0x03
|
|
line.long 0x00 "BUF2_XWRITE32,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "XORWRITEDATA32,Buffer XOR Write Data"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "BUF3_CTRL,No Description"
|
|
bitfld.long 0x00 0.--2. "SIZE,Buffer Size" "0: Sets Buffer size to 64 bytes,1: Sets Buffer size to 128 bytes,2: Sets Buffer size to 256 bytes,3: Sets Buffer size to 512 bytes,4: Sets Buffer size to 1024 bytes,5: Sets Buffer size to 2048 bytes,6: Sets Buffer size to 4096 bytes,?..."
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "BUF3_ADDR,No Description"
|
|
hexmask.long 0x00 2.--31. 1. "ADDR,Buffer Address"
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "BUF3_WRITEOFFSET,No Description"
|
|
hexmask.long.word 0x00 0.--12. 1. "WRITEOFFSET,Write Offset"
|
|
group.long 0xD8++0x03
|
|
line.long 0x00 "BUF3_READOFFSET,No Description"
|
|
hexmask.long.word 0x00 0.--12. 1. "READOFFSET,Read Offset"
|
|
rgroup.long 0xE0++0x03
|
|
line.long 0x00 "BUF3_READDATA,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "READDATA,Buffer Read Data"
|
|
wgroup.long 0xE4++0x03
|
|
line.long 0x00 "BUF3_WRITEDATA,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "WRITEDATA,Buffer Write Data"
|
|
wgroup.long 0xE8++0x03
|
|
line.long 0x00 "BUF3_XWRITE,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "XORWRITEDATA,Buffer XOR Write Data"
|
|
rgroup.long 0xEC++0x03
|
|
line.long 0x00 "BUF3_STATUS,No Description"
|
|
bitfld.long 0x00 20. "THRESHOLDFLAG,Buffer Threshold Flag" "0,1"
|
|
hexmask.long.word 0x00 0.--12. 1. "BYTES,Number of Bytes in the Buffer"
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "BUF3_THRESHOLDCTRL,No Description"
|
|
bitfld.long 0x00 13. "THRESHOLDMODE,Buffer Threshold Mode" "0: THRESHOLDIF will be set if BYTES is larger..,1: THRESHOLDIF will be set if BYTES is less than.."
|
|
hexmask.long.word 0x00 0.--11. 1. "THRESHOLD,Buffer Threshold Value"
|
|
wgroup.long 0xF4++0x03
|
|
line.long 0x00 "BUF3_CMD,No Description"
|
|
bitfld.long 0x00 1. "PREFETCH,Prefetch" "0,1"
|
|
bitfld.long 0x00 0. "CLEAR,Buffer Clear" "0,1"
|
|
wgroup.long 0xF8++0x03
|
|
line.long 0x00 "BUF3_FIFOASYNC,No Description"
|
|
bitfld.long 0x00 0. "RST,Reset ASYNC" "0,1"
|
|
rgroup.long 0xFC++0x03
|
|
line.long 0x00 "BUF3_READDATA32,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "READDATA32,Buffer Read Data"
|
|
wgroup.long 0x100++0x03
|
|
line.long 0x00 "BUF3_WRITEDATA32,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRITEDATA32,Buffer Write Data"
|
|
wgroup.long 0x104++0x03
|
|
line.long 0x00 "BUF3_XWRITE32,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "XORWRITEDATA32,Buffer XOR Write Data"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "IF,No Description"
|
|
bitfld.long 0x00 31. "BUSERROR,Bus Error" "0,1"
|
|
bitfld.long 0x00 28. "BUF3NWA,Buffer 3 Not Word-Aligned" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "BUF3CORR,Buffer 3 Corrupt" "0,1"
|
|
bitfld.long 0x00 26. "BUF3THR,Buffer 3 Threshold Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "BUF3UF,Buffer 3 Underflow" "0,1"
|
|
bitfld.long 0x00 24. "BUF3OF,Buffer 3 Overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "BUF2NWA,Buffer 2 Not Word-Aligned" "0,1"
|
|
bitfld.long 0x00 19. "BUF2CORR,Buffer 2 Corrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "BUF2THR,Buffer 2 Threshold Event" "0,1"
|
|
bitfld.long 0x00 17. "BUF2UF,Buffer 2 Underflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "BUF2OF,Buffer 2 Overflow" "0,1"
|
|
bitfld.long 0x00 12. "BUF1NWA,Buffer 1 Not Word-Aligned" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "BUF1CORR,Buffer 1 Corrupt" "0,1"
|
|
bitfld.long 0x00 10. "BUF1THR,Buffer 1 Threshold Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "BUF1UF,Buffer 1 Underflow" "0,1"
|
|
bitfld.long 0x00 8. "BUF1OF,Buffer 1 Overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "BUF0NWA,Buffer 0 Not Word-Aligned" "0,1"
|
|
bitfld.long 0x00 3. "BUF0CORR,Buffer 0 Corrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "BUF0THR,Buffer 0 Threshold Event" "0,1"
|
|
bitfld.long 0x00 1. "BUF0UF,Buffer 0 Underflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "BUF0OF,Buffer 0 Overflow" "0,1"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "IEN,No Description"
|
|
bitfld.long 0x00 31. "BUSERROR,BUSERROR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 28. "BUF3NWA,BUF3NWA Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "BUF3CORR,BUF3CORR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 26. "BUF3THR,BUF3THR Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "BUF3UF,BUF3UF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 24. "BUF3OF,BUF3OF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "BUF2NWA,BUF2NWA Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 19. "BUF2CORR,BUF2CORR Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "BUF2THR,BUF2THR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 17. "BUF2UF,BUF2UF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "BUF2OF,BUF2OF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 12. "BUF1NWA,BUF1NWA Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "BUF1CORR,BUF1CORR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 10. "BUF1THR,BUF1THR Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "BUF1UF,BUF1UF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 8. "BUF1OF,BUF1OF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "BUF0NWA,BUF0NWA Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. "BUF0CORR,BUF0CORR Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "BUF0THR,BUF0THR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. "BUF0UF,BUF0UF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "BUF0OF,BUF0OF Interrupt Enable" "0,1"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "SEQIF,No Description"
|
|
bitfld.long 0x00 31. "BUSERROR,Bus Error" "0,1"
|
|
bitfld.long 0x00 28. "BUF3NWA,Buffer 3 Not Word-Aligned" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "BUF3CORR,Buffer 3 Corrupt" "0,1"
|
|
bitfld.long 0x00 26. "BUF3THR,Buffer 3 Threshold Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "BUF3UF,Buffer 3 Underflow" "0,1"
|
|
bitfld.long 0x00 24. "BUF3OF,Buffer 3 Overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "BUF2NWA,Buffer 2 Not Word-Aligned" "0,1"
|
|
bitfld.long 0x00 19. "BUF2CORR,Buffer 2 Corrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "BUF2THR,Buffer 2 Threshold Event" "0,1"
|
|
bitfld.long 0x00 17. "BUF2UF,Buffer 2 Underflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "BUF2OF,Buffer 2 Overflow" "0,1"
|
|
bitfld.long 0x00 12. "BUF1NWA,Buffer 1 Not Word-Aligned" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "BUF1CORR,Buffer 1 Corrupt" "0,1"
|
|
bitfld.long 0x00 10. "BUF1THR,Buffer 1 Threshold Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "BUF1UF,Buffer 1 Underflow" "0,1"
|
|
bitfld.long 0x00 8. "BUF1OF,Buffer 1 Overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "BUF0NWA,Buffer 0 Not Word-Aligned" "0,1"
|
|
bitfld.long 0x00 3. "BUF0CORR,Buffer 0 Corrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "BUF0THR,Buffer 0 Threshold Event" "0,1"
|
|
bitfld.long 0x00 1. "BUF0UF,Buffer 0 Underflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "BUF0OF,Buffer 0 Overflow" "0,1"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "SEQIEN,No Description"
|
|
bitfld.long 0x00 31. "BUSERROR,BUSERROR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 28. "BUF3NWA,BUF3NWA Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "BUF3CORR,BUF3CORR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 26. "BUF3THR,BUF3THR Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "BUF3UF,BUF3UF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 24. "BUF3OF,BUF3OF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "BUF2NWA,BUF2NWA Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 19. "BUF2CORR,BUF2CORR Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "BUF2THR,BUF2THR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 17. "BUF2UF,BUF2UF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "BUF2OF,BUF2OF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 12. "BUF1NWA,BUF1NWA Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "BUF1CORR,BUF1CORR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 10. "BUF1THR,BUF1THR Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "BUF1UF,BUF1UF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 8. "BUF1OF,BUF1OF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "BUF0NWA,BUF0NWA Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. "BUF0CORR,BUF0CORR Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "BUF0THR,BUF0THR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. "BUF0UF,BUF0UF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "BUF0OF,BUF0OF Interrupt Enable" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "BURAM (Backup RAM)"
|
|
base ad:0x0
|
|
tree "BURAM_NS"
|
|
base ad:0x50080000
|
|
group.long 0x0++0x7F
|
|
line.long 0x0 "RET0_REG,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x4 "RET1_REG,No Description"
|
|
hexmask.long 0x4 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x8 "RET2_REG,No Description"
|
|
hexmask.long 0x8 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0xC "RET3_REG,No Description"
|
|
hexmask.long 0xC 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x10 "RET4_REG,No Description"
|
|
hexmask.long 0x10 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x14 "RET5_REG,No Description"
|
|
hexmask.long 0x14 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x18 "RET6_REG,No Description"
|
|
hexmask.long 0x18 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x1C "RET7_REG,No Description"
|
|
hexmask.long 0x1C 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x20 "RET8_REG,No Description"
|
|
hexmask.long 0x20 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x24 "RET9_REG,No Description"
|
|
hexmask.long 0x24 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x28 "RET10_REG,No Description"
|
|
hexmask.long 0x28 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x2C "RET11_REG,No Description"
|
|
hexmask.long 0x2C 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x30 "RET12_REG,No Description"
|
|
hexmask.long 0x30 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x34 "RET13_REG,No Description"
|
|
hexmask.long 0x34 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x38 "RET14_REG,No Description"
|
|
hexmask.long 0x38 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x3C "RET15_REG,No Description"
|
|
hexmask.long 0x3C 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x40 "RET16_REG,No Description"
|
|
hexmask.long 0x40 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x44 "RET17_REG,No Description"
|
|
hexmask.long 0x44 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x48 "RET18_REG,No Description"
|
|
hexmask.long 0x48 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x4C "RET19_REG,No Description"
|
|
hexmask.long 0x4C 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x50 "RET20_REG,No Description"
|
|
hexmask.long 0x50 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x54 "RET21_REG,No Description"
|
|
hexmask.long 0x54 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x58 "RET22_REG,No Description"
|
|
hexmask.long 0x58 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x5C "RET23_REG,No Description"
|
|
hexmask.long 0x5C 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x60 "RET24_REG,No Description"
|
|
hexmask.long 0x60 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x64 "RET25_REG,No Description"
|
|
hexmask.long 0x64 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x68 "RET26_REG,No Description"
|
|
hexmask.long 0x68 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x6C "RET27_REG,No Description"
|
|
hexmask.long 0x6C 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x70 "RET28_REG,No Description"
|
|
hexmask.long 0x70 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x74 "RET29_REG,No Description"
|
|
hexmask.long 0x74 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x78 "RET30_REG,No Description"
|
|
hexmask.long 0x78 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x7C "RET31_REG,No Description"
|
|
hexmask.long 0x7C 0.--31. 1. "RETREG,Latch based Retention register"
|
|
tree.end
|
|
tree "BURAM_S"
|
|
base ad:0x40080000
|
|
group.long 0x0++0x7F
|
|
line.long 0x0 "RET0_REG,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x4 "RET1_REG,No Description"
|
|
hexmask.long 0x4 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x8 "RET2_REG,No Description"
|
|
hexmask.long 0x8 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0xC "RET3_REG,No Description"
|
|
hexmask.long 0xC 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x10 "RET4_REG,No Description"
|
|
hexmask.long 0x10 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x14 "RET5_REG,No Description"
|
|
hexmask.long 0x14 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x18 "RET6_REG,No Description"
|
|
hexmask.long 0x18 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x1C "RET7_REG,No Description"
|
|
hexmask.long 0x1C 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x20 "RET8_REG,No Description"
|
|
hexmask.long 0x20 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x24 "RET9_REG,No Description"
|
|
hexmask.long 0x24 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x28 "RET10_REG,No Description"
|
|
hexmask.long 0x28 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x2C "RET11_REG,No Description"
|
|
hexmask.long 0x2C 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x30 "RET12_REG,No Description"
|
|
hexmask.long 0x30 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x34 "RET13_REG,No Description"
|
|
hexmask.long 0x34 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x38 "RET14_REG,No Description"
|
|
hexmask.long 0x38 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x3C "RET15_REG,No Description"
|
|
hexmask.long 0x3C 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x40 "RET16_REG,No Description"
|
|
hexmask.long 0x40 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x44 "RET17_REG,No Description"
|
|
hexmask.long 0x44 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x48 "RET18_REG,No Description"
|
|
hexmask.long 0x48 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x4C "RET19_REG,No Description"
|
|
hexmask.long 0x4C 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x50 "RET20_REG,No Description"
|
|
hexmask.long 0x50 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x54 "RET21_REG,No Description"
|
|
hexmask.long 0x54 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x58 "RET22_REG,No Description"
|
|
hexmask.long 0x58 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x5C "RET23_REG,No Description"
|
|
hexmask.long 0x5C 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x60 "RET24_REG,No Description"
|
|
hexmask.long 0x60 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x64 "RET25_REG,No Description"
|
|
hexmask.long 0x64 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x68 "RET26_REG,No Description"
|
|
hexmask.long 0x68 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x6C "RET27_REG,No Description"
|
|
hexmask.long 0x6C 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x70 "RET28_REG,No Description"
|
|
hexmask.long 0x70 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x74 "RET29_REG,No Description"
|
|
hexmask.long 0x74 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x78 "RET30_REG,No Description"
|
|
hexmask.long 0x78 0.--31. 1. "RETREG,Latch based Retention register"
|
|
line.long 0x7C "RET31_REG,No Description"
|
|
hexmask.long 0x7C 0.--31. 1. "RETREG,Latch based Retention register"
|
|
tree.end
|
|
tree.end
|
|
tree "BURTC (Backup Real Time Counter)"
|
|
base ad:0x0
|
|
tree "BURTC_NS"
|
|
base ad:0x50064000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version ID"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,BURTC Enable" "0,1"
|
|
line.long 0x4 "CFG,No Description"
|
|
hexmask.long.byte 0x4 4.--7. 1. "CNTPRESC,Counter prescaler value."
|
|
bitfld.long 0x4 1. "COMPTOP,Compare Channel is Top Value" "0: The top value of the BURTC is 4294967295..,1: The top value of the BURTC is given by COMP"
|
|
newline
|
|
bitfld.long 0x4 0. "DEBUGRUN,Debug Mode Run Enable" "0: BURTC is frozen in debug mode,1: BURTC is running in debug mode"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 1. "STOP,Stop BURTC counter" "0,1"
|
|
bitfld.long 0x0 0. "START,Start BURTC counter" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 1. "LOCK,Configuration Lock Status" "0: All BURTC lockable registers are unlocked.,1: All BURTC lockable registers are locked."
|
|
bitfld.long 0x0 0. "RUNNING,BURTC running status" "0,1"
|
|
group.long 0x14++0x13
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 1. "COMP,Compare Match Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 0. "OF,Overflow Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 1. "COMP,Compare Match Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 0. "OF,Overflow Interrupt Flag" "0,1"
|
|
line.long 0x8 "PRECNT,No Description"
|
|
hexmask.long.word 0x8 0.--14. 1. "PRECNT,Pre-Counter Value"
|
|
line.long 0xC "CNT,No Description"
|
|
hexmask.long 0xC 0.--31. 1. "CNT,Counter Value"
|
|
line.long 0x10 "EM4WUEN,No Description"
|
|
bitfld.long 0x10 1. "COMPEM4WUEN,Compare Match EM4 Wakeup Enable" "0,1"
|
|
bitfld.long 0x10 0. "OFEM4WUEN,Overflow EM4 Wakeup Enable" "0,1"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x0 "SYNCBUSY,No Description"
|
|
bitfld.long 0x0 5. "EN,Sync busy for EN" "0,1"
|
|
bitfld.long 0x0 4. "COMP,Sync busy for COMP" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CNT,Sync busy for CNT" "0,1"
|
|
bitfld.long 0x0 2. "PRECNT,Sync busy for PRECNT" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "STOP,Sync busy for STOP" "0,1"
|
|
bitfld.long 0x0 0. "START,Sync busy for START" "0,1"
|
|
wgroup.long 0x2C++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Configuration Lock Key"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "COMP,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "COMP,Compare Value"
|
|
tree.end
|
|
tree "BURTC_S"
|
|
base ad:0x40064000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version ID"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,BURTC Enable" "0,1"
|
|
line.long 0x4 "CFG,No Description"
|
|
hexmask.long.byte 0x4 4.--7. 1. "CNTPRESC,Counter prescaler value."
|
|
bitfld.long 0x4 1. "COMPTOP,Compare Channel is Top Value" "0: The top value of the BURTC is 4294967295..,1: The top value of the BURTC is given by COMP"
|
|
newline
|
|
bitfld.long 0x4 0. "DEBUGRUN,Debug Mode Run Enable" "0: BURTC is frozen in debug mode,1: BURTC is running in debug mode"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 1. "STOP,Stop BURTC counter" "0,1"
|
|
bitfld.long 0x0 0. "START,Start BURTC counter" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 1. "LOCK,Configuration Lock Status" "0: All BURTC lockable registers are unlocked.,1: All BURTC lockable registers are locked."
|
|
bitfld.long 0x0 0. "RUNNING,BURTC running status" "0,1"
|
|
group.long 0x14++0x13
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 1. "COMP,Compare Match Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 0. "OF,Overflow Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 1. "COMP,Compare Match Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 0. "OF,Overflow Interrupt Flag" "0,1"
|
|
line.long 0x8 "PRECNT,No Description"
|
|
hexmask.long.word 0x8 0.--14. 1. "PRECNT,Pre-Counter Value"
|
|
line.long 0xC "CNT,No Description"
|
|
hexmask.long 0xC 0.--31. 1. "CNT,Counter Value"
|
|
line.long 0x10 "EM4WUEN,No Description"
|
|
bitfld.long 0x10 1. "COMPEM4WUEN,Compare Match EM4 Wakeup Enable" "0,1"
|
|
bitfld.long 0x10 0. "OFEM4WUEN,Overflow EM4 Wakeup Enable" "0,1"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x0 "SYNCBUSY,No Description"
|
|
bitfld.long 0x0 5. "EN,Sync busy for EN" "0,1"
|
|
bitfld.long 0x0 4. "COMP,Sync busy for COMP" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CNT,Sync busy for CNT" "0,1"
|
|
bitfld.long 0x0 2. "PRECNT,Sync busy for PRECNT" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "STOP,Sync busy for STOP" "0,1"
|
|
bitfld.long 0x0 0. "START,Sync busy for START" "0,1"
|
|
wgroup.long 0x2C++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Configuration Lock Key"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "COMP,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "COMP,Compare Value"
|
|
tree.end
|
|
tree.end
|
|
tree "CMU (Clock Management Unit)"
|
|
base ad:0x0
|
|
tree "CMU_NS"
|
|
base ad:0x50008000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version ID"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 31. "LOCK,Configuration Lock Status" "0: Configuration lock is unlocked,1: Configuration lock is locked"
|
|
bitfld.long 0x0 30. "WDOGLOCK,Configuration Lock Status for WDOG" "0: WDOG configuration lock is unlocked,1: WDOG configuration lock is locked"
|
|
newline
|
|
bitfld.long 0x0 0. "CALRDY,Calibration Ready" "0,1"
|
|
wgroup.long 0x10++0x7
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Configuration Lock Key"
|
|
line.long 0x4 "WDOGLOCK,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "LOCKKEY,Configuration Lock Key"
|
|
group.long 0x20++0x7
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 1. "CALOF,Calibration Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 0. "CALRDY,Calibration Ready Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 1. "CALOF,Calibration Overflow Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "CALRDY,Calibration Ready Interrupt Enable" "0,1"
|
|
wgroup.long 0x50++0x3
|
|
line.long 0x0 "CALCMD,No Description"
|
|
bitfld.long 0x0 1. "CALSTOP,Calibration Stop" "0,1"
|
|
bitfld.long 0x0 0. "CALSTART,Calibration Start" "0,1"
|
|
group.long 0x54++0x3
|
|
line.long 0x0 "CALCTRL,No Description"
|
|
hexmask.long.byte 0x0 28.--31. 1. "DOWNSEL,Calibration Down-counter Select"
|
|
hexmask.long.byte 0x0 24.--27. 1. "UPSEL,Calibration Up-counter Select"
|
|
newline
|
|
bitfld.long 0x0 23. "CONT,Continuous Calibration" "0,1"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "CALTOP,Calibration Counter Top Value"
|
|
rgroup.long 0x58++0x3
|
|
line.long 0x0 "CALCNT,No Description"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "CALCNT,Calibration Result Counter Value"
|
|
group.long 0x64++0x7
|
|
line.long 0x0 "CLKEN0,No Description"
|
|
bitfld.long 0x0 31. "DCDC,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 30. "RTCC,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "BURTC,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 28. "BURAM,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "PRS,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 26. "GPIO,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "PDM,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 24. "EUART0,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "ULFRCO,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 22. "LFXO,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "LFRCO,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 20. "FSRCO,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "HFXO0,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 18. "HFRCO0,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "DPLL0,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 16. "SYSCFG,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "I2C1,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 14. "I2C0,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "WDOG0,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 12. "LETIMER0,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "AMUXCP0,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 10. "IADC0,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "USART1,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 8. "USART0,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TIMER3,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 6. "TIMER2,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "TIMER1,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 4. "TIMER0,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "GPCRC,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 2. "RADIOAES,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "LDMAXBAR,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 0. "LDMA,Enable Bus Clock" "0,1"
|
|
line.long 0x4 "CLKEN1,No Description"
|
|
bitfld.long 0x4 18. "TIMER4,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x4 17. "MSC,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "ICACHE0,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x4 15. "SMU,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "RFSENSE,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x4 13. "CRYPTOACC,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "IFADCDEBUG,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x4 11. "BUFC,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "PRORTC,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x4 9. "RDMAILBOX1,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "RDMAILBOX0,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x4 7. "RDSCRATCHPAD,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "SYNTH,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x4 5. "RAC,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "PROTIMER,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x4 3. "FRC,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "RFCRC,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x4 1. "MODEM,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "AGC,Enable Bus Clock" "0,1"
|
|
group.long 0x70++0x3
|
|
line.long 0x0 "SYSCLKCTRL,No Description"
|
|
bitfld.long 0x0 16. "RHCLKPRESC,Radio HCLK Prescaler" "0: Radio HCLK is SYSCLK divided by 1,1: Radio HCLK is SYSCLK divided by 2"
|
|
hexmask.long.byte 0x0 12.--15. 1. "HCLKPRESC,HCLK Prescaler"
|
|
newline
|
|
bitfld.long 0x0 10. "PCLKPRESC,PCLK Prescaler" "0: PCLK is HCLK divided by 1,1: PCLK is HCLK divided by 2"
|
|
bitfld.long 0x0 0.--2. "CLKSEL,Clock Select" "?,1: FSRCO is clocking SYSCLK,2: HFRCODPLL is clocking SYSCLK,3: HFXO is clocking SYSCLK,4: CLKIN0 is clocking SYSCLK,?,?,?"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "TRACECLKCTRL,No Description"
|
|
bitfld.long 0x0 4.--5. "PRESC,TRACECLK Prescaler" "0: TRACECLK is SYSCLK divided by 1,1: TRACECLK is SYSCLK divided by 2,?,3: TRACECLK is SYSCLK divided by 4"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "EXPORTCLKCTRL,No Description"
|
|
hexmask.long.byte 0x0 24.--28. 1. "PRESC,EXPORTCLK Prescaler"
|
|
hexmask.long.byte 0x0 16.--19. 1. "CLKOUTSEL2,Clock Output Select 2"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "CLKOUTSEL1,Clock Output Select 1"
|
|
hexmask.long.byte 0x0 0.--3. 1. "CLKOUTSEL0,Clock Output Select 0"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "DPLLREFCLKCTRL,No Description"
|
|
bitfld.long 0x0 0.--1. "CLKSEL,Clock Select" "0: DPLLREFCLK is not clocked,1: HFXO is clocking DPLLREFCLK,2: LFXO is clocking DPLLREFCLK,3: CLKIN0 is clocking DPLLREFCLK"
|
|
group.long 0x120++0x7
|
|
line.long 0x0 "EM01GRPACLKCTRL,No Description"
|
|
bitfld.long 0x0 0.--1. "CLKSEL,Clock Select" "?,1: HFRCODPLL is clocking EM01GRPACLK,2: HFXO is clocking EM01GRPACLK,3: FSRCO is clocking EM01GRPACLK"
|
|
line.long 0x4 "EM01GRPBCLKCTRL,No Description"
|
|
bitfld.long 0x4 0.--2. "CLKSEL,Clock Select" "?,1: HFRCODPLL is clocking EM01GRPBCLK,2: HFXO is clocking EM01GRPBCLK,3: FSRCO is clocking EM01GRPBCLK,4: CLKIN0 is clocking EM01GRPBCLK,5: HFRCODPLL (re-timed) is clocking EM01GRPBCLK,6: HFXO (re-timed) is clocking EM01GRPBCLK,?"
|
|
group.long 0x140++0x3
|
|
line.long 0x0 "EM23GRPACLKCTRL,No Description"
|
|
bitfld.long 0x0 0.--1. "CLKSEL,Clock Select" "?,1: LFRCO is clocking EM23GRPACLK,2: LFXO is clocking EM23GRPACLK,3: ULFRCO is clocking EM23GRPACLK"
|
|
group.long 0x160++0x3
|
|
line.long 0x0 "EM4GRPACLKCTRL,No Description"
|
|
bitfld.long 0x0 0.--1. "CLKSEL,Clock Select" "?,1: LFRCO is clocking EM4GRPACLK,2: LFXO is clocking EM4GRPACLK,3: ULFRCO is clocking EM4GRPACLK"
|
|
group.long 0x180++0x3
|
|
line.long 0x0 "IADCCLKCTRL,No Description"
|
|
bitfld.long 0x0 0.--1. "CLKSEL,Clock Select" "?,1: EM01GRPACLK is clocking IADCCLK,2: FSRCO is clocking IADCCLK,?"
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "WDOG0CLKCTRL,No Description"
|
|
bitfld.long 0x0 0.--2. "CLKSEL,Clock Select" "?,1: LFRCO is clocking WDOG0CLK,2: LFXO is clocking WDOG0CLK,3: ULFRCO is clocking WDOG0CLK,4: HCLKDIV1024 is clocking WDOG0CLK,?,?,?"
|
|
group.long 0x220++0x3
|
|
line.long 0x0 "EUART0CLKCTRL,No Description"
|
|
bitfld.long 0x0 0.--1. "CLKSEL,Clock Select" "0: UART is not clocked,1: EM01GRPACLK is clocking UART,2: EM23GRPACLK is clocking UART,?"
|
|
group.long 0x240++0x3
|
|
line.long 0x0 "RTCCCLKCTRL,No Description"
|
|
bitfld.long 0x0 0.--1. "CLKSEL,Clock Select" "?,1: LFRCO is clocking RTCCCLK,2: LFXO is clocking RTCCCLK,3: ULFRCO is clocking RTCCCLK"
|
|
group.long 0x248++0x3
|
|
line.long 0x0 "PRORTCCLKCTRL,No Description"
|
|
bitfld.long 0x0 0.--1. "CLKSEL,Clock Select" "?,1: LFRCO is clocking PRORTCCLK,2: LFXO is clocking PRORTCCLK,3: ULFRCO is clocking PRORTCCLK"
|
|
group.long 0x260++0x3
|
|
line.long 0x0 "CRYPTOACCCLKCTRL,No Description"
|
|
bitfld.long 0x0 1. "AESEN,AES Enable" "0,1"
|
|
bitfld.long 0x0 0. "PKEN,PK Enable" "0,1"
|
|
group.long 0x280++0x3
|
|
line.long 0x0 "RADIOCLKCTRL,No Description"
|
|
bitfld.long 0x0 31. "DBGCLK,Enable Clock for Debugger" "0,1"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
tree.end
|
|
tree "CMU_S"
|
|
base ad:0x40008000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version ID"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 31. "LOCK,Configuration Lock Status" "0: Configuration lock is unlocked,1: Configuration lock is locked"
|
|
bitfld.long 0x0 30. "WDOGLOCK,Configuration Lock Status for WDOG" "0: WDOG configuration lock is unlocked,1: WDOG configuration lock is locked"
|
|
newline
|
|
bitfld.long 0x0 0. "CALRDY,Calibration Ready" "0,1"
|
|
wgroup.long 0x10++0x7
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Configuration Lock Key"
|
|
line.long 0x4 "WDOGLOCK,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "LOCKKEY,Configuration Lock Key"
|
|
group.long 0x20++0x7
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 1. "CALOF,Calibration Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 0. "CALRDY,Calibration Ready Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 1. "CALOF,Calibration Overflow Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "CALRDY,Calibration Ready Interrupt Enable" "0,1"
|
|
wgroup.long 0x50++0x3
|
|
line.long 0x0 "CALCMD,No Description"
|
|
bitfld.long 0x0 1. "CALSTOP,Calibration Stop" "0,1"
|
|
bitfld.long 0x0 0. "CALSTART,Calibration Start" "0,1"
|
|
group.long 0x54++0x3
|
|
line.long 0x0 "CALCTRL,No Description"
|
|
hexmask.long.byte 0x0 28.--31. 1. "DOWNSEL,Calibration Down-counter Select"
|
|
hexmask.long.byte 0x0 24.--27. 1. "UPSEL,Calibration Up-counter Select"
|
|
newline
|
|
bitfld.long 0x0 23. "CONT,Continuous Calibration" "0,1"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "CALTOP,Calibration Counter Top Value"
|
|
rgroup.long 0x58++0x3
|
|
line.long 0x0 "CALCNT,No Description"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "CALCNT,Calibration Result Counter Value"
|
|
group.long 0x64++0x7
|
|
line.long 0x0 "CLKEN0,No Description"
|
|
bitfld.long 0x0 31. "DCDC,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 30. "RTCC,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "BURTC,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 28. "BURAM,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "PRS,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 26. "GPIO,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "PDM,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 24. "EUART0,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "ULFRCO,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 22. "LFXO,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "LFRCO,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 20. "FSRCO,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "HFXO0,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 18. "HFRCO0,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "DPLL0,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 16. "SYSCFG,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "I2C1,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 14. "I2C0,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "WDOG0,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 12. "LETIMER0,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "AMUXCP0,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 10. "IADC0,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "USART1,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 8. "USART0,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TIMER3,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 6. "TIMER2,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "TIMER1,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 4. "TIMER0,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "GPCRC,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 2. "RADIOAES,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "LDMAXBAR,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x0 0. "LDMA,Enable Bus Clock" "0,1"
|
|
line.long 0x4 "CLKEN1,No Description"
|
|
bitfld.long 0x4 18. "TIMER4,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x4 17. "MSC,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "ICACHE0,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x4 15. "SMU,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "RFSENSE,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x4 13. "CRYPTOACC,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "IFADCDEBUG,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x4 11. "BUFC,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "PRORTC,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x4 9. "RDMAILBOX1,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "RDMAILBOX0,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x4 7. "RDSCRATCHPAD,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "SYNTH,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x4 5. "RAC,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "PROTIMER,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x4 3. "FRC,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "RFCRC,Enable Bus Clock" "0,1"
|
|
bitfld.long 0x4 1. "MODEM,Enable Bus Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "AGC,Enable Bus Clock" "0,1"
|
|
group.long 0x70++0x3
|
|
line.long 0x0 "SYSCLKCTRL,No Description"
|
|
bitfld.long 0x0 16. "RHCLKPRESC,Radio HCLK Prescaler" "0: Radio HCLK is SYSCLK divided by 1,1: Radio HCLK is SYSCLK divided by 2"
|
|
hexmask.long.byte 0x0 12.--15. 1. "HCLKPRESC,HCLK Prescaler"
|
|
newline
|
|
bitfld.long 0x0 10. "PCLKPRESC,PCLK Prescaler" "0: PCLK is HCLK divided by 1,1: PCLK is HCLK divided by 2"
|
|
bitfld.long 0x0 0.--2. "CLKSEL,Clock Select" "?,1: FSRCO is clocking SYSCLK,2: HFRCODPLL is clocking SYSCLK,3: HFXO is clocking SYSCLK,4: CLKIN0 is clocking SYSCLK,?,?,?"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "TRACECLKCTRL,No Description"
|
|
bitfld.long 0x0 4.--5. "PRESC,TRACECLK Prescaler" "0: TRACECLK is SYSCLK divided by 1,1: TRACECLK is SYSCLK divided by 2,?,3: TRACECLK is SYSCLK divided by 4"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "EXPORTCLKCTRL,No Description"
|
|
hexmask.long.byte 0x0 24.--28. 1. "PRESC,EXPORTCLK Prescaler"
|
|
hexmask.long.byte 0x0 16.--19. 1. "CLKOUTSEL2,Clock Output Select 2"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "CLKOUTSEL1,Clock Output Select 1"
|
|
hexmask.long.byte 0x0 0.--3. 1. "CLKOUTSEL0,Clock Output Select 0"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "DPLLREFCLKCTRL,No Description"
|
|
bitfld.long 0x0 0.--1. "CLKSEL,Clock Select" "0: DPLLREFCLK is not clocked,1: HFXO is clocking DPLLREFCLK,2: LFXO is clocking DPLLREFCLK,3: CLKIN0 is clocking DPLLREFCLK"
|
|
group.long 0x120++0x7
|
|
line.long 0x0 "EM01GRPACLKCTRL,No Description"
|
|
bitfld.long 0x0 0.--1. "CLKSEL,Clock Select" "?,1: HFRCODPLL is clocking EM01GRPACLK,2: HFXO is clocking EM01GRPACLK,3: FSRCO is clocking EM01GRPACLK"
|
|
line.long 0x4 "EM01GRPBCLKCTRL,No Description"
|
|
bitfld.long 0x4 0.--2. "CLKSEL,Clock Select" "?,1: HFRCODPLL is clocking EM01GRPBCLK,2: HFXO is clocking EM01GRPBCLK,3: FSRCO is clocking EM01GRPBCLK,4: CLKIN0 is clocking EM01GRPBCLK,5: HFRCODPLL (re-timed) is clocking EM01GRPBCLK,6: HFXO (re-timed) is clocking EM01GRPBCLK,?"
|
|
group.long 0x140++0x3
|
|
line.long 0x0 "EM23GRPACLKCTRL,No Description"
|
|
bitfld.long 0x0 0.--1. "CLKSEL,Clock Select" "?,1: LFRCO is clocking EM23GRPACLK,2: LFXO is clocking EM23GRPACLK,3: ULFRCO is clocking EM23GRPACLK"
|
|
group.long 0x160++0x3
|
|
line.long 0x0 "EM4GRPACLKCTRL,No Description"
|
|
bitfld.long 0x0 0.--1. "CLKSEL,Clock Select" "?,1: LFRCO is clocking EM4GRPACLK,2: LFXO is clocking EM4GRPACLK,3: ULFRCO is clocking EM4GRPACLK"
|
|
group.long 0x180++0x3
|
|
line.long 0x0 "IADCCLKCTRL,No Description"
|
|
bitfld.long 0x0 0.--1. "CLKSEL,Clock Select" "?,1: EM01GRPACLK is clocking IADCCLK,2: FSRCO is clocking IADCCLK,?"
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "WDOG0CLKCTRL,No Description"
|
|
bitfld.long 0x0 0.--2. "CLKSEL,Clock Select" "?,1: LFRCO is clocking WDOG0CLK,2: LFXO is clocking WDOG0CLK,3: ULFRCO is clocking WDOG0CLK,4: HCLKDIV1024 is clocking WDOG0CLK,?,?,?"
|
|
group.long 0x220++0x3
|
|
line.long 0x0 "EUART0CLKCTRL,No Description"
|
|
bitfld.long 0x0 0.--1. "CLKSEL,Clock Select" "0: UART is not clocked,1: EM01GRPACLK is clocking UART,2: EM23GRPACLK is clocking UART,?"
|
|
group.long 0x240++0x3
|
|
line.long 0x0 "RTCCCLKCTRL,No Description"
|
|
bitfld.long 0x0 0.--1. "CLKSEL,Clock Select" "?,1: LFRCO is clocking RTCCCLK,2: LFXO is clocking RTCCCLK,3: ULFRCO is clocking RTCCCLK"
|
|
group.long 0x248++0x3
|
|
line.long 0x0 "PRORTCCLKCTRL,No Description"
|
|
bitfld.long 0x0 0.--1. "CLKSEL,Clock Select" "?,1: LFRCO is clocking PRORTCCLK,2: LFXO is clocking PRORTCCLK,3: ULFRCO is clocking PRORTCCLK"
|
|
group.long 0x260++0x3
|
|
line.long 0x0 "CRYPTOACCCLKCTRL,No Description"
|
|
bitfld.long 0x0 1. "AESEN,AES Enable" "0,1"
|
|
bitfld.long 0x0 0. "PKEN,PK Enable" "0,1"
|
|
group.long 0x280++0x3
|
|
line.long 0x0 "RADIOCLKCTRL,No Description"
|
|
bitfld.long 0x0 31. "DBGCLK,Enable Clock for Debugger" "0,1"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "CRYPTOACC (Cryptographic Accelerator)"
|
|
base ad:0x0
|
|
tree "CRYPTOACC_NS"
|
|
base ad:0x5C020000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "FETCHADDR,Fetcher: Start address of data block. In direct mode. this register is written by the software. In scatter-gather mode. this register is updated after each processed descriptor."
|
|
hexmask.long 0x0 0.--31. 1. "ADDR,Start address of data block"
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "FETCHLEN,Fetcher: Length of data block. In direct mode. this register is written by the software. In scatter-gather mode. this register is not used."
|
|
bitfld.long 0x0 29. "REALIGN,Realign length" "0,1"
|
|
bitfld.long 0x0 28. "CONSTADDR,Constant address" "0,1"
|
|
hexmask.long 0x0 0.--27. 1. "LENGTH,Length of data block"
|
|
line.long 0x4 "FETCHTAG,Fetcher: User tag. In direct mode. this register is written by the software. In scatter-gather mode. this register is not used."
|
|
hexmask.long 0x4 0.--31. 1. "TAG,User tag"
|
|
line.long 0x8 "PUSHADDR,Pusher: Start address of data block (LSB). In direct mode. this register is written by the software. In scatter-gather mode. this register is updated after each processed descriptor."
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Start address of data block"
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "PUSHLEN,Pusher: Length of data block. In direct mode. this register is written by the software. In scatter-gather mode. this register is not used."
|
|
bitfld.long 0x0 30. "DISCARD,Discard data" "0,1"
|
|
bitfld.long 0x0 29. "REALIGN,Realign length" "0,1"
|
|
bitfld.long 0x0 28. "CONSTADDR,Constant address" "0,1"
|
|
hexmask.long 0x0 0.--27. 1. "LENGTH,Start address of data block"
|
|
line.long 0x4 "IEN,Interrupt enable"
|
|
bitfld.long 0x4 5. "PUSHERERROR,Error interrupt enable" "0,1"
|
|
bitfld.long 0x4 4. "PUSHERSTOPPED,Stopped interrupt enable" "0,1"
|
|
bitfld.long 0x4 3. "PUSHERENDOFBLOCK,End of block interrupt enable" "0,1"
|
|
bitfld.long 0x4 2. "FETCHERERROR,Error interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "FETCHERSTOPPED,Stopped interrupt enable" "0,1"
|
|
bitfld.long 0x4 0. "FETCHERENDOFBLOCK,End of block interrupt enable" "0,1"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x0 "IF,Interrupt flag register"
|
|
bitfld.long 0x0 5. "PUSHERERROR,Error interrupt flag" "0,1"
|
|
bitfld.long 0x0 4. "PUSHERSTOPPED,Stopped interrupt flag" "0,1"
|
|
bitfld.long 0x0 3. "PUSHERENDOFBLOCK,End of block interrupt flag" "0,1"
|
|
bitfld.long 0x0 2. "FETCHERERROR,Error interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "FETCHERSTOPPED,Stopped interrupt flag" "0,1"
|
|
bitfld.long 0x0 0. "FETCHERENDOFBLOCK,End of block interrupt flag" "0,1"
|
|
wgroup.long 0x30++0x3
|
|
line.long 0x0 "IF_CLR,Writing a '1' clears the interrupt status. Writing a '0' has no effect."
|
|
bitfld.long 0x0 5. "PUSHERERROR,Error interrupt flag clear" "0,1"
|
|
bitfld.long 0x0 4. "PUSHERSTOPPED,Stopped interrupt flag clear" "0,1"
|
|
bitfld.long 0x0 3. "PUSHERENDOFBLOCK,End of block interrupt flag clear" "0,1"
|
|
bitfld.long 0x0 2. "FETCHERERROR,Error interrupt flag clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "FETCHERSTOPPED,Stopped interrupt flag clear" "0,1"
|
|
bitfld.long 0x0 0. "FETCHERENDOFBLOCK,End of block interrupt flag clear" "0,1"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "CTRL,Control register. called CONFIG in Barco datasheet."
|
|
bitfld.long 0x0 4. "SWRESET,Software reset" "0,1"
|
|
bitfld.long 0x0 3. "STOPPUSHER,Stop pusher" "0,1"
|
|
bitfld.long 0x0 2. "STOPFETCHER,Stop fetcher" "0,1"
|
|
bitfld.long 0x0 1. "PUSHERSCATTERGATHER,Pusher scatter/gather" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "FETCHERSCATTERGATHER,Fetcher scatter/gather" "0,1"
|
|
wgroup.long 0x38++0x3
|
|
line.long 0x0 "CMD,Command register for starting the fetcher and pusher"
|
|
bitfld.long 0x0 1. "STARTPUSHER,Start push" "0,1"
|
|
bitfld.long 0x0 0. "STARTFETCHER,Start fetch" "0,1"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x0 "STATUS,Status register"
|
|
hexmask.long.word 0x0 16.--31. 1. "FIFODATANUM,Number of data in output FIFO"
|
|
bitfld.long 0x0 6. "SOFTRSTBSY,Software reset busy" "0,1"
|
|
bitfld.long 0x0 5. "WAITING,Pusher waiting for FIFO" "0,1"
|
|
bitfld.long 0x0 4. "NOTEMPTY,Not empty flag from input FIFO (fetcher)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "PUSHERBSY,Pusher busy" "0,1"
|
|
bitfld.long 0x0 0. "FETCHERBSY,Fetcher busy" "0,1"
|
|
rgroup.long 0x400++0x17
|
|
line.long 0x0 "INCL_IPS_HW_CFG,No Description"
|
|
bitfld.long 0x0 10. "g_IncludeNDRNG,Generic g_IncludeNDRNG value" "0,1"
|
|
bitfld.long 0x0 9. "g_IncludePKE,Generic g_IncludePKE value" "0,1"
|
|
bitfld.long 0x0 8. "g_IncludeSM4,Generic g_IncludeSM4 value" "0,1"
|
|
bitfld.long 0x0 7. "g_IncludeZUC,Generic g_IncludeZUC value" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "g_IncludeSHA3,Generic g_IncludeSHA3 value" "0,1"
|
|
bitfld.long 0x0 5. "g_IncludeChachaPoly,Generic g_IncludeChachaPoly value" "0,1"
|
|
bitfld.long 0x0 4. "g_IncludeHASH,Generic g_IncludeHASH value" "0,1"
|
|
bitfld.long 0x0 3. "g_IncludeDES,Generic g_IncludeDES value" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "g_IncludeAESXTS,Generic g_IncludeAESXTS value" "0,1"
|
|
bitfld.long 0x0 1. "g_IncludeAESGCM,Generic g_IncludeAESGCM value" "0,1"
|
|
bitfld.long 0x0 0. "g_IncludeAES,Generic g_IncludeAES value" "0,1"
|
|
line.long 0x4 "BA411E_HW_CFG_1,No Description"
|
|
bitfld.long 0x4 24.--26. "g_Keysize,Generic g_Keysize value" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 17. "g_UseMasking,Generic g_UseMasking value" "0,1"
|
|
bitfld.long 0x4 16. "g_CS,Generic g_CS value" "0,1"
|
|
hexmask.long.word 0x4 0.--8. 1. "g_AesModesPoss,AES Modes Supported"
|
|
line.long 0x8 "BA411E_HW_CFG_2,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "g_CtrSize,Generic g_CtrSize value"
|
|
line.long 0xC "BA413_HW_CFG,No Description"
|
|
bitfld.long 0xC 18. "g_HashVerifyDigest,Generic g_HashVerifyDigest value" "0,1"
|
|
bitfld.long 0xC 17. "g_HMAC_enabled,Generic g_HMAC_enabled value" "0,1"
|
|
bitfld.long 0xC 16. "g_HashPadding,Generic g_HashPadding value" "0,1"
|
|
hexmask.long.byte 0xC 0.--6. 1. "g_HashMaskFunc,Generic g_HashMaskFunc value"
|
|
line.long 0x10 "BA418_HW_CFG,No Description"
|
|
bitfld.long 0x10 0. "g_Sha3CtxtEn,Generic g_Sha3CtxtEn value" "0,1"
|
|
line.long 0x14 "BA419_HW_CFG,No Description"
|
|
hexmask.long.byte 0x14 0.--6. 1. "g_SM4ModesPoss,Generic g_SM4ModesPoss value"
|
|
tree.end
|
|
tree "CRYPTOACC_NS_PKCTRL"
|
|
base ad:0x5C022000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "POINTER,No Description"
|
|
hexmask.long.byte 0x0 24.--27. 1. "OPPTRN,OpPtrN"
|
|
hexmask.long.byte 0x0 16.--19. 1. "OPPTRC,OpPtrC"
|
|
hexmask.long.byte 0x0 8.--11. 1. "OPPTRB,OpPtrB"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "OPPTRA,OpPtrA"
|
|
line.long 0x4 "COMMAND,No Description"
|
|
bitfld.long 0x4 31. "CALCR2,Calculate R2" "0: don't recalculate R^2 mod N,1: re-calculate R^2 mod N"
|
|
bitfld.long 0x4 30. "FLAGB,Flag B" "0,1"
|
|
bitfld.long 0x4 29. "FLAGA,Flag A" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "SWAPBYTES,Swap bytes" "0: Native format (little endian),1: Byte swapped (big endian)"
|
|
bitfld.long 0x4 27. "BUFSEL,Buffer Select" "0: use data in data memory 0,?"
|
|
bitfld.long 0x4 26. "EDWARDS,Edwards Curve Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "SELCURVE,Select Curve" "0: No acceleration,1: P256,?,?,4: P192,?,?,?"
|
|
hexmask.long.word 0x4 8.--18. 1. "SIZE,Size of Operands in data memory"
|
|
bitfld.long 0x4 7. "FIELD,Field" "0: Field is GF(p),1: Field is GF(2^m)"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--6. 1. "OPERATION,Type of Operation"
|
|
wgroup.long 0x8++0x3
|
|
line.long 0x0 "PKCTRL,No Description"
|
|
bitfld.long 0x0 1. "IFC,ClearIRQ" "0,1"
|
|
bitfld.long 0x0 0. "PKSTART,PK Start" "0,1"
|
|
rgroup.long 0xC++0xB
|
|
line.long 0x0 "PKSTATUS,No Description"
|
|
bitfld.long 0x0 17. "PKIF,Interrupt status" "0,1"
|
|
bitfld.long 0x0 16. "PKBUSY,PK busy" "0,1"
|
|
bitfld.long 0x0 13. "NOTQUAD,Not quadratic residue" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "COMPOSITE,Composite" "0: random number under test is probably prime,1: random number under test is composite"
|
|
bitfld.long 0x0 11. "NOTINVERTIBLE,Not invertible" "0,1"
|
|
bitfld.long 0x0 10. "PARAMABNOTVALID,Param AB not valid" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "SIGNOTVALID,Signature not valid" "0,1"
|
|
bitfld.long 0x0 8. "NOTIMPLEMENTED,Not implemented" "0,1"
|
|
bitfld.long 0x0 7. "PARAMNNOTVALID,Param n not valid" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "COUPLENOTVALID,Couple not valid" "0,1"
|
|
bitfld.long 0x0 5. "ATINFINITY,Point Px at infinity" "0,1"
|
|
bitfld.long 0x0 4. "NOTONCURVE,Point Px not on curve" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "FAILADDR,Fail Address"
|
|
line.long 0x4 "VERSION,No Description"
|
|
hexmask.long.byte 0x4 8.--15. 1. "HW,Hardware version number"
|
|
hexmask.long.byte 0x4 0.--7. 1. "SW,Software version number"
|
|
line.long 0x8 "TIMER,No Description"
|
|
hexmask.long 0x8 0.--31. 1. "TIMER,Timer"
|
|
tree.end
|
|
tree "CRYPTOACC_NS_RNGCTRL"
|
|
base ad:0x5C021000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "RNGCTRL,No Description"
|
|
bitfld.long 0x0 20. "FIFOWRSTARTUP,Fifo Write Start Up" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "NB128BITBLOCKS,Number of 128b blocks in AES-CBCMAC"
|
|
newline
|
|
bitfld.long 0x0 15. "AIS31TESTSEL,AIS31 test input select" "0: Before conditioning,1: After conditioning"
|
|
newline
|
|
bitfld.long 0x0 14. "HEALTHTESTSEL,Health test input select" "0: Before conditioning,1: After conditioning"
|
|
newline
|
|
bitfld.long 0x0 13. "BYPAIS31,AIS31 Start-up Test Bypass." "0: AIS31 startup test is applied. No data will be..,1: AIS31 startup test is bypassed."
|
|
newline
|
|
bitfld.long 0x0 12. "BYPNIST,NIST Start-up Test Bypass." "0: NIST-800-90B startup test is applied. No data..,1: NIST-800-90B startup test is bypassed."
|
|
newline
|
|
bitfld.long 0x0 11. "FORCERUN,Oscillator Force Run" "0: Oscillators will shut down when FIFO is full,1: Oscillators will continue to run even after FIFO.."
|
|
newline
|
|
bitfld.long 0x0 10. "ALMIEN,IRQ enable for AIS31 noise alarm" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "PREIEN,IRQ enable for AIS31 prelim. noise alarm" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "SOFTRESET,Software Reset" "0: Module not in reset,1: The continuous test the conditioning function.."
|
|
newline
|
|
bitfld.long 0x0 7. "FULLIEN,IRQ enable for FIFO full" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "APT4096IEN,IRQ enable for APT4096IF" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "APT64IEN,IRQ enable for APT64IF" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "REPCOUNTIEN,IRQ enable for Repetition Count Test" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CONDBYPASS,Conditioning Bypass" "0: The conditionig function is used,1: The conditioning function is bypassed"
|
|
newline
|
|
bitfld.long 0x0 2. "TESTEN,Test Enable" "0: Non-determinsitc random number generation,1: Pseudo-random number generation"
|
|
newline
|
|
bitfld.long 0x0 0. "ENABLE,TRNG Module Enable" "0: Module disabled,1: Module enabled"
|
|
rgroup.long 0x4++0xB
|
|
line.long 0x0 "FIFOLEVEL,Number of 32 bits words of random available in the FIFO. Writing to this register clears the FIFO full interrupt"
|
|
hexmask.long 0x0 0.--31. 1. "FIFOLEVEL,FIFO Level"
|
|
line.long 0x4 "FIFOTHRESH,FIFO level at which the rings are restarted when in the FIFOFull_Off state. expressed in number of 128bit blocks"
|
|
hexmask.long 0x4 0.--31. 1. "FIFOTHRESH,FIFO threshold level"
|
|
line.long 0x8 "FIFODEPTH,Maximum number of 32 bits words that can be stored in the FIFO: 2^g_fifodepth"
|
|
hexmask.long 0x8 0.--31. 1. "FIFODEPTH,FIFO Depth."
|
|
group.long 0x10++0xF
|
|
line.long 0x0 "KEY0,This set of registers bits form the 128-bit AES key used for conditioning function. The first byte (MSB of 128-bit word) is at address 0x0010. the second byte at address 0x0011..."
|
|
hexmask.long 0x0 0.--31. 1. "KEY,Key"
|
|
line.long 0x4 "KEY1,This set of registers bits form the 128-bit AES key used for conditioning function. The first byte (MSB of 128-bit word) is at address 0x0010. the second byte at address 0x0011..."
|
|
hexmask.long 0x4 0.--31. 1. "KEY,Key"
|
|
line.long 0x8 "KEY2,This set of registers bits form the 128-bit AES key used for conditioning function. The first byte (MSB of 128-bit word) is at address 0x0010. the second byte at address 0x0011..."
|
|
hexmask.long 0x8 0.--31. 1. "KEY,Key"
|
|
line.long 0xC "KEY3,This set of registers bits form the 128-bit AES key used for conditioning function. The first byte (MSB of 128-bit word) is at address 0x0010. the second byte at address 0x0011..."
|
|
hexmask.long 0xC 0.--31. 1. "KEY,Key"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "TESTDATA,This register is used to feed known data to the conditioning function or to the continuous tests. See manual"
|
|
hexmask.long 0x0 0.--31. 1. "VALUE,Test data input to conditioning tests"
|
|
group.long 0x30++0x7
|
|
line.long 0x0 "RNGSTATUS,No Description"
|
|
rbitfld.long 0x0 9. "ALMIF,AIS31 Noise Alarm interrupt status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "PREIF,AIS31 Preliminary Noise Alarm IF" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 7. "FULLIF,FIFO full interrupt status" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 6. "APT4096IF,4096-sample window Adaptive Prop. IF" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 5. "APT64IF,64-sample window Adaptive Proportion IF" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 4. "REPCOUNTIF,Repetition Count Test interrupt status" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 1.--3. "STATE,State of the control FSM" "0: RESET State,1: STARTUP State,2: FIFOFULLON State,3: FIFOFULLOFF State,4: RUNNING State,5: ERROR State,6: UNUSED,7: UNUSED"
|
|
newline
|
|
rbitfld.long 0x0 0. "TESTDATABUSY,Test Data Busy" "0: TESTDATA write is finished processing or no test..,1: TESTDATA write is still being processed."
|
|
line.long 0x4 "INITWAITVAL,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "INITWAITVAL,Wait counter value"
|
|
group.long 0x40++0x17
|
|
line.long 0x0 "SWOFFTMRVAL,Number of clk cycles to wait before stopping the rings after the FIFO is full"
|
|
hexmask.long.word 0x0 0.--15. 1. "SWOFFTMRVAL,Switch Off Timer Value"
|
|
line.long 0x4 "CLKDIV,Sample clock divider. The frequency at which the outputs of the rings are sampled is given by Fs = Fpclk/(ClkDiv + 1)"
|
|
hexmask.long.byte 0x4 0.--7. 1. "VALUE,Sample clock divider"
|
|
line.long 0x8 "AIS31CONF0,No Description"
|
|
hexmask.long.word 0x8 16.--30. 1. "ONLINETHRESH,Online Threshold"
|
|
newline
|
|
hexmask.long.word 0x8 0.--14. 1. "STARTUPTHRES,Start-up Threshold"
|
|
line.long 0xC "AIS31CONF1,No Description"
|
|
hexmask.long.word 0xC 16.--30. 1. "ONLINEREPTHRESH,Online Repeat Threshold"
|
|
newline
|
|
hexmask.long.word 0xC 0.--14. 1. "HEXPECTEDVALUE,Expected History Value"
|
|
line.long 0x10 "AIS31CONF2,No Description"
|
|
hexmask.long.word 0x10 16.--30. 1. "HMAX,Maximum Allowed History Value"
|
|
newline
|
|
hexmask.long.word 0x10 0.--14. 1. "HMIN,Minimum Allowed History Value"
|
|
line.long 0x14 "AIS31STATUS,This register is used to obtain diagnostic information about the AIS31 start-up and online tests when g_AIS31=True. Writing to this register clears all fields"
|
|
bitfld.long 0x14 17. "PRELIMNOISEALARMREP,Preliminary noise alarm Rep" "0,1"
|
|
newline
|
|
bitfld.long 0x14 16. "PRELIMNOISEALARMRNG,Preliminary noise alarm RNG" "0,1"
|
|
newline
|
|
hexmask.long.word 0x14 0.--15. 1. "NUMPRELIMALARMS,Number of preliminary alarms"
|
|
tree.end
|
|
tree "CRYPTOACC_S"
|
|
base ad:0x4C020000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "FETCHADDR,Fetcher: Start address of data block. In direct mode. this register is written by the software. In scatter-gather mode. this register is updated after each processed descriptor."
|
|
hexmask.long 0x0 0.--31. 1. "ADDR,Start address of data block"
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "FETCHLEN,Fetcher: Length of data block. In direct mode. this register is written by the software. In scatter-gather mode. this register is not used."
|
|
bitfld.long 0x0 29. "REALIGN,Realign length" "0,1"
|
|
bitfld.long 0x0 28. "CONSTADDR,Constant address" "0,1"
|
|
hexmask.long 0x0 0.--27. 1. "LENGTH,Length of data block"
|
|
line.long 0x4 "FETCHTAG,Fetcher: User tag. In direct mode. this register is written by the software. In scatter-gather mode. this register is not used."
|
|
hexmask.long 0x4 0.--31. 1. "TAG,User tag"
|
|
line.long 0x8 "PUSHADDR,Pusher: Start address of data block (LSB). In direct mode. this register is written by the software. In scatter-gather mode. this register is updated after each processed descriptor."
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Start address of data block"
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "PUSHLEN,Pusher: Length of data block. In direct mode. this register is written by the software. In scatter-gather mode. this register is not used."
|
|
bitfld.long 0x0 30. "DISCARD,Discard data" "0,1"
|
|
bitfld.long 0x0 29. "REALIGN,Realign length" "0,1"
|
|
bitfld.long 0x0 28. "CONSTADDR,Constant address" "0,1"
|
|
hexmask.long 0x0 0.--27. 1. "LENGTH,Start address of data block"
|
|
line.long 0x4 "IEN,Interrupt enable"
|
|
bitfld.long 0x4 5. "PUSHERERROR,Error interrupt enable" "0,1"
|
|
bitfld.long 0x4 4. "PUSHERSTOPPED,Stopped interrupt enable" "0,1"
|
|
bitfld.long 0x4 3. "PUSHERENDOFBLOCK,End of block interrupt enable" "0,1"
|
|
bitfld.long 0x4 2. "FETCHERERROR,Error interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "FETCHERSTOPPED,Stopped interrupt enable" "0,1"
|
|
bitfld.long 0x4 0. "FETCHERENDOFBLOCK,End of block interrupt enable" "0,1"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x0 "IF,Interrupt flag register"
|
|
bitfld.long 0x0 5. "PUSHERERROR,Error interrupt flag" "0,1"
|
|
bitfld.long 0x0 4. "PUSHERSTOPPED,Stopped interrupt flag" "0,1"
|
|
bitfld.long 0x0 3. "PUSHERENDOFBLOCK,End of block interrupt flag" "0,1"
|
|
bitfld.long 0x0 2. "FETCHERERROR,Error interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "FETCHERSTOPPED,Stopped interrupt flag" "0,1"
|
|
bitfld.long 0x0 0. "FETCHERENDOFBLOCK,End of block interrupt flag" "0,1"
|
|
wgroup.long 0x30++0x3
|
|
line.long 0x0 "IF_CLR,Writing a '1' clears the interrupt status. Writing a '0' has no effect."
|
|
bitfld.long 0x0 5. "PUSHERERROR,Error interrupt flag clear" "0,1"
|
|
bitfld.long 0x0 4. "PUSHERSTOPPED,Stopped interrupt flag clear" "0,1"
|
|
bitfld.long 0x0 3. "PUSHERENDOFBLOCK,End of block interrupt flag clear" "0,1"
|
|
bitfld.long 0x0 2. "FETCHERERROR,Error interrupt flag clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "FETCHERSTOPPED,Stopped interrupt flag clear" "0,1"
|
|
bitfld.long 0x0 0. "FETCHERENDOFBLOCK,End of block interrupt flag clear" "0,1"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "CTRL,Control register. called CONFIG in Barco datasheet."
|
|
bitfld.long 0x0 4. "SWRESET,Software reset" "0,1"
|
|
bitfld.long 0x0 3. "STOPPUSHER,Stop pusher" "0,1"
|
|
bitfld.long 0x0 2. "STOPFETCHER,Stop fetcher" "0,1"
|
|
bitfld.long 0x0 1. "PUSHERSCATTERGATHER,Pusher scatter/gather" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "FETCHERSCATTERGATHER,Fetcher scatter/gather" "0,1"
|
|
wgroup.long 0x38++0x3
|
|
line.long 0x0 "CMD,Command register for starting the fetcher and pusher"
|
|
bitfld.long 0x0 1. "STARTPUSHER,Start push" "0,1"
|
|
bitfld.long 0x0 0. "STARTFETCHER,Start fetch" "0,1"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x0 "STATUS,Status register"
|
|
hexmask.long.word 0x0 16.--31. 1. "FIFODATANUM,Number of data in output FIFO"
|
|
bitfld.long 0x0 6. "SOFTRSTBSY,Software reset busy" "0,1"
|
|
bitfld.long 0x0 5. "WAITING,Pusher waiting for FIFO" "0,1"
|
|
bitfld.long 0x0 4. "NOTEMPTY,Not empty flag from input FIFO (fetcher)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "PUSHERBSY,Pusher busy" "0,1"
|
|
bitfld.long 0x0 0. "FETCHERBSY,Fetcher busy" "0,1"
|
|
rgroup.long 0x400++0x17
|
|
line.long 0x0 "INCL_IPS_HW_CFG,No Description"
|
|
bitfld.long 0x0 10. "g_IncludeNDRNG,Generic g_IncludeNDRNG value" "0,1"
|
|
bitfld.long 0x0 9. "g_IncludePKE,Generic g_IncludePKE value" "0,1"
|
|
bitfld.long 0x0 8. "g_IncludeSM4,Generic g_IncludeSM4 value" "0,1"
|
|
bitfld.long 0x0 7. "g_IncludeZUC,Generic g_IncludeZUC value" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "g_IncludeSHA3,Generic g_IncludeSHA3 value" "0,1"
|
|
bitfld.long 0x0 5. "g_IncludeChachaPoly,Generic g_IncludeChachaPoly value" "0,1"
|
|
bitfld.long 0x0 4. "g_IncludeHASH,Generic g_IncludeHASH value" "0,1"
|
|
bitfld.long 0x0 3. "g_IncludeDES,Generic g_IncludeDES value" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "g_IncludeAESXTS,Generic g_IncludeAESXTS value" "0,1"
|
|
bitfld.long 0x0 1. "g_IncludeAESGCM,Generic g_IncludeAESGCM value" "0,1"
|
|
bitfld.long 0x0 0. "g_IncludeAES,Generic g_IncludeAES value" "0,1"
|
|
line.long 0x4 "BA411E_HW_CFG_1,No Description"
|
|
bitfld.long 0x4 24.--26. "g_Keysize,Generic g_Keysize value" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 17. "g_UseMasking,Generic g_UseMasking value" "0,1"
|
|
bitfld.long 0x4 16. "g_CS,Generic g_CS value" "0,1"
|
|
hexmask.long.word 0x4 0.--8. 1. "g_AesModesPoss,AES Modes Supported"
|
|
line.long 0x8 "BA411E_HW_CFG_2,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "g_CtrSize,Generic g_CtrSize value"
|
|
line.long 0xC "BA413_HW_CFG,No Description"
|
|
bitfld.long 0xC 18. "g_HashVerifyDigest,Generic g_HashVerifyDigest value" "0,1"
|
|
bitfld.long 0xC 17. "g_HMAC_enabled,Generic g_HMAC_enabled value" "0,1"
|
|
bitfld.long 0xC 16. "g_HashPadding,Generic g_HashPadding value" "0,1"
|
|
hexmask.long.byte 0xC 0.--6. 1. "g_HashMaskFunc,Generic g_HashMaskFunc value"
|
|
line.long 0x10 "BA418_HW_CFG,No Description"
|
|
bitfld.long 0x10 0. "g_Sha3CtxtEn,Generic g_Sha3CtxtEn value" "0,1"
|
|
line.long 0x14 "BA419_HW_CFG,No Description"
|
|
hexmask.long.byte 0x14 0.--6. 1. "g_SM4ModesPoss,Generic g_SM4ModesPoss value"
|
|
tree.end
|
|
tree "CRYPTOACC_S_PKCTRL"
|
|
base ad:0x4C022000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "POINTER,No Description"
|
|
hexmask.long.byte 0x0 24.--27. 1. "OPPTRN,OpPtrN"
|
|
hexmask.long.byte 0x0 16.--19. 1. "OPPTRC,OpPtrC"
|
|
hexmask.long.byte 0x0 8.--11. 1. "OPPTRB,OpPtrB"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "OPPTRA,OpPtrA"
|
|
line.long 0x4 "COMMAND,No Description"
|
|
bitfld.long 0x4 31. "CALCR2,Calculate R2" "0: don't recalculate R^2 mod N,1: re-calculate R^2 mod N"
|
|
bitfld.long 0x4 30. "FLAGB,Flag B" "0,1"
|
|
bitfld.long 0x4 29. "FLAGA,Flag A" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "SWAPBYTES,Swap bytes" "0: Native format (little endian),1: Byte swapped (big endian)"
|
|
bitfld.long 0x4 27. "BUFSEL,Buffer Select" "0: use data in data memory 0,?"
|
|
bitfld.long 0x4 26. "EDWARDS,Edwards Curve Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "SELCURVE,Select Curve" "0: No acceleration,1: P256,?,?,4: P192,?,?,?"
|
|
hexmask.long.word 0x4 8.--18. 1. "SIZE,Size of Operands in data memory"
|
|
bitfld.long 0x4 7. "FIELD,Field" "0: Field is GF(p),1: Field is GF(2^m)"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--6. 1. "OPERATION,Type of Operation"
|
|
wgroup.long 0x8++0x3
|
|
line.long 0x0 "PKCTRL,No Description"
|
|
bitfld.long 0x0 1. "IFC,ClearIRQ" "0,1"
|
|
bitfld.long 0x0 0. "PKSTART,PK Start" "0,1"
|
|
rgroup.long 0xC++0xB
|
|
line.long 0x0 "PKSTATUS,No Description"
|
|
bitfld.long 0x0 17. "PKIF,Interrupt status" "0,1"
|
|
bitfld.long 0x0 16. "PKBUSY,PK busy" "0,1"
|
|
bitfld.long 0x0 13. "NOTQUAD,Not quadratic residue" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "COMPOSITE,Composite" "0: random number under test is probably prime,1: random number under test is composite"
|
|
bitfld.long 0x0 11. "NOTINVERTIBLE,Not invertible" "0,1"
|
|
bitfld.long 0x0 10. "PARAMABNOTVALID,Param AB not valid" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "SIGNOTVALID,Signature not valid" "0,1"
|
|
bitfld.long 0x0 8. "NOTIMPLEMENTED,Not implemented" "0,1"
|
|
bitfld.long 0x0 7. "PARAMNNOTVALID,Param n not valid" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "COUPLENOTVALID,Couple not valid" "0,1"
|
|
bitfld.long 0x0 5. "ATINFINITY,Point Px at infinity" "0,1"
|
|
bitfld.long 0x0 4. "NOTONCURVE,Point Px not on curve" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "FAILADDR,Fail Address"
|
|
line.long 0x4 "VERSION,No Description"
|
|
hexmask.long.byte 0x4 8.--15. 1. "HW,Hardware version number"
|
|
hexmask.long.byte 0x4 0.--7. 1. "SW,Software version number"
|
|
line.long 0x8 "TIMER,No Description"
|
|
hexmask.long 0x8 0.--31. 1. "TIMER,Timer"
|
|
tree.end
|
|
tree "CRYPTOACC_S_RNGCTRL"
|
|
base ad:0x4C021000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "RNGCTRL,No Description"
|
|
bitfld.long 0x0 20. "FIFOWRSTARTUP,Fifo Write Start Up" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "NB128BITBLOCKS,Number of 128b blocks in AES-CBCMAC"
|
|
newline
|
|
bitfld.long 0x0 15. "AIS31TESTSEL,AIS31 test input select" "0: Before conditioning,1: After conditioning"
|
|
newline
|
|
bitfld.long 0x0 14. "HEALTHTESTSEL,Health test input select" "0: Before conditioning,1: After conditioning"
|
|
newline
|
|
bitfld.long 0x0 13. "BYPAIS31,AIS31 Start-up Test Bypass." "0: AIS31 startup test is applied. No data will be..,1: AIS31 startup test is bypassed."
|
|
newline
|
|
bitfld.long 0x0 12. "BYPNIST,NIST Start-up Test Bypass." "0: NIST-800-90B startup test is applied. No data..,1: NIST-800-90B startup test is bypassed."
|
|
newline
|
|
bitfld.long 0x0 11. "FORCERUN,Oscillator Force Run" "0: Oscillators will shut down when FIFO is full,1: Oscillators will continue to run even after FIFO.."
|
|
newline
|
|
bitfld.long 0x0 10. "ALMIEN,IRQ enable for AIS31 noise alarm" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "PREIEN,IRQ enable for AIS31 prelim. noise alarm" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "SOFTRESET,Software Reset" "0: Module not in reset,1: The continuous test the conditioning function.."
|
|
newline
|
|
bitfld.long 0x0 7. "FULLIEN,IRQ enable for FIFO full" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "APT4096IEN,IRQ enable for APT4096IF" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "APT64IEN,IRQ enable for APT64IF" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "REPCOUNTIEN,IRQ enable for Repetition Count Test" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CONDBYPASS,Conditioning Bypass" "0: The conditionig function is used,1: The conditioning function is bypassed"
|
|
newline
|
|
bitfld.long 0x0 2. "TESTEN,Test Enable" "0: Non-determinsitc random number generation,1: Pseudo-random number generation"
|
|
newline
|
|
bitfld.long 0x0 0. "ENABLE,TRNG Module Enable" "0: Module disabled,1: Module enabled"
|
|
rgroup.long 0x4++0xB
|
|
line.long 0x0 "FIFOLEVEL,Number of 32 bits words of random available in the FIFO. Writing to this register clears the FIFO full interrupt"
|
|
hexmask.long 0x0 0.--31. 1. "FIFOLEVEL,FIFO Level"
|
|
line.long 0x4 "FIFOTHRESH,FIFO level at which the rings are restarted when in the FIFOFull_Off state. expressed in number of 128bit blocks"
|
|
hexmask.long 0x4 0.--31. 1. "FIFOTHRESH,FIFO threshold level"
|
|
line.long 0x8 "FIFODEPTH,Maximum number of 32 bits words that can be stored in the FIFO: 2^g_fifodepth"
|
|
hexmask.long 0x8 0.--31. 1. "FIFODEPTH,FIFO Depth."
|
|
group.long 0x10++0xF
|
|
line.long 0x0 "KEY0,This set of registers bits form the 128-bit AES key used for conditioning function. The first byte (MSB of 128-bit word) is at address 0x0010. the second byte at address 0x0011..."
|
|
hexmask.long 0x0 0.--31. 1. "KEY,Key"
|
|
line.long 0x4 "KEY1,This set of registers bits form the 128-bit AES key used for conditioning function. The first byte (MSB of 128-bit word) is at address 0x0010. the second byte at address 0x0011..."
|
|
hexmask.long 0x4 0.--31. 1. "KEY,Key"
|
|
line.long 0x8 "KEY2,This set of registers bits form the 128-bit AES key used for conditioning function. The first byte (MSB of 128-bit word) is at address 0x0010. the second byte at address 0x0011..."
|
|
hexmask.long 0x8 0.--31. 1. "KEY,Key"
|
|
line.long 0xC "KEY3,This set of registers bits form the 128-bit AES key used for conditioning function. The first byte (MSB of 128-bit word) is at address 0x0010. the second byte at address 0x0011..."
|
|
hexmask.long 0xC 0.--31. 1. "KEY,Key"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "TESTDATA,This register is used to feed known data to the conditioning function or to the continuous tests. See manual"
|
|
hexmask.long 0x0 0.--31. 1. "VALUE,Test data input to conditioning tests"
|
|
group.long 0x30++0x7
|
|
line.long 0x0 "RNGSTATUS,No Description"
|
|
rbitfld.long 0x0 9. "ALMIF,AIS31 Noise Alarm interrupt status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "PREIF,AIS31 Preliminary Noise Alarm IF" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 7. "FULLIF,FIFO full interrupt status" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 6. "APT4096IF,4096-sample window Adaptive Prop. IF" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 5. "APT64IF,64-sample window Adaptive Proportion IF" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 4. "REPCOUNTIF,Repetition Count Test interrupt status" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 1.--3. "STATE,State of the control FSM" "0: RESET State,1: STARTUP State,2: FIFOFULLON State,3: FIFOFULLOFF State,4: RUNNING State,5: ERROR State,6: UNUSED,7: UNUSED"
|
|
newline
|
|
rbitfld.long 0x0 0. "TESTDATABUSY,Test Data Busy" "0: TESTDATA write is finished processing or no test..,1: TESTDATA write is still being processed."
|
|
line.long 0x4 "INITWAITVAL,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "INITWAITVAL,Wait counter value"
|
|
group.long 0x40++0x17
|
|
line.long 0x0 "SWOFFTMRVAL,Number of clk cycles to wait before stopping the rings after the FIFO is full"
|
|
hexmask.long.word 0x0 0.--15. 1. "SWOFFTMRVAL,Switch Off Timer Value"
|
|
line.long 0x4 "CLKDIV,Sample clock divider. The frequency at which the outputs of the rings are sampled is given by Fs = Fpclk/(ClkDiv + 1)"
|
|
hexmask.long.byte 0x4 0.--7. 1. "VALUE,Sample clock divider"
|
|
line.long 0x8 "AIS31CONF0,No Description"
|
|
hexmask.long.word 0x8 16.--30. 1. "ONLINETHRESH,Online Threshold"
|
|
newline
|
|
hexmask.long.word 0x8 0.--14. 1. "STARTUPTHRES,Start-up Threshold"
|
|
line.long 0xC "AIS31CONF1,No Description"
|
|
hexmask.long.word 0xC 16.--30. 1. "ONLINEREPTHRESH,Online Repeat Threshold"
|
|
newline
|
|
hexmask.long.word 0xC 0.--14. 1. "HEXPECTEDVALUE,Expected History Value"
|
|
line.long 0x10 "AIS31CONF2,No Description"
|
|
hexmask.long.word 0x10 16.--30. 1. "HMAX,Maximum Allowed History Value"
|
|
newline
|
|
hexmask.long.word 0x10 0.--14. 1. "HMIN,Minimum Allowed History Value"
|
|
line.long 0x14 "AIS31STATUS,This register is used to obtain diagnostic information about the AIS31 start-up and online tests when g_AIS31=True. Writing to this register clears all fields"
|
|
bitfld.long 0x14 17. "PRELIMNOISEALARMREP,Preliminary noise alarm Rep" "0,1"
|
|
newline
|
|
bitfld.long 0x14 16. "PRELIMNOISEALARMRNG,Preliminary noise alarm RNG" "0,1"
|
|
newline
|
|
hexmask.long.word 0x14 0.--15. 1. "NUMPRELIMALARMS,Number of preliminary alarms"
|
|
tree.end
|
|
tree.end
|
|
tree "DCDC (Buck DC-DC)"
|
|
base ad:0x0
|
|
tree "DCDC_NS"
|
|
base ad:0x50094000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,IPVERSION"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IPVERSION"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "EN,Enable"
|
|
bitfld.long 0x0 0. "EN,Enable" "0: Disable,1: Enable"
|
|
line.long 0x4 "CTRL,Control"
|
|
bitfld.long 0x4 4.--6. "IPKTMAXCTRL,Peak Current Timeout Control" "0: Ton_max disabled,1: 0.35us,2: 0.63us,3: 0.91us,4: 1.19us,5: 1.47us,6: 1.75us,7: 2.03us"
|
|
bitfld.long 0x4 2. "DCMONLYEN,DCDC DCM Only Enable" "0: Support higher load current at lower battery..,1: DCM only mode for normal operation this is the.."
|
|
newline
|
|
bitfld.long 0x4 0. "MODE,DCDC/Bypass Mode Control" "0: DCDC is OFF bypass switch is enabled,1: Request DCDC regulation bypass switch disabled"
|
|
group.long 0x10++0x7
|
|
line.long 0x0 "EM01CTRL0,EM01 Configurations"
|
|
bitfld.long 0x0 8.--9. "DRVSPEED,EM01 Drive Speed Setting" "0: Lowest Efficiency Lowest EMI.. Small decrease in..,1: Default Efficiency Acceptable EMI level,2: Small increase in efficiency from the default..,3: Highest Efficiency Highest EMI.. Small increase.."
|
|
hexmask.long.byte 0x0 0.--3. 1. "IPKVAL,EM01 Peak Current Setting"
|
|
line.long 0x4 "EM23CTRL0,EM23 Configurations"
|
|
bitfld.long 0x4 8.--9. "DRVSPEED,EM23 Drive Speed Setting" "0: Lowest Efficiency Lowest EMI.. Small decrease in..,1: Default Efficiency Acceptable EMI level,2: Small increase in efficiency from the default..,3: Highest Efficiency Highest EMI.. Small increase.."
|
|
hexmask.long.byte 0x4 0.--3. 1. "IPKVAL,EM23 Peak Current Setting"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "IF,Interrupt Flags"
|
|
bitfld.long 0x0 7. "EM4ERR,EM4 Entry Request Error" "0,1"
|
|
bitfld.long 0x0 6. "TMAX,Ton_max Timeout Reached" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "REGULATION,DCDC in regulation" "0,1"
|
|
bitfld.long 0x0 4. "VREGINHIGH,VREGVDD above threshold" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "VREGINLOW,VREGVDD below threshold" "0,1"
|
|
bitfld.long 0x0 2. "RUNNING,DCDC Running" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "WARM,DCDC Warmup Time Done" "0,1"
|
|
bitfld.long 0x0 0. "BYPSW,Bypass Switch Enabled" "0,1"
|
|
line.long 0x4 "IEN,Interrupt Enable"
|
|
bitfld.long 0x4 7. "EM4ERR,EM4 Entry Req Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 6. "TMAX,Ton_max Timeout Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "REGULATION,DCDC in Regulation Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 4. "VREGINHIGH,VREGVDD above threshold Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "VREGINLOW,VREGVDD below threshold Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 2. "RUNNING,DCDC Running Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "WARM,DCDC Warmup Time Done Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "BYPSW,Bypass Switch Enabled Interrupt Enable" "0,1"
|
|
rgroup.long 0x2C++0x3
|
|
line.long 0x0 "STATUS,DCDC Status Register"
|
|
bitfld.long 0x0 4. "BYPCMPOUT,Bypass Comparator Output" "0,1"
|
|
bitfld.long 0x0 3. "VREGIN,VREGVDD comparator status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RUNNING,DCDC is running" "0,1"
|
|
bitfld.long 0x0 1. "WARM,DCDC Warmup Done" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "BYPSW,Bypass Switch is currently enabled" "0,1"
|
|
wgroup.long 0x40++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Configuration Lock Key"
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x0 "LOCKSTATUS,No Description"
|
|
bitfld.long 0x0 0. "LOCK,Lock Status" "0: Unlocked State,1: LOCKED STATE"
|
|
tree.end
|
|
tree "DCDC_S"
|
|
base ad:0x40094000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,IPVERSION"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IPVERSION"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "EN,Enable"
|
|
bitfld.long 0x0 0. "EN,Enable" "0: Disable,1: Enable"
|
|
line.long 0x4 "CTRL,Control"
|
|
bitfld.long 0x4 4.--6. "IPKTMAXCTRL,Peak Current Timeout Control" "0: Ton_max disabled,1: 0.35us,2: 0.63us,3: 0.91us,4: 1.19us,5: 1.47us,6: 1.75us,7: 2.03us"
|
|
bitfld.long 0x4 2. "DCMONLYEN,DCDC DCM Only Enable" "0: Support higher load current at lower battery..,1: DCM only mode for normal operation this is the.."
|
|
newline
|
|
bitfld.long 0x4 0. "MODE,DCDC/Bypass Mode Control" "0: DCDC is OFF bypass switch is enabled,1: Request DCDC regulation bypass switch disabled"
|
|
group.long 0x10++0x7
|
|
line.long 0x0 "EM01CTRL0,EM01 Configurations"
|
|
bitfld.long 0x0 8.--9. "DRVSPEED,EM01 Drive Speed Setting" "0: Lowest Efficiency Lowest EMI.. Small decrease in..,1: Default Efficiency Acceptable EMI level,2: Small increase in efficiency from the default..,3: Highest Efficiency Highest EMI.. Small increase.."
|
|
hexmask.long.byte 0x0 0.--3. 1. "IPKVAL,EM01 Peak Current Setting"
|
|
line.long 0x4 "EM23CTRL0,EM23 Configurations"
|
|
bitfld.long 0x4 8.--9. "DRVSPEED,EM23 Drive Speed Setting" "0: Lowest Efficiency Lowest EMI.. Small decrease in..,1: Default Efficiency Acceptable EMI level,2: Small increase in efficiency from the default..,3: Highest Efficiency Highest EMI.. Small increase.."
|
|
hexmask.long.byte 0x4 0.--3. 1. "IPKVAL,EM23 Peak Current Setting"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "IF,Interrupt Flags"
|
|
bitfld.long 0x0 7. "EM4ERR,EM4 Entry Request Error" "0,1"
|
|
bitfld.long 0x0 6. "TMAX,Ton_max Timeout Reached" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "REGULATION,DCDC in regulation" "0,1"
|
|
bitfld.long 0x0 4. "VREGINHIGH,VREGVDD above threshold" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "VREGINLOW,VREGVDD below threshold" "0,1"
|
|
bitfld.long 0x0 2. "RUNNING,DCDC Running" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "WARM,DCDC Warmup Time Done" "0,1"
|
|
bitfld.long 0x0 0. "BYPSW,Bypass Switch Enabled" "0,1"
|
|
line.long 0x4 "IEN,Interrupt Enable"
|
|
bitfld.long 0x4 7. "EM4ERR,EM4 Entry Req Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 6. "TMAX,Ton_max Timeout Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "REGULATION,DCDC in Regulation Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 4. "VREGINHIGH,VREGVDD above threshold Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "VREGINLOW,VREGVDD below threshold Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 2. "RUNNING,DCDC Running Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "WARM,DCDC Warmup Time Done Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "BYPSW,Bypass Switch Enabled Interrupt Enable" "0,1"
|
|
rgroup.long 0x2C++0x3
|
|
line.long 0x0 "STATUS,DCDC Status Register"
|
|
bitfld.long 0x0 4. "BYPCMPOUT,Bypass Comparator Output" "0,1"
|
|
bitfld.long 0x0 3. "VREGIN,VREGVDD comparator status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RUNNING,DCDC is running" "0,1"
|
|
bitfld.long 0x0 1. "WARM,DCDC Warmup Done" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "BYPSW,Bypass Switch is currently enabled" "0,1"
|
|
wgroup.long 0x40++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Configuration Lock Key"
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x0 "LOCKSTATUS,No Description"
|
|
bitfld.long 0x0 0. "LOCK,Lock Status" "0: Unlocked State,1: LOCKED STATE"
|
|
tree.end
|
|
tree.end
|
|
tree "DEVINFO"
|
|
base ad:0xFE08000
|
|
rgroup.long 0x0++0x23
|
|
line.long 0x0 "INFO,Version of the device info structure being used"
|
|
hexmask.long.byte 0x0 24.--31. 1. "DEVINFOREV,DI Page Version"
|
|
hexmask.long.byte 0x0 16.--23. 1. "PRODREV,Production Revision"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "CRC,CRC"
|
|
line.long 0x4 "PART,Part description"
|
|
hexmask.long.byte 0x4 24.--29. 1. "FAMILY,Device Family"
|
|
hexmask.long.byte 0x4 16.--21. 1. "FAMILYNUM,Device Family"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "DEVICENUM,Device Number"
|
|
line.long 0x8 "MEMINFO,Flash page size and misc. chip information"
|
|
hexmask.long.word 0x8 16.--31. 1. "DILEN,Length of DI Page"
|
|
hexmask.long.byte 0x8 8.--15. 1. "UDPAGESIZE,User Data Page Size"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--7. 1. "FLASHPAGESIZE,Flash Page Size"
|
|
line.long 0xC "MSIZE,Flash and SRAM Memory size in kB"
|
|
hexmask.long.word 0xC 16.--26. 1. "SRAM,Sram Size"
|
|
hexmask.long.word 0xC 0.--15. 1. "FLASH,Flash Size"
|
|
line.long 0x10 "PKGINFO,Miscellaneous device information"
|
|
hexmask.long.byte 0x10 16.--23. 1. "PINCOUNT,Pin Count"
|
|
hexmask.long.byte 0x10 8.--15. 1. "PKGTYPE,Package Type"
|
|
newline
|
|
hexmask.long.byte 0x10 0.--7. 1. "TEMPGRADE,Temperature Grade"
|
|
line.long 0x14 "CUSTOMINFO,Custom information"
|
|
hexmask.long.word 0x14 16.--31. 1. "PARTNO,Part Number"
|
|
line.long 0x18 "SWFIX,Used to track s/w workaround info"
|
|
hexmask.long 0x18 0.--31. 1. "RSV,Reserved"
|
|
line.long 0x1C "SWCAPA0,Software Capability Vector 0"
|
|
bitfld.long 0x1C 20.--21. "SRI,RAIL Capability" "0: RAIL capability not available,1: RAIL enabled,2: N/A,3: N/A"
|
|
bitfld.long 0x1C 16.--17. "CONNECT,Connect Capability" "0: Connect stack capability not available,1: Connect enabled,2: N/A,3: N/A"
|
|
newline
|
|
bitfld.long 0x1C 12.--13. "BTSMART,Bluetooth Smart Capability" "0: Bluetooth SMART stack capability not available,1: Bluetooth SMART enabled,2: N/A,3: N/A"
|
|
bitfld.long 0x1C 8.--9. "RF4CE,RF4CE Capability" "0: RF4CE stack capability not available,1: RF4CE stack enabled,2: N/A,3: N/A"
|
|
newline
|
|
bitfld.long 0x1C 4.--5. "THREAD,Thread Capability" "0: Thread stack capability not available,1: Thread stack enabled,2: N/A,3: N/A"
|
|
bitfld.long 0x1C 0.--1. "ZIGBEE,Zigbee Capability" "0: Zigbee stack capability not available,1: Green Power only,2: Zigbee and Green Power,3: Zigbee Only"
|
|
line.long 0x20 "SWCAPA1,Software Capability Vector 1"
|
|
bitfld.long 0x20 2. "GWEN,Gateway" "0,1"
|
|
bitfld.long 0x20 1. "NCPEN,NCP" "0,1"
|
|
newline
|
|
bitfld.long 0x20 0. "RFMCUEN,RF-MCU" "0,1"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x0 "EXTINFO,External component description"
|
|
hexmask.long.byte 0x0 16.--23. 1. "REV,Revision"
|
|
hexmask.long.byte 0x0 8.--15. 1. "CONNECTION,Connection"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "TYPE,Type"
|
|
rgroup.long 0x40++0x5F
|
|
line.long 0x0 "EUI48L,MA-L compliant EUI48 OUI (low bits) and Unique Identifier (24-bit)"
|
|
hexmask.long.byte 0x0 24.--31. 1. "OUI48L,OUI48L"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "UNIQUEID,Unique ID"
|
|
line.long 0x4 "EUI48H,MA-L compliant EUI48 OUI (high bits)"
|
|
hexmask.long.word 0x4 16.--31. 1. "RESERVED,RESERVED"
|
|
hexmask.long.word 0x4 0.--15. 1. "OUI48H,OUI48H"
|
|
line.long 0x8 "EUI64L,MA-L compliant EUI64 Unique Identifier (low bits)"
|
|
hexmask.long 0x8 0.--31. 1. "UNIQUEL,UNIQUEL"
|
|
line.long 0xC "EUI64H,MA-L compliant EUI64 OUI and Unique Identifier (high bits)"
|
|
hexmask.long.tbyte 0xC 8.--31. 1. "OUI64,OUI64"
|
|
hexmask.long.byte 0xC 0.--7. 1. "UNIQUEH,UNIQUEH"
|
|
line.long 0x10 "CALTEMP,Calibration Temperature Information"
|
|
hexmask.long.byte 0x10 0.--7. 1. "TEMP,Cal Temp"
|
|
line.long 0x14 "EMUTEMP,EMU Temperature Sensor Calibration"
|
|
hexmask.long.word 0x14 2.--10. 1. "EMUTEMPROOM,Emu Room Temperature"
|
|
line.long 0x18 "HFRCODPLLCAL0,HFRCODPLL Calibration"
|
|
hexmask.long.byte 0x18 28.--31. 1. "IREFTC,No Description"
|
|
bitfld.long 0x18 26.--27. "CMPSEL,No Description" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x18 24.--25. "CLKDIV,No Description" "0,1,2,3"
|
|
bitfld.long 0x18 21.--23. "CMPBIAS,No Description" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x18 16.--20. 1. "FREQRANGE,No Description"
|
|
bitfld.long 0x18 15. "LDOHP,No Description" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x18 8.--13. 1. "FINETUNING,No Description"
|
|
hexmask.long.byte 0x18 0.--6. 1. "TUNING,No Description"
|
|
line.long 0x1C "HFRCODPLLCAL1,HFRCODPLL Calibration"
|
|
hexmask.long.byte 0x1C 28.--31. 1. "IREFTC,No Description"
|
|
bitfld.long 0x1C 26.--27. "CMPSEL,No Description" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 24.--25. "CLKDIV,No Description" "0,1,2,3"
|
|
bitfld.long 0x1C 21.--23. "CMPBIAS,No Description" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x1C 16.--20. 1. "FREQRANGE,No Description"
|
|
bitfld.long 0x1C 15. "LDOHP,No Description" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x1C 8.--13. 1. "FINETUNING,No Description"
|
|
hexmask.long.byte 0x1C 0.--6. 1. "TUNING,No Description"
|
|
line.long 0x20 "HFRCODPLLCAL2,HFRCODPLL Calibration"
|
|
hexmask.long.byte 0x20 28.--31. 1. "IREFTC,No Description"
|
|
bitfld.long 0x20 26.--27. "CMPSEL,No Description" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x20 24.--25. "CLKDIV,No Description" "0,1,2,3"
|
|
bitfld.long 0x20 21.--23. "CMPBIAS,No Description" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x20 16.--20. 1. "FREQRANGE,No Description"
|
|
bitfld.long 0x20 15. "LDOHP,No Description" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x20 8.--13. 1. "FINETUNING,No Description"
|
|
hexmask.long.byte 0x20 0.--6. 1. "TUNING,No Description"
|
|
line.long 0x24 "HFRCODPLLCAL3,HFRCODPLL Calibration"
|
|
hexmask.long.byte 0x24 28.--31. 1. "IREFTC,No Description"
|
|
bitfld.long 0x24 26.--27. "CMPSEL,No Description" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x24 24.--25. "CLKDIV,No Description" "0,1,2,3"
|
|
bitfld.long 0x24 21.--23. "CMPBIAS,No Description" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x24 16.--20. 1. "FREQRANGE,No Description"
|
|
bitfld.long 0x24 15. "LDOHP,No Description" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x24 8.--13. 1. "FINETUNING,No Description"
|
|
hexmask.long.byte 0x24 0.--6. 1. "TUNING,No Description"
|
|
line.long 0x28 "HFRCODPLLCAL4,HFRCODPLL Calibration"
|
|
hexmask.long.byte 0x28 28.--31. 1. "IREFTC,No Description"
|
|
bitfld.long 0x28 26.--27. "CMPSEL,No Description" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x28 24.--25. "CLKDIV,No Description" "0,1,2,3"
|
|
bitfld.long 0x28 21.--23. "CMPBIAS,No Description" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x28 16.--20. 1. "FREQRANGE,No Description"
|
|
bitfld.long 0x28 15. "LDOHP,No Description" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x28 8.--13. 1. "FINETUNING,No Description"
|
|
hexmask.long.byte 0x28 0.--6. 1. "TUNING,No Description"
|
|
line.long 0x2C "HFRCODPLLCAL5,HFRCODPLL Calibration"
|
|
hexmask.long.byte 0x2C 28.--31. 1. "IREFTC,No Description"
|
|
bitfld.long 0x2C 26.--27. "CMPSEL,No Description" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x2C 24.--25. "CLKDIV,No Description" "0,1,2,3"
|
|
bitfld.long 0x2C 21.--23. "CMPBIAS,No Description" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x2C 16.--20. 1. "FREQRANGE,No Description"
|
|
bitfld.long 0x2C 15. "LDOHP,No Description" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x2C 8.--13. 1. "FINETUNING,No Description"
|
|
hexmask.long.byte 0x2C 0.--6. 1. "TUNING,No Description"
|
|
line.long 0x30 "HFRCODPLLCAL6,HFRCODPLL Calibration"
|
|
hexmask.long.byte 0x30 28.--31. 1. "IREFTC,No Description"
|
|
bitfld.long 0x30 26.--27. "CMPSEL,No Description" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x30 24.--25. "CLKDIV,No Description" "0,1,2,3"
|
|
bitfld.long 0x30 21.--23. "CMPBIAS,No Description" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x30 16.--20. 1. "FREQRANGE,No Description"
|
|
bitfld.long 0x30 15. "LDOHP,No Description" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x30 8.--13. 1. "FINETUNING,No Description"
|
|
hexmask.long.byte 0x30 0.--6. 1. "TUNING,No Description"
|
|
line.long 0x34 "HFRCODPLLCAL7,HFRCODPLL Calibration"
|
|
hexmask.long.byte 0x34 28.--31. 1. "IREFTC,No Description"
|
|
bitfld.long 0x34 26.--27. "CMPSEL,No Description" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x34 24.--25. "CLKDIV,No Description" "0,1,2,3"
|
|
bitfld.long 0x34 21.--23. "CMPBIAS,No Description" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x34 16.--20. 1. "FREQRANGE,No Description"
|
|
bitfld.long 0x34 15. "LDOHP,No Description" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x34 8.--13. 1. "FINETUNING,No Description"
|
|
hexmask.long.byte 0x34 0.--6. 1. "TUNING,No Description"
|
|
line.long 0x38 "HFRCODPLLCAL8,HFRCODPLL Calibration"
|
|
hexmask.long.byte 0x38 28.--31. 1. "IREFTC,No Description"
|
|
bitfld.long 0x38 26.--27. "CMPSEL,No Description" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x38 24.--25. "CLKDIV,No Description" "0,1,2,3"
|
|
bitfld.long 0x38 21.--23. "CMPBIAS,No Description" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x38 16.--20. 1. "FREQRANGE,No Description"
|
|
bitfld.long 0x38 15. "LDOHP,No Description" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x38 8.--13. 1. "FINETUNING,No Description"
|
|
hexmask.long.byte 0x38 0.--6. 1. "TUNING,No Description"
|
|
line.long 0x3C "HFRCODPLLCAL9,HFRCODPLL Calibration"
|
|
hexmask.long.byte 0x3C 28.--31. 1. "IREFTC,No Description"
|
|
bitfld.long 0x3C 26.--27. "CMPSEL,No Description" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x3C 24.--25. "CLKDIV,No Description" "0,1,2,3"
|
|
bitfld.long 0x3C 21.--23. "CMPBIAS,No Description" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x3C 16.--20. 1. "FREQRANGE,No Description"
|
|
bitfld.long 0x3C 15. "LDOHP,No Description" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x3C 8.--13. 1. "FINETUNING,No Description"
|
|
hexmask.long.byte 0x3C 0.--6. 1. "TUNING,No Description"
|
|
line.long 0x40 "HFRCODPLLCAL10,HFRCODPLL Calibration"
|
|
hexmask.long.byte 0x40 28.--31. 1. "IREFTC,No Description"
|
|
bitfld.long 0x40 26.--27. "CMPSEL,No Description" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x40 24.--25. "CLKDIV,No Description" "0,1,2,3"
|
|
bitfld.long 0x40 21.--23. "CMPBIAS,No Description" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x40 16.--20. 1. "FREQRANGE,No Description"
|
|
bitfld.long 0x40 15. "LDOHP,No Description" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x40 8.--13. 1. "FINETUNING,No Description"
|
|
hexmask.long.byte 0x40 0.--6. 1. "TUNING,No Description"
|
|
line.long 0x44 "HFRCODPLLCAL11,HFRCODPLL Calibration"
|
|
hexmask.long.byte 0x44 28.--31. 1. "IREFTC,No Description"
|
|
bitfld.long 0x44 26.--27. "CMPSEL,No Description" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x44 24.--25. "CLKDIV,No Description" "0,1,2,3"
|
|
bitfld.long 0x44 21.--23. "CMPBIAS,No Description" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x44 16.--20. 1. "FREQRANGE,No Description"
|
|
bitfld.long 0x44 15. "LDOHP,No Description" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x44 8.--13. 1. "FINETUNING,No Description"
|
|
hexmask.long.byte 0x44 0.--6. 1. "TUNING,No Description"
|
|
line.long 0x48 "HFRCODPLLCAL12,HFRCODPLL Calibration"
|
|
hexmask.long.byte 0x48 28.--31. 1. "IREFTC,No Description"
|
|
bitfld.long 0x48 26.--27. "CMPSEL,No Description" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x48 24.--25. "CLKDIV,No Description" "0,1,2,3"
|
|
bitfld.long 0x48 21.--23. "CMPBIAS,No Description" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x48 16.--20. 1. "FREQRANGE,No Description"
|
|
bitfld.long 0x48 15. "LDOHP,No Description" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x48 8.--13. 1. "FINETUNING,No Description"
|
|
hexmask.long.byte 0x48 0.--6. 1. "TUNING,No Description"
|
|
line.long 0x4C "HFRCODPLLCAL13,HFRCODPLL Calibration"
|
|
hexmask.long.byte 0x4C 28.--31. 1. "IREFTC,No Description"
|
|
bitfld.long 0x4C 26.--27. "CMPSEL,No Description" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4C 24.--25. "CLKDIV,No Description" "0,1,2,3"
|
|
bitfld.long 0x4C 21.--23. "CMPBIAS,No Description" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x4C 16.--20. 1. "FREQRANGE,No Description"
|
|
bitfld.long 0x4C 15. "LDOHP,No Description" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x4C 8.--13. 1. "FINETUNING,No Description"
|
|
hexmask.long.byte 0x4C 0.--6. 1. "TUNING,No Description"
|
|
line.long 0x50 "HFRCODPLLCAL14,HFRCODPLL Calibration"
|
|
hexmask.long.byte 0x50 28.--31. 1. "IREFTC,No Description"
|
|
bitfld.long 0x50 26.--27. "CMPSEL,No Description" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x50 24.--25. "CLKDIV,No Description" "0,1,2,3"
|
|
bitfld.long 0x50 21.--23. "CMPBIAS,No Description" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x50 16.--20. 1. "FREQRANGE,No Description"
|
|
bitfld.long 0x50 15. "LDOHP,No Description" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x50 8.--13. 1. "FINETUNING,No Description"
|
|
hexmask.long.byte 0x50 0.--6. 1. "TUNING,No Description"
|
|
line.long 0x54 "HFRCODPLLCAL15,HFRCODPLL Calibration"
|
|
hexmask.long.byte 0x54 28.--31. 1. "IREFTC,No Description"
|
|
bitfld.long 0x54 26.--27. "CMPSEL,No Description" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x54 24.--25. "CLKDIV,No Description" "0,1,2,3"
|
|
bitfld.long 0x54 21.--23. "CMPBIAS,No Description" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x54 16.--20. 1. "FREQRANGE,No Description"
|
|
bitfld.long 0x54 15. "LDOHP,No Description" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x54 8.--13. 1. "FINETUNING,No Description"
|
|
hexmask.long.byte 0x54 0.--6. 1. "TUNING,No Description"
|
|
line.long 0x58 "HFRCODPLLCAL16,HFRCODPLL Calibration"
|
|
hexmask.long.byte 0x58 28.--31. 1. "IREFTC,No Description"
|
|
bitfld.long 0x58 26.--27. "CMPSEL,No Description" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x58 24.--25. "CLKDIV,No Description" "0,1,2,3"
|
|
bitfld.long 0x58 21.--23. "CMPBIAS,No Description" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x58 16.--20. 1. "FREQRANGE,No Description"
|
|
bitfld.long 0x58 15. "LDOHP,No Description" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x58 8.--13. 1. "FINETUNING,No Description"
|
|
hexmask.long.byte 0x58 0.--6. 1. "TUNING,No Description"
|
|
line.long 0x5C "HFRCODPLLCAL17,HFRCODPLL Calibration"
|
|
hexmask.long.byte 0x5C 28.--31. 1. "IREFTC,No Description"
|
|
bitfld.long 0x5C 26.--27. "CMPSEL,No Description" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x5C 24.--25. "CLKDIV,No Description" "0,1,2,3"
|
|
bitfld.long 0x5C 21.--23. "CMPBIAS,No Description" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x5C 16.--20. 1. "FREQRANGE,No Description"
|
|
bitfld.long 0x5C 15. "LDOHP,No Description" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x5C 8.--13. 1. "FINETUNING,No Description"
|
|
hexmask.long.byte 0x5C 0.--6. 1. "TUNING,No Description"
|
|
rgroup.long 0x130++0x23
|
|
line.long 0x0 "MODULENAME0,Characters 1-4 of Module Name stored as a null terminated string"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MODCHAR4,No Description"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MODCHAR3,No Description"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "MODCHAR2,No Description"
|
|
hexmask.long.byte 0x0 0.--7. 1. "MODCHAR1,No Description"
|
|
line.long 0x4 "MODULENAME1,Characters 5-8 of Module Name stored as a null terminated string"
|
|
hexmask.long.byte 0x4 24.--31. 1. "MODCHAR8,No Description"
|
|
hexmask.long.byte 0x4 16.--23. 1. "MODCHAR7,No Description"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--15. 1. "MODCHAR6,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "MODCHAR5,No Description"
|
|
line.long 0x8 "MODULENAME2,Characters 9-12 of Module Name stored as a null terminated string"
|
|
hexmask.long.byte 0x8 24.--31. 1. "MODCHAR12,No Description"
|
|
hexmask.long.byte 0x8 16.--23. 1. "MODCHAR11,No Description"
|
|
newline
|
|
hexmask.long.byte 0x8 8.--15. 1. "MODCHAR10,No Description"
|
|
hexmask.long.byte 0x8 0.--7. 1. "MODCHAR9,No Description"
|
|
line.long 0xC "MODULENAME3,Characters 13-16 of Module Name stored as a null terminated string"
|
|
hexmask.long.byte 0xC 24.--31. 1. "MODCHAR16,No Description"
|
|
hexmask.long.byte 0xC 16.--23. 1. "MODCHAR15,No Description"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "MODCHAR14,No Description"
|
|
hexmask.long.byte 0xC 0.--7. 1. "MODCHAR13,No Description"
|
|
line.long 0x10 "MODULENAME4,Characters 17-20 of Module Name stored as a null terminated string"
|
|
hexmask.long.byte 0x10 24.--31. 1. "MODCHAR20,No Description"
|
|
hexmask.long.byte 0x10 16.--23. 1. "MODCHAR19,No Description"
|
|
newline
|
|
hexmask.long.byte 0x10 8.--15. 1. "MODCHAR18,No Description"
|
|
hexmask.long.byte 0x10 0.--7. 1. "MODCHAR17,No Description"
|
|
line.long 0x14 "MODULENAME5,Characters 21-24 of Module Name stored as a null terminated string"
|
|
hexmask.long.byte 0x14 24.--31. 1. "MODCHAR24,No Description"
|
|
hexmask.long.byte 0x14 16.--23. 1. "MODCHAR23,No Description"
|
|
newline
|
|
hexmask.long.byte 0x14 8.--15. 1. "MODCHAR22,No Description"
|
|
hexmask.long.byte 0x14 0.--7. 1. "MODCHAR21,No Description"
|
|
line.long 0x18 "MODULENAME6,Characters 25-26 of Module Name stored as a null terminated string"
|
|
hexmask.long.word 0x18 16.--31. 1. "RSV,No Description"
|
|
hexmask.long.byte 0x18 8.--15. 1. "MODCHAR26,No Description"
|
|
newline
|
|
hexmask.long.byte 0x18 0.--7. 1. "MODCHAR25,No Description"
|
|
line.long 0x1C "MODULEINFO,Module Information"
|
|
bitfld.long 0x1C 31. "EXTVALID,No Description" "0: EXT used,1: EXT not used"
|
|
bitfld.long 0x1C 30. "PHYLIMITED,No Description" "0: LIMITED,1: UNLIMITED"
|
|
newline
|
|
bitfld.long 0x1C 29. "PADCDC,No Description" "0: PAVDD connected to Vdcdc,1: PAVDD connected to Vdd or other"
|
|
hexmask.long.word 0x1C 20.--28. 1. "MODNUMBERMSB,No Description"
|
|
newline
|
|
bitfld.long 0x1C 19. "HFXOCALVAL,No Description" "0: HFXO calibration in MODXOCAL is valid,1: HFXO calibration in MODXOCAL is not valid"
|
|
bitfld.long 0x1C 18. "LFXOCALVAL,No Description" "0: LFXO Tuning in MODXOCAL is valid,1: LFXO Tuning value in MODXOCAL is not valid"
|
|
newline
|
|
bitfld.long 0x1C 17. "EXPRESS,No Description" "0: Blue Gecko Express is supported,1: Blue Gecko Express is not supported"
|
|
bitfld.long 0x1C 16. "LFXO,No Description" "0: LFXO is not installed,1: LFXO is installed"
|
|
newline
|
|
bitfld.long 0x1C 15. "TYPE,No Description" "0: PCB,1: SIP"
|
|
hexmask.long.byte 0x1C 8.--14. 1. "MODNUMBER,No Description"
|
|
newline
|
|
bitfld.long 0x1C 5.--7. "ANTENNA,No Description" "0: Built-in Antenna,1: RF Connector,2: RF Pad,3: F-invert PCB,?,?,?,?"
|
|
hexmask.long.byte 0x1C 0.--4. 1. "HWREV,No Description"
|
|
line.long 0x20 "MODXOCAL,Module Crystal Oscillator Calibration"
|
|
hexmask.long.byte 0x20 16.--22. 1. "LFXOCAPTUNE,No Description"
|
|
hexmask.long.byte 0x20 8.--15. 1. "HFXOCTUNEXOANA,No Description"
|
|
newline
|
|
hexmask.long.byte 0x20 0.--7. 1. "HFXOCTUNEXIANA,No Description"
|
|
rgroup.long 0x180++0x1B
|
|
line.long 0x0 "IADC0GAIN0,IADC0 Gain Calibration Info"
|
|
hexmask.long.word 0x0 16.--31. 1. "GAINCANA2,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "GAINCANA1,No Description"
|
|
line.long 0x4 "IADC0GAIN1,IADC0 Gain Calibration Info"
|
|
hexmask.long.word 0x4 16.--31. 1. "GAINCANA4,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "GAINCANA3,No Description"
|
|
line.long 0x8 "IADC0OFFSETCAL0,IADC0 Offset Calibration Info"
|
|
hexmask.long.word 0x8 16.--31. 1. "OFFSETANA1HIACC,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "OFFSETANABASE,No Description"
|
|
line.long 0xC "IADC0NORMALOFFSETCAL0,IADC0 Normal Offset Calibration Info"
|
|
hexmask.long.word 0xC 16.--31. 1. "OFFSETANA2NORM,No Description"
|
|
hexmask.long.word 0xC 0.--15. 1. "OFFSETANA1NORM,No Description"
|
|
line.long 0x10 "IADC0NORMALOFFSETCAL1,IADC0 Normal Offset Calibration Info"
|
|
hexmask.long.word 0x10 0.--15. 1. "OFFSETANA3NORM,No Description"
|
|
line.long 0x14 "IADC0HISPDOFFSETCAL0,IADC High Speed Offset Calibration Info"
|
|
hexmask.long.word 0x14 16.--31. 1. "OFFSETANA2HISPD,No Description"
|
|
hexmask.long.word 0x14 0.--15. 1. "OFFSETANA1HISPD,No Description"
|
|
line.long 0x18 "IADC0HISPDOFFSETCAL1,IADC High Speed Offset Calibration Info"
|
|
hexmask.long.word 0x18 0.--15. 1. "OFFSETANA3HISPD,No Description"
|
|
rgroup.long 0x1FC++0x3
|
|
line.long 0x0 "LEGACY,This is the legacy device detection information for tools compatability"
|
|
hexmask.long.byte 0x0 16.--23. 1. "DEVICEFAMILY,Device Family"
|
|
rgroup.long 0x25C++0x3
|
|
line.long 0x0 "RTHERM,Thermistor Calibrated Internal Resistance"
|
|
hexmask.long.word 0x0 0.--15. 1. "RTHERM,No Description"
|
|
tree.end
|
|
tree "DPLL (Digital Phased Locked Loop)"
|
|
base ad:0x0
|
|
tree "DPLL0_NS"
|
|
base ad:0x5001C000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version ID"
|
|
group.long 0x4++0x13
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,Module Enable" "0,1"
|
|
line.long 0x4 "CFG,No Description"
|
|
bitfld.long 0x4 6. "DITHEN,Dither Enable Control" "0,1"
|
|
bitfld.long 0x4 2. "AUTORECOVER,Automatic Recovery Control" "0,1"
|
|
bitfld.long 0x4 1. "EDGESEL,Reference Edge Select" "0,1"
|
|
bitfld.long 0x4 0. "MODE,Operating Mode Control" "0: Frequency Lock Mode,1: Phase Lock Mode"
|
|
line.long 0x8 "CFG1,No Description"
|
|
hexmask.long.word 0x8 16.--27. 1. "N,Factor N"
|
|
hexmask.long.word 0x8 0.--11. 1. "M,Factor M"
|
|
line.long 0xC "IF,No Description"
|
|
bitfld.long 0xC 2. "LOCKFAILHIGH,Lock Failure High Interrupt Flag" "0,1"
|
|
bitfld.long 0xC 1. "LOCKFAILLOW,Lock Failure Low Interrupt Flag" "0,1"
|
|
bitfld.long 0xC 0. "LOCK,Lock Interrupt Flag" "0,1"
|
|
line.long 0x10 "IEN,No Description"
|
|
bitfld.long 0x10 2. "LOCKFAILHIGH,LOCKFAILHIGH Interrupt Enable" "0,1"
|
|
bitfld.long 0x10 1. "LOCKFAILLOW,LOCKFAILLOW Interrupe Enable" "0,1"
|
|
bitfld.long 0x10 0. "LOCK,LOCK interrupt Enable" "0,1"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 31. "LOCK,Lock Status" "0: UNLOCKED,1: LOCKED"
|
|
bitfld.long 0x0 1. "ENS,Enable Status" "0,1"
|
|
bitfld.long 0x0 0. "RDY,Ready Status" "0,1"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Lock Key"
|
|
tree.end
|
|
tree "DPLL0_S"
|
|
base ad:0x4001C000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version ID"
|
|
group.long 0x4++0x13
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,Module Enable" "0,1"
|
|
line.long 0x4 "CFG,No Description"
|
|
bitfld.long 0x4 6. "DITHEN,Dither Enable Control" "0,1"
|
|
bitfld.long 0x4 2. "AUTORECOVER,Automatic Recovery Control" "0,1"
|
|
bitfld.long 0x4 1. "EDGESEL,Reference Edge Select" "0,1"
|
|
bitfld.long 0x4 0. "MODE,Operating Mode Control" "0: Frequency Lock Mode,1: Phase Lock Mode"
|
|
line.long 0x8 "CFG1,No Description"
|
|
hexmask.long.word 0x8 16.--27. 1. "N,Factor N"
|
|
hexmask.long.word 0x8 0.--11. 1. "M,Factor M"
|
|
line.long 0xC "IF,No Description"
|
|
bitfld.long 0xC 2. "LOCKFAILHIGH,Lock Failure High Interrupt Flag" "0,1"
|
|
bitfld.long 0xC 1. "LOCKFAILLOW,Lock Failure Low Interrupt Flag" "0,1"
|
|
bitfld.long 0xC 0. "LOCK,Lock Interrupt Flag" "0,1"
|
|
line.long 0x10 "IEN,No Description"
|
|
bitfld.long 0x10 2. "LOCKFAILHIGH,LOCKFAILHIGH Interrupt Enable" "0,1"
|
|
bitfld.long 0x10 1. "LOCKFAILLOW,LOCKFAILLOW Interrupe Enable" "0,1"
|
|
bitfld.long 0x10 0. "LOCK,LOCK interrupt Enable" "0,1"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 31. "LOCK,Lock Status" "0: UNLOCKED,1: LOCKED"
|
|
bitfld.long 0x0 1. "ENS,Enable Status" "0,1"
|
|
bitfld.long 0x0 0. "RDY,Ready Status" "0,1"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Lock Key"
|
|
tree.end
|
|
tree.end
|
|
tree "EMU (Energy Management Unit)"
|
|
base ad:0x0
|
|
tree "EMU_NS"
|
|
base ad:0x50004000
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "DECBOD,No Description"
|
|
bitfld.long 0x0 5. "DECOVMBODMASK,Over Voltage Monitor Mask" "0,1"
|
|
bitfld.long 0x0 4. "DECOVMBODEN,Over Voltage Monitor enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "DECBODMASK,DECBOD Mask" "0,1"
|
|
bitfld.long 0x0 0. "DECBODEN,DECBOD enable" "0,1"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "BOD3SENSE,No Description"
|
|
bitfld.long 0x0 2. "VDDIO1BODEN,VDDIO1 BOD enable" "0,1"
|
|
bitfld.long 0x0 1. "VDDIO0BODEN,VDDIO0 BOD enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "AVDDBODEN,AVDD BOD enable" "0,1"
|
|
group.long 0x3C++0x7
|
|
line.long 0x0 "VREGVDDCMPCTRL,No Description"
|
|
bitfld.long 0x0 1.--2. "THRESSEL,VREGVDD comparator threshold programming" "0,1,2,3"
|
|
bitfld.long 0x0 0. "VREGINCMPEN,VREGVDD comparator enable" "0,1"
|
|
line.long 0x4 "PD1PARETCTRL,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "PD1PARETDIS,Disable PD1 Partial Retention"
|
|
wgroup.long 0x60++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Lock Key"
|
|
group.long 0x64++0xB
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 31. "TEMPHIGH,Temperature high Interrupt flag" "0,1"
|
|
bitfld.long 0x0 30. "TEMPLOW,Temperature low Interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "TEMP,Temperature Interrupt flag" "0,1"
|
|
bitfld.long 0x0 27. "TEMPAVG,Temperature Average Interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "VSCALEDONE,Vscale done Interrupt flag" "0,1"
|
|
bitfld.long 0x0 24. "EM23WAKEUP,EM23 Wake up Interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "IOVDD0BOD,VDDIO0 BOD Interrupt flag" "0,1"
|
|
bitfld.long 0x0 16. "AVDDBOD,AVDD BOD Interrupt flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 31. "TEMPHIGH,Temperature high Interrupt enable" "0,1"
|
|
bitfld.long 0x4 30. "TEMPLOW,Temperature low Interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "TEMP,Temperature Interrupt enable" "0,1"
|
|
bitfld.long 0x4 27. "TEMPAVG,Temperature Interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "VSCALEDONE,Vscale done Interrupt enable" "0,1"
|
|
bitfld.long 0x4 24. "EM23WAKEUP,EM23 Wake up Interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "IOVDD0BOD,VDDIO0 BOD Interrupt enable" "0,1"
|
|
bitfld.long 0x4 16. "AVDDBOD,AVDD BOD Interrupt enable" "0,1"
|
|
line.long 0x8 "EM4CTRL,No Description"
|
|
bitfld.long 0x8 8. "BOD3SENSEEM4WU,Set BOD3SENSE as EM4 wakeup" "0,1"
|
|
bitfld.long 0x8 4.--5. "EM4IORETMODE,EM4 IO retention mode" "0: No Retention: Pads enter reset state when..,1: Retention through EM4: Pads enter reset state..,2: Retention through EM4 and Wakeup: software..,?"
|
|
newline
|
|
bitfld.long 0x8 0.--1. "EM4ENTRY,EM4 entry request" "0,1,2,3"
|
|
wgroup.long 0x70++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 17. "RSTCAUSECLR,Reset Cause Clear" "0,1"
|
|
bitfld.long 0x0 11. "EM01VSCALE2,Scale voltage to Vscale2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "EM01VSCALE1,Scale voltage to Vscale1" "0,1"
|
|
bitfld.long 0x0 4. "TEMPAVGREQ,Temperature Average Request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "EM4UNLATCH,EM4 unlatch" "0,1"
|
|
group.long 0x74++0x7
|
|
line.long 0x0 "CTRL,No Description"
|
|
bitfld.long 0x0 31. "EFPDRVDVDD,EFP drives DVDD" "0,1"
|
|
bitfld.long 0x0 30. "EFPDRVDECOUPLE,EFP drives DECOUPLE" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "EFPDIRECTMODEEN,EFP Direct Mode Enable" "0,1"
|
|
bitfld.long 0x0 16. "FLASHPWRUPONDEMAND,Enable flash on demand wakeup" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "EM23VSCALE,EM2/EM3 Vscale" "0: VSCALE0. 0.9v,1: VSCALE1. 1.0v,2: VSCALE2. 1.1v,?"
|
|
bitfld.long 0x0 3. "TEMPAVGNUM,Averaged Temperature samples num" "0: 16 measurements,1: 64 measurements"
|
|
newline
|
|
bitfld.long 0x0 0. "EM2DBGEN,Enable debugging in EM2" "0,1"
|
|
line.long 0x4 "TEMPLIMITS,No Description"
|
|
hexmask.long.word 0x4 16.--24. 1. "TEMPHIGH,Temp High limit"
|
|
hexmask.long.word 0x4 0.--8. 1. "TEMPLOW,Temp Low limit"
|
|
rgroup.long 0x84++0x7
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 14. "EM2ENTERED,EM2 entered" "0,1"
|
|
bitfld.long 0x0 12. "EM4IORET,EM4 IO retention status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "RACACTIVE,RAC active" "0,1"
|
|
bitfld.long 0x0 6.--7. "VSCALE,Vscale status" "0: Voltage scaling set to 0.9v,1: Voltage scaling set to 1.0v,2: Voltage scaling set to 1.1v,?"
|
|
newline
|
|
bitfld.long 0x0 5. "VSCALEFAILED,Vscale failed" "0,1"
|
|
bitfld.long 0x0 4. "VSCALEBUSY,Vscale busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "TEMPAVGACTIVE,Temp Average active" "0,1"
|
|
bitfld.long 0x0 2. "TEMPACTIVE,Temp active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "FIRSTTEMPDONE,First Temp done" "0,1"
|
|
bitfld.long 0x0 0. "LOCK,Lock status" "0: All EMU lockable registers are unlocked.,1: All EMU lockable registers are locked."
|
|
line.long 0x4 "TEMP,No Description"
|
|
hexmask.long.word 0x4 16.--26. 1. "TEMPAVG,Averaged Temperature"
|
|
hexmask.long.word 0x4 2.--10. 1. "TEMP,Temperature measured"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "TEMPLSB,Temperature measured decimal part" "0,1,2,3"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "RSTCTRL,No Description"
|
|
bitfld.long 0x0 16. "DCIRMODE,DCI System reset" "0: Reset request blocked,1: The entire device is reset except some EMU.."
|
|
bitfld.long 0x0 10. "DECBODRMODE,Enable DECBOD reset" "0: Reset request is blocked,1: The entire device is reset"
|
|
newline
|
|
bitfld.long 0x0 7. "IOVDD0BODRMODE,Enable VDDIO0 BOD reset" "0: Reset request is blocked,1: The entire device is reset except some EMU.."
|
|
bitfld.long 0x0 6. "AVDDBODRMODE,Enable AVDD BOD reset" "0: Reset Request is block,1: The entire device is reset except some EMU.."
|
|
newline
|
|
bitfld.long 0x0 3. "LOCKUPRMODE,Enable M33 Lockup reset" "0: Reset Request is Block,1: The entire device is reset except some EMU.."
|
|
bitfld.long 0x0 2. "SYSRMODE,Enable M33 System reset" "0: Reset request is blocked,1: Device is reset except some EMU registers"
|
|
newline
|
|
bitfld.long 0x0 0. "WDOG0RMODE,Enable WDOG0 reset" "0: Reset request is blocked,1: The entire device is reset except some EMU.."
|
|
rgroup.long 0x94++0x3
|
|
line.long 0x0 "RSTCAUSE,No Description"
|
|
bitfld.long 0x0 31. "VREGIN,DCDC VREGIN comparator" "0,1"
|
|
bitfld.long 0x0 16. "DCI,DCI reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "IOVDD0BOD,LEBOD2 Reset" "0,1"
|
|
bitfld.long 0x0 10. "AVDDBOD,LEBOD1 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "DECBOD,LVBOD Reset" "0,1"
|
|
bitfld.long 0x0 8. "DVDDLEBOD,LEBOD Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "DVDDBOD,HVBOD Reset" "0,1"
|
|
bitfld.long 0x0 6. "SYSREQ,M33 Core Sys Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "LOCKUP,M33 Core Lockup Reset" "0,1"
|
|
bitfld.long 0x0 3. "WDOG0,Watchdog 0 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "EM4,EM4 Wakeup Reset" "0,1"
|
|
bitfld.long 0x0 1. "PIN,Pin Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "POR,Power On Reset" "0,1"
|
|
group.long 0xA0++0x7
|
|
line.long 0x0 "DGIF,No Description"
|
|
bitfld.long 0x0 31. "TEMPHIGHDGIF,Temperature high Interrupt flag" "0,1"
|
|
bitfld.long 0x0 30. "TEMPLOWDGIF,Temperature low Interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "TEMPDGIF,Temperature Interrupt flag" "0,1"
|
|
bitfld.long 0x0 24. "EM23WAKEUPDGIF,EM23 Wake up Interrupt flag" "0,1"
|
|
line.long 0x4 "DGIEN,No Description"
|
|
bitfld.long 0x4 31. "TEMPHIGHDGIEN,Temperature high Interrupt enable" "0,1"
|
|
bitfld.long 0x4 30. "TEMPLOWDGIEN,Temperature low Interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "TEMPDGIEN,Temperature Interrupt enable" "0,1"
|
|
bitfld.long 0x4 24. "EM23WAKEUPDGIEN,EM23 Wake up Interrupt enable" "0,1"
|
|
group.long 0x100++0x7
|
|
line.long 0x0 "EFPIF,No Description"
|
|
bitfld.long 0x0 0. "EFPIF,EFP Interrupt Flag" "0,1"
|
|
line.long 0x4 "EFPIEN,No Description"
|
|
bitfld.long 0x4 0. "EFPIEN,EFP Interrupt enable" "0,1"
|
|
tree.end
|
|
tree "EMU_S"
|
|
base ad:0x40004000
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "DECBOD,No Description"
|
|
bitfld.long 0x0 5. "DECOVMBODMASK,Over Voltage Monitor Mask" "0,1"
|
|
bitfld.long 0x0 4. "DECOVMBODEN,Over Voltage Monitor enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "DECBODMASK,DECBOD Mask" "0,1"
|
|
bitfld.long 0x0 0. "DECBODEN,DECBOD enable" "0,1"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "BOD3SENSE,No Description"
|
|
bitfld.long 0x0 2. "VDDIO1BODEN,VDDIO1 BOD enable" "0,1"
|
|
bitfld.long 0x0 1. "VDDIO0BODEN,VDDIO0 BOD enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "AVDDBODEN,AVDD BOD enable" "0,1"
|
|
group.long 0x3C++0x7
|
|
line.long 0x0 "VREGVDDCMPCTRL,No Description"
|
|
bitfld.long 0x0 1.--2. "THRESSEL,VREGVDD comparator threshold programming" "0,1,2,3"
|
|
bitfld.long 0x0 0. "VREGINCMPEN,VREGVDD comparator enable" "0,1"
|
|
line.long 0x4 "PD1PARETCTRL,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "PD1PARETDIS,Disable PD1 Partial Retention"
|
|
wgroup.long 0x60++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Lock Key"
|
|
group.long 0x64++0xB
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 31. "TEMPHIGH,Temperature high Interrupt flag" "0,1"
|
|
bitfld.long 0x0 30. "TEMPLOW,Temperature low Interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "TEMP,Temperature Interrupt flag" "0,1"
|
|
bitfld.long 0x0 27. "TEMPAVG,Temperature Average Interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "VSCALEDONE,Vscale done Interrupt flag" "0,1"
|
|
bitfld.long 0x0 24. "EM23WAKEUP,EM23 Wake up Interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "IOVDD0BOD,VDDIO0 BOD Interrupt flag" "0,1"
|
|
bitfld.long 0x0 16. "AVDDBOD,AVDD BOD Interrupt flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 31. "TEMPHIGH,Temperature high Interrupt enable" "0,1"
|
|
bitfld.long 0x4 30. "TEMPLOW,Temperature low Interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "TEMP,Temperature Interrupt enable" "0,1"
|
|
bitfld.long 0x4 27. "TEMPAVG,Temperature Interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "VSCALEDONE,Vscale done Interrupt enable" "0,1"
|
|
bitfld.long 0x4 24. "EM23WAKEUP,EM23 Wake up Interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "IOVDD0BOD,VDDIO0 BOD Interrupt enable" "0,1"
|
|
bitfld.long 0x4 16. "AVDDBOD,AVDD BOD Interrupt enable" "0,1"
|
|
line.long 0x8 "EM4CTRL,No Description"
|
|
bitfld.long 0x8 8. "BOD3SENSEEM4WU,Set BOD3SENSE as EM4 wakeup" "0,1"
|
|
bitfld.long 0x8 4.--5. "EM4IORETMODE,EM4 IO retention mode" "0: No Retention: Pads enter reset state when..,1: Retention through EM4: Pads enter reset state..,2: Retention through EM4 and Wakeup: software..,?"
|
|
newline
|
|
bitfld.long 0x8 0.--1. "EM4ENTRY,EM4 entry request" "0,1,2,3"
|
|
wgroup.long 0x70++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 17. "RSTCAUSECLR,Reset Cause Clear" "0,1"
|
|
bitfld.long 0x0 11. "EM01VSCALE2,Scale voltage to Vscale2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "EM01VSCALE1,Scale voltage to Vscale1" "0,1"
|
|
bitfld.long 0x0 4. "TEMPAVGREQ,Temperature Average Request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "EM4UNLATCH,EM4 unlatch" "0,1"
|
|
group.long 0x74++0x7
|
|
line.long 0x0 "CTRL,No Description"
|
|
bitfld.long 0x0 31. "EFPDRVDVDD,EFP drives DVDD" "0,1"
|
|
bitfld.long 0x0 30. "EFPDRVDECOUPLE,EFP drives DECOUPLE" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "EFPDIRECTMODEEN,EFP Direct Mode Enable" "0,1"
|
|
bitfld.long 0x0 16. "FLASHPWRUPONDEMAND,Enable flash on demand wakeup" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "EM23VSCALE,EM2/EM3 Vscale" "0: VSCALE0. 0.9v,1: VSCALE1. 1.0v,2: VSCALE2. 1.1v,?"
|
|
bitfld.long 0x0 3. "TEMPAVGNUM,Averaged Temperature samples num" "0: 16 measurements,1: 64 measurements"
|
|
newline
|
|
bitfld.long 0x0 0. "EM2DBGEN,Enable debugging in EM2" "0,1"
|
|
line.long 0x4 "TEMPLIMITS,No Description"
|
|
hexmask.long.word 0x4 16.--24. 1. "TEMPHIGH,Temp High limit"
|
|
hexmask.long.word 0x4 0.--8. 1. "TEMPLOW,Temp Low limit"
|
|
rgroup.long 0x84++0x7
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 14. "EM2ENTERED,EM2 entered" "0,1"
|
|
bitfld.long 0x0 12. "EM4IORET,EM4 IO retention status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "RACACTIVE,RAC active" "0,1"
|
|
bitfld.long 0x0 6.--7. "VSCALE,Vscale status" "0: Voltage scaling set to 0.9v,1: Voltage scaling set to 1.0v,2: Voltage scaling set to 1.1v,?"
|
|
newline
|
|
bitfld.long 0x0 5. "VSCALEFAILED,Vscale failed" "0,1"
|
|
bitfld.long 0x0 4. "VSCALEBUSY,Vscale busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "TEMPAVGACTIVE,Temp Average active" "0,1"
|
|
bitfld.long 0x0 2. "TEMPACTIVE,Temp active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "FIRSTTEMPDONE,First Temp done" "0,1"
|
|
bitfld.long 0x0 0. "LOCK,Lock status" "0: All EMU lockable registers are unlocked.,1: All EMU lockable registers are locked."
|
|
line.long 0x4 "TEMP,No Description"
|
|
hexmask.long.word 0x4 16.--26. 1. "TEMPAVG,Averaged Temperature"
|
|
hexmask.long.word 0x4 2.--10. 1. "TEMP,Temperature measured"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "TEMPLSB,Temperature measured decimal part" "0,1,2,3"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "RSTCTRL,No Description"
|
|
bitfld.long 0x0 16. "DCIRMODE,DCI System reset" "0: Reset request blocked,1: The entire device is reset except some EMU.."
|
|
bitfld.long 0x0 10. "DECBODRMODE,Enable DECBOD reset" "0: Reset request is blocked,1: The entire device is reset"
|
|
newline
|
|
bitfld.long 0x0 7. "IOVDD0BODRMODE,Enable VDDIO0 BOD reset" "0: Reset request is blocked,1: The entire device is reset except some EMU.."
|
|
bitfld.long 0x0 6. "AVDDBODRMODE,Enable AVDD BOD reset" "0: Reset Request is block,1: The entire device is reset except some EMU.."
|
|
newline
|
|
bitfld.long 0x0 3. "LOCKUPRMODE,Enable M33 Lockup reset" "0: Reset Request is Block,1: The entire device is reset except some EMU.."
|
|
bitfld.long 0x0 2. "SYSRMODE,Enable M33 System reset" "0: Reset request is blocked,1: Device is reset except some EMU registers"
|
|
newline
|
|
bitfld.long 0x0 0. "WDOG0RMODE,Enable WDOG0 reset" "0: Reset request is blocked,1: The entire device is reset except some EMU.."
|
|
rgroup.long 0x94++0x3
|
|
line.long 0x0 "RSTCAUSE,No Description"
|
|
bitfld.long 0x0 31. "VREGIN,DCDC VREGIN comparator" "0,1"
|
|
bitfld.long 0x0 16. "DCI,DCI reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "IOVDD0BOD,LEBOD2 Reset" "0,1"
|
|
bitfld.long 0x0 10. "AVDDBOD,LEBOD1 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "DECBOD,LVBOD Reset" "0,1"
|
|
bitfld.long 0x0 8. "DVDDLEBOD,LEBOD Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "DVDDBOD,HVBOD Reset" "0,1"
|
|
bitfld.long 0x0 6. "SYSREQ,M33 Core Sys Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "LOCKUP,M33 Core Lockup Reset" "0,1"
|
|
bitfld.long 0x0 3. "WDOG0,Watchdog 0 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "EM4,EM4 Wakeup Reset" "0,1"
|
|
bitfld.long 0x0 1. "PIN,Pin Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "POR,Power On Reset" "0,1"
|
|
group.long 0xA0++0x7
|
|
line.long 0x0 "DGIF,No Description"
|
|
bitfld.long 0x0 31. "TEMPHIGHDGIF,Temperature high Interrupt flag" "0,1"
|
|
bitfld.long 0x0 30. "TEMPLOWDGIF,Temperature low Interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "TEMPDGIF,Temperature Interrupt flag" "0,1"
|
|
bitfld.long 0x0 24. "EM23WAKEUPDGIF,EM23 Wake up Interrupt flag" "0,1"
|
|
line.long 0x4 "DGIEN,No Description"
|
|
bitfld.long 0x4 31. "TEMPHIGHDGIEN,Temperature high Interrupt enable" "0,1"
|
|
bitfld.long 0x4 30. "TEMPLOWDGIEN,Temperature low Interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "TEMPDGIEN,Temperature Interrupt enable" "0,1"
|
|
bitfld.long 0x4 24. "EM23WAKEUPDGIEN,EM23 Wake up Interrupt enable" "0,1"
|
|
group.long 0x100++0x7
|
|
line.long 0x0 "EFPIF,No Description"
|
|
bitfld.long 0x0 0. "EFPIF,EFP Interrupt Flag" "0,1"
|
|
line.long 0x4 "EFPIEN,No Description"
|
|
bitfld.long 0x4 0. "EFPIEN,EFP Interrupt enable" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "EUART (Enhanced Universal Asynchronous Receiver/Transmitter)"
|
|
base ad:0x0
|
|
tree "EUART0_NS"
|
|
base ad:0x5A030000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP version ID"
|
|
group.long 0x4++0x2B
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,Module enable" "0,1"
|
|
line.long 0x4 "CFG0,No Description"
|
|
bitfld.long 0x4 31. "AUTOBAUDEN,AUTOBAUD detection enable" "0,1"
|
|
bitfld.long 0x4 30. "MVDIS,Majority Vote Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "ERRSTX,Disable TX On Error" "0: Received framing and parity errors have no..,1: Received framing and parity errors disable the.."
|
|
bitfld.long 0x4 23. "ERRSRX,Disable RX On Error" "0: Framing and parity errors have no effect on..,1: Framing and parity errors disable the receiver"
|
|
newline
|
|
bitfld.long 0x4 22. "ERRSDMA,Halt DMA Read On Error" "0: Framing and parity errors have no effect on DMA..,1: DMA requests from the UART are blocked while the.."
|
|
bitfld.long 0x4 20. "SKIPPERRF,Skip Parity Error Frames" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "AUTOTRI,Automatic TX Tristate" "0: The output on UARTn_TX when the transmitter is..,1: UARTn_TX is tristated whenever the transmitter.."
|
|
bitfld.long 0x4 14. "TXINV,Transmitter output Invert" "0: Output from the transmitter is passed unchanged..,1: Output from the transmitter is inverted before.."
|
|
newline
|
|
bitfld.long 0x4 13. "RXINV,Receiver Input Invert" "0: Input is passed directly to the receiver,1: Input is inverted before it is passed to the.."
|
|
bitfld.long 0x4 10. "MSBF,Most Significant Bit First" "0: Data is sent with the least significant bit first,1: Data is sent with the most significant bit first"
|
|
newline
|
|
bitfld.long 0x4 5.--7. "OVS,Oversampling" "0: 16X oversampling,1: 8X oversampling,2: 6X oversampling,3: 4X oversampling,4: Disable oversampling (for LF operation),?,?,?"
|
|
bitfld.long 0x4 4. "MPAB,Multi-Processor Address-Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "MPM,Multi-Processor Mode" "0: The 9th bit of incoming frames has no special..,1: An incoming frame with the 9th bit equal to MPAB.."
|
|
bitfld.long 0x4 2. "CCEN,Collision Check Enable" "0: Collision check is disabled,1: Collision check is enabled. The receiver must be.."
|
|
newline
|
|
bitfld.long 0x4 1. "LOOPBK,Loopback Enable" "0: The receiver is connected to and receives data..,1: The receiver is connected to and receives data.."
|
|
line.long 0x8 "CFG1,No Description"
|
|
bitfld.long 0x8 22.--23. "RTSRXFW,Request-to-send RX FIFO Watermark" "0: RTS is set if there is space for at least one..,1: RTS is set if there is space for at least two..,2: RTS is set if there is space for at least three..,3: RTS is set if there is space for four more.."
|
|
bitfld.long 0x8 19.--20. "RXFIW,RX FIFO Interrupt Watermark" "0: RXFL status flag and IF are set when the RX FIFO..,1: RXFL status flag and IF are set when the RX FIFO..,2: RXFL status flag and IF are set when the RX FIFO..,3: RXFL status flag and IF are set when the RX FIFO.."
|
|
newline
|
|
bitfld.long 0x8 16.--17. "TXFIW,TX FIFO Interrupt Watermark" "0: TXFL status flag and IF are set when the TX FIFO..,1: TXFL status flag and IF are set when the TX FIFO..,2: TXFL status flag and IF are set when the TX FIFO..,3: TXFL status flag and IF are set when the TX FIFO.."
|
|
bitfld.long 0x8 15. "RXPRSEN,PRS RX Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 11. "SFUBRX,Start Frame Unblock Receiver" "0,1"
|
|
bitfld.long 0x8 10. "RXDMAWU,Receiver DMA Wakeup" "0,1"
|
|
newline
|
|
bitfld.long 0x8 9. "TXDMAWU,Transmitter DMA Wakeup" "0,1"
|
|
bitfld.long 0x8 3. "RTSINV,Request-to-send Invert Enable" "0: The RTS pin is active low,1: The RTS pin is active high"
|
|
newline
|
|
bitfld.long 0x8 2. "CTSEN,Clear-to-send Enable" "0: Ignore CTS,1: Stop transmitting when CTS is inactive"
|
|
bitfld.long 0x8 1. "CTSINV,Clear-to-send Invert Enable" "0: The CTS pin is active low,1: The CTS pin is active high"
|
|
newline
|
|
bitfld.long 0x8 0. "DBGHALT,Debug halt" "0: Continue normal UART operation even if core is..,1: If core is halted receive one frame and then.."
|
|
line.long 0xC "FRAMECFG,No Description"
|
|
bitfld.long 0xC 12.--13. "STOPBITS,Stop-Bit Mode" "0: The transmitter generates a half stop bit.,1: One stop bit is generated and verified,2: The transmitter generates one and a half stop..,3: The transmitter generates two stop bits. The.."
|
|
bitfld.long 0xC 8.--9. "PARITY,Parity-Bit Mode" "0: Parity bits are not used,?,2: Even parity are used. Parity bits are..,3: Odd parity is used. Parity bits are.."
|
|
newline
|
|
bitfld.long 0xC 0.--1. "DATABITS,Data-Bit Mode" "?,1: Each frame contains 7 data bits,2: Each frame contains 8 data bits,3: Each frame contains 9 data bits"
|
|
line.long 0x10 "IRHFCFG,No Description"
|
|
bitfld.long 0x10 3. "IRHFFILT,IrDA RX Filter" "0: No filter enabled,1: Filter enabled. IrDA pulse must be high for at.."
|
|
bitfld.long 0x10 1.--2. "IRHFPW,IrDA TX Pulse Width" "0: IrDA pulse width is 1/16 for OVS=0 and 1/8 for..,1: IrDA pulse width is 2/16 for OVS=0 and 2/8 for..,2: IrDA pulse width is 3/16 for OVS=0 and 3/8 for..,3: IrDA pulse width is 4/16 for OVS=0 and 4/8 for.."
|
|
newline
|
|
bitfld.long 0x10 0. "IRHFEN,Enable IrDA Module" "0,1"
|
|
line.long 0x14 "IRLFCFG,No Description"
|
|
bitfld.long 0x14 0. "IRLFEN,Pulse Generator/Extender Enable" "0,1"
|
|
line.long 0x18 "TIMINGCFG,No Description"
|
|
bitfld.long 0x18 0.--1. "TXDELAY,TX Delay Transmission" "0: Frames are transmitted immediately.,1: Transmission of new frames is delayed by a..,2: Transmission of new frames is delayed by a two..,3: Transmission of new frames is delayed by a three.."
|
|
line.long 0x1C "STARTFRAMECFG,No Description"
|
|
hexmask.long.word 0x1C 0.--8. 1. "STARTFRAME,Start Frame"
|
|
line.long 0x20 "SIGFRAMECFG,No Description"
|
|
hexmask.long.word 0x20 0.--8. 1. "SIGFRAME,Signal Frame Value"
|
|
line.long 0x24 "CLKDIV,No Description"
|
|
hexmask.long.tbyte 0x24 3.--22. 1. "DIV,Fractional Clock Divider"
|
|
line.long 0x28 "TRIGCTRL,No Description"
|
|
bitfld.long 0x28 1. "TXTEN,Transmit Trigger Enable" "0,1"
|
|
bitfld.long 0x28 0. "RXTEN,Receive Trigger Enable" "0,1"
|
|
wgroup.long 0x30++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 8. "CLEARTX,Clear TX FIFO" "0,1"
|
|
bitfld.long 0x0 7. "TXTRIDIS,Transmitter Tristate Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TXTRIEN,Transmitter Tristate Enable" "0,1"
|
|
bitfld.long 0x0 5. "RXBLOCKDIS,Receiver Block Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "RXBLOCKEN,Receiver Block Enable" "0,1"
|
|
bitfld.long 0x0 3. "TXDIS,Transmitter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "TXEN,Transmitter Enable" "0,1"
|
|
bitfld.long 0x0 1. "RXDIS,Receiver Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXEN,Receiver Enable" "0,1"
|
|
rgroup.long 0x34++0x7
|
|
line.long 0x0 "RXDATA,No Description"
|
|
bitfld.long 0x0 10. "FERR,Framing Error" "0,1"
|
|
bitfld.long 0x0 9. "PERR,Parity Error" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--8. 1. "RXDATA,RX Data"
|
|
line.long 0x4 "RXDATAP,No Description"
|
|
bitfld.long 0x4 10. "FERRP,Framing Error Peek" "0,1"
|
|
bitfld.long 0x4 9. "PERRP,Parity Error Peek" "0,1"
|
|
newline
|
|
hexmask.long.word 0x4 0.--8. 1. "RXDATAP,RX Data Peek"
|
|
wgroup.long 0x3C++0x3
|
|
line.long 0x0 "TXDATA,No Description"
|
|
bitfld.long 0x0 13. "RXENAT,Enable RXEN After Transmission" "0,1"
|
|
bitfld.long 0x0 12. "TXDISAT,Clear TXEN After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "TXBREAK,Transit Data as Break" "0,1"
|
|
bitfld.long 0x0 10. "TXTRIAT,Set TXTRI After Transmisssion" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "UBRXAT,Unblock RX After Transmission" "0,1"
|
|
hexmask.long.word 0x0 0.--8. 1. "TXDATA,TX Data"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 24. "AUTOBAUDDONE,Auto Baud Rate Detection Completed" "0,1"
|
|
bitfld.long 0x0 19. "CLEARTXBUSY,TX FIFO Clear Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16.--18. "TXFCNT,Valid entries in TX FIFO" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 13. "TXIDLE,TX Idle" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "RXIDLE,RX Idle" "0,1"
|
|
bitfld.long 0x0 8. "RXFULL,RX FIFO Full" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "RXFL,RX FIFO Level" "0,1"
|
|
bitfld.long 0x0 6. "TXFL,TX FIFO Level" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "TXC,TX Complete" "0,1"
|
|
bitfld.long 0x0 4. "TXTRI,Transmitter Tristated" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RXBLOCK,Block Incoming Data" "0,1"
|
|
bitfld.long 0x0 1. "TXENS,Transmitter Enable Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXENS,Receiver Enable Status" "0,1"
|
|
group.long 0x44++0x7
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 24. "AUTOBAUDDONE,Auto Baud Complete Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 19. "SIGF,Signal Frame Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "STARTF,Start Frame Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 13. "TXIDLE,TX Idle Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "CCF,Collision Check Fail Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 10. "MPAF,Multi-Processor Address Frame Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "FERR,Framing Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 8. "PERR,Parity Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TXOF,TX FIFO Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 5. "RXUF,RX FIFO Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "RXOF,RX FIFO Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 3. "RXFULL,RX FIFO Full Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXFL,RX FIFO Level Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 1. "TXFL,TX FIFO Level Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXC,TX Complete Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 24. "AUTOBAUDDONE,Auto Baud Complete IEN" "0,1"
|
|
bitfld.long 0x4 19. "SIGF,Signal Frame IEN" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "STARTF,Start Frame IEN" "0,1"
|
|
bitfld.long 0x4 13. "TXIDLE,TX IDLE IEN" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "CCF,Collision Check Fail IEN" "0,1"
|
|
bitfld.long 0x4 10. "MPAF,Multi-Processor Addr Frame IEN" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "FERR,Framing Error IEN" "0,1"
|
|
bitfld.long 0x4 8. "PERR,Parity Error IEN" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "TXOF,TX FIFO Overflow IEN" "0,1"
|
|
bitfld.long 0x4 5. "RXUF,RX FIFO Underflow IEN" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "RXOF,RX FIFO Overflow IEN" "0,1"
|
|
bitfld.long 0x4 3. "RXFULL,RX FIFO Full IEN" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "RXFL,RX FIFO Level IEN" "0,1"
|
|
bitfld.long 0x4 1. "TXFL,TX FIFO Level IEN" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "TXC,TX Complete IEN" "0,1"
|
|
rgroup.long 0x4C++0x3
|
|
line.long 0x0 "SYNCBUSY,No Description"
|
|
bitfld.long 0x0 10. "TXTRIDIS,SYNCBUSY in TXTRIDIS in CMD" "0,1"
|
|
bitfld.long 0x0 9. "TXTRIEN,SYNCBUSY for TXTRIEN in CMD" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "RXBLOCKDIS,SYNCBUSY for RXBLOCKDIS in CMD" "0,1"
|
|
bitfld.long 0x0 7. "RXBLOCKEN,SYNCBUSY for RXBLOCKEN in CMD" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TXDIS,SYNCBUSY for TXDIS in CMD" "0,1"
|
|
bitfld.long 0x0 5. "TXEN,SYNCBUSY for TXEN in CMD" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "RXDIS,SYNCBUSY for RXDIS in CMD" "0,1"
|
|
bitfld.long 0x0 3. "RXEN,SYNCBUSY for RXEN in CMD" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "TXTEN,SYNCBUSY for TXTEN in TRIGCTRL" "0,1"
|
|
bitfld.long 0x0 1. "RXTEN,SYNCBUSY for RXTEN in TRIGCTRL" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DIV,SYNCBUSY for DIV in CLKDIV" "0,1"
|
|
tree.end
|
|
tree "EUART0_S"
|
|
base ad:0x4A030000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP version ID"
|
|
group.long 0x4++0x2B
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,Module enable" "0,1"
|
|
line.long 0x4 "CFG0,No Description"
|
|
bitfld.long 0x4 31. "AUTOBAUDEN,AUTOBAUD detection enable" "0,1"
|
|
bitfld.long 0x4 30. "MVDIS,Majority Vote Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "ERRSTX,Disable TX On Error" "0: Received framing and parity errors have no..,1: Received framing and parity errors disable the.."
|
|
bitfld.long 0x4 23. "ERRSRX,Disable RX On Error" "0: Framing and parity errors have no effect on..,1: Framing and parity errors disable the receiver"
|
|
newline
|
|
bitfld.long 0x4 22. "ERRSDMA,Halt DMA Read On Error" "0: Framing and parity errors have no effect on DMA..,1: DMA requests from the UART are blocked while the.."
|
|
bitfld.long 0x4 20. "SKIPPERRF,Skip Parity Error Frames" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "AUTOTRI,Automatic TX Tristate" "0: The output on UARTn_TX when the transmitter is..,1: UARTn_TX is tristated whenever the transmitter.."
|
|
bitfld.long 0x4 14. "TXINV,Transmitter output Invert" "0: Output from the transmitter is passed unchanged..,1: Output from the transmitter is inverted before.."
|
|
newline
|
|
bitfld.long 0x4 13. "RXINV,Receiver Input Invert" "0: Input is passed directly to the receiver,1: Input is inverted before it is passed to the.."
|
|
bitfld.long 0x4 10. "MSBF,Most Significant Bit First" "0: Data is sent with the least significant bit first,1: Data is sent with the most significant bit first"
|
|
newline
|
|
bitfld.long 0x4 5.--7. "OVS,Oversampling" "0: 16X oversampling,1: 8X oversampling,2: 6X oversampling,3: 4X oversampling,4: Disable oversampling (for LF operation),?,?,?"
|
|
bitfld.long 0x4 4. "MPAB,Multi-Processor Address-Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "MPM,Multi-Processor Mode" "0: The 9th bit of incoming frames has no special..,1: An incoming frame with the 9th bit equal to MPAB.."
|
|
bitfld.long 0x4 2. "CCEN,Collision Check Enable" "0: Collision check is disabled,1: Collision check is enabled. The receiver must be.."
|
|
newline
|
|
bitfld.long 0x4 1. "LOOPBK,Loopback Enable" "0: The receiver is connected to and receives data..,1: The receiver is connected to and receives data.."
|
|
line.long 0x8 "CFG1,No Description"
|
|
bitfld.long 0x8 22.--23. "RTSRXFW,Request-to-send RX FIFO Watermark" "0: RTS is set if there is space for at least one..,1: RTS is set if there is space for at least two..,2: RTS is set if there is space for at least three..,3: RTS is set if there is space for four more.."
|
|
bitfld.long 0x8 19.--20. "RXFIW,RX FIFO Interrupt Watermark" "0: RXFL status flag and IF are set when the RX FIFO..,1: RXFL status flag and IF are set when the RX FIFO..,2: RXFL status flag and IF are set when the RX FIFO..,3: RXFL status flag and IF are set when the RX FIFO.."
|
|
newline
|
|
bitfld.long 0x8 16.--17. "TXFIW,TX FIFO Interrupt Watermark" "0: TXFL status flag and IF are set when the TX FIFO..,1: TXFL status flag and IF are set when the TX FIFO..,2: TXFL status flag and IF are set when the TX FIFO..,3: TXFL status flag and IF are set when the TX FIFO.."
|
|
bitfld.long 0x8 15. "RXPRSEN,PRS RX Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 11. "SFUBRX,Start Frame Unblock Receiver" "0,1"
|
|
bitfld.long 0x8 10. "RXDMAWU,Receiver DMA Wakeup" "0,1"
|
|
newline
|
|
bitfld.long 0x8 9. "TXDMAWU,Transmitter DMA Wakeup" "0,1"
|
|
bitfld.long 0x8 3. "RTSINV,Request-to-send Invert Enable" "0: The RTS pin is active low,1: The RTS pin is active high"
|
|
newline
|
|
bitfld.long 0x8 2. "CTSEN,Clear-to-send Enable" "0: Ignore CTS,1: Stop transmitting when CTS is inactive"
|
|
bitfld.long 0x8 1. "CTSINV,Clear-to-send Invert Enable" "0: The CTS pin is active low,1: The CTS pin is active high"
|
|
newline
|
|
bitfld.long 0x8 0. "DBGHALT,Debug halt" "0: Continue normal UART operation even if core is..,1: If core is halted receive one frame and then.."
|
|
line.long 0xC "FRAMECFG,No Description"
|
|
bitfld.long 0xC 12.--13. "STOPBITS,Stop-Bit Mode" "0: The transmitter generates a half stop bit.,1: One stop bit is generated and verified,2: The transmitter generates one and a half stop..,3: The transmitter generates two stop bits. The.."
|
|
bitfld.long 0xC 8.--9. "PARITY,Parity-Bit Mode" "0: Parity bits are not used,?,2: Even parity are used. Parity bits are..,3: Odd parity is used. Parity bits are.."
|
|
newline
|
|
bitfld.long 0xC 0.--1. "DATABITS,Data-Bit Mode" "?,1: Each frame contains 7 data bits,2: Each frame contains 8 data bits,3: Each frame contains 9 data bits"
|
|
line.long 0x10 "IRHFCFG,No Description"
|
|
bitfld.long 0x10 3. "IRHFFILT,IrDA RX Filter" "0: No filter enabled,1: Filter enabled. IrDA pulse must be high for at.."
|
|
bitfld.long 0x10 1.--2. "IRHFPW,IrDA TX Pulse Width" "0: IrDA pulse width is 1/16 for OVS=0 and 1/8 for..,1: IrDA pulse width is 2/16 for OVS=0 and 2/8 for..,2: IrDA pulse width is 3/16 for OVS=0 and 3/8 for..,3: IrDA pulse width is 4/16 for OVS=0 and 4/8 for.."
|
|
newline
|
|
bitfld.long 0x10 0. "IRHFEN,Enable IrDA Module" "0,1"
|
|
line.long 0x14 "IRLFCFG,No Description"
|
|
bitfld.long 0x14 0. "IRLFEN,Pulse Generator/Extender Enable" "0,1"
|
|
line.long 0x18 "TIMINGCFG,No Description"
|
|
bitfld.long 0x18 0.--1. "TXDELAY,TX Delay Transmission" "0: Frames are transmitted immediately.,1: Transmission of new frames is delayed by a..,2: Transmission of new frames is delayed by a two..,3: Transmission of new frames is delayed by a three.."
|
|
line.long 0x1C "STARTFRAMECFG,No Description"
|
|
hexmask.long.word 0x1C 0.--8. 1. "STARTFRAME,Start Frame"
|
|
line.long 0x20 "SIGFRAMECFG,No Description"
|
|
hexmask.long.word 0x20 0.--8. 1. "SIGFRAME,Signal Frame Value"
|
|
line.long 0x24 "CLKDIV,No Description"
|
|
hexmask.long.tbyte 0x24 3.--22. 1. "DIV,Fractional Clock Divider"
|
|
line.long 0x28 "TRIGCTRL,No Description"
|
|
bitfld.long 0x28 1. "TXTEN,Transmit Trigger Enable" "0,1"
|
|
bitfld.long 0x28 0. "RXTEN,Receive Trigger Enable" "0,1"
|
|
wgroup.long 0x30++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 8. "CLEARTX,Clear TX FIFO" "0,1"
|
|
bitfld.long 0x0 7. "TXTRIDIS,Transmitter Tristate Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TXTRIEN,Transmitter Tristate Enable" "0,1"
|
|
bitfld.long 0x0 5. "RXBLOCKDIS,Receiver Block Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "RXBLOCKEN,Receiver Block Enable" "0,1"
|
|
bitfld.long 0x0 3. "TXDIS,Transmitter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "TXEN,Transmitter Enable" "0,1"
|
|
bitfld.long 0x0 1. "RXDIS,Receiver Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXEN,Receiver Enable" "0,1"
|
|
rgroup.long 0x34++0x7
|
|
line.long 0x0 "RXDATA,No Description"
|
|
bitfld.long 0x0 10. "FERR,Framing Error" "0,1"
|
|
bitfld.long 0x0 9. "PERR,Parity Error" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--8. 1. "RXDATA,RX Data"
|
|
line.long 0x4 "RXDATAP,No Description"
|
|
bitfld.long 0x4 10. "FERRP,Framing Error Peek" "0,1"
|
|
bitfld.long 0x4 9. "PERRP,Parity Error Peek" "0,1"
|
|
newline
|
|
hexmask.long.word 0x4 0.--8. 1. "RXDATAP,RX Data Peek"
|
|
wgroup.long 0x3C++0x3
|
|
line.long 0x0 "TXDATA,No Description"
|
|
bitfld.long 0x0 13. "RXENAT,Enable RXEN After Transmission" "0,1"
|
|
bitfld.long 0x0 12. "TXDISAT,Clear TXEN After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "TXBREAK,Transit Data as Break" "0,1"
|
|
bitfld.long 0x0 10. "TXTRIAT,Set TXTRI After Transmisssion" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "UBRXAT,Unblock RX After Transmission" "0,1"
|
|
hexmask.long.word 0x0 0.--8. 1. "TXDATA,TX Data"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 24. "AUTOBAUDDONE,Auto Baud Rate Detection Completed" "0,1"
|
|
bitfld.long 0x0 19. "CLEARTXBUSY,TX FIFO Clear Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16.--18. "TXFCNT,Valid entries in TX FIFO" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 13. "TXIDLE,TX Idle" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "RXIDLE,RX Idle" "0,1"
|
|
bitfld.long 0x0 8. "RXFULL,RX FIFO Full" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "RXFL,RX FIFO Level" "0,1"
|
|
bitfld.long 0x0 6. "TXFL,TX FIFO Level" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "TXC,TX Complete" "0,1"
|
|
bitfld.long 0x0 4. "TXTRI,Transmitter Tristated" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RXBLOCK,Block Incoming Data" "0,1"
|
|
bitfld.long 0x0 1. "TXENS,Transmitter Enable Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXENS,Receiver Enable Status" "0,1"
|
|
group.long 0x44++0x7
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 24. "AUTOBAUDDONE,Auto Baud Complete Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 19. "SIGF,Signal Frame Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "STARTF,Start Frame Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 13. "TXIDLE,TX Idle Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "CCF,Collision Check Fail Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 10. "MPAF,Multi-Processor Address Frame Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "FERR,Framing Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 8. "PERR,Parity Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TXOF,TX FIFO Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 5. "RXUF,RX FIFO Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "RXOF,RX FIFO Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 3. "RXFULL,RX FIFO Full Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXFL,RX FIFO Level Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 1. "TXFL,TX FIFO Level Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXC,TX Complete Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 24. "AUTOBAUDDONE,Auto Baud Complete IEN" "0,1"
|
|
bitfld.long 0x4 19. "SIGF,Signal Frame IEN" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "STARTF,Start Frame IEN" "0,1"
|
|
bitfld.long 0x4 13. "TXIDLE,TX IDLE IEN" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "CCF,Collision Check Fail IEN" "0,1"
|
|
bitfld.long 0x4 10. "MPAF,Multi-Processor Addr Frame IEN" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "FERR,Framing Error IEN" "0,1"
|
|
bitfld.long 0x4 8. "PERR,Parity Error IEN" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "TXOF,TX FIFO Overflow IEN" "0,1"
|
|
bitfld.long 0x4 5. "RXUF,RX FIFO Underflow IEN" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "RXOF,RX FIFO Overflow IEN" "0,1"
|
|
bitfld.long 0x4 3. "RXFULL,RX FIFO Full IEN" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "RXFL,RX FIFO Level IEN" "0,1"
|
|
bitfld.long 0x4 1. "TXFL,TX FIFO Level IEN" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "TXC,TX Complete IEN" "0,1"
|
|
rgroup.long 0x4C++0x3
|
|
line.long 0x0 "SYNCBUSY,No Description"
|
|
bitfld.long 0x0 10. "TXTRIDIS,SYNCBUSY in TXTRIDIS in CMD" "0,1"
|
|
bitfld.long 0x0 9. "TXTRIEN,SYNCBUSY for TXTRIEN in CMD" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "RXBLOCKDIS,SYNCBUSY for RXBLOCKDIS in CMD" "0,1"
|
|
bitfld.long 0x0 7. "RXBLOCKEN,SYNCBUSY for RXBLOCKEN in CMD" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TXDIS,SYNCBUSY for TXDIS in CMD" "0,1"
|
|
bitfld.long 0x0 5. "TXEN,SYNCBUSY for TXEN in CMD" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "RXDIS,SYNCBUSY for RXDIS in CMD" "0,1"
|
|
bitfld.long 0x0 3. "RXEN,SYNCBUSY for RXEN in CMD" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "TXTEN,SYNCBUSY for TXTEN in TRIGCTRL" "0,1"
|
|
bitfld.long 0x0 1. "RXTEN,SYNCBUSY for RXTEN in TRIGCTRL" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DIV,SYNCBUSY for DIV in CLKDIV" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "FRC (Frame Controller)"
|
|
base ad:0x0
|
|
tree "FRC_NS"
|
|
base ad:0xB8004000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "IPVERSION,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "IPVERSION,IP Version"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "EN,No Description"
|
|
bitfld.long 0x00 0. "EN,Enable peripheral clock to this module" "0,1"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "STATUS,No Description"
|
|
bitfld.long 0x00 20.--24. "FSMSTATE,FSM state status for srw_frc_interface" "0: IDLE,1: RX_INIT,2: RX_DATA,3: RX_CRC,4: RX_FCD_UPDATE,5: RX_DISCARD,6: RX_TRAIL,7: RX_DONE,8: RX_PAUSE_INIT,9: RX_PAUSED,10: UNDEFINED1,11: UNDEFINED2,12: RX_CRC_ZEROCHECK,13: RX_SUP,14: RX_WAITEOF,15: UNDEFINED3,16: TX_INIT,17: TX_DATA,18: TX_CRC,19: TX_FCD_UPDATE,20: TX_TRAIL,21: TX_FLUSH,22: TX_DONE,23: TX_DONE_WAIT,24: TX_RAW,25: TX_PAUSEFLUSH,?..."
|
|
newline
|
|
bitfld.long 0x00 19. "DEMODERROR,Demod Error in RX" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "FRAMELENGTHERROR,Frame Length Error for RX and TX" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "FRAMEDETPAUSED,Frame detected pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "INTERLEAVEWRITEPAUSED,Interleaver write pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "INTERLEAVEREADPAUSED,Interleaver read pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "TXSUBFRAMEPAUSED,Transmit subframe pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "CONVPAUSED,Convolutional coder pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "RXWORD,Receive Word Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "TXWORD,Transmit Word Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "RXABORTINPROGRESS,Receive aborted in progress status flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "FRAMEOK,Frame valid" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "RXRAWBLOCKED,Receiver raw trigger block is active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "SNIFFDFRAME,Sniffer data frame active status" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "ACTIVERXFCD,Active Receive Frame Descriptor" "0: FCD2 is active,1: FCD3 is active"
|
|
newline
|
|
bitfld.long 0x00 5. "ACTIVETXFCD,Active Transmit Frame Descriptor" "0: FCD0 is active,1: FCD1 is active"
|
|
newline
|
|
bitfld.long 0x00 0.--4. "SNIFFDCOUNT,Sniffer data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DFLCTRL,No Description"
|
|
bitfld.long 0x00 21.--24. "DFLBOIOFFSET,Length Field Offset Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 20. "DFLINCLUDECRC,Length field includes CRC values or not" "0: The CRC values are not included in the frame..,1: The CRC values are included in the frame length"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "MINLENGTH,Minimum decoded length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 12.--15. "DFLBITS,Length field number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "DFLOFFSET,Length Field Offset Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 4.--6. "DFLSHIFT,Dynamic Frame Length bitshift" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3. "DFLBITORDER,Dynamic Frame Length Bit order" "0: Bit ordering is defined by the BITORDER field,1: Bit ordering is reversed compared to what is.."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "DFLMODE,Dynamic Frame Length Mode" "0: Dynamic Frame Length support is disabled and..,1: Dynamic Frame Length is enabled and located..,2: Dynamic Frame Length is enabled and located..,3: Dynamic Frame Length is enabled and located..,4: Dynamic Frame Length is enabled and located..,5: Dynamic Frame Length support is disabled and..,6: In transmit mode the frame length must be..,?..."
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "MAXLENGTH,No Description"
|
|
bitfld.long 0x00 12.--15. "INILENGTH,Initial Frame Length Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.word 0x00 0.--11. 1. "MAXLENGTH,Max Frame Length Value"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "ADDRFILTCTRL,No Description"
|
|
hexmask.long.byte 0x00 8.--15. 1. "ADDRESS,Address"
|
|
newline
|
|
bitfld.long 0x00 2. "BRDCSTFFEN,Broadcast Address 0xFF Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "BRDCST00EN,Broadcast Address 0x00 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "EN,Address Filter Enable" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "DATABUFFER,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DATABUFFER,Frame Controller data buffer"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "WCNT,No Description"
|
|
hexmask.long.word 0x00 0.--11. 1. "WCNT,Word Counter Value"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "WCNTCMP0,No Description"
|
|
hexmask.long.word 0x00 0.--11. 1. "FRAMELENGTH,Word Counter Frame Length Value"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "WCNTCMP1,No Description"
|
|
hexmask.long.word 0x00 0.--11. 1. "LENGTHFIELDLOC,Length field location"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "WCNTCMP2,No Description"
|
|
hexmask.long.word 0x00 0.--11. 1. "ADDRFIELDLOC,Address field location"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "CMD,No Description"
|
|
bitfld.long 0x00 12. "RXRAWUNBLOCK,Clear RXRAWBLOCKED status flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "STATEINIT,FRC State initialize" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "BLOCKINIT,Block coder initialize" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "CONVINIT,Convolutional coder initialize" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "INTERLEAVECNTCLEAR,Interleaver counter clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "INTERLEAVEINIT,Interleaver initialization" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "TXSUBFRAMERESUME,TX subframe resume" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "CONVTERMINATE,Convolutional coder termination" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "CONVRESUME,Convolutional coder resume" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "INTERLEAVEREADRESUME,Interleaver read resume" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "INTERLEAVEWRITERESUME,Interleaver write resume" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "FRAMEDETRESUME,FRAMEDET resume" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "RXABORT,RX Abort" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "WHITECTRL,No Description"
|
|
bitfld.long 0x00 12. "BLOCKERRORCORRECT,Block Errors Correction enable" "0: Block decoding errors are not corrected only..,1: Block decoding errors are attempted corrected.."
|
|
newline
|
|
bitfld.long 0x00 8.--11. "SHROUTPUTSEL,Shift Register Output Selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 5.--6. "XORFEEDBACK,LFSR Feedback XOR setting" "0: The signal defined by FEEDBACKSEL is used..,1: The signal defined by FEEDBACKSEL is XOR'ed..,2: Feedback is set to 0,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--4. "FEEDBACKSEL,LFSR Feedback selector" "0: Select bit 0 as feedback,1: Select bit 1 as feedback,2: Select bit 2 as feedback,3: Select bit 3 as feedback,4: Select bit 4 as feedback,5: Select bit 5 as feedback,6: Select bit 6 as feedback,7: Select bit 7 as feedback,8: Select bit 8 as feedback,9: Select bit 9 as feedback,10: Select bit 10 as feedback,11: Select bit 11 as feedback,12: Select bit 12 as feedback,13: Select bit 13 as feedback,14: Select bit 14 as feedback,15: Select bit 15 as feedback,16: Select data input as feedback,17: Select zero as feedback,18: Select one as feedback,19: In transmit mode the feedback is one during..,?..."
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "WHITEPOLY,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "POLY,Whitener Polynomial"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "WHITEINIT,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "WHITEINIT,Whitener Initial Value"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "FECCTRL,No Description"
|
|
bitfld.long 0x00 21. "CONVHARDERROR,Enable convolutional decoding hard error" "0: Convolutional hard error decoding is disabled,1: Convolutional hard error decoding is enabled"
|
|
newline
|
|
bitfld.long 0x00 20. "FORCE2FSK,Force use of 2-FSK" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "SINGLEBLOCK,Single block code per frame" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "CONVSUBFRAMETERMINATE,Enable trellis termination for subframes" "0: Trellis termination is applied at the end of..,1: Trellis termination is applied at the end of.."
|
|
newline
|
|
bitfld.long 0x00 17. "CONVBUSLOCK,Convolutional decoding bus lock" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "INTERLEAVEWIDTH,Interleave symbol width" "0: Each interleaver element consists of one RF..,1: Each interleaver element consists of two RF.."
|
|
newline
|
|
bitfld.long 0x00 12.--15. "INTERLEAVEFIRSTINDEX,4-bit index of the first interleaver" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "INTERLEAVEMODE,Interleaver mode" "0: Interleaving is disabled,1: Interleaving is enabled,2: No symbol interleaving is performed but the..,3: No symbol interleaving is performed but the.."
|
|
newline
|
|
bitfld.long 0x00 8.--9. "CONVINV,Convolutional code symbol inversion" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 7. "CONVTRACEBACKDISABLE,Convolutional traceback disabling" "0: Traceback history is enabled and..,1: Traceback history is disabled and.."
|
|
newline
|
|
bitfld.long 0x00 6. "CONVDECODEMODE,Convolutional decoding mode setting" "0: Use soft decision convolutional decoding..,1: Use hard decision convolutional decoding"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "CONVMODE,Convolutional Encoder / Decoder mode" "0: Convolutional encoding / decoding is disabled,1: Normal convolutional encoding / decoding is..,2: Repeat-mode convolutional encoding / decoding..,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "BLOCKWHITEMODE,Block Coder Whitener Mode" "0: The input data is passed directly to the..,1: Data is whitened in TX and de-whitened in RX..,2: Data is whitened in TX and de-whitened in RX..,3: Data is whitened in TX after symbol..,4: Data is whitened in TX after symbol..,5: Parity bits are added in TX and checked and..,6: Parity bits are added in TX and checked and..,7: A lookup table is used to implement table.."
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "BLOCKRAMADDR,No Description"
|
|
hexmask.long 0x00 2.--31. 1. "BLOCKRAMADDR,Block decoding RAM address"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CONVRAMADDR,No Description"
|
|
hexmask.long 0x00 2.--31. 1. "CONVRAMADDR,Convolutional decoding RAM address"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "CTRL,No Description"
|
|
bitfld.long 0x00 20. "RXABORTIGNOREDIS,Disable ignoring CMD_RXABORT" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "WAITEOFEN,Enable STATE_TX_WAITEOF" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "LPMODEDIS,Disable FRC low power" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "PRBSTEST,Pseudo-Random Bit Sequence Testmode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "SEQHANDSHAKE,Sequencer data handshake" "0: The sequencer may read transmit or read data..,1: The frame controller will require that the.."
|
|
newline
|
|
bitfld.long 0x00 13. "TXPREFETCH,Transmit prefetch data" "0: The frame controller will start preparing..,1: The frame controller will start preparing.."
|
|
newline
|
|
bitfld.long 0x00 11.--12. "RATESELECT,MODEM rate select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "BITSPERWORD,Bits Per Word for first word in a frame" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "RXFCDMODE,RX Frame Control Descriptor Mode" "0: FCD2 is reloaded when SCNT reaches 0,1: Use FCD2 for the first sub-frame then..,2: Use FCD2 for the first sub-frame then FCD3 is..,3: Use alternating FCD2 / FCD3 for each complete.."
|
|
newline
|
|
bitfld.long 0x00 4.--5. "TXFCDMODE,TX Frame Control Descriptor Mode" "0: FCD0 is reloaded when SCNT reaches 0,1: Use FCD0 for the first sub-frame then..,2: Use FCD0 for the first sub-frame then FCD1 is..,3: Use alternating FCD0 / FCD1 for each complete.."
|
|
newline
|
|
bitfld.long 0x00 2. "BITORDER,Data Bit Order" "0: Least Significant bit in each word is..,1: Most Significant bit in each word is.."
|
|
newline
|
|
bitfld.long 0x00 1. "UARTMODE,Data Uart Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "RANDOMTX,Random TX Mode" "0,1"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "RXCTRL,No Description"
|
|
bitfld.long 0x00 7.--10. "RXFRAMEENDAHEADBYTES,RX frame almost end of packet timing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6. "BUFRESTORERXABORTED,Buffer restore on RXABORTED" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "BUFRESTOREFRAMEERROR,Buffer restore on frame error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "BUFCLEAR,Buffer Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TRACKABFRAME,Track Aborted RX Frame" "0: When a frame abort is triggered the frame..,1: When a frame abort is triggered the receiver.."
|
|
newline
|
|
bitfld.long 0x00 2. "ACCEPTBLOCKERRORS,Accept Block Decoding Errors" "0: Frame reception will be stopped when a block..,1: Frame reception will continue even in the.."
|
|
newline
|
|
bitfld.long 0x00 1. "ACCEPTCRCERRORS,Accept CRC Errors" "0: Frames with one or more detected CRC errors..,1: Frames will always be written to the receive.."
|
|
newline
|
|
bitfld.long 0x00 0. "STORECRC,Store CRC value" "0,1"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "TRAILTXDATACTRL,No Description"
|
|
bitfld.long 0x00 22. "TXSUPPLENOVERIDE,TX Sup Len Override" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 12.--21. 1. "TRAILTXREPLEN,Trailing Data Repeat Length"
|
|
newline
|
|
bitfld.long 0x00 11. "TRAILTXDATAFORCE,Force trailing TX data insertion" "0: Trailing data in transmit is only applied in..,1: The number of bits defined by TRAILTXDATACNT.."
|
|
newline
|
|
bitfld.long 0x00 8.--10. "TRAILTXDATACNT,Trailing data bit count" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "TRAILTXDATA,Trailing Data value"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "TRAILRXDATA,No Description"
|
|
bitfld.long 0x00 5. "RTCSTAMP,RTCC Time Stamp" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "PROTIMERCC0WRAPH,PROTIMER Capture Compare channel 0 WrapH" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "PROTIMERCC0WRAPL,PROTIMER Capture Compare channel 0 WrapL" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PROTIMERCC0BASE,PROTIMER Capture Compare channel 0 Base" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CRCOK,Append CRC OK Indicator" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "RSSI,Append RSSI" "0,1"
|
|
rgroup.long 0x58++0x03
|
|
line.long 0x00 "SCNT,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SCNT,Sub-Frame Counter Value"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "CONVGENERATOR,No Description"
|
|
bitfld.long 0x00 17. "NONSYSTEMATIC,Non systematic recursive code" "0: The recursive code is systematic,1: The recursive code is not systematic"
|
|
newline
|
|
bitfld.long 0x00 16. "RECURSIVE,Convolutional encoding" "0: Non-recursive convolutional coding is used,1: Recursive convolutional coding is used"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. "GENERATOR1,Output 1 Generator Polynomial"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--6. 1. "GENERATOR0,Output 0 Generator Polynomial"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PUNCTCTRL,No Description"
|
|
hexmask.long.byte 0x00 8.--14. 1. "PUNCT1,Puncturing Matrix Row for Output 1"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--6. 1. "PUNCT0,Puncturing Matrix Row for Output 0"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PAUSECTRL,No Description"
|
|
bitfld.long 0x00 16.--20. "INTERLEAVEREADPAUSECNT,Interleaver read pause count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 11.--15. "INTERLEAVEWRITEPAUSECNT,Interleaver write pause count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 5.--10. "CONVPAUSECNT,Convolutional decoder pause setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 4. "TXSUBFRAMEPAUSEEN,Transmit subframe pause enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "INTERLEAVEREADPAUSEEN,Interleaver read pause enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "RXINTERLEAVEWRITEPAUSEEN,Receive interleaver write pause enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "TXINTERLEAVEWRITEPAUSEEN,Transmit interleaver write pause enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "FRAMEDETPAUSEEN,Frame detect pause enable" "0,1"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "IF,No Description"
|
|
bitfld.long 0x00 30. "TXWORD,Transmit Word Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "RXWORD,Receive Word Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "CONVPAUSED,Convolutional coder pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "TXSUBFRAMEPAUSED,Transmit subframe pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26. "INTERLEAVEREADPAUSED,Interleaver read pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "INTERLEAVEWRITEPAUSED,Interleaver write pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "FRAMEDETPAUSED,Frame detected pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "RXRAWOF,RX raw FIFO overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "PKTBUFTHRESHOLD,Packet Buffer Threshold" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "PKTBUFSTART,Packet Buffer Start" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "BOISET,BOI SET" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "WCNTCMP4,Word Counter Compare 4 Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "WCNTCMP3,Word Counter Compare 3 Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "SNIFFOF,Data sniffer overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "TXRAWEVENT,Transmit raw data event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "RXRAWEVENT,Receiver raw data event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "BUSERROR,A bus error event occurred" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "ADDRERROR,Receive address error event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "WCNTCMP2,Word Counter Compare 2 Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "WCNTCMP1,Word Counter Compare 1 Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "WCNTCMP0,Word Counter Compare 0 Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "RXOF,Receive Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "BLOCKERROR,Block Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "FRAMEERROR,Frame Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "RXABORTED,RX Aborted Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "RXDONE,RX Done Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TXUF,Transmit Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TXABORTED,Transmit Aborted Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "TXAFTERFRAMEDONE,TX after frame Done Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXDONE,TX Done Interrupt Flag" "0,1"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "IEN,No Description"
|
|
bitfld.long 0x00 30. "TXWORD,Transmit Word Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "RXWORD,Receive Word Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "CONVPAUSED,Convolutional coder pause event enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "TXSUBFRAMEPAUSED,Transmit subframe pause event enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26. "INTERLEAVEREADPAUSED,Interleaver read pause event enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "INTERLEAVEWRITEPAUSED,Interleaver write pause event enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "FRAMEDETPAUSED,Frame detected pause event enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "RXRAWOF,RXRAWOF Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "PKTBUFTHRESHOLD,PKTBUFTHRESHOLD Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "PKTBUFSTART,PKTBUFSTART Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "BOISET,BOISET" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "WCNTCMP4,Word Counter Compare 4 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "WCNTCMP3,Word Counter Compare 3 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "SNIFFOF,Data sniffer overflow enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "TXRAWEVENT,Transmit raw data enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "RXRAWEVENT,Receiver raw data enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "BUSERROR,Bus error enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "ADDRERROR,Receive address error enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "WCNTCMP2,Word Counter Compare 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "WCNTCMP1,Word Counter Compare 1 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "WCNTCMP0,Word Counter Compare 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "RXOF,Receive Overflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "BLOCKERROR,Block Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "FRAMEERROR,Frame Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "RXABORTED,RX Aborted Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "RXDONE,RX Done Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TXUF,Transmit Underflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TXABORTED,Transmit Aborted Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "TXAFTERFRAMEDONE,TX after frame Done Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXDONE,TX Done Interrupt Enable" "0,1"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "OTACNT,No Description"
|
|
hexmask.long.word 0x00 16.--31. 1. "OTATXCNT,OTA TX bit counter"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "OTARXCNT,OTA RX bit counter"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "BUFFERMODE,No Description"
|
|
bitfld.long 0x00 3. "RXFRCBUFMUX,RX FRC Buffer Mux" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1.--2. "RXBUFFERMODE,Receive Buffer Mode" "0: The Frame Controller write data to the Buffer..,1: The Frame Controller does not write data to..,2: The Frame Controller will not output..,?..."
|
|
newline
|
|
bitfld.long 0x00 0. "TXBUFFERMODE,Transmit Buffer Mode" "0: The Frame Controller fetches data from the..,1: The Frame Controller does not fetch data from.."
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "SNIFFCTRL,No Description"
|
|
bitfld.long 0x00 17. "SNIFFSYNCWORD,Sniffer baudrate setting" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "SNIFFBR,Sniffer baudrate setting"
|
|
newline
|
|
bitfld.long 0x00 7. "SNIFFAUXDATA,Enable sniffing of auxiliary data" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "SNIFFSTATE,Enable sniffing of state information" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "SNIFFRSSI,Enable sniffing of RSSI" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "SNIFFTXDATA,Enable sniffing of transmitted data" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "SNIFFRXDATA,Enable sniffing of received data" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "SNIFFBITS,Data sniff data bits" "0: Each sniffer output word contains 8 data bits,1: Each sniffer output word contains 9 data bits"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "SNIFFMODE,Data Sniff Mode" "0: FRC Packet Sniffer mode is disabled,1: UART encoded data is transmitted on the DOUT..,2: SPI data is transmitted on the DOUT pin and a..,?..."
|
|
wgroup.long 0x88++0x03
|
|
line.long 0x00 "AUXDATA,No Description"
|
|
hexmask.long.word 0x00 0.--8. 1. "AUXDATA,Auxiliary sniffer data output"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "RAWCTRL,No Description"
|
|
bitfld.long 0x00 13. "DEMODRAWDATAMUX,Raw data mux control" "0: RAW data is selected using modem register..,1: RAW data is selected using modem register.."
|
|
newline
|
|
bitfld.long 0x00 7.--8. "RXRAWTRIGGER,Receiver raw data trigger setting" "0: RAW data storage is triggered immediately..,1: RAW data storage is triggered by the selected..,2: RAW data storage is triggered by an internal..,?..."
|
|
newline
|
|
bitfld.long 0x00 5. "RXRAWRANDOM,Receive raw data random number generator" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2.--4. "RXRAWMODE,Receiver raw data mode" "0: RAW receive mode is disabled,1: RAW receive mode is enabled fetching a single..,2: RAW receive mode is enabled fetching multiple..,3: This mode is identical to the SINGLEBUFFER..,4: RAW receive mode is enabled fetching multiple..,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--1. "TXRAWMODE,Transmitter raw data mode" "0: RAW transmit mode is disabled,1: RAW transmit mode is enabled transmitting the..,2: RAW transmit mode is enabled transmitting the..,?..."
|
|
rgroup.long 0x90++0x03
|
|
line.long 0x00 "RXRAWDATA,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "RXRAWDATA,Receiver RAW data register"
|
|
rgroup.long 0x94++0x03
|
|
line.long 0x00 "PAUSEDATA,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "PAUSEDATA,Receiver pause data register"
|
|
rgroup.long 0x98++0x03
|
|
line.long 0x00 "LIKELYCONVSTATE,No Description"
|
|
bitfld.long 0x00 0.--5. "LIKELYCONVSTATE,Most likely convolutional decoder state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0x9C++0x03
|
|
line.long 0x00 "INTELEMENTNEXT,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "INTELEMENTNEXT,Interleaver element value"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "INTWRITEPOINT,No Description"
|
|
bitfld.long 0x00 0.--4. "INTWRITEPOINT,Interleaver buffer write pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "INTREADPOINT,No Description"
|
|
bitfld.long 0x00 0.--4. "INTREADPOINT,Interleaver buffer read pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "AUTOCG,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "AUTOCGEN,Automatic clock gate enable"
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "CGCLKSTOP,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "FORCEOFF,Force off"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "SEQIF,No Description"
|
|
bitfld.long 0x00 30. "TXWORD,Transmit Word Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "RXWORD,Receive Word Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "CONVPAUSED,Convolutional coder pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "TXSUBFRAMEPAUSED,Transmit subframe pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26. "INTERLEAVEREADPAUSED,Interleaver read pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "INTERLEAVEWRITEPAUSED,Interleaver write pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "FRAMEDETPAUSED,Frame detected pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "RXRAWOF,RX raw FIFO overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "PKTBUFTHRESHOLD,Packet Buffer Threshold" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "PKTBUFSTART,Packet Buffer Start" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "BOISET,BOISET Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "WCNTCMP4,Word Counter Compare 4 Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "WCNTCMP3,Word Counter Compare 3 Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "SNIFFOF,Data sniffer overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "TXRAWEVENT,Transmit raw data event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "RXRAWEVENT,Receiver raw data event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "BUSERROR,A bus error event occurred" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "ADDRERROR,Receive address error event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "WCNTCMP2,Word Counter Compare 2 Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "WCNTCMP1,Word Counter Compare 1 Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "WCNTCMP0,Word Counter Compare 0 Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "RXOF,Receive Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "BLOCKERROR,Block Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "FRAMEERROR,Frame Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "RXABORTED,RX Aborted Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "RXDONE,RX Done Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TXUF,Transmit Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TXABORTED,Transmit Aborted Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "TXAFTERFRAMEDONE,TX after frame Done Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXDONE,TX Done Interrupt Flag" "0,1"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "SEQIEN,No Description"
|
|
bitfld.long 0x00 30. "TXWORD,Transmit Word Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "RXWORD,Receive Word Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "CONVPAUSED,Convolutional coder pause event enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "TXSUBFRAMEPAUSED,Transmit subframe pause event enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26. "INTERLEAVEREADPAUSED,Interleaver read pause event enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "INTERLEAVEWRITEPAUSED,Interleaver write pause event enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "FRAMEDETPAUSED,Frame detected pause event enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "RXRAWOF,RXRAWOF Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "PKTBUFTHRESHOLD,PKTBUFTHRESHOLD Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "PKTBUFSTART,PKTBUFSTART Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "BOISET,Word Counter Compare 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "WCNTCMP4,Word Counter Compare 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "WCNTCMP3,Word Counter Compare 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "SNIFFOF,Data sniffer overflow enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "TXRAWEVENT,Transmit raw data enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "RXRAWEVENT,Receiver raw data enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "BUSERROR,Bus error enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "ADDRERROR,Receive address error enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "WCNTCMP2,Word Counter Compare 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "WCNTCMP1,Word Counter Compare 1 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "WCNTCMP0,Word Counter Compare 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "RXOF,Receive Overflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "BLOCKERROR,Block Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "FRAMEERROR,Frame Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "RXABORTED,RX Aborted Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "RXDONE,RX Done Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TXUF,Transmit Underflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TXABORTED,Transmit Aborted Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "TXAFTERFRAMEDONE,TX after frame Done Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXDONE,TX Done Interrupt Enable" "0,1"
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "WCNTCMP3,No Description"
|
|
hexmask.long.word 0x00 0.--11. 1. "SUPPLENFIELDLOC,Sup Length field location"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "BOICTRL,No Description"
|
|
bitfld.long 0x00 16. "BOIMATCHVAL,BOI match value" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13.--15. "BOIBITPOS,BOI bit position" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.word 0x00 1.--12. 1. "BOIFIELDLOC,BOI field location"
|
|
newline
|
|
bitfld.long 0x00 0. "BOIEN,BOI EN" "0,1"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "DSLCTRL,No Description"
|
|
bitfld.long 0x00 28.--30. "SUPSHFFACTOR,Supp Shift factor" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 27. "STORESUP,Store SUPP in BUFC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24.--26. "RXSUPRECEPMODE,RX Supplement Reception Mode" "0: Do not receive SUP,1: Receive SUP based on BOI and fetch SUPLEN..,2: Receive SUP based on BOI and fetch SUPLEN..,3: Receive SUP based irrespective of BOI and..,4: Receive SUP based irrespective of BOI and..,?..."
|
|
newline
|
|
bitfld.long 0x00 20.--23. "DSLMINLENGTH,Minimum decoded length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "DSLBITS,Length field number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "DSLOFFSET,Length Field Offset Value"
|
|
newline
|
|
bitfld.long 0x00 4.--6. "DSLSHIFT,Dynamic Frame Length bitshift" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3. "DSLBITORDER,Dynamic Frame Length Bit order" "0: Bit ordering is defined by the BITORDER field,1: Bit ordering is reversed compared to what is.."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "DSLMODE,Dynamic Frame Length Mode" "0: Dynamic Frame Length support is disabled and..,1: Dynamic Frame Length is enabled and located..,2: Dynamic Frame Length is enabled and located..,3: Dynamic Frame Length is enabled and located..,4: Dynamic Frame Length is enabled and located..,5: Dynamic Frame Length support is disabled and..,6: In transmit mode the frame length must be..,?..."
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "WCNTCMP4,No Description"
|
|
hexmask.long.word 0x00 0.--11. 1. "SUPPLENGTH,Supp Length Value"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "PKTBUFCTRL,No Description"
|
|
bitfld.long 0x00 24. "PKTBUFTHRESHOLDEN,Packet Buffer Threshold Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12.--17. "PKTBUFTHRESHOLD,Packet Buffer Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
hexmask.long.word 0x00 0.--11. 1. "PKTBUFSTARTLOC,Packet Buffer Start Address"
|
|
rgroup.long 0xD0++0x03
|
|
line.long 0x00 "PKTBUFSTATUS,No Description"
|
|
bitfld.long 0x00 0.--5. "PKTBUFCOUNT,Packet Buffer Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0xD4++0x03
|
|
line.long 0x00 "PKTBUF0,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PKTBUF3,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PKTBUF2,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "PKTBUF1,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PKTBUF0,Packet Capture Buffer"
|
|
rgroup.long 0xD8++0x03
|
|
line.long 0x00 "PKTBUF1,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PKTBUF7,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PKTBUF6,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "PKTBUF5,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PKTBUF4,Packet Capture Buffer"
|
|
rgroup.long 0xDC++0x03
|
|
line.long 0x00 "PKTBUF2,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PKTBUF11,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PKTBUF10,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "PKTBUF9,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PKTBUF8,Packet Capture Buffer"
|
|
rgroup.long 0xE0++0x03
|
|
line.long 0x00 "PKTBUF3,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PKTBUF15,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PKTBUF14,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "PKTBUF13,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PKTBUF12,Packet Capture Buffer"
|
|
rgroup.long 0xE4++0x03
|
|
line.long 0x00 "PKTBUF4,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PKTBUF19,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PKTBUF18,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "PKTBUF17,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PKTBUF16,Packet Capture Buffer"
|
|
rgroup.long 0xE8++0x03
|
|
line.long 0x00 "PKTBUF5,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PKTBUF23,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PKTBUF22,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "PKTBUF21,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PKTBUF20,Packet Capture Buffer"
|
|
rgroup.long 0xEC++0x03
|
|
line.long 0x00 "PKTBUF6,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PKTBUF27,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PKTBUF26,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "PKTBUF25,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PKTBUF24,Packet Capture Buffer"
|
|
rgroup.long 0xF0++0x03
|
|
line.long 0x00 "PKTBUF7,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PKTBUF31,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PKTBUF30,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "PKTBUF29,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PKTBUF28,Packet Capture Buffer"
|
|
rgroup.long 0xF4++0x03
|
|
line.long 0x00 "PKTBUF8,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PKTBUF35,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PKTBUF34,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "PKTBUF33,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PKTBUF32,Packet Capture Buffer"
|
|
rgroup.long 0xF8++0x03
|
|
line.long 0x00 "PKTBUF9,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PKTBUF39,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PKTBUF38,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "PKTBUF37,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PKTBUF36,Packet Capture Buffer"
|
|
rgroup.long 0xFC++0x03
|
|
line.long 0x00 "PKTBUF10,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PKTBUF43,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PKTBUF42,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "PKTBUF41,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PKTBUF40,Packet Capture Buffer"
|
|
rgroup.long 0x100++0x03
|
|
line.long 0x00 "PKTBUF11,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PKTBUF47,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PKTBUF46,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "PKTBUF45,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PKTBUF44,Packet Capture Buffer"
|
|
repeat 4. (strings "0" "1" "2" "3" )(list 0x00 0x04 0x08 0x0C )
|
|
group.long ($2+0x104)++0x03
|
|
line.long 0x00 "FCD$1,No Description"
|
|
bitfld.long 0x00 16. "EXCLUDESUBFRAMEWCNT,Exclude subframe from WCNT" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "ADDTRAILTXDATA,Add trailing TX data in this subframe" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "SKIPWHITE,Skip data whitening in this subframe" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12.--13. "SKIPCRC,Skip First Words in CRC Calculation" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 11. "CALCCRC,Calculate CRC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "INCLUDECRC,Include CRC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "BUFFER,Buffer to Access" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "WORDS,No of Words in sub-frame"
|
|
repeat.end
|
|
repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
rgroup.long ($2+0x120)++0x03
|
|
line.long 0x00 "INTELEMENT$1,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "INTELEMENT,Interleaver element data"
|
|
repeat.end
|
|
tree.end
|
|
tree "FRC_S"
|
|
base ad:0xA8004000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "IPVERSION,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "IPVERSION,IP Version"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "EN,No Description"
|
|
bitfld.long 0x00 0. "EN,Enable peripheral clock to this module" "0,1"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "STATUS,No Description"
|
|
bitfld.long 0x00 20.--24. "FSMSTATE,FSM state status for srw_frc_interface" "0: IDLE,1: RX_INIT,2: RX_DATA,3: RX_CRC,4: RX_FCD_UPDATE,5: RX_DISCARD,6: RX_TRAIL,7: RX_DONE,8: RX_PAUSE_INIT,9: RX_PAUSED,10: UNDEFINED1,11: UNDEFINED2,12: RX_CRC_ZEROCHECK,13: RX_SUP,14: RX_WAITEOF,15: UNDEFINED3,16: TX_INIT,17: TX_DATA,18: TX_CRC,19: TX_FCD_UPDATE,20: TX_TRAIL,21: TX_FLUSH,22: TX_DONE,23: TX_DONE_WAIT,24: TX_RAW,25: TX_PAUSEFLUSH,?..."
|
|
newline
|
|
bitfld.long 0x00 19. "DEMODERROR,Demod Error in RX" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "FRAMELENGTHERROR,Frame Length Error for RX and TX" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "FRAMEDETPAUSED,Frame detected pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "INTERLEAVEWRITEPAUSED,Interleaver write pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "INTERLEAVEREADPAUSED,Interleaver read pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "TXSUBFRAMEPAUSED,Transmit subframe pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "CONVPAUSED,Convolutional coder pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "RXWORD,Receive Word Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "TXWORD,Transmit Word Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "RXABORTINPROGRESS,Receive aborted in progress status flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "FRAMEOK,Frame valid" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "RXRAWBLOCKED,Receiver raw trigger block is active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "SNIFFDFRAME,Sniffer data frame active status" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "ACTIVERXFCD,Active Receive Frame Descriptor" "0: FCD2 is active,1: FCD3 is active"
|
|
newline
|
|
bitfld.long 0x00 5. "ACTIVETXFCD,Active Transmit Frame Descriptor" "0: FCD0 is active,1: FCD1 is active"
|
|
newline
|
|
bitfld.long 0x00 0.--4. "SNIFFDCOUNT,Sniffer data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DFLCTRL,No Description"
|
|
bitfld.long 0x00 21.--24. "DFLBOIOFFSET,Length Field Offset Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 20. "DFLINCLUDECRC,Length field includes CRC values or not" "0: The CRC values are not included in the frame..,1: The CRC values are included in the frame length"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "MINLENGTH,Minimum decoded length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 12.--15. "DFLBITS,Length field number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "DFLOFFSET,Length Field Offset Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 4.--6. "DFLSHIFT,Dynamic Frame Length bitshift" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3. "DFLBITORDER,Dynamic Frame Length Bit order" "0: Bit ordering is defined by the BITORDER field,1: Bit ordering is reversed compared to what is.."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "DFLMODE,Dynamic Frame Length Mode" "0: Dynamic Frame Length support is disabled and..,1: Dynamic Frame Length is enabled and located..,2: Dynamic Frame Length is enabled and located..,3: Dynamic Frame Length is enabled and located..,4: Dynamic Frame Length is enabled and located..,5: Dynamic Frame Length support is disabled and..,6: In transmit mode the frame length must be..,?..."
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "MAXLENGTH,No Description"
|
|
bitfld.long 0x00 12.--15. "INILENGTH,Initial Frame Length Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.word 0x00 0.--11. 1. "MAXLENGTH,Max Frame Length Value"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "ADDRFILTCTRL,No Description"
|
|
hexmask.long.byte 0x00 8.--15. 1. "ADDRESS,Address"
|
|
newline
|
|
bitfld.long 0x00 2. "BRDCSTFFEN,Broadcast Address 0xFF Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "BRDCST00EN,Broadcast Address 0x00 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "EN,Address Filter Enable" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "DATABUFFER,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DATABUFFER,Frame Controller data buffer"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "WCNT,No Description"
|
|
hexmask.long.word 0x00 0.--11. 1. "WCNT,Word Counter Value"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "WCNTCMP0,No Description"
|
|
hexmask.long.word 0x00 0.--11. 1. "FRAMELENGTH,Word Counter Frame Length Value"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "WCNTCMP1,No Description"
|
|
hexmask.long.word 0x00 0.--11. 1. "LENGTHFIELDLOC,Length field location"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "WCNTCMP2,No Description"
|
|
hexmask.long.word 0x00 0.--11. 1. "ADDRFIELDLOC,Address field location"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "CMD,No Description"
|
|
bitfld.long 0x00 12. "RXRAWUNBLOCK,Clear RXRAWBLOCKED status flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "STATEINIT,FRC State initialize" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "BLOCKINIT,Block coder initialize" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "CONVINIT,Convolutional coder initialize" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "INTERLEAVECNTCLEAR,Interleaver counter clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "INTERLEAVEINIT,Interleaver initialization" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "TXSUBFRAMERESUME,TX subframe resume" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "CONVTERMINATE,Convolutional coder termination" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "CONVRESUME,Convolutional coder resume" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "INTERLEAVEREADRESUME,Interleaver read resume" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "INTERLEAVEWRITERESUME,Interleaver write resume" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "FRAMEDETRESUME,FRAMEDET resume" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "RXABORT,RX Abort" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "WHITECTRL,No Description"
|
|
bitfld.long 0x00 12. "BLOCKERRORCORRECT,Block Errors Correction enable" "0: Block decoding errors are not corrected only..,1: Block decoding errors are attempted corrected.."
|
|
newline
|
|
bitfld.long 0x00 8.--11. "SHROUTPUTSEL,Shift Register Output Selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 5.--6. "XORFEEDBACK,LFSR Feedback XOR setting" "0: The signal defined by FEEDBACKSEL is used..,1: The signal defined by FEEDBACKSEL is XOR'ed..,2: Feedback is set to 0,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--4. "FEEDBACKSEL,LFSR Feedback selector" "0: Select bit 0 as feedback,1: Select bit 1 as feedback,2: Select bit 2 as feedback,3: Select bit 3 as feedback,4: Select bit 4 as feedback,5: Select bit 5 as feedback,6: Select bit 6 as feedback,7: Select bit 7 as feedback,8: Select bit 8 as feedback,9: Select bit 9 as feedback,10: Select bit 10 as feedback,11: Select bit 11 as feedback,12: Select bit 12 as feedback,13: Select bit 13 as feedback,14: Select bit 14 as feedback,15: Select bit 15 as feedback,16: Select data input as feedback,17: Select zero as feedback,18: Select one as feedback,19: In transmit mode the feedback is one during..,?..."
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "WHITEPOLY,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "POLY,Whitener Polynomial"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "WHITEINIT,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "WHITEINIT,Whitener Initial Value"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "FECCTRL,No Description"
|
|
bitfld.long 0x00 21. "CONVHARDERROR,Enable convolutional decoding hard error" "0: Convolutional hard error decoding is disabled,1: Convolutional hard error decoding is enabled"
|
|
newline
|
|
bitfld.long 0x00 20. "FORCE2FSK,Force use of 2-FSK" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "SINGLEBLOCK,Single block code per frame" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "CONVSUBFRAMETERMINATE,Enable trellis termination for subframes" "0: Trellis termination is applied at the end of..,1: Trellis termination is applied at the end of.."
|
|
newline
|
|
bitfld.long 0x00 17. "CONVBUSLOCK,Convolutional decoding bus lock" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "INTERLEAVEWIDTH,Interleave symbol width" "0: Each interleaver element consists of one RF..,1: Each interleaver element consists of two RF.."
|
|
newline
|
|
bitfld.long 0x00 12.--15. "INTERLEAVEFIRSTINDEX,4-bit index of the first interleaver" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "INTERLEAVEMODE,Interleaver mode" "0: Interleaving is disabled,1: Interleaving is enabled,2: No symbol interleaving is performed but the..,3: No symbol interleaving is performed but the.."
|
|
newline
|
|
bitfld.long 0x00 8.--9. "CONVINV,Convolutional code symbol inversion" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 7. "CONVTRACEBACKDISABLE,Convolutional traceback disabling" "0: Traceback history is enabled and..,1: Traceback history is disabled and.."
|
|
newline
|
|
bitfld.long 0x00 6. "CONVDECODEMODE,Convolutional decoding mode setting" "0: Use soft decision convolutional decoding..,1: Use hard decision convolutional decoding"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "CONVMODE,Convolutional Encoder / Decoder mode" "0: Convolutional encoding / decoding is disabled,1: Normal convolutional encoding / decoding is..,2: Repeat-mode convolutional encoding / decoding..,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "BLOCKWHITEMODE,Block Coder Whitener Mode" "0: The input data is passed directly to the..,1: Data is whitened in TX and de-whitened in RX..,2: Data is whitened in TX and de-whitened in RX..,3: Data is whitened in TX after symbol..,4: Data is whitened in TX after symbol..,5: Parity bits are added in TX and checked and..,6: Parity bits are added in TX and checked and..,7: A lookup table is used to implement table.."
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "BLOCKRAMADDR,No Description"
|
|
hexmask.long 0x00 2.--31. 1. "BLOCKRAMADDR,Block decoding RAM address"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CONVRAMADDR,No Description"
|
|
hexmask.long 0x00 2.--31. 1. "CONVRAMADDR,Convolutional decoding RAM address"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "CTRL,No Description"
|
|
bitfld.long 0x00 20. "RXABORTIGNOREDIS,Disable ignoring CMD_RXABORT" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "WAITEOFEN,Enable STATE_TX_WAITEOF" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "LPMODEDIS,Disable FRC low power" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "PRBSTEST,Pseudo-Random Bit Sequence Testmode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "SEQHANDSHAKE,Sequencer data handshake" "0: The sequencer may read transmit or read data..,1: The frame controller will require that the.."
|
|
newline
|
|
bitfld.long 0x00 13. "TXPREFETCH,Transmit prefetch data" "0: The frame controller will start preparing..,1: The frame controller will start preparing.."
|
|
newline
|
|
bitfld.long 0x00 11.--12. "RATESELECT,MODEM rate select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "BITSPERWORD,Bits Per Word for first word in a frame" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "RXFCDMODE,RX Frame Control Descriptor Mode" "0: FCD2 is reloaded when SCNT reaches 0,1: Use FCD2 for the first sub-frame then..,2: Use FCD2 for the first sub-frame then FCD3 is..,3: Use alternating FCD2 / FCD3 for each complete.."
|
|
newline
|
|
bitfld.long 0x00 4.--5. "TXFCDMODE,TX Frame Control Descriptor Mode" "0: FCD0 is reloaded when SCNT reaches 0,1: Use FCD0 for the first sub-frame then..,2: Use FCD0 for the first sub-frame then FCD1 is..,3: Use alternating FCD0 / FCD1 for each complete.."
|
|
newline
|
|
bitfld.long 0x00 2. "BITORDER,Data Bit Order" "0: Least Significant bit in each word is..,1: Most Significant bit in each word is.."
|
|
newline
|
|
bitfld.long 0x00 1. "UARTMODE,Data Uart Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "RANDOMTX,Random TX Mode" "0,1"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "RXCTRL,No Description"
|
|
bitfld.long 0x00 7.--10. "RXFRAMEENDAHEADBYTES,RX frame almost end of packet timing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6. "BUFRESTORERXABORTED,Buffer restore on RXABORTED" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "BUFRESTOREFRAMEERROR,Buffer restore on frame error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "BUFCLEAR,Buffer Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TRACKABFRAME,Track Aborted RX Frame" "0: When a frame abort is triggered the frame..,1: When a frame abort is triggered the receiver.."
|
|
newline
|
|
bitfld.long 0x00 2. "ACCEPTBLOCKERRORS,Accept Block Decoding Errors" "0: Frame reception will be stopped when a block..,1: Frame reception will continue even in the.."
|
|
newline
|
|
bitfld.long 0x00 1. "ACCEPTCRCERRORS,Accept CRC Errors" "0: Frames with one or more detected CRC errors..,1: Frames will always be written to the receive.."
|
|
newline
|
|
bitfld.long 0x00 0. "STORECRC,Store CRC value" "0,1"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "TRAILTXDATACTRL,No Description"
|
|
bitfld.long 0x00 22. "TXSUPPLENOVERIDE,TX Sup Len Override" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 12.--21. 1. "TRAILTXREPLEN,Trailing Data Repeat Length"
|
|
newline
|
|
bitfld.long 0x00 11. "TRAILTXDATAFORCE,Force trailing TX data insertion" "0: Trailing data in transmit is only applied in..,1: The number of bits defined by TRAILTXDATACNT.."
|
|
newline
|
|
bitfld.long 0x00 8.--10. "TRAILTXDATACNT,Trailing data bit count" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "TRAILTXDATA,Trailing Data value"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "TRAILRXDATA,No Description"
|
|
bitfld.long 0x00 5. "RTCSTAMP,RTCC Time Stamp" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "PROTIMERCC0WRAPH,PROTIMER Capture Compare channel 0 WrapH" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "PROTIMERCC0WRAPL,PROTIMER Capture Compare channel 0 WrapL" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PROTIMERCC0BASE,PROTIMER Capture Compare channel 0 Base" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CRCOK,Append CRC OK Indicator" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "RSSI,Append RSSI" "0,1"
|
|
rgroup.long 0x58++0x03
|
|
line.long 0x00 "SCNT,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SCNT,Sub-Frame Counter Value"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "CONVGENERATOR,No Description"
|
|
bitfld.long 0x00 17. "NONSYSTEMATIC,Non systematic recursive code" "0: The recursive code is systematic,1: The recursive code is not systematic"
|
|
newline
|
|
bitfld.long 0x00 16. "RECURSIVE,Convolutional encoding" "0: Non-recursive convolutional coding is used,1: Recursive convolutional coding is used"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. "GENERATOR1,Output 1 Generator Polynomial"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--6. 1. "GENERATOR0,Output 0 Generator Polynomial"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PUNCTCTRL,No Description"
|
|
hexmask.long.byte 0x00 8.--14. 1. "PUNCT1,Puncturing Matrix Row for Output 1"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--6. 1. "PUNCT0,Puncturing Matrix Row for Output 0"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PAUSECTRL,No Description"
|
|
bitfld.long 0x00 16.--20. "INTERLEAVEREADPAUSECNT,Interleaver read pause count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 11.--15. "INTERLEAVEWRITEPAUSECNT,Interleaver write pause count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 5.--10. "CONVPAUSECNT,Convolutional decoder pause setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 4. "TXSUBFRAMEPAUSEEN,Transmit subframe pause enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "INTERLEAVEREADPAUSEEN,Interleaver read pause enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "RXINTERLEAVEWRITEPAUSEEN,Receive interleaver write pause enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "TXINTERLEAVEWRITEPAUSEEN,Transmit interleaver write pause enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "FRAMEDETPAUSEEN,Frame detect pause enable" "0,1"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "IF,No Description"
|
|
bitfld.long 0x00 30. "TXWORD,Transmit Word Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "RXWORD,Receive Word Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "CONVPAUSED,Convolutional coder pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "TXSUBFRAMEPAUSED,Transmit subframe pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26. "INTERLEAVEREADPAUSED,Interleaver read pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "INTERLEAVEWRITEPAUSED,Interleaver write pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "FRAMEDETPAUSED,Frame detected pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "RXRAWOF,RX raw FIFO overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "PKTBUFTHRESHOLD,Packet Buffer Threshold" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "PKTBUFSTART,Packet Buffer Start" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "BOISET,BOI SET" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "WCNTCMP4,Word Counter Compare 4 Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "WCNTCMP3,Word Counter Compare 3 Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "SNIFFOF,Data sniffer overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "TXRAWEVENT,Transmit raw data event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "RXRAWEVENT,Receiver raw data event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "BUSERROR,A bus error event occurred" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "ADDRERROR,Receive address error event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "WCNTCMP2,Word Counter Compare 2 Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "WCNTCMP1,Word Counter Compare 1 Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "WCNTCMP0,Word Counter Compare 0 Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "RXOF,Receive Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "BLOCKERROR,Block Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "FRAMEERROR,Frame Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "RXABORTED,RX Aborted Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "RXDONE,RX Done Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TXUF,Transmit Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TXABORTED,Transmit Aborted Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "TXAFTERFRAMEDONE,TX after frame Done Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXDONE,TX Done Interrupt Flag" "0,1"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "IEN,No Description"
|
|
bitfld.long 0x00 30. "TXWORD,Transmit Word Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "RXWORD,Receive Word Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "CONVPAUSED,Convolutional coder pause event enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "TXSUBFRAMEPAUSED,Transmit subframe pause event enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26. "INTERLEAVEREADPAUSED,Interleaver read pause event enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "INTERLEAVEWRITEPAUSED,Interleaver write pause event enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "FRAMEDETPAUSED,Frame detected pause event enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "RXRAWOF,RXRAWOF Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "PKTBUFTHRESHOLD,PKTBUFTHRESHOLD Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "PKTBUFSTART,PKTBUFSTART Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "BOISET,BOISET" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "WCNTCMP4,Word Counter Compare 4 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "WCNTCMP3,Word Counter Compare 3 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "SNIFFOF,Data sniffer overflow enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "TXRAWEVENT,Transmit raw data enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "RXRAWEVENT,Receiver raw data enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "BUSERROR,Bus error enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "ADDRERROR,Receive address error enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "WCNTCMP2,Word Counter Compare 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "WCNTCMP1,Word Counter Compare 1 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "WCNTCMP0,Word Counter Compare 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "RXOF,Receive Overflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "BLOCKERROR,Block Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "FRAMEERROR,Frame Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "RXABORTED,RX Aborted Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "RXDONE,RX Done Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TXUF,Transmit Underflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TXABORTED,Transmit Aborted Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "TXAFTERFRAMEDONE,TX after frame Done Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXDONE,TX Done Interrupt Enable" "0,1"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "OTACNT,No Description"
|
|
hexmask.long.word 0x00 16.--31. 1. "OTATXCNT,OTA TX bit counter"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "OTARXCNT,OTA RX bit counter"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "BUFFERMODE,No Description"
|
|
bitfld.long 0x00 3. "RXFRCBUFMUX,RX FRC Buffer Mux" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1.--2. "RXBUFFERMODE,Receive Buffer Mode" "0: The Frame Controller write data to the Buffer..,1: The Frame Controller does not write data to..,2: The Frame Controller will not output..,?..."
|
|
newline
|
|
bitfld.long 0x00 0. "TXBUFFERMODE,Transmit Buffer Mode" "0: The Frame Controller fetches data from the..,1: The Frame Controller does not fetch data from.."
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "SNIFFCTRL,No Description"
|
|
bitfld.long 0x00 17. "SNIFFSYNCWORD,Sniffer baudrate setting" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "SNIFFBR,Sniffer baudrate setting"
|
|
newline
|
|
bitfld.long 0x00 7. "SNIFFAUXDATA,Enable sniffing of auxiliary data" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "SNIFFSTATE,Enable sniffing of state information" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "SNIFFRSSI,Enable sniffing of RSSI" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "SNIFFTXDATA,Enable sniffing of transmitted data" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "SNIFFRXDATA,Enable sniffing of received data" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "SNIFFBITS,Data sniff data bits" "0: Each sniffer output word contains 8 data bits,1: Each sniffer output word contains 9 data bits"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "SNIFFMODE,Data Sniff Mode" "0: FRC Packet Sniffer mode is disabled,1: UART encoded data is transmitted on the DOUT..,2: SPI data is transmitted on the DOUT pin and a..,?..."
|
|
wgroup.long 0x88++0x03
|
|
line.long 0x00 "AUXDATA,No Description"
|
|
hexmask.long.word 0x00 0.--8. 1. "AUXDATA,Auxiliary sniffer data output"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "RAWCTRL,No Description"
|
|
bitfld.long 0x00 13. "DEMODRAWDATAMUX,Raw data mux control" "0: RAW data is selected using modem register..,1: RAW data is selected using modem register.."
|
|
newline
|
|
bitfld.long 0x00 7.--8. "RXRAWTRIGGER,Receiver raw data trigger setting" "0: RAW data storage is triggered immediately..,1: RAW data storage is triggered by the selected..,2: RAW data storage is triggered by an internal..,?..."
|
|
newline
|
|
bitfld.long 0x00 5. "RXRAWRANDOM,Receive raw data random number generator" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2.--4. "RXRAWMODE,Receiver raw data mode" "0: RAW receive mode is disabled,1: RAW receive mode is enabled fetching a single..,2: RAW receive mode is enabled fetching multiple..,3: This mode is identical to the SINGLEBUFFER..,4: RAW receive mode is enabled fetching multiple..,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--1. "TXRAWMODE,Transmitter raw data mode" "0: RAW transmit mode is disabled,1: RAW transmit mode is enabled transmitting the..,2: RAW transmit mode is enabled transmitting the..,?..."
|
|
rgroup.long 0x90++0x03
|
|
line.long 0x00 "RXRAWDATA,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "RXRAWDATA,Receiver RAW data register"
|
|
rgroup.long 0x94++0x03
|
|
line.long 0x00 "PAUSEDATA,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "PAUSEDATA,Receiver pause data register"
|
|
rgroup.long 0x98++0x03
|
|
line.long 0x00 "LIKELYCONVSTATE,No Description"
|
|
bitfld.long 0x00 0.--5. "LIKELYCONVSTATE,Most likely convolutional decoder state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0x9C++0x03
|
|
line.long 0x00 "INTELEMENTNEXT,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "INTELEMENTNEXT,Interleaver element value"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "INTWRITEPOINT,No Description"
|
|
bitfld.long 0x00 0.--4. "INTWRITEPOINT,Interleaver buffer write pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "INTREADPOINT,No Description"
|
|
bitfld.long 0x00 0.--4. "INTREADPOINT,Interleaver buffer read pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "AUTOCG,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "AUTOCGEN,Automatic clock gate enable"
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "CGCLKSTOP,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "FORCEOFF,Force off"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "SEQIF,No Description"
|
|
bitfld.long 0x00 30. "TXWORD,Transmit Word Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "RXWORD,Receive Word Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "CONVPAUSED,Convolutional coder pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "TXSUBFRAMEPAUSED,Transmit subframe pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26. "INTERLEAVEREADPAUSED,Interleaver read pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "INTERLEAVEWRITEPAUSED,Interleaver write pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "FRAMEDETPAUSED,Frame detected pause event active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "RXRAWOF,RX raw FIFO overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "PKTBUFTHRESHOLD,Packet Buffer Threshold" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "PKTBUFSTART,Packet Buffer Start" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "BOISET,BOISET Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "WCNTCMP4,Word Counter Compare 4 Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "WCNTCMP3,Word Counter Compare 3 Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "SNIFFOF,Data sniffer overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "TXRAWEVENT,Transmit raw data event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "RXRAWEVENT,Receiver raw data event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "BUSERROR,A bus error event occurred" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "ADDRERROR,Receive address error event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "WCNTCMP2,Word Counter Compare 2 Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "WCNTCMP1,Word Counter Compare 1 Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "WCNTCMP0,Word Counter Compare 0 Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "RXOF,Receive Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "BLOCKERROR,Block Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "FRAMEERROR,Frame Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "RXABORTED,RX Aborted Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "RXDONE,RX Done Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TXUF,Transmit Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TXABORTED,Transmit Aborted Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "TXAFTERFRAMEDONE,TX after frame Done Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXDONE,TX Done Interrupt Flag" "0,1"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "SEQIEN,No Description"
|
|
bitfld.long 0x00 30. "TXWORD,Transmit Word Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "RXWORD,Receive Word Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "CONVPAUSED,Convolutional coder pause event enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "TXSUBFRAMEPAUSED,Transmit subframe pause event enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26. "INTERLEAVEREADPAUSED,Interleaver read pause event enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "INTERLEAVEWRITEPAUSED,Interleaver write pause event enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "FRAMEDETPAUSED,Frame detected pause event enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "RXRAWOF,RXRAWOF Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "PKTBUFTHRESHOLD,PKTBUFTHRESHOLD Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "PKTBUFSTART,PKTBUFSTART Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "BOISET,Word Counter Compare 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "WCNTCMP4,Word Counter Compare 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "WCNTCMP3,Word Counter Compare 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "SNIFFOF,Data sniffer overflow enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "TXRAWEVENT,Transmit raw data enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "RXRAWEVENT,Receiver raw data enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "BUSERROR,Bus error enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "ADDRERROR,Receive address error enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "WCNTCMP2,Word Counter Compare 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "WCNTCMP1,Word Counter Compare 1 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "WCNTCMP0,Word Counter Compare 0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "RXOF,Receive Overflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "BLOCKERROR,Block Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "FRAMEERROR,Frame Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "RXABORTED,RX Aborted Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "RXDONE,RX Done Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TXUF,Transmit Underflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TXABORTED,Transmit Aborted Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "TXAFTERFRAMEDONE,TX after frame Done Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXDONE,TX Done Interrupt Enable" "0,1"
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "WCNTCMP3,No Description"
|
|
hexmask.long.word 0x00 0.--11. 1. "SUPPLENFIELDLOC,Sup Length field location"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "BOICTRL,No Description"
|
|
bitfld.long 0x00 16. "BOIMATCHVAL,BOI match value" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13.--15. "BOIBITPOS,BOI bit position" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.word 0x00 1.--12. 1. "BOIFIELDLOC,BOI field location"
|
|
newline
|
|
bitfld.long 0x00 0. "BOIEN,BOI EN" "0,1"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "DSLCTRL,No Description"
|
|
bitfld.long 0x00 28.--30. "SUPSHFFACTOR,Supp Shift factor" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 27. "STORESUP,Store SUPP in BUFC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24.--26. "RXSUPRECEPMODE,RX Supplement Reception Mode" "0: Do not receive SUP,1: Receive SUP based on BOI and fetch SUPLEN..,2: Receive SUP based on BOI and fetch SUPLEN..,3: Receive SUP based irrespective of BOI and..,4: Receive SUP based irrespective of BOI and..,?..."
|
|
newline
|
|
bitfld.long 0x00 20.--23. "DSLMINLENGTH,Minimum decoded length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "DSLBITS,Length field number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "DSLOFFSET,Length Field Offset Value"
|
|
newline
|
|
bitfld.long 0x00 4.--6. "DSLSHIFT,Dynamic Frame Length bitshift" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3. "DSLBITORDER,Dynamic Frame Length Bit order" "0: Bit ordering is defined by the BITORDER field,1: Bit ordering is reversed compared to what is.."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "DSLMODE,Dynamic Frame Length Mode" "0: Dynamic Frame Length support is disabled and..,1: Dynamic Frame Length is enabled and located..,2: Dynamic Frame Length is enabled and located..,3: Dynamic Frame Length is enabled and located..,4: Dynamic Frame Length is enabled and located..,5: Dynamic Frame Length support is disabled and..,6: In transmit mode the frame length must be..,?..."
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "WCNTCMP4,No Description"
|
|
hexmask.long.word 0x00 0.--11. 1. "SUPPLENGTH,Supp Length Value"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "PKTBUFCTRL,No Description"
|
|
bitfld.long 0x00 24. "PKTBUFTHRESHOLDEN,Packet Buffer Threshold Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12.--17. "PKTBUFTHRESHOLD,Packet Buffer Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
hexmask.long.word 0x00 0.--11. 1. "PKTBUFSTARTLOC,Packet Buffer Start Address"
|
|
rgroup.long 0xD0++0x03
|
|
line.long 0x00 "PKTBUFSTATUS,No Description"
|
|
bitfld.long 0x00 0.--5. "PKTBUFCOUNT,Packet Buffer Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0xD4++0x03
|
|
line.long 0x00 "PKTBUF0,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PKTBUF3,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PKTBUF2,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "PKTBUF1,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PKTBUF0,Packet Capture Buffer"
|
|
rgroup.long 0xD8++0x03
|
|
line.long 0x00 "PKTBUF1,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PKTBUF7,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PKTBUF6,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "PKTBUF5,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PKTBUF4,Packet Capture Buffer"
|
|
rgroup.long 0xDC++0x03
|
|
line.long 0x00 "PKTBUF2,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PKTBUF11,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PKTBUF10,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "PKTBUF9,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PKTBUF8,Packet Capture Buffer"
|
|
rgroup.long 0xE0++0x03
|
|
line.long 0x00 "PKTBUF3,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PKTBUF15,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PKTBUF14,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "PKTBUF13,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PKTBUF12,Packet Capture Buffer"
|
|
rgroup.long 0xE4++0x03
|
|
line.long 0x00 "PKTBUF4,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PKTBUF19,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PKTBUF18,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "PKTBUF17,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PKTBUF16,Packet Capture Buffer"
|
|
rgroup.long 0xE8++0x03
|
|
line.long 0x00 "PKTBUF5,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PKTBUF23,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PKTBUF22,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "PKTBUF21,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PKTBUF20,Packet Capture Buffer"
|
|
rgroup.long 0xEC++0x03
|
|
line.long 0x00 "PKTBUF6,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PKTBUF27,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PKTBUF26,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "PKTBUF25,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PKTBUF24,Packet Capture Buffer"
|
|
rgroup.long 0xF0++0x03
|
|
line.long 0x00 "PKTBUF7,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PKTBUF31,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PKTBUF30,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "PKTBUF29,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PKTBUF28,Packet Capture Buffer"
|
|
rgroup.long 0xF4++0x03
|
|
line.long 0x00 "PKTBUF8,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PKTBUF35,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PKTBUF34,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "PKTBUF33,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PKTBUF32,Packet Capture Buffer"
|
|
rgroup.long 0xF8++0x03
|
|
line.long 0x00 "PKTBUF9,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PKTBUF39,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PKTBUF38,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "PKTBUF37,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PKTBUF36,Packet Capture Buffer"
|
|
rgroup.long 0xFC++0x03
|
|
line.long 0x00 "PKTBUF10,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PKTBUF43,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PKTBUF42,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "PKTBUF41,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PKTBUF40,Packet Capture Buffer"
|
|
rgroup.long 0x100++0x03
|
|
line.long 0x00 "PKTBUF11,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PKTBUF47,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PKTBUF46,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "PKTBUF45,Packet Capture Buffer"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PKTBUF44,Packet Capture Buffer"
|
|
repeat 4. (strings "0" "1" "2" "3" )(list 0x00 0x04 0x08 0x0C )
|
|
group.long ($2+0x104)++0x03
|
|
line.long 0x00 "FCD$1,No Description"
|
|
bitfld.long 0x00 16. "EXCLUDESUBFRAMEWCNT,Exclude subframe from WCNT" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "ADDTRAILTXDATA,Add trailing TX data in this subframe" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "SKIPWHITE,Skip data whitening in this subframe" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12.--13. "SKIPCRC,Skip First Words in CRC Calculation" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 11. "CALCCRC,Calculate CRC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "INCLUDECRC,Include CRC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "BUFFER,Buffer to Access" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "WORDS,No of Words in sub-frame"
|
|
repeat.end
|
|
repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C )
|
|
rgroup.long ($2+0x120)++0x03
|
|
line.long 0x00 "INTELEMENT$1,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "INTELEMENT,Interleaver element data"
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
tree "FSRCO (Fast Start RCO)"
|
|
base ad:0x0
|
|
tree "FSRCO_NS"
|
|
base ad:0x50018000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version"
|
|
tree.end
|
|
tree "FSRCO_S"
|
|
base ad:0x40018000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version"
|
|
tree.end
|
|
tree.end
|
|
tree "GPCRC (General Purpose Cyclic Redundancy Check)"
|
|
base ad:0x0
|
|
tree "GPCRC_NS"
|
|
base ad:0x50088000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version ID"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,CRC Enable" "0: Disable CRC function. Reordering functions are..,1: Writes to INPUTDATA registers will result in CRC.."
|
|
line.long 0x4 "CTRL,No Description"
|
|
bitfld.long 0x4 13. "AUTOINIT,Auto Init Enable" "0,1"
|
|
bitfld.long 0x4 10. "BYTEREVERSE,Byte Reverse Mode" "0: No reverse: B3 B2 B1 B0,1: Reverse byte order. For 32-bit: B0 B1 B2 B3; For.."
|
|
newline
|
|
bitfld.long 0x4 9. "BITREVERSE,Byte-level Bit Reverse Enable" "0: No reverse,1: Reverse bit order in each byte"
|
|
bitfld.long 0x4 8. "BYTEMODE,Byte Mode Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "POLYSEL,Polynomial Select" "0: CRC-32 (0x04C11DB7) polynomial selected,1: 16-bit CRC programmable polynomial selected"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 0. "INIT,Initialization Enable" "0,1"
|
|
group.long 0x10++0x7
|
|
line.long 0x0 "INIT,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "INIT,CRC Initialization Value"
|
|
line.long 0x4 "POLY,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "POLY,CRC Polynomial Value"
|
|
wgroup.long 0x18++0xB
|
|
line.long 0x0 "INPUTDATA,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "INPUTDATA,Input Data for 32-bit"
|
|
line.long 0x4 "INPUTDATAHWORD,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "INPUTDATAHWORD,Input Data for 16-bit"
|
|
line.long 0x8 "INPUTDATABYTE,No Description"
|
|
hexmask.long.byte 0x8 0.--7. 1. "INPUTDATABYTE,Input Data for 8-bit"
|
|
rgroup.long 0x24++0xB
|
|
line.long 0x0 "DATA,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,CRC Data Register"
|
|
line.long 0x4 "DATAREV,No Description"
|
|
hexmask.long 0x4 0.--31. 1. "DATAREV,Data Reverse Value"
|
|
line.long 0x8 "DATABYTEREV,No Description"
|
|
hexmask.long 0x8 0.--31. 1. "DATABYTEREV,Data Byte Reverse Value"
|
|
tree.end
|
|
tree "GPCRC_S"
|
|
base ad:0x40088000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version ID"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,CRC Enable" "0: Disable CRC function. Reordering functions are..,1: Writes to INPUTDATA registers will result in CRC.."
|
|
line.long 0x4 "CTRL,No Description"
|
|
bitfld.long 0x4 13. "AUTOINIT,Auto Init Enable" "0,1"
|
|
bitfld.long 0x4 10. "BYTEREVERSE,Byte Reverse Mode" "0: No reverse: B3 B2 B1 B0,1: Reverse byte order. For 32-bit: B0 B1 B2 B3; For.."
|
|
newline
|
|
bitfld.long 0x4 9. "BITREVERSE,Byte-level Bit Reverse Enable" "0: No reverse,1: Reverse bit order in each byte"
|
|
bitfld.long 0x4 8. "BYTEMODE,Byte Mode Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "POLYSEL,Polynomial Select" "0: CRC-32 (0x04C11DB7) polynomial selected,1: 16-bit CRC programmable polynomial selected"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 0. "INIT,Initialization Enable" "0,1"
|
|
group.long 0x10++0x7
|
|
line.long 0x0 "INIT,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "INIT,CRC Initialization Value"
|
|
line.long 0x4 "POLY,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "POLY,CRC Polynomial Value"
|
|
wgroup.long 0x18++0xB
|
|
line.long 0x0 "INPUTDATA,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "INPUTDATA,Input Data for 32-bit"
|
|
line.long 0x4 "INPUTDATAHWORD,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "INPUTDATAHWORD,Input Data for 16-bit"
|
|
line.long 0x8 "INPUTDATABYTE,No Description"
|
|
hexmask.long.byte 0x8 0.--7. 1. "INPUTDATABYTE,Input Data for 8-bit"
|
|
rgroup.long 0x24++0xB
|
|
line.long 0x0 "DATA,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,CRC Data Register"
|
|
line.long 0x4 "DATAREV,No Description"
|
|
hexmask.long 0x4 0.--31. 1. "DATAREV,Data Reverse Value"
|
|
line.long 0x8 "DATABYTEREV,No Description"
|
|
hexmask.long 0x8 0.--31. 1. "DATABYTEREV,Data Byte Reverse Value"
|
|
tree.end
|
|
tree.end
|
|
tree "GPIO (General Purpose Input/Output)"
|
|
base ad:0x0
|
|
tree "GPIO_NS"
|
|
base ad:0x5003C000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "PORTA_CTRL,Port control"
|
|
bitfld.long 0x0 28. "DINDISALT,Data In Disable Alt" "0,1"
|
|
bitfld.long 0x0 20.--22. "SLEWRATEALT,Slew Rate Alt" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12. "DINDIS,Data In Disable" "0,1"
|
|
bitfld.long 0x0 4.--6. "SLEWRATE,Slew Rate" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "PORTA_MODEL,mode low"
|
|
hexmask.long.byte 0x4 28.--31. 1. "MODE7,MODE n"
|
|
hexmask.long.byte 0x4 24.--27. 1. "MODE6,MODE n"
|
|
newline
|
|
hexmask.long.byte 0x4 20.--23. 1. "MODE5,MODE n"
|
|
hexmask.long.byte 0x4 16.--19. 1. "MODE4,MODE n"
|
|
newline
|
|
hexmask.long.byte 0x4 12.--15. 1. "MODE3,MODE n"
|
|
hexmask.long.byte 0x4 8.--11. 1. "MODE2,MODE n"
|
|
newline
|
|
hexmask.long.byte 0x4 4.--7. 1. "MODE1,MODE n"
|
|
hexmask.long.byte 0x4 0.--3. 1. "MODE0,MODE n"
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "PORTA_MODEH,mode high"
|
|
hexmask.long.byte 0x0 0.--3. 1. "MODE0,MODE n"
|
|
line.long 0x4 "PORTA_DOUT,data out"
|
|
hexmask.long.word 0x4 0.--8. 1. "DOUT,Data output"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "PORTA_DIN,data in"
|
|
hexmask.long.word 0x0 0.--8. 1. "DIN,Data input"
|
|
group.long 0x30++0x7
|
|
line.long 0x0 "PORTB_CTRL,Port control"
|
|
bitfld.long 0x0 28. "DINDISALT,Data In Disable Alt" "0,1"
|
|
bitfld.long 0x0 20.--22. "SLEWRATEALT,Slew Rate Alt" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12. "DINDIS,Data In Disable" "0,1"
|
|
bitfld.long 0x0 4.--6. "SLEWRATE,Slew Rate" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "PORTB_MODEL,mode low"
|
|
hexmask.long.byte 0x4 16.--19. 1. "MODE4,MODE n"
|
|
hexmask.long.byte 0x4 12.--15. 1. "MODE3,MODE n"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--11. 1. "MODE2,MODE n"
|
|
hexmask.long.byte 0x4 4.--7. 1. "MODE1,MODE n"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--3. 1. "MODE0,MODE n"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PORTB_DOUT,data out"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DOUT,Data output"
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x0 "PORTB_DIN,data in"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DIN,Data input"
|
|
group.long 0x60++0x7
|
|
line.long 0x0 "PORTC_CTRL,Port control"
|
|
bitfld.long 0x0 28. "DINDISALT,Data In Disable Alt" "0,1"
|
|
bitfld.long 0x0 20.--22. "SLEWRATEALT,Slew Rate Alt" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12. "DINDIS,Data In Disable" "0,1"
|
|
bitfld.long 0x0 4.--6. "SLEWRATE,Slew Rate" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "PORTC_MODEL,mode low"
|
|
hexmask.long.byte 0x4 28.--31. 1. "MODE7,MODE n"
|
|
hexmask.long.byte 0x4 24.--27. 1. "MODE6,MODE n"
|
|
newline
|
|
hexmask.long.byte 0x4 20.--23. 1. "MODE5,MODE n"
|
|
hexmask.long.byte 0x4 16.--19. 1. "MODE4,MODE n"
|
|
newline
|
|
hexmask.long.byte 0x4 12.--15. 1. "MODE3,MODE n"
|
|
hexmask.long.byte 0x4 8.--11. 1. "MODE2,MODE n"
|
|
newline
|
|
hexmask.long.byte 0x4 4.--7. 1. "MODE1,MODE n"
|
|
hexmask.long.byte 0x4 0.--3. 1. "MODE0,MODE n"
|
|
group.long 0x70++0x3
|
|
line.long 0x0 "PORTC_DOUT,data out"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DOUT,Data output"
|
|
rgroup.long 0x74++0x3
|
|
line.long 0x0 "PORTC_DIN,data in"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DIN,Data input"
|
|
group.long 0x90++0x7
|
|
line.long 0x0 "PORTD_CTRL,Port control"
|
|
bitfld.long 0x0 28. "DINDISALT,Data In Disable Alt" "0,1"
|
|
bitfld.long 0x0 20.--22. "SLEWRATEALT,Slew Rate Alt" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12. "DINDIS,Data In Disable" "0,1"
|
|
bitfld.long 0x0 4.--6. "SLEWRATE,Slew Rate" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "PORTD_MODEL,mode low"
|
|
hexmask.long.byte 0x4 12.--15. 1. "MODE3,MODE n"
|
|
hexmask.long.byte 0x4 8.--11. 1. "MODE2,MODE n"
|
|
newline
|
|
hexmask.long.byte 0x4 4.--7. 1. "MODE1,MODE n"
|
|
hexmask.long.byte 0x4 0.--3. 1. "MODE0,MODE n"
|
|
group.long 0xA0++0x3
|
|
line.long 0x0 "PORTD_DOUT,data out"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DOUT,Data output"
|
|
rgroup.long 0xA4++0x3
|
|
line.long 0x0 "PORTD_DIN,data in"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DIN,Data input"
|
|
wgroup.long 0x300++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Configuration Lock Key"
|
|
rgroup.long 0x310++0x3
|
|
line.long 0x0 "GPIOLOCKSTATUS,No Description"
|
|
bitfld.long 0x0 0. "LOCK,GPIO LOCK status" "0: Registers are unlocked,1: Registers are locked"
|
|
group.long 0x320++0xB
|
|
line.long 0x0 "ABUSALLOC,A Bus allocation"
|
|
hexmask.long.byte 0x0 24.--27. 1. "AODD1,A Bus Odd 1"
|
|
hexmask.long.byte 0x0 16.--19. 1. "AODD0,A Bus Odd 0"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "AEVEN1,A Bus Even 1"
|
|
hexmask.long.byte 0x0 0.--3. 1. "AEVEN0,A Bus Even 0"
|
|
line.long 0x4 "BBUSALLOC,B Bus allocation"
|
|
hexmask.long.byte 0x4 24.--27. 1. "BODD1,B Bus Odd 1"
|
|
hexmask.long.byte 0x4 16.--19. 1. "BODD0,B Bus Odd 0"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--11. 1. "BEVEN1,B Bus Even 1"
|
|
hexmask.long.byte 0x4 0.--3. 1. "BEVEN0,B Bus Even 0"
|
|
line.long 0x8 "CDBUSALLOC,CD Bus allocation"
|
|
hexmask.long.byte 0x8 24.--27. 1. "CDODD1,CD Bus Odd 1"
|
|
hexmask.long.byte 0x8 16.--19. 1. "CDODD0,CD Bus Odd 0"
|
|
newline
|
|
hexmask.long.byte 0x8 8.--11. 1. "CDEVEN1,CD Bus Even 1"
|
|
hexmask.long.byte 0x8 0.--3. 1. "CDEVEN0,CD Bus Even 0"
|
|
group.long 0x400++0x17
|
|
line.long 0x0 "EXTIPSELL,External Interrupt Port Select Low"
|
|
bitfld.long 0x0 28.--29. "EXTIPSEL7,External Interrupt Port Select" "0: Port A group selected,1: Port B group selected,2: Port C group selected,3: Port D group selected"
|
|
bitfld.long 0x0 24.--25. "EXTIPSEL6,External Interrupt Port Select" "0: Port A group selected,1: Port B group selected,2: Port C group selected,3: Port D group selected"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "EXTIPSEL5,External Interrupt Port Select" "0: Port A group selected,1: Port B group selected,2: Port C group selected,3: Port D group selected"
|
|
bitfld.long 0x0 16.--17. "EXTIPSEL4,External Interrupt Port Select" "0: Port A group selected,1: Port B group selected,2: Port C group selected,3: Port D group selected"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "EXTIPSEL3,External Interrupt Port Select" "0: Port A group selected,1: Port B group selected,2: Port C group selected,3: Port D group selected"
|
|
bitfld.long 0x0 8.--9. "EXTIPSEL2,External Interrupt Port Select" "0: Port A group selected,1: Port B group selected,2: Port C group selected,3: Port D group selected"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "EXTIPSEL1,External Interrupt Port Select" "0: Port A group selected,1: Port B group selected,2: Port C group selected,3: Port D group selected"
|
|
bitfld.long 0x0 0.--1. "EXTIPSEL0,External Interrupt Port Select" "0: Port A group selected,1: Port B group selected,2: Port C group selected,3: Port D group selected"
|
|
line.long 0x4 "EXTIPSELH,External interrupt Port Select High"
|
|
bitfld.long 0x4 12.--13. "EXTIPSEL3,External Interrupt Port Select" "0: Port A group selected,1: Port B group selected,2: Port C group selected,3: Port D group selected"
|
|
bitfld.long 0x4 8.--9. "EXTIPSEL2,External Interrupt Port Select" "0: Port A group selected,1: Port B group selected,2: Port C group selected,3: Port D group selected"
|
|
newline
|
|
bitfld.long 0x4 4.--5. "EXTIPSEL1,External Interrupt Port Select" "0: Port A group selected,1: Port B group selected,2: Port C group selected,3: Port D group selected"
|
|
bitfld.long 0x4 0.--1. "EXTIPSEL0,External Interrupt Port Select" "0: Port A group selected,1: Port B group selected,2: Port C group selected,3: Port D group selected"
|
|
line.long 0x8 "EXTIPINSELL,External Interrupt Pin Select Low"
|
|
bitfld.long 0x8 28.--29. "EXTIPINSEL7,External Interrupt Pin select" "0: OFFSET=0,1: OFFSET=1,2: OFFSET=2,3: OFFSET=3"
|
|
bitfld.long 0x8 24.--25. "EXTIPINSEL6,External Interrupt Pin select" "0: OFFSET=0,1: OFFSET=1,2: OFFSET=2,3: OFFSET=3"
|
|
newline
|
|
bitfld.long 0x8 20.--21. "EXTIPINSEL5,External Interrupt Pin select" "0: OFFSET=0,1: OFFSET=1,2: OFFSET=2,3: OFFSET=3"
|
|
bitfld.long 0x8 16.--17. "EXTIPINSEL4,External Interrupt Pin select" "0: OFFSET=0,1: OFFSET=1,2: OFFSET=2,3: OFFSET=3"
|
|
newline
|
|
bitfld.long 0x8 12.--13. "EXTIPINSEL3,External Interrupt Pin select" "0: OFFSET=0,1: OFFSET=1,2: OFFSET=2,3: OFFSET=3"
|
|
bitfld.long 0x8 8.--9. "EXTIPINSEL2,External Interrupt Pin select" "0: OFFSET=0,1: OFFSET=1,2: OFFSET=2,3: OFFSET=3"
|
|
newline
|
|
bitfld.long 0x8 4.--5. "EXTIPINSEL1,External Interrupt Pin select" "0: OFFSET=0,1: OFFSET=1,2: OFFSET=2,3: OFFSET=3"
|
|
bitfld.long 0x8 0.--1. "EXTIPINSEL0,External Interrupt Pin select" "0: OFFSET=0,1: OFFSET=1,2: OFFSET=2,3: OFFSET=3"
|
|
line.long 0xC "EXTIPINSELH,External Interrupt Pin Select High"
|
|
bitfld.long 0xC 12.--13. "EXTIPINSEL3,External Interrupt Pin select" "0: OFFSET=8,1: OFFSET=9,2: OFFSET=10,3: OFFSET=11"
|
|
bitfld.long 0xC 8.--9. "EXTIPINSEL2,External Interrupt Pin select" "0: OFFSET=8,1: OFFSET=9,2: OFFSET=10,3: OFFSET=11"
|
|
newline
|
|
bitfld.long 0xC 4.--5. "EXTIPINSEL1,External Interrupt Pin select" "0: OFFSET=8,1: OFFSET=9,2: OFFSET=10,3: OFFSET=11"
|
|
bitfld.long 0xC 0.--1. "EXTIPINSEL0,External Interrupt Pin select" "0: OFFSET=8,1: OFFSET=9,2: OFFSET=10,3: OFFSET=11"
|
|
line.long 0x10 "EXTIRISE,External Interrupt Rising Edge Trigger"
|
|
hexmask.long.word 0x10 0.--11. 1. "EXTIRISE,EXT Int Rise"
|
|
line.long 0x14 "EXTIFALL,External Interrupt Falling Edge Trigger"
|
|
hexmask.long.word 0x14 0.--11. 1. "EXTIFALL,EXT Int FALL"
|
|
group.long 0x420++0x7
|
|
line.long 0x0 "IF,Interrupt Flag"
|
|
hexmask.long.word 0x0 16.--27. 1. "EM4WU,EM4 wake up"
|
|
bitfld.long 0x0 11. "EXTIF11,External Pin Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "EXTIF10,External Pin Flag" "0,1"
|
|
bitfld.long 0x0 9. "EXTIF9,External Pin Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "EXTIF8,External Pin Flag" "0,1"
|
|
bitfld.long 0x0 7. "EXTIF7,External Pin Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "EXTIF6,External Pin Flag" "0,1"
|
|
bitfld.long 0x0 5. "EXTIF5,External Pin Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "EXTIF4,External Pin Flag" "0,1"
|
|
bitfld.long 0x0 3. "EXTIF3,External Pin Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "EXTIF2,External Pin Flag" "0,1"
|
|
bitfld.long 0x0 1. "EXTIF1,External Pin Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EXTIF0,External Pin Flag" "0,1"
|
|
line.long 0x4 "IEN,Interrupt Enable"
|
|
bitfld.long 0x4 27. "EM4WUIEN11,EM4 Wake Up Interrupt En" "0,1"
|
|
bitfld.long 0x4 26. "EM4WUIEN10,EM4 Wake Up Interrupt En" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "EM4WUIEN9,EM4 Wake Up Interrupt En" "0,1"
|
|
bitfld.long 0x4 24. "EM4WUIEN8,EM4 Wake Up Interrupt En" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "EM4WUIEN7,EM4 Wake Up Interrupt En" "0,1"
|
|
bitfld.long 0x4 22. "EM4WUIEN6,EM4 Wake Up Interrupt En" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "EM4WUIEN5,EM4 Wake Up Interrupt En" "0,1"
|
|
bitfld.long 0x4 20. "EM4WUIEN4,EM4 Wake Up Interrupt En" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "EM4WUIEN3,EM4 Wake Up Interrupt En" "0,1"
|
|
bitfld.long 0x4 18. "EM4WUIEN2,EM4 Wake Up Interrupt En" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "EM4WUIEN1,EM4 Wake Up Interrupt En" "0,1"
|
|
bitfld.long 0x4 16. "EM4WUIEN0,EM4 Wake Up Interrupt En" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "EXTIEN11,External Pin Enable" "0,1"
|
|
bitfld.long 0x4 10. "EXTIEN10,External Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "EXTIEN9,External Pin Enable" "0,1"
|
|
bitfld.long 0x4 8. "EXTIEN8,External Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "EXTIEN7,External Pin Enable" "0,1"
|
|
bitfld.long 0x4 6. "EXTIEN6,External Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "EXTIEN5,External Pin Enable" "0,1"
|
|
bitfld.long 0x4 4. "EXTIEN4,External Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "EXTIEN3,External Pin Enable" "0,1"
|
|
bitfld.long 0x4 2. "EXTIEN2,External Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "EXTIEN1,External Pin Enable" "0,1"
|
|
bitfld.long 0x4 0. "EXTIEN0,External Pin Enable" "0,1"
|
|
group.long 0x42C++0x7
|
|
line.long 0x0 "EM4WUEN,No Description"
|
|
hexmask.long.word 0x0 16.--27. 1. "EM4WUEN,EM4 wake up enable"
|
|
line.long 0x4 "EM4WUPOL,No Description"
|
|
hexmask.long.word 0x4 16.--27. 1. "EM4WUPOL,EM4 Wake-Up Polarity"
|
|
group.long 0x440++0x7
|
|
line.long 0x0 "DBGROUTEPEN,No Description"
|
|
bitfld.long 0x0 3. "TDIPEN,JTAG Test Debug Input Pin Enable" "0,1"
|
|
bitfld.long 0x0 2. "TDOPEN,JTAG Test Debug Output Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "SWDIOTMSPEN,Route Location 0" "0,1"
|
|
bitfld.long 0x0 0. "SWCLKTCKPEN,Route Pin Enable" "0,1"
|
|
line.long 0x4 "TRACEROUTEPEN,No Description"
|
|
bitfld.long 0x4 2. "TRACEDATA0PEN,Trace Data0 Pin Enable" "0,1"
|
|
bitfld.long 0x4 1. "TRACECLKPEN,Trace Clk Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "SWVPEN,Serial Wire Viewer Output Pin Enable" "0,1"
|
|
group.long 0x450++0x13
|
|
line.long 0x0 "CMU_ROUTEEN,CMU pin enable"
|
|
bitfld.long 0x0 2. "CLKOUT2PEN,CLKOUT2 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 1. "CLKOUT1PEN,CLKOUT1 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "CLKOUT0PEN,CLKOUT0 pin enable control bit" "0,1"
|
|
line.long 0x4 "CMU_CLKIN0ROUTE,CLKIN0 port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,CLKIN0 pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,CLKIN0 port select register" "0,1,2,3"
|
|
line.long 0x8 "CMU_CLKOUT0ROUTE,CLKOUT0 port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,CLKOUT0 pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,CLKOUT0 port select register" "0,1,2,3"
|
|
line.long 0xC "CMU_CLKOUT1ROUTE,CLKOUT1 port/pin select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PIN,CLKOUT1 pin select register"
|
|
bitfld.long 0xC 0.--1. "PORT,CLKOUT1 port select register" "0,1,2,3"
|
|
line.long 0x10 "CMU_CLKOUT2ROUTE,CLKOUT2 port/pin select"
|
|
hexmask.long.byte 0x10 16.--19. 1. "PIN,CLKOUT2 pin select register"
|
|
bitfld.long 0x10 0.--1. "PORT,CLKOUT2 port select register" "0,1,2,3"
|
|
group.long 0x46C++0x3
|
|
line.long 0x0 "DCDC_ROUTEEN,DCDC pin enable"
|
|
bitfld.long 0x0 0. "DCDCCOREHIDDENPEN,DCDCCOREHIDDEN pin enable control bit" "0,1"
|
|
group.long 0x47C++0xF
|
|
line.long 0x0 "FRC_ROUTEEN,FRC pin enable"
|
|
bitfld.long 0x0 2. "DOUTPEN,DOUT pin enable control bit" "0,1"
|
|
bitfld.long 0x0 1. "DFRAMEPEN,DFRAME pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DCLKPEN,DCLK pin enable control bit" "0,1"
|
|
line.long 0x4 "FRC_DCLKROUTE,DCLK port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,DCLK pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,DCLK port select register" "0,1,2,3"
|
|
line.long 0x8 "FRC_DFRAMEROUTE,DFRAME port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,DFRAME pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,DFRAME port select register" "0,1,2,3"
|
|
line.long 0xC "FRC_DOUTROUTE,DOUT port/pin select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PIN,DOUT pin select register"
|
|
bitfld.long 0xC 0.--1. "PORT,DOUT port select register" "0,1,2,3"
|
|
group.long 0x490++0xB
|
|
line.long 0x0 "I2C0_ROUTEEN,I2C0 pin enable"
|
|
bitfld.long 0x0 1. "SDAPEN,SDA pin enable control bit" "0,1"
|
|
bitfld.long 0x0 0. "SCLPEN,SCL pin enable control bit" "0,1"
|
|
line.long 0x4 "I2C0_SCLROUTE,SCL port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,SCL pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,SCL port select register" "0,1,2,3"
|
|
line.long 0x8 "I2C0_SDAROUTE,SDA port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,SDA pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,SDA port select register" "0,1,2,3"
|
|
group.long 0x4A0++0xB
|
|
line.long 0x0 "I2C1_ROUTEEN,I2C1 pin enable"
|
|
bitfld.long 0x0 1. "SDAPEN,SDA pin enable control bit" "0,1"
|
|
bitfld.long 0x0 0. "SCLPEN,SCL pin enable control bit" "0,1"
|
|
line.long 0x4 "I2C1_SCLROUTE,SCL port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,SCL pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,SCL port select register" "0,1,2,3"
|
|
line.long 0x8 "I2C1_SDAROUTE,SDA port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,SDA pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,SDA port select register" "0,1,2,3"
|
|
group.long 0x4B0++0xB
|
|
line.long 0x0 "LETIMER0_ROUTEEN,LETIMER pin enable"
|
|
bitfld.long 0x0 1. "OUT1PEN,OUT1 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 0. "OUT0PEN,OUT0 pin enable control bit" "0,1"
|
|
line.long 0x4 "LETIMER0_OUT0ROUTE,OUT0 port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,OUT0 pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,OUT0 port select register" "0,1,2,3"
|
|
line.long 0x8 "LETIMER0_OUT1ROUTE,OUT1 port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,OUT1 pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,OUT1 port select register" "0,1,2,3"
|
|
group.long 0x4C0++0x13
|
|
line.long 0x0 "EUART0_ROUTEEN,EUART pin enable"
|
|
bitfld.long 0x0 1. "TXPEN,TX pin enable control bit" "0,1"
|
|
bitfld.long 0x0 0. "RTSPEN,RTS pin enable control bit" "0,1"
|
|
line.long 0x4 "EUART0_CTSROUTE,CTS port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,CTS pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,CTS port select register" "0,1,2,3"
|
|
line.long 0x8 "EUART0_RTSROUTE,RTS port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,RTS pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,RTS port select register" "0,1,2,3"
|
|
line.long 0xC "EUART0_RXROUTE,RX port/pin select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PIN,RX pin select register"
|
|
bitfld.long 0xC 0.--1. "PORT,RX port select register" "0,1,2,3"
|
|
line.long 0x10 "EUART0_TXROUTE,TX port/pin select"
|
|
hexmask.long.byte 0x10 16.--19. 1. "PIN,TX pin select register"
|
|
bitfld.long 0x10 0.--1. "PORT,TX port select register" "0,1,2,3"
|
|
group.long 0x4D8++0x43
|
|
line.long 0x0 "MODEM_ROUTEEN,MODEM pin enable"
|
|
bitfld.long 0x0 14. "DOUTPEN,DOUT pin enable control bit" "0,1"
|
|
bitfld.long 0x0 13. "DCLKPEN,DCLK pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "ANTTRIGSTOPPEN,ANTTRIGSTOP pin enable control bit" "0,1"
|
|
bitfld.long 0x0 11. "ANTTRIGPEN,ANTTRIG pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "ANTSWUSPEN,ANTSWUS pin enable control bit" "0,1"
|
|
bitfld.long 0x0 9. "ANTSWENPEN,ANTSWEN pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "ANTRR5PEN,ANTRR5 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 7. "ANTRR4PEN,ANTRR4 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "ANTRR3PEN,ANTRR3 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 5. "ANTRR2PEN,ANTRR2 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "ANTRR1PEN,ANTRR1 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 3. "ANTRR0PEN,ANTRR0 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "ANTROLLOVERPEN,ANTROLLOVER pin enable control bit" "0,1"
|
|
bitfld.long 0x0 1. "ANT1PEN,ANT1 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "ANT0PEN,ANT0 pin enable control bit" "0,1"
|
|
line.long 0x4 "MODEM_ANT0ROUTE,ANT0 port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,ANT0 pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,ANT0 port select register" "0,1,2,3"
|
|
line.long 0x8 "MODEM_ANT1ROUTE,ANT1 port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,ANT1 pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,ANT1 port select register" "0,1,2,3"
|
|
line.long 0xC "MODEM_ANTROLLOVERROUTE,ANTROLLOVER port/pin select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PIN,ANTROLLOVER pin select register"
|
|
bitfld.long 0xC 0.--1. "PORT,ANTROLLOVER port select register" "0,1,2,3"
|
|
line.long 0x10 "MODEM_ANTRR0ROUTE,ANTRR0 port/pin select"
|
|
hexmask.long.byte 0x10 16.--19. 1. "PIN,ANTRR0 pin select register"
|
|
bitfld.long 0x10 0.--1. "PORT,ANTRR0 port select register" "0,1,2,3"
|
|
line.long 0x14 "MODEM_ANTRR1ROUTE,ANTRR1 port/pin select"
|
|
hexmask.long.byte 0x14 16.--19. 1. "PIN,ANTRR1 pin select register"
|
|
bitfld.long 0x14 0.--1. "PORT,ANTRR1 port select register" "0,1,2,3"
|
|
line.long 0x18 "MODEM_ANTRR2ROUTE,ANTRR2 port/pin select"
|
|
hexmask.long.byte 0x18 16.--19. 1. "PIN,ANTRR2 pin select register"
|
|
bitfld.long 0x18 0.--1. "PORT,ANTRR2 port select register" "0,1,2,3"
|
|
line.long 0x1C "MODEM_ANTRR3ROUTE,ANTRR3 port/pin select"
|
|
hexmask.long.byte 0x1C 16.--19. 1. "PIN,ANTRR3 pin select register"
|
|
bitfld.long 0x1C 0.--1. "PORT,ANTRR3 port select register" "0,1,2,3"
|
|
line.long 0x20 "MODEM_ANTRR4ROUTE,ANTRR4 port/pin select"
|
|
hexmask.long.byte 0x20 16.--19. 1. "PIN,ANTRR4 pin select register"
|
|
bitfld.long 0x20 0.--1. "PORT,ANTRR4 port select register" "0,1,2,3"
|
|
line.long 0x24 "MODEM_ANTRR5ROUTE,ANTRR5 port/pin select"
|
|
hexmask.long.byte 0x24 16.--19. 1. "PIN,ANTRR5 pin select register"
|
|
bitfld.long 0x24 0.--1. "PORT,ANTRR5 port select register" "0,1,2,3"
|
|
line.long 0x28 "MODEM_ANTSWENROUTE,ANTSWEN port/pin select"
|
|
hexmask.long.byte 0x28 16.--19. 1. "PIN,ANTSWEN pin select register"
|
|
bitfld.long 0x28 0.--1. "PORT,ANTSWEN port select register" "0,1,2,3"
|
|
line.long 0x2C "MODEM_ANTSWUSROUTE,ANTSWUS port/pin select"
|
|
hexmask.long.byte 0x2C 16.--19. 1. "PIN,ANTSWUS pin select register"
|
|
bitfld.long 0x2C 0.--1. "PORT,ANTSWUS port select register" "0,1,2,3"
|
|
line.long 0x30 "MODEM_ANTTRIGROUTE,ANTTRIG port/pin select"
|
|
hexmask.long.byte 0x30 16.--19. 1. "PIN,ANTTRIG pin select register"
|
|
bitfld.long 0x30 0.--1. "PORT,ANTTRIG port select register" "0,1,2,3"
|
|
line.long 0x34 "MODEM_ANTTRIGSTOPROUTE,ANTTRIGSTOP port/pin select"
|
|
hexmask.long.byte 0x34 16.--19. 1. "PIN,ANTTRIGSTOP pin select register"
|
|
bitfld.long 0x34 0.--1. "PORT,ANTTRIGSTOP port select register" "0,1,2,3"
|
|
line.long 0x38 "MODEM_DCLKROUTE,DCLK port/pin select"
|
|
hexmask.long.byte 0x38 16.--19. 1. "PIN,DCLK pin select register"
|
|
bitfld.long 0x38 0.--1. "PORT,DCLK port select register" "0,1,2,3"
|
|
line.long 0x3C "MODEM_DINROUTE,DIN port/pin select"
|
|
hexmask.long.byte 0x3C 16.--19. 1. "PIN,DIN pin select register"
|
|
bitfld.long 0x3C 0.--1. "PORT,DIN port select register" "0,1,2,3"
|
|
line.long 0x40 "MODEM_DOUTROUTE,DOUT port/pin select"
|
|
hexmask.long.byte 0x40 16.--19. 1. "PIN,DOUT pin select register"
|
|
bitfld.long 0x40 0.--1. "PORT,DOUT port select register" "0,1,2,3"
|
|
group.long 0x520++0xF
|
|
line.long 0x0 "PDM_ROUTEEN,PDM pin enable"
|
|
bitfld.long 0x0 0. "CLKPEN,CLK pin enable control bit" "0,1"
|
|
line.long 0x4 "PDM_CLKROUTE,CLK port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,CLK pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,CLK port select register" "0,1,2,3"
|
|
line.long 0x8 "PDM_DAT0ROUTE,DAT0 port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,DAT0 pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,DAT0 port select register" "0,1,2,3"
|
|
line.long 0xC "PDM_DAT1ROUTE,DAT1 port/pin select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PIN,DAT1 pin select register"
|
|
bitfld.long 0xC 0.--1. "PORT,DAT1 port select register" "0,1,2,3"
|
|
group.long 0x534++0x43
|
|
line.long 0x0 "PRS0_ROUTEEN,PRS0 pin enable"
|
|
bitfld.long 0x0 15. "SYNCH3PEN,SYNCH3 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 14. "SYNCH2PEN,SYNCH2 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "SYNCH1PEN,SYNCH1 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 12. "SYNCH0PEN,SYNCH0 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "ASYNCH11PEN,ASYNCH11 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 10. "ASYNCH10PEN,ASYNCH10 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ASYNCH9PEN,ASYNCH9 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 8. "ASYNCH8PEN,ASYNCH8 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "ASYNCH7PEN,ASYNCH7 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 6. "ASYNCH6PEN,ASYNCH6 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ASYNCH5PEN,ASYNCH5 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 4. "ASYNCH4PEN,ASYNCH4 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ASYNCH3PEN,ASYNCH3 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 2. "ASYNCH2PEN,ASYNCH2 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ASYNCH1PEN,ASYNCH1 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 0. "ASYNCH0PEN,ASYNCH0 pin enable control bit" "0,1"
|
|
line.long 0x4 "PRS0_ASYNCH0ROUTE,ASYNCH0 port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,ASYNCH0 pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,ASYNCH0 port select register" "0,1,2,3"
|
|
line.long 0x8 "PRS0_ASYNCH1ROUTE,ASYNCH1 port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,ASYNCH1 pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,ASYNCH1 port select register" "0,1,2,3"
|
|
line.long 0xC "PRS0_ASYNCH2ROUTE,ASYNCH2 port/pin select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PIN,ASYNCH2 pin select register"
|
|
bitfld.long 0xC 0.--1. "PORT,ASYNCH2 port select register" "0,1,2,3"
|
|
line.long 0x10 "PRS0_ASYNCH3ROUTE,ASYNCH3 port/pin select"
|
|
hexmask.long.byte 0x10 16.--19. 1. "PIN,ASYNCH3 pin select register"
|
|
bitfld.long 0x10 0.--1. "PORT,ASYNCH3 port select register" "0,1,2,3"
|
|
line.long 0x14 "PRS0_ASYNCH4ROUTE,ASYNCH4 port/pin select"
|
|
hexmask.long.byte 0x14 16.--19. 1. "PIN,ASYNCH4 pin select register"
|
|
bitfld.long 0x14 0.--1. "PORT,ASYNCH4 port select register" "0,1,2,3"
|
|
line.long 0x18 "PRS0_ASYNCH5ROUTE,ASYNCH5 port/pin select"
|
|
hexmask.long.byte 0x18 16.--19. 1. "PIN,ASYNCH5 pin select register"
|
|
bitfld.long 0x18 0.--1. "PORT,ASYNCH5 port select register" "0,1,2,3"
|
|
line.long 0x1C "PRS0_ASYNCH6ROUTE,ASYNCH6 port/pin select"
|
|
hexmask.long.byte 0x1C 16.--19. 1. "PIN,ASYNCH6 pin select register"
|
|
bitfld.long 0x1C 0.--1. "PORT,ASYNCH6 port select register" "0,1,2,3"
|
|
line.long 0x20 "PRS0_ASYNCH7ROUTE,ASYNCH7 port/pin select"
|
|
hexmask.long.byte 0x20 16.--19. 1. "PIN,ASYNCH7 pin select register"
|
|
bitfld.long 0x20 0.--1. "PORT,ASYNCH7 port select register" "0,1,2,3"
|
|
line.long 0x24 "PRS0_ASYNCH8ROUTE,ASYNCH8 port/pin select"
|
|
hexmask.long.byte 0x24 16.--19. 1. "PIN,ASYNCH8 pin select register"
|
|
bitfld.long 0x24 0.--1. "PORT,ASYNCH8 port select register" "0,1,2,3"
|
|
line.long 0x28 "PRS0_ASYNCH9ROUTE,ASYNCH9 port/pin select"
|
|
hexmask.long.byte 0x28 16.--19. 1. "PIN,ASYNCH9 pin select register"
|
|
bitfld.long 0x28 0.--1. "PORT,ASYNCH9 port select register" "0,1,2,3"
|
|
line.long 0x2C "PRS0_ASYNCH10ROUTE,ASYNCH10 port/pin select"
|
|
hexmask.long.byte 0x2C 16.--19. 1. "PIN,ASYNCH10 pin select register"
|
|
bitfld.long 0x2C 0.--1. "PORT,ASYNCH10 port select register" "0,1,2,3"
|
|
line.long 0x30 "PRS0_ASYNCH11ROUTE,ASYNCH11 port/pin select"
|
|
hexmask.long.byte 0x30 16.--19. 1. "PIN,ASYNCH11 pin select register"
|
|
bitfld.long 0x30 0.--1. "PORT,ASYNCH11 port select register" "0,1,2,3"
|
|
line.long 0x34 "PRS0_SYNCH0ROUTE,SYNCH0 port/pin select"
|
|
hexmask.long.byte 0x34 16.--19. 1. "PIN,SYNCH0 pin select register"
|
|
bitfld.long 0x34 0.--1. "PORT,SYNCH0 port select register" "0,1,2,3"
|
|
line.long 0x38 "PRS0_SYNCH1ROUTE,SYNCH1 port/pin select"
|
|
hexmask.long.byte 0x38 16.--19. 1. "PIN,SYNCH1 pin select register"
|
|
bitfld.long 0x38 0.--1. "PORT,SYNCH1 port select register" "0,1,2,3"
|
|
line.long 0x3C "PRS0_SYNCH2ROUTE,SYNCH2 port/pin select"
|
|
hexmask.long.byte 0x3C 16.--19. 1. "PIN,SYNCH2 pin select register"
|
|
bitfld.long 0x3C 0.--1. "PORT,SYNCH2 port select register" "0,1,2,3"
|
|
line.long 0x40 "PRS0_SYNCH3ROUTE,SYNCH3 port/pin select"
|
|
hexmask.long.byte 0x40 16.--19. 1. "PIN,SYNCH3 pin select register"
|
|
bitfld.long 0x40 0.--1. "PORT,SYNCH3 port select register" "0,1,2,3"
|
|
group.long 0x57C++0x1B
|
|
line.long 0x0 "TIMER0_ROUTEEN,TIMER0 pin enable"
|
|
bitfld.long 0x0 5. "CCC2PEN,CDTI2 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 4. "CCC1PEN,CDTI1 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CCC0PEN,CDTI0 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 2. "CC2PEN,CC2 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CC1PEN,CC1 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 0. "CC0PEN,CC0 pin enable control bit" "0,1"
|
|
line.long 0x4 "TIMER0_CC0ROUTE,CC0 port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,CC0 pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,CC0 port select register" "0,1,2,3"
|
|
line.long 0x8 "TIMER0_CC1ROUTE,CC1 port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,CC1 pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,CC1 port select register" "0,1,2,3"
|
|
line.long 0xC "TIMER0_CC2ROUTE,CC2 port/pin select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PIN,CC2 pin select register"
|
|
bitfld.long 0xC 0.--1. "PORT,CC2 port select register" "0,1,2,3"
|
|
line.long 0x10 "TIMER0_CDTI0ROUTE,CDTI0 port/pin select"
|
|
hexmask.long.byte 0x10 16.--19. 1. "PIN,CDTI0 pin select register"
|
|
bitfld.long 0x10 0.--1. "PORT,CDTI0 port select register" "0,1,2,3"
|
|
line.long 0x14 "TIMER0_CDTI1ROUTE,CDTI1 port/pin select"
|
|
hexmask.long.byte 0x14 16.--19. 1. "PIN,CDTI1 pin select register"
|
|
bitfld.long 0x14 0.--1. "PORT,CDTI1 port select register" "0,1,2,3"
|
|
line.long 0x18 "TIMER0_CDTI2ROUTE,CDTI2 port/pin select"
|
|
hexmask.long.byte 0x18 16.--19. 1. "PIN,CDTI2 pin select register"
|
|
bitfld.long 0x18 0.--1. "PORT,CDTI2 port select register" "0,1,2,3"
|
|
group.long 0x59C++0x1B
|
|
line.long 0x0 "TIMER1_ROUTEEN,TIMER1 pin enable"
|
|
bitfld.long 0x0 5. "CCC2PEN,CDTI2 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 4. "CCC1PEN,CDTI1 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CCC0PEN,CDTI0 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 2. "CC2PEN,CC2 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CC1PEN,CC1 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 0. "CC0PEN,CC0 pin enable control bit" "0,1"
|
|
line.long 0x4 "TIMER1_CC0ROUTE,CC0 port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,CC0 pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,CC0 port select register" "0,1,2,3"
|
|
line.long 0x8 "TIMER1_CC1ROUTE,CC1 port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,CC1 pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,CC1 port select register" "0,1,2,3"
|
|
line.long 0xC "TIMER1_CC2ROUTE,CC2 port/pin select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PIN,CC2 pin select register"
|
|
bitfld.long 0xC 0.--1. "PORT,CC2 port select register" "0,1,2,3"
|
|
line.long 0x10 "TIMER1_CDTI0ROUTE,CDTI0 port/pin select"
|
|
hexmask.long.byte 0x10 16.--19. 1. "PIN,CDTI0 pin select register"
|
|
bitfld.long 0x10 0.--1. "PORT,CDTI0 port select register" "0,1,2,3"
|
|
line.long 0x14 "TIMER1_CDTI1ROUTE,CDTI1 port/pin select"
|
|
hexmask.long.byte 0x14 16.--19. 1. "PIN,CDTI1 pin select register"
|
|
bitfld.long 0x14 0.--1. "PORT,CDTI1 port select register" "0,1,2,3"
|
|
line.long 0x18 "TIMER1_CDTI2ROUTE,CDTI2 port/pin select"
|
|
hexmask.long.byte 0x18 16.--19. 1. "PIN,CDTI2 pin select register"
|
|
bitfld.long 0x18 0.--1. "PORT,CDTI2 port select register" "0,1,2,3"
|
|
group.long 0x5BC++0x1B
|
|
line.long 0x0 "TIMER2_ROUTEEN,TIMER2 pin enable"
|
|
bitfld.long 0x0 5. "CCC2PEN,CDTI2 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 4. "CCC1PEN,CDTI1 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CCC0PEN,CDTI0 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 2. "CC2PEN,CC2 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CC1PEN,CC1 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 0. "CC0PEN,CC0 pin enable control bit" "0,1"
|
|
line.long 0x4 "TIMER2_CC0ROUTE,CC0 port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,CC0 pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,CC0 port select register" "0,1,2,3"
|
|
line.long 0x8 "TIMER2_CC1ROUTE,CC1 port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,CC1 pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,CC1 port select register" "0,1,2,3"
|
|
line.long 0xC "TIMER2_CC2ROUTE,CC2 port/pin select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PIN,CC2 pin select register"
|
|
bitfld.long 0xC 0.--1. "PORT,CC2 port select register" "0,1,2,3"
|
|
line.long 0x10 "TIMER2_CDTI0ROUTE,CDTI0 port/pin select"
|
|
hexmask.long.byte 0x10 16.--19. 1. "PIN,CDTI0 pin select register"
|
|
bitfld.long 0x10 0.--1. "PORT,CDTI0 port select register" "0,1,2,3"
|
|
line.long 0x14 "TIMER2_CDTI1ROUTE,CDTI1 port/pin select"
|
|
hexmask.long.byte 0x14 16.--19. 1. "PIN,CDTI1 pin select register"
|
|
bitfld.long 0x14 0.--1. "PORT,CDTI1 port select register" "0,1,2,3"
|
|
line.long 0x18 "TIMER2_CDTI2ROUTE,CDTI2 port/pin select"
|
|
hexmask.long.byte 0x18 16.--19. 1. "PIN,CDTI2 pin select register"
|
|
bitfld.long 0x18 0.--1. "PORT,CDTI2 port select register" "0,1,2,3"
|
|
group.long 0x5DC++0x1B
|
|
line.long 0x0 "TIMER3_ROUTEEN,TIMER3 pin enable"
|
|
bitfld.long 0x0 5. "CCC2PEN,CDTI2 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 4. "CCC1PEN,CDTI1 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CCC0PEN,CDTI0 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 2. "CC2PEN,CC2 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CC1PEN,CC1 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 0. "CC0PEN,CC0 pin enable control bit" "0,1"
|
|
line.long 0x4 "TIMER3_CC0ROUTE,CC0 port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,CC0 pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,CC0 port select register" "0,1,2,3"
|
|
line.long 0x8 "TIMER3_CC1ROUTE,CC1 port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,CC1 pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,CC1 port select register" "0,1,2,3"
|
|
line.long 0xC "TIMER3_CC2ROUTE,CC2 port/pin select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PIN,CC2 pin select register"
|
|
bitfld.long 0xC 0.--1. "PORT,CC2 port select register" "0,1,2,3"
|
|
line.long 0x10 "TIMER3_CDTI0ROUTE,CDTI0 port/pin select"
|
|
hexmask.long.byte 0x10 16.--19. 1. "PIN,CDTI0 pin select register"
|
|
bitfld.long 0x10 0.--1. "PORT,CDTI0 port select register" "0,1,2,3"
|
|
line.long 0x14 "TIMER3_CDTI1ROUTE,CDTI1 port/pin select"
|
|
hexmask.long.byte 0x14 16.--19. 1. "PIN,CDTI1 pin select register"
|
|
bitfld.long 0x14 0.--1. "PORT,CDTI1 port select register" "0,1,2,3"
|
|
line.long 0x18 "TIMER3_CDTI2ROUTE,CDTI2 port/pin select"
|
|
hexmask.long.byte 0x18 16.--19. 1. "PIN,CDTI2 pin select register"
|
|
bitfld.long 0x18 0.--1. "PORT,CDTI2 port select register" "0,1,2,3"
|
|
group.long 0x5FC++0x1B
|
|
line.long 0x0 "TIMER4_ROUTEEN,TIMER4 pin enable"
|
|
bitfld.long 0x0 5. "CCC2PEN,CDTI2 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 4. "CCC1PEN,CDTI1 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CCC0PEN,CDTI0 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 2. "CC2PEN,CC2 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CC1PEN,CC1 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 0. "CC0PEN,CC0 pin enable control bit" "0,1"
|
|
line.long 0x4 "TIMER4_CC0ROUTE,CC0 port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,CC0 pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,CC0 port select register" "0,1,2,3"
|
|
line.long 0x8 "TIMER4_CC1ROUTE,CC1 port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,CC1 pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,CC1 port select register" "0,1,2,3"
|
|
line.long 0xC "TIMER4_CC2ROUTE,CC2 port/pin select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PIN,CC2 pin select register"
|
|
bitfld.long 0xC 0.--1. "PORT,CC2 port select register" "0,1,2,3"
|
|
line.long 0x10 "TIMER4_CDTI0ROUTE,CDTI0 port/pin select"
|
|
hexmask.long.byte 0x10 16.--19. 1. "PIN,CDTI0 pin select register"
|
|
bitfld.long 0x10 0.--1. "PORT,CDTI0 port select register" "0,1,2,3"
|
|
line.long 0x14 "TIMER4_CDTI1ROUTE,CDTI1 port/pin select"
|
|
hexmask.long.byte 0x14 16.--19. 1. "PIN,CDTI1 pin select register"
|
|
bitfld.long 0x14 0.--1. "PORT,CDTI1 port select register" "0,1,2,3"
|
|
line.long 0x18 "TIMER4_CDTI2ROUTE,CDTI2 port/pin select"
|
|
hexmask.long.byte 0x18 16.--19. 1. "PIN,CDTI2 pin select register"
|
|
bitfld.long 0x18 0.--1. "PORT,CDTI2 port select register" "0,1,2,3"
|
|
group.long 0x61C++0x1B
|
|
line.long 0x0 "USART0_ROUTEEN,USART0 pin enable"
|
|
bitfld.long 0x0 4. "TXPEN,TX pin enable control bit" "0,1"
|
|
bitfld.long 0x0 3. "CLKPEN,SCLK pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXPEN,RX pin enable control bit" "0,1"
|
|
bitfld.long 0x0 1. "RTSPEN,RTS pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "CSPEN,CS pin enable control bit" "0,1"
|
|
line.long 0x4 "USART0_CSROUTE,CS port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,CS pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,CS port select register" "0,1,2,3"
|
|
line.long 0x8 "USART0_CTSROUTE,CTS port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,CTS pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,CTS port select register" "0,1,2,3"
|
|
line.long 0xC "USART0_RTSROUTE,RTS port/pin select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PIN,RTS pin select register"
|
|
bitfld.long 0xC 0.--1. "PORT,RTS port select register" "0,1,2,3"
|
|
line.long 0x10 "USART0_RXROUTE,RX port/pin select"
|
|
hexmask.long.byte 0x10 16.--19. 1. "PIN,RX pin select register"
|
|
bitfld.long 0x10 0.--1. "PORT,RX port select register" "0,1,2,3"
|
|
line.long 0x14 "USART0_CLKROUTE,SCLK port/pin select"
|
|
hexmask.long.byte 0x14 16.--19. 1. "PIN,SCLK pin select register"
|
|
bitfld.long 0x14 0.--1. "PORT,SCLK port select register" "0,1,2,3"
|
|
line.long 0x18 "USART0_TXROUTE,TX port/pin select"
|
|
hexmask.long.byte 0x18 16.--19. 1. "PIN,TX pin select register"
|
|
bitfld.long 0x18 0.--1. "PORT,TX port select register" "0,1,2,3"
|
|
group.long 0x63C++0x1B
|
|
line.long 0x0 "USART1_ROUTEEN,USART1 pin enable"
|
|
bitfld.long 0x0 4. "TXPEN,TX pin enable control bit" "0,1"
|
|
bitfld.long 0x0 3. "CLKPEN,SCLK pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXPEN,RX pin enable control bit" "0,1"
|
|
bitfld.long 0x0 1. "RTSPEN,RTS pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "CSPEN,CS pin enable control bit" "0,1"
|
|
line.long 0x4 "USART1_CSROUTE,CS port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,CS pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,CS port select register" "0,1,2,3"
|
|
line.long 0x8 "USART1_CTSROUTE,CTS port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,CTS pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,CTS port select register" "0,1,2,3"
|
|
line.long 0xC "USART1_RTSROUTE,RTS port/pin select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PIN,RTS pin select register"
|
|
bitfld.long 0xC 0.--1. "PORT,RTS port select register" "0,1,2,3"
|
|
line.long 0x10 "USART1_RXROUTE,RX port/pin select"
|
|
hexmask.long.byte 0x10 16.--19. 1. "PIN,RX pin select register"
|
|
bitfld.long 0x10 0.--1. "PORT,RX port select register" "0,1,2,3"
|
|
line.long 0x14 "USART1_CLKROUTE,SCLK port/pin select"
|
|
hexmask.long.byte 0x14 16.--19. 1. "PIN,SCLK pin select register"
|
|
bitfld.long 0x14 0.--1. "PORT,SCLK port select register" "0,1,2,3"
|
|
line.long 0x18 "USART1_TXROUTE,TX port/pin select"
|
|
hexmask.long.byte 0x18 16.--19. 1. "PIN,TX pin select register"
|
|
bitfld.long 0x18 0.--1. "PORT,TX port select register" "0,1,2,3"
|
|
tree.end
|
|
tree "GPIO_S"
|
|
base ad:0x4003C000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "PORTA_CTRL,Port control"
|
|
bitfld.long 0x0 28. "DINDISALT,Data In Disable Alt" "0,1"
|
|
bitfld.long 0x0 20.--22. "SLEWRATEALT,Slew Rate Alt" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12. "DINDIS,Data In Disable" "0,1"
|
|
bitfld.long 0x0 4.--6. "SLEWRATE,Slew Rate" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "PORTA_MODEL,mode low"
|
|
hexmask.long.byte 0x4 28.--31. 1. "MODE7,MODE n"
|
|
hexmask.long.byte 0x4 24.--27. 1. "MODE6,MODE n"
|
|
newline
|
|
hexmask.long.byte 0x4 20.--23. 1. "MODE5,MODE n"
|
|
hexmask.long.byte 0x4 16.--19. 1. "MODE4,MODE n"
|
|
newline
|
|
hexmask.long.byte 0x4 12.--15. 1. "MODE3,MODE n"
|
|
hexmask.long.byte 0x4 8.--11. 1. "MODE2,MODE n"
|
|
newline
|
|
hexmask.long.byte 0x4 4.--7. 1. "MODE1,MODE n"
|
|
hexmask.long.byte 0x4 0.--3. 1. "MODE0,MODE n"
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "PORTA_MODEH,mode high"
|
|
hexmask.long.byte 0x0 0.--3. 1. "MODE0,MODE n"
|
|
line.long 0x4 "PORTA_DOUT,data out"
|
|
hexmask.long.word 0x4 0.--8. 1. "DOUT,Data output"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "PORTA_DIN,data in"
|
|
hexmask.long.word 0x0 0.--8. 1. "DIN,Data input"
|
|
group.long 0x30++0x7
|
|
line.long 0x0 "PORTB_CTRL,Port control"
|
|
bitfld.long 0x0 28. "DINDISALT,Data In Disable Alt" "0,1"
|
|
bitfld.long 0x0 20.--22. "SLEWRATEALT,Slew Rate Alt" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12. "DINDIS,Data In Disable" "0,1"
|
|
bitfld.long 0x0 4.--6. "SLEWRATE,Slew Rate" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "PORTB_MODEL,mode low"
|
|
hexmask.long.byte 0x4 16.--19. 1. "MODE4,MODE n"
|
|
hexmask.long.byte 0x4 12.--15. 1. "MODE3,MODE n"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--11. 1. "MODE2,MODE n"
|
|
hexmask.long.byte 0x4 4.--7. 1. "MODE1,MODE n"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--3. 1. "MODE0,MODE n"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PORTB_DOUT,data out"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DOUT,Data output"
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x0 "PORTB_DIN,data in"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DIN,Data input"
|
|
group.long 0x60++0x7
|
|
line.long 0x0 "PORTC_CTRL,Port control"
|
|
bitfld.long 0x0 28. "DINDISALT,Data In Disable Alt" "0,1"
|
|
bitfld.long 0x0 20.--22. "SLEWRATEALT,Slew Rate Alt" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12. "DINDIS,Data In Disable" "0,1"
|
|
bitfld.long 0x0 4.--6. "SLEWRATE,Slew Rate" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "PORTC_MODEL,mode low"
|
|
hexmask.long.byte 0x4 28.--31. 1. "MODE7,MODE n"
|
|
hexmask.long.byte 0x4 24.--27. 1. "MODE6,MODE n"
|
|
newline
|
|
hexmask.long.byte 0x4 20.--23. 1. "MODE5,MODE n"
|
|
hexmask.long.byte 0x4 16.--19. 1. "MODE4,MODE n"
|
|
newline
|
|
hexmask.long.byte 0x4 12.--15. 1. "MODE3,MODE n"
|
|
hexmask.long.byte 0x4 8.--11. 1. "MODE2,MODE n"
|
|
newline
|
|
hexmask.long.byte 0x4 4.--7. 1. "MODE1,MODE n"
|
|
hexmask.long.byte 0x4 0.--3. 1. "MODE0,MODE n"
|
|
group.long 0x70++0x3
|
|
line.long 0x0 "PORTC_DOUT,data out"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DOUT,Data output"
|
|
rgroup.long 0x74++0x3
|
|
line.long 0x0 "PORTC_DIN,data in"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DIN,Data input"
|
|
group.long 0x90++0x7
|
|
line.long 0x0 "PORTD_CTRL,Port control"
|
|
bitfld.long 0x0 28. "DINDISALT,Data In Disable Alt" "0,1"
|
|
bitfld.long 0x0 20.--22. "SLEWRATEALT,Slew Rate Alt" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12. "DINDIS,Data In Disable" "0,1"
|
|
bitfld.long 0x0 4.--6. "SLEWRATE,Slew Rate" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "PORTD_MODEL,mode low"
|
|
hexmask.long.byte 0x4 12.--15. 1. "MODE3,MODE n"
|
|
hexmask.long.byte 0x4 8.--11. 1. "MODE2,MODE n"
|
|
newline
|
|
hexmask.long.byte 0x4 4.--7. 1. "MODE1,MODE n"
|
|
hexmask.long.byte 0x4 0.--3. 1. "MODE0,MODE n"
|
|
group.long 0xA0++0x3
|
|
line.long 0x0 "PORTD_DOUT,data out"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DOUT,Data output"
|
|
rgroup.long 0xA4++0x3
|
|
line.long 0x0 "PORTD_DIN,data in"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DIN,Data input"
|
|
wgroup.long 0x300++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Configuration Lock Key"
|
|
rgroup.long 0x310++0x3
|
|
line.long 0x0 "GPIOLOCKSTATUS,No Description"
|
|
bitfld.long 0x0 0. "LOCK,GPIO LOCK status" "0: Registers are unlocked,1: Registers are locked"
|
|
group.long 0x320++0xB
|
|
line.long 0x0 "ABUSALLOC,A Bus allocation"
|
|
hexmask.long.byte 0x0 24.--27. 1. "AODD1,A Bus Odd 1"
|
|
hexmask.long.byte 0x0 16.--19. 1. "AODD0,A Bus Odd 0"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "AEVEN1,A Bus Even 1"
|
|
hexmask.long.byte 0x0 0.--3. 1. "AEVEN0,A Bus Even 0"
|
|
line.long 0x4 "BBUSALLOC,B Bus allocation"
|
|
hexmask.long.byte 0x4 24.--27. 1. "BODD1,B Bus Odd 1"
|
|
hexmask.long.byte 0x4 16.--19. 1. "BODD0,B Bus Odd 0"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--11. 1. "BEVEN1,B Bus Even 1"
|
|
hexmask.long.byte 0x4 0.--3. 1. "BEVEN0,B Bus Even 0"
|
|
line.long 0x8 "CDBUSALLOC,CD Bus allocation"
|
|
hexmask.long.byte 0x8 24.--27. 1. "CDODD1,CD Bus Odd 1"
|
|
hexmask.long.byte 0x8 16.--19. 1. "CDODD0,CD Bus Odd 0"
|
|
newline
|
|
hexmask.long.byte 0x8 8.--11. 1. "CDEVEN1,CD Bus Even 1"
|
|
hexmask.long.byte 0x8 0.--3. 1. "CDEVEN0,CD Bus Even 0"
|
|
group.long 0x400++0x17
|
|
line.long 0x0 "EXTIPSELL,External Interrupt Port Select Low"
|
|
bitfld.long 0x0 28.--29. "EXTIPSEL7,External Interrupt Port Select" "0: Port A group selected,1: Port B group selected,2: Port C group selected,3: Port D group selected"
|
|
bitfld.long 0x0 24.--25. "EXTIPSEL6,External Interrupt Port Select" "0: Port A group selected,1: Port B group selected,2: Port C group selected,3: Port D group selected"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "EXTIPSEL5,External Interrupt Port Select" "0: Port A group selected,1: Port B group selected,2: Port C group selected,3: Port D group selected"
|
|
bitfld.long 0x0 16.--17. "EXTIPSEL4,External Interrupt Port Select" "0: Port A group selected,1: Port B group selected,2: Port C group selected,3: Port D group selected"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "EXTIPSEL3,External Interrupt Port Select" "0: Port A group selected,1: Port B group selected,2: Port C group selected,3: Port D group selected"
|
|
bitfld.long 0x0 8.--9. "EXTIPSEL2,External Interrupt Port Select" "0: Port A group selected,1: Port B group selected,2: Port C group selected,3: Port D group selected"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "EXTIPSEL1,External Interrupt Port Select" "0: Port A group selected,1: Port B group selected,2: Port C group selected,3: Port D group selected"
|
|
bitfld.long 0x0 0.--1. "EXTIPSEL0,External Interrupt Port Select" "0: Port A group selected,1: Port B group selected,2: Port C group selected,3: Port D group selected"
|
|
line.long 0x4 "EXTIPSELH,External interrupt Port Select High"
|
|
bitfld.long 0x4 12.--13. "EXTIPSEL3,External Interrupt Port Select" "0: Port A group selected,1: Port B group selected,2: Port C group selected,3: Port D group selected"
|
|
bitfld.long 0x4 8.--9. "EXTIPSEL2,External Interrupt Port Select" "0: Port A group selected,1: Port B group selected,2: Port C group selected,3: Port D group selected"
|
|
newline
|
|
bitfld.long 0x4 4.--5. "EXTIPSEL1,External Interrupt Port Select" "0: Port A group selected,1: Port B group selected,2: Port C group selected,3: Port D group selected"
|
|
bitfld.long 0x4 0.--1. "EXTIPSEL0,External Interrupt Port Select" "0: Port A group selected,1: Port B group selected,2: Port C group selected,3: Port D group selected"
|
|
line.long 0x8 "EXTIPINSELL,External Interrupt Pin Select Low"
|
|
bitfld.long 0x8 28.--29. "EXTIPINSEL7,External Interrupt Pin select" "0: OFFSET=0,1: OFFSET=1,2: OFFSET=2,3: OFFSET=3"
|
|
bitfld.long 0x8 24.--25. "EXTIPINSEL6,External Interrupt Pin select" "0: OFFSET=0,1: OFFSET=1,2: OFFSET=2,3: OFFSET=3"
|
|
newline
|
|
bitfld.long 0x8 20.--21. "EXTIPINSEL5,External Interrupt Pin select" "0: OFFSET=0,1: OFFSET=1,2: OFFSET=2,3: OFFSET=3"
|
|
bitfld.long 0x8 16.--17. "EXTIPINSEL4,External Interrupt Pin select" "0: OFFSET=0,1: OFFSET=1,2: OFFSET=2,3: OFFSET=3"
|
|
newline
|
|
bitfld.long 0x8 12.--13. "EXTIPINSEL3,External Interrupt Pin select" "0: OFFSET=0,1: OFFSET=1,2: OFFSET=2,3: OFFSET=3"
|
|
bitfld.long 0x8 8.--9. "EXTIPINSEL2,External Interrupt Pin select" "0: OFFSET=0,1: OFFSET=1,2: OFFSET=2,3: OFFSET=3"
|
|
newline
|
|
bitfld.long 0x8 4.--5. "EXTIPINSEL1,External Interrupt Pin select" "0: OFFSET=0,1: OFFSET=1,2: OFFSET=2,3: OFFSET=3"
|
|
bitfld.long 0x8 0.--1. "EXTIPINSEL0,External Interrupt Pin select" "0: OFFSET=0,1: OFFSET=1,2: OFFSET=2,3: OFFSET=3"
|
|
line.long 0xC "EXTIPINSELH,External Interrupt Pin Select High"
|
|
bitfld.long 0xC 12.--13. "EXTIPINSEL3,External Interrupt Pin select" "0: OFFSET=8,1: OFFSET=9,2: OFFSET=10,3: OFFSET=11"
|
|
bitfld.long 0xC 8.--9. "EXTIPINSEL2,External Interrupt Pin select" "0: OFFSET=8,1: OFFSET=9,2: OFFSET=10,3: OFFSET=11"
|
|
newline
|
|
bitfld.long 0xC 4.--5. "EXTIPINSEL1,External Interrupt Pin select" "0: OFFSET=8,1: OFFSET=9,2: OFFSET=10,3: OFFSET=11"
|
|
bitfld.long 0xC 0.--1. "EXTIPINSEL0,External Interrupt Pin select" "0: OFFSET=8,1: OFFSET=9,2: OFFSET=10,3: OFFSET=11"
|
|
line.long 0x10 "EXTIRISE,External Interrupt Rising Edge Trigger"
|
|
hexmask.long.word 0x10 0.--11. 1. "EXTIRISE,EXT Int Rise"
|
|
line.long 0x14 "EXTIFALL,External Interrupt Falling Edge Trigger"
|
|
hexmask.long.word 0x14 0.--11. 1. "EXTIFALL,EXT Int FALL"
|
|
group.long 0x420++0x7
|
|
line.long 0x0 "IF,Interrupt Flag"
|
|
hexmask.long.word 0x0 16.--27. 1. "EM4WU,EM4 wake up"
|
|
bitfld.long 0x0 11. "EXTIF11,External Pin Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "EXTIF10,External Pin Flag" "0,1"
|
|
bitfld.long 0x0 9. "EXTIF9,External Pin Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "EXTIF8,External Pin Flag" "0,1"
|
|
bitfld.long 0x0 7. "EXTIF7,External Pin Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "EXTIF6,External Pin Flag" "0,1"
|
|
bitfld.long 0x0 5. "EXTIF5,External Pin Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "EXTIF4,External Pin Flag" "0,1"
|
|
bitfld.long 0x0 3. "EXTIF3,External Pin Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "EXTIF2,External Pin Flag" "0,1"
|
|
bitfld.long 0x0 1. "EXTIF1,External Pin Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EXTIF0,External Pin Flag" "0,1"
|
|
line.long 0x4 "IEN,Interrupt Enable"
|
|
bitfld.long 0x4 27. "EM4WUIEN11,EM4 Wake Up Interrupt En" "0,1"
|
|
bitfld.long 0x4 26. "EM4WUIEN10,EM4 Wake Up Interrupt En" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "EM4WUIEN9,EM4 Wake Up Interrupt En" "0,1"
|
|
bitfld.long 0x4 24. "EM4WUIEN8,EM4 Wake Up Interrupt En" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "EM4WUIEN7,EM4 Wake Up Interrupt En" "0,1"
|
|
bitfld.long 0x4 22. "EM4WUIEN6,EM4 Wake Up Interrupt En" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "EM4WUIEN5,EM4 Wake Up Interrupt En" "0,1"
|
|
bitfld.long 0x4 20. "EM4WUIEN4,EM4 Wake Up Interrupt En" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "EM4WUIEN3,EM4 Wake Up Interrupt En" "0,1"
|
|
bitfld.long 0x4 18. "EM4WUIEN2,EM4 Wake Up Interrupt En" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "EM4WUIEN1,EM4 Wake Up Interrupt En" "0,1"
|
|
bitfld.long 0x4 16. "EM4WUIEN0,EM4 Wake Up Interrupt En" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "EXTIEN11,External Pin Enable" "0,1"
|
|
bitfld.long 0x4 10. "EXTIEN10,External Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "EXTIEN9,External Pin Enable" "0,1"
|
|
bitfld.long 0x4 8. "EXTIEN8,External Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "EXTIEN7,External Pin Enable" "0,1"
|
|
bitfld.long 0x4 6. "EXTIEN6,External Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "EXTIEN5,External Pin Enable" "0,1"
|
|
bitfld.long 0x4 4. "EXTIEN4,External Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "EXTIEN3,External Pin Enable" "0,1"
|
|
bitfld.long 0x4 2. "EXTIEN2,External Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "EXTIEN1,External Pin Enable" "0,1"
|
|
bitfld.long 0x4 0. "EXTIEN0,External Pin Enable" "0,1"
|
|
group.long 0x42C++0x7
|
|
line.long 0x0 "EM4WUEN,No Description"
|
|
hexmask.long.word 0x0 16.--27. 1. "EM4WUEN,EM4 wake up enable"
|
|
line.long 0x4 "EM4WUPOL,No Description"
|
|
hexmask.long.word 0x4 16.--27. 1. "EM4WUPOL,EM4 Wake-Up Polarity"
|
|
group.long 0x440++0x7
|
|
line.long 0x0 "DBGROUTEPEN,No Description"
|
|
bitfld.long 0x0 3. "TDIPEN,JTAG Test Debug Input Pin Enable" "0,1"
|
|
bitfld.long 0x0 2. "TDOPEN,JTAG Test Debug Output Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "SWDIOTMSPEN,Route Location 0" "0,1"
|
|
bitfld.long 0x0 0. "SWCLKTCKPEN,Route Pin Enable" "0,1"
|
|
line.long 0x4 "TRACEROUTEPEN,No Description"
|
|
bitfld.long 0x4 2. "TRACEDATA0PEN,Trace Data0 Pin Enable" "0,1"
|
|
bitfld.long 0x4 1. "TRACECLKPEN,Trace Clk Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "SWVPEN,Serial Wire Viewer Output Pin Enable" "0,1"
|
|
group.long 0x450++0x13
|
|
line.long 0x0 "CMU_ROUTEEN,CMU pin enable"
|
|
bitfld.long 0x0 2. "CLKOUT2PEN,CLKOUT2 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 1. "CLKOUT1PEN,CLKOUT1 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "CLKOUT0PEN,CLKOUT0 pin enable control bit" "0,1"
|
|
line.long 0x4 "CMU_CLKIN0ROUTE,CLKIN0 port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,CLKIN0 pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,CLKIN0 port select register" "0,1,2,3"
|
|
line.long 0x8 "CMU_CLKOUT0ROUTE,CLKOUT0 port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,CLKOUT0 pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,CLKOUT0 port select register" "0,1,2,3"
|
|
line.long 0xC "CMU_CLKOUT1ROUTE,CLKOUT1 port/pin select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PIN,CLKOUT1 pin select register"
|
|
bitfld.long 0xC 0.--1. "PORT,CLKOUT1 port select register" "0,1,2,3"
|
|
line.long 0x10 "CMU_CLKOUT2ROUTE,CLKOUT2 port/pin select"
|
|
hexmask.long.byte 0x10 16.--19. 1. "PIN,CLKOUT2 pin select register"
|
|
bitfld.long 0x10 0.--1. "PORT,CLKOUT2 port select register" "0,1,2,3"
|
|
group.long 0x46C++0x3
|
|
line.long 0x0 "DCDC_ROUTEEN,DCDC pin enable"
|
|
bitfld.long 0x0 0. "DCDCCOREHIDDENPEN,DCDCCOREHIDDEN pin enable control bit" "0,1"
|
|
group.long 0x47C++0xF
|
|
line.long 0x0 "FRC_ROUTEEN,FRC pin enable"
|
|
bitfld.long 0x0 2. "DOUTPEN,DOUT pin enable control bit" "0,1"
|
|
bitfld.long 0x0 1. "DFRAMEPEN,DFRAME pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DCLKPEN,DCLK pin enable control bit" "0,1"
|
|
line.long 0x4 "FRC_DCLKROUTE,DCLK port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,DCLK pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,DCLK port select register" "0,1,2,3"
|
|
line.long 0x8 "FRC_DFRAMEROUTE,DFRAME port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,DFRAME pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,DFRAME port select register" "0,1,2,3"
|
|
line.long 0xC "FRC_DOUTROUTE,DOUT port/pin select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PIN,DOUT pin select register"
|
|
bitfld.long 0xC 0.--1. "PORT,DOUT port select register" "0,1,2,3"
|
|
group.long 0x490++0xB
|
|
line.long 0x0 "I2C0_ROUTEEN,I2C0 pin enable"
|
|
bitfld.long 0x0 1. "SDAPEN,SDA pin enable control bit" "0,1"
|
|
bitfld.long 0x0 0. "SCLPEN,SCL pin enable control bit" "0,1"
|
|
line.long 0x4 "I2C0_SCLROUTE,SCL port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,SCL pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,SCL port select register" "0,1,2,3"
|
|
line.long 0x8 "I2C0_SDAROUTE,SDA port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,SDA pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,SDA port select register" "0,1,2,3"
|
|
group.long 0x4A0++0xB
|
|
line.long 0x0 "I2C1_ROUTEEN,I2C1 pin enable"
|
|
bitfld.long 0x0 1. "SDAPEN,SDA pin enable control bit" "0,1"
|
|
bitfld.long 0x0 0. "SCLPEN,SCL pin enable control bit" "0,1"
|
|
line.long 0x4 "I2C1_SCLROUTE,SCL port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,SCL pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,SCL port select register" "0,1,2,3"
|
|
line.long 0x8 "I2C1_SDAROUTE,SDA port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,SDA pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,SDA port select register" "0,1,2,3"
|
|
group.long 0x4B0++0xB
|
|
line.long 0x0 "LETIMER0_ROUTEEN,LETIMER pin enable"
|
|
bitfld.long 0x0 1. "OUT1PEN,OUT1 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 0. "OUT0PEN,OUT0 pin enable control bit" "0,1"
|
|
line.long 0x4 "LETIMER0_OUT0ROUTE,OUT0 port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,OUT0 pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,OUT0 port select register" "0,1,2,3"
|
|
line.long 0x8 "LETIMER0_OUT1ROUTE,OUT1 port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,OUT1 pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,OUT1 port select register" "0,1,2,3"
|
|
group.long 0x4C0++0x13
|
|
line.long 0x0 "EUART0_ROUTEEN,EUART pin enable"
|
|
bitfld.long 0x0 1. "TXPEN,TX pin enable control bit" "0,1"
|
|
bitfld.long 0x0 0. "RTSPEN,RTS pin enable control bit" "0,1"
|
|
line.long 0x4 "EUART0_CTSROUTE,CTS port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,CTS pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,CTS port select register" "0,1,2,3"
|
|
line.long 0x8 "EUART0_RTSROUTE,RTS port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,RTS pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,RTS port select register" "0,1,2,3"
|
|
line.long 0xC "EUART0_RXROUTE,RX port/pin select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PIN,RX pin select register"
|
|
bitfld.long 0xC 0.--1. "PORT,RX port select register" "0,1,2,3"
|
|
line.long 0x10 "EUART0_TXROUTE,TX port/pin select"
|
|
hexmask.long.byte 0x10 16.--19. 1. "PIN,TX pin select register"
|
|
bitfld.long 0x10 0.--1. "PORT,TX port select register" "0,1,2,3"
|
|
group.long 0x4D8++0x43
|
|
line.long 0x0 "MODEM_ROUTEEN,MODEM pin enable"
|
|
bitfld.long 0x0 14. "DOUTPEN,DOUT pin enable control bit" "0,1"
|
|
bitfld.long 0x0 13. "DCLKPEN,DCLK pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "ANTTRIGSTOPPEN,ANTTRIGSTOP pin enable control bit" "0,1"
|
|
bitfld.long 0x0 11. "ANTTRIGPEN,ANTTRIG pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "ANTSWUSPEN,ANTSWUS pin enable control bit" "0,1"
|
|
bitfld.long 0x0 9. "ANTSWENPEN,ANTSWEN pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "ANTRR5PEN,ANTRR5 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 7. "ANTRR4PEN,ANTRR4 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "ANTRR3PEN,ANTRR3 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 5. "ANTRR2PEN,ANTRR2 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "ANTRR1PEN,ANTRR1 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 3. "ANTRR0PEN,ANTRR0 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "ANTROLLOVERPEN,ANTROLLOVER pin enable control bit" "0,1"
|
|
bitfld.long 0x0 1. "ANT1PEN,ANT1 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "ANT0PEN,ANT0 pin enable control bit" "0,1"
|
|
line.long 0x4 "MODEM_ANT0ROUTE,ANT0 port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,ANT0 pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,ANT0 port select register" "0,1,2,3"
|
|
line.long 0x8 "MODEM_ANT1ROUTE,ANT1 port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,ANT1 pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,ANT1 port select register" "0,1,2,3"
|
|
line.long 0xC "MODEM_ANTROLLOVERROUTE,ANTROLLOVER port/pin select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PIN,ANTROLLOVER pin select register"
|
|
bitfld.long 0xC 0.--1. "PORT,ANTROLLOVER port select register" "0,1,2,3"
|
|
line.long 0x10 "MODEM_ANTRR0ROUTE,ANTRR0 port/pin select"
|
|
hexmask.long.byte 0x10 16.--19. 1. "PIN,ANTRR0 pin select register"
|
|
bitfld.long 0x10 0.--1. "PORT,ANTRR0 port select register" "0,1,2,3"
|
|
line.long 0x14 "MODEM_ANTRR1ROUTE,ANTRR1 port/pin select"
|
|
hexmask.long.byte 0x14 16.--19. 1. "PIN,ANTRR1 pin select register"
|
|
bitfld.long 0x14 0.--1. "PORT,ANTRR1 port select register" "0,1,2,3"
|
|
line.long 0x18 "MODEM_ANTRR2ROUTE,ANTRR2 port/pin select"
|
|
hexmask.long.byte 0x18 16.--19. 1. "PIN,ANTRR2 pin select register"
|
|
bitfld.long 0x18 0.--1. "PORT,ANTRR2 port select register" "0,1,2,3"
|
|
line.long 0x1C "MODEM_ANTRR3ROUTE,ANTRR3 port/pin select"
|
|
hexmask.long.byte 0x1C 16.--19. 1. "PIN,ANTRR3 pin select register"
|
|
bitfld.long 0x1C 0.--1. "PORT,ANTRR3 port select register" "0,1,2,3"
|
|
line.long 0x20 "MODEM_ANTRR4ROUTE,ANTRR4 port/pin select"
|
|
hexmask.long.byte 0x20 16.--19. 1. "PIN,ANTRR4 pin select register"
|
|
bitfld.long 0x20 0.--1. "PORT,ANTRR4 port select register" "0,1,2,3"
|
|
line.long 0x24 "MODEM_ANTRR5ROUTE,ANTRR5 port/pin select"
|
|
hexmask.long.byte 0x24 16.--19. 1. "PIN,ANTRR5 pin select register"
|
|
bitfld.long 0x24 0.--1. "PORT,ANTRR5 port select register" "0,1,2,3"
|
|
line.long 0x28 "MODEM_ANTSWENROUTE,ANTSWEN port/pin select"
|
|
hexmask.long.byte 0x28 16.--19. 1. "PIN,ANTSWEN pin select register"
|
|
bitfld.long 0x28 0.--1. "PORT,ANTSWEN port select register" "0,1,2,3"
|
|
line.long 0x2C "MODEM_ANTSWUSROUTE,ANTSWUS port/pin select"
|
|
hexmask.long.byte 0x2C 16.--19. 1. "PIN,ANTSWUS pin select register"
|
|
bitfld.long 0x2C 0.--1. "PORT,ANTSWUS port select register" "0,1,2,3"
|
|
line.long 0x30 "MODEM_ANTTRIGROUTE,ANTTRIG port/pin select"
|
|
hexmask.long.byte 0x30 16.--19. 1. "PIN,ANTTRIG pin select register"
|
|
bitfld.long 0x30 0.--1. "PORT,ANTTRIG port select register" "0,1,2,3"
|
|
line.long 0x34 "MODEM_ANTTRIGSTOPROUTE,ANTTRIGSTOP port/pin select"
|
|
hexmask.long.byte 0x34 16.--19. 1. "PIN,ANTTRIGSTOP pin select register"
|
|
bitfld.long 0x34 0.--1. "PORT,ANTTRIGSTOP port select register" "0,1,2,3"
|
|
line.long 0x38 "MODEM_DCLKROUTE,DCLK port/pin select"
|
|
hexmask.long.byte 0x38 16.--19. 1. "PIN,DCLK pin select register"
|
|
bitfld.long 0x38 0.--1. "PORT,DCLK port select register" "0,1,2,3"
|
|
line.long 0x3C "MODEM_DINROUTE,DIN port/pin select"
|
|
hexmask.long.byte 0x3C 16.--19. 1. "PIN,DIN pin select register"
|
|
bitfld.long 0x3C 0.--1. "PORT,DIN port select register" "0,1,2,3"
|
|
line.long 0x40 "MODEM_DOUTROUTE,DOUT port/pin select"
|
|
hexmask.long.byte 0x40 16.--19. 1. "PIN,DOUT pin select register"
|
|
bitfld.long 0x40 0.--1. "PORT,DOUT port select register" "0,1,2,3"
|
|
group.long 0x520++0xF
|
|
line.long 0x0 "PDM_ROUTEEN,PDM pin enable"
|
|
bitfld.long 0x0 0. "CLKPEN,CLK pin enable control bit" "0,1"
|
|
line.long 0x4 "PDM_CLKROUTE,CLK port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,CLK pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,CLK port select register" "0,1,2,3"
|
|
line.long 0x8 "PDM_DAT0ROUTE,DAT0 port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,DAT0 pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,DAT0 port select register" "0,1,2,3"
|
|
line.long 0xC "PDM_DAT1ROUTE,DAT1 port/pin select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PIN,DAT1 pin select register"
|
|
bitfld.long 0xC 0.--1. "PORT,DAT1 port select register" "0,1,2,3"
|
|
group.long 0x534++0x43
|
|
line.long 0x0 "PRS0_ROUTEEN,PRS0 pin enable"
|
|
bitfld.long 0x0 15. "SYNCH3PEN,SYNCH3 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 14. "SYNCH2PEN,SYNCH2 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "SYNCH1PEN,SYNCH1 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 12. "SYNCH0PEN,SYNCH0 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "ASYNCH11PEN,ASYNCH11 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 10. "ASYNCH10PEN,ASYNCH10 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ASYNCH9PEN,ASYNCH9 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 8. "ASYNCH8PEN,ASYNCH8 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "ASYNCH7PEN,ASYNCH7 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 6. "ASYNCH6PEN,ASYNCH6 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ASYNCH5PEN,ASYNCH5 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 4. "ASYNCH4PEN,ASYNCH4 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ASYNCH3PEN,ASYNCH3 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 2. "ASYNCH2PEN,ASYNCH2 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ASYNCH1PEN,ASYNCH1 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 0. "ASYNCH0PEN,ASYNCH0 pin enable control bit" "0,1"
|
|
line.long 0x4 "PRS0_ASYNCH0ROUTE,ASYNCH0 port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,ASYNCH0 pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,ASYNCH0 port select register" "0,1,2,3"
|
|
line.long 0x8 "PRS0_ASYNCH1ROUTE,ASYNCH1 port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,ASYNCH1 pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,ASYNCH1 port select register" "0,1,2,3"
|
|
line.long 0xC "PRS0_ASYNCH2ROUTE,ASYNCH2 port/pin select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PIN,ASYNCH2 pin select register"
|
|
bitfld.long 0xC 0.--1. "PORT,ASYNCH2 port select register" "0,1,2,3"
|
|
line.long 0x10 "PRS0_ASYNCH3ROUTE,ASYNCH3 port/pin select"
|
|
hexmask.long.byte 0x10 16.--19. 1. "PIN,ASYNCH3 pin select register"
|
|
bitfld.long 0x10 0.--1. "PORT,ASYNCH3 port select register" "0,1,2,3"
|
|
line.long 0x14 "PRS0_ASYNCH4ROUTE,ASYNCH4 port/pin select"
|
|
hexmask.long.byte 0x14 16.--19. 1. "PIN,ASYNCH4 pin select register"
|
|
bitfld.long 0x14 0.--1. "PORT,ASYNCH4 port select register" "0,1,2,3"
|
|
line.long 0x18 "PRS0_ASYNCH5ROUTE,ASYNCH5 port/pin select"
|
|
hexmask.long.byte 0x18 16.--19. 1. "PIN,ASYNCH5 pin select register"
|
|
bitfld.long 0x18 0.--1. "PORT,ASYNCH5 port select register" "0,1,2,3"
|
|
line.long 0x1C "PRS0_ASYNCH6ROUTE,ASYNCH6 port/pin select"
|
|
hexmask.long.byte 0x1C 16.--19. 1. "PIN,ASYNCH6 pin select register"
|
|
bitfld.long 0x1C 0.--1. "PORT,ASYNCH6 port select register" "0,1,2,3"
|
|
line.long 0x20 "PRS0_ASYNCH7ROUTE,ASYNCH7 port/pin select"
|
|
hexmask.long.byte 0x20 16.--19. 1. "PIN,ASYNCH7 pin select register"
|
|
bitfld.long 0x20 0.--1. "PORT,ASYNCH7 port select register" "0,1,2,3"
|
|
line.long 0x24 "PRS0_ASYNCH8ROUTE,ASYNCH8 port/pin select"
|
|
hexmask.long.byte 0x24 16.--19. 1. "PIN,ASYNCH8 pin select register"
|
|
bitfld.long 0x24 0.--1. "PORT,ASYNCH8 port select register" "0,1,2,3"
|
|
line.long 0x28 "PRS0_ASYNCH9ROUTE,ASYNCH9 port/pin select"
|
|
hexmask.long.byte 0x28 16.--19. 1. "PIN,ASYNCH9 pin select register"
|
|
bitfld.long 0x28 0.--1. "PORT,ASYNCH9 port select register" "0,1,2,3"
|
|
line.long 0x2C "PRS0_ASYNCH10ROUTE,ASYNCH10 port/pin select"
|
|
hexmask.long.byte 0x2C 16.--19. 1. "PIN,ASYNCH10 pin select register"
|
|
bitfld.long 0x2C 0.--1. "PORT,ASYNCH10 port select register" "0,1,2,3"
|
|
line.long 0x30 "PRS0_ASYNCH11ROUTE,ASYNCH11 port/pin select"
|
|
hexmask.long.byte 0x30 16.--19. 1. "PIN,ASYNCH11 pin select register"
|
|
bitfld.long 0x30 0.--1. "PORT,ASYNCH11 port select register" "0,1,2,3"
|
|
line.long 0x34 "PRS0_SYNCH0ROUTE,SYNCH0 port/pin select"
|
|
hexmask.long.byte 0x34 16.--19. 1. "PIN,SYNCH0 pin select register"
|
|
bitfld.long 0x34 0.--1. "PORT,SYNCH0 port select register" "0,1,2,3"
|
|
line.long 0x38 "PRS0_SYNCH1ROUTE,SYNCH1 port/pin select"
|
|
hexmask.long.byte 0x38 16.--19. 1. "PIN,SYNCH1 pin select register"
|
|
bitfld.long 0x38 0.--1. "PORT,SYNCH1 port select register" "0,1,2,3"
|
|
line.long 0x3C "PRS0_SYNCH2ROUTE,SYNCH2 port/pin select"
|
|
hexmask.long.byte 0x3C 16.--19. 1. "PIN,SYNCH2 pin select register"
|
|
bitfld.long 0x3C 0.--1. "PORT,SYNCH2 port select register" "0,1,2,3"
|
|
line.long 0x40 "PRS0_SYNCH3ROUTE,SYNCH3 port/pin select"
|
|
hexmask.long.byte 0x40 16.--19. 1. "PIN,SYNCH3 pin select register"
|
|
bitfld.long 0x40 0.--1. "PORT,SYNCH3 port select register" "0,1,2,3"
|
|
group.long 0x57C++0x1B
|
|
line.long 0x0 "TIMER0_ROUTEEN,TIMER0 pin enable"
|
|
bitfld.long 0x0 5. "CCC2PEN,CDTI2 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 4. "CCC1PEN,CDTI1 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CCC0PEN,CDTI0 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 2. "CC2PEN,CC2 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CC1PEN,CC1 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 0. "CC0PEN,CC0 pin enable control bit" "0,1"
|
|
line.long 0x4 "TIMER0_CC0ROUTE,CC0 port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,CC0 pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,CC0 port select register" "0,1,2,3"
|
|
line.long 0x8 "TIMER0_CC1ROUTE,CC1 port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,CC1 pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,CC1 port select register" "0,1,2,3"
|
|
line.long 0xC "TIMER0_CC2ROUTE,CC2 port/pin select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PIN,CC2 pin select register"
|
|
bitfld.long 0xC 0.--1. "PORT,CC2 port select register" "0,1,2,3"
|
|
line.long 0x10 "TIMER0_CDTI0ROUTE,CDTI0 port/pin select"
|
|
hexmask.long.byte 0x10 16.--19. 1. "PIN,CDTI0 pin select register"
|
|
bitfld.long 0x10 0.--1. "PORT,CDTI0 port select register" "0,1,2,3"
|
|
line.long 0x14 "TIMER0_CDTI1ROUTE,CDTI1 port/pin select"
|
|
hexmask.long.byte 0x14 16.--19. 1. "PIN,CDTI1 pin select register"
|
|
bitfld.long 0x14 0.--1. "PORT,CDTI1 port select register" "0,1,2,3"
|
|
line.long 0x18 "TIMER0_CDTI2ROUTE,CDTI2 port/pin select"
|
|
hexmask.long.byte 0x18 16.--19. 1. "PIN,CDTI2 pin select register"
|
|
bitfld.long 0x18 0.--1. "PORT,CDTI2 port select register" "0,1,2,3"
|
|
group.long 0x59C++0x1B
|
|
line.long 0x0 "TIMER1_ROUTEEN,TIMER1 pin enable"
|
|
bitfld.long 0x0 5. "CCC2PEN,CDTI2 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 4. "CCC1PEN,CDTI1 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CCC0PEN,CDTI0 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 2. "CC2PEN,CC2 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CC1PEN,CC1 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 0. "CC0PEN,CC0 pin enable control bit" "0,1"
|
|
line.long 0x4 "TIMER1_CC0ROUTE,CC0 port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,CC0 pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,CC0 port select register" "0,1,2,3"
|
|
line.long 0x8 "TIMER1_CC1ROUTE,CC1 port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,CC1 pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,CC1 port select register" "0,1,2,3"
|
|
line.long 0xC "TIMER1_CC2ROUTE,CC2 port/pin select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PIN,CC2 pin select register"
|
|
bitfld.long 0xC 0.--1. "PORT,CC2 port select register" "0,1,2,3"
|
|
line.long 0x10 "TIMER1_CDTI0ROUTE,CDTI0 port/pin select"
|
|
hexmask.long.byte 0x10 16.--19. 1. "PIN,CDTI0 pin select register"
|
|
bitfld.long 0x10 0.--1. "PORT,CDTI0 port select register" "0,1,2,3"
|
|
line.long 0x14 "TIMER1_CDTI1ROUTE,CDTI1 port/pin select"
|
|
hexmask.long.byte 0x14 16.--19. 1. "PIN,CDTI1 pin select register"
|
|
bitfld.long 0x14 0.--1. "PORT,CDTI1 port select register" "0,1,2,3"
|
|
line.long 0x18 "TIMER1_CDTI2ROUTE,CDTI2 port/pin select"
|
|
hexmask.long.byte 0x18 16.--19. 1. "PIN,CDTI2 pin select register"
|
|
bitfld.long 0x18 0.--1. "PORT,CDTI2 port select register" "0,1,2,3"
|
|
group.long 0x5BC++0x1B
|
|
line.long 0x0 "TIMER2_ROUTEEN,TIMER2 pin enable"
|
|
bitfld.long 0x0 5. "CCC2PEN,CDTI2 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 4. "CCC1PEN,CDTI1 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CCC0PEN,CDTI0 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 2. "CC2PEN,CC2 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CC1PEN,CC1 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 0. "CC0PEN,CC0 pin enable control bit" "0,1"
|
|
line.long 0x4 "TIMER2_CC0ROUTE,CC0 port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,CC0 pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,CC0 port select register" "0,1,2,3"
|
|
line.long 0x8 "TIMER2_CC1ROUTE,CC1 port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,CC1 pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,CC1 port select register" "0,1,2,3"
|
|
line.long 0xC "TIMER2_CC2ROUTE,CC2 port/pin select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PIN,CC2 pin select register"
|
|
bitfld.long 0xC 0.--1. "PORT,CC2 port select register" "0,1,2,3"
|
|
line.long 0x10 "TIMER2_CDTI0ROUTE,CDTI0 port/pin select"
|
|
hexmask.long.byte 0x10 16.--19. 1. "PIN,CDTI0 pin select register"
|
|
bitfld.long 0x10 0.--1. "PORT,CDTI0 port select register" "0,1,2,3"
|
|
line.long 0x14 "TIMER2_CDTI1ROUTE,CDTI1 port/pin select"
|
|
hexmask.long.byte 0x14 16.--19. 1. "PIN,CDTI1 pin select register"
|
|
bitfld.long 0x14 0.--1. "PORT,CDTI1 port select register" "0,1,2,3"
|
|
line.long 0x18 "TIMER2_CDTI2ROUTE,CDTI2 port/pin select"
|
|
hexmask.long.byte 0x18 16.--19. 1. "PIN,CDTI2 pin select register"
|
|
bitfld.long 0x18 0.--1. "PORT,CDTI2 port select register" "0,1,2,3"
|
|
group.long 0x5DC++0x1B
|
|
line.long 0x0 "TIMER3_ROUTEEN,TIMER3 pin enable"
|
|
bitfld.long 0x0 5. "CCC2PEN,CDTI2 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 4. "CCC1PEN,CDTI1 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CCC0PEN,CDTI0 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 2. "CC2PEN,CC2 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CC1PEN,CC1 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 0. "CC0PEN,CC0 pin enable control bit" "0,1"
|
|
line.long 0x4 "TIMER3_CC0ROUTE,CC0 port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,CC0 pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,CC0 port select register" "0,1,2,3"
|
|
line.long 0x8 "TIMER3_CC1ROUTE,CC1 port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,CC1 pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,CC1 port select register" "0,1,2,3"
|
|
line.long 0xC "TIMER3_CC2ROUTE,CC2 port/pin select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PIN,CC2 pin select register"
|
|
bitfld.long 0xC 0.--1. "PORT,CC2 port select register" "0,1,2,3"
|
|
line.long 0x10 "TIMER3_CDTI0ROUTE,CDTI0 port/pin select"
|
|
hexmask.long.byte 0x10 16.--19. 1. "PIN,CDTI0 pin select register"
|
|
bitfld.long 0x10 0.--1. "PORT,CDTI0 port select register" "0,1,2,3"
|
|
line.long 0x14 "TIMER3_CDTI1ROUTE,CDTI1 port/pin select"
|
|
hexmask.long.byte 0x14 16.--19. 1. "PIN,CDTI1 pin select register"
|
|
bitfld.long 0x14 0.--1. "PORT,CDTI1 port select register" "0,1,2,3"
|
|
line.long 0x18 "TIMER3_CDTI2ROUTE,CDTI2 port/pin select"
|
|
hexmask.long.byte 0x18 16.--19. 1. "PIN,CDTI2 pin select register"
|
|
bitfld.long 0x18 0.--1. "PORT,CDTI2 port select register" "0,1,2,3"
|
|
group.long 0x5FC++0x1B
|
|
line.long 0x0 "TIMER4_ROUTEEN,TIMER4 pin enable"
|
|
bitfld.long 0x0 5. "CCC2PEN,CDTI2 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 4. "CCC1PEN,CDTI1 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CCC0PEN,CDTI0 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 2. "CC2PEN,CC2 pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CC1PEN,CC1 pin enable control bit" "0,1"
|
|
bitfld.long 0x0 0. "CC0PEN,CC0 pin enable control bit" "0,1"
|
|
line.long 0x4 "TIMER4_CC0ROUTE,CC0 port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,CC0 pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,CC0 port select register" "0,1,2,3"
|
|
line.long 0x8 "TIMER4_CC1ROUTE,CC1 port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,CC1 pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,CC1 port select register" "0,1,2,3"
|
|
line.long 0xC "TIMER4_CC2ROUTE,CC2 port/pin select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PIN,CC2 pin select register"
|
|
bitfld.long 0xC 0.--1. "PORT,CC2 port select register" "0,1,2,3"
|
|
line.long 0x10 "TIMER4_CDTI0ROUTE,CDTI0 port/pin select"
|
|
hexmask.long.byte 0x10 16.--19. 1. "PIN,CDTI0 pin select register"
|
|
bitfld.long 0x10 0.--1. "PORT,CDTI0 port select register" "0,1,2,3"
|
|
line.long 0x14 "TIMER4_CDTI1ROUTE,CDTI1 port/pin select"
|
|
hexmask.long.byte 0x14 16.--19. 1. "PIN,CDTI1 pin select register"
|
|
bitfld.long 0x14 0.--1. "PORT,CDTI1 port select register" "0,1,2,3"
|
|
line.long 0x18 "TIMER4_CDTI2ROUTE,CDTI2 port/pin select"
|
|
hexmask.long.byte 0x18 16.--19. 1. "PIN,CDTI2 pin select register"
|
|
bitfld.long 0x18 0.--1. "PORT,CDTI2 port select register" "0,1,2,3"
|
|
group.long 0x61C++0x1B
|
|
line.long 0x0 "USART0_ROUTEEN,USART0 pin enable"
|
|
bitfld.long 0x0 4. "TXPEN,TX pin enable control bit" "0,1"
|
|
bitfld.long 0x0 3. "CLKPEN,SCLK pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXPEN,RX pin enable control bit" "0,1"
|
|
bitfld.long 0x0 1. "RTSPEN,RTS pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "CSPEN,CS pin enable control bit" "0,1"
|
|
line.long 0x4 "USART0_CSROUTE,CS port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,CS pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,CS port select register" "0,1,2,3"
|
|
line.long 0x8 "USART0_CTSROUTE,CTS port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,CTS pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,CTS port select register" "0,1,2,3"
|
|
line.long 0xC "USART0_RTSROUTE,RTS port/pin select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PIN,RTS pin select register"
|
|
bitfld.long 0xC 0.--1. "PORT,RTS port select register" "0,1,2,3"
|
|
line.long 0x10 "USART0_RXROUTE,RX port/pin select"
|
|
hexmask.long.byte 0x10 16.--19. 1. "PIN,RX pin select register"
|
|
bitfld.long 0x10 0.--1. "PORT,RX port select register" "0,1,2,3"
|
|
line.long 0x14 "USART0_CLKROUTE,SCLK port/pin select"
|
|
hexmask.long.byte 0x14 16.--19. 1. "PIN,SCLK pin select register"
|
|
bitfld.long 0x14 0.--1. "PORT,SCLK port select register" "0,1,2,3"
|
|
line.long 0x18 "USART0_TXROUTE,TX port/pin select"
|
|
hexmask.long.byte 0x18 16.--19. 1. "PIN,TX pin select register"
|
|
bitfld.long 0x18 0.--1. "PORT,TX port select register" "0,1,2,3"
|
|
group.long 0x63C++0x1B
|
|
line.long 0x0 "USART1_ROUTEEN,USART1 pin enable"
|
|
bitfld.long 0x0 4. "TXPEN,TX pin enable control bit" "0,1"
|
|
bitfld.long 0x0 3. "CLKPEN,SCLK pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXPEN,RX pin enable control bit" "0,1"
|
|
bitfld.long 0x0 1. "RTSPEN,RTS pin enable control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "CSPEN,CS pin enable control bit" "0,1"
|
|
line.long 0x4 "USART1_CSROUTE,CS port/pin select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PIN,CS pin select register"
|
|
bitfld.long 0x4 0.--1. "PORT,CS port select register" "0,1,2,3"
|
|
line.long 0x8 "USART1_CTSROUTE,CTS port/pin select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PIN,CTS pin select register"
|
|
bitfld.long 0x8 0.--1. "PORT,CTS port select register" "0,1,2,3"
|
|
line.long 0xC "USART1_RTSROUTE,RTS port/pin select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PIN,RTS pin select register"
|
|
bitfld.long 0xC 0.--1. "PORT,RTS port select register" "0,1,2,3"
|
|
line.long 0x10 "USART1_RXROUTE,RX port/pin select"
|
|
hexmask.long.byte 0x10 16.--19. 1. "PIN,RX pin select register"
|
|
bitfld.long 0x10 0.--1. "PORT,RX port select register" "0,1,2,3"
|
|
line.long 0x14 "USART1_CLKROUTE,SCLK port/pin select"
|
|
hexmask.long.byte 0x14 16.--19. 1. "PIN,SCLK pin select register"
|
|
bitfld.long 0x14 0.--1. "PORT,SCLK port select register" "0,1,2,3"
|
|
line.long 0x18 "USART1_TXROUTE,TX port/pin select"
|
|
hexmask.long.byte 0x18 16.--19. 1. "PIN,TX pin select register"
|
|
bitfld.long 0x18 0.--1. "PORT,TX port select register" "0,1,2,3"
|
|
tree.end
|
|
tree.end
|
|
tree "HFRCO (High-Frequency RC Oscillator)"
|
|
base ad:0x0
|
|
tree "HFRCO0_NS"
|
|
base ad:0x50010000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "CTRL,No Description"
|
|
bitfld.long 0x0 1. "DISONDEMAND,Disable On-demand" "0,1"
|
|
bitfld.long 0x0 0. "FORCEEN,Force Enable" "0,1"
|
|
line.long 0x4 "CAL,No Description"
|
|
hexmask.long.byte 0x4 28.--31. 1. "IREFTC,Tempco Trim on Comparator Current"
|
|
bitfld.long 0x4 26.--27. "CMPSEL,Comparator Load Select" "0,1,2,3"
|
|
bitfld.long 0x4 24.--25. "CLKDIV,Locally Divide HFRCO Clock Output" "0: Divide by 1.,1: Divide by 2.,2: Divide by 4.,?"
|
|
bitfld.long 0x4 21.--23. "CMPBIAS,Comparator Bias Current" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 16.--20. 1. "FREQRANGE,Frequency Range"
|
|
bitfld.long 0x4 15. "LDOHP,LDO High Power Mode" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--13. 1. "FINETUNING,Fine Tuning Value"
|
|
hexmask.long.byte 0x4 0.--6. 1. "TUNING,Tuning Value"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 31. "LOCK,Lock Status" "0: HFRCO is unlocked,1: HFRCO is locked"
|
|
bitfld.long 0x0 16. "ENS,Enable Status" "0,1"
|
|
bitfld.long 0x0 2. "SYNCBUSY,Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 1. "FREQBSY,Frequency Updating Busy" "0,1"
|
|
bitfld.long 0x0 0. "RDY,Ready" "0,1"
|
|
group.long 0x10++0x7
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 0. "RDY,Ready Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 0. "RDY,RDY Interrupt Enable" "0,1"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Lock Key"
|
|
tree.end
|
|
tree "HFRCO0_S"
|
|
base ad:0x40010000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "CTRL,No Description"
|
|
bitfld.long 0x0 1. "DISONDEMAND,Disable On-demand" "0,1"
|
|
bitfld.long 0x0 0. "FORCEEN,Force Enable" "0,1"
|
|
line.long 0x4 "CAL,No Description"
|
|
hexmask.long.byte 0x4 28.--31. 1. "IREFTC,Tempco Trim on Comparator Current"
|
|
bitfld.long 0x4 26.--27. "CMPSEL,Comparator Load Select" "0,1,2,3"
|
|
bitfld.long 0x4 24.--25. "CLKDIV,Locally Divide HFRCO Clock Output" "0: Divide by 1.,1: Divide by 2.,2: Divide by 4.,?"
|
|
bitfld.long 0x4 21.--23. "CMPBIAS,Comparator Bias Current" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 16.--20. 1. "FREQRANGE,Frequency Range"
|
|
bitfld.long 0x4 15. "LDOHP,LDO High Power Mode" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--13. 1. "FINETUNING,Fine Tuning Value"
|
|
hexmask.long.byte 0x4 0.--6. 1. "TUNING,Tuning Value"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 31. "LOCK,Lock Status" "0: HFRCO is unlocked,1: HFRCO is locked"
|
|
bitfld.long 0x0 16. "ENS,Enable Status" "0,1"
|
|
bitfld.long 0x0 2. "SYNCBUSY,Synchronization Busy" "0,1"
|
|
bitfld.long 0x0 1. "FREQBSY,Frequency Updating Busy" "0,1"
|
|
bitfld.long 0x0 0. "RDY,Ready" "0,1"
|
|
group.long 0x10++0x7
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 0. "RDY,Ready Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 0. "RDY,RDY Interrupt Enable" "0,1"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Lock Key"
|
|
tree.end
|
|
tree.end
|
|
tree "HFXO (High Frequency Crystal Oscillator)"
|
|
base ad:0x0
|
|
tree "HFXO0_NS"
|
|
base ad:0x5000C000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version ID"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "XTALCFG,No Description"
|
|
hexmask.long.byte 0x0 24.--27. 1. "TIMEOUTCBLSB,Core Bias LSB Change Timeout"
|
|
hexmask.long.byte 0x0 20.--23. 1. "TIMEOUTSTEADY,Steady State Timeout"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "CTUNEXOSTARTUP,Startup Tuning Capacitance on XO"
|
|
hexmask.long.byte 0x0 12.--15. 1. "CTUNEXISTARTUP,Startup Tuning Capacitance on XI"
|
|
newline
|
|
hexmask.long.byte 0x0 6.--11. 1. "COREBIASSTARTUP,Startup Core Bias Current"
|
|
hexmask.long.byte 0x0 0.--5. 1. "COREBIASSTARTUPI,Intermediate Startup Core Bias Current"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "XTALCTRL,No Description"
|
|
bitfld.long 0x0 31. "SKIPCOREBIASOPT,Skip Core Bias Optimization" "0,1"
|
|
bitfld.long 0x0 26.--27. "COREDGENANA,Core Degeneration" "0: Do not apply core degeneration resistence,1: Apply 33 ohm core degeneration resistence,2: Apply 50 ohm core degeneration resistence,3: Apply 100 ohm core degeneration resistence"
|
|
newline
|
|
bitfld.long 0x0 24.--25. "CTUNEFIXANA,Fixed Tuning Capacitance" "0: Remove fixed capacitance on XI and XO nodes,1: Adds fixed capacitance on XI node,2: Adds fixed capacitance on XO node,3: Adds fixed capacitance on both XI and XO nodes"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CTUNEXOANA,Tuning Capacitance on XO"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "CTUNEXIANA,Tuning Capacitance on XI"
|
|
hexmask.long.byte 0x0 0.--7. 1. "COREBIASANA,Core Bias Current"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "CFG,No Description"
|
|
bitfld.long 0x0 3. "SQBUFSCHTRGANA,Squaring Buffer Schmitt Trigger" "0: Squaring buffer schmitt trigger is disabled,1: Squaring buffer schmitt trigger is enabled"
|
|
bitfld.long 0x0 2. "ENXIDCBIASANA,Enable XI Internal DC Bias" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "MODE,Crystal Oscillator Mode" "0: crystal oscillator,1: external sinusoidal clock can be supplied on XI.."
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "CTRL,No Description"
|
|
bitfld.long 0x0 5. "FORCEXO2GNDANA,Force XO Pin to Ground" "0: Disabled (not pulled),1: Enabled (pulled)"
|
|
bitfld.long 0x0 4. "FORCEXI2GNDANA,Force XI Pin to Ground" "0: Disabled (not pulled),1: Enabled (pulled)"
|
|
newline
|
|
bitfld.long 0x0 2. "KEEPWARM,Keep Warm" "0,1"
|
|
bitfld.long 0x0 1. "DISONDEMAND,Disable On-demand Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "FORCEEN,Force Enable" "0,1"
|
|
wgroup.long 0x50++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 1. "MANUALOVERRIDE,Manual Override" "0,1"
|
|
bitfld.long 0x0 0. "COREBIASOPT,Core Bias Optimizaton" "0,1"
|
|
rgroup.long 0x58++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 31. "LOCK,Configuration Lock Status" "0: Configuration lock is unlocked,1: Configuration lock is locked"
|
|
bitfld.long 0x0 30. "FSMLOCK,FSM Lock Status" "0: FSM lock is unlocked,1: FSM lock is locked"
|
|
newline
|
|
bitfld.long 0x0 19. "ISWARM,Oscillator Is Kept Warm" "0,1"
|
|
bitfld.long 0x0 17. "HWREQ,Oscillator Requested by Hardware" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "ENS,Enabled Status" "0,1"
|
|
bitfld.long 0x0 1. "COREBIASOPTRDY,Core Bias Optimization Ready" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RDY,Ready Status" "0,1"
|
|
group.long 0x70++0x7
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 31. "COREBIASOPTERR,Core Bias Optimization Error Interrupt" "0,1"
|
|
bitfld.long 0x0 29. "DNSERR,Did Not Start Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "COREBIASOPTRDY,Core Bias Optimization Ready Interrupt" "0,1"
|
|
bitfld.long 0x0 0. "RDY,Ready Interrupt" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 31. "COREBIASOPTERR,Core Bias Optimization Error Interrupt" "0,1"
|
|
bitfld.long 0x4 29. "DNSERR,Did Not Start Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "COREBIASOPTRDY,Core Bias Optimization Ready Interrupt" "0,1"
|
|
bitfld.long 0x4 0. "RDY,Ready Interrupt" "0,1"
|
|
wgroup.long 0x80++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Configuration Lock Key"
|
|
tree.end
|
|
tree "HFXO0_S"
|
|
base ad:0x4000C000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version ID"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "XTALCFG,No Description"
|
|
hexmask.long.byte 0x0 24.--27. 1. "TIMEOUTCBLSB,Core Bias LSB Change Timeout"
|
|
hexmask.long.byte 0x0 20.--23. 1. "TIMEOUTSTEADY,Steady State Timeout"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "CTUNEXOSTARTUP,Startup Tuning Capacitance on XO"
|
|
hexmask.long.byte 0x0 12.--15. 1. "CTUNEXISTARTUP,Startup Tuning Capacitance on XI"
|
|
newline
|
|
hexmask.long.byte 0x0 6.--11. 1. "COREBIASSTARTUP,Startup Core Bias Current"
|
|
hexmask.long.byte 0x0 0.--5. 1. "COREBIASSTARTUPI,Intermediate Startup Core Bias Current"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "XTALCTRL,No Description"
|
|
bitfld.long 0x0 31. "SKIPCOREBIASOPT,Skip Core Bias Optimization" "0,1"
|
|
bitfld.long 0x0 26.--27. "COREDGENANA,Core Degeneration" "0: Do not apply core degeneration resistence,1: Apply 33 ohm core degeneration resistence,2: Apply 50 ohm core degeneration resistence,3: Apply 100 ohm core degeneration resistence"
|
|
newline
|
|
bitfld.long 0x0 24.--25. "CTUNEFIXANA,Fixed Tuning Capacitance" "0: Remove fixed capacitance on XI and XO nodes,1: Adds fixed capacitance on XI node,2: Adds fixed capacitance on XO node,3: Adds fixed capacitance on both XI and XO nodes"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CTUNEXOANA,Tuning Capacitance on XO"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "CTUNEXIANA,Tuning Capacitance on XI"
|
|
hexmask.long.byte 0x0 0.--7. 1. "COREBIASANA,Core Bias Current"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "CFG,No Description"
|
|
bitfld.long 0x0 3. "SQBUFSCHTRGANA,Squaring Buffer Schmitt Trigger" "0: Squaring buffer schmitt trigger is disabled,1: Squaring buffer schmitt trigger is enabled"
|
|
bitfld.long 0x0 2. "ENXIDCBIASANA,Enable XI Internal DC Bias" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "MODE,Crystal Oscillator Mode" "0: crystal oscillator,1: external sinusoidal clock can be supplied on XI.."
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "CTRL,No Description"
|
|
bitfld.long 0x0 5. "FORCEXO2GNDANA,Force XO Pin to Ground" "0: Disabled (not pulled),1: Enabled (pulled)"
|
|
bitfld.long 0x0 4. "FORCEXI2GNDANA,Force XI Pin to Ground" "0: Disabled (not pulled),1: Enabled (pulled)"
|
|
newline
|
|
bitfld.long 0x0 2. "KEEPWARM,Keep Warm" "0,1"
|
|
bitfld.long 0x0 1. "DISONDEMAND,Disable On-demand Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "FORCEEN,Force Enable" "0,1"
|
|
wgroup.long 0x50++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 1. "MANUALOVERRIDE,Manual Override" "0,1"
|
|
bitfld.long 0x0 0. "COREBIASOPT,Core Bias Optimizaton" "0,1"
|
|
rgroup.long 0x58++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 31. "LOCK,Configuration Lock Status" "0: Configuration lock is unlocked,1: Configuration lock is locked"
|
|
bitfld.long 0x0 30. "FSMLOCK,FSM Lock Status" "0: FSM lock is unlocked,1: FSM lock is locked"
|
|
newline
|
|
bitfld.long 0x0 19. "ISWARM,Oscillator Is Kept Warm" "0,1"
|
|
bitfld.long 0x0 17. "HWREQ,Oscillator Requested by Hardware" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "ENS,Enabled Status" "0,1"
|
|
bitfld.long 0x0 1. "COREBIASOPTRDY,Core Bias Optimization Ready" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RDY,Ready Status" "0,1"
|
|
group.long 0x70++0x7
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 31. "COREBIASOPTERR,Core Bias Optimization Error Interrupt" "0,1"
|
|
bitfld.long 0x0 29. "DNSERR,Did Not Start Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "COREBIASOPTRDY,Core Bias Optimization Ready Interrupt" "0,1"
|
|
bitfld.long 0x0 0. "RDY,Ready Interrupt" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 31. "COREBIASOPTERR,Core Bias Optimization Error Interrupt" "0,1"
|
|
bitfld.long 0x4 29. "DNSERR,Did Not Start Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "COREBIASOPTRDY,Core Bias Optimization Ready Interrupt" "0,1"
|
|
bitfld.long 0x4 0. "RDY,Ready Interrupt" "0,1"
|
|
wgroup.long 0x80++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Configuration Lock Key"
|
|
tree.end
|
|
tree.end
|
|
tree "I2C (Inter-Integrated Circuit Interface)"
|
|
base ad:0x0
|
|
tree "I2C0_NS"
|
|
base ad:0x5A010000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP version ID"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,module enable" "0: Disable Peripheral Clock,1: Enable Peripheral Clock"
|
|
line.long 0x4 "CTRL,No Description"
|
|
bitfld.long 0x4 21. "SDAMONEN,SDA Monitor Enable" "0: Disable SDA Monitor,1: Enable SDA Monitor"
|
|
bitfld.long 0x4 20. "SCLMONEN,SCL Monitor Enable" "0: Disable SCL monitor,1: Enable SCL monitor"
|
|
newline
|
|
bitfld.long 0x4 16.--18. "CLTO,Clock Low Timeout" "0: Timeout disabled,1: Timeout after 40 prescaled clock cycles. In..,2: Timeout after 80 prescaled clock cycles. In..,3: Timeout after 160 prescaled clock cycles. In..,4: Timeout after 320 prescaled clock cycles. In..,5: Timeout after 1024 prescaled clock cycles. In..,?,?"
|
|
bitfld.long 0x4 15. "GIBITO,Go Idle on Bus Idle Timeout" "0: A bus idle timeout has no effect on the bus state.,1: A bus idle timeout tells the I2C module that the.."
|
|
newline
|
|
bitfld.long 0x4 12.--13. "BITO,Bus Idle Timeout" "0: Timeout disabled,1: Timeout after 40 prescaled clock cycles. In..,2: Timeout after 80 prescaled clock cycles. In..,3: Timeout after 160 prescaled clock cycles. In.."
|
|
bitfld.long 0x4 8.--9. "CLHR,Clock Low High Ratio" "0: Nlow=4 and Nhigh=4 and the Nlow:Nhigh ratio is 4:4,1: Nlow=6 and Nhigh=3 and the Nlow:Nhigh ratio is 6:3,2: Nlow=11 and Nhigh=6 and the Nlow:Nhigh ratio is..,?"
|
|
newline
|
|
bitfld.long 0x4 7. "TXBIL,TX Buffer Interrupt Level" "0: TXBL status and the TXBL interrupt flag are set..,1: TXBL status and the TXBL interrupt flag are set.."
|
|
bitfld.long 0x4 6. "GCAMEN,General Call Address Match Enable" "0: General call address will be NACK'ed if it is..,1: When a general call address is received a.."
|
|
newline
|
|
bitfld.long 0x4 5. "ARBDIS,Arbitration Disable" "0: When a device loses arbitration the ARBIF..,1: When a device loses arbitration the ARBIF.."
|
|
bitfld.long 0x4 4. "AUTOSN,Automatic STOP on NACK" "0: Stop is not automatically sent if a NACK is..,1: The leader automatically sends a STOP if a NACK.."
|
|
newline
|
|
bitfld.long 0x4 3. "AUTOSE,Automatic STOP when Empty" "0: A stop must be sent manually when no more data..,1: The leader automatically sends a STOP when no.."
|
|
bitfld.long 0x4 2. "AUTOACK,Automatic Acknowledge" "0: Software must give one ACK command for each ACK..,1: Addresses that are not automatically NACK'ed and.."
|
|
newline
|
|
bitfld.long 0x4 1. "SLAVE,Addressable as Follower" "0: All addresses will be responded to with a NACK,1: Addresses matching the programmed follower.."
|
|
bitfld.long 0x4 0. "CORERST,Soft Reset the internal state registers" "0: No change to internal state registers,1: Reset the internal state registers"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 7. "CLEARPC,Clear Pending Commands" "0,1"
|
|
bitfld.long 0x0 6. "CLEARTX,Clear TX" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ABORT,Abort transmission" "0,1"
|
|
bitfld.long 0x0 4. "CONT,Continue transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "NACK,Send NACK" "0,1"
|
|
bitfld.long 0x0 2. "ACK,Send ACK" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "STOP,Send stop condition" "0,1"
|
|
bitfld.long 0x0 0. "START,Send start condition" "0,1"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "STATE,No Description"
|
|
bitfld.long 0x0 5.--7. "STATE,Transmission State" "0: No transmission is being performed.,1: Waiting for idle. Will send a start condition as..,2: Start transmit phase,3: Address transmit or receive phase,4: Address ack/nack transmit or receive phase,5: Data transmit or receive phase,6: Data ack/nack transmit or receive phase,?"
|
|
bitfld.long 0x0 4. "BUSHOLD,Bus Held" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "NACKED,Nack Received" "0,1"
|
|
bitfld.long 0x0 2. "TRANSMITTER,Transmitter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "MASTER,Leader" "0,1"
|
|
bitfld.long 0x0 0. "BUSY,Bus Busy" "0,1"
|
|
line.long 0x4 "STATUS,No Description"
|
|
bitfld.long 0x4 10.--11. "TXBUFCNT,TX Buffer Count" "0,1,2,3"
|
|
bitfld.long 0x4 9. "RXFULL,RX FIFO Full" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "RXDATAV,RX Data Valid" "0,1"
|
|
bitfld.long 0x4 7. "TXBL,TX Buffer Level" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "TXC,TX Complete" "0,1"
|
|
bitfld.long 0x4 5. "PABORT,Pending abort" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "PCONT,Pending continue" "0,1"
|
|
bitfld.long 0x4 3. "PNACK,Pending NACK" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "PACK,Pending ACK" "0,1"
|
|
bitfld.long 0x4 1. "PSTOP,Pending STOP" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "PSTART,Pending START" "0,1"
|
|
group.long 0x18++0xB
|
|
line.long 0x0 "CLKDIV,No Description"
|
|
hexmask.long.word 0x0 0.--8. 1. "DIV,Clock Divider"
|
|
line.long 0x4 "SADDR,No Description"
|
|
hexmask.long.byte 0x4 1.--7. 1. "ADDR,Follower address"
|
|
line.long 0x8 "SADDRMASK,No Description"
|
|
hexmask.long.byte 0x8 1.--7. 1. "SADDRMASK,Follower Address Mask"
|
|
rgroup.long 0x24++0xF
|
|
line.long 0x0 "RXDATA,No Description"
|
|
hexmask.long.byte 0x0 0.--7. 1. "RXDATA,RX Data"
|
|
line.long 0x4 "RXDOUBLE,No Description"
|
|
hexmask.long.byte 0x4 8.--15. 1. "RXDATA1,RX Data 1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "RXDATA0,RX Data 0"
|
|
line.long 0x8 "RXDATAP,No Description"
|
|
hexmask.long.byte 0x8 0.--7. 1. "RXDATAP,RX Data Peek"
|
|
line.long 0xC "RXDOUBLEP,No Description"
|
|
hexmask.long.byte 0xC 8.--15. 1. "RXDATAP1,RX Data 1 Peek"
|
|
hexmask.long.byte 0xC 0.--7. 1. "RXDATAP0,RX Data 0 Peek"
|
|
wgroup.long 0x34++0x7
|
|
line.long 0x0 "TXDATA,No Description"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,TX Data"
|
|
line.long 0x4 "TXDOUBLE,No Description"
|
|
hexmask.long.byte 0x4 8.--15. 1. "TXDATA1,TX Data"
|
|
hexmask.long.byte 0x4 0.--7. 1. "TXDATA0,TX Data"
|
|
group.long 0x3C++0x7
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 20. "SDAERR,SDA Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 19. "SCLERR,SCL Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "CLERR,Clock Low Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 17. "RXFULL,Receive Buffer Full Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "SSTOP,Follower STOP condition Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 15. "CLTO,Clock Low Timeout Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "BITO,Bus Idle Timeout Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 13. "RXUF,Receive Buffer Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "TXOF,Transmit Buffer Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 11. "BUSHOLD,Bus Held Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "BUSERR,Bus Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 9. "ARBLOST,Arbitration Lost Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "MSTOP,Leader STOP Condition Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 7. "NACK,Not Acknowledge Received Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "ACK,Acknowledge Received Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 5. "RXDATAV,Receive Data Valid Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "TXBL,Transmit Buffer Level Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 3. "TXC,Transfer Completed Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "ADDR,Address Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 1. "RSTART,Repeated START condition Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "START,START condition Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 20. "SDAERR,SDA Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 19. "SCLERR,SCL Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "CLERR,Clock Low Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 17. "RXFULL,Receive Buffer Full Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "SSTOP,Follower STOP condition Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 15. "CLTO,Clock Low Timeout Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "BITO,Bus Idle Timeout Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 13. "RXUF,Receive Buffer Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "TXOF,Transmit Buffer Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 11. "BUSHOLD,Bus Held Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "BUSERR,Bus Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 9. "ARBLOST,Arbitration Lost Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "MSTOP,Leader STOP Condition Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 7. "NACK,Not Acknowledge Received Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "ACK,Acknowledge Received Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 5. "RXDATAV,Receive Data Valid Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "TXBL,Transmit Buffer Level Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 3. "TXC,Transfer Completed Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "ADDR,Address Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 1. "RSTART,Repeated START condition Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "START,START condition Interrupt Flag" "0,1"
|
|
tree.end
|
|
tree "I2C0_S"
|
|
base ad:0x4A010000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP version ID"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,module enable" "0: Disable Peripheral Clock,1: Enable Peripheral Clock"
|
|
line.long 0x4 "CTRL,No Description"
|
|
bitfld.long 0x4 21. "SDAMONEN,SDA Monitor Enable" "0: Disable SDA Monitor,1: Enable SDA Monitor"
|
|
bitfld.long 0x4 20. "SCLMONEN,SCL Monitor Enable" "0: Disable SCL monitor,1: Enable SCL monitor"
|
|
newline
|
|
bitfld.long 0x4 16.--18. "CLTO,Clock Low Timeout" "0: Timeout disabled,1: Timeout after 40 prescaled clock cycles. In..,2: Timeout after 80 prescaled clock cycles. In..,3: Timeout after 160 prescaled clock cycles. In..,4: Timeout after 320 prescaled clock cycles. In..,5: Timeout after 1024 prescaled clock cycles. In..,?,?"
|
|
bitfld.long 0x4 15. "GIBITO,Go Idle on Bus Idle Timeout" "0: A bus idle timeout has no effect on the bus state.,1: A bus idle timeout tells the I2C module that the.."
|
|
newline
|
|
bitfld.long 0x4 12.--13. "BITO,Bus Idle Timeout" "0: Timeout disabled,1: Timeout after 40 prescaled clock cycles. In..,2: Timeout after 80 prescaled clock cycles. In..,3: Timeout after 160 prescaled clock cycles. In.."
|
|
bitfld.long 0x4 8.--9. "CLHR,Clock Low High Ratio" "0: Nlow=4 and Nhigh=4 and the Nlow:Nhigh ratio is 4:4,1: Nlow=6 and Nhigh=3 and the Nlow:Nhigh ratio is 6:3,2: Nlow=11 and Nhigh=6 and the Nlow:Nhigh ratio is..,?"
|
|
newline
|
|
bitfld.long 0x4 7. "TXBIL,TX Buffer Interrupt Level" "0: TXBL status and the TXBL interrupt flag are set..,1: TXBL status and the TXBL interrupt flag are set.."
|
|
bitfld.long 0x4 6. "GCAMEN,General Call Address Match Enable" "0: General call address will be NACK'ed if it is..,1: When a general call address is received a.."
|
|
newline
|
|
bitfld.long 0x4 5. "ARBDIS,Arbitration Disable" "0: When a device loses arbitration the ARBIF..,1: When a device loses arbitration the ARBIF.."
|
|
bitfld.long 0x4 4. "AUTOSN,Automatic STOP on NACK" "0: Stop is not automatically sent if a NACK is..,1: The leader automatically sends a STOP if a NACK.."
|
|
newline
|
|
bitfld.long 0x4 3. "AUTOSE,Automatic STOP when Empty" "0: A stop must be sent manually when no more data..,1: The leader automatically sends a STOP when no.."
|
|
bitfld.long 0x4 2. "AUTOACK,Automatic Acknowledge" "0: Software must give one ACK command for each ACK..,1: Addresses that are not automatically NACK'ed and.."
|
|
newline
|
|
bitfld.long 0x4 1. "SLAVE,Addressable as Follower" "0: All addresses will be responded to with a NACK,1: Addresses matching the programmed follower.."
|
|
bitfld.long 0x4 0. "CORERST,Soft Reset the internal state registers" "0: No change to internal state registers,1: Reset the internal state registers"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 7. "CLEARPC,Clear Pending Commands" "0,1"
|
|
bitfld.long 0x0 6. "CLEARTX,Clear TX" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ABORT,Abort transmission" "0,1"
|
|
bitfld.long 0x0 4. "CONT,Continue transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "NACK,Send NACK" "0,1"
|
|
bitfld.long 0x0 2. "ACK,Send ACK" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "STOP,Send stop condition" "0,1"
|
|
bitfld.long 0x0 0. "START,Send start condition" "0,1"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "STATE,No Description"
|
|
bitfld.long 0x0 5.--7. "STATE,Transmission State" "0: No transmission is being performed.,1: Waiting for idle. Will send a start condition as..,2: Start transmit phase,3: Address transmit or receive phase,4: Address ack/nack transmit or receive phase,5: Data transmit or receive phase,6: Data ack/nack transmit or receive phase,?"
|
|
bitfld.long 0x0 4. "BUSHOLD,Bus Held" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "NACKED,Nack Received" "0,1"
|
|
bitfld.long 0x0 2. "TRANSMITTER,Transmitter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "MASTER,Leader" "0,1"
|
|
bitfld.long 0x0 0. "BUSY,Bus Busy" "0,1"
|
|
line.long 0x4 "STATUS,No Description"
|
|
bitfld.long 0x4 10.--11. "TXBUFCNT,TX Buffer Count" "0,1,2,3"
|
|
bitfld.long 0x4 9. "RXFULL,RX FIFO Full" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "RXDATAV,RX Data Valid" "0,1"
|
|
bitfld.long 0x4 7. "TXBL,TX Buffer Level" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "TXC,TX Complete" "0,1"
|
|
bitfld.long 0x4 5. "PABORT,Pending abort" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "PCONT,Pending continue" "0,1"
|
|
bitfld.long 0x4 3. "PNACK,Pending NACK" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "PACK,Pending ACK" "0,1"
|
|
bitfld.long 0x4 1. "PSTOP,Pending STOP" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "PSTART,Pending START" "0,1"
|
|
group.long 0x18++0xB
|
|
line.long 0x0 "CLKDIV,No Description"
|
|
hexmask.long.word 0x0 0.--8. 1. "DIV,Clock Divider"
|
|
line.long 0x4 "SADDR,No Description"
|
|
hexmask.long.byte 0x4 1.--7. 1. "ADDR,Follower address"
|
|
line.long 0x8 "SADDRMASK,No Description"
|
|
hexmask.long.byte 0x8 1.--7. 1. "SADDRMASK,Follower Address Mask"
|
|
rgroup.long 0x24++0xF
|
|
line.long 0x0 "RXDATA,No Description"
|
|
hexmask.long.byte 0x0 0.--7. 1. "RXDATA,RX Data"
|
|
line.long 0x4 "RXDOUBLE,No Description"
|
|
hexmask.long.byte 0x4 8.--15. 1. "RXDATA1,RX Data 1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "RXDATA0,RX Data 0"
|
|
line.long 0x8 "RXDATAP,No Description"
|
|
hexmask.long.byte 0x8 0.--7. 1. "RXDATAP,RX Data Peek"
|
|
line.long 0xC "RXDOUBLEP,No Description"
|
|
hexmask.long.byte 0xC 8.--15. 1. "RXDATAP1,RX Data 1 Peek"
|
|
hexmask.long.byte 0xC 0.--7. 1. "RXDATAP0,RX Data 0 Peek"
|
|
wgroup.long 0x34++0x7
|
|
line.long 0x0 "TXDATA,No Description"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,TX Data"
|
|
line.long 0x4 "TXDOUBLE,No Description"
|
|
hexmask.long.byte 0x4 8.--15. 1. "TXDATA1,TX Data"
|
|
hexmask.long.byte 0x4 0.--7. 1. "TXDATA0,TX Data"
|
|
group.long 0x3C++0x7
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 20. "SDAERR,SDA Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 19. "SCLERR,SCL Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "CLERR,Clock Low Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 17. "RXFULL,Receive Buffer Full Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "SSTOP,Follower STOP condition Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 15. "CLTO,Clock Low Timeout Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "BITO,Bus Idle Timeout Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 13. "RXUF,Receive Buffer Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "TXOF,Transmit Buffer Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 11. "BUSHOLD,Bus Held Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "BUSERR,Bus Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 9. "ARBLOST,Arbitration Lost Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "MSTOP,Leader STOP Condition Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 7. "NACK,Not Acknowledge Received Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "ACK,Acknowledge Received Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 5. "RXDATAV,Receive Data Valid Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "TXBL,Transmit Buffer Level Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 3. "TXC,Transfer Completed Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "ADDR,Address Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 1. "RSTART,Repeated START condition Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "START,START condition Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 20. "SDAERR,SDA Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 19. "SCLERR,SCL Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "CLERR,Clock Low Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 17. "RXFULL,Receive Buffer Full Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "SSTOP,Follower STOP condition Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 15. "CLTO,Clock Low Timeout Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "BITO,Bus Idle Timeout Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 13. "RXUF,Receive Buffer Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "TXOF,Transmit Buffer Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 11. "BUSHOLD,Bus Held Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "BUSERR,Bus Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 9. "ARBLOST,Arbitration Lost Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "MSTOP,Leader STOP Condition Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 7. "NACK,Not Acknowledge Received Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "ACK,Acknowledge Received Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 5. "RXDATAV,Receive Data Valid Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "TXBL,Transmit Buffer Level Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 3. "TXC,Transfer Completed Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "ADDR,Address Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 1. "RSTART,Repeated START condition Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "START,START condition Interrupt Flag" "0,1"
|
|
tree.end
|
|
tree "I2C1_NS"
|
|
base ad:0x50068000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP version ID"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,module enable" "0: Disable Peripheral Clock,1: Enable Peripheral Clock"
|
|
line.long 0x4 "CTRL,No Description"
|
|
bitfld.long 0x4 21. "SDAMONEN,SDA Monitor Enable" "0: Disable SDA Monitor,1: Enable SDA Monitor"
|
|
bitfld.long 0x4 20. "SCLMONEN,SCL Monitor Enable" "0: Disable SCL monitor,1: Enable SCL monitor"
|
|
newline
|
|
bitfld.long 0x4 16.--18. "CLTO,Clock Low Timeout" "0: Timeout disabled,1: Timeout after 40 prescaled clock cycles. In..,2: Timeout after 80 prescaled clock cycles. In..,3: Timeout after 160 prescaled clock cycles. In..,4: Timeout after 320 prescaled clock cycles. In..,5: Timeout after 1024 prescaled clock cycles. In..,?,?"
|
|
bitfld.long 0x4 15. "GIBITO,Go Idle on Bus Idle Timeout" "0: A bus idle timeout has no effect on the bus state.,1: A bus idle timeout tells the I2C module that the.."
|
|
newline
|
|
bitfld.long 0x4 12.--13. "BITO,Bus Idle Timeout" "0: Timeout disabled,1: Timeout after 40 prescaled clock cycles. In..,2: Timeout after 80 prescaled clock cycles. In..,3: Timeout after 160 prescaled clock cycles. In.."
|
|
bitfld.long 0x4 8.--9. "CLHR,Clock Low High Ratio" "0: Nlow=4 and Nhigh=4 and the Nlow:Nhigh ratio is 4:4,1: Nlow=6 and Nhigh=3 and the Nlow:Nhigh ratio is 6:3,2: Nlow=11 and Nhigh=6 and the Nlow:Nhigh ratio is..,?"
|
|
newline
|
|
bitfld.long 0x4 7. "TXBIL,TX Buffer Interrupt Level" "0: TXBL status and the TXBL interrupt flag are set..,1: TXBL status and the TXBL interrupt flag are set.."
|
|
bitfld.long 0x4 6. "GCAMEN,General Call Address Match Enable" "0: General call address will be NACK'ed if it is..,1: When a general call address is received a.."
|
|
newline
|
|
bitfld.long 0x4 5. "ARBDIS,Arbitration Disable" "0: When a device loses arbitration the ARBIF..,1: When a device loses arbitration the ARBIF.."
|
|
bitfld.long 0x4 4. "AUTOSN,Automatic STOP on NACK" "0: Stop is not automatically sent if a NACK is..,1: The leader automatically sends a STOP if a NACK.."
|
|
newline
|
|
bitfld.long 0x4 3. "AUTOSE,Automatic STOP when Empty" "0: A stop must be sent manually when no more data..,1: The leader automatically sends a STOP when no.."
|
|
bitfld.long 0x4 2. "AUTOACK,Automatic Acknowledge" "0: Software must give one ACK command for each ACK..,1: Addresses that are not automatically NACK'ed and.."
|
|
newline
|
|
bitfld.long 0x4 1. "SLAVE,Addressable as Follower" "0: All addresses will be responded to with a NACK,1: Addresses matching the programmed follower.."
|
|
bitfld.long 0x4 0. "CORERST,Soft Reset the internal state registers" "0: No change to internal state registers,1: Reset the internal state registers"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 7. "CLEARPC,Clear Pending Commands" "0,1"
|
|
bitfld.long 0x0 6. "CLEARTX,Clear TX" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ABORT,Abort transmission" "0,1"
|
|
bitfld.long 0x0 4. "CONT,Continue transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "NACK,Send NACK" "0,1"
|
|
bitfld.long 0x0 2. "ACK,Send ACK" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "STOP,Send stop condition" "0,1"
|
|
bitfld.long 0x0 0. "START,Send start condition" "0,1"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "STATE,No Description"
|
|
bitfld.long 0x0 5.--7. "STATE,Transmission State" "0: No transmission is being performed.,1: Waiting for idle. Will send a start condition as..,2: Start transmit phase,3: Address transmit or receive phase,4: Address ack/nack transmit or receive phase,5: Data transmit or receive phase,6: Data ack/nack transmit or receive phase,?"
|
|
bitfld.long 0x0 4. "BUSHOLD,Bus Held" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "NACKED,Nack Received" "0,1"
|
|
bitfld.long 0x0 2. "TRANSMITTER,Transmitter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "MASTER,Leader" "0,1"
|
|
bitfld.long 0x0 0. "BUSY,Bus Busy" "0,1"
|
|
line.long 0x4 "STATUS,No Description"
|
|
bitfld.long 0x4 10.--11. "TXBUFCNT,TX Buffer Count" "0,1,2,3"
|
|
bitfld.long 0x4 9. "RXFULL,RX FIFO Full" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "RXDATAV,RX Data Valid" "0,1"
|
|
bitfld.long 0x4 7. "TXBL,TX Buffer Level" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "TXC,TX Complete" "0,1"
|
|
bitfld.long 0x4 5. "PABORT,Pending abort" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "PCONT,Pending continue" "0,1"
|
|
bitfld.long 0x4 3. "PNACK,Pending NACK" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "PACK,Pending ACK" "0,1"
|
|
bitfld.long 0x4 1. "PSTOP,Pending STOP" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "PSTART,Pending START" "0,1"
|
|
group.long 0x18++0xB
|
|
line.long 0x0 "CLKDIV,No Description"
|
|
hexmask.long.word 0x0 0.--8. 1. "DIV,Clock Divider"
|
|
line.long 0x4 "SADDR,No Description"
|
|
hexmask.long.byte 0x4 1.--7. 1. "ADDR,Follower address"
|
|
line.long 0x8 "SADDRMASK,No Description"
|
|
hexmask.long.byte 0x8 1.--7. 1. "SADDRMASK,Follower Address Mask"
|
|
rgroup.long 0x24++0xF
|
|
line.long 0x0 "RXDATA,No Description"
|
|
hexmask.long.byte 0x0 0.--7. 1. "RXDATA,RX Data"
|
|
line.long 0x4 "RXDOUBLE,No Description"
|
|
hexmask.long.byte 0x4 8.--15. 1. "RXDATA1,RX Data 1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "RXDATA0,RX Data 0"
|
|
line.long 0x8 "RXDATAP,No Description"
|
|
hexmask.long.byte 0x8 0.--7. 1. "RXDATAP,RX Data Peek"
|
|
line.long 0xC "RXDOUBLEP,No Description"
|
|
hexmask.long.byte 0xC 8.--15. 1. "RXDATAP1,RX Data 1 Peek"
|
|
hexmask.long.byte 0xC 0.--7. 1. "RXDATAP0,RX Data 0 Peek"
|
|
wgroup.long 0x34++0x7
|
|
line.long 0x0 "TXDATA,No Description"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,TX Data"
|
|
line.long 0x4 "TXDOUBLE,No Description"
|
|
hexmask.long.byte 0x4 8.--15. 1. "TXDATA1,TX Data"
|
|
hexmask.long.byte 0x4 0.--7. 1. "TXDATA0,TX Data"
|
|
group.long 0x3C++0x7
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 20. "SDAERR,SDA Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 19. "SCLERR,SCL Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "CLERR,Clock Low Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 17. "RXFULL,Receive Buffer Full Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "SSTOP,Follower STOP condition Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 15. "CLTO,Clock Low Timeout Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "BITO,Bus Idle Timeout Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 13. "RXUF,Receive Buffer Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "TXOF,Transmit Buffer Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 11. "BUSHOLD,Bus Held Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "BUSERR,Bus Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 9. "ARBLOST,Arbitration Lost Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "MSTOP,Leader STOP Condition Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 7. "NACK,Not Acknowledge Received Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "ACK,Acknowledge Received Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 5. "RXDATAV,Receive Data Valid Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "TXBL,Transmit Buffer Level Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 3. "TXC,Transfer Completed Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "ADDR,Address Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 1. "RSTART,Repeated START condition Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "START,START condition Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 20. "SDAERR,SDA Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 19. "SCLERR,SCL Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "CLERR,Clock Low Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 17. "RXFULL,Receive Buffer Full Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "SSTOP,Follower STOP condition Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 15. "CLTO,Clock Low Timeout Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "BITO,Bus Idle Timeout Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 13. "RXUF,Receive Buffer Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "TXOF,Transmit Buffer Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 11. "BUSHOLD,Bus Held Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "BUSERR,Bus Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 9. "ARBLOST,Arbitration Lost Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "MSTOP,Leader STOP Condition Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 7. "NACK,Not Acknowledge Received Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "ACK,Acknowledge Received Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 5. "RXDATAV,Receive Data Valid Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "TXBL,Transmit Buffer Level Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 3. "TXC,Transfer Completed Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "ADDR,Address Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 1. "RSTART,Repeated START condition Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "START,START condition Interrupt Flag" "0,1"
|
|
tree.end
|
|
tree "I2C1_S"
|
|
base ad:0x40068000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP version ID"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,module enable" "0: Disable Peripheral Clock,1: Enable Peripheral Clock"
|
|
line.long 0x4 "CTRL,No Description"
|
|
bitfld.long 0x4 21. "SDAMONEN,SDA Monitor Enable" "0: Disable SDA Monitor,1: Enable SDA Monitor"
|
|
bitfld.long 0x4 20. "SCLMONEN,SCL Monitor Enable" "0: Disable SCL monitor,1: Enable SCL monitor"
|
|
newline
|
|
bitfld.long 0x4 16.--18. "CLTO,Clock Low Timeout" "0: Timeout disabled,1: Timeout after 40 prescaled clock cycles. In..,2: Timeout after 80 prescaled clock cycles. In..,3: Timeout after 160 prescaled clock cycles. In..,4: Timeout after 320 prescaled clock cycles. In..,5: Timeout after 1024 prescaled clock cycles. In..,?,?"
|
|
bitfld.long 0x4 15. "GIBITO,Go Idle on Bus Idle Timeout" "0: A bus idle timeout has no effect on the bus state.,1: A bus idle timeout tells the I2C module that the.."
|
|
newline
|
|
bitfld.long 0x4 12.--13. "BITO,Bus Idle Timeout" "0: Timeout disabled,1: Timeout after 40 prescaled clock cycles. In..,2: Timeout after 80 prescaled clock cycles. In..,3: Timeout after 160 prescaled clock cycles. In.."
|
|
bitfld.long 0x4 8.--9. "CLHR,Clock Low High Ratio" "0: Nlow=4 and Nhigh=4 and the Nlow:Nhigh ratio is 4:4,1: Nlow=6 and Nhigh=3 and the Nlow:Nhigh ratio is 6:3,2: Nlow=11 and Nhigh=6 and the Nlow:Nhigh ratio is..,?"
|
|
newline
|
|
bitfld.long 0x4 7. "TXBIL,TX Buffer Interrupt Level" "0: TXBL status and the TXBL interrupt flag are set..,1: TXBL status and the TXBL interrupt flag are set.."
|
|
bitfld.long 0x4 6. "GCAMEN,General Call Address Match Enable" "0: General call address will be NACK'ed if it is..,1: When a general call address is received a.."
|
|
newline
|
|
bitfld.long 0x4 5. "ARBDIS,Arbitration Disable" "0: When a device loses arbitration the ARBIF..,1: When a device loses arbitration the ARBIF.."
|
|
bitfld.long 0x4 4. "AUTOSN,Automatic STOP on NACK" "0: Stop is not automatically sent if a NACK is..,1: The leader automatically sends a STOP if a NACK.."
|
|
newline
|
|
bitfld.long 0x4 3. "AUTOSE,Automatic STOP when Empty" "0: A stop must be sent manually when no more data..,1: The leader automatically sends a STOP when no.."
|
|
bitfld.long 0x4 2. "AUTOACK,Automatic Acknowledge" "0: Software must give one ACK command for each ACK..,1: Addresses that are not automatically NACK'ed and.."
|
|
newline
|
|
bitfld.long 0x4 1. "SLAVE,Addressable as Follower" "0: All addresses will be responded to with a NACK,1: Addresses matching the programmed follower.."
|
|
bitfld.long 0x4 0. "CORERST,Soft Reset the internal state registers" "0: No change to internal state registers,1: Reset the internal state registers"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 7. "CLEARPC,Clear Pending Commands" "0,1"
|
|
bitfld.long 0x0 6. "CLEARTX,Clear TX" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ABORT,Abort transmission" "0,1"
|
|
bitfld.long 0x0 4. "CONT,Continue transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "NACK,Send NACK" "0,1"
|
|
bitfld.long 0x0 2. "ACK,Send ACK" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "STOP,Send stop condition" "0,1"
|
|
bitfld.long 0x0 0. "START,Send start condition" "0,1"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "STATE,No Description"
|
|
bitfld.long 0x0 5.--7. "STATE,Transmission State" "0: No transmission is being performed.,1: Waiting for idle. Will send a start condition as..,2: Start transmit phase,3: Address transmit or receive phase,4: Address ack/nack transmit or receive phase,5: Data transmit or receive phase,6: Data ack/nack transmit or receive phase,?"
|
|
bitfld.long 0x0 4. "BUSHOLD,Bus Held" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "NACKED,Nack Received" "0,1"
|
|
bitfld.long 0x0 2. "TRANSMITTER,Transmitter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "MASTER,Leader" "0,1"
|
|
bitfld.long 0x0 0. "BUSY,Bus Busy" "0,1"
|
|
line.long 0x4 "STATUS,No Description"
|
|
bitfld.long 0x4 10.--11. "TXBUFCNT,TX Buffer Count" "0,1,2,3"
|
|
bitfld.long 0x4 9. "RXFULL,RX FIFO Full" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "RXDATAV,RX Data Valid" "0,1"
|
|
bitfld.long 0x4 7. "TXBL,TX Buffer Level" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "TXC,TX Complete" "0,1"
|
|
bitfld.long 0x4 5. "PABORT,Pending abort" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "PCONT,Pending continue" "0,1"
|
|
bitfld.long 0x4 3. "PNACK,Pending NACK" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "PACK,Pending ACK" "0,1"
|
|
bitfld.long 0x4 1. "PSTOP,Pending STOP" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "PSTART,Pending START" "0,1"
|
|
group.long 0x18++0xB
|
|
line.long 0x0 "CLKDIV,No Description"
|
|
hexmask.long.word 0x0 0.--8. 1. "DIV,Clock Divider"
|
|
line.long 0x4 "SADDR,No Description"
|
|
hexmask.long.byte 0x4 1.--7. 1. "ADDR,Follower address"
|
|
line.long 0x8 "SADDRMASK,No Description"
|
|
hexmask.long.byte 0x8 1.--7. 1. "SADDRMASK,Follower Address Mask"
|
|
rgroup.long 0x24++0xF
|
|
line.long 0x0 "RXDATA,No Description"
|
|
hexmask.long.byte 0x0 0.--7. 1. "RXDATA,RX Data"
|
|
line.long 0x4 "RXDOUBLE,No Description"
|
|
hexmask.long.byte 0x4 8.--15. 1. "RXDATA1,RX Data 1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "RXDATA0,RX Data 0"
|
|
line.long 0x8 "RXDATAP,No Description"
|
|
hexmask.long.byte 0x8 0.--7. 1. "RXDATAP,RX Data Peek"
|
|
line.long 0xC "RXDOUBLEP,No Description"
|
|
hexmask.long.byte 0xC 8.--15. 1. "RXDATAP1,RX Data 1 Peek"
|
|
hexmask.long.byte 0xC 0.--7. 1. "RXDATAP0,RX Data 0 Peek"
|
|
wgroup.long 0x34++0x7
|
|
line.long 0x0 "TXDATA,No Description"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,TX Data"
|
|
line.long 0x4 "TXDOUBLE,No Description"
|
|
hexmask.long.byte 0x4 8.--15. 1. "TXDATA1,TX Data"
|
|
hexmask.long.byte 0x4 0.--7. 1. "TXDATA0,TX Data"
|
|
group.long 0x3C++0x7
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 20. "SDAERR,SDA Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 19. "SCLERR,SCL Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "CLERR,Clock Low Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 17. "RXFULL,Receive Buffer Full Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "SSTOP,Follower STOP condition Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 15. "CLTO,Clock Low Timeout Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "BITO,Bus Idle Timeout Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 13. "RXUF,Receive Buffer Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "TXOF,Transmit Buffer Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 11. "BUSHOLD,Bus Held Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "BUSERR,Bus Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 9. "ARBLOST,Arbitration Lost Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "MSTOP,Leader STOP Condition Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 7. "NACK,Not Acknowledge Received Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "ACK,Acknowledge Received Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 5. "RXDATAV,Receive Data Valid Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "TXBL,Transmit Buffer Level Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 3. "TXC,Transfer Completed Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "ADDR,Address Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 1. "RSTART,Repeated START condition Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "START,START condition Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 20. "SDAERR,SDA Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 19. "SCLERR,SCL Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "CLERR,Clock Low Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 17. "RXFULL,Receive Buffer Full Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "SSTOP,Follower STOP condition Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 15. "CLTO,Clock Low Timeout Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "BITO,Bus Idle Timeout Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 13. "RXUF,Receive Buffer Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "TXOF,Transmit Buffer Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 11. "BUSHOLD,Bus Held Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "BUSERR,Bus Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 9. "ARBLOST,Arbitration Lost Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "MSTOP,Leader STOP Condition Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 7. "NACK,Not Acknowledge Received Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "ACK,Acknowledge Received Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 5. "RXDATAV,Receive Data Valid Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "TXBL,Transmit Buffer Level Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 3. "TXC,Transfer Completed Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "ADDR,Address Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 1. "RSTART,Repeated START condition Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "START,START condition Interrupt Flag" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "IADC (Incremental Analog to Digital Converter)"
|
|
base ad:0x0
|
|
tree "IADC0_NS"
|
|
base ad:0x5A004000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,IPVERSION"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP version ID"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "EN,Enable"
|
|
bitfld.long 0x0 0. "EN,Enable IADC Module" "0: Disable,1: Enable"
|
|
line.long 0x4 "CTRL,Control"
|
|
bitfld.long 0x4 28.--30. "HSCLKRATE,High Speed Clock Rate" "0: Use CMU_CLK_ADC directly. The source clock must..,1: Divide CMU_CLK_ADC by 2 before using it. The..,2: Divide CMU_CLK_ADC by 3 before using it. The..,3: Divide CMU_CLK_ADC by 4 before using it. The..,?,?,?,?"
|
|
newline
|
|
hexmask.long.byte 0x4 16.--22. 1. "TIMEBASE,Time Base"
|
|
newline
|
|
bitfld.long 0x4 4.--5. "WARMUPMODE,Warmup Mode" "0: Shut down the IADC after conversions have..,1: Switch to standby mode after conversions have..,2: Keep IADC fully powered after conversions have..,?"
|
|
newline
|
|
bitfld.long 0x4 3. "DBGHALT,Debug Halt" "0: Continue operation as normal during debug mode,1: Complete the current conversion and then halt.."
|
|
newline
|
|
bitfld.long 0x4 2. "ADCCLKSUSPEND1,ADC_CLK Suspend - PRS1" "0: Normal mode which does not disable the ADC_CLK.,1: ADCCLKWUEN will gate off ADC_CLK until the.."
|
|
newline
|
|
bitfld.long 0x4 1. "ADCCLKSUSPEND0,ADC_CLK Suspend - PRS0" "0: Normal mode which does not disable the ADC_CLK.,1: ADCCLKWUEN will gate off ADC_CLK until the.."
|
|
newline
|
|
bitfld.long 0x4 0. "EM23WUCONVERT,EM23 Wakeup on Conversion" "0: When using suspend mode conversions performed in..,1: When using suspend mode conversions performed in.."
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,Command"
|
|
bitfld.long 0x0 25. "SCANFIFOFLUSH,Flush the Scan FIFO" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "SINGLEFIFOFLUSH,Flush the Single FIFO" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "TIMERDIS,Timer Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "TIMEREN,Timer Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "SCANSTOP,Scan Queue Stop" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "SCANSTART,Scan Queue Start" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "SINGLESTOP,Single Queue Stop" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SINGLESTART,Single Queue Start" "0,1"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "TIMER,Timer"
|
|
hexmask.long.word 0x0 0.--15. 1. "TIMER,Timer Period"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "STATUS,Status"
|
|
bitfld.long 0x0 30. "ADCWARM,ADCWARM" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "SYNCBUSY,SYNCBUSY" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "MASKREQWRITEPENDING,MASKREQ write pending" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "SINGLEWRITEPENDING,SINGLE write pending" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "TIMERACTIVE,Timer Active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "SCANFIFOFLUSHING,The Scan FIFO is flushing" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "SINGLEFIFOFLUSHING,The Single FIFO is flushing" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "SCANFIFODV,SCANFIFO Data Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "SINGLEFIFODV,SINGLEFIFO Data Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "CONVERTING,Converting" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "SCANQUEUEPENDING,Scan Queue Pending" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "SCANQEN,Scan Queued Enabled" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "SINGLEQUEUEPENDING,Single Queue Pending" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SINGLEQEN,Single Queue Enabled" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "MASKREQ,Mask Request"
|
|
hexmask.long.word 0x0 0.--15. 1. "MASKREQ,Scan Queue Mask Request"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "STMASK,Scan Table Mask"
|
|
hexmask.long.word 0x0 0.--15. 1. "STMASK,Scan Table Mask"
|
|
group.long 0x20++0xF
|
|
line.long 0x0 "CMPTHR,Comparator Threshold"
|
|
hexmask.long.word 0x0 16.--31. 1. "ADGT,ADC Greater Than or Equal to Threshold"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "ADLT,ADC Less Than or Equal to Threshold"
|
|
line.long 0x4 "IF,Interrupt Flag"
|
|
bitfld.long 0x4 31. "EM23ABORTERROR,EM2/3 Abort Error" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "SCANFIFOUF,Scan FIFO Underflow" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "SINGLEFIFOUF,Single FIFO Underflow" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "SCANFIFOOF,Scan FIFO Overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "SINGLEFIFOOF,Single FIFO Overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "PORTALLOCERR,Port Allocation Error" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "POLARITYERR,Polarity Error" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "SINGLEDONE,Single Conversion Done" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "SCANTABLEDONE,Scan Table Done" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "SCANENTRYDONE,Scan Entry Done" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "SCANCMP,Scan Result Window Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "SINGLECMP,Single Result Window Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "SCANFIFODVL,Scan FIFO Data Valid Level" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "SINGLEFIFODVL,Single FIFO Data Valid Level" "0,1"
|
|
line.long 0x8 "IEN,Interrupt Enable"
|
|
bitfld.long 0x8 31. "EM23ABORTERROR,EM2/3 Abort Error Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 19. "SCANFIFOUF,Scan FIFO Underflow Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 18. "SINGLEFIFOUF,Single FIFO Underflow Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 17. "SCANFIFOOF,Scan FIFO Overflow Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 16. "SINGLEFIFOOF,Single FIFO Overflow Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 13. "PORTALLOCERR,Port Allocation Error Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 12. "POLARITYERR,Polarity Error Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 9. "SINGLEDONE,Single Conversion Done Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 8. "SCANTABLEDONE,Scan Table Done Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 7. "SCANENTRYDONE,Scan Entry Done Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "SCANCMP,Scan Result Window Compare Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 2. "SINGLECMP,Single Result Window Compare Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "SCANFIFODVL,Scan FIFO Data Valid Level Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "SINGLEFIFODVL,Single FIFO Data Valid Level Enable" "0,1"
|
|
line.long 0xC "TRIGGER,Trigger"
|
|
bitfld.long 0xC 16. "SINGLETAILGATE,Single Tailgate Enable" "0: The single queue is ready to start warming up..,1: After the single queue's trigger is detected it.."
|
|
newline
|
|
bitfld.long 0xC 12. "SINGLETRIGACTION,Single Trigger Action" "0: For TRIGSEL=IMMEDIATE converts the single queue..,1: Converts the single queue then checks for a.."
|
|
newline
|
|
bitfld.long 0xC 8.--10. "SINGLETRIGSEL,Single Trigger Select" "0: Immediate triggering. The single queue will be..,1: Triggers when the local timer count reaches zero.,2: Triggers on PRS1 from a timer module that is..,3: Triggers on asynchronous PRS1 positive edge.,4: Triggers on asynchronous PRS1 negative edge.,?,?,?"
|
|
newline
|
|
bitfld.long 0xC 4. "SCANTRIGACTION,Scan Trigger Action" "0: For TRIGSEL=IMMEDIATE goes through the scan..,1: Goes through the scan table converts each entry.."
|
|
newline
|
|
bitfld.long 0xC 0.--2. "SCANTRIGSEL,Scan Trigger Select" "0: Immediate triggering. The scan queue will be..,1: Triggers when the local timer count reaches zero.,2: Triggers on PRS0 from a timer module that is..,3: Triggers on asynchronous PRS0 positive edge.,4: Triggers on asynchronous PRS0 negative edge.,?,?,?"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "CFG0,Configration"
|
|
bitfld.long 0x0 28.--29. "TWOSCOMPL,Two's Complement" "0: Automatic: Single ended measurements are..,1: Force all measurements to result in unipolar..,2: Force all measurements to result in bipolar..,?"
|
|
newline
|
|
bitfld.long 0x0 21.--23. "DIGAVG,Digital Averaging" "0: Collect one output word (no digital averaging).,1: Collect and average 2 digital output words.,2: Collect and average 4 digital output words.,3: Collect and average 8 digital output words.,4: Collect and average 16 digital output words.,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 16.--18. "REFSEL,Reference Select" "0: Internal 1.21 V reference.,1: External Reference. (Calibrated for 1.25V..,?,3: AVDD (unbuffered),4: AVDD (buffered) * 0.8,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 12.--14. "ANALOGGAIN,Analog Gain" "?,1: Analog gain of 0.5x.,2: Analog gain of 1x.,3: Analog gain of 2x.,4: Analog gain of 3x.,5: Analog gain of 4x.,?,?"
|
|
newline
|
|
bitfld.long 0x0 2.--4. "OSRHS,High Speed OSR" "0: High speed over sampling of 2x.,1: High speed over sampling of 4x.,2: High speed over sampling of 8x.,3: High speed over sampling of 16x.,4: HIgh speed over sampling of 32x.,5: High speed over sampling of 64x.,?,?"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "ADCMODE,ADC Mode" "0: High speed mode with a maximum CLK_ADC of 10 MHz.,?,?,?"
|
|
group.long 0x50++0xB
|
|
line.long 0x0 "SCALE0,Scale"
|
|
bitfld.long 0x0 31. "GAIN3MSB,Gain 3 MSBs" "0: Upper 3 bits of gain = 011 (0.75x),1: Upper 3 bits of gain = 100 (1.00x)"
|
|
newline
|
|
hexmask.long.word 0x0 18.--30. 1. "GAIN13LSB,Gain 13 LSBs"
|
|
newline
|
|
hexmask.long.tbyte 0x0 0.--17. 1. "OFFSET,Offset"
|
|
line.long 0x4 "SCHED0,Scheduling"
|
|
hexmask.long.word 0x4 0.--9. 1. "PRESCALE,Prescale"
|
|
line.long 0x8 "CFG1,Configration"
|
|
bitfld.long 0x8 28.--29. "TWOSCOMPL,Two's Complement" "0: Automatic: Single ended measurements are..,1: Force all measurements to result in unipolar..,2: Force all measurements to result in bipolar..,?"
|
|
newline
|
|
bitfld.long 0x8 21.--23. "DIGAVG,Digital Averaging" "0: Collect one output word (no digital averaging).,1: Collect and average 2 digital output words.,2: Collect and average 4 digital output words.,3: Collect and average 8 digital output words.,4: Collect and average 16 digital output words.,?,?,?"
|
|
newline
|
|
bitfld.long 0x8 16.--18. "REFSEL,Reference Select" "0: Internal 1.21 V reference.,1: External Reference. (Calibrated for 1.25V..,?,3: AVDD (unbuffered),4: AVDD (buffered) * 0.8,?,?,?"
|
|
newline
|
|
bitfld.long 0x8 12.--14. "ANALOGGAIN,Analog Gain" "?,1: Analog gain of 0.5x.,2: Analog gain of 1x.,3: Analog gain of 2x.,4: Analog gain of 3x.,5: Analog gain of 4x.,?,?"
|
|
newline
|
|
bitfld.long 0x8 2.--4. "OSRHS,High Speed OSR" "0: High speed over sampling of 2x.,1: High speed over sampling of 4x.,2: High speed over sampling of 8x.,3: High speed over sampling of 16x.,4: HIgh speed over sampling of 32x.,5: High speed over sampling of 64x.,?,?"
|
|
newline
|
|
bitfld.long 0x8 0.--1. "ADCMODE,ADC Mode" "0: High speed mode with a maximum CLK_ADC of 10 MHz.,?,?,?"
|
|
group.long 0x60++0x7
|
|
line.long 0x0 "SCALE1,Scale"
|
|
bitfld.long 0x0 31. "GAIN3MSB,Gain 3 MSBs" "0: Upper 3 bits of gain = 011 (0.75x),1: Upper 3 bits of gain = 100 (1.00x)"
|
|
newline
|
|
hexmask.long.word 0x0 18.--30. 1. "GAIN13LSB,Gain 13 LSBs"
|
|
newline
|
|
hexmask.long.tbyte 0x0 0.--17. 1. "OFFSET,Offset"
|
|
line.long 0x4 "SCHED1,Scheduling"
|
|
hexmask.long.word 0x4 0.--9. 1. "PRESCALE,Prescale"
|
|
group.long 0x70++0x3
|
|
line.long 0x0 "SINGLEFIFOCFG,Single FIFO Configuration"
|
|
bitfld.long 0x0 8. "DMAWUFIFOSINGLE,Single FIFO DMA wakeup." "0: While in EM2 or EM3 the DMA controller will not..,1: While in EM2 or EM3 the DMA controller will be.."
|
|
newline
|
|
bitfld.long 0x0 4.--5. "DVL,Data Valid Level" "0: When 1 entry in the single FIFO is valid set the..,1: When 2 entries in the single FIFO are valid set..,2: When 3 entries in the single FIFO are valid set..,3: When 4 entries in the single FIFO are valid set.."
|
|
newline
|
|
bitfld.long 0x0 3. "SHOWID,Show ID" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "ALIGNMENT,Alignment" "0: ID[7:0] SIGN_EXT DATA[11:0],1: ID[7:0] SIGN_EXT DATA[15:0],2: ID[7:0] SIGN_EXT DATA[19:0],3: DATA[11:0] 000000000000 ID[7:0],4: DATA[15:0] 00000000 ID[7:0],5: DATA[19:0] 0000 ID[7:0],?,?"
|
|
rgroup.long 0x74++0xB
|
|
line.long 0x0 "SINGLEFIFODATA,Read the oldest valid data from the single FIFO and pop the FIFO"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Single FIFO Read Data"
|
|
line.long 0x4 "SINGLEFIFOSTAT,Single FIFO status"
|
|
bitfld.long 0x4 0.--2. "FIFOREADCNT,FIFO Read Count" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "SINGLEDATA,latest single queue conversion data"
|
|
hexmask.long 0x8 0.--31. 1. "DATA,Data"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "SCANFIFOCFG,Scan FIFO Configuration"
|
|
bitfld.long 0x0 8. "DMAWUFIFOSCAN,Scan FIFO DMA Wakeup" "0: While in EM2 or EM3 the DMA controller will not..,1: While in EM2 or EM3 the DMA controller will be.."
|
|
newline
|
|
bitfld.long 0x0 4.--5. "DVL,Data Valid Level" "0: When 1 entry in the scan FIFO is valid set the..,1: When 2 entries in the scan FIFO are valid set..,2: When 3 entries in the scan FIFO are valid set..,3: When 4 entries in the scan FIFO are valid set.."
|
|
newline
|
|
bitfld.long 0x0 3. "SHOWID,Show ID" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "ALIGNMENT,Alignment" "0: ID[7:0] SIGN_EXT DATA[11:0],1: ID[7:0] SIGN_EXT DATA[15:0],2: ID[7:0] SIGN_EXT DATA[19:0],3: DATA[11:0] 000000000000 ID[7:0],4: DATA[15:0] 00000000 ID[7:0],5: DATA[19:0] 0000 ID[7:0],?,?"
|
|
rgroup.long 0x84++0xB
|
|
line.long 0x0 "SCANFIFODATA,Read the oldest valid data from the scan FIFO and pop the FIFO"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
line.long 0x4 "SCANFIFOSTAT,Scan FIFO status"
|
|
bitfld.long 0x4 0.--2. "FIFOREADCNT,FIFO Read Count" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "SCANDATA,Most recent data data from scan queue conversion"
|
|
hexmask.long 0x8 0.--31. 1. "DATA,Data"
|
|
group.long 0x98++0x3
|
|
line.long 0x0 "SINGLE,No Description"
|
|
bitfld.long 0x0 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x0 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
group.long 0xA0++0x3F
|
|
line.long 0x0 "SCAN0,No Description"
|
|
bitfld.long 0x0 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x0 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x4 "SCAN1,No Description"
|
|
bitfld.long 0x4 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x4 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x4 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x8 "SCAN2,No Description"
|
|
bitfld.long 0x8 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x8 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x8 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x8 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0xC "SCAN3,No Description"
|
|
bitfld.long 0xC 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0xC 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0xC 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x10 "SCAN4,No Description"
|
|
bitfld.long 0x10 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x10 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x10 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x10 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x10 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x10 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x14 "SCAN5,No Description"
|
|
bitfld.long 0x14 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x14 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x14 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x14 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x14 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x14 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x18 "SCAN6,No Description"
|
|
bitfld.long 0x18 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x18 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x18 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x18 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x18 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x18 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x1C "SCAN7,No Description"
|
|
bitfld.long 0x1C 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x1C 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x1C 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x1C 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x1C 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x20 "SCAN8,No Description"
|
|
bitfld.long 0x20 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x20 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x20 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x20 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x20 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x20 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x24 "SCAN9,No Description"
|
|
bitfld.long 0x24 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x24 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x24 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x24 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x24 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x24 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x28 "SCAN10,No Description"
|
|
bitfld.long 0x28 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x28 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x28 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x28 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x28 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x28 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x2C "SCAN11,No Description"
|
|
bitfld.long 0x2C 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x2C 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x2C 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x2C 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x2C 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x2C 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x30 "SCAN12,No Description"
|
|
bitfld.long 0x30 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x30 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x30 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x30 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x30 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x30 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x34 "SCAN13,No Description"
|
|
bitfld.long 0x34 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x34 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x34 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x34 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x34 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x34 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x38 "SCAN14,No Description"
|
|
bitfld.long 0x38 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x38 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x38 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x38 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x38 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x38 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x3C "SCAN15,No Description"
|
|
bitfld.long 0x3C 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x3C 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x3C 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x3C 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x3C 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x3C 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
tree.end
|
|
tree "IADC0_S"
|
|
base ad:0x4A004000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,IPVERSION"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP version ID"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "EN,Enable"
|
|
bitfld.long 0x0 0. "EN,Enable IADC Module" "0: Disable,1: Enable"
|
|
line.long 0x4 "CTRL,Control"
|
|
bitfld.long 0x4 28.--30. "HSCLKRATE,High Speed Clock Rate" "0: Use CMU_CLK_ADC directly. The source clock must..,1: Divide CMU_CLK_ADC by 2 before using it. The..,2: Divide CMU_CLK_ADC by 3 before using it. The..,3: Divide CMU_CLK_ADC by 4 before using it. The..,?,?,?,?"
|
|
newline
|
|
hexmask.long.byte 0x4 16.--22. 1. "TIMEBASE,Time Base"
|
|
newline
|
|
bitfld.long 0x4 4.--5. "WARMUPMODE,Warmup Mode" "0: Shut down the IADC after conversions have..,1: Switch to standby mode after conversions have..,2: Keep IADC fully powered after conversions have..,?"
|
|
newline
|
|
bitfld.long 0x4 3. "DBGHALT,Debug Halt" "0: Continue operation as normal during debug mode,1: Complete the current conversion and then halt.."
|
|
newline
|
|
bitfld.long 0x4 2. "ADCCLKSUSPEND1,ADC_CLK Suspend - PRS1" "0: Normal mode which does not disable the ADC_CLK.,1: ADCCLKWUEN will gate off ADC_CLK until the.."
|
|
newline
|
|
bitfld.long 0x4 1. "ADCCLKSUSPEND0,ADC_CLK Suspend - PRS0" "0: Normal mode which does not disable the ADC_CLK.,1: ADCCLKWUEN will gate off ADC_CLK until the.."
|
|
newline
|
|
bitfld.long 0x4 0. "EM23WUCONVERT,EM23 Wakeup on Conversion" "0: When using suspend mode conversions performed in..,1: When using suspend mode conversions performed in.."
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,Command"
|
|
bitfld.long 0x0 25. "SCANFIFOFLUSH,Flush the Scan FIFO" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "SINGLEFIFOFLUSH,Flush the Single FIFO" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "TIMERDIS,Timer Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "TIMEREN,Timer Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "SCANSTOP,Scan Queue Stop" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "SCANSTART,Scan Queue Start" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "SINGLESTOP,Single Queue Stop" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SINGLESTART,Single Queue Start" "0,1"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "TIMER,Timer"
|
|
hexmask.long.word 0x0 0.--15. 1. "TIMER,Timer Period"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "STATUS,Status"
|
|
bitfld.long 0x0 30. "ADCWARM,ADCWARM" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "SYNCBUSY,SYNCBUSY" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "MASKREQWRITEPENDING,MASKREQ write pending" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "SINGLEWRITEPENDING,SINGLE write pending" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "TIMERACTIVE,Timer Active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "SCANFIFOFLUSHING,The Scan FIFO is flushing" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "SINGLEFIFOFLUSHING,The Single FIFO is flushing" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "SCANFIFODV,SCANFIFO Data Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "SINGLEFIFODV,SINGLEFIFO Data Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "CONVERTING,Converting" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "SCANQUEUEPENDING,Scan Queue Pending" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "SCANQEN,Scan Queued Enabled" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "SINGLEQUEUEPENDING,Single Queue Pending" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SINGLEQEN,Single Queue Enabled" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "MASKREQ,Mask Request"
|
|
hexmask.long.word 0x0 0.--15. 1. "MASKREQ,Scan Queue Mask Request"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "STMASK,Scan Table Mask"
|
|
hexmask.long.word 0x0 0.--15. 1. "STMASK,Scan Table Mask"
|
|
group.long 0x20++0xF
|
|
line.long 0x0 "CMPTHR,Comparator Threshold"
|
|
hexmask.long.word 0x0 16.--31. 1. "ADGT,ADC Greater Than or Equal to Threshold"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "ADLT,ADC Less Than or Equal to Threshold"
|
|
line.long 0x4 "IF,Interrupt Flag"
|
|
bitfld.long 0x4 31. "EM23ABORTERROR,EM2/3 Abort Error" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "SCANFIFOUF,Scan FIFO Underflow" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "SINGLEFIFOUF,Single FIFO Underflow" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "SCANFIFOOF,Scan FIFO Overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "SINGLEFIFOOF,Single FIFO Overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "PORTALLOCERR,Port Allocation Error" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "POLARITYERR,Polarity Error" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "SINGLEDONE,Single Conversion Done" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "SCANTABLEDONE,Scan Table Done" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "SCANENTRYDONE,Scan Entry Done" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "SCANCMP,Scan Result Window Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "SINGLECMP,Single Result Window Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "SCANFIFODVL,Scan FIFO Data Valid Level" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "SINGLEFIFODVL,Single FIFO Data Valid Level" "0,1"
|
|
line.long 0x8 "IEN,Interrupt Enable"
|
|
bitfld.long 0x8 31. "EM23ABORTERROR,EM2/3 Abort Error Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 19. "SCANFIFOUF,Scan FIFO Underflow Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 18. "SINGLEFIFOUF,Single FIFO Underflow Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 17. "SCANFIFOOF,Scan FIFO Overflow Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 16. "SINGLEFIFOOF,Single FIFO Overflow Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 13. "PORTALLOCERR,Port Allocation Error Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 12. "POLARITYERR,Polarity Error Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 9. "SINGLEDONE,Single Conversion Done Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 8. "SCANTABLEDONE,Scan Table Done Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 7. "SCANENTRYDONE,Scan Entry Done Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "SCANCMP,Scan Result Window Compare Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 2. "SINGLECMP,Single Result Window Compare Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "SCANFIFODVL,Scan FIFO Data Valid Level Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "SINGLEFIFODVL,Single FIFO Data Valid Level Enable" "0,1"
|
|
line.long 0xC "TRIGGER,Trigger"
|
|
bitfld.long 0xC 16. "SINGLETAILGATE,Single Tailgate Enable" "0: The single queue is ready to start warming up..,1: After the single queue's trigger is detected it.."
|
|
newline
|
|
bitfld.long 0xC 12. "SINGLETRIGACTION,Single Trigger Action" "0: For TRIGSEL=IMMEDIATE converts the single queue..,1: Converts the single queue then checks for a.."
|
|
newline
|
|
bitfld.long 0xC 8.--10. "SINGLETRIGSEL,Single Trigger Select" "0: Immediate triggering. The single queue will be..,1: Triggers when the local timer count reaches zero.,2: Triggers on PRS1 from a timer module that is..,3: Triggers on asynchronous PRS1 positive edge.,4: Triggers on asynchronous PRS1 negative edge.,?,?,?"
|
|
newline
|
|
bitfld.long 0xC 4. "SCANTRIGACTION,Scan Trigger Action" "0: For TRIGSEL=IMMEDIATE goes through the scan..,1: Goes through the scan table converts each entry.."
|
|
newline
|
|
bitfld.long 0xC 0.--2. "SCANTRIGSEL,Scan Trigger Select" "0: Immediate triggering. The scan queue will be..,1: Triggers when the local timer count reaches zero.,2: Triggers on PRS0 from a timer module that is..,3: Triggers on asynchronous PRS0 positive edge.,4: Triggers on asynchronous PRS0 negative edge.,?,?,?"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "CFG0,Configration"
|
|
bitfld.long 0x0 28.--29. "TWOSCOMPL,Two's Complement" "0: Automatic: Single ended measurements are..,1: Force all measurements to result in unipolar..,2: Force all measurements to result in bipolar..,?"
|
|
newline
|
|
bitfld.long 0x0 21.--23. "DIGAVG,Digital Averaging" "0: Collect one output word (no digital averaging).,1: Collect and average 2 digital output words.,2: Collect and average 4 digital output words.,3: Collect and average 8 digital output words.,4: Collect and average 16 digital output words.,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 16.--18. "REFSEL,Reference Select" "0: Internal 1.21 V reference.,1: External Reference. (Calibrated for 1.25V..,?,3: AVDD (unbuffered),4: AVDD (buffered) * 0.8,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 12.--14. "ANALOGGAIN,Analog Gain" "?,1: Analog gain of 0.5x.,2: Analog gain of 1x.,3: Analog gain of 2x.,4: Analog gain of 3x.,5: Analog gain of 4x.,?,?"
|
|
newline
|
|
bitfld.long 0x0 2.--4. "OSRHS,High Speed OSR" "0: High speed over sampling of 2x.,1: High speed over sampling of 4x.,2: High speed over sampling of 8x.,3: High speed over sampling of 16x.,4: HIgh speed over sampling of 32x.,5: High speed over sampling of 64x.,?,?"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "ADCMODE,ADC Mode" "0: High speed mode with a maximum CLK_ADC of 10 MHz.,?,?,?"
|
|
group.long 0x50++0xB
|
|
line.long 0x0 "SCALE0,Scale"
|
|
bitfld.long 0x0 31. "GAIN3MSB,Gain 3 MSBs" "0: Upper 3 bits of gain = 011 (0.75x),1: Upper 3 bits of gain = 100 (1.00x)"
|
|
newline
|
|
hexmask.long.word 0x0 18.--30. 1. "GAIN13LSB,Gain 13 LSBs"
|
|
newline
|
|
hexmask.long.tbyte 0x0 0.--17. 1. "OFFSET,Offset"
|
|
line.long 0x4 "SCHED0,Scheduling"
|
|
hexmask.long.word 0x4 0.--9. 1. "PRESCALE,Prescale"
|
|
line.long 0x8 "CFG1,Configration"
|
|
bitfld.long 0x8 28.--29. "TWOSCOMPL,Two's Complement" "0: Automatic: Single ended measurements are..,1: Force all measurements to result in unipolar..,2: Force all measurements to result in bipolar..,?"
|
|
newline
|
|
bitfld.long 0x8 21.--23. "DIGAVG,Digital Averaging" "0: Collect one output word (no digital averaging).,1: Collect and average 2 digital output words.,2: Collect and average 4 digital output words.,3: Collect and average 8 digital output words.,4: Collect and average 16 digital output words.,?,?,?"
|
|
newline
|
|
bitfld.long 0x8 16.--18. "REFSEL,Reference Select" "0: Internal 1.21 V reference.,1: External Reference. (Calibrated for 1.25V..,?,3: AVDD (unbuffered),4: AVDD (buffered) * 0.8,?,?,?"
|
|
newline
|
|
bitfld.long 0x8 12.--14. "ANALOGGAIN,Analog Gain" "?,1: Analog gain of 0.5x.,2: Analog gain of 1x.,3: Analog gain of 2x.,4: Analog gain of 3x.,5: Analog gain of 4x.,?,?"
|
|
newline
|
|
bitfld.long 0x8 2.--4. "OSRHS,High Speed OSR" "0: High speed over sampling of 2x.,1: High speed over sampling of 4x.,2: High speed over sampling of 8x.,3: High speed over sampling of 16x.,4: HIgh speed over sampling of 32x.,5: High speed over sampling of 64x.,?,?"
|
|
newline
|
|
bitfld.long 0x8 0.--1. "ADCMODE,ADC Mode" "0: High speed mode with a maximum CLK_ADC of 10 MHz.,?,?,?"
|
|
group.long 0x60++0x7
|
|
line.long 0x0 "SCALE1,Scale"
|
|
bitfld.long 0x0 31. "GAIN3MSB,Gain 3 MSBs" "0: Upper 3 bits of gain = 011 (0.75x),1: Upper 3 bits of gain = 100 (1.00x)"
|
|
newline
|
|
hexmask.long.word 0x0 18.--30. 1. "GAIN13LSB,Gain 13 LSBs"
|
|
newline
|
|
hexmask.long.tbyte 0x0 0.--17. 1. "OFFSET,Offset"
|
|
line.long 0x4 "SCHED1,Scheduling"
|
|
hexmask.long.word 0x4 0.--9. 1. "PRESCALE,Prescale"
|
|
group.long 0x70++0x3
|
|
line.long 0x0 "SINGLEFIFOCFG,Single FIFO Configuration"
|
|
bitfld.long 0x0 8. "DMAWUFIFOSINGLE,Single FIFO DMA wakeup." "0: While in EM2 or EM3 the DMA controller will not..,1: While in EM2 or EM3 the DMA controller will be.."
|
|
newline
|
|
bitfld.long 0x0 4.--5. "DVL,Data Valid Level" "0: When 1 entry in the single FIFO is valid set the..,1: When 2 entries in the single FIFO are valid set..,2: When 3 entries in the single FIFO are valid set..,3: When 4 entries in the single FIFO are valid set.."
|
|
newline
|
|
bitfld.long 0x0 3. "SHOWID,Show ID" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "ALIGNMENT,Alignment" "0: ID[7:0] SIGN_EXT DATA[11:0],1: ID[7:0] SIGN_EXT DATA[15:0],2: ID[7:0] SIGN_EXT DATA[19:0],3: DATA[11:0] 000000000000 ID[7:0],4: DATA[15:0] 00000000 ID[7:0],5: DATA[19:0] 0000 ID[7:0],?,?"
|
|
rgroup.long 0x74++0xB
|
|
line.long 0x0 "SINGLEFIFODATA,Read the oldest valid data from the single FIFO and pop the FIFO"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Single FIFO Read Data"
|
|
line.long 0x4 "SINGLEFIFOSTAT,Single FIFO status"
|
|
bitfld.long 0x4 0.--2. "FIFOREADCNT,FIFO Read Count" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "SINGLEDATA,latest single queue conversion data"
|
|
hexmask.long 0x8 0.--31. 1. "DATA,Data"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "SCANFIFOCFG,Scan FIFO Configuration"
|
|
bitfld.long 0x0 8. "DMAWUFIFOSCAN,Scan FIFO DMA Wakeup" "0: While in EM2 or EM3 the DMA controller will not..,1: While in EM2 or EM3 the DMA controller will be.."
|
|
newline
|
|
bitfld.long 0x0 4.--5. "DVL,Data Valid Level" "0: When 1 entry in the scan FIFO is valid set the..,1: When 2 entries in the scan FIFO are valid set..,2: When 3 entries in the scan FIFO are valid set..,3: When 4 entries in the scan FIFO are valid set.."
|
|
newline
|
|
bitfld.long 0x0 3. "SHOWID,Show ID" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "ALIGNMENT,Alignment" "0: ID[7:0] SIGN_EXT DATA[11:0],1: ID[7:0] SIGN_EXT DATA[15:0],2: ID[7:0] SIGN_EXT DATA[19:0],3: DATA[11:0] 000000000000 ID[7:0],4: DATA[15:0] 00000000 ID[7:0],5: DATA[19:0] 0000 ID[7:0],?,?"
|
|
rgroup.long 0x84++0xB
|
|
line.long 0x0 "SCANFIFODATA,Read the oldest valid data from the scan FIFO and pop the FIFO"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
line.long 0x4 "SCANFIFOSTAT,Scan FIFO status"
|
|
bitfld.long 0x4 0.--2. "FIFOREADCNT,FIFO Read Count" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "SCANDATA,Most recent data data from scan queue conversion"
|
|
hexmask.long 0x8 0.--31. 1. "DATA,Data"
|
|
group.long 0x98++0x3
|
|
line.long 0x0 "SINGLE,No Description"
|
|
bitfld.long 0x0 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x0 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
group.long 0xA0++0x3F
|
|
line.long 0x0 "SCAN0,No Description"
|
|
bitfld.long 0x0 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x0 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x4 "SCAN1,No Description"
|
|
bitfld.long 0x4 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x4 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x4 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x8 "SCAN2,No Description"
|
|
bitfld.long 0x8 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x8 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x8 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x8 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0xC "SCAN3,No Description"
|
|
bitfld.long 0xC 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0xC 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0xC 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x10 "SCAN4,No Description"
|
|
bitfld.long 0x10 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x10 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x10 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x10 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x10 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x10 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x14 "SCAN5,No Description"
|
|
bitfld.long 0x14 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x14 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x14 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x14 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x14 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x14 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x18 "SCAN6,No Description"
|
|
bitfld.long 0x18 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x18 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x18 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x18 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x18 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x18 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x1C "SCAN7,No Description"
|
|
bitfld.long 0x1C 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x1C 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x1C 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x1C 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x1C 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x20 "SCAN8,No Description"
|
|
bitfld.long 0x20 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x20 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x20 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x20 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x20 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x20 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x24 "SCAN9,No Description"
|
|
bitfld.long 0x24 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x24 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x24 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x24 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x24 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x24 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x28 "SCAN10,No Description"
|
|
bitfld.long 0x28 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x28 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x28 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x28 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x28 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x28 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x2C "SCAN11,No Description"
|
|
bitfld.long 0x2C 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x2C 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x2C 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x2C 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x2C 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x2C 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x30 "SCAN12,No Description"
|
|
bitfld.long 0x30 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x30 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x30 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x30 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x30 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x30 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x34 "SCAN13,No Description"
|
|
bitfld.long 0x34 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x34 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x34 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x34 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x34 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x34 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x38 "SCAN14,No Description"
|
|
bitfld.long 0x38 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x38 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x38 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x38 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x38 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x38 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
line.long 0x3C "SCAN15,No Description"
|
|
bitfld.long 0x3C 17. "CMP,Comparison Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x3C 16. "CFG,Configuration Group Select" "0: Use configuration group 0,1: Use configuration group 1"
|
|
newline
|
|
hexmask.long.byte 0x3C 12.--15. 1. "PORTPOS,Positive Port Select"
|
|
newline
|
|
hexmask.long.byte 0x3C 8.--11. 1. "PINPOS,Positive Pin Select"
|
|
newline
|
|
hexmask.long.byte 0x3C 4.--7. 1. "PORTNEG,Negative Port Select"
|
|
newline
|
|
hexmask.long.byte 0x3C 0.--3. 1. "PINNEG,Negative Pin Select"
|
|
tree.end
|
|
tree.end
|
|
tree "ICACHE (Instruction Cache)"
|
|
base ad:0x0
|
|
tree "ICACHE0_NS"
|
|
base ad:0x50034000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,The read only IPVERSION field gives the version for this module. There may be minor software changes required for modules with different values of IPVERSION."
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP version ID"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "CTRL,No Description"
|
|
bitfld.long 0x0 2. "AUTOFLUSHDIS,Automatic Flushing Disable" "0,1"
|
|
bitfld.long 0x0 1. "USEMPU,Use MPU" "0,1"
|
|
bitfld.long 0x0 0. "CACHEDIS,Cache Disable" "0,1"
|
|
rgroup.long 0x8++0xF
|
|
line.long 0x0 "PCHITS,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "PCHITS,Performance Counter Hits"
|
|
line.long 0x4 "PCMISSES,No Description"
|
|
hexmask.long 0x4 0.--31. 1. "PCMISSES,Performance Counter Misses"
|
|
line.long 0x8 "PCAHITS,No Description"
|
|
hexmask.long 0x8 0.--31. 1. "PCAHITS,Performance Counter Advanced Hits"
|
|
line.long 0xC "STATUS,No Description"
|
|
bitfld.long 0xC 0. "PCRUNNING,PC Running" "0,1"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 2. "STOPPC,Stop Performance Counters" "0,1"
|
|
bitfld.long 0x0 1. "STARTPC,Start Performance Counters" "0,1"
|
|
bitfld.long 0x0 0. "FLUSH,Flush" "0,1"
|
|
group.long 0x1C++0xB
|
|
line.long 0x0 "LPMODE,No Description"
|
|
hexmask.long.byte 0x0 4.--7. 1. "NESTFACTOR,Low Power Nest Factor"
|
|
bitfld.long 0x0 0.--1. "LPLEVEL,Low Power Level" "0: Base instruction cache functionality,1: Advanced buffering mode where the cache uses the..,?,3: Minimum activity mode which allows the cache to.."
|
|
line.long 0x4 "IF,No Description"
|
|
bitfld.long 0x4 8. "RAMERROR,RAM error Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 2. "AHITOF,Advanced Hit Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 1. "MISSOF,Miss Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 0. "HITOF,Hit Overflow Interrupt Flag" "0,1"
|
|
line.long 0x8 "IEN,No Description"
|
|
bitfld.long 0x8 8. "RAMERROR,RAM error Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 2. "AHITOF,Advanced Hit Overflow Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 1. "MISSOF,Miss Overflow Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 0. "HITOF,Hit Overflow Interrupt Enable" "0,1"
|
|
tree.end
|
|
tree "ICACHE0_S"
|
|
base ad:0x40034000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,The read only IPVERSION field gives the version for this module. There may be minor software changes required for modules with different values of IPVERSION."
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP version ID"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "CTRL,No Description"
|
|
bitfld.long 0x0 2. "AUTOFLUSHDIS,Automatic Flushing Disable" "0,1"
|
|
bitfld.long 0x0 1. "USEMPU,Use MPU" "0,1"
|
|
bitfld.long 0x0 0. "CACHEDIS,Cache Disable" "0,1"
|
|
rgroup.long 0x8++0xF
|
|
line.long 0x0 "PCHITS,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "PCHITS,Performance Counter Hits"
|
|
line.long 0x4 "PCMISSES,No Description"
|
|
hexmask.long 0x4 0.--31. 1. "PCMISSES,Performance Counter Misses"
|
|
line.long 0x8 "PCAHITS,No Description"
|
|
hexmask.long 0x8 0.--31. 1. "PCAHITS,Performance Counter Advanced Hits"
|
|
line.long 0xC "STATUS,No Description"
|
|
bitfld.long 0xC 0. "PCRUNNING,PC Running" "0,1"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 2. "STOPPC,Stop Performance Counters" "0,1"
|
|
bitfld.long 0x0 1. "STARTPC,Start Performance Counters" "0,1"
|
|
bitfld.long 0x0 0. "FLUSH,Flush" "0,1"
|
|
group.long 0x1C++0xB
|
|
line.long 0x0 "LPMODE,No Description"
|
|
hexmask.long.byte 0x0 4.--7. 1. "NESTFACTOR,Low Power Nest Factor"
|
|
bitfld.long 0x0 0.--1. "LPLEVEL,Low Power Level" "0: Base instruction cache functionality,1: Advanced buffering mode where the cache uses the..,?,3: Minimum activity mode which allows the cache to.."
|
|
line.long 0x4 "IF,No Description"
|
|
bitfld.long 0x4 8. "RAMERROR,RAM error Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 2. "AHITOF,Advanced Hit Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 1. "MISSOF,Miss Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 0. "HITOF,Hit Overflow Interrupt Flag" "0,1"
|
|
line.long 0x8 "IEN,No Description"
|
|
bitfld.long 0x8 8. "RAMERROR,RAM error Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 2. "AHITOF,Advanced Hit Overflow Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 1. "MISSOF,Miss Overflow Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 0. "HITOF,Hit Overflow Interrupt Enable" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "LDMA (Linked DMA)"
|
|
base ad:0x0
|
|
tree "LDMA_NS"
|
|
base ad:0x50040000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long.byte 0x0 0.--7. 1. "IPVERSION,IPVERSION"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,LDMA module enable and disable register" "0,1"
|
|
line.long 0x4 "CTRL,No Description"
|
|
bitfld.long 0x4 31. "CORERST,Reset DMA controller" "0,1"
|
|
hexmask.long.byte 0x4 24.--28. 1. "NUMFIXED,Number of Fixed Priority Channels"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
hexmask.long.byte 0x0 24.--28. 1. "CHNUM,Number of Channels"
|
|
hexmask.long.byte 0x0 16.--20. 1. "FIFOLEVEL,FIFO Level"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--12. 1. "CHERROR,Errant Channel Number"
|
|
hexmask.long.byte 0x0 3.--7. 1. "CHGRANT,Granted Channel Number"
|
|
newline
|
|
bitfld.long 0x0 1. "ANYREQ,Any DMA Channel Request Pending" "0,1"
|
|
bitfld.long 0x0 0. "ANYBUSY,Any DMA Channel Busy" "0,1"
|
|
wgroup.long 0x10++0x7
|
|
line.long 0x0 "SYNCSWSET,No Description"
|
|
hexmask.long.byte 0x0 0.--7. 1. "SYNCSWSET,DMA SYNC Software Trigger Set"
|
|
line.long 0x4 "SYNCSWCLR,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "SYNCSWCLR,DMA SYNC Software Trigger Clear"
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "SYNCHWEN,No Description"
|
|
hexmask.long.byte 0x0 16.--23. 1. "SYNCCLREN,Hardware Sync Trigger Clear Enable"
|
|
hexmask.long.byte 0x0 0.--7. 1. "SYNCSETEN,Hardware Sync Trigger Set Enable"
|
|
line.long 0x4 "SYNCHWSEL,No Description"
|
|
hexmask.long.byte 0x4 16.--23. 1. "SYNCCLREDGE,Hardware Sync Trigger Clear Edge Select"
|
|
hexmask.long.byte 0x4 0.--7. 1. "SYNCSETEDGE,Hardware Sync Trigger Set Edge Select"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "SYNCSTATUS,No Description"
|
|
hexmask.long.byte 0x0 0.--7. 1. "SYNCTRIG,sync trig status"
|
|
wgroup.long 0x24++0x7
|
|
line.long 0x0 "CHEN,No Description"
|
|
hexmask.long.byte 0x0 0.--7. 1. "CHEN,Channel Enables"
|
|
line.long 0x4 "CHDIS,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "CHDIS,DMA Channel disable"
|
|
rgroup.long 0x2C++0x7
|
|
line.long 0x0 "CHSTATUS,No Description"
|
|
hexmask.long.byte 0x0 0.--7. 1. "CHSTATUS,DMA Channel Status"
|
|
line.long 0x4 "CHBUSY,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "BUSY,Channels Busy"
|
|
group.long 0x34++0x7
|
|
line.long 0x0 "CHDONE,No Description"
|
|
bitfld.long 0x0 7. "CHDONE7,DMA Channel Link done intr flag" "0,1"
|
|
bitfld.long 0x0 6. "CHDONE6,DMA Channel Link done intr flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "CHDONE5,DMA Channel Link done intr flag" "0,1"
|
|
bitfld.long 0x0 4. "CHDONE4,DMA Channel Link done intr flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CHDONE3,DMA Channel Link done intr flag" "0,1"
|
|
bitfld.long 0x0 2. "CHDONE2,DMA Channel Link done intr flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHDONE1,DMA Channel Link done intr flag" "0,1"
|
|
bitfld.long 0x0 0. "CHDONE0,DMA Channel Link done intr flag" "0,1"
|
|
line.long 0x4 "DBGHALT,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "DBGHALT,DMA Debug Halt"
|
|
wgroup.long 0x3C++0x3
|
|
line.long 0x0 "SWREQ,No Description"
|
|
hexmask.long.byte 0x0 0.--7. 1. "SWREQ,Software Transfer Requests"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "REQDIS,No Description"
|
|
hexmask.long.byte 0x0 0.--7. 1. "REQDIS,DMA Request Disables"
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x0 "REQPEND,No Description"
|
|
hexmask.long.byte 0x0 0.--7. 1. "REQPEND,DMA Requests Pending"
|
|
wgroup.long 0x48++0x7
|
|
line.long 0x0 "LINKLOAD,No Description"
|
|
hexmask.long.byte 0x0 0.--7. 1. "LINKLOAD,DMA Link Loads"
|
|
line.long 0x4 "REQCLEAR,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "REQCLEAR,DMA Request Clear"
|
|
group.long 0x50++0x7
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 31. "ERROR,Error Flag" "0,1"
|
|
bitfld.long 0x0 7. "DONE7,DMA Structure Operation Done" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "DONE6,DMA Structure Operation Done" "0,1"
|
|
bitfld.long 0x0 5. "DONE5,DMA Structure Operation Done" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "DONE4,DMA Structure Operation Done" "0,1"
|
|
bitfld.long 0x0 3. "DONE3,DMA Structure Operation Done" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DONE2,DMA Structure Operation Done" "0,1"
|
|
bitfld.long 0x0 1. "DONE1,DMA Structure Operation Done" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DONE0,DMA Structure Operation Done" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 31. "ERROR,Enable or disable the error interrupt" "0,1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "CHDONE,Enable or disable the done interrupt"
|
|
group.long 0x5C++0x17
|
|
line.long 0x0 "CH0_CFG,No Description"
|
|
bitfld.long 0x0 21. "DSTINCSIGN,Destination Address Increment Sign" "0: Increment destination address,1: Decrement destination address"
|
|
bitfld.long 0x0 20. "SRCINCSIGN,Source Address Increment Sign" "0: Increment source address,1: Decrement source address"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "ARBSLOTS,Arbitration Slot Number Select" "0: One arbitration slot selected,1: Two arbitration slots selected,2: Four arbitration slots selected,3: Eight arbitration slots selected"
|
|
line.long 0x4 "CH0_LOOP,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "LOOPCNT,Linked Structure Sequence Loop Counter"
|
|
line.long 0x8 "CH0_CTRL,No Description"
|
|
rbitfld.long 0x8 31. "DSTMODE,Destination Addressing Mode" "0: The DSTADDR field of LDMA_CHx_DST contains the..,1: The DSTADDR field of LDMA_CHx_DST contains the.."
|
|
rbitfld.long 0x8 30. "SRCMODE,Source Addressing Mode" "0: The SRCADDR field of LDMA_CHx_SRC contains the..,1: The SRCADDR field of LDMA_CHx_SRC contains the.."
|
|
newline
|
|
bitfld.long 0x8 28.--29. "DSTINC,Destination Address Increment Size" "0: Increment destination address by one unit data..,1: Increment destination address by two unit data..,2: Increment destination address by four unit data..,3: Do not increment the destination address. Writes.."
|
|
bitfld.long 0x8 26.--27. "SIZE,Unit Data Transfer Size" "0: Each unit transfer is a byte,1: Each unit transfer is a half-word,2: Each unit transfer is a word,?"
|
|
newline
|
|
bitfld.long 0x8 24.--25. "SRCINC,Source Address Increment Size" "0: Increment source address by one unit data size..,1: Increment source address by two unit data sizes..,2: Increment source address by four unit data sizes..,3: Do not increment the source address. In this.."
|
|
bitfld.long 0x8 23. "IGNORESREQ,Ignore Sreq" "0,1"
|
|
newline
|
|
bitfld.long 0x8 22. "DECLOOPCNT,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x8 21. "REQMODE,DMA Request Transfer Mode Select" "0: The LDMA transfers one BLOCKSIZE per transfer..,1: One transfer request transfers all units as.."
|
|
newline
|
|
bitfld.long 0x8 20. "DONEIEN,DMA Operation Done Interrupt Flag Set En" "0,1"
|
|
hexmask.long.byte 0x8 16.--19. 1. "BLOCKSIZE,Block Transfer Size"
|
|
newline
|
|
bitfld.long 0x8 15. "BYTESWAP,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x8 4.--14. 1. "XFERCNT,DMA Unit Data Transfer Count"
|
|
newline
|
|
rbitfld.long 0x8 3. "STRUCTREQ,Structure DMA Transfer Request" "0,1"
|
|
bitfld.long 0x8 0.--1. "STRUCTTYPE,DMA Structure Type" "0: DMA transfer structure type selected.,1: Synchronization structure type selected.,2: Write immediate value structure type selected.,?"
|
|
line.long 0xC "CH0_SRC,No Description"
|
|
hexmask.long 0xC 0.--31. 1. "SRCADDR,Source Data Address"
|
|
line.long 0x10 "CH0_DST,No Description"
|
|
hexmask.long 0x10 0.--31. 1. "DSTADDR,Destination Data Address"
|
|
line.long 0x14 "CH0_LINK,No Description"
|
|
hexmask.long 0x14 2.--31. 1. "LINKADDR,Link Structure Address"
|
|
bitfld.long 0x14 1. "LINK,Link Next Structure" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 0. "LINKMODE,Link Structure Addressing Mode" "0: The LINKADDR field of LDMA_CHx_LINK contains the..,1: The LINKADDR field of LDMA_CHx_LINK contains the.."
|
|
group.long 0x8C++0x17
|
|
line.long 0x0 "CH1_CFG,No Description"
|
|
bitfld.long 0x0 21. "DSTINCSIGN,Destination Address Increment Sign" "0: Increment destination address,1: Decrement destination address"
|
|
bitfld.long 0x0 20. "SRCINCSIGN,Source Address Increment Sign" "0: Increment source address,1: Decrement source address"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "ARBSLOTS,Arbitration Slot Number Select" "0: One arbitration slot selected,1: Two arbitration slots selected,2: Four arbitration slots selected,3: Eight arbitration slots selected"
|
|
line.long 0x4 "CH1_LOOP,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "LOOPCNT,Linked Structure Sequence Loop Counter"
|
|
line.long 0x8 "CH1_CTRL,No Description"
|
|
rbitfld.long 0x8 31. "DSTMODE,Destination Addressing Mode" "0: The DSTADDR field of LDMA_CHx_DST contains the..,1: The DSTADDR field of LDMA_CHx_DST contains the.."
|
|
rbitfld.long 0x8 30. "SRCMODE,Source Addressing Mode" "0: The SRCADDR field of LDMA_CHx_SRC contains the..,1: The SRCADDR field of LDMA_CHx_SRC contains the.."
|
|
newline
|
|
bitfld.long 0x8 28.--29. "DSTINC,Destination Address Increment Size" "0: Increment destination address by one unit data..,1: Increment destination address by two unit data..,2: Increment destination address by four unit data..,3: Do not increment the destination address. Writes.."
|
|
bitfld.long 0x8 26.--27. "SIZE,Unit Data Transfer Size" "0: Each unit transfer is a byte,1: Each unit transfer is a half-word,2: Each unit transfer is a word,?"
|
|
newline
|
|
bitfld.long 0x8 24.--25. "SRCINC,Source Address Increment Size" "0: Increment source address by one unit data size..,1: Increment source address by two unit data sizes..,2: Increment source address by four unit data sizes..,3: Do not increment the source address. In this.."
|
|
bitfld.long 0x8 23. "IGNORESREQ,Ignore Sreq" "0,1"
|
|
newline
|
|
bitfld.long 0x8 22. "DECLOOPCNT,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x8 21. "REQMODE,DMA Request Transfer Mode Select" "0: The LDMA transfers one BLOCKSIZE per transfer..,1: One transfer request transfers all units as.."
|
|
newline
|
|
bitfld.long 0x8 20. "DONEIEN,DMA Operation Done Interrupt Flag Set En" "0,1"
|
|
hexmask.long.byte 0x8 16.--19. 1. "BLOCKSIZE,Block Transfer Size"
|
|
newline
|
|
bitfld.long 0x8 15. "BYTESWAP,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x8 4.--14. 1. "XFERCNT,DMA Unit Data Transfer Count"
|
|
newline
|
|
rbitfld.long 0x8 3. "STRUCTREQ,Structure DMA Transfer Request" "0,1"
|
|
bitfld.long 0x8 0.--1. "STRUCTTYPE,DMA Structure Type" "0: DMA transfer structure type selected.,1: Synchronization structure type selected.,2: Write immediate value structure type selected.,?"
|
|
line.long 0xC "CH1_SRC,No Description"
|
|
hexmask.long 0xC 0.--31. 1. "SRCADDR,Source Data Address"
|
|
line.long 0x10 "CH1_DST,No Description"
|
|
hexmask.long 0x10 0.--31. 1. "DSTADDR,Destination Data Address"
|
|
line.long 0x14 "CH1_LINK,No Description"
|
|
hexmask.long 0x14 2.--31. 1. "LINKADDR,Link Structure Address"
|
|
bitfld.long 0x14 1. "LINK,Link Next Structure" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 0. "LINKMODE,Link Structure Addressing Mode" "0: The LINKADDR field of LDMA_CHx_LINK contains the..,1: The LINKADDR field of LDMA_CHx_LINK contains the.."
|
|
group.long 0xBC++0x17
|
|
line.long 0x0 "CH2_CFG,No Description"
|
|
bitfld.long 0x0 21. "DSTINCSIGN,Destination Address Increment Sign" "0: Increment destination address,1: Decrement destination address"
|
|
bitfld.long 0x0 20. "SRCINCSIGN,Source Address Increment Sign" "0: Increment source address,1: Decrement source address"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "ARBSLOTS,Arbitration Slot Number Select" "0: One arbitration slot selected,1: Two arbitration slots selected,2: Four arbitration slots selected,3: Eight arbitration slots selected"
|
|
line.long 0x4 "CH2_LOOP,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "LOOPCNT,Linked Structure Sequence Loop Counter"
|
|
line.long 0x8 "CH2_CTRL,No Description"
|
|
rbitfld.long 0x8 31. "DSTMODE,Destination Addressing Mode" "0: The DSTADDR field of LDMA_CHx_DST contains the..,1: The DSTADDR field of LDMA_CHx_DST contains the.."
|
|
rbitfld.long 0x8 30. "SRCMODE,Source Addressing Mode" "0: The SRCADDR field of LDMA_CHx_SRC contains the..,1: The SRCADDR field of LDMA_CHx_SRC contains the.."
|
|
newline
|
|
bitfld.long 0x8 28.--29. "DSTINC,Destination Address Increment Size" "0: Increment destination address by one unit data..,1: Increment destination address by two unit data..,2: Increment destination address by four unit data..,3: Do not increment the destination address. Writes.."
|
|
bitfld.long 0x8 26.--27. "SIZE,Unit Data Transfer Size" "0: Each unit transfer is a byte,1: Each unit transfer is a half-word,2: Each unit transfer is a word,?"
|
|
newline
|
|
bitfld.long 0x8 24.--25. "SRCINC,Source Address Increment Size" "0: Increment source address by one unit data size..,1: Increment source address by two unit data sizes..,2: Increment source address by four unit data sizes..,3: Do not increment the source address. In this.."
|
|
bitfld.long 0x8 23. "IGNORESREQ,Ignore Sreq" "0,1"
|
|
newline
|
|
bitfld.long 0x8 22. "DECLOOPCNT,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x8 21. "REQMODE,DMA Request Transfer Mode Select" "0: The LDMA transfers one BLOCKSIZE per transfer..,1: One transfer request transfers all units as.."
|
|
newline
|
|
bitfld.long 0x8 20. "DONEIEN,DMA Operation Done Interrupt Flag Set En" "0,1"
|
|
hexmask.long.byte 0x8 16.--19. 1. "BLOCKSIZE,Block Transfer Size"
|
|
newline
|
|
bitfld.long 0x8 15. "BYTESWAP,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x8 4.--14. 1. "XFERCNT,DMA Unit Data Transfer Count"
|
|
newline
|
|
rbitfld.long 0x8 3. "STRUCTREQ,Structure DMA Transfer Request" "0,1"
|
|
bitfld.long 0x8 0.--1. "STRUCTTYPE,DMA Structure Type" "0: DMA transfer structure type selected.,1: Synchronization structure type selected.,2: Write immediate value structure type selected.,?"
|
|
line.long 0xC "CH2_SRC,No Description"
|
|
hexmask.long 0xC 0.--31. 1. "SRCADDR,Source Data Address"
|
|
line.long 0x10 "CH2_DST,No Description"
|
|
hexmask.long 0x10 0.--31. 1. "DSTADDR,Destination Data Address"
|
|
line.long 0x14 "CH2_LINK,No Description"
|
|
hexmask.long 0x14 2.--31. 1. "LINKADDR,Link Structure Address"
|
|
bitfld.long 0x14 1. "LINK,Link Next Structure" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 0. "LINKMODE,Link Structure Addressing Mode" "0: The LINKADDR field of LDMA_CHx_LINK contains the..,1: The LINKADDR field of LDMA_CHx_LINK contains the.."
|
|
group.long 0xEC++0x17
|
|
line.long 0x0 "CH3_CFG,No Description"
|
|
bitfld.long 0x0 21. "DSTINCSIGN,Destination Address Increment Sign" "0: Increment destination address,1: Decrement destination address"
|
|
bitfld.long 0x0 20. "SRCINCSIGN,Source Address Increment Sign" "0: Increment source address,1: Decrement source address"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "ARBSLOTS,Arbitration Slot Number Select" "0: One arbitration slot selected,1: Two arbitration slots selected,2: Four arbitration slots selected,3: Eight arbitration slots selected"
|
|
line.long 0x4 "CH3_LOOP,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "LOOPCNT,Linked Structure Sequence Loop Counter"
|
|
line.long 0x8 "CH3_CTRL,No Description"
|
|
rbitfld.long 0x8 31. "DSTMODE,Destination Addressing Mode" "0: The DSTADDR field of LDMA_CHx_DST contains the..,1: The DSTADDR field of LDMA_CHx_DST contains the.."
|
|
rbitfld.long 0x8 30. "SRCMODE,Source Addressing Mode" "0: The SRCADDR field of LDMA_CHx_SRC contains the..,1: The SRCADDR field of LDMA_CHx_SRC contains the.."
|
|
newline
|
|
bitfld.long 0x8 28.--29. "DSTINC,Destination Address Increment Size" "0: Increment destination address by one unit data..,1: Increment destination address by two unit data..,2: Increment destination address by four unit data..,3: Do not increment the destination address. Writes.."
|
|
bitfld.long 0x8 26.--27. "SIZE,Unit Data Transfer Size" "0: Each unit transfer is a byte,1: Each unit transfer is a half-word,2: Each unit transfer is a word,?"
|
|
newline
|
|
bitfld.long 0x8 24.--25. "SRCINC,Source Address Increment Size" "0: Increment source address by one unit data size..,1: Increment source address by two unit data sizes..,2: Increment source address by four unit data sizes..,3: Do not increment the source address. In this.."
|
|
bitfld.long 0x8 23. "IGNORESREQ,Ignore Sreq" "0,1"
|
|
newline
|
|
bitfld.long 0x8 22. "DECLOOPCNT,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x8 21. "REQMODE,DMA Request Transfer Mode Select" "0: The LDMA transfers one BLOCKSIZE per transfer..,1: One transfer request transfers all units as.."
|
|
newline
|
|
bitfld.long 0x8 20. "DONEIEN,DMA Operation Done Interrupt Flag Set En" "0,1"
|
|
hexmask.long.byte 0x8 16.--19. 1. "BLOCKSIZE,Block Transfer Size"
|
|
newline
|
|
bitfld.long 0x8 15. "BYTESWAP,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x8 4.--14. 1. "XFERCNT,DMA Unit Data Transfer Count"
|
|
newline
|
|
rbitfld.long 0x8 3. "STRUCTREQ,Structure DMA Transfer Request" "0,1"
|
|
bitfld.long 0x8 0.--1. "STRUCTTYPE,DMA Structure Type" "0: DMA transfer structure type selected.,1: Synchronization structure type selected.,2: Write immediate value structure type selected.,?"
|
|
line.long 0xC "CH3_SRC,No Description"
|
|
hexmask.long 0xC 0.--31. 1. "SRCADDR,Source Data Address"
|
|
line.long 0x10 "CH3_DST,No Description"
|
|
hexmask.long 0x10 0.--31. 1. "DSTADDR,Destination Data Address"
|
|
line.long 0x14 "CH3_LINK,No Description"
|
|
hexmask.long 0x14 2.--31. 1. "LINKADDR,Link Structure Address"
|
|
bitfld.long 0x14 1. "LINK,Link Next Structure" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 0. "LINKMODE,Link Structure Addressing Mode" "0: The LINKADDR field of LDMA_CHx_LINK contains the..,1: The LINKADDR field of LDMA_CHx_LINK contains the.."
|
|
group.long 0x11C++0x17
|
|
line.long 0x0 "CH4_CFG,No Description"
|
|
bitfld.long 0x0 21. "DSTINCSIGN,Destination Address Increment Sign" "0: Increment destination address,1: Decrement destination address"
|
|
bitfld.long 0x0 20. "SRCINCSIGN,Source Address Increment Sign" "0: Increment source address,1: Decrement source address"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "ARBSLOTS,Arbitration Slot Number Select" "0: One arbitration slot selected,1: Two arbitration slots selected,2: Four arbitration slots selected,3: Eight arbitration slots selected"
|
|
line.long 0x4 "CH4_LOOP,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "LOOPCNT,Linked Structure Sequence Loop Counter"
|
|
line.long 0x8 "CH4_CTRL,No Description"
|
|
rbitfld.long 0x8 31. "DSTMODE,Destination Addressing Mode" "0: The DSTADDR field of LDMA_CHx_DST contains the..,1: The DSTADDR field of LDMA_CHx_DST contains the.."
|
|
rbitfld.long 0x8 30. "SRCMODE,Source Addressing Mode" "0: The SRCADDR field of LDMA_CHx_SRC contains the..,1: The SRCADDR field of LDMA_CHx_SRC contains the.."
|
|
newline
|
|
bitfld.long 0x8 28.--29. "DSTINC,Destination Address Increment Size" "0: Increment destination address by one unit data..,1: Increment destination address by two unit data..,2: Increment destination address by four unit data..,3: Do not increment the destination address. Writes.."
|
|
bitfld.long 0x8 26.--27. "SIZE,Unit Data Transfer Size" "0: Each unit transfer is a byte,1: Each unit transfer is a half-word,2: Each unit transfer is a word,?"
|
|
newline
|
|
bitfld.long 0x8 24.--25. "SRCINC,Source Address Increment Size" "0: Increment source address by one unit data size..,1: Increment source address by two unit data sizes..,2: Increment source address by four unit data sizes..,3: Do not increment the source address. In this.."
|
|
bitfld.long 0x8 23. "IGNORESREQ,Ignore Sreq" "0,1"
|
|
newline
|
|
bitfld.long 0x8 22. "DECLOOPCNT,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x8 21. "REQMODE,DMA Request Transfer Mode Select" "0: The LDMA transfers one BLOCKSIZE per transfer..,1: One transfer request transfers all units as.."
|
|
newline
|
|
bitfld.long 0x8 20. "DONEIEN,DMA Operation Done Interrupt Flag Set En" "0,1"
|
|
hexmask.long.byte 0x8 16.--19. 1. "BLOCKSIZE,Block Transfer Size"
|
|
newline
|
|
bitfld.long 0x8 15. "BYTESWAP,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x8 4.--14. 1. "XFERCNT,DMA Unit Data Transfer Count"
|
|
newline
|
|
rbitfld.long 0x8 3. "STRUCTREQ,Structure DMA Transfer Request" "0,1"
|
|
bitfld.long 0x8 0.--1. "STRUCTTYPE,DMA Structure Type" "0: DMA transfer structure type selected.,1: Synchronization structure type selected.,2: Write immediate value structure type selected.,?"
|
|
line.long 0xC "CH4_SRC,No Description"
|
|
hexmask.long 0xC 0.--31. 1. "SRCADDR,Source Data Address"
|
|
line.long 0x10 "CH4_DST,No Description"
|
|
hexmask.long 0x10 0.--31. 1. "DSTADDR,Destination Data Address"
|
|
line.long 0x14 "CH4_LINK,No Description"
|
|
hexmask.long 0x14 2.--31. 1. "LINKADDR,Link Structure Address"
|
|
bitfld.long 0x14 1. "LINK,Link Next Structure" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 0. "LINKMODE,Link Structure Addressing Mode" "0: The LINKADDR field of LDMA_CHx_LINK contains the..,1: The LINKADDR field of LDMA_CHx_LINK contains the.."
|
|
group.long 0x14C++0x17
|
|
line.long 0x0 "CH5_CFG,No Description"
|
|
bitfld.long 0x0 21. "DSTINCSIGN,Destination Address Increment Sign" "0: Increment destination address,1: Decrement destination address"
|
|
bitfld.long 0x0 20. "SRCINCSIGN,Source Address Increment Sign" "0: Increment source address,1: Decrement source address"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "ARBSLOTS,Arbitration Slot Number Select" "0: One arbitration slot selected,1: Two arbitration slots selected,2: Four arbitration slots selected,3: Eight arbitration slots selected"
|
|
line.long 0x4 "CH5_LOOP,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "LOOPCNT,Linked Structure Sequence Loop Counter"
|
|
line.long 0x8 "CH5_CTRL,No Description"
|
|
rbitfld.long 0x8 31. "DSTMODE,Destination Addressing Mode" "0: The DSTADDR field of LDMA_CHx_DST contains the..,1: The DSTADDR field of LDMA_CHx_DST contains the.."
|
|
rbitfld.long 0x8 30. "SRCMODE,Source Addressing Mode" "0: The SRCADDR field of LDMA_CHx_SRC contains the..,1: The SRCADDR field of LDMA_CHx_SRC contains the.."
|
|
newline
|
|
bitfld.long 0x8 28.--29. "DSTINC,Destination Address Increment Size" "0: Increment destination address by one unit data..,1: Increment destination address by two unit data..,2: Increment destination address by four unit data..,3: Do not increment the destination address. Writes.."
|
|
bitfld.long 0x8 26.--27. "SIZE,Unit Data Transfer Size" "0: Each unit transfer is a byte,1: Each unit transfer is a half-word,2: Each unit transfer is a word,?"
|
|
newline
|
|
bitfld.long 0x8 24.--25. "SRCINC,Source Address Increment Size" "0: Increment source address by one unit data size..,1: Increment source address by two unit data sizes..,2: Increment source address by four unit data sizes..,3: Do not increment the source address. In this.."
|
|
bitfld.long 0x8 23. "IGNORESREQ,Ignore Sreq" "0,1"
|
|
newline
|
|
bitfld.long 0x8 22. "DECLOOPCNT,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x8 21. "REQMODE,DMA Request Transfer Mode Select" "0: The LDMA transfers one BLOCKSIZE per transfer..,1: One transfer request transfers all units as.."
|
|
newline
|
|
bitfld.long 0x8 20. "DONEIEN,DMA Operation Done Interrupt Flag Set En" "0,1"
|
|
hexmask.long.byte 0x8 16.--19. 1. "BLOCKSIZE,Block Transfer Size"
|
|
newline
|
|
bitfld.long 0x8 15. "BYTESWAP,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x8 4.--14. 1. "XFERCNT,DMA Unit Data Transfer Count"
|
|
newline
|
|
rbitfld.long 0x8 3. "STRUCTREQ,Structure DMA Transfer Request" "0,1"
|
|
bitfld.long 0x8 0.--1. "STRUCTTYPE,DMA Structure Type" "0: DMA transfer structure type selected.,1: Synchronization structure type selected.,2: Write immediate value structure type selected.,?"
|
|
line.long 0xC "CH5_SRC,No Description"
|
|
hexmask.long 0xC 0.--31. 1. "SRCADDR,Source Data Address"
|
|
line.long 0x10 "CH5_DST,No Description"
|
|
hexmask.long 0x10 0.--31. 1. "DSTADDR,Destination Data Address"
|
|
line.long 0x14 "CH5_LINK,No Description"
|
|
hexmask.long 0x14 2.--31. 1. "LINKADDR,Link Structure Address"
|
|
bitfld.long 0x14 1. "LINK,Link Next Structure" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 0. "LINKMODE,Link Structure Addressing Mode" "0: The LINKADDR field of LDMA_CHx_LINK contains the..,1: The LINKADDR field of LDMA_CHx_LINK contains the.."
|
|
group.long 0x17C++0x17
|
|
line.long 0x0 "CH6_CFG,No Description"
|
|
bitfld.long 0x0 21. "DSTINCSIGN,Destination Address Increment Sign" "0: Increment destination address,1: Decrement destination address"
|
|
bitfld.long 0x0 20. "SRCINCSIGN,Source Address Increment Sign" "0: Increment source address,1: Decrement source address"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "ARBSLOTS,Arbitration Slot Number Select" "0: One arbitration slot selected,1: Two arbitration slots selected,2: Four arbitration slots selected,3: Eight arbitration slots selected"
|
|
line.long 0x4 "CH6_LOOP,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "LOOPCNT,Linked Structure Sequence Loop Counter"
|
|
line.long 0x8 "CH6_CTRL,No Description"
|
|
rbitfld.long 0x8 31. "DSTMODE,Destination Addressing Mode" "0: The DSTADDR field of LDMA_CHx_DST contains the..,1: The DSTADDR field of LDMA_CHx_DST contains the.."
|
|
rbitfld.long 0x8 30. "SRCMODE,Source Addressing Mode" "0: The SRCADDR field of LDMA_CHx_SRC contains the..,1: The SRCADDR field of LDMA_CHx_SRC contains the.."
|
|
newline
|
|
bitfld.long 0x8 28.--29. "DSTINC,Destination Address Increment Size" "0: Increment destination address by one unit data..,1: Increment destination address by two unit data..,2: Increment destination address by four unit data..,3: Do not increment the destination address. Writes.."
|
|
bitfld.long 0x8 26.--27. "SIZE,Unit Data Transfer Size" "0: Each unit transfer is a byte,1: Each unit transfer is a half-word,2: Each unit transfer is a word,?"
|
|
newline
|
|
bitfld.long 0x8 24.--25. "SRCINC,Source Address Increment Size" "0: Increment source address by one unit data size..,1: Increment source address by two unit data sizes..,2: Increment source address by four unit data sizes..,3: Do not increment the source address. In this.."
|
|
bitfld.long 0x8 23. "IGNORESREQ,Ignore Sreq" "0,1"
|
|
newline
|
|
bitfld.long 0x8 22. "DECLOOPCNT,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x8 21. "REQMODE,DMA Request Transfer Mode Select" "0: The LDMA transfers one BLOCKSIZE per transfer..,1: One transfer request transfers all units as.."
|
|
newline
|
|
bitfld.long 0x8 20. "DONEIEN,DMA Operation Done Interrupt Flag Set En" "0,1"
|
|
hexmask.long.byte 0x8 16.--19. 1. "BLOCKSIZE,Block Transfer Size"
|
|
newline
|
|
bitfld.long 0x8 15. "BYTESWAP,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x8 4.--14. 1. "XFERCNT,DMA Unit Data Transfer Count"
|
|
newline
|
|
rbitfld.long 0x8 3. "STRUCTREQ,Structure DMA Transfer Request" "0,1"
|
|
bitfld.long 0x8 0.--1. "STRUCTTYPE,DMA Structure Type" "0: DMA transfer structure type selected.,1: Synchronization structure type selected.,2: Write immediate value structure type selected.,?"
|
|
line.long 0xC "CH6_SRC,No Description"
|
|
hexmask.long 0xC 0.--31. 1. "SRCADDR,Source Data Address"
|
|
line.long 0x10 "CH6_DST,No Description"
|
|
hexmask.long 0x10 0.--31. 1. "DSTADDR,Destination Data Address"
|
|
line.long 0x14 "CH6_LINK,No Description"
|
|
hexmask.long 0x14 2.--31. 1. "LINKADDR,Link Structure Address"
|
|
bitfld.long 0x14 1. "LINK,Link Next Structure" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 0. "LINKMODE,Link Structure Addressing Mode" "0: The LINKADDR field of LDMA_CHx_LINK contains the..,1: The LINKADDR field of LDMA_CHx_LINK contains the.."
|
|
group.long 0x1AC++0x17
|
|
line.long 0x0 "CH7_CFG,No Description"
|
|
bitfld.long 0x0 21. "DSTINCSIGN,Destination Address Increment Sign" "0: Increment destination address,1: Decrement destination address"
|
|
bitfld.long 0x0 20. "SRCINCSIGN,Source Address Increment Sign" "0: Increment source address,1: Decrement source address"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "ARBSLOTS,Arbitration Slot Number Select" "0: One arbitration slot selected,1: Two arbitration slots selected,2: Four arbitration slots selected,3: Eight arbitration slots selected"
|
|
line.long 0x4 "CH7_LOOP,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "LOOPCNT,Linked Structure Sequence Loop Counter"
|
|
line.long 0x8 "CH7_CTRL,No Description"
|
|
rbitfld.long 0x8 31. "DSTMODE,Destination Addressing Mode" "0: The DSTADDR field of LDMA_CHx_DST contains the..,1: The DSTADDR field of LDMA_CHx_DST contains the.."
|
|
rbitfld.long 0x8 30. "SRCMODE,Source Addressing Mode" "0: The SRCADDR field of LDMA_CHx_SRC contains the..,1: The SRCADDR field of LDMA_CHx_SRC contains the.."
|
|
newline
|
|
bitfld.long 0x8 28.--29. "DSTINC,Destination Address Increment Size" "0: Increment destination address by one unit data..,1: Increment destination address by two unit data..,2: Increment destination address by four unit data..,3: Do not increment the destination address. Writes.."
|
|
bitfld.long 0x8 26.--27. "SIZE,Unit Data Transfer Size" "0: Each unit transfer is a byte,1: Each unit transfer is a half-word,2: Each unit transfer is a word,?"
|
|
newline
|
|
bitfld.long 0x8 24.--25. "SRCINC,Source Address Increment Size" "0: Increment source address by one unit data size..,1: Increment source address by two unit data sizes..,2: Increment source address by four unit data sizes..,3: Do not increment the source address. In this.."
|
|
bitfld.long 0x8 23. "IGNORESREQ,Ignore Sreq" "0,1"
|
|
newline
|
|
bitfld.long 0x8 22. "DECLOOPCNT,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x8 21. "REQMODE,DMA Request Transfer Mode Select" "0: The LDMA transfers one BLOCKSIZE per transfer..,1: One transfer request transfers all units as.."
|
|
newline
|
|
bitfld.long 0x8 20. "DONEIEN,DMA Operation Done Interrupt Flag Set En" "0,1"
|
|
hexmask.long.byte 0x8 16.--19. 1. "BLOCKSIZE,Block Transfer Size"
|
|
newline
|
|
bitfld.long 0x8 15. "BYTESWAP,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x8 4.--14. 1. "XFERCNT,DMA Unit Data Transfer Count"
|
|
newline
|
|
rbitfld.long 0x8 3. "STRUCTREQ,Structure DMA Transfer Request" "0,1"
|
|
bitfld.long 0x8 0.--1. "STRUCTTYPE,DMA Structure Type" "0: DMA transfer structure type selected.,1: Synchronization structure type selected.,2: Write immediate value structure type selected.,?"
|
|
line.long 0xC "CH7_SRC,No Description"
|
|
hexmask.long 0xC 0.--31. 1. "SRCADDR,Source Data Address"
|
|
line.long 0x10 "CH7_DST,No Description"
|
|
hexmask.long 0x10 0.--31. 1. "DSTADDR,Destination Data Address"
|
|
line.long 0x14 "CH7_LINK,No Description"
|
|
hexmask.long 0x14 2.--31. 1. "LINKADDR,Link Structure Address"
|
|
bitfld.long 0x14 1. "LINK,Link Next Structure" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 0. "LINKMODE,Link Structure Addressing Mode" "0: The LINKADDR field of LDMA_CHx_LINK contains the..,1: The LINKADDR field of LDMA_CHx_LINK contains the.."
|
|
tree.end
|
|
tree "LDMA_S"
|
|
base ad:0x40040000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long.byte 0x0 0.--7. 1. "IPVERSION,IPVERSION"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,LDMA module enable and disable register" "0,1"
|
|
line.long 0x4 "CTRL,No Description"
|
|
bitfld.long 0x4 31. "CORERST,Reset DMA controller" "0,1"
|
|
hexmask.long.byte 0x4 24.--28. 1. "NUMFIXED,Number of Fixed Priority Channels"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
hexmask.long.byte 0x0 24.--28. 1. "CHNUM,Number of Channels"
|
|
hexmask.long.byte 0x0 16.--20. 1. "FIFOLEVEL,FIFO Level"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--12. 1. "CHERROR,Errant Channel Number"
|
|
hexmask.long.byte 0x0 3.--7. 1. "CHGRANT,Granted Channel Number"
|
|
newline
|
|
bitfld.long 0x0 1. "ANYREQ,Any DMA Channel Request Pending" "0,1"
|
|
bitfld.long 0x0 0. "ANYBUSY,Any DMA Channel Busy" "0,1"
|
|
wgroup.long 0x10++0x7
|
|
line.long 0x0 "SYNCSWSET,No Description"
|
|
hexmask.long.byte 0x0 0.--7. 1. "SYNCSWSET,DMA SYNC Software Trigger Set"
|
|
line.long 0x4 "SYNCSWCLR,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "SYNCSWCLR,DMA SYNC Software Trigger Clear"
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "SYNCHWEN,No Description"
|
|
hexmask.long.byte 0x0 16.--23. 1. "SYNCCLREN,Hardware Sync Trigger Clear Enable"
|
|
hexmask.long.byte 0x0 0.--7. 1. "SYNCSETEN,Hardware Sync Trigger Set Enable"
|
|
line.long 0x4 "SYNCHWSEL,No Description"
|
|
hexmask.long.byte 0x4 16.--23. 1. "SYNCCLREDGE,Hardware Sync Trigger Clear Edge Select"
|
|
hexmask.long.byte 0x4 0.--7. 1. "SYNCSETEDGE,Hardware Sync Trigger Set Edge Select"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "SYNCSTATUS,No Description"
|
|
hexmask.long.byte 0x0 0.--7. 1. "SYNCTRIG,sync trig status"
|
|
wgroup.long 0x24++0x7
|
|
line.long 0x0 "CHEN,No Description"
|
|
hexmask.long.byte 0x0 0.--7. 1. "CHEN,Channel Enables"
|
|
line.long 0x4 "CHDIS,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "CHDIS,DMA Channel disable"
|
|
rgroup.long 0x2C++0x7
|
|
line.long 0x0 "CHSTATUS,No Description"
|
|
hexmask.long.byte 0x0 0.--7. 1. "CHSTATUS,DMA Channel Status"
|
|
line.long 0x4 "CHBUSY,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "BUSY,Channels Busy"
|
|
group.long 0x34++0x7
|
|
line.long 0x0 "CHDONE,No Description"
|
|
bitfld.long 0x0 7. "CHDONE7,DMA Channel Link done intr flag" "0,1"
|
|
bitfld.long 0x0 6. "CHDONE6,DMA Channel Link done intr flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "CHDONE5,DMA Channel Link done intr flag" "0,1"
|
|
bitfld.long 0x0 4. "CHDONE4,DMA Channel Link done intr flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CHDONE3,DMA Channel Link done intr flag" "0,1"
|
|
bitfld.long 0x0 2. "CHDONE2,DMA Channel Link done intr flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHDONE1,DMA Channel Link done intr flag" "0,1"
|
|
bitfld.long 0x0 0. "CHDONE0,DMA Channel Link done intr flag" "0,1"
|
|
line.long 0x4 "DBGHALT,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "DBGHALT,DMA Debug Halt"
|
|
wgroup.long 0x3C++0x3
|
|
line.long 0x0 "SWREQ,No Description"
|
|
hexmask.long.byte 0x0 0.--7. 1. "SWREQ,Software Transfer Requests"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "REQDIS,No Description"
|
|
hexmask.long.byte 0x0 0.--7. 1. "REQDIS,DMA Request Disables"
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x0 "REQPEND,No Description"
|
|
hexmask.long.byte 0x0 0.--7. 1. "REQPEND,DMA Requests Pending"
|
|
wgroup.long 0x48++0x7
|
|
line.long 0x0 "LINKLOAD,No Description"
|
|
hexmask.long.byte 0x0 0.--7. 1. "LINKLOAD,DMA Link Loads"
|
|
line.long 0x4 "REQCLEAR,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "REQCLEAR,DMA Request Clear"
|
|
group.long 0x50++0x7
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 31. "ERROR,Error Flag" "0,1"
|
|
bitfld.long 0x0 7. "DONE7,DMA Structure Operation Done" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "DONE6,DMA Structure Operation Done" "0,1"
|
|
bitfld.long 0x0 5. "DONE5,DMA Structure Operation Done" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "DONE4,DMA Structure Operation Done" "0,1"
|
|
bitfld.long 0x0 3. "DONE3,DMA Structure Operation Done" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DONE2,DMA Structure Operation Done" "0,1"
|
|
bitfld.long 0x0 1. "DONE1,DMA Structure Operation Done" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DONE0,DMA Structure Operation Done" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 31. "ERROR,Enable or disable the error interrupt" "0,1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "CHDONE,Enable or disable the done interrupt"
|
|
group.long 0x5C++0x17
|
|
line.long 0x0 "CH0_CFG,No Description"
|
|
bitfld.long 0x0 21. "DSTINCSIGN,Destination Address Increment Sign" "0: Increment destination address,1: Decrement destination address"
|
|
bitfld.long 0x0 20. "SRCINCSIGN,Source Address Increment Sign" "0: Increment source address,1: Decrement source address"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "ARBSLOTS,Arbitration Slot Number Select" "0: One arbitration slot selected,1: Two arbitration slots selected,2: Four arbitration slots selected,3: Eight arbitration slots selected"
|
|
line.long 0x4 "CH0_LOOP,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "LOOPCNT,Linked Structure Sequence Loop Counter"
|
|
line.long 0x8 "CH0_CTRL,No Description"
|
|
rbitfld.long 0x8 31. "DSTMODE,Destination Addressing Mode" "0: The DSTADDR field of LDMA_CHx_DST contains the..,1: The DSTADDR field of LDMA_CHx_DST contains the.."
|
|
rbitfld.long 0x8 30. "SRCMODE,Source Addressing Mode" "0: The SRCADDR field of LDMA_CHx_SRC contains the..,1: The SRCADDR field of LDMA_CHx_SRC contains the.."
|
|
newline
|
|
bitfld.long 0x8 28.--29. "DSTINC,Destination Address Increment Size" "0: Increment destination address by one unit data..,1: Increment destination address by two unit data..,2: Increment destination address by four unit data..,3: Do not increment the destination address. Writes.."
|
|
bitfld.long 0x8 26.--27. "SIZE,Unit Data Transfer Size" "0: Each unit transfer is a byte,1: Each unit transfer is a half-word,2: Each unit transfer is a word,?"
|
|
newline
|
|
bitfld.long 0x8 24.--25. "SRCINC,Source Address Increment Size" "0: Increment source address by one unit data size..,1: Increment source address by two unit data sizes..,2: Increment source address by four unit data sizes..,3: Do not increment the source address. In this.."
|
|
bitfld.long 0x8 23. "IGNORESREQ,Ignore Sreq" "0,1"
|
|
newline
|
|
bitfld.long 0x8 22. "DECLOOPCNT,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x8 21. "REQMODE,DMA Request Transfer Mode Select" "0: The LDMA transfers one BLOCKSIZE per transfer..,1: One transfer request transfers all units as.."
|
|
newline
|
|
bitfld.long 0x8 20. "DONEIEN,DMA Operation Done Interrupt Flag Set En" "0,1"
|
|
hexmask.long.byte 0x8 16.--19. 1. "BLOCKSIZE,Block Transfer Size"
|
|
newline
|
|
bitfld.long 0x8 15. "BYTESWAP,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x8 4.--14. 1. "XFERCNT,DMA Unit Data Transfer Count"
|
|
newline
|
|
rbitfld.long 0x8 3. "STRUCTREQ,Structure DMA Transfer Request" "0,1"
|
|
bitfld.long 0x8 0.--1. "STRUCTTYPE,DMA Structure Type" "0: DMA transfer structure type selected.,1: Synchronization structure type selected.,2: Write immediate value structure type selected.,?"
|
|
line.long 0xC "CH0_SRC,No Description"
|
|
hexmask.long 0xC 0.--31. 1. "SRCADDR,Source Data Address"
|
|
line.long 0x10 "CH0_DST,No Description"
|
|
hexmask.long 0x10 0.--31. 1. "DSTADDR,Destination Data Address"
|
|
line.long 0x14 "CH0_LINK,No Description"
|
|
hexmask.long 0x14 2.--31. 1. "LINKADDR,Link Structure Address"
|
|
bitfld.long 0x14 1. "LINK,Link Next Structure" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 0. "LINKMODE,Link Structure Addressing Mode" "0: The LINKADDR field of LDMA_CHx_LINK contains the..,1: The LINKADDR field of LDMA_CHx_LINK contains the.."
|
|
group.long 0x8C++0x17
|
|
line.long 0x0 "CH1_CFG,No Description"
|
|
bitfld.long 0x0 21. "DSTINCSIGN,Destination Address Increment Sign" "0: Increment destination address,1: Decrement destination address"
|
|
bitfld.long 0x0 20. "SRCINCSIGN,Source Address Increment Sign" "0: Increment source address,1: Decrement source address"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "ARBSLOTS,Arbitration Slot Number Select" "0: One arbitration slot selected,1: Two arbitration slots selected,2: Four arbitration slots selected,3: Eight arbitration slots selected"
|
|
line.long 0x4 "CH1_LOOP,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "LOOPCNT,Linked Structure Sequence Loop Counter"
|
|
line.long 0x8 "CH1_CTRL,No Description"
|
|
rbitfld.long 0x8 31. "DSTMODE,Destination Addressing Mode" "0: The DSTADDR field of LDMA_CHx_DST contains the..,1: The DSTADDR field of LDMA_CHx_DST contains the.."
|
|
rbitfld.long 0x8 30. "SRCMODE,Source Addressing Mode" "0: The SRCADDR field of LDMA_CHx_SRC contains the..,1: The SRCADDR field of LDMA_CHx_SRC contains the.."
|
|
newline
|
|
bitfld.long 0x8 28.--29. "DSTINC,Destination Address Increment Size" "0: Increment destination address by one unit data..,1: Increment destination address by two unit data..,2: Increment destination address by four unit data..,3: Do not increment the destination address. Writes.."
|
|
bitfld.long 0x8 26.--27. "SIZE,Unit Data Transfer Size" "0: Each unit transfer is a byte,1: Each unit transfer is a half-word,2: Each unit transfer is a word,?"
|
|
newline
|
|
bitfld.long 0x8 24.--25. "SRCINC,Source Address Increment Size" "0: Increment source address by one unit data size..,1: Increment source address by two unit data sizes..,2: Increment source address by four unit data sizes..,3: Do not increment the source address. In this.."
|
|
bitfld.long 0x8 23. "IGNORESREQ,Ignore Sreq" "0,1"
|
|
newline
|
|
bitfld.long 0x8 22. "DECLOOPCNT,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x8 21. "REQMODE,DMA Request Transfer Mode Select" "0: The LDMA transfers one BLOCKSIZE per transfer..,1: One transfer request transfers all units as.."
|
|
newline
|
|
bitfld.long 0x8 20. "DONEIEN,DMA Operation Done Interrupt Flag Set En" "0,1"
|
|
hexmask.long.byte 0x8 16.--19. 1. "BLOCKSIZE,Block Transfer Size"
|
|
newline
|
|
bitfld.long 0x8 15. "BYTESWAP,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x8 4.--14. 1. "XFERCNT,DMA Unit Data Transfer Count"
|
|
newline
|
|
rbitfld.long 0x8 3. "STRUCTREQ,Structure DMA Transfer Request" "0,1"
|
|
bitfld.long 0x8 0.--1. "STRUCTTYPE,DMA Structure Type" "0: DMA transfer structure type selected.,1: Synchronization structure type selected.,2: Write immediate value structure type selected.,?"
|
|
line.long 0xC "CH1_SRC,No Description"
|
|
hexmask.long 0xC 0.--31. 1. "SRCADDR,Source Data Address"
|
|
line.long 0x10 "CH1_DST,No Description"
|
|
hexmask.long 0x10 0.--31. 1. "DSTADDR,Destination Data Address"
|
|
line.long 0x14 "CH1_LINK,No Description"
|
|
hexmask.long 0x14 2.--31. 1. "LINKADDR,Link Structure Address"
|
|
bitfld.long 0x14 1. "LINK,Link Next Structure" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 0. "LINKMODE,Link Structure Addressing Mode" "0: The LINKADDR field of LDMA_CHx_LINK contains the..,1: The LINKADDR field of LDMA_CHx_LINK contains the.."
|
|
group.long 0xBC++0x17
|
|
line.long 0x0 "CH2_CFG,No Description"
|
|
bitfld.long 0x0 21. "DSTINCSIGN,Destination Address Increment Sign" "0: Increment destination address,1: Decrement destination address"
|
|
bitfld.long 0x0 20. "SRCINCSIGN,Source Address Increment Sign" "0: Increment source address,1: Decrement source address"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "ARBSLOTS,Arbitration Slot Number Select" "0: One arbitration slot selected,1: Two arbitration slots selected,2: Four arbitration slots selected,3: Eight arbitration slots selected"
|
|
line.long 0x4 "CH2_LOOP,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "LOOPCNT,Linked Structure Sequence Loop Counter"
|
|
line.long 0x8 "CH2_CTRL,No Description"
|
|
rbitfld.long 0x8 31. "DSTMODE,Destination Addressing Mode" "0: The DSTADDR field of LDMA_CHx_DST contains the..,1: The DSTADDR field of LDMA_CHx_DST contains the.."
|
|
rbitfld.long 0x8 30. "SRCMODE,Source Addressing Mode" "0: The SRCADDR field of LDMA_CHx_SRC contains the..,1: The SRCADDR field of LDMA_CHx_SRC contains the.."
|
|
newline
|
|
bitfld.long 0x8 28.--29. "DSTINC,Destination Address Increment Size" "0: Increment destination address by one unit data..,1: Increment destination address by two unit data..,2: Increment destination address by four unit data..,3: Do not increment the destination address. Writes.."
|
|
bitfld.long 0x8 26.--27. "SIZE,Unit Data Transfer Size" "0: Each unit transfer is a byte,1: Each unit transfer is a half-word,2: Each unit transfer is a word,?"
|
|
newline
|
|
bitfld.long 0x8 24.--25. "SRCINC,Source Address Increment Size" "0: Increment source address by one unit data size..,1: Increment source address by two unit data sizes..,2: Increment source address by four unit data sizes..,3: Do not increment the source address. In this.."
|
|
bitfld.long 0x8 23. "IGNORESREQ,Ignore Sreq" "0,1"
|
|
newline
|
|
bitfld.long 0x8 22. "DECLOOPCNT,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x8 21. "REQMODE,DMA Request Transfer Mode Select" "0: The LDMA transfers one BLOCKSIZE per transfer..,1: One transfer request transfers all units as.."
|
|
newline
|
|
bitfld.long 0x8 20. "DONEIEN,DMA Operation Done Interrupt Flag Set En" "0,1"
|
|
hexmask.long.byte 0x8 16.--19. 1. "BLOCKSIZE,Block Transfer Size"
|
|
newline
|
|
bitfld.long 0x8 15. "BYTESWAP,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x8 4.--14. 1. "XFERCNT,DMA Unit Data Transfer Count"
|
|
newline
|
|
rbitfld.long 0x8 3. "STRUCTREQ,Structure DMA Transfer Request" "0,1"
|
|
bitfld.long 0x8 0.--1. "STRUCTTYPE,DMA Structure Type" "0: DMA transfer structure type selected.,1: Synchronization structure type selected.,2: Write immediate value structure type selected.,?"
|
|
line.long 0xC "CH2_SRC,No Description"
|
|
hexmask.long 0xC 0.--31. 1. "SRCADDR,Source Data Address"
|
|
line.long 0x10 "CH2_DST,No Description"
|
|
hexmask.long 0x10 0.--31. 1. "DSTADDR,Destination Data Address"
|
|
line.long 0x14 "CH2_LINK,No Description"
|
|
hexmask.long 0x14 2.--31. 1. "LINKADDR,Link Structure Address"
|
|
bitfld.long 0x14 1. "LINK,Link Next Structure" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 0. "LINKMODE,Link Structure Addressing Mode" "0: The LINKADDR field of LDMA_CHx_LINK contains the..,1: The LINKADDR field of LDMA_CHx_LINK contains the.."
|
|
group.long 0xEC++0x17
|
|
line.long 0x0 "CH3_CFG,No Description"
|
|
bitfld.long 0x0 21. "DSTINCSIGN,Destination Address Increment Sign" "0: Increment destination address,1: Decrement destination address"
|
|
bitfld.long 0x0 20. "SRCINCSIGN,Source Address Increment Sign" "0: Increment source address,1: Decrement source address"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "ARBSLOTS,Arbitration Slot Number Select" "0: One arbitration slot selected,1: Two arbitration slots selected,2: Four arbitration slots selected,3: Eight arbitration slots selected"
|
|
line.long 0x4 "CH3_LOOP,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "LOOPCNT,Linked Structure Sequence Loop Counter"
|
|
line.long 0x8 "CH3_CTRL,No Description"
|
|
rbitfld.long 0x8 31. "DSTMODE,Destination Addressing Mode" "0: The DSTADDR field of LDMA_CHx_DST contains the..,1: The DSTADDR field of LDMA_CHx_DST contains the.."
|
|
rbitfld.long 0x8 30. "SRCMODE,Source Addressing Mode" "0: The SRCADDR field of LDMA_CHx_SRC contains the..,1: The SRCADDR field of LDMA_CHx_SRC contains the.."
|
|
newline
|
|
bitfld.long 0x8 28.--29. "DSTINC,Destination Address Increment Size" "0: Increment destination address by one unit data..,1: Increment destination address by two unit data..,2: Increment destination address by four unit data..,3: Do not increment the destination address. Writes.."
|
|
bitfld.long 0x8 26.--27. "SIZE,Unit Data Transfer Size" "0: Each unit transfer is a byte,1: Each unit transfer is a half-word,2: Each unit transfer is a word,?"
|
|
newline
|
|
bitfld.long 0x8 24.--25. "SRCINC,Source Address Increment Size" "0: Increment source address by one unit data size..,1: Increment source address by two unit data sizes..,2: Increment source address by four unit data sizes..,3: Do not increment the source address. In this.."
|
|
bitfld.long 0x8 23. "IGNORESREQ,Ignore Sreq" "0,1"
|
|
newline
|
|
bitfld.long 0x8 22. "DECLOOPCNT,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x8 21. "REQMODE,DMA Request Transfer Mode Select" "0: The LDMA transfers one BLOCKSIZE per transfer..,1: One transfer request transfers all units as.."
|
|
newline
|
|
bitfld.long 0x8 20. "DONEIEN,DMA Operation Done Interrupt Flag Set En" "0,1"
|
|
hexmask.long.byte 0x8 16.--19. 1. "BLOCKSIZE,Block Transfer Size"
|
|
newline
|
|
bitfld.long 0x8 15. "BYTESWAP,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x8 4.--14. 1. "XFERCNT,DMA Unit Data Transfer Count"
|
|
newline
|
|
rbitfld.long 0x8 3. "STRUCTREQ,Structure DMA Transfer Request" "0,1"
|
|
bitfld.long 0x8 0.--1. "STRUCTTYPE,DMA Structure Type" "0: DMA transfer structure type selected.,1: Synchronization structure type selected.,2: Write immediate value structure type selected.,?"
|
|
line.long 0xC "CH3_SRC,No Description"
|
|
hexmask.long 0xC 0.--31. 1. "SRCADDR,Source Data Address"
|
|
line.long 0x10 "CH3_DST,No Description"
|
|
hexmask.long 0x10 0.--31. 1. "DSTADDR,Destination Data Address"
|
|
line.long 0x14 "CH3_LINK,No Description"
|
|
hexmask.long 0x14 2.--31. 1. "LINKADDR,Link Structure Address"
|
|
bitfld.long 0x14 1. "LINK,Link Next Structure" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 0. "LINKMODE,Link Structure Addressing Mode" "0: The LINKADDR field of LDMA_CHx_LINK contains the..,1: The LINKADDR field of LDMA_CHx_LINK contains the.."
|
|
group.long 0x11C++0x17
|
|
line.long 0x0 "CH4_CFG,No Description"
|
|
bitfld.long 0x0 21. "DSTINCSIGN,Destination Address Increment Sign" "0: Increment destination address,1: Decrement destination address"
|
|
bitfld.long 0x0 20. "SRCINCSIGN,Source Address Increment Sign" "0: Increment source address,1: Decrement source address"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "ARBSLOTS,Arbitration Slot Number Select" "0: One arbitration slot selected,1: Two arbitration slots selected,2: Four arbitration slots selected,3: Eight arbitration slots selected"
|
|
line.long 0x4 "CH4_LOOP,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "LOOPCNT,Linked Structure Sequence Loop Counter"
|
|
line.long 0x8 "CH4_CTRL,No Description"
|
|
rbitfld.long 0x8 31. "DSTMODE,Destination Addressing Mode" "0: The DSTADDR field of LDMA_CHx_DST contains the..,1: The DSTADDR field of LDMA_CHx_DST contains the.."
|
|
rbitfld.long 0x8 30. "SRCMODE,Source Addressing Mode" "0: The SRCADDR field of LDMA_CHx_SRC contains the..,1: The SRCADDR field of LDMA_CHx_SRC contains the.."
|
|
newline
|
|
bitfld.long 0x8 28.--29. "DSTINC,Destination Address Increment Size" "0: Increment destination address by one unit data..,1: Increment destination address by two unit data..,2: Increment destination address by four unit data..,3: Do not increment the destination address. Writes.."
|
|
bitfld.long 0x8 26.--27. "SIZE,Unit Data Transfer Size" "0: Each unit transfer is a byte,1: Each unit transfer is a half-word,2: Each unit transfer is a word,?"
|
|
newline
|
|
bitfld.long 0x8 24.--25. "SRCINC,Source Address Increment Size" "0: Increment source address by one unit data size..,1: Increment source address by two unit data sizes..,2: Increment source address by four unit data sizes..,3: Do not increment the source address. In this.."
|
|
bitfld.long 0x8 23. "IGNORESREQ,Ignore Sreq" "0,1"
|
|
newline
|
|
bitfld.long 0x8 22. "DECLOOPCNT,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x8 21. "REQMODE,DMA Request Transfer Mode Select" "0: The LDMA transfers one BLOCKSIZE per transfer..,1: One transfer request transfers all units as.."
|
|
newline
|
|
bitfld.long 0x8 20. "DONEIEN,DMA Operation Done Interrupt Flag Set En" "0,1"
|
|
hexmask.long.byte 0x8 16.--19. 1. "BLOCKSIZE,Block Transfer Size"
|
|
newline
|
|
bitfld.long 0x8 15. "BYTESWAP,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x8 4.--14. 1. "XFERCNT,DMA Unit Data Transfer Count"
|
|
newline
|
|
rbitfld.long 0x8 3. "STRUCTREQ,Structure DMA Transfer Request" "0,1"
|
|
bitfld.long 0x8 0.--1. "STRUCTTYPE,DMA Structure Type" "0: DMA transfer structure type selected.,1: Synchronization structure type selected.,2: Write immediate value structure type selected.,?"
|
|
line.long 0xC "CH4_SRC,No Description"
|
|
hexmask.long 0xC 0.--31. 1. "SRCADDR,Source Data Address"
|
|
line.long 0x10 "CH4_DST,No Description"
|
|
hexmask.long 0x10 0.--31. 1. "DSTADDR,Destination Data Address"
|
|
line.long 0x14 "CH4_LINK,No Description"
|
|
hexmask.long 0x14 2.--31. 1. "LINKADDR,Link Structure Address"
|
|
bitfld.long 0x14 1. "LINK,Link Next Structure" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 0. "LINKMODE,Link Structure Addressing Mode" "0: The LINKADDR field of LDMA_CHx_LINK contains the..,1: The LINKADDR field of LDMA_CHx_LINK contains the.."
|
|
group.long 0x14C++0x17
|
|
line.long 0x0 "CH5_CFG,No Description"
|
|
bitfld.long 0x0 21. "DSTINCSIGN,Destination Address Increment Sign" "0: Increment destination address,1: Decrement destination address"
|
|
bitfld.long 0x0 20. "SRCINCSIGN,Source Address Increment Sign" "0: Increment source address,1: Decrement source address"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "ARBSLOTS,Arbitration Slot Number Select" "0: One arbitration slot selected,1: Two arbitration slots selected,2: Four arbitration slots selected,3: Eight arbitration slots selected"
|
|
line.long 0x4 "CH5_LOOP,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "LOOPCNT,Linked Structure Sequence Loop Counter"
|
|
line.long 0x8 "CH5_CTRL,No Description"
|
|
rbitfld.long 0x8 31. "DSTMODE,Destination Addressing Mode" "0: The DSTADDR field of LDMA_CHx_DST contains the..,1: The DSTADDR field of LDMA_CHx_DST contains the.."
|
|
rbitfld.long 0x8 30. "SRCMODE,Source Addressing Mode" "0: The SRCADDR field of LDMA_CHx_SRC contains the..,1: The SRCADDR field of LDMA_CHx_SRC contains the.."
|
|
newline
|
|
bitfld.long 0x8 28.--29. "DSTINC,Destination Address Increment Size" "0: Increment destination address by one unit data..,1: Increment destination address by two unit data..,2: Increment destination address by four unit data..,3: Do not increment the destination address. Writes.."
|
|
bitfld.long 0x8 26.--27. "SIZE,Unit Data Transfer Size" "0: Each unit transfer is a byte,1: Each unit transfer is a half-word,2: Each unit transfer is a word,?"
|
|
newline
|
|
bitfld.long 0x8 24.--25. "SRCINC,Source Address Increment Size" "0: Increment source address by one unit data size..,1: Increment source address by two unit data sizes..,2: Increment source address by four unit data sizes..,3: Do not increment the source address. In this.."
|
|
bitfld.long 0x8 23. "IGNORESREQ,Ignore Sreq" "0,1"
|
|
newline
|
|
bitfld.long 0x8 22. "DECLOOPCNT,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x8 21. "REQMODE,DMA Request Transfer Mode Select" "0: The LDMA transfers one BLOCKSIZE per transfer..,1: One transfer request transfers all units as.."
|
|
newline
|
|
bitfld.long 0x8 20. "DONEIEN,DMA Operation Done Interrupt Flag Set En" "0,1"
|
|
hexmask.long.byte 0x8 16.--19. 1. "BLOCKSIZE,Block Transfer Size"
|
|
newline
|
|
bitfld.long 0x8 15. "BYTESWAP,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x8 4.--14. 1. "XFERCNT,DMA Unit Data Transfer Count"
|
|
newline
|
|
rbitfld.long 0x8 3. "STRUCTREQ,Structure DMA Transfer Request" "0,1"
|
|
bitfld.long 0x8 0.--1. "STRUCTTYPE,DMA Structure Type" "0: DMA transfer structure type selected.,1: Synchronization structure type selected.,2: Write immediate value structure type selected.,?"
|
|
line.long 0xC "CH5_SRC,No Description"
|
|
hexmask.long 0xC 0.--31. 1. "SRCADDR,Source Data Address"
|
|
line.long 0x10 "CH5_DST,No Description"
|
|
hexmask.long 0x10 0.--31. 1. "DSTADDR,Destination Data Address"
|
|
line.long 0x14 "CH5_LINK,No Description"
|
|
hexmask.long 0x14 2.--31. 1. "LINKADDR,Link Structure Address"
|
|
bitfld.long 0x14 1. "LINK,Link Next Structure" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 0. "LINKMODE,Link Structure Addressing Mode" "0: The LINKADDR field of LDMA_CHx_LINK contains the..,1: The LINKADDR field of LDMA_CHx_LINK contains the.."
|
|
group.long 0x17C++0x17
|
|
line.long 0x0 "CH6_CFG,No Description"
|
|
bitfld.long 0x0 21. "DSTINCSIGN,Destination Address Increment Sign" "0: Increment destination address,1: Decrement destination address"
|
|
bitfld.long 0x0 20. "SRCINCSIGN,Source Address Increment Sign" "0: Increment source address,1: Decrement source address"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "ARBSLOTS,Arbitration Slot Number Select" "0: One arbitration slot selected,1: Two arbitration slots selected,2: Four arbitration slots selected,3: Eight arbitration slots selected"
|
|
line.long 0x4 "CH6_LOOP,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "LOOPCNT,Linked Structure Sequence Loop Counter"
|
|
line.long 0x8 "CH6_CTRL,No Description"
|
|
rbitfld.long 0x8 31. "DSTMODE,Destination Addressing Mode" "0: The DSTADDR field of LDMA_CHx_DST contains the..,1: The DSTADDR field of LDMA_CHx_DST contains the.."
|
|
rbitfld.long 0x8 30. "SRCMODE,Source Addressing Mode" "0: The SRCADDR field of LDMA_CHx_SRC contains the..,1: The SRCADDR field of LDMA_CHx_SRC contains the.."
|
|
newline
|
|
bitfld.long 0x8 28.--29. "DSTINC,Destination Address Increment Size" "0: Increment destination address by one unit data..,1: Increment destination address by two unit data..,2: Increment destination address by four unit data..,3: Do not increment the destination address. Writes.."
|
|
bitfld.long 0x8 26.--27. "SIZE,Unit Data Transfer Size" "0: Each unit transfer is a byte,1: Each unit transfer is a half-word,2: Each unit transfer is a word,?"
|
|
newline
|
|
bitfld.long 0x8 24.--25. "SRCINC,Source Address Increment Size" "0: Increment source address by one unit data size..,1: Increment source address by two unit data sizes..,2: Increment source address by four unit data sizes..,3: Do not increment the source address. In this.."
|
|
bitfld.long 0x8 23. "IGNORESREQ,Ignore Sreq" "0,1"
|
|
newline
|
|
bitfld.long 0x8 22. "DECLOOPCNT,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x8 21. "REQMODE,DMA Request Transfer Mode Select" "0: The LDMA transfers one BLOCKSIZE per transfer..,1: One transfer request transfers all units as.."
|
|
newline
|
|
bitfld.long 0x8 20. "DONEIEN,DMA Operation Done Interrupt Flag Set En" "0,1"
|
|
hexmask.long.byte 0x8 16.--19. 1. "BLOCKSIZE,Block Transfer Size"
|
|
newline
|
|
bitfld.long 0x8 15. "BYTESWAP,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x8 4.--14. 1. "XFERCNT,DMA Unit Data Transfer Count"
|
|
newline
|
|
rbitfld.long 0x8 3. "STRUCTREQ,Structure DMA Transfer Request" "0,1"
|
|
bitfld.long 0x8 0.--1. "STRUCTTYPE,DMA Structure Type" "0: DMA transfer structure type selected.,1: Synchronization structure type selected.,2: Write immediate value structure type selected.,?"
|
|
line.long 0xC "CH6_SRC,No Description"
|
|
hexmask.long 0xC 0.--31. 1. "SRCADDR,Source Data Address"
|
|
line.long 0x10 "CH6_DST,No Description"
|
|
hexmask.long 0x10 0.--31. 1. "DSTADDR,Destination Data Address"
|
|
line.long 0x14 "CH6_LINK,No Description"
|
|
hexmask.long 0x14 2.--31. 1. "LINKADDR,Link Structure Address"
|
|
bitfld.long 0x14 1. "LINK,Link Next Structure" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 0. "LINKMODE,Link Structure Addressing Mode" "0: The LINKADDR field of LDMA_CHx_LINK contains the..,1: The LINKADDR field of LDMA_CHx_LINK contains the.."
|
|
group.long 0x1AC++0x17
|
|
line.long 0x0 "CH7_CFG,No Description"
|
|
bitfld.long 0x0 21. "DSTINCSIGN,Destination Address Increment Sign" "0: Increment destination address,1: Decrement destination address"
|
|
bitfld.long 0x0 20. "SRCINCSIGN,Source Address Increment Sign" "0: Increment source address,1: Decrement source address"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "ARBSLOTS,Arbitration Slot Number Select" "0: One arbitration slot selected,1: Two arbitration slots selected,2: Four arbitration slots selected,3: Eight arbitration slots selected"
|
|
line.long 0x4 "CH7_LOOP,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "LOOPCNT,Linked Structure Sequence Loop Counter"
|
|
line.long 0x8 "CH7_CTRL,No Description"
|
|
rbitfld.long 0x8 31. "DSTMODE,Destination Addressing Mode" "0: The DSTADDR field of LDMA_CHx_DST contains the..,1: The DSTADDR field of LDMA_CHx_DST contains the.."
|
|
rbitfld.long 0x8 30. "SRCMODE,Source Addressing Mode" "0: The SRCADDR field of LDMA_CHx_SRC contains the..,1: The SRCADDR field of LDMA_CHx_SRC contains the.."
|
|
newline
|
|
bitfld.long 0x8 28.--29. "DSTINC,Destination Address Increment Size" "0: Increment destination address by one unit data..,1: Increment destination address by two unit data..,2: Increment destination address by four unit data..,3: Do not increment the destination address. Writes.."
|
|
bitfld.long 0x8 26.--27. "SIZE,Unit Data Transfer Size" "0: Each unit transfer is a byte,1: Each unit transfer is a half-word,2: Each unit transfer is a word,?"
|
|
newline
|
|
bitfld.long 0x8 24.--25. "SRCINC,Source Address Increment Size" "0: Increment source address by one unit data size..,1: Increment source address by two unit data sizes..,2: Increment source address by four unit data sizes..,3: Do not increment the source address. In this.."
|
|
bitfld.long 0x8 23. "IGNORESREQ,Ignore Sreq" "0,1"
|
|
newline
|
|
bitfld.long 0x8 22. "DECLOOPCNT,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x8 21. "REQMODE,DMA Request Transfer Mode Select" "0: The LDMA transfers one BLOCKSIZE per transfer..,1: One transfer request transfers all units as.."
|
|
newline
|
|
bitfld.long 0x8 20. "DONEIEN,DMA Operation Done Interrupt Flag Set En" "0,1"
|
|
hexmask.long.byte 0x8 16.--19. 1. "BLOCKSIZE,Block Transfer Size"
|
|
newline
|
|
bitfld.long 0x8 15. "BYTESWAP,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x8 4.--14. 1. "XFERCNT,DMA Unit Data Transfer Count"
|
|
newline
|
|
rbitfld.long 0x8 3. "STRUCTREQ,Structure DMA Transfer Request" "0,1"
|
|
bitfld.long 0x8 0.--1. "STRUCTTYPE,DMA Structure Type" "0: DMA transfer structure type selected.,1: Synchronization structure type selected.,2: Write immediate value structure type selected.,?"
|
|
line.long 0xC "CH7_SRC,No Description"
|
|
hexmask.long 0xC 0.--31. 1. "SRCADDR,Source Data Address"
|
|
line.long 0x10 "CH7_DST,No Description"
|
|
hexmask.long 0x10 0.--31. 1. "DSTADDR,Destination Data Address"
|
|
line.long 0x14 "CH7_LINK,No Description"
|
|
hexmask.long 0x14 2.--31. 1. "LINKADDR,Link Structure Address"
|
|
bitfld.long 0x14 1. "LINK,Link Next Structure" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 0. "LINKMODE,Link Structure Addressing Mode" "0: The LINKADDR field of LDMA_CHx_LINK contains the..,1: The LINKADDR field of LDMA_CHx_LINK contains the.."
|
|
tree.end
|
|
tree "LDMAXBAR_NS"
|
|
base ad:0x50044000
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "CH0_REQSEL,No Description"
|
|
hexmask.long.byte 0x0 16.--21. 1. "SOURCESEL,Source Select"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SIGSEL,Signal Select"
|
|
line.long 0x4 "CH1_REQSEL,No Description"
|
|
hexmask.long.byte 0x4 16.--21. 1. "SOURCESEL,Source Select"
|
|
hexmask.long.byte 0x4 0.--3. 1. "SIGSEL,Signal Select"
|
|
line.long 0x8 "CH2_REQSEL,No Description"
|
|
hexmask.long.byte 0x8 16.--21. 1. "SOURCESEL,Source Select"
|
|
hexmask.long.byte 0x8 0.--3. 1. "SIGSEL,Signal Select"
|
|
line.long 0xC "CH3_REQSEL,No Description"
|
|
hexmask.long.byte 0xC 16.--21. 1. "SOURCESEL,Source Select"
|
|
hexmask.long.byte 0xC 0.--3. 1. "SIGSEL,Signal Select"
|
|
line.long 0x10 "CH4_REQSEL,No Description"
|
|
hexmask.long.byte 0x10 16.--21. 1. "SOURCESEL,Source Select"
|
|
hexmask.long.byte 0x10 0.--3. 1. "SIGSEL,Signal Select"
|
|
line.long 0x14 "CH5_REQSEL,No Description"
|
|
hexmask.long.byte 0x14 16.--21. 1. "SOURCESEL,Source Select"
|
|
hexmask.long.byte 0x14 0.--3. 1. "SIGSEL,Signal Select"
|
|
line.long 0x18 "CH6_REQSEL,No Description"
|
|
hexmask.long.byte 0x18 16.--21. 1. "SOURCESEL,Source Select"
|
|
hexmask.long.byte 0x18 0.--3. 1. "SIGSEL,Signal Select"
|
|
line.long 0x1C "CH7_REQSEL,No Description"
|
|
hexmask.long.byte 0x1C 16.--21. 1. "SOURCESEL,Source Select"
|
|
hexmask.long.byte 0x1C 0.--3. 1. "SIGSEL,Signal Select"
|
|
tree.end
|
|
tree "LDMAXBAR_S"
|
|
base ad:0x40044000
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "CH0_REQSEL,No Description"
|
|
hexmask.long.byte 0x0 16.--21. 1. "SOURCESEL,Source Select"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SIGSEL,Signal Select"
|
|
line.long 0x4 "CH1_REQSEL,No Description"
|
|
hexmask.long.byte 0x4 16.--21. 1. "SOURCESEL,Source Select"
|
|
hexmask.long.byte 0x4 0.--3. 1. "SIGSEL,Signal Select"
|
|
line.long 0x8 "CH2_REQSEL,No Description"
|
|
hexmask.long.byte 0x8 16.--21. 1. "SOURCESEL,Source Select"
|
|
hexmask.long.byte 0x8 0.--3. 1. "SIGSEL,Signal Select"
|
|
line.long 0xC "CH3_REQSEL,No Description"
|
|
hexmask.long.byte 0xC 16.--21. 1. "SOURCESEL,Source Select"
|
|
hexmask.long.byte 0xC 0.--3. 1. "SIGSEL,Signal Select"
|
|
line.long 0x10 "CH4_REQSEL,No Description"
|
|
hexmask.long.byte 0x10 16.--21. 1. "SOURCESEL,Source Select"
|
|
hexmask.long.byte 0x10 0.--3. 1. "SIGSEL,Signal Select"
|
|
line.long 0x14 "CH5_REQSEL,No Description"
|
|
hexmask.long.byte 0x14 16.--21. 1. "SOURCESEL,Source Select"
|
|
hexmask.long.byte 0x14 0.--3. 1. "SIGSEL,Signal Select"
|
|
line.long 0x18 "CH6_REQSEL,No Description"
|
|
hexmask.long.byte 0x18 16.--21. 1. "SOURCESEL,Source Select"
|
|
hexmask.long.byte 0x18 0.--3. 1. "SIGSEL,Signal Select"
|
|
line.long 0x1C "CH7_REQSEL,No Description"
|
|
hexmask.long.byte 0x1C 16.--21. 1. "SOURCESEL,Source Select"
|
|
hexmask.long.byte 0x1C 0.--3. 1. "SIGSEL,Signal Select"
|
|
tree.end
|
|
tree.end
|
|
tree "LETIMER (Low Energy Timer)"
|
|
base ad:0x0
|
|
tree "LETIMER0_NS"
|
|
base ad:0x5A000000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,module en" "0,1"
|
|
line.long 0x4 "CTRL,No Description"
|
|
hexmask.long.byte 0x4 16.--19. 1. "CNTPRESC,Counter prescaler value"
|
|
bitfld.long 0x4 12. "DEBUGRUN,Debug Mode Run Enable" "0: LETIMER is frozen in debug mode,1: LETIMER is running in debug mode"
|
|
newline
|
|
bitfld.long 0x4 9. "CNTTOPEN,Compare Value 0 Is Top Value" "0: The top value of the LETIMER is 16777215..,1: The top value of the LETIMER is given by TOP"
|
|
bitfld.long 0x4 8. "BUFTOP,Buffered Top" "0: TOP is only written by software,1: TOP is set to TOPBUFF value when REP0 reaches 0"
|
|
newline
|
|
bitfld.long 0x4 7. "OPOL1,Output 1 Polarity" "0,1"
|
|
bitfld.long 0x4 6. "OPOL0,Output 0 Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4.--5. "UFOA1,Underflow Output Action 1" "0: LETIMERn_OUT1 is held at its idle value as..,1: LETIMERn_OUT1 is toggled on CNT underflow,2: LETIMERn_OUT1 is held active for one LETIMER0..,3: LETIMERn_OUT1 is set idle on CNT underflow and.."
|
|
bitfld.long 0x4 2.--3. "UFOA0,Underflow Output Action 0" "0: LETIMERn_OUT0 is held at its idle value as..,1: LETIMERn_OUT0 is toggled on CNT underflow,2: LETIMERn_OUT0 is held active for one LETIMER0..,3: LETIMERn_OUT0 is set idle on CNT underflow and.."
|
|
newline
|
|
bitfld.long 0x4 0.--1. "REPMODE,Repeat Mode" "0: When started the LETIMER counts down until it is..,1: The counter counts REP0 times. When REP0 reaches..,2: The counter counts REP0 times. If REP1 has been..,3: Both REP0 and REP1 are decremented when the.."
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 4. "CTO1,Clear Toggle Output 1" "0,1"
|
|
bitfld.long 0x0 3. "CTO0,Clear Toggle Output 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CLEAR,Clear LETIMER" "0,1"
|
|
bitfld.long 0x0 1. "STOP,Stop LETIMER" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "START,Start LETIMER" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 0. "RUNNING,LETIMER Running" "0,1"
|
|
group.long 0x18++0x23
|
|
line.long 0x0 "CNT,No Description"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CNT,Counter Value"
|
|
line.long 0x4 "COMP0,No Description"
|
|
hexmask.long.tbyte 0x4 0.--23. 1. "COMP0,Compare Value 0"
|
|
line.long 0x8 "COMP1,No Description"
|
|
hexmask.long.tbyte 0x8 0.--23. 1. "COMP1,Compare Value 1"
|
|
line.long 0xC "TOP,No Description"
|
|
hexmask.long.tbyte 0xC 0.--23. 1. "TOP,Counter TOP Value"
|
|
line.long 0x10 "TOPBUFF,No Description"
|
|
hexmask.long.tbyte 0x10 0.--23. 1. "TOPBUFF,Buffered Counter TOP Value"
|
|
line.long 0x14 "REP0,No Description"
|
|
hexmask.long.byte 0x14 0.--7. 1. "REP0,Repeat Counter 0"
|
|
line.long 0x18 "REP1,No Description"
|
|
hexmask.long.byte 0x18 0.--7. 1. "REP1,Repeat Counter 1"
|
|
line.long 0x1C "IF,No Description"
|
|
bitfld.long 0x1C 4. "REP1,Repeat Counter 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x1C 3. "REP0,Repeat Counter 0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 2. "UF,Underflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x1C 1. "COMP1,Compare Match 1 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 0. "COMP0,Compare Match 0 Interrupt Flag" "0,1"
|
|
line.long 0x20 "IEN,No Description"
|
|
bitfld.long 0x20 4. "REP1,Repeat Counter 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x20 3. "REP0,Repeat Counter 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x20 2. "UF,Underflow Interrupt Enable" "0,1"
|
|
bitfld.long 0x20 1. "COMP1,Compare Match 1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x20 0. "COMP0,Compare Match 0 Interrupt Enable" "0,1"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x0 "SYNCBUSY,No Description"
|
|
bitfld.long 0x0 9. "CTO1,Sync busy for CTO1" "0,1"
|
|
bitfld.long 0x0 8. "CTO0,Sync busy for CTO0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "CLEAR,Sync busy for CLEAR" "0,1"
|
|
bitfld.long 0x0 6. "STOP,Sync busy for STOP" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "START,Sync busy for START" "0,1"
|
|
bitfld.long 0x0 4. "REP1,Sync busy for REP1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "REP0,Sync busy for REP0" "0,1"
|
|
bitfld.long 0x0 2. "TOP,Sync busy for TOP" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "CNT,Sync busy for CNT" "0,1"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "PRSMODE,No Description"
|
|
bitfld.long 0x0 26.--27. "PRSCLEARMODE,PRS Clear Mode" "0: PRS cannot clear the LETIMER,1: Rising edge of selected PRS input can clear the..,2: Falling edge of selected PRS input can clear the..,3: Both the rising or falling edge of the selected.."
|
|
bitfld.long 0x0 22.--23. "PRSSTOPMODE,PRS Stop Mode" "0: PRS cannot stop the LETIMER,1: Rising edge of selected PRS input can stop the..,2: Falling edge of selected PRS input can stop the..,3: Both the rising or falling edge of the selected.."
|
|
newline
|
|
bitfld.long 0x0 18.--19. "PRSSTARTMODE,PRS Start Mode" "0: PRS cannot start the LETIMER,1: Rising edge of selected PRS input can start the..,2: Falling edge of selected PRS input can start the..,3: Both the rising or falling edge of the selected.."
|
|
tree.end
|
|
tree "LETIMER0_S"
|
|
base ad:0x4A000000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,module en" "0,1"
|
|
line.long 0x4 "CTRL,No Description"
|
|
hexmask.long.byte 0x4 16.--19. 1. "CNTPRESC,Counter prescaler value"
|
|
bitfld.long 0x4 12. "DEBUGRUN,Debug Mode Run Enable" "0: LETIMER is frozen in debug mode,1: LETIMER is running in debug mode"
|
|
newline
|
|
bitfld.long 0x4 9. "CNTTOPEN,Compare Value 0 Is Top Value" "0: The top value of the LETIMER is 16777215..,1: The top value of the LETIMER is given by TOP"
|
|
bitfld.long 0x4 8. "BUFTOP,Buffered Top" "0: TOP is only written by software,1: TOP is set to TOPBUFF value when REP0 reaches 0"
|
|
newline
|
|
bitfld.long 0x4 7. "OPOL1,Output 1 Polarity" "0,1"
|
|
bitfld.long 0x4 6. "OPOL0,Output 0 Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4.--5. "UFOA1,Underflow Output Action 1" "0: LETIMERn_OUT1 is held at its idle value as..,1: LETIMERn_OUT1 is toggled on CNT underflow,2: LETIMERn_OUT1 is held active for one LETIMER0..,3: LETIMERn_OUT1 is set idle on CNT underflow and.."
|
|
bitfld.long 0x4 2.--3. "UFOA0,Underflow Output Action 0" "0: LETIMERn_OUT0 is held at its idle value as..,1: LETIMERn_OUT0 is toggled on CNT underflow,2: LETIMERn_OUT0 is held active for one LETIMER0..,3: LETIMERn_OUT0 is set idle on CNT underflow and.."
|
|
newline
|
|
bitfld.long 0x4 0.--1. "REPMODE,Repeat Mode" "0: When started the LETIMER counts down until it is..,1: The counter counts REP0 times. When REP0 reaches..,2: The counter counts REP0 times. If REP1 has been..,3: Both REP0 and REP1 are decremented when the.."
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 4. "CTO1,Clear Toggle Output 1" "0,1"
|
|
bitfld.long 0x0 3. "CTO0,Clear Toggle Output 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CLEAR,Clear LETIMER" "0,1"
|
|
bitfld.long 0x0 1. "STOP,Stop LETIMER" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "START,Start LETIMER" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 0. "RUNNING,LETIMER Running" "0,1"
|
|
group.long 0x18++0x23
|
|
line.long 0x0 "CNT,No Description"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CNT,Counter Value"
|
|
line.long 0x4 "COMP0,No Description"
|
|
hexmask.long.tbyte 0x4 0.--23. 1. "COMP0,Compare Value 0"
|
|
line.long 0x8 "COMP1,No Description"
|
|
hexmask.long.tbyte 0x8 0.--23. 1. "COMP1,Compare Value 1"
|
|
line.long 0xC "TOP,No Description"
|
|
hexmask.long.tbyte 0xC 0.--23. 1. "TOP,Counter TOP Value"
|
|
line.long 0x10 "TOPBUFF,No Description"
|
|
hexmask.long.tbyte 0x10 0.--23. 1. "TOPBUFF,Buffered Counter TOP Value"
|
|
line.long 0x14 "REP0,No Description"
|
|
hexmask.long.byte 0x14 0.--7. 1. "REP0,Repeat Counter 0"
|
|
line.long 0x18 "REP1,No Description"
|
|
hexmask.long.byte 0x18 0.--7. 1. "REP1,Repeat Counter 1"
|
|
line.long 0x1C "IF,No Description"
|
|
bitfld.long 0x1C 4. "REP1,Repeat Counter 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x1C 3. "REP0,Repeat Counter 0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 2. "UF,Underflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x1C 1. "COMP1,Compare Match 1 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 0. "COMP0,Compare Match 0 Interrupt Flag" "0,1"
|
|
line.long 0x20 "IEN,No Description"
|
|
bitfld.long 0x20 4. "REP1,Repeat Counter 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x20 3. "REP0,Repeat Counter 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x20 2. "UF,Underflow Interrupt Enable" "0,1"
|
|
bitfld.long 0x20 1. "COMP1,Compare Match 1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x20 0. "COMP0,Compare Match 0 Interrupt Enable" "0,1"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x0 "SYNCBUSY,No Description"
|
|
bitfld.long 0x0 9. "CTO1,Sync busy for CTO1" "0,1"
|
|
bitfld.long 0x0 8. "CTO0,Sync busy for CTO0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "CLEAR,Sync busy for CLEAR" "0,1"
|
|
bitfld.long 0x0 6. "STOP,Sync busy for STOP" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "START,Sync busy for START" "0,1"
|
|
bitfld.long 0x0 4. "REP1,Sync busy for REP1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "REP0,Sync busy for REP0" "0,1"
|
|
bitfld.long 0x0 2. "TOP,Sync busy for TOP" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "CNT,Sync busy for CNT" "0,1"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "PRSMODE,No Description"
|
|
bitfld.long 0x0 26.--27. "PRSCLEARMODE,PRS Clear Mode" "0: PRS cannot clear the LETIMER,1: Rising edge of selected PRS input can clear the..,2: Falling edge of selected PRS input can clear the..,3: Both the rising or falling edge of the selected.."
|
|
bitfld.long 0x0 22.--23. "PRSSTOPMODE,PRS Stop Mode" "0: PRS cannot stop the LETIMER,1: Rising edge of selected PRS input can stop the..,2: Falling edge of selected PRS input can stop the..,3: Both the rising or falling edge of the selected.."
|
|
newline
|
|
bitfld.long 0x0 18.--19. "PRSSTARTMODE,PRS Start Mode" "0: PRS cannot start the LETIMER,1: Rising edge of selected PRS input can start the..,2: Falling edge of selected PRS input can start the..,3: Both the rising or falling edge of the selected.."
|
|
tree.end
|
|
tree.end
|
|
tree "LFRCO (Low Frequency RC Oscillator)"
|
|
base ad:0x0
|
|
tree "LFRCO_NS"
|
|
base ad:0x50024000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,Contains the LFRCO ip version"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP version ID"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "CTRL,Control register"
|
|
bitfld.long 0x0 1. "DISONDEMAND,Disable On-Demand" "0,1"
|
|
bitfld.long 0x0 0. "FORCEEN,Force Enable" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "STATUS,Status register"
|
|
bitfld.long 0x0 31. "LOCK,Lock Status" "0: Access to configuration registers not locked,1: Access to configuration registers locked"
|
|
bitfld.long 0x0 16. "ENS,Enabled Status" "0,1"
|
|
bitfld.long 0x0 0. "RDY,Ready Status" "0,1"
|
|
group.long 0x14++0x7
|
|
line.long 0x0 "IF,Interrupt flag register"
|
|
bitfld.long 0x0 18. "CALOOR,Calibration Out Of Range Flag" "0,1"
|
|
bitfld.long 0x0 17. "TCOOR,Temperature Check Out Of Range Flag" "0,1"
|
|
bitfld.long 0x0 16. "SCHEDERR,Scheduling Error Flag" "0,1"
|
|
bitfld.long 0x0 10. "TEMPCHANGE,Temperature Change Flag" "0,1"
|
|
bitfld.long 0x0 9. "CALDONE,Calibration Done Flag" "0,1"
|
|
bitfld.long 0x0 8. "TCDONE,Temperature Check Done Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "NEGEDGE,Falling Edge Flag" "0,1"
|
|
bitfld.long 0x0 1. "POSEDGE,Rising Edge Flag" "0,1"
|
|
bitfld.long 0x0 0. "RDY,Ready Flag" "0,1"
|
|
line.long 0x4 "IEN,Interrupt enable register"
|
|
bitfld.long 0x4 18. "CALOOR,Calibration Out Of Range Enable" "0,1"
|
|
bitfld.long 0x4 17. "TCOOR,Temperature Check Out Of Range Enable" "0,1"
|
|
bitfld.long 0x4 16. "SCHEDERR,Scheduling Error Enable" "0,1"
|
|
bitfld.long 0x4 10. "TEMPCHANGE,Temperature Change Enable" "0,1"
|
|
bitfld.long 0x4 9. "CALDONE,Calibration Done Enable" "0,1"
|
|
bitfld.long 0x4 8. "TCDONE,Temperature Check Done Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "NEGEDGE,Falling Edge Enable" "0,1"
|
|
bitfld.long 0x4 1. "POSEDGE,Rising Edge Enable" "0,1"
|
|
bitfld.long 0x4 0. "RDY,Ready Enable" "0,1"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "LOCK,Configuration lock register. Locks and unlocks access to configuration registers."
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Lock Key"
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "CFG,Configuration register"
|
|
bitfld.long 0x0 0. "HIGHPRECEN,High Precision Enable" "0,1"
|
|
group.long 0x2C++0x7
|
|
line.long 0x0 "NOMCAL,Nominal calibration register"
|
|
hexmask.long.tbyte 0x0 0.--20. 1. "NOMCALCNT,Nominal Calibration Count"
|
|
line.long 0x4 "NOMCALINV,Nominal calibration inverted register"
|
|
hexmask.long.tbyte 0x4 0.--16. 1. "NOMCALCNTINV,Nominal Calibration Count Inverted"
|
|
wgroup.long 0x34++0x3
|
|
line.long 0x0 "CMD,Command register"
|
|
bitfld.long 0x0 0. "REDUCETCINT,Reduce Temperature Check Interval" "0,1"
|
|
tree.end
|
|
tree "LFRCO_S"
|
|
base ad:0x40024000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,Contains the LFRCO ip version"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP version ID"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "CTRL,Control register"
|
|
bitfld.long 0x0 1. "DISONDEMAND,Disable On-Demand" "0,1"
|
|
bitfld.long 0x0 0. "FORCEEN,Force Enable" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "STATUS,Status register"
|
|
bitfld.long 0x0 31. "LOCK,Lock Status" "0: Access to configuration registers not locked,1: Access to configuration registers locked"
|
|
bitfld.long 0x0 16. "ENS,Enabled Status" "0,1"
|
|
bitfld.long 0x0 0. "RDY,Ready Status" "0,1"
|
|
group.long 0x14++0x7
|
|
line.long 0x0 "IF,Interrupt flag register"
|
|
bitfld.long 0x0 18. "CALOOR,Calibration Out Of Range Flag" "0,1"
|
|
bitfld.long 0x0 17. "TCOOR,Temperature Check Out Of Range Flag" "0,1"
|
|
bitfld.long 0x0 16. "SCHEDERR,Scheduling Error Flag" "0,1"
|
|
bitfld.long 0x0 10. "TEMPCHANGE,Temperature Change Flag" "0,1"
|
|
bitfld.long 0x0 9. "CALDONE,Calibration Done Flag" "0,1"
|
|
bitfld.long 0x0 8. "TCDONE,Temperature Check Done Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "NEGEDGE,Falling Edge Flag" "0,1"
|
|
bitfld.long 0x0 1. "POSEDGE,Rising Edge Flag" "0,1"
|
|
bitfld.long 0x0 0. "RDY,Ready Flag" "0,1"
|
|
line.long 0x4 "IEN,Interrupt enable register"
|
|
bitfld.long 0x4 18. "CALOOR,Calibration Out Of Range Enable" "0,1"
|
|
bitfld.long 0x4 17. "TCOOR,Temperature Check Out Of Range Enable" "0,1"
|
|
bitfld.long 0x4 16. "SCHEDERR,Scheduling Error Enable" "0,1"
|
|
bitfld.long 0x4 10. "TEMPCHANGE,Temperature Change Enable" "0,1"
|
|
bitfld.long 0x4 9. "CALDONE,Calibration Done Enable" "0,1"
|
|
bitfld.long 0x4 8. "TCDONE,Temperature Check Done Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "NEGEDGE,Falling Edge Enable" "0,1"
|
|
bitfld.long 0x4 1. "POSEDGE,Rising Edge Enable" "0,1"
|
|
bitfld.long 0x4 0. "RDY,Ready Enable" "0,1"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "LOCK,Configuration lock register. Locks and unlocks access to configuration registers."
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Lock Key"
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "CFG,Configuration register"
|
|
bitfld.long 0x0 0. "HIGHPRECEN,High Precision Enable" "0,1"
|
|
group.long 0x2C++0x7
|
|
line.long 0x0 "NOMCAL,Nominal calibration register"
|
|
hexmask.long.tbyte 0x0 0.--20. 1. "NOMCALCNT,Nominal Calibration Count"
|
|
line.long 0x4 "NOMCALINV,Nominal calibration inverted register"
|
|
hexmask.long.tbyte 0x4 0.--16. 1. "NOMCALCNTINV,Nominal Calibration Count Inverted"
|
|
wgroup.long 0x34++0x3
|
|
line.long 0x0 "CMD,Command register"
|
|
bitfld.long 0x0 0. "REDUCETCINT,Reduce Temperature Check Interval" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "LFXO (Low Frequency Crystal Oscillator)"
|
|
base ad:0x0
|
|
tree "LFXO_NS"
|
|
base ad:0x50020000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version ID"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "CTRL,No Description"
|
|
bitfld.long 0x0 5. "FAILDETEM4WUEN,LFXO Failure Detection EM4WU Enable" "0,1"
|
|
bitfld.long 0x0 4. "FAILDETEN,LFXO Failure Detection Enable" "0,1"
|
|
bitfld.long 0x0 1. "DISONDEMAND,LFXO Disable On-demand requests" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "FORCEEN,LFXO Force Enable" "0,1"
|
|
line.long 0x4 "CFG,Do not write to this register unless the oscillator is forced off. The oscillator is forced off if DISONDEMAND is set and FORCEEN is cleared."
|
|
bitfld.long 0x4 8.--10. "TIMEOUT,LFXO Start-up Delay" "0: Timeout period of 2 cycles,1: Timeout period of 256 cycles,2: Timeout period of 1024 cycles,3: Timeout period of 2048 cycles,4: Timeout period of 4096 cycles,5: Timeout period of 8192 cycles,6: Timeout period of 16384 cycles,7: Timeout period of 32768 cycles"
|
|
bitfld.long 0x4 4.--5. "MODE,LFXO Mode" "0: A 32768Hz crystal should be connected to the LF..,1: An external sine source with minimum amplitude..,2: An external 32KHz CMOS clock should be provided..,?"
|
|
bitfld.long 0x4 1. "HIGHAMPL,LFXO High Amplitude Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "AGC,LFXO AGC Enable" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 31. "LOCK,LFXO Locked Status" "0: LFXO lockable registers are not locked,1: LFXO lockable registers are locked"
|
|
bitfld.long 0x0 16. "ENS,LFXO Enable Status" "0,1"
|
|
bitfld.long 0x0 0. "RDY,LFXO Ready Status" "0,1"
|
|
group.long 0x14++0xB
|
|
line.long 0x0 "CAL,Do not write to this register unless CALBSY in SYNCBUSY register is low."
|
|
bitfld.long 0x0 8.--9. "GAIN,LFXO Startup Gain" "0,1,2,3"
|
|
hexmask.long.byte 0x0 0.--6. 1. "CAPTUNE,Internal Capacitance Tuning"
|
|
line.long 0x4 "IF,No Description"
|
|
bitfld.long 0x4 3. "FAIL,LFXO Failure Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 2. "NEGEDGE,Falling Edge Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 1. "POSEDGE,Rising Edge Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RDY,LFXO Ready Interrupt Flag" "0,1"
|
|
line.long 0x8 "IEN,No Description"
|
|
bitfld.long 0x8 3. "FAIL,LFXO Failure Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 2. "NEGEDGE,Falling Edge Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 1. "POSEDGE,Rising Edge Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "RDY,LFXO Ready Interrupt Enable" "0,1"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "SYNCBUSY,No Description"
|
|
bitfld.long 0x0 0. "CAL,LFXO Synchronization status" "0,1"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Lock Key"
|
|
tree.end
|
|
tree "LFXO_S"
|
|
base ad:0x40020000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version ID"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "CTRL,No Description"
|
|
bitfld.long 0x0 5. "FAILDETEM4WUEN,LFXO Failure Detection EM4WU Enable" "0,1"
|
|
bitfld.long 0x0 4. "FAILDETEN,LFXO Failure Detection Enable" "0,1"
|
|
bitfld.long 0x0 1. "DISONDEMAND,LFXO Disable On-demand requests" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "FORCEEN,LFXO Force Enable" "0,1"
|
|
line.long 0x4 "CFG,Do not write to this register unless the oscillator is forced off. The oscillator is forced off if DISONDEMAND is set and FORCEEN is cleared."
|
|
bitfld.long 0x4 8.--10. "TIMEOUT,LFXO Start-up Delay" "0: Timeout period of 2 cycles,1: Timeout period of 256 cycles,2: Timeout period of 1024 cycles,3: Timeout period of 2048 cycles,4: Timeout period of 4096 cycles,5: Timeout period of 8192 cycles,6: Timeout period of 16384 cycles,7: Timeout period of 32768 cycles"
|
|
bitfld.long 0x4 4.--5. "MODE,LFXO Mode" "0: A 32768Hz crystal should be connected to the LF..,1: An external sine source with minimum amplitude..,2: An external 32KHz CMOS clock should be provided..,?"
|
|
bitfld.long 0x4 1. "HIGHAMPL,LFXO High Amplitude Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "AGC,LFXO AGC Enable" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 31. "LOCK,LFXO Locked Status" "0: LFXO lockable registers are not locked,1: LFXO lockable registers are locked"
|
|
bitfld.long 0x0 16. "ENS,LFXO Enable Status" "0,1"
|
|
bitfld.long 0x0 0. "RDY,LFXO Ready Status" "0,1"
|
|
group.long 0x14++0xB
|
|
line.long 0x0 "CAL,Do not write to this register unless CALBSY in SYNCBUSY register is low."
|
|
bitfld.long 0x0 8.--9. "GAIN,LFXO Startup Gain" "0,1,2,3"
|
|
hexmask.long.byte 0x0 0.--6. 1. "CAPTUNE,Internal Capacitance Tuning"
|
|
line.long 0x4 "IF,No Description"
|
|
bitfld.long 0x4 3. "FAIL,LFXO Failure Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 2. "NEGEDGE,Falling Edge Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 1. "POSEDGE,Rising Edge Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RDY,LFXO Ready Interrupt Flag" "0,1"
|
|
line.long 0x8 "IEN,No Description"
|
|
bitfld.long 0x8 3. "FAIL,LFXO Failure Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 2. "NEGEDGE,Falling Edge Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 1. "POSEDGE,Rising Edge Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "RDY,LFXO Ready Interrupt Enable" "0,1"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "SYNCBUSY,No Description"
|
|
bitfld.long 0x0 0. "CAL,LFXO Synchronization status" "0,1"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Lock Key"
|
|
tree.end
|
|
tree.end
|
|
tree "MODEM (Modulator and Demodulator)"
|
|
base ad:0x0
|
|
tree "MODEM_NS"
|
|
base ad:0xB8014000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "IPVERSION,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "IPVERSION,IP Version"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "EN,No Description"
|
|
bitfld.long 0x00 0. "EN,Enable peripheral clock to this module" "0,1"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "STATUS,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "WEAKSYMBOLS,Weak symbols"
|
|
hexmask.long.byte 0x00 16.--23. 1. "CORR,Correlation"
|
|
newline
|
|
bitfld.long 0x00 12.--14. "STAMPSTATE,BLE Viterbi Demod Timing Stamp" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "VITERBIDEMODFRAMEDET,Viterbi Demod frame detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "VITERBIDEMODTIMDET,Viterbi Demod timing detected" "0,1"
|
|
bitfld.long 0x00 9. "DSAFREQESTDONE,DSA frequency estimation complete" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "DSADETECTED,DSA detected" "0,1"
|
|
bitfld.long 0x00 7. "TIMLOSTCAUSE,Timing Lost Cause" "0: Timing lost during Preamble Search or due to..,1: Timing lost due to incorrect symbols detected.."
|
|
newline
|
|
bitfld.long 0x00 6. "TIMSEQINV,Timing Sequence Inverted" "0,1"
|
|
bitfld.long 0x00 5. "ANTSEL,Selected Antenna" "0: Antenna 0 is selected (ANT0 = 1 and ANT1 = 0),1: Antenna 1 is selected (ANT0 = 0 and ANT1 = 1)"
|
|
newline
|
|
bitfld.long 0x00 4. "FRAMEDETID,Frame Detected ID" "0: Last frame was detected with sync word..,1: Last frame was detected with sync word.."
|
|
bitfld.long 0x00 0.--2. "DEMODSTATE,DEMOD state" "0: Off state,1: Timing search,2: Preamble search,3: Frame search,4: Payload Detection,5: Timing search with sliding window (FDM0),?..."
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "TIMDETSTATUS,No Description"
|
|
bitfld.long 0x00 25.--28. "TIMDETINDEX,Timing detection index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24. "TIMDETPASS,Timing detection pass" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "TIMDETPREERRORS,Preamble errors" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 8.--15. 1. "TIMDETFREQOFFEST,Frequency offset estimate"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "TIMDETCORR,Correlation value"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "FREQOFFEST,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "SOFTVAL,Soft detection value"
|
|
hexmask.long.byte 0x00 16.--23. 1. "CORRVAL,Correlation value"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. "FREQOFFEST,Frequency offset estimate"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "AFCADJRX,No Description"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "AFCADJRX,AFC adjustment for RX"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "AFCADJTX,No Description"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "AFCADJTX,AFC adjustment for TX"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "MIXCTRL,No Description"
|
|
bitfld.long 0x00 4. "DIGIQSWAPEN,Digital I/Q swap enable" "0,1"
|
|
bitfld.long 0x00 0.--3. "ANAMIXMODE,Analog receiver mixer mode of operation" "0: The analog mixer operates in its normal mode,1: I path is positive Q path is positive I and Q..,2: I path is positive Q path is negative,3: I path is positive Q path is negative I and Q..,4: I path is negative Q path is positive,5: I path is negative Q path is positive I and Q..,6: I path is negative Q path is negative,7: I path is negative Q path is negative I and Q..,8: Control the analog receiver mixer such that..,9: Control the analog receiver mixer such that..,?..."
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CTRL0,No Description"
|
|
bitfld.long 0x00 30.--31. "FRAMEDETDEL,FRAMEDET delay" "0: No delay,1: 8 baud delay,2: 16 baud delay,3: 32 baud delay"
|
|
bitfld.long 0x00 27.--29. "DEMODRAWDATASEL,Demod raw data select" "0: Disabled,1: 1-bit entropy source extracted from the RF..,2: 2 * 3-bit I and Q ADC data,3: 2 * 16-bit I and Q channel filtered data..,4: 2 * 16-bit I and Q channel filtered data..,5: 2 * 19-bit I and Q channel filtered data..,6: 8-bit received frequency data (or logarithmic..,7: 8-bit demodulated data (freq/amp/phase)"
|
|
newline
|
|
bitfld.long 0x00 25.--26. "SHAPING,Shaping filter" "0: Filter disabled,1: Filter has odd length,2: Filter has even length,3: Filter has asymmetrical coefficients"
|
|
bitfld.long 0x00 22.--24. "DIFFENCMODE,Differential encoding mode" "0: Differential Encoding is disabled,1: Transmit the XOR-ed value of the Raw symbol..,2: Transmit the XOR-ed value of the Raw symbol..,3: Transmit the XOR-ed value of the Raw symbol..,4: Transmit the XOR-ed value of the Raw symbol..,?..."
|
|
newline
|
|
bitfld.long 0x00 21. "DETDIS,Detection disable" "0,1"
|
|
bitfld.long 0x00 19.--20. "DSSSDOUBLE,DSSS double" "0: Doubling is disabled,1: Doubling is enabled by using inverted symbols,2: Doubling is enabled by using complex..,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--18. "DSSSSHIFTS,DSSS shifts" "0: No symbols are defined by shifting,1: Next symbol generated by 1 cyclic shift,2: Next symbol generated by 2 cyclic shifts,3: Next symbol generated by 4 cyclic shifts,4: Next symbol generated by 8 cyclic shifts,5: Next symbol generated by 16 cyclic shifts,?..."
|
|
bitfld.long 0x00 11.--15. "DSSSLEN,DSSS length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 10. "OOKASYNCPIN,OOK asynchronous pin mode" "0,1"
|
|
bitfld.long 0x00 9. "DUALCORROPTDIS,Dual Correlation Optimization Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6.--8. "MODFORMAT,Modulation format" "0: Frequency Shift Keying with 2 symbols,1: Frequency Shift Keying with 4 symbols,2: Binary Phase Shift Keying,3: Differentially encoded Binary Phase Shift..,4: Half Sine Shaped Offset Quadrature Phase..,5: Minimum Shift Keying,6: On Off Keying and Amplitude Shift Keying,?..."
|
|
bitfld.long 0x00 4.--5. "CODING,Symbol coding" "0: Non Return to Zero,1: Manchester Coding,2: Direct Sequence Spread Spectrum,3: Line code"
|
|
newline
|
|
bitfld.long 0x00 1.--3. "MAPFSK,Mapping of FSK symbols" "0: 4FSK,1: 4FSK,2: 4FSK,3: 4FSK,4: 4FSK,5: 4FSK,6: 4FSK,7: 4FSK"
|
|
bitfld.long 0x00 0. "FDM0DIFFDIS,Frame Detection Mode 0 disable" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CTRL1,No Description"
|
|
hexmask.long.byte 0x00 25.--31. 1. "FREQOFFESTLIM,Frequency offset limit"
|
|
bitfld.long 0x00 22.--24. "FREQOFFESTPER,Frequency offset estimation period" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 20.--21. "PHASEDEMOD,Phase demodulation" "0: Bit Differential Detection,1: Multibit Differential Detection,?..."
|
|
bitfld.long 0x00 16.--19. "RESYNCPER,Resync period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "COMPMODE,Compensation mode" "0: Compensation is disabled,1: Compensation locks when preamble is detected,2: Compensation locks when frame is detected,3: Compensation is always running"
|
|
bitfld.long 0x00 12. "SYNC1INV,SYNC1 invert" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "SYNCDATA,Sync data" "0: SYNC is not part of transmit payload,1: SYNC is part of transmit payload"
|
|
bitfld.long 0x00 10. "TXSYNC,Transmit sync word" "0: Modulator transmits SYNC0,1: Modulator transmits SYNC1"
|
|
newline
|
|
bitfld.long 0x00 9. "DUALSYNC,Dual sync words" "0: Demodulator only searches for SYNC0,1: Demodulator searches for SYNC0 and SYNC1 in.."
|
|
bitfld.long 0x00 5.--8. "SYNCERRORS,Maximum number of sync errors" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--4. "SYNCBITS,Number of sync-word bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CTRL2,No Description"
|
|
bitfld.long 0x00 30.--31. "DMASEL,DMA select" "0: SOFTVAL field,1: CORRVAL field,2: FREQOFFEST field,3: POE field"
|
|
bitfld.long 0x00 29. "DEVWEIGHTDIS,Deviation weighting disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27.--28. "RATESELMODE,Rate select mode" "0: No rate change,1: Change rate for payload,2: FRC selects between BRDIVA/DEVMULA and..,3: The configured/detected syncword decides the.."
|
|
bitfld.long 0x00 25.--26. "DEVMULB,Deviation multiplication factor B" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 23.--24. "DEVMULA,Deviation multiplication factor A" "0,1,2,3"
|
|
bitfld.long 0x00 19.--22. "BRDIVB,Baudrate division factor B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 15.--18. "BRDIVA,Baudrate division factor A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--14. "DATAFILTER,Datafilter" "0: Datafilter disabled,1: Short datafilter enabled,2: Medium datafilter enabled,3: Long datafilter enabled,4: Datafilter with length 6 enabled,5: Datafilter with length 7 enabled,6: Datafilter with length 8 enabled,7: Datafilter with length 9 enabled"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "TXPINMODE,Transmit pin mode" "0: Pinmode is turned off,1: Unused mode,2: DIN/PRS controls transmitted baud directly,3: DIN/PRS is sampled on the rising edge of DCLK.."
|
|
bitfld.long 0x00 9. "RXPINMODE,Receive pin mode" "0: Detected payload bits are clocked out on DOUT,1: DOUT is continuously providing the sign of.."
|
|
newline
|
|
bitfld.long 0x00 8. "RXFRCDIS,Receive FRC disable" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SQITHRESH,Signal Quality Indicator threshold"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CTRL3,No Description"
|
|
hexmask.long.word 0x00 16.--31. 1. "TSAMPLIM,Timing Search Amplitude limit"
|
|
bitfld.long 0x00 14.--15. "TSAMPDEL,Timing Search Amplitude delay" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 12.--13. "TSAMPMODE,Timing Search Amplitude Mode" "0: Amplitude is not used during timing search,1: Timing detection is disabled for windows..,2: Timing detection is disabled for windows..,?..."
|
|
bitfld.long 0x00 11. "ANTDIVREPEATDIS,Antenna diversity repeat disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "ANTDIVMODE,Antenna Diversity mode" "0: Antenna 0 (ANT0=1 ANT1=0) is used,1: Antenna 1 (ANT0=0 ANT1=1) is used,2: Select-First algorithm,3: Select-Best algorithm based on correlation..,4: Select-Best algorithm based on RSSI value,?..."
|
|
bitfld.long 0x00 0. "PRSDINEN,DIN PRS enable" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CTRL4,No Description"
|
|
bitfld.long 0x00 29. "OFFSETPHASESCALING,Offset phase scaling" "0,1"
|
|
bitfld.long 0x00 28. "OFFSETPHASEMASKING,Offset phase masking" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26.--27. "ADCSATDENS,ADC Saturation Density setting" "0,1,2,3"
|
|
bitfld.long 0x00 23.--25. "ADCSATLEVEL,ADC Saturation Level setting" "0: AGC enters fast loop after first saturation..,1: 2 saturation samples required before AGC..,2: 4 saturation samples required before AGC..,3: 8 saturation samples required before AGC..,4: 16 saturation samples required before AGC..,5: 32 saturation samples required before AGC..,6: 64 saturation samples required before AGC..,?..."
|
|
newline
|
|
bitfld.long 0x00 22. "SOFTDSSSMODE,Soft DSSS mode" "0: Soft value is inverted value of symbol-0..,1: Soft value is difference between correlation.."
|
|
hexmask.long.byte 0x00 15.--21. 1. "PHASECLICKFILT,Phase click filter"
|
|
newline
|
|
bitfld.long 0x00 14. "PREDISTRST,Predistortion Reset" "0,1"
|
|
bitfld.long 0x00 13. "PREDISTAVG,Predistortion Average" "0: Average over 8 samples,1: Average over 16 samples"
|
|
newline
|
|
bitfld.long 0x00 10.--12. "PREDISTDEB,Predistortion debounce" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 5.--9. "PREDISTGAIN,Predistortion gain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4. "DEVOFFCOMP,Deviation offset compensation" "0,1"
|
|
bitfld.long 0x00 0.--3. "ISICOMP,Inter Symbol Interference compensation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CTRL5,No Description"
|
|
bitfld.long 0x00 30. "RESYNCLIMIT,Resynchronization Limit" "0: Adjust timing if accumulated timing is..,1: Adjust timing if accumulated timing is non-zero"
|
|
bitfld.long 0x00 29. "RESYNCBAUDTRANS,Resynchronization Baud Transitions" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20.--22. "DEMODRAWDATASEL2,Demod raw data select 2" "0: Disabled,?,2: 4-bit max_corr_index and 17-bit max_corr,3: 8-bit channel power and 4-bit BBSSMUX,4: 11-bit pre-filter correlation output for BLR..,5: 5-bit Narrow-band BLE FSM state 5-bit..,?..."
|
|
bitfld.long 0x00 10. "TREDGE,Timing resynchronization edge mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "TDEDGE,Timing detection edge mode" "0,1"
|
|
bitfld.long 0x00 6.--8. "DETDEL,Detection delay" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "BRCALAVG,Baudrate calibration averaging" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "BRCALMODE,Baudrate calibration mode" "0: Measure period between peaks in demodulated..,1: Measure period between zero-crossings in..,2: Combine peak-period and zero-crossing periods,?..."
|
|
newline
|
|
bitfld.long 0x00 1. "BRCALEN,Baudrate calibration enable" "0,1"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CTRL6,No Description"
|
|
bitfld.long 0x00 30. "RXBRCALCDIS,RX Baudrate Calculation Disable" "0,1"
|
|
bitfld.long 0x00 25.--26. "CODINGB,Coding format" "0: Non Return to Zero,1: Manchester Coding,2: Direct Sequence Spread Spectrum,3: Line code"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "TXBR,No Description"
|
|
hexmask.long.byte 0x00 16.--23. 1. "TXBRDEN,Transmit baudrate denominator"
|
|
hexmask.long.word 0x00 0.--15. 1. "TXBRNUM,Transmit baudrate numerator"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "RXBR,No Description"
|
|
bitfld.long 0x00 10.--12. "RXBRINT,Receive baudrate integer" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 5.--9. "RXBRDEN,Receive baudrate denominator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 0.--4. "RXBRNUM,Receive baudrate numerator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "CF,No Description"
|
|
bitfld.long 0x00 26.--27. "DEC1GAIN,Second decimation filter gain" "0: No additional gain,1: 6 dB additional gain,2: 12 dB additional gain,?..."
|
|
bitfld.long 0x00 23.--25. "CFOSR,Center Frequency Oversampling Ratio" "0: Oversampling ratio = 7,1: Oversampling ratio = 8,2: Oversampling ratio = 12,3: Oversampling ratio = 16,4: Oversampling ratio = 32,5: Center frequency set to 0,?..."
|
|
newline
|
|
bitfld.long 0x00 17.--22. "DEC2,Third decimation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.word 0x00 3.--16. 1. "DEC1,Second decimation"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "DEC0,First decimation" "0: Decimation Factor 0 = 3,1: Decimation Factor 0 = 4,2: Decimation Factor 0 = 4,3: Decimation Factor 0 = 8,4: Decimation Factor 0 = 8,?..."
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PRE,No Description"
|
|
hexmask.long.word 0x00 16.--31. 1. "TXBASES,TX bases"
|
|
bitfld.long 0x00 12. "SYNCSYMB4FSK,Sync symbols 4FSK" "0: The syncword is 2FSK modulated,1: The syncword is 4FSK modulated"
|
|
newline
|
|
bitfld.long 0x00 11. "DSSSPRE,DSSS preamble" "0,1"
|
|
bitfld.long 0x00 7.--10. "PREERRORS,Preamble errors" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6. "PRESYMB4FSK,Preamble symbols 4-FSK" "0: Symbols corresponding to +/- 3dev,1: Symbols corresponding to +/- dev"
|
|
bitfld.long 0x00 4.--5. "BASEBITS,BASE bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "BASE,Preamble base" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "SYNC0,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SYNC0,Sync-word 0"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "SYNC1,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SYNC1,Sync word 1"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "TIMING,No Description"
|
|
bitfld.long 0x00 30.--31. "FASTRESYNC,Fast timing resynchronization" "0: Disabled,1: Allow fast resynchronization until preamble..,2: Allow fast resynchronization until frame is..,?..."
|
|
bitfld.long 0x00 29. "TSAGCDEL,Timing Search AGC delay" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25.--28. "OFFSUBDEN,Offset subperiod denominator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 21.--24. "OFFSUBNUM,Offset subperiod numerator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 18.--20. "FDM0THRESH,Frame Detection Mode 0 threshold" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 17. "TIMSEQSYNC,Timing sequence part of sync-word" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "TIMSEQINVEN,Timing sequence inversion enable" "0,1"
|
|
bitfld.long 0x00 12.--15. "ADDTIMSEQ,Additional timing sequences" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "TIMINGBASES,Timing bases" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 0.--7. 1. "TIMTHRESH,Timing threshold"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "DSSS0,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "DSSS0,DSSS symbol 0"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "MODINDEX,No Description"
|
|
bitfld.long 0x00 19.--21. "FREQGAINM,Frequency demodulation gain - mantissa" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--18. "FREQGAINE,Frequency demodulation gain - exponent" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 5.--9. "MODINDEXE,Modulation index exponent" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "MODINDEXM,Modulation index mantissa" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "AFC,No Description"
|
|
bitfld.long 0x00 28. "AFCDELDET,Delay Detection state machine" "0,1"
|
|
bitfld.long 0x00 27. "AFCDSAFREQOFFEST,Consider frequency offset estimation" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26. "AFCENINTCOMP,Internal frequency offset compensation" "0,1"
|
|
bitfld.long 0x00 25. "AFCONESHOT,AFC One-Shot feature" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "AFCLIMRESET,Reset AFCADJRX value" "0,1"
|
|
bitfld.long 0x00 21.--23. "AFCAVGPER,AFC average period" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 16.--20. "AFCDEL,AFC delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 15. "AFCRXCLR,AFCRX clear mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13.--14. "AFCTXMODE,AFC TX mode" "0: Disabled,1: AFCADJTX loaded from AFCADJRX when preamble..,2: AFCADJTX loaded from AFCADJRX when frame is..,?..."
|
|
bitfld.long 0x00 10.--12. "AFCRXMODE,AFC RX mode" "0: Disabled,1: Free running,2: Free running,3: AFCADJRX locked when timing is detected,4: AFCADJRX locked when preamble is detected,5: AFCADJRX locked when frame is detected,6: AFCADJRX not updated before preamble is..,?..."
|
|
newline
|
|
bitfld.long 0x00 5.--8. "AFCSCALEE,AFC scaling exponent" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--4. "AFCSCALEM,AFC scaling mantissa" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "AFCADJLIM,No Description"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "AFCADJLIM,AFC adjustment limit"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "SHAPING0,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "COEFF3,Shaping Coefficient 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. "COEFF2,Shaping Coefficient 2"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "COEFF1,Shaping Coefficient 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "COEFF0,Shaping Coefficient 0"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "SHAPING1,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "COEFF7,Shaping Coefficient 7"
|
|
hexmask.long.byte 0x00 16.--23. 1. "COEFF6,Shaping Coefficient 6"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "COEFF5,Shaping Coefficient 5"
|
|
hexmask.long.byte 0x00 0.--7. 1. "COEFF4,Shaping Coefficient 4"
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "SHAPING2,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "COEFF11,Shaping Coefficient 11"
|
|
hexmask.long.byte 0x00 16.--23. 1. "COEFF10,Shaping Coefficient 10"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "COEFF9,Shaping Coefficient 9"
|
|
hexmask.long.byte 0x00 0.--7. 1. "COEFF8,Shaping Coefficient 8"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "SHAPING3,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "COEFF15,Shaping Coefficient 15"
|
|
hexmask.long.byte 0x00 16.--23. 1. "COEFF14,Shaping Coefficient 14"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "COEFF13,Shaping Coefficient 13"
|
|
hexmask.long.byte 0x00 0.--7. 1. "COEFF12,Shaping Coefficient 12"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "SHAPING4,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "COEFF19,Shaping Coefficient 19"
|
|
hexmask.long.byte 0x00 16.--23. 1. "COEFF18,Shaping Coefficient 18"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "COEFF17,Shaping Coefficient 17"
|
|
hexmask.long.byte 0x00 0.--7. 1. "COEFF16,Shaping Coefficient 16"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "SHAPING5,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "COEFF23,Shaping Coefficient 23"
|
|
hexmask.long.byte 0x00 16.--23. 1. "COEFF22,Shaping Coefficient 22"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "COEFF21,Shaping Coefficient 21"
|
|
hexmask.long.byte 0x00 0.--7. 1. "COEFF20,Shaping Coefficient 20"
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "SHAPING6,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "COEFF27,Shaping Coefficient 27"
|
|
hexmask.long.byte 0x00 16.--23. 1. "COEFF26,Shaping Coefficient 26"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "COEFF25,Shaping Coefficient 25"
|
|
hexmask.long.byte 0x00 0.--7. 1. "COEFF24,Shaping Coefficient 24"
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "SHAPING7,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "COEFF31,Shaping Coefficient 31"
|
|
hexmask.long.byte 0x00 16.--23. 1. "COEFF30,Shaping Coefficient 30"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "COEFF29,Shaping Coefficient 29"
|
|
hexmask.long.byte 0x00 0.--7. 1. "COEFF28,Shaping Coefficient 28"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "SHAPING8,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "COEFF35,Shaping Coefficient 35"
|
|
hexmask.long.byte 0x00 16.--23. 1. "COEFF34,Shaping Coefficient 34"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "COEFF33,Shaping Coefficient 33"
|
|
hexmask.long.byte 0x00 0.--7. 1. "COEFF32,Shaping Coefficient 32"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "SHAPING9,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "COEFF39,Shaping Coefficient 39"
|
|
hexmask.long.byte 0x00 16.--23. 1. "COEFF38,Shaping Coefficient 38"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "COEFF37,Shaping Coefficient 37"
|
|
hexmask.long.byte 0x00 0.--7. 1. "COEFF36,Shaping Coefficient 36"
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "SHAPING10,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "COEFF43,Shaping Coefficient 43"
|
|
hexmask.long.byte 0x00 16.--23. 1. "COEFF42,Shaping Coefficient 42"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "COEFF41,Shaping Coefficient 41"
|
|
hexmask.long.byte 0x00 0.--7. 1. "COEFF40,Shaping Coefficient 40"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "SHAPING11,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "COEFF47,Shaping Coefficient 47"
|
|
hexmask.long.byte 0x00 16.--23. 1. "COEFF46,Shaping Coefficient 46"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "COEFF45,Shaping Coefficient 45"
|
|
hexmask.long.byte 0x00 0.--7. 1. "COEFF44,Shaping Coefficient 44"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "RAMPCTRL,No Description"
|
|
bitfld.long 0x00 8.--11. "RAMPRATE2,Ramp rate 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "RAMPRATE1,Ramp rate 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "RAMPRATE0,Ramp rate 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "RAMPLEV,No Description"
|
|
hexmask.long.byte 0x00 16.--23. 1. "RAMPLEV2,Ramp level 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. "RAMPLEV1,Ramp level 1"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "RAMPLEV0,Ramp level 0"
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "DCCOMP,No Description"
|
|
bitfld.long 0x00 7.--8. "DCLIMIT,DC offset limit" "0: FULLSCALE,1: FULLSCALEBY4,2: FULLSCALEBY8,3: FULLSCALEBY16"
|
|
bitfld.long 0x00 4.--6. "DCCOMPGEAR,DC Offset Compensation Filter Gear" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3. "DCCOMPFREEZE,DC Offset Compensation Filter Freeze" "0,1"
|
|
bitfld.long 0x00 2. "DCRSTEN,DC Compensation Filter Reset Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "DCCOMPEN,DC Offset Compensation Enable" "0,1"
|
|
bitfld.long 0x00 0. "DCESTIEN,DC Offset Estimation Enable" "0,1"
|
|
group.long 0xE4++0x03
|
|
line.long 0x00 "DCCOMPFILTINIT,No Description"
|
|
bitfld.long 0x00 30. "DCCOMPINIT,Initialize filter state" "0,1"
|
|
hexmask.long.word 0x00 15.--29. 1. "DCCOMPINITVALQ,Q-channel initialization value"
|
|
newline
|
|
hexmask.long.word 0x00 0.--14. 1. "DCCOMPINITVALI,I-channel initialization value"
|
|
rgroup.long 0xE8++0x03
|
|
line.long 0x00 "DCESTI,No Description"
|
|
hexmask.long.word 0x00 15.--29. 1. "DCCOMPESTIVALQ,Q-channel DC-Offset Estimated value"
|
|
hexmask.long.word 0x00 0.--14. 1. "DCCOMPESTIVALI,I-channel DC-Offset Estimated value"
|
|
group.long 0xEC++0x03
|
|
line.long 0x00 "SRCCHF,No Description"
|
|
bitfld.long 0x00 31. "INTOSR,Forcing Integer OSR" "0,1"
|
|
bitfld.long 0x00 29.--30. "BWSEL,Channel filter bandwidth" "0: wide bandwidth selected BW =..,1: wide bandwidth selected BW =..,2: narrow bandwidth selected BW =..,3: narrow bandwidth selected BW =.."
|
|
newline
|
|
bitfld.long 0x00 27. "SRCENABLE2,SRC2 enable" "0,1"
|
|
hexmask.long.word 0x00 12.--26. 1. "SRCRATIO2,Q-channel SRC ratio"
|
|
newline
|
|
bitfld.long 0x00 11. "SRCENABLE1,SRC1 enable" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRCRATIO1,I-channel SRC ratio"
|
|
group.long 0xF4++0x03
|
|
line.long 0x00 "DSATHD0,No Description"
|
|
hexmask.long.word 0x00 20.--31. 1. "FDEVMAXTHD,Frequency deviation maximum threshold"
|
|
bitfld.long 0x00 14.--19. "FDEVMINTHD,Frequency deviation minimum threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "UNMODTHD,Unmodulated carrier detector threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SPIKETHD,Spike threshold"
|
|
group.long 0xF8++0x03
|
|
line.long 0x00 "DSATHD1,No Description"
|
|
bitfld.long 0x00 30. "FREQSCALE,Frequency scale factor" "0,1"
|
|
bitfld.long 0x00 29. "PWRDETDIS,Power detection disabled" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "AMPFLTBYP,Amplitude filter bypass" "0,1"
|
|
bitfld.long 0x00 27. "PWRFLTBYP,Power filter bypass" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25.--26. "FREQLATDLY,Frequency late delay" "0,1,2,3"
|
|
bitfld.long 0x00 21.--24. "RSSIJMPTHD,RSSI jump detector threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 18.--20. "DSARSTCNT,DSA reset counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--17. "POWRELTHD,Relative power detector threshold" "0: Threshold is 6dB,1: Threshold is 9dB,2: Threshold is 12dB,3: Threshold is 15dB"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "POWABSTHD,Power absolute threshold"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "DSACTRL,No Description"
|
|
bitfld.long 0x00 28.--31. "AMPJUPTHD,Amplitude jump detection thrshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 27. "AGCBAUDEN,Consider Baud_en from AGC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26. "RESTORE,Power detector reset of DSA" "0,1"
|
|
bitfld.long 0x00 23.--25. "LOWDUTY,Low duty cycle delay" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 21.--22. "GAINREDUCDLY,Detection Delay of AGC gain reduction" "0,1,2,3"
|
|
bitfld.long 0x00 19. "DSARSTON,DSA detection reset" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "TRANRSTDSA,power transient detector Reset DSA" "0,1"
|
|
bitfld.long 0x00 17. "FREQAVGSYM,DSA frequency estimation averaging" "0: Frequency estimation over 2 symbol periods,1: Frequency estimation over 4 symbol periods"
|
|
newline
|
|
bitfld.long 0x00 16. "SCHPRD,Search period window length" "0: The search period is 2 symbol periods,1: The search period is 4 symbol periods"
|
|
bitfld.long 0x00 11.--15. "ARRTOLERTHD1,Arrival tolerance threshold 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 6.--10. "ARRTOLERTHD0,Arrival tolerance threshold 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 2.--5. "ARRTHD,Signal arrival valid counter threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "DSAMODE,Mode of Digital Signal Arrival detector" "0: DSA is disabled,1: DSA is enabled by the relative/absolute RSSI..,?..."
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "VITERBIDEMOD,No Description"
|
|
bitfld.long 0x00 31. "DISDEMODOF,Disable Demod Over Flow Detection" "0,1"
|
|
bitfld.long 0x00 27.--30. "CORRSTPSIZE,Correction step size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 23.--26. "CORRCYCLE,Correction cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 22. "SYNTHAFC,Synthesizer AFC in Viterbi demod" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--21. "VITERBIKSI3,VITERBI KSI3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.byte 0x00 9.--15. 1. "VITERBIKSI2,VITERBI KSI2"
|
|
newline
|
|
hexmask.long.byte 0x00 2.--8. 1. "VITERBIKSI1,VITERBI KSI1"
|
|
bitfld.long 0x00 1. "HARDDECISION,Hard decision" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "VTDEMODEN,Viterbi demodulator enable" "0,1"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "VTCORRCFG0,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "EXPECTPATT,Expected pattern"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "DIGMIXCTRL,No Description"
|
|
bitfld.long 0x00 22. "DIGMIXFB,Digital mixer Frequency Correction" "0,1"
|
|
bitfld.long 0x00 21. "MIXERCONJ,Digital mixer input conjugate" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "DIGMIXMODE,Digital mixer frequency control" "0: Mixer frequency specified by CFOSR,1: Mixer frequency specified by DIGMIXFREQ"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. "DIGMIXFREQ,Digital mixer frequency control word"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "VTCORRCFG1,No Description"
|
|
bitfld.long 0x00 27.--30. "EXPECTHT,Expected patterns head and tail" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 23.--26. "BUFFHEAD,Buffer header" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.byte 0x00 15.--22. 1. "EXPSYNCLEN,Expected sync length"
|
|
hexmask.long.word 0x00 6.--14. 1. "VTFRQLIM,Viterbi frequency limiter"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "CORRSHFTLEN,Correlator shift length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "VTTRACK,No Description"
|
|
bitfld.long 0x00 30.--31. "SYNCTIMEOUTSEL,SYNC-WORD DET TIMEOUT" "0,1,2,3"
|
|
hexmask.long.byte 0x00 22.--29. 1. "HIPWRTHD,High Power detection threshold"
|
|
newline
|
|
bitfld.long 0x00 18.--21. "FREQBIAS,Frequency estimation bias" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--17. "TIMGEAR,Timing Gear" "0: Execute timing tracking regardless of..,1: Execute timing tracking only when correlation..,2: Execute timing tracking only when correlation..,?..."
|
|
newline
|
|
bitfld.long 0x00 15. "TIMEOUTMODE,Timeout mode" "0,1"
|
|
bitfld.long 0x00 14. "TIMCHK,Time check" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x00 6.--13. 1. "TIMEACQUTHD,Time acquisition threshold"
|
|
bitfld.long 0x00 2.--5. "TIMTRACKTHD,Timing tracking threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "FREQTRACKMODE,Frequency tracking mode" "0: Frequency tracking disabled,1: Frequency tracking enabled with one..,2: Frequency tracking enabled with one..,3: Frequency tracking enabled with one.."
|
|
rgroup.long 0x118++0x03
|
|
line.long 0x00 "BREST,No Description"
|
|
bitfld.long 0x00 6.--10. "BRESTNUM,Fractional part of estimated baudrate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--5. "BRESTINT,Integer part of estimated baudrate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "AUTOCG,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "AUTOCGEN,Enable automatic clock gating"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "CGCLKSTOP,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "FORCEOFF,Manual control clocks"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "DSATHD2,No Description"
|
|
bitfld.long 0x00 30. "PMDETFORCE,Force DSA preamble detector" "0,1"
|
|
bitfld.long 0x00 25.--29. "INTERFERDET,Interference detection threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 20.--24. "FREQESTTHD,Frequency Estimation Timeout Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--19. "PMDETPASSTHD,DSA Preamble detection counter threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--15. "FDADJTHD,Frequency deviation ripple threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 9. "JUMPDETEN,Power jump detection enable" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "POWABSTHDLOG,Power threshold in logarithm-scale"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "DIRECTMODE,No Description"
|
|
bitfld.long 0x00 8.--12. "CLKWIDTH,Synchronous mode clock pulse width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 2.--3. "SYNCPREAM,Synchronous mode preamble" "0: No preamble bits appended,1: 8 preamble bits appended,2: 16 preamble bits appended,3: 32 preamble bits appended"
|
|
newline
|
|
bitfld.long 0x00 1. "SYNCASYNC,Choose Synchronous or Asynchronous mode" "0,1"
|
|
bitfld.long 0x00 0. "DMENABLE,Enable Direct Mode" "0,1"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "LONGRANGE,No Description"
|
|
bitfld.long 0x00 28.--30. "LRDEC,DEC value" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 27. "LRBLEDSA,DSA enable" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 16.--26. 1. "LRTIMCORRTHD,Correlator threshold"
|
|
bitfld.long 0x00 15. "LRBLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11.--14. "LRCORRSCHWIN,Window size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--10. 1. "LRCORRTHD,Correlator threshold"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "LONGRANGE1,No Description"
|
|
bitfld.long 0x00 29. "LOGICBASEDLRDEMODGATE,Logic Based Long Range Demod Gating" "0,1"
|
|
bitfld.long 0x00 28. "LOGICBASEDPUGATE,Logic Based Phase Unwrap Gating" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24.--27. "LRSPIKETHADD,Long Range DSA spike threshold addition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 21.--23. "AVGWIN,Average window" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 18.--20. "HYSVAL,Hysteresis Value for BBSS" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--17. "CHPWRACCUDEL,Channel Power Accumulated Delay" "0: Use accumulated channel power value,1: Delayed by 32 chips,2: Delayed by 64 chips,?..."
|
|
newline
|
|
hexmask.long.word 0x00 4.--14. 1. "LRTIMEOUTTHD,Long Range Time Out Threshold"
|
|
bitfld.long 0x00 0.--3. "LRSS,Long Range Signal Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "LONGRANGE2,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "LRCHPWRTH4,Long Range channel power threshold"
|
|
hexmask.long.byte 0x00 16.--23. 1. "LRCHPWRTH3,Long Range channel power threshold"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "LRCHPWRTH2,Long Range channel power threshold"
|
|
hexmask.long.byte 0x00 0.--7. 1. "LRCHPWRTH1,Long Range channel power threshold"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "LONGRANGE3,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "LRCHPWRTH8,Long Range channel power threshold"
|
|
hexmask.long.byte 0x00 16.--23. 1. "LRCHPWRTH7,Long Range channel power threshold"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "LRCHPWRTH6,Long Range channel power threshold"
|
|
hexmask.long.byte 0x00 0.--7. 1. "LRCHPWRTH5,Long Range channel power threshold"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "LONGRANGE4,No Description"
|
|
bitfld.long 0x00 28.--31. "LRCHPWRSH4,Long Range channel power shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "LRCHPWRSH3,Long Range channel power shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 20.--23. "LRCHPWRSH2,Long Range channel power shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "LRCHPWRSH1,Long Range channel power shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "LRCHPWRTH10,Long Range channel power threshold"
|
|
hexmask.long.byte 0x00 0.--7. 1. "LRCHPWRTH9,Long Range channel power threshold"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "LONGRANGE5,No Description"
|
|
bitfld.long 0x00 24.--27. "LRCHPWRSH11,Long Range channel power shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. "LRCHPWRSH10,Long Range channel power shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "LRCHPWRSH9,Long Range channel power shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. "LRCHPWRSH8,Long Range channel power shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "LRCHPWRSH7,Long Range channel power shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "LRCHPWRSH6,Long Range channel power shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "LRCHPWRSH5,Long Range channel power shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "LONGRANGE6,No Description"
|
|
bitfld.long 0x00 28.--31. "LRCHPWRSH12,Long Range channel power shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 20.--27. 1. "LRCHPWRTH11,Long Range channel power threshold"
|
|
newline
|
|
hexmask.long.word 0x00 8.--18. 1. "LRSPIKETHD,Long Range spike threshold"
|
|
hexmask.long.byte 0x00 0.--7. 1. "LRCHPWRSPIKETH,Long Range channel power spike threshold"
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "LRFRC,No Description"
|
|
bitfld.long 0x00 8. "LRCORRMODE,LR Correlator operation Mode" "0,1"
|
|
bitfld.long 0x00 2.--7. "FRCACKTIMETHD,FRC acknowledge timeout threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "CI500,Long Range CI mapping for 500kbps" "0,1,2,3"
|
|
group.long 0x168++0x03
|
|
line.long 0x00 "DSATHD3,No Description"
|
|
hexmask.long.word 0x00 20.--31. 1. "FDEVMAXTHDLO,Frequency deviation maximum threshold"
|
|
bitfld.long 0x00 14.--19. "FDEVMINTHDLO,Frequency deviation minimum threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "UNMODTHDLO,Unmodulated carrier detector threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SPIKETHDLO,Spike threshold"
|
|
group.long 0x16C++0x03
|
|
line.long 0x00 "DSATHD4,No Description"
|
|
bitfld.long 0x00 26. "SWTHD,Enable switch threshold for low power" "0,1"
|
|
bitfld.long 0x00 21.--25. "ARRTOLERTHD1LO,Arrival tolerance threshold 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 16.--20. "ARRTOLERTHD0LO,Arrival tolerance threshold 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 0.--15. 1. "POWABSTHDLO,Power absolute threshold for low power"
|
|
group.long 0x170++0x03
|
|
line.long 0x00 "VTBLETIMING,No Description"
|
|
bitfld.long 0x00 12.--15. "FLENOFF,Timing Stamp Frame Length Offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 4.--11. 1. "TIMINGDELAY,Viterbi BLE Delay timer"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "VTBLETIMINGSEL,Viterbi BLE timing stamp selection" "0: Delayed frame detection will be used as..,1: The end of frame detection from Narrow..,2: The end of frame detection from Narrow..,3: For testing only"
|
|
group.long 0x208++0x03
|
|
line.long 0x00 "IF,No Description"
|
|
bitfld.long 0x00 18. "CFGANTPATTRD,cfg" "0,1"
|
|
bitfld.long 0x00 17. "ETS,Early Time Stamp detect" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "FRCTIMOUT,DEMOD-FRC req/ack timeout" "0,1"
|
|
bitfld.long 0x00 15. "RXTIMNF,Timing not found" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "RXFRAMEDETOF,Frame detection overflow" "0,1"
|
|
bitfld.long 0x00 13. "RXPRELOST,Preamble lost" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "RXTIMLOST,Timing lost" "0,1"
|
|
bitfld.long 0x00 11. "RXFRAMEDET1,Frame with sync-word 1 detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "RXFRAMEDET0,Frame with sync-word 0 detected" "0,1"
|
|
bitfld.long 0x00 9. "RXPREDET,Preamble detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "RXTIMDET,Timing detected" "0,1"
|
|
bitfld.long 0x00 7. "PHYCODEDET,CONCURRENT CODED PHY DET" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "PHYUNCODEDET,CONCURRENT UNCODED PHY DET" "0,1"
|
|
bitfld.long 0x00 5. "PHDSADET,PHASE DSA DETECT" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "LDTNOARR,No signal Detected in LDT" "0,1"
|
|
bitfld.long 0x00 3. "TXRAMPDONE,Mod ramper idle" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TXPRESENT,Preamble sent" "0,1"
|
|
bitfld.long 0x00 1. "TXSYNCSENT,Sync word sent" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXFRAMESENT,Frame sent" "0,1"
|
|
group.long 0x20C++0x03
|
|
line.long 0x00 "IEN,No Description"
|
|
bitfld.long 0x00 18. "CFGANTPATTRD,CFGANTPATTRD" "0,1"
|
|
bitfld.long 0x00 17. "ETS,Early Time Stamp detect" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "FRCTIMOUT,DEMOD-FRC req/ack timeout" "0,1"
|
|
bitfld.long 0x00 15. "RXTIMNF,Timing not found" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "RXFRAMEDETOF,Frame detection overflow" "0,1"
|
|
bitfld.long 0x00 13. "RXPRELOST,Preamble lost" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "RXTIMLOST,Timing lost" "0,1"
|
|
bitfld.long 0x00 11. "RXFRAMEDET1,Frame with sync-word 1 detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "RXFRAMEDET0,Frame with sync-word 0 detected" "0,1"
|
|
bitfld.long 0x00 9. "RXPREDET,Preamble detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "RXTIMDET,Timing detected" "0,1"
|
|
bitfld.long 0x00 7. "PHYCODEDET,CONCURRENT CODED PHY DET" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "PHYUNCODEDET,CONCURRENT UNCODED PHY DET" "0,1"
|
|
bitfld.long 0x00 5. "PHDSADET,PHASE DSA DETECT" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "LDTNOARR,No signal Detected in LDT" "0,1"
|
|
bitfld.long 0x00 3. "TXRAMPDONE,Mod ramper idle" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TXPRESENT,Preamble sent" "0,1"
|
|
bitfld.long 0x00 1. "TXSYNCSENT,Sync word sent" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXFRAMESENT,Frame sent" "0,1"
|
|
wgroup.long 0x218++0x03
|
|
line.long 0x00 "CMD,No Description"
|
|
bitfld.long 0x00 5. "AFCRXCLEAR,Clear AFC RX compensation" "0,1"
|
|
bitfld.long 0x00 4. "AFCTXCLEAR,Clear AFC TX compensation" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "AFCTXLOCK,Lock AFC TX compensation" "0,1"
|
|
bitfld.long 0x00 0. "PRESTOP,Preamble stop" "0,1"
|
|
rgroup.long 0x21C++0x03
|
|
line.long 0x00 "FSMSTATUS,No Description"
|
|
bitfld.long 0x00 20.--23. "ANTDIVSTATE,Antenna diversity control state" "0: Idle state,1: First ANT0 selection,2: First ANT1 selection,3: Timing search on ANT0,4: Timing search on ANT1,5: Check ANT1 after timing detecton ANT0,6: Check ANT0 after timing detecton ANT1,7: Evaluate and select better antenna,8: Searching on better antenna,9: Selected better antenna,10: REPEAT_ANT0,11: REPEAT_ANT1,?,?,?,15: Manual mode"
|
|
bitfld.long 0x00 15.--19. "NBBLESTATE,Demodulator Narrow-band BLE FSM state" "0: IDLE state,1: VTINITI,2: ADDR_NXT,3: INI_COST,4: CALC_COST,5: INITAL_ACQU,6: INITAL_COST_CALC,7: MIN_COST_CALC,8: FREQ_ACQU,9: FREQ_ACQU_DONE,10: TIMING_ACQU_EARLY,11: TIMING_ACQU_CURR,12: TIMING_ACQU_LATE,13: TIMING_ACQU_DONE,14: VIRTBI_INIT0,15: VIRTBI_INIT1,16: VIRTBI_RXSYNC,17: VIRTBI_RXPAYLOAD,18: HARD_RXSYNC,19: HARD_RXPAYLOAD,20: TRACK_FREQ,21: TRACK_TIM_EARLY,22: TRACK_TIM_CURR,23: TRACK_TIM_LATE,24: TRACK_DONE,25: TRACK_DECISION,26: STOP,27: WAIT_ACK,28: DEBUG,?..."
|
|
newline
|
|
bitfld.long 0x00 10.--14. "LRBLESTATE,Demodulator long-range BLE FSM state" "0: IDLE state,1: CLEANUP,2: CORRCOE,3: WAIT_LR_DSA,4: MAXCORR,5: WAIT_RDY,6: FEC1_DATA,7: FEC1_ACK,8: PAUSE,9: FEC2_DATA,10: FEC2_ACK,11: TRACK_CUR,12: TRACK_EAR,13: TRACK_LAT,14: TRACK_DONE,15: T_DECISION,16: STOP,?..."
|
|
bitfld.long 0x00 7.--9. "DSASTATE,Demodulator DSA FSM state" "0: IDLE state,1: Arrival Check,2: Status Check,3: SAMP_PW,4: WAIT_PWRUP,5: WAIT_DSALO,6: WAIT_ABORT,7: STOP"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--6. 1. "DETSTATE,Detection FSM state"
|
|
rgroup.long 0x220++0x03
|
|
line.long 0x00 "STATUS2,No Description"
|
|
hexmask.long.word 0x00 18.--31. 1. "RTVTCORR,VT demod Correlation"
|
|
bitfld.long 0x00 15. "CODEDPHY,CODED PHY DET" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "UNCODEDPHY,UNCODED PHY DET" "0,1"
|
|
bitfld.long 0x00 12.--13. "LRBLECI,RXed packet's LR BLE coding indicator" "0: FEC block 2 coded using C=8 125kbps,1: FEC block 2 coded using C=2 500kbps,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--11. "BBSSMUX,Actual Baseband Signal Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 0.--7. 1. "CHPWRACCUMUX,Channel power"
|
|
rgroup.long 0x224++0x03
|
|
line.long 0x00 "STATUS3,No Description"
|
|
bitfld.long 0x00 26. "SYNCSECPEAKABTH,SYNC second peak above threshold" "0,1"
|
|
bitfld.long 0x00 24. "LRDSADET,DSA prefilter above LRSPIKETHD" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "LRDSALIVE,BLRDSA Prefilter above LRSPIKETHD" "0,1"
|
|
hexmask.long.word 0x00 11.--21. 1. "BBPFOUTABS,Pre-filter Correlation Output for BLR"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "BBPFOUTABS1,Pre-filter Correlation Output"
|
|
group.long 0x228++0x03
|
|
line.long 0x00 "IRCAL,No Description"
|
|
bitfld.long 0x00 15. "IRCALIFADCDBG,IRCAL IFADC DBG" "0,1"
|
|
bitfld.long 0x00 14. "IRCALCOEFRSTCMD,IRCAL coef reset cmd" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "IRCORREN,IR Correction enable bit" "0,1"
|
|
bitfld.long 0x00 7.--12. "MUISHF,MUI shift value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 1.--5. "MURSHF,MUR shift value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0. "IRCALEN,IRCAL enable bit" "0,1"
|
|
rgroup.long 0x22C++0x03
|
|
line.long 0x00 "IRCALCOEF,No Description"
|
|
hexmask.long.word 0x00 16.--30. 1. "CIV,CIV coefficient"
|
|
hexmask.long.word 0x00 0.--14. 1. "CRV,CRV coefficient"
|
|
group.long 0x230++0x03
|
|
line.long 0x00 "BLEIQDSA,No Description"
|
|
hexmask.long.word 0x00 18.--31. 1. "BLEIQDSADIFFTH1,BLEIQDSA BLEIQDSADIFFTH1"
|
|
bitfld.long 0x00 15.--17. "BLEIQDSAIIRCOEFPWR,BLEIQDSA IIRCOEFPWR" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.word 0x00 1.--14. 1. "BLEIQDSATH,BLEIQDSA Threshold"
|
|
bitfld.long 0x00 0. "BLEIQDSAEN,BLEIQDSA Enable" "0,1"
|
|
group.long 0x234++0x03
|
|
line.long 0x00 "BLEIQDSAEXT1,No Description"
|
|
bitfld.long 0x00 29. "IIRRST,IIR Reset" "0,1"
|
|
bitfld.long 0x00 25.--28. "MAXCORRCNTIQDSA,Max Corr Cnt IQDSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.word 0x00 11.--24. 1. "BLEIQDSATHCOMB,Threshold when i and q are added"
|
|
bitfld.long 0x00 7.--10. "BLEIQDSAADDRBIAS,BLEIQDSA ADDRBIAS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 5.--6. "CORRIIRAVGMULFACT,Corr IIR Avg Multiplication Factor" "0,1,2,3"
|
|
bitfld.long 0x00 3.--4. "CHPWRFIRAVGVAL,Channel Power FIR Avg Value" "0: No Avg,1: 2 sample avg,2: 4 sample avg,3: 8 sample avg"
|
|
newline
|
|
bitfld.long 0x00 2. "CHPWRFIRAVGEN,Channel Power FIR Avg Enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "FREQSCALEIQDSA,I/Q DSA Frequency scale" "0,1,2,3"
|
|
group.long 0x238++0x03
|
|
line.long 0x00 "SYNCPROPERTIES,No Description"
|
|
hexmask.long.byte 0x00 1.--7. 1. "SYNCSECPEAKTH,SYNC auto corr second peak threshold"
|
|
bitfld.long 0x00 0. "SYNCCORRCLR,Sync auto corr clear bit" "0,1"
|
|
group.long 0x23C++0x03
|
|
line.long 0x00 "DIGIGAINCTRL,No Description"
|
|
bitfld.long 0x00 8. "DEC0GAIN,DEC0 Gain Select" "0,1"
|
|
bitfld.long 0x00 7. "DIGIGAINHALF,Digital Gain Halved" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "DIGIGAINDOUBLE,Digital Gain Doubled" "0,1"
|
|
bitfld.long 0x00 1.--5. "DIGIGAINSEL,Digital Gain Select" "0: GAINM3,1: GAINM2P75,2: GAINM2P5,3: GAINM2P25,4: GAINM2,5: GAINM1P75,6: GAINM1P5,7: GAINM1P25,8: GAINM1,9: GAINM0P75,10: GAINM0P5,11: GAINM0P25,12: GAINM0,13: GAINP0P25,14: GAINP0P5,15: GAINP0P75,16: GAINP1,17: GAINP1P25,18: GAINP1P5,19: GAINP1P75,20: GAINP2,21: GAINP2P25,22: GAINP2P5,23: GAINP2P75,24: GAINP3,?..."
|
|
newline
|
|
bitfld.long 0x00 0. "DIGIGAINEN,Digital Gain Enable" "0,1"
|
|
group.long 0x240++0x03
|
|
line.long 0x00 "PRSCTRL,No Description"
|
|
bitfld.long 0x00 16.--17. "ANT1SEL," "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. "ANT0SEL," "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 12.--13. "LOWCORRSEL," "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "PRESENTSEL," "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "SYNCSENTSEL," "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. "WEAKSEL," "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "NEWWNDSEL," "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "ADVANCESEL," "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "POSTPONESEL," "0,1,2,3"
|
|
group.long 0x248++0x03
|
|
line.long 0x00 "REALTIMCFE,No Description"
|
|
bitfld.long 0x00 31. "RTCFEEN,Trecs Enable" "0,1"
|
|
bitfld.long 0x00 30. "VTAFCFRAME,Viterbi AFC FRAME Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "SINEWEN,Enable SINE WEIGHT" "0,1"
|
|
bitfld.long 0x00 18.--20. "SYNCACQWIN,SYNC Correlator Size" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "TRACKINGWIN,Correlator size for Tracking" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 14. "RTSCHMODE,Real Time CFE searching mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10.--13. "RTSCHWIN,Real time CFE searching window" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--9. 1. "MINCOSTTHD,Min"
|
|
group.long 0x24C++0x03
|
|
line.long 0x00 "SEQIF,No Description"
|
|
bitfld.long 0x00 18. "CFGANTPATTRD,CFGANTPATTRD" "0,1"
|
|
bitfld.long 0x00 17. "ETS,Early timestamp" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "FRCTIMOUT,DEMOD-FRC req/ack timeout" "0,1"
|
|
bitfld.long 0x00 15. "RXTIMNF,Timing not found" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "RXFRAMEDETOF,Frame detection overflow" "0,1"
|
|
bitfld.long 0x00 13. "RXPRELOST,Preamble lost" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "RXTIMLOST,Timing lost" "0,1"
|
|
bitfld.long 0x00 11. "RXFRAMEDET1,Frame with sync-word 1 detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "RXFRAMEDET0,Frame with sync-word 0 detected" "0,1"
|
|
bitfld.long 0x00 9. "RXPREDET,Preamble detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "RXTIMDET,Timing detected" "0,1"
|
|
bitfld.long 0x00 7. "PHYCODEDET,CONCURRENT CODED PHY DET" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "PHYUNCODEDET,CONCURRENT UNCODED PHY DET" "0,1"
|
|
bitfld.long 0x00 5. "PHDSADET,PHASE DSA DETECT" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "LDTNOARR,No signal Detected in LDT" "0,1"
|
|
bitfld.long 0x00 3. "TXRAMPDONE,Mod ramper idle" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TXPRESENT,Preamble sent" "0,1"
|
|
bitfld.long 0x00 1. "TXSYNCSENT,Sync word sent" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXFRAMESENT,Frame sent" "0,1"
|
|
group.long 0x250++0x03
|
|
line.long 0x00 "SEQIEN,No Description"
|
|
bitfld.long 0x00 18. "CFGANTPATTRD,CFGANTPATTRD" "0,1"
|
|
bitfld.long 0x00 17. "ETS,Early time stamp" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "FRCTIMOUT,DEMOD-FRC req/ack timeout" "0,1"
|
|
bitfld.long 0x00 15. "RXTIMNF,Timing not found" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "RXFRAMEDETOF,Frame detection overflow" "0,1"
|
|
bitfld.long 0x00 13. "RXPRELOST,Preamble lost" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "RXTIMLOST,Timing lost" "0,1"
|
|
bitfld.long 0x00 11. "RXFRAMEDET1,Frame with sync-word 1 detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "RXFRAMEDET0,Frame with sync-word 0 detected" "0,1"
|
|
bitfld.long 0x00 9. "RXPREDET,Preamble detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "RXTIMDET,Timing detected" "0,1"
|
|
bitfld.long 0x00 7. "PHYCODEDET,CONCURRENT CODED PHY DET" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "PHYUNCODEDET,CONCURRENT UNCODED PHY DET" "0,1"
|
|
bitfld.long 0x00 5. "PHDSADET,PHASE DSA DETECT" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "LDTNOARR,No signal Detected in LDT" "0,1"
|
|
bitfld.long 0x00 3. "TXRAMPDONE,Mod ramper idle" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TXPRESENT,Preamble sent" "0,1"
|
|
bitfld.long 0x00 1. "TXSYNCSENT,Sync word sent" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXFRAMESENT,Frame sent" "0,1"
|
|
group.long 0x254++0x03
|
|
line.long 0x00 "ETSCTRL,No Description"
|
|
hexmask.long.tbyte 0x00 12.--29. 1. "CAPTRIG,Trigger to capture"
|
|
bitfld.long 0x00 10. "CAPSIGONPRS,Capture Signal On PRS" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. "ETSLOC,Early Time Stamp Location"
|
|
group.long 0x258++0x03
|
|
line.long 0x00 "ANTSWCTRL,No Description"
|
|
hexmask.long.byte 0x00 17.--24. 1. "EXTDSTOPPULSECNT,Extend Stop Pulse Counter"
|
|
bitfld.long 0x00 16. "ANTSWENABLE,Ant sw enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "CFGANTPATTEN,Configure Ant Pattern Enable" "0,1"
|
|
bitfld.long 0x00 14. "ANTSWRST,Ant SW rst pulse" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12.--13. "ANTSWTYPE,Ant Switch Type" "0: 2us ant switching,1: 4us ant switching,2: 6us ant switching,3: 8us ant switching"
|
|
bitfld.long 0x00 6.--11. "ANTCOUNT,Total Ant count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "ANTDFLTSEL,Ant Default Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x25C++0x03
|
|
line.long 0x00 "ANTSWSTART,No Description"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "ANTSWSTARTTIM,Ant switch start time"
|
|
group.long 0x260++0x03
|
|
line.long 0x00 "ANTSWEND,No Description"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "ANTSWENDTIM,Ant switch start time"
|
|
group.long 0x264++0x03
|
|
line.long 0x00 "TRECPMPATT,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "PMEXPECTPATT,Expected PM pattern"
|
|
group.long 0x268++0x03
|
|
line.long 0x00 "TRECPMDET,No Description"
|
|
bitfld.long 0x00 31. "PREAMSCH,PM detection enable in Trecs" "0,1"
|
|
bitfld.long 0x00 25.--29. "COSTHYST,PM Seaching COST HYST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 23.--24. "VTPMDETSEL,Trecs PM Detection Thrshold" "0,1,2,3"
|
|
hexmask.long.word 0x00 14.--22. 1. "PMMINCOSTTHD,Min"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "PHSCALE,PHASE Scaler" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. "PMTIMEOUTSEL,PM searching timeout Threshold" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "PMCOSTVALTHD,Min COST Validation for AFC" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "PMACQUINGWIN,PM Correlator Size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x26C++0x03
|
|
line.long 0x00 "CFGANTPATT,No Description"
|
|
hexmask.long 0x00 0.--29. 1. "CFGANTPATTVAL,CFGANTPATTVAL"
|
|
group.long 0x270++0x03
|
|
line.long 0x00 "ETSTIM,No Description"
|
|
bitfld.long 0x00 17. "ETSCOUNTEREN,ETSCOUNTEREN" "0,1"
|
|
hexmask.long.tbyte 0x00 0.--16. 1. "ETSTIMVAL,ETSTIMVAL"
|
|
group.long 0x274++0x03
|
|
line.long 0x00 "ANTSWCTRL1,No Description"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "TIMEPERIOD,Time Period of xtal"
|
|
group.long 0x278++0x03
|
|
line.long 0x00 "COCURRMODE,No Description"
|
|
bitfld.long 0x00 31. "CONCURRENT,CONCURRENT MODE Enable" "0,1"
|
|
group.long 0x27C++0x03
|
|
line.long 0x00 "ANTDIVCTRL,No Description"
|
|
bitfld.long 0x00 8. "ENADPRETHRESH,Enable Preamble threshold" "0: Disable use of Preamble threshold after..,1: Enable use of Preamble threshold after timing.."
|
|
hexmask.long.byte 0x00 0.--7. 1. "ADPRETHRESH,Preamble threshold"
|
|
group.long 0x280++0x03
|
|
line.long 0x00 "BLEIQDSAEXT2,No Description"
|
|
bitfld.long 0x00 9.--10. "BBSSDIFFCHVAL,BBSS Diff Change Val" "0: Greater than 0,1: Greater than 1,2: Greater than 2,3: Greater than 3"
|
|
hexmask.long.byte 0x00 1.--8. 1. "BBSSDEBOUNCETIM,BBSS Debounce Time"
|
|
newline
|
|
bitfld.long 0x00 0. "DISMAXPEAKTRACKMODE,Disable Max Peak Track Mode" "0,1"
|
|
group.long 0x284++0x03
|
|
line.long 0x00 "SPARE,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SPARE,Spare register"
|
|
group.long 0x288++0x03
|
|
line.long 0x00 "IRCALCOEFWR,No Description"
|
|
bitfld.long 0x00 31. "CIVWEN,CIV Coefficient Write Enable" "0,1"
|
|
hexmask.long.word 0x00 16.--30. 1. "CIVWD,CIV coefficient"
|
|
newline
|
|
bitfld.long 0x00 15. "CRVWEN,CIV Coefficient Write Enable" "0,1"
|
|
hexmask.long.word 0x00 0.--14. 1. "CRVWD,CRV coefficient"
|
|
tree.end
|
|
tree "MODEM_S"
|
|
base ad:0xA8014000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "IPVERSION,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "IPVERSION,IP Version"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "EN,No Description"
|
|
bitfld.long 0x00 0. "EN,Enable peripheral clock to this module" "0,1"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "STATUS,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "WEAKSYMBOLS,Weak symbols"
|
|
hexmask.long.byte 0x00 16.--23. 1. "CORR,Correlation"
|
|
newline
|
|
bitfld.long 0x00 12.--14. "STAMPSTATE,BLE Viterbi Demod Timing Stamp" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. "VITERBIDEMODFRAMEDET,Viterbi Demod frame detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "VITERBIDEMODTIMDET,Viterbi Demod timing detected" "0,1"
|
|
bitfld.long 0x00 9. "DSAFREQESTDONE,DSA frequency estimation complete" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "DSADETECTED,DSA detected" "0,1"
|
|
bitfld.long 0x00 7. "TIMLOSTCAUSE,Timing Lost Cause" "0: Timing lost during Preamble Search or due to..,1: Timing lost due to incorrect symbols detected.."
|
|
newline
|
|
bitfld.long 0x00 6. "TIMSEQINV,Timing Sequence Inverted" "0,1"
|
|
bitfld.long 0x00 5. "ANTSEL,Selected Antenna" "0: Antenna 0 is selected (ANT0 = 1 and ANT1 = 0),1: Antenna 1 is selected (ANT0 = 0 and ANT1 = 1)"
|
|
newline
|
|
bitfld.long 0x00 4. "FRAMEDETID,Frame Detected ID" "0: Last frame was detected with sync word..,1: Last frame was detected with sync word.."
|
|
bitfld.long 0x00 0.--2. "DEMODSTATE,DEMOD state" "0: Off state,1: Timing search,2: Preamble search,3: Frame search,4: Payload Detection,5: Timing search with sliding window (FDM0),?..."
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "TIMDETSTATUS,No Description"
|
|
bitfld.long 0x00 25.--28. "TIMDETINDEX,Timing detection index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24. "TIMDETPASS,Timing detection pass" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "TIMDETPREERRORS,Preamble errors" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 8.--15. 1. "TIMDETFREQOFFEST,Frequency offset estimate"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "TIMDETCORR,Correlation value"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "FREQOFFEST,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "SOFTVAL,Soft detection value"
|
|
hexmask.long.byte 0x00 16.--23. 1. "CORRVAL,Correlation value"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. "FREQOFFEST,Frequency offset estimate"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "AFCADJRX,No Description"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "AFCADJRX,AFC adjustment for RX"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "AFCADJTX,No Description"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "AFCADJTX,AFC adjustment for TX"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "MIXCTRL,No Description"
|
|
bitfld.long 0x00 4. "DIGIQSWAPEN,Digital I/Q swap enable" "0,1"
|
|
bitfld.long 0x00 0.--3. "ANAMIXMODE,Analog receiver mixer mode of operation" "0: The analog mixer operates in its normal mode,1: I path is positive Q path is positive I and Q..,2: I path is positive Q path is negative,3: I path is positive Q path is negative I and Q..,4: I path is negative Q path is positive,5: I path is negative Q path is positive I and Q..,6: I path is negative Q path is negative,7: I path is negative Q path is negative I and Q..,8: Control the analog receiver mixer such that..,9: Control the analog receiver mixer such that..,?..."
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CTRL0,No Description"
|
|
bitfld.long 0x00 30.--31. "FRAMEDETDEL,FRAMEDET delay" "0: No delay,1: 8 baud delay,2: 16 baud delay,3: 32 baud delay"
|
|
bitfld.long 0x00 27.--29. "DEMODRAWDATASEL,Demod raw data select" "0: Disabled,1: 1-bit entropy source extracted from the RF..,2: 2 * 3-bit I and Q ADC data,3: 2 * 16-bit I and Q channel filtered data..,4: 2 * 16-bit I and Q channel filtered data..,5: 2 * 19-bit I and Q channel filtered data..,6: 8-bit received frequency data (or logarithmic..,7: 8-bit demodulated data (freq/amp/phase)"
|
|
newline
|
|
bitfld.long 0x00 25.--26. "SHAPING,Shaping filter" "0: Filter disabled,1: Filter has odd length,2: Filter has even length,3: Filter has asymmetrical coefficients"
|
|
bitfld.long 0x00 22.--24. "DIFFENCMODE,Differential encoding mode" "0: Differential Encoding is disabled,1: Transmit the XOR-ed value of the Raw symbol..,2: Transmit the XOR-ed value of the Raw symbol..,3: Transmit the XOR-ed value of the Raw symbol..,4: Transmit the XOR-ed value of the Raw symbol..,?..."
|
|
newline
|
|
bitfld.long 0x00 21. "DETDIS,Detection disable" "0,1"
|
|
bitfld.long 0x00 19.--20. "DSSSDOUBLE,DSSS double" "0: Doubling is disabled,1: Doubling is enabled by using inverted symbols,2: Doubling is enabled by using complex..,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--18. "DSSSSHIFTS,DSSS shifts" "0: No symbols are defined by shifting,1: Next symbol generated by 1 cyclic shift,2: Next symbol generated by 2 cyclic shifts,3: Next symbol generated by 4 cyclic shifts,4: Next symbol generated by 8 cyclic shifts,5: Next symbol generated by 16 cyclic shifts,?..."
|
|
bitfld.long 0x00 11.--15. "DSSSLEN,DSSS length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 10. "OOKASYNCPIN,OOK asynchronous pin mode" "0,1"
|
|
bitfld.long 0x00 9. "DUALCORROPTDIS,Dual Correlation Optimization Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6.--8. "MODFORMAT,Modulation format" "0: Frequency Shift Keying with 2 symbols,1: Frequency Shift Keying with 4 symbols,2: Binary Phase Shift Keying,3: Differentially encoded Binary Phase Shift..,4: Half Sine Shaped Offset Quadrature Phase..,5: Minimum Shift Keying,6: On Off Keying and Amplitude Shift Keying,?..."
|
|
bitfld.long 0x00 4.--5. "CODING,Symbol coding" "0: Non Return to Zero,1: Manchester Coding,2: Direct Sequence Spread Spectrum,3: Line code"
|
|
newline
|
|
bitfld.long 0x00 1.--3. "MAPFSK,Mapping of FSK symbols" "0: 4FSK,1: 4FSK,2: 4FSK,3: 4FSK,4: 4FSK,5: 4FSK,6: 4FSK,7: 4FSK"
|
|
bitfld.long 0x00 0. "FDM0DIFFDIS,Frame Detection Mode 0 disable" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CTRL1,No Description"
|
|
hexmask.long.byte 0x00 25.--31. 1. "FREQOFFESTLIM,Frequency offset limit"
|
|
bitfld.long 0x00 22.--24. "FREQOFFESTPER,Frequency offset estimation period" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 20.--21. "PHASEDEMOD,Phase demodulation" "0: Bit Differential Detection,1: Multibit Differential Detection,?..."
|
|
bitfld.long 0x00 16.--19. "RESYNCPER,Resync period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "COMPMODE,Compensation mode" "0: Compensation is disabled,1: Compensation locks when preamble is detected,2: Compensation locks when frame is detected,3: Compensation is always running"
|
|
bitfld.long 0x00 12. "SYNC1INV,SYNC1 invert" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "SYNCDATA,Sync data" "0: SYNC is not part of transmit payload,1: SYNC is part of transmit payload"
|
|
bitfld.long 0x00 10. "TXSYNC,Transmit sync word" "0: Modulator transmits SYNC0,1: Modulator transmits SYNC1"
|
|
newline
|
|
bitfld.long 0x00 9. "DUALSYNC,Dual sync words" "0: Demodulator only searches for SYNC0,1: Demodulator searches for SYNC0 and SYNC1 in.."
|
|
bitfld.long 0x00 5.--8. "SYNCERRORS,Maximum number of sync errors" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--4. "SYNCBITS,Number of sync-word bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CTRL2,No Description"
|
|
bitfld.long 0x00 30.--31. "DMASEL,DMA select" "0: SOFTVAL field,1: CORRVAL field,2: FREQOFFEST field,3: POE field"
|
|
bitfld.long 0x00 29. "DEVWEIGHTDIS,Deviation weighting disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27.--28. "RATESELMODE,Rate select mode" "0: No rate change,1: Change rate for payload,2: FRC selects between BRDIVA/DEVMULA and..,3: The configured/detected syncword decides the.."
|
|
bitfld.long 0x00 25.--26. "DEVMULB,Deviation multiplication factor B" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 23.--24. "DEVMULA,Deviation multiplication factor A" "0,1,2,3"
|
|
bitfld.long 0x00 19.--22. "BRDIVB,Baudrate division factor B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 15.--18. "BRDIVA,Baudrate division factor A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--14. "DATAFILTER,Datafilter" "0: Datafilter disabled,1: Short datafilter enabled,2: Medium datafilter enabled,3: Long datafilter enabled,4: Datafilter with length 6 enabled,5: Datafilter with length 7 enabled,6: Datafilter with length 8 enabled,7: Datafilter with length 9 enabled"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "TXPINMODE,Transmit pin mode" "0: Pinmode is turned off,1: Unused mode,2: DIN/PRS controls transmitted baud directly,3: DIN/PRS is sampled on the rising edge of DCLK.."
|
|
bitfld.long 0x00 9. "RXPINMODE,Receive pin mode" "0: Detected payload bits are clocked out on DOUT,1: DOUT is continuously providing the sign of.."
|
|
newline
|
|
bitfld.long 0x00 8. "RXFRCDIS,Receive FRC disable" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SQITHRESH,Signal Quality Indicator threshold"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CTRL3,No Description"
|
|
hexmask.long.word 0x00 16.--31. 1. "TSAMPLIM,Timing Search Amplitude limit"
|
|
bitfld.long 0x00 14.--15. "TSAMPDEL,Timing Search Amplitude delay" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 12.--13. "TSAMPMODE,Timing Search Amplitude Mode" "0: Amplitude is not used during timing search,1: Timing detection is disabled for windows..,2: Timing detection is disabled for windows..,?..."
|
|
bitfld.long 0x00 11. "ANTDIVREPEATDIS,Antenna diversity repeat disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "ANTDIVMODE,Antenna Diversity mode" "0: Antenna 0 (ANT0=1 ANT1=0) is used,1: Antenna 1 (ANT0=0 ANT1=1) is used,2: Select-First algorithm,3: Select-Best algorithm based on correlation..,4: Select-Best algorithm based on RSSI value,?..."
|
|
bitfld.long 0x00 0. "PRSDINEN,DIN PRS enable" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CTRL4,No Description"
|
|
bitfld.long 0x00 29. "OFFSETPHASESCALING,Offset phase scaling" "0,1"
|
|
bitfld.long 0x00 28. "OFFSETPHASEMASKING,Offset phase masking" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26.--27. "ADCSATDENS,ADC Saturation Density setting" "0,1,2,3"
|
|
bitfld.long 0x00 23.--25. "ADCSATLEVEL,ADC Saturation Level setting" "0: AGC enters fast loop after first saturation..,1: 2 saturation samples required before AGC..,2: 4 saturation samples required before AGC..,3: 8 saturation samples required before AGC..,4: 16 saturation samples required before AGC..,5: 32 saturation samples required before AGC..,6: 64 saturation samples required before AGC..,?..."
|
|
newline
|
|
bitfld.long 0x00 22. "SOFTDSSSMODE,Soft DSSS mode" "0: Soft value is inverted value of symbol-0..,1: Soft value is difference between correlation.."
|
|
hexmask.long.byte 0x00 15.--21. 1. "PHASECLICKFILT,Phase click filter"
|
|
newline
|
|
bitfld.long 0x00 14. "PREDISTRST,Predistortion Reset" "0,1"
|
|
bitfld.long 0x00 13. "PREDISTAVG,Predistortion Average" "0: Average over 8 samples,1: Average over 16 samples"
|
|
newline
|
|
bitfld.long 0x00 10.--12. "PREDISTDEB,Predistortion debounce" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 5.--9. "PREDISTGAIN,Predistortion gain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4. "DEVOFFCOMP,Deviation offset compensation" "0,1"
|
|
bitfld.long 0x00 0.--3. "ISICOMP,Inter Symbol Interference compensation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CTRL5,No Description"
|
|
bitfld.long 0x00 30. "RESYNCLIMIT,Resynchronization Limit" "0: Adjust timing if accumulated timing is..,1: Adjust timing if accumulated timing is non-zero"
|
|
bitfld.long 0x00 29. "RESYNCBAUDTRANS,Resynchronization Baud Transitions" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20.--22. "DEMODRAWDATASEL2,Demod raw data select 2" "0: Disabled,?,2: 4-bit max_corr_index and 17-bit max_corr,3: 8-bit channel power and 4-bit BBSSMUX,4: 11-bit pre-filter correlation output for BLR..,5: 5-bit Narrow-band BLE FSM state 5-bit..,?..."
|
|
bitfld.long 0x00 10. "TREDGE,Timing resynchronization edge mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "TDEDGE,Timing detection edge mode" "0,1"
|
|
bitfld.long 0x00 6.--8. "DETDEL,Detection delay" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "BRCALAVG,Baudrate calibration averaging" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "BRCALMODE,Baudrate calibration mode" "0: Measure period between peaks in demodulated..,1: Measure period between zero-crossings in..,2: Combine peak-period and zero-crossing periods,?..."
|
|
newline
|
|
bitfld.long 0x00 1. "BRCALEN,Baudrate calibration enable" "0,1"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CTRL6,No Description"
|
|
bitfld.long 0x00 30. "RXBRCALCDIS,RX Baudrate Calculation Disable" "0,1"
|
|
bitfld.long 0x00 25.--26. "CODINGB,Coding format" "0: Non Return to Zero,1: Manchester Coding,2: Direct Sequence Spread Spectrum,3: Line code"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "TXBR,No Description"
|
|
hexmask.long.byte 0x00 16.--23. 1. "TXBRDEN,Transmit baudrate denominator"
|
|
hexmask.long.word 0x00 0.--15. 1. "TXBRNUM,Transmit baudrate numerator"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "RXBR,No Description"
|
|
bitfld.long 0x00 10.--12. "RXBRINT,Receive baudrate integer" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 5.--9. "RXBRDEN,Receive baudrate denominator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 0.--4. "RXBRNUM,Receive baudrate numerator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "CF,No Description"
|
|
bitfld.long 0x00 26.--27. "DEC1GAIN,Second decimation filter gain" "0: No additional gain,1: 6 dB additional gain,2: 12 dB additional gain,?..."
|
|
bitfld.long 0x00 23.--25. "CFOSR,Center Frequency Oversampling Ratio" "0: Oversampling ratio = 7,1: Oversampling ratio = 8,2: Oversampling ratio = 12,3: Oversampling ratio = 16,4: Oversampling ratio = 32,5: Center frequency set to 0,?..."
|
|
newline
|
|
bitfld.long 0x00 17.--22. "DEC2,Third decimation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.word 0x00 3.--16. 1. "DEC1,Second decimation"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "DEC0,First decimation" "0: Decimation Factor 0 = 3,1: Decimation Factor 0 = 4,2: Decimation Factor 0 = 4,3: Decimation Factor 0 = 8,4: Decimation Factor 0 = 8,?..."
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PRE,No Description"
|
|
hexmask.long.word 0x00 16.--31. 1. "TXBASES,TX bases"
|
|
bitfld.long 0x00 12. "SYNCSYMB4FSK,Sync symbols 4FSK" "0: The syncword is 2FSK modulated,1: The syncword is 4FSK modulated"
|
|
newline
|
|
bitfld.long 0x00 11. "DSSSPRE,DSSS preamble" "0,1"
|
|
bitfld.long 0x00 7.--10. "PREERRORS,Preamble errors" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6. "PRESYMB4FSK,Preamble symbols 4-FSK" "0: Symbols corresponding to +/- 3dev,1: Symbols corresponding to +/- dev"
|
|
bitfld.long 0x00 4.--5. "BASEBITS,BASE bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "BASE,Preamble base" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "SYNC0,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SYNC0,Sync-word 0"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "SYNC1,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SYNC1,Sync word 1"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "TIMING,No Description"
|
|
bitfld.long 0x00 30.--31. "FASTRESYNC,Fast timing resynchronization" "0: Disabled,1: Allow fast resynchronization until preamble..,2: Allow fast resynchronization until frame is..,?..."
|
|
bitfld.long 0x00 29. "TSAGCDEL,Timing Search AGC delay" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25.--28. "OFFSUBDEN,Offset subperiod denominator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 21.--24. "OFFSUBNUM,Offset subperiod numerator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 18.--20. "FDM0THRESH,Frame Detection Mode 0 threshold" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 17. "TIMSEQSYNC,Timing sequence part of sync-word" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "TIMSEQINVEN,Timing sequence inversion enable" "0,1"
|
|
bitfld.long 0x00 12.--15. "ADDTIMSEQ,Additional timing sequences" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "TIMINGBASES,Timing bases" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 0.--7. 1. "TIMTHRESH,Timing threshold"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "DSSS0,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "DSSS0,DSSS symbol 0"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "MODINDEX,No Description"
|
|
bitfld.long 0x00 19.--21. "FREQGAINM,Frequency demodulation gain - mantissa" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--18. "FREQGAINE,Frequency demodulation gain - exponent" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 5.--9. "MODINDEXE,Modulation index exponent" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "MODINDEXM,Modulation index mantissa" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "AFC,No Description"
|
|
bitfld.long 0x00 28. "AFCDELDET,Delay Detection state machine" "0,1"
|
|
bitfld.long 0x00 27. "AFCDSAFREQOFFEST,Consider frequency offset estimation" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26. "AFCENINTCOMP,Internal frequency offset compensation" "0,1"
|
|
bitfld.long 0x00 25. "AFCONESHOT,AFC One-Shot feature" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "AFCLIMRESET,Reset AFCADJRX value" "0,1"
|
|
bitfld.long 0x00 21.--23. "AFCAVGPER,AFC average period" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 16.--20. "AFCDEL,AFC delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 15. "AFCRXCLR,AFCRX clear mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13.--14. "AFCTXMODE,AFC TX mode" "0: Disabled,1: AFCADJTX loaded from AFCADJRX when preamble..,2: AFCADJTX loaded from AFCADJRX when frame is..,?..."
|
|
bitfld.long 0x00 10.--12. "AFCRXMODE,AFC RX mode" "0: Disabled,1: Free running,2: Free running,3: AFCADJRX locked when timing is detected,4: AFCADJRX locked when preamble is detected,5: AFCADJRX locked when frame is detected,6: AFCADJRX not updated before preamble is..,?..."
|
|
newline
|
|
bitfld.long 0x00 5.--8. "AFCSCALEE,AFC scaling exponent" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--4. "AFCSCALEM,AFC scaling mantissa" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "AFCADJLIM,No Description"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "AFCADJLIM,AFC adjustment limit"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "SHAPING0,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "COEFF3,Shaping Coefficient 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. "COEFF2,Shaping Coefficient 2"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "COEFF1,Shaping Coefficient 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "COEFF0,Shaping Coefficient 0"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "SHAPING1,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "COEFF7,Shaping Coefficient 7"
|
|
hexmask.long.byte 0x00 16.--23. 1. "COEFF6,Shaping Coefficient 6"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "COEFF5,Shaping Coefficient 5"
|
|
hexmask.long.byte 0x00 0.--7. 1. "COEFF4,Shaping Coefficient 4"
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "SHAPING2,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "COEFF11,Shaping Coefficient 11"
|
|
hexmask.long.byte 0x00 16.--23. 1. "COEFF10,Shaping Coefficient 10"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "COEFF9,Shaping Coefficient 9"
|
|
hexmask.long.byte 0x00 0.--7. 1. "COEFF8,Shaping Coefficient 8"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "SHAPING3,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "COEFF15,Shaping Coefficient 15"
|
|
hexmask.long.byte 0x00 16.--23. 1. "COEFF14,Shaping Coefficient 14"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "COEFF13,Shaping Coefficient 13"
|
|
hexmask.long.byte 0x00 0.--7. 1. "COEFF12,Shaping Coefficient 12"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "SHAPING4,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "COEFF19,Shaping Coefficient 19"
|
|
hexmask.long.byte 0x00 16.--23. 1. "COEFF18,Shaping Coefficient 18"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "COEFF17,Shaping Coefficient 17"
|
|
hexmask.long.byte 0x00 0.--7. 1. "COEFF16,Shaping Coefficient 16"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "SHAPING5,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "COEFF23,Shaping Coefficient 23"
|
|
hexmask.long.byte 0x00 16.--23. 1. "COEFF22,Shaping Coefficient 22"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "COEFF21,Shaping Coefficient 21"
|
|
hexmask.long.byte 0x00 0.--7. 1. "COEFF20,Shaping Coefficient 20"
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "SHAPING6,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "COEFF27,Shaping Coefficient 27"
|
|
hexmask.long.byte 0x00 16.--23. 1. "COEFF26,Shaping Coefficient 26"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "COEFF25,Shaping Coefficient 25"
|
|
hexmask.long.byte 0x00 0.--7. 1. "COEFF24,Shaping Coefficient 24"
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "SHAPING7,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "COEFF31,Shaping Coefficient 31"
|
|
hexmask.long.byte 0x00 16.--23. 1. "COEFF30,Shaping Coefficient 30"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "COEFF29,Shaping Coefficient 29"
|
|
hexmask.long.byte 0x00 0.--7. 1. "COEFF28,Shaping Coefficient 28"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "SHAPING8,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "COEFF35,Shaping Coefficient 35"
|
|
hexmask.long.byte 0x00 16.--23. 1. "COEFF34,Shaping Coefficient 34"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "COEFF33,Shaping Coefficient 33"
|
|
hexmask.long.byte 0x00 0.--7. 1. "COEFF32,Shaping Coefficient 32"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "SHAPING9,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "COEFF39,Shaping Coefficient 39"
|
|
hexmask.long.byte 0x00 16.--23. 1. "COEFF38,Shaping Coefficient 38"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "COEFF37,Shaping Coefficient 37"
|
|
hexmask.long.byte 0x00 0.--7. 1. "COEFF36,Shaping Coefficient 36"
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "SHAPING10,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "COEFF43,Shaping Coefficient 43"
|
|
hexmask.long.byte 0x00 16.--23. 1. "COEFF42,Shaping Coefficient 42"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "COEFF41,Shaping Coefficient 41"
|
|
hexmask.long.byte 0x00 0.--7. 1. "COEFF40,Shaping Coefficient 40"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "SHAPING11,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "COEFF47,Shaping Coefficient 47"
|
|
hexmask.long.byte 0x00 16.--23. 1. "COEFF46,Shaping Coefficient 46"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "COEFF45,Shaping Coefficient 45"
|
|
hexmask.long.byte 0x00 0.--7. 1. "COEFF44,Shaping Coefficient 44"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "RAMPCTRL,No Description"
|
|
bitfld.long 0x00 8.--11. "RAMPRATE2,Ramp rate 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "RAMPRATE1,Ramp rate 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "RAMPRATE0,Ramp rate 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "RAMPLEV,No Description"
|
|
hexmask.long.byte 0x00 16.--23. 1. "RAMPLEV2,Ramp level 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. "RAMPLEV1,Ramp level 1"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "RAMPLEV0,Ramp level 0"
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "DCCOMP,No Description"
|
|
bitfld.long 0x00 7.--8. "DCLIMIT,DC offset limit" "0: FULLSCALE,1: FULLSCALEBY4,2: FULLSCALEBY8,3: FULLSCALEBY16"
|
|
bitfld.long 0x00 4.--6. "DCCOMPGEAR,DC Offset Compensation Filter Gear" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3. "DCCOMPFREEZE,DC Offset Compensation Filter Freeze" "0,1"
|
|
bitfld.long 0x00 2. "DCRSTEN,DC Compensation Filter Reset Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "DCCOMPEN,DC Offset Compensation Enable" "0,1"
|
|
bitfld.long 0x00 0. "DCESTIEN,DC Offset Estimation Enable" "0,1"
|
|
group.long 0xE4++0x03
|
|
line.long 0x00 "DCCOMPFILTINIT,No Description"
|
|
bitfld.long 0x00 30. "DCCOMPINIT,Initialize filter state" "0,1"
|
|
hexmask.long.word 0x00 15.--29. 1. "DCCOMPINITVALQ,Q-channel initialization value"
|
|
newline
|
|
hexmask.long.word 0x00 0.--14. 1. "DCCOMPINITVALI,I-channel initialization value"
|
|
rgroup.long 0xE8++0x03
|
|
line.long 0x00 "DCESTI,No Description"
|
|
hexmask.long.word 0x00 15.--29. 1. "DCCOMPESTIVALQ,Q-channel DC-Offset Estimated value"
|
|
hexmask.long.word 0x00 0.--14. 1. "DCCOMPESTIVALI,I-channel DC-Offset Estimated value"
|
|
group.long 0xEC++0x03
|
|
line.long 0x00 "SRCCHF,No Description"
|
|
bitfld.long 0x00 31. "INTOSR,Forcing Integer OSR" "0,1"
|
|
bitfld.long 0x00 29.--30. "BWSEL,Channel filter bandwidth" "0: wide bandwidth selected BW =..,1: wide bandwidth selected BW =..,2: narrow bandwidth selected BW =..,3: narrow bandwidth selected BW =.."
|
|
newline
|
|
bitfld.long 0x00 27. "SRCENABLE2,SRC2 enable" "0,1"
|
|
hexmask.long.word 0x00 12.--26. 1. "SRCRATIO2,Q-channel SRC ratio"
|
|
newline
|
|
bitfld.long 0x00 11. "SRCENABLE1,SRC1 enable" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SRCRATIO1,I-channel SRC ratio"
|
|
group.long 0xF4++0x03
|
|
line.long 0x00 "DSATHD0,No Description"
|
|
hexmask.long.word 0x00 20.--31. 1. "FDEVMAXTHD,Frequency deviation maximum threshold"
|
|
bitfld.long 0x00 14.--19. "FDEVMINTHD,Frequency deviation minimum threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "UNMODTHD,Unmodulated carrier detector threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SPIKETHD,Spike threshold"
|
|
group.long 0xF8++0x03
|
|
line.long 0x00 "DSATHD1,No Description"
|
|
bitfld.long 0x00 30. "FREQSCALE,Frequency scale factor" "0,1"
|
|
bitfld.long 0x00 29. "PWRDETDIS,Power detection disabled" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "AMPFLTBYP,Amplitude filter bypass" "0,1"
|
|
bitfld.long 0x00 27. "PWRFLTBYP,Power filter bypass" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25.--26. "FREQLATDLY,Frequency late delay" "0,1,2,3"
|
|
bitfld.long 0x00 21.--24. "RSSIJMPTHD,RSSI jump detector threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 18.--20. "DSARSTCNT,DSA reset counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--17. "POWRELTHD,Relative power detector threshold" "0: Threshold is 6dB,1: Threshold is 9dB,2: Threshold is 12dB,3: Threshold is 15dB"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "POWABSTHD,Power absolute threshold"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "DSACTRL,No Description"
|
|
bitfld.long 0x00 28.--31. "AMPJUPTHD,Amplitude jump detection thrshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 27. "AGCBAUDEN,Consider Baud_en from AGC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26. "RESTORE,Power detector reset of DSA" "0,1"
|
|
bitfld.long 0x00 23.--25. "LOWDUTY,Low duty cycle delay" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 21.--22. "GAINREDUCDLY,Detection Delay of AGC gain reduction" "0,1,2,3"
|
|
bitfld.long 0x00 19. "DSARSTON,DSA detection reset" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "TRANRSTDSA,power transient detector Reset DSA" "0,1"
|
|
bitfld.long 0x00 17. "FREQAVGSYM,DSA frequency estimation averaging" "0: Frequency estimation over 2 symbol periods,1: Frequency estimation over 4 symbol periods"
|
|
newline
|
|
bitfld.long 0x00 16. "SCHPRD,Search period window length" "0: The search period is 2 symbol periods,1: The search period is 4 symbol periods"
|
|
bitfld.long 0x00 11.--15. "ARRTOLERTHD1,Arrival tolerance threshold 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 6.--10. "ARRTOLERTHD0,Arrival tolerance threshold 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 2.--5. "ARRTHD,Signal arrival valid counter threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "DSAMODE,Mode of Digital Signal Arrival detector" "0: DSA is disabled,1: DSA is enabled by the relative/absolute RSSI..,?..."
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "VITERBIDEMOD,No Description"
|
|
bitfld.long 0x00 31. "DISDEMODOF,Disable Demod Over Flow Detection" "0,1"
|
|
bitfld.long 0x00 27.--30. "CORRSTPSIZE,Correction step size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 23.--26. "CORRCYCLE,Correction cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 22. "SYNTHAFC,Synthesizer AFC in Viterbi demod" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--21. "VITERBIKSI3,VITERBI KSI3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.byte 0x00 9.--15. 1. "VITERBIKSI2,VITERBI KSI2"
|
|
newline
|
|
hexmask.long.byte 0x00 2.--8. 1. "VITERBIKSI1,VITERBI KSI1"
|
|
bitfld.long 0x00 1. "HARDDECISION,Hard decision" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "VTDEMODEN,Viterbi demodulator enable" "0,1"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "VTCORRCFG0,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "EXPECTPATT,Expected pattern"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "DIGMIXCTRL,No Description"
|
|
bitfld.long 0x00 22. "DIGMIXFB,Digital mixer Frequency Correction" "0,1"
|
|
bitfld.long 0x00 21. "MIXERCONJ,Digital mixer input conjugate" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "DIGMIXMODE,Digital mixer frequency control" "0: Mixer frequency specified by CFOSR,1: Mixer frequency specified by DIGMIXFREQ"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. "DIGMIXFREQ,Digital mixer frequency control word"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "VTCORRCFG1,No Description"
|
|
bitfld.long 0x00 27.--30. "EXPECTHT,Expected patterns head and tail" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 23.--26. "BUFFHEAD,Buffer header" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.byte 0x00 15.--22. 1. "EXPSYNCLEN,Expected sync length"
|
|
hexmask.long.word 0x00 6.--14. 1. "VTFRQLIM,Viterbi frequency limiter"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "CORRSHFTLEN,Correlator shift length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "VTTRACK,No Description"
|
|
bitfld.long 0x00 30.--31. "SYNCTIMEOUTSEL,SYNC-WORD DET TIMEOUT" "0,1,2,3"
|
|
hexmask.long.byte 0x00 22.--29. 1. "HIPWRTHD,High Power detection threshold"
|
|
newline
|
|
bitfld.long 0x00 18.--21. "FREQBIAS,Frequency estimation bias" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--17. "TIMGEAR,Timing Gear" "0: Execute timing tracking regardless of..,1: Execute timing tracking only when correlation..,2: Execute timing tracking only when correlation..,?..."
|
|
newline
|
|
bitfld.long 0x00 15. "TIMEOUTMODE,Timeout mode" "0,1"
|
|
bitfld.long 0x00 14. "TIMCHK,Time check" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x00 6.--13. 1. "TIMEACQUTHD,Time acquisition threshold"
|
|
bitfld.long 0x00 2.--5. "TIMTRACKTHD,Timing tracking threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "FREQTRACKMODE,Frequency tracking mode" "0: Frequency tracking disabled,1: Frequency tracking enabled with one..,2: Frequency tracking enabled with one..,3: Frequency tracking enabled with one.."
|
|
rgroup.long 0x118++0x03
|
|
line.long 0x00 "BREST,No Description"
|
|
bitfld.long 0x00 6.--10. "BRESTNUM,Fractional part of estimated baudrate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--5. "BRESTINT,Integer part of estimated baudrate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "AUTOCG,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "AUTOCGEN,Enable automatic clock gating"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "CGCLKSTOP,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "FORCEOFF,Manual control clocks"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "DSATHD2,No Description"
|
|
bitfld.long 0x00 30. "PMDETFORCE,Force DSA preamble detector" "0,1"
|
|
bitfld.long 0x00 25.--29. "INTERFERDET,Interference detection threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 20.--24. "FREQESTTHD,Frequency Estimation Timeout Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--19. "PMDETPASSTHD,DSA Preamble detection counter threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--15. "FDADJTHD,Frequency deviation ripple threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 9. "JUMPDETEN,Power jump detection enable" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "POWABSTHDLOG,Power threshold in logarithm-scale"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "DIRECTMODE,No Description"
|
|
bitfld.long 0x00 8.--12. "CLKWIDTH,Synchronous mode clock pulse width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 2.--3. "SYNCPREAM,Synchronous mode preamble" "0: No preamble bits appended,1: 8 preamble bits appended,2: 16 preamble bits appended,3: 32 preamble bits appended"
|
|
newline
|
|
bitfld.long 0x00 1. "SYNCASYNC,Choose Synchronous or Asynchronous mode" "0,1"
|
|
bitfld.long 0x00 0. "DMENABLE,Enable Direct Mode" "0,1"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "LONGRANGE,No Description"
|
|
bitfld.long 0x00 28.--30. "LRDEC,DEC value" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 27. "LRBLEDSA,DSA enable" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 16.--26. 1. "LRTIMCORRTHD,Correlator threshold"
|
|
bitfld.long 0x00 15. "LRBLE,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11.--14. "LRCORRSCHWIN,Window size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--10. 1. "LRCORRTHD,Correlator threshold"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "LONGRANGE1,No Description"
|
|
bitfld.long 0x00 29. "LOGICBASEDLRDEMODGATE,Logic Based Long Range Demod Gating" "0,1"
|
|
bitfld.long 0x00 28. "LOGICBASEDPUGATE,Logic Based Phase Unwrap Gating" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24.--27. "LRSPIKETHADD,Long Range DSA spike threshold addition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 21.--23. "AVGWIN,Average window" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 18.--20. "HYSVAL,Hysteresis Value for BBSS" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--17. "CHPWRACCUDEL,Channel Power Accumulated Delay" "0: Use accumulated channel power value,1: Delayed by 32 chips,2: Delayed by 64 chips,?..."
|
|
newline
|
|
hexmask.long.word 0x00 4.--14. 1. "LRTIMEOUTTHD,Long Range Time Out Threshold"
|
|
bitfld.long 0x00 0.--3. "LRSS,Long Range Signal Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "LONGRANGE2,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "LRCHPWRTH4,Long Range channel power threshold"
|
|
hexmask.long.byte 0x00 16.--23. 1. "LRCHPWRTH3,Long Range channel power threshold"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "LRCHPWRTH2,Long Range channel power threshold"
|
|
hexmask.long.byte 0x00 0.--7. 1. "LRCHPWRTH1,Long Range channel power threshold"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "LONGRANGE3,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "LRCHPWRTH8,Long Range channel power threshold"
|
|
hexmask.long.byte 0x00 16.--23. 1. "LRCHPWRTH7,Long Range channel power threshold"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "LRCHPWRTH6,Long Range channel power threshold"
|
|
hexmask.long.byte 0x00 0.--7. 1. "LRCHPWRTH5,Long Range channel power threshold"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "LONGRANGE4,No Description"
|
|
bitfld.long 0x00 28.--31. "LRCHPWRSH4,Long Range channel power shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "LRCHPWRSH3,Long Range channel power shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 20.--23. "LRCHPWRSH2,Long Range channel power shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "LRCHPWRSH1,Long Range channel power shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "LRCHPWRTH10,Long Range channel power threshold"
|
|
hexmask.long.byte 0x00 0.--7. 1. "LRCHPWRTH9,Long Range channel power threshold"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "LONGRANGE5,No Description"
|
|
bitfld.long 0x00 24.--27. "LRCHPWRSH11,Long Range channel power shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. "LRCHPWRSH10,Long Range channel power shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "LRCHPWRSH9,Long Range channel power shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. "LRCHPWRSH8,Long Range channel power shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "LRCHPWRSH7,Long Range channel power shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "LRCHPWRSH6,Long Range channel power shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "LRCHPWRSH5,Long Range channel power shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "LONGRANGE6,No Description"
|
|
bitfld.long 0x00 28.--31. "LRCHPWRSH12,Long Range channel power shift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 20.--27. 1. "LRCHPWRTH11,Long Range channel power threshold"
|
|
newline
|
|
hexmask.long.word 0x00 8.--18. 1. "LRSPIKETHD,Long Range spike threshold"
|
|
hexmask.long.byte 0x00 0.--7. 1. "LRCHPWRSPIKETH,Long Range channel power spike threshold"
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "LRFRC,No Description"
|
|
bitfld.long 0x00 8. "LRCORRMODE,LR Correlator operation Mode" "0,1"
|
|
bitfld.long 0x00 2.--7. "FRCACKTIMETHD,FRC acknowledge timeout threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "CI500,Long Range CI mapping for 500kbps" "0,1,2,3"
|
|
group.long 0x168++0x03
|
|
line.long 0x00 "DSATHD3,No Description"
|
|
hexmask.long.word 0x00 20.--31. 1. "FDEVMAXTHDLO,Frequency deviation maximum threshold"
|
|
bitfld.long 0x00 14.--19. "FDEVMINTHDLO,Frequency deviation minimum threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "UNMODTHDLO,Unmodulated carrier detector threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SPIKETHDLO,Spike threshold"
|
|
group.long 0x16C++0x03
|
|
line.long 0x00 "DSATHD4,No Description"
|
|
bitfld.long 0x00 26. "SWTHD,Enable switch threshold for low power" "0,1"
|
|
bitfld.long 0x00 21.--25. "ARRTOLERTHD1LO,Arrival tolerance threshold 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 16.--20. "ARRTOLERTHD0LO,Arrival tolerance threshold 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 0.--15. 1. "POWABSTHDLO,Power absolute threshold for low power"
|
|
group.long 0x170++0x03
|
|
line.long 0x00 "VTBLETIMING,No Description"
|
|
bitfld.long 0x00 12.--15. "FLENOFF,Timing Stamp Frame Length Offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 4.--11. 1. "TIMINGDELAY,Viterbi BLE Delay timer"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "VTBLETIMINGSEL,Viterbi BLE timing stamp selection" "0: Delayed frame detection will be used as..,1: The end of frame detection from Narrow..,2: The end of frame detection from Narrow..,3: For testing only"
|
|
group.long 0x208++0x03
|
|
line.long 0x00 "IF,No Description"
|
|
bitfld.long 0x00 18. "CFGANTPATTRD,cfg" "0,1"
|
|
bitfld.long 0x00 17. "ETS,Early Time Stamp detect" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "FRCTIMOUT,DEMOD-FRC req/ack timeout" "0,1"
|
|
bitfld.long 0x00 15. "RXTIMNF,Timing not found" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "RXFRAMEDETOF,Frame detection overflow" "0,1"
|
|
bitfld.long 0x00 13. "RXPRELOST,Preamble lost" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "RXTIMLOST,Timing lost" "0,1"
|
|
bitfld.long 0x00 11. "RXFRAMEDET1,Frame with sync-word 1 detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "RXFRAMEDET0,Frame with sync-word 0 detected" "0,1"
|
|
bitfld.long 0x00 9. "RXPREDET,Preamble detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "RXTIMDET,Timing detected" "0,1"
|
|
bitfld.long 0x00 7. "PHYCODEDET,CONCURRENT CODED PHY DET" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "PHYUNCODEDET,CONCURRENT UNCODED PHY DET" "0,1"
|
|
bitfld.long 0x00 5. "PHDSADET,PHASE DSA DETECT" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "LDTNOARR,No signal Detected in LDT" "0,1"
|
|
bitfld.long 0x00 3. "TXRAMPDONE,Mod ramper idle" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TXPRESENT,Preamble sent" "0,1"
|
|
bitfld.long 0x00 1. "TXSYNCSENT,Sync word sent" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXFRAMESENT,Frame sent" "0,1"
|
|
group.long 0x20C++0x03
|
|
line.long 0x00 "IEN,No Description"
|
|
bitfld.long 0x00 18. "CFGANTPATTRD,CFGANTPATTRD" "0,1"
|
|
bitfld.long 0x00 17. "ETS,Early Time Stamp detect" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "FRCTIMOUT,DEMOD-FRC req/ack timeout" "0,1"
|
|
bitfld.long 0x00 15. "RXTIMNF,Timing not found" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "RXFRAMEDETOF,Frame detection overflow" "0,1"
|
|
bitfld.long 0x00 13. "RXPRELOST,Preamble lost" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "RXTIMLOST,Timing lost" "0,1"
|
|
bitfld.long 0x00 11. "RXFRAMEDET1,Frame with sync-word 1 detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "RXFRAMEDET0,Frame with sync-word 0 detected" "0,1"
|
|
bitfld.long 0x00 9. "RXPREDET,Preamble detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "RXTIMDET,Timing detected" "0,1"
|
|
bitfld.long 0x00 7. "PHYCODEDET,CONCURRENT CODED PHY DET" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "PHYUNCODEDET,CONCURRENT UNCODED PHY DET" "0,1"
|
|
bitfld.long 0x00 5. "PHDSADET,PHASE DSA DETECT" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "LDTNOARR,No signal Detected in LDT" "0,1"
|
|
bitfld.long 0x00 3. "TXRAMPDONE,Mod ramper idle" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TXPRESENT,Preamble sent" "0,1"
|
|
bitfld.long 0x00 1. "TXSYNCSENT,Sync word sent" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXFRAMESENT,Frame sent" "0,1"
|
|
wgroup.long 0x218++0x03
|
|
line.long 0x00 "CMD,No Description"
|
|
bitfld.long 0x00 5. "AFCRXCLEAR,Clear AFC RX compensation" "0,1"
|
|
bitfld.long 0x00 4. "AFCTXCLEAR,Clear AFC TX compensation" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "AFCTXLOCK,Lock AFC TX compensation" "0,1"
|
|
bitfld.long 0x00 0. "PRESTOP,Preamble stop" "0,1"
|
|
rgroup.long 0x21C++0x03
|
|
line.long 0x00 "FSMSTATUS,No Description"
|
|
bitfld.long 0x00 20.--23. "ANTDIVSTATE,Antenna diversity control state" "0: Idle state,1: First ANT0 selection,2: First ANT1 selection,3: Timing search on ANT0,4: Timing search on ANT1,5: Check ANT1 after timing detecton ANT0,6: Check ANT0 after timing detecton ANT1,7: Evaluate and select better antenna,8: Searching on better antenna,9: Selected better antenna,10: REPEAT_ANT0,11: REPEAT_ANT1,?,?,?,15: Manual mode"
|
|
bitfld.long 0x00 15.--19. "NBBLESTATE,Demodulator Narrow-band BLE FSM state" "0: IDLE state,1: VTINITI,2: ADDR_NXT,3: INI_COST,4: CALC_COST,5: INITAL_ACQU,6: INITAL_COST_CALC,7: MIN_COST_CALC,8: FREQ_ACQU,9: FREQ_ACQU_DONE,10: TIMING_ACQU_EARLY,11: TIMING_ACQU_CURR,12: TIMING_ACQU_LATE,13: TIMING_ACQU_DONE,14: VIRTBI_INIT0,15: VIRTBI_INIT1,16: VIRTBI_RXSYNC,17: VIRTBI_RXPAYLOAD,18: HARD_RXSYNC,19: HARD_RXPAYLOAD,20: TRACK_FREQ,21: TRACK_TIM_EARLY,22: TRACK_TIM_CURR,23: TRACK_TIM_LATE,24: TRACK_DONE,25: TRACK_DECISION,26: STOP,27: WAIT_ACK,28: DEBUG,?..."
|
|
newline
|
|
bitfld.long 0x00 10.--14. "LRBLESTATE,Demodulator long-range BLE FSM state" "0: IDLE state,1: CLEANUP,2: CORRCOE,3: WAIT_LR_DSA,4: MAXCORR,5: WAIT_RDY,6: FEC1_DATA,7: FEC1_ACK,8: PAUSE,9: FEC2_DATA,10: FEC2_ACK,11: TRACK_CUR,12: TRACK_EAR,13: TRACK_LAT,14: TRACK_DONE,15: T_DECISION,16: STOP,?..."
|
|
bitfld.long 0x00 7.--9. "DSASTATE,Demodulator DSA FSM state" "0: IDLE state,1: Arrival Check,2: Status Check,3: SAMP_PW,4: WAIT_PWRUP,5: WAIT_DSALO,6: WAIT_ABORT,7: STOP"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--6. 1. "DETSTATE,Detection FSM state"
|
|
rgroup.long 0x220++0x03
|
|
line.long 0x00 "STATUS2,No Description"
|
|
hexmask.long.word 0x00 18.--31. 1. "RTVTCORR,VT demod Correlation"
|
|
bitfld.long 0x00 15. "CODEDPHY,CODED PHY DET" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "UNCODEDPHY,UNCODED PHY DET" "0,1"
|
|
bitfld.long 0x00 12.--13. "LRBLECI,RXed packet's LR BLE coding indicator" "0: FEC block 2 coded using C=8 125kbps,1: FEC block 2 coded using C=2 500kbps,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--11. "BBSSMUX,Actual Baseband Signal Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 0.--7. 1. "CHPWRACCUMUX,Channel power"
|
|
rgroup.long 0x224++0x03
|
|
line.long 0x00 "STATUS3,No Description"
|
|
bitfld.long 0x00 26. "SYNCSECPEAKABTH,SYNC second peak above threshold" "0,1"
|
|
bitfld.long 0x00 24. "LRDSADET,DSA prefilter above LRSPIKETHD" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "LRDSALIVE,BLRDSA Prefilter above LRSPIKETHD" "0,1"
|
|
hexmask.long.word 0x00 11.--21. 1. "BBPFOUTABS,Pre-filter Correlation Output for BLR"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "BBPFOUTABS1,Pre-filter Correlation Output"
|
|
group.long 0x228++0x03
|
|
line.long 0x00 "IRCAL,No Description"
|
|
bitfld.long 0x00 15. "IRCALIFADCDBG,IRCAL IFADC DBG" "0,1"
|
|
bitfld.long 0x00 14. "IRCALCOEFRSTCMD,IRCAL coef reset cmd" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "IRCORREN,IR Correction enable bit" "0,1"
|
|
bitfld.long 0x00 7.--12. "MUISHF,MUI shift value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 1.--5. "MURSHF,MUR shift value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0. "IRCALEN,IRCAL enable bit" "0,1"
|
|
rgroup.long 0x22C++0x03
|
|
line.long 0x00 "IRCALCOEF,No Description"
|
|
hexmask.long.word 0x00 16.--30. 1. "CIV,CIV coefficient"
|
|
hexmask.long.word 0x00 0.--14. 1. "CRV,CRV coefficient"
|
|
group.long 0x230++0x03
|
|
line.long 0x00 "BLEIQDSA,No Description"
|
|
hexmask.long.word 0x00 18.--31. 1. "BLEIQDSADIFFTH1,BLEIQDSA BLEIQDSADIFFTH1"
|
|
bitfld.long 0x00 15.--17. "BLEIQDSAIIRCOEFPWR,BLEIQDSA IIRCOEFPWR" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.word 0x00 1.--14. 1. "BLEIQDSATH,BLEIQDSA Threshold"
|
|
bitfld.long 0x00 0. "BLEIQDSAEN,BLEIQDSA Enable" "0,1"
|
|
group.long 0x234++0x03
|
|
line.long 0x00 "BLEIQDSAEXT1,No Description"
|
|
bitfld.long 0x00 29. "IIRRST,IIR Reset" "0,1"
|
|
bitfld.long 0x00 25.--28. "MAXCORRCNTIQDSA,Max Corr Cnt IQDSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.word 0x00 11.--24. 1. "BLEIQDSATHCOMB,Threshold when i and q are added"
|
|
bitfld.long 0x00 7.--10. "BLEIQDSAADDRBIAS,BLEIQDSA ADDRBIAS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 5.--6. "CORRIIRAVGMULFACT,Corr IIR Avg Multiplication Factor" "0,1,2,3"
|
|
bitfld.long 0x00 3.--4. "CHPWRFIRAVGVAL,Channel Power FIR Avg Value" "0: No Avg,1: 2 sample avg,2: 4 sample avg,3: 8 sample avg"
|
|
newline
|
|
bitfld.long 0x00 2. "CHPWRFIRAVGEN,Channel Power FIR Avg Enable" "0,1"
|
|
bitfld.long 0x00 0.--1. "FREQSCALEIQDSA,I/Q DSA Frequency scale" "0,1,2,3"
|
|
group.long 0x238++0x03
|
|
line.long 0x00 "SYNCPROPERTIES,No Description"
|
|
hexmask.long.byte 0x00 1.--7. 1. "SYNCSECPEAKTH,SYNC auto corr second peak threshold"
|
|
bitfld.long 0x00 0. "SYNCCORRCLR,Sync auto corr clear bit" "0,1"
|
|
group.long 0x23C++0x03
|
|
line.long 0x00 "DIGIGAINCTRL,No Description"
|
|
bitfld.long 0x00 8. "DEC0GAIN,DEC0 Gain Select" "0,1"
|
|
bitfld.long 0x00 7. "DIGIGAINHALF,Digital Gain Halved" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "DIGIGAINDOUBLE,Digital Gain Doubled" "0,1"
|
|
bitfld.long 0x00 1.--5. "DIGIGAINSEL,Digital Gain Select" "0: GAINM3,1: GAINM2P75,2: GAINM2P5,3: GAINM2P25,4: GAINM2,5: GAINM1P75,6: GAINM1P5,7: GAINM1P25,8: GAINM1,9: GAINM0P75,10: GAINM0P5,11: GAINM0P25,12: GAINM0,13: GAINP0P25,14: GAINP0P5,15: GAINP0P75,16: GAINP1,17: GAINP1P25,18: GAINP1P5,19: GAINP1P75,20: GAINP2,21: GAINP2P25,22: GAINP2P5,23: GAINP2P75,24: GAINP3,?..."
|
|
newline
|
|
bitfld.long 0x00 0. "DIGIGAINEN,Digital Gain Enable" "0,1"
|
|
group.long 0x240++0x03
|
|
line.long 0x00 "PRSCTRL,No Description"
|
|
bitfld.long 0x00 16.--17. "ANT1SEL," "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. "ANT0SEL," "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 12.--13. "LOWCORRSEL," "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "PRESENTSEL," "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "SYNCSENTSEL," "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. "WEAKSEL," "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "NEWWNDSEL," "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. "ADVANCESEL," "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "POSTPONESEL," "0,1,2,3"
|
|
group.long 0x248++0x03
|
|
line.long 0x00 "REALTIMCFE,No Description"
|
|
bitfld.long 0x00 31. "RTCFEEN,Trecs Enable" "0,1"
|
|
bitfld.long 0x00 30. "VTAFCFRAME,Viterbi AFC FRAME Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "SINEWEN,Enable SINE WEIGHT" "0,1"
|
|
bitfld.long 0x00 18.--20. "SYNCACQWIN,SYNC Correlator Size" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "TRACKINGWIN,Correlator size for Tracking" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 14. "RTSCHMODE,Real Time CFE searching mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10.--13. "RTSCHWIN,Real time CFE searching window" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--9. 1. "MINCOSTTHD,Min"
|
|
group.long 0x24C++0x03
|
|
line.long 0x00 "SEQIF,No Description"
|
|
bitfld.long 0x00 18. "CFGANTPATTRD,CFGANTPATTRD" "0,1"
|
|
bitfld.long 0x00 17. "ETS,Early timestamp" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "FRCTIMOUT,DEMOD-FRC req/ack timeout" "0,1"
|
|
bitfld.long 0x00 15. "RXTIMNF,Timing not found" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "RXFRAMEDETOF,Frame detection overflow" "0,1"
|
|
bitfld.long 0x00 13. "RXPRELOST,Preamble lost" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "RXTIMLOST,Timing lost" "0,1"
|
|
bitfld.long 0x00 11. "RXFRAMEDET1,Frame with sync-word 1 detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "RXFRAMEDET0,Frame with sync-word 0 detected" "0,1"
|
|
bitfld.long 0x00 9. "RXPREDET,Preamble detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "RXTIMDET,Timing detected" "0,1"
|
|
bitfld.long 0x00 7. "PHYCODEDET,CONCURRENT CODED PHY DET" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "PHYUNCODEDET,CONCURRENT UNCODED PHY DET" "0,1"
|
|
bitfld.long 0x00 5. "PHDSADET,PHASE DSA DETECT" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "LDTNOARR,No signal Detected in LDT" "0,1"
|
|
bitfld.long 0x00 3. "TXRAMPDONE,Mod ramper idle" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TXPRESENT,Preamble sent" "0,1"
|
|
bitfld.long 0x00 1. "TXSYNCSENT,Sync word sent" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXFRAMESENT,Frame sent" "0,1"
|
|
group.long 0x250++0x03
|
|
line.long 0x00 "SEQIEN,No Description"
|
|
bitfld.long 0x00 18. "CFGANTPATTRD,CFGANTPATTRD" "0,1"
|
|
bitfld.long 0x00 17. "ETS,Early time stamp" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "FRCTIMOUT,DEMOD-FRC req/ack timeout" "0,1"
|
|
bitfld.long 0x00 15. "RXTIMNF,Timing not found" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "RXFRAMEDETOF,Frame detection overflow" "0,1"
|
|
bitfld.long 0x00 13. "RXPRELOST,Preamble lost" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "RXTIMLOST,Timing lost" "0,1"
|
|
bitfld.long 0x00 11. "RXFRAMEDET1,Frame with sync-word 1 detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "RXFRAMEDET0,Frame with sync-word 0 detected" "0,1"
|
|
bitfld.long 0x00 9. "RXPREDET,Preamble detected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "RXTIMDET,Timing detected" "0,1"
|
|
bitfld.long 0x00 7. "PHYCODEDET,CONCURRENT CODED PHY DET" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "PHYUNCODEDET,CONCURRENT UNCODED PHY DET" "0,1"
|
|
bitfld.long 0x00 5. "PHDSADET,PHASE DSA DETECT" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "LDTNOARR,No signal Detected in LDT" "0,1"
|
|
bitfld.long 0x00 3. "TXRAMPDONE,Mod ramper idle" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TXPRESENT,Preamble sent" "0,1"
|
|
bitfld.long 0x00 1. "TXSYNCSENT,Sync word sent" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXFRAMESENT,Frame sent" "0,1"
|
|
group.long 0x254++0x03
|
|
line.long 0x00 "ETSCTRL,No Description"
|
|
hexmask.long.tbyte 0x00 12.--29. 1. "CAPTRIG,Trigger to capture"
|
|
bitfld.long 0x00 10. "CAPSIGONPRS,Capture Signal On PRS" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. "ETSLOC,Early Time Stamp Location"
|
|
group.long 0x258++0x03
|
|
line.long 0x00 "ANTSWCTRL,No Description"
|
|
hexmask.long.byte 0x00 17.--24. 1. "EXTDSTOPPULSECNT,Extend Stop Pulse Counter"
|
|
bitfld.long 0x00 16. "ANTSWENABLE,Ant sw enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "CFGANTPATTEN,Configure Ant Pattern Enable" "0,1"
|
|
bitfld.long 0x00 14. "ANTSWRST,Ant SW rst pulse" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12.--13. "ANTSWTYPE,Ant Switch Type" "0: 2us ant switching,1: 4us ant switching,2: 6us ant switching,3: 8us ant switching"
|
|
bitfld.long 0x00 6.--11. "ANTCOUNT,Total Ant count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "ANTDFLTSEL,Ant Default Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x25C++0x03
|
|
line.long 0x00 "ANTSWSTART,No Description"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "ANTSWSTARTTIM,Ant switch start time"
|
|
group.long 0x260++0x03
|
|
line.long 0x00 "ANTSWEND,No Description"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "ANTSWENDTIM,Ant switch start time"
|
|
group.long 0x264++0x03
|
|
line.long 0x00 "TRECPMPATT,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "PMEXPECTPATT,Expected PM pattern"
|
|
group.long 0x268++0x03
|
|
line.long 0x00 "TRECPMDET,No Description"
|
|
bitfld.long 0x00 31. "PREAMSCH,PM detection enable in Trecs" "0,1"
|
|
bitfld.long 0x00 25.--29. "COSTHYST,PM Seaching COST HYST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 23.--24. "VTPMDETSEL,Trecs PM Detection Thrshold" "0,1,2,3"
|
|
hexmask.long.word 0x00 14.--22. 1. "PMMINCOSTTHD,Min"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "PHSCALE,PHASE Scaler" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. "PMTIMEOUTSEL,PM searching timeout Threshold" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "PMCOSTVALTHD,Min COST Validation for AFC" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "PMACQUINGWIN,PM Correlator Size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x26C++0x03
|
|
line.long 0x00 "CFGANTPATT,No Description"
|
|
hexmask.long 0x00 0.--29. 1. "CFGANTPATTVAL,CFGANTPATTVAL"
|
|
group.long 0x270++0x03
|
|
line.long 0x00 "ETSTIM,No Description"
|
|
bitfld.long 0x00 17. "ETSCOUNTEREN,ETSCOUNTEREN" "0,1"
|
|
hexmask.long.tbyte 0x00 0.--16. 1. "ETSTIMVAL,ETSTIMVAL"
|
|
group.long 0x274++0x03
|
|
line.long 0x00 "ANTSWCTRL1,No Description"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "TIMEPERIOD,Time Period of xtal"
|
|
group.long 0x278++0x03
|
|
line.long 0x00 "COCURRMODE,No Description"
|
|
bitfld.long 0x00 31. "CONCURRENT,CONCURRENT MODE Enable" "0,1"
|
|
group.long 0x27C++0x03
|
|
line.long 0x00 "ANTDIVCTRL,No Description"
|
|
bitfld.long 0x00 8. "ENADPRETHRESH,Enable Preamble threshold" "0: Disable use of Preamble threshold after..,1: Enable use of Preamble threshold after timing.."
|
|
hexmask.long.byte 0x00 0.--7. 1. "ADPRETHRESH,Preamble threshold"
|
|
group.long 0x280++0x03
|
|
line.long 0x00 "BLEIQDSAEXT2,No Description"
|
|
bitfld.long 0x00 9.--10. "BBSSDIFFCHVAL,BBSS Diff Change Val" "0: Greater than 0,1: Greater than 1,2: Greater than 2,3: Greater than 3"
|
|
hexmask.long.byte 0x00 1.--8. 1. "BBSSDEBOUNCETIM,BBSS Debounce Time"
|
|
newline
|
|
bitfld.long 0x00 0. "DISMAXPEAKTRACKMODE,Disable Max Peak Track Mode" "0,1"
|
|
group.long 0x284++0x03
|
|
line.long 0x00 "SPARE,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SPARE,Spare register"
|
|
group.long 0x288++0x03
|
|
line.long 0x00 "IRCALCOEFWR,No Description"
|
|
bitfld.long 0x00 31. "CIVWEN,CIV Coefficient Write Enable" "0,1"
|
|
hexmask.long.word 0x00 16.--30. 1. "CIVWD,CIV coefficient"
|
|
newline
|
|
bitfld.long 0x00 15. "CRVWEN,CIV Coefficient Write Enable" "0,1"
|
|
hexmask.long.word 0x00 0.--14. 1. "CRVWD,CRV coefficient"
|
|
tree.end
|
|
tree.end
|
|
tree "MSC (Memory System Controller)"
|
|
base ad:0x0
|
|
tree "MSC_NS"
|
|
base ad:0x50030000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version ID"
|
|
group.long 0x8++0x7
|
|
line.long 0x0 "READCTRL,No Description"
|
|
bitfld.long 0x0 20.--21. "MODE,Read Mode" "0: Zero wait-states inserted in fetch or read..,1: One wait-state inserted for each fetch or read..,2: Two wait-states inserted for eatch fetch or read..,3: Three wait-states inserted for eatch fetch or.."
|
|
bitfld.long 0x0 12. "DOUTBUFEN,Flash dout pipeline buffer enable" "0,1"
|
|
line.long 0x4 "WRITECTRL,No Description"
|
|
bitfld.long 0x4 3. "LPWRITE,Low-Power Write" "0,1"
|
|
bitfld.long 0x4 1. "IRQERASEABORT,Abort Page Erase on Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "WREN,Enable Write/Erase Controller" "0,1"
|
|
wgroup.long 0x10++0x3
|
|
line.long 0x0 "WRITECMD,No Description"
|
|
bitfld.long 0x0 12. "CLEARWDATA,Clear WDATA state" "0,1"
|
|
bitfld.long 0x0 8. "ERASEMAIN0,Mass erase region 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ERASEABORT,Abort erase sequence" "0,1"
|
|
bitfld.long 0x0 2. "WRITEEND,End Write Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ERASEPAGE,Erase Page" "0,1"
|
|
group.long 0x14++0x7
|
|
line.long 0x0 "ADDRB,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "ADDRB,Page Erase or Write Address Buffer"
|
|
line.long 0x4 "WDATA,No Description"
|
|
hexmask.long 0x4 0.--31. 1. "DATAW,Write Data"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
hexmask.long.byte 0x0 28.--31. 1. "PWRUPCKBDFAILCOUNT,Flash power up checkerboard pattern chec"
|
|
bitfld.long 0x0 27. "WREADY,Flash Write Ready" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "PWRON,Flash Power On Status" "0,1"
|
|
bitfld.long 0x0 16. "REGLOCK,Register Lock Status" "0: Register lock is unlocked,1: Register lock is locked."
|
|
newline
|
|
bitfld.long 0x0 6. "TIMEOUT,Write Command Timeout" "0,1"
|
|
bitfld.long 0x0 5. "PENDING,Write Command In Queue" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "ERASEABORTED,Erase Operation Aborted" "0,1"
|
|
bitfld.long 0x0 3. "WDATAREADY,WDATA Write Ready" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "INVADDR,Invalid Write Address or Erase Page" "0,1"
|
|
bitfld.long 0x0 1. "LOCKED,Access Locked" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "BUSY,Erase/Write Busy" "0,1"
|
|
group.long 0x20++0x7
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 9. "PWROFF,Flash Power Off Sequence Complete Flag" "0,1"
|
|
bitfld.long 0x0 8. "PWRUPF,Flash Power Up Sequence Complete Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "WDATAOV,Host write buffer overflow" "0,1"
|
|
bitfld.long 0x0 1. "WRITE,Host Write Done Interrupt Read Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "ERASE,Host Erase Done Interrupt Read Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 9. "PWROFF,Flash Power Off Seq done irq enable" "0,1"
|
|
bitfld.long 0x4 8. "PWRUPF,Flash Power Up Seq done irq enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "WDATAOV,write data buffer overflow irq enable" "0,1"
|
|
bitfld.long 0x4 1. "WRITE,Write Done Interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "ERASE,Erase Done Interrupt enable" "0,1"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x0 "USERDATASIZE,No Description"
|
|
hexmask.long.byte 0x0 0.--5. 1. "USERDATASIZE,User Data Size"
|
|
wgroup.long 0x38++0x7
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 4. "PWROFF,Flash power off/sleep command" "0,1"
|
|
bitfld.long 0x0 0. "PWRUP,Flash Power Up Command" "0,1"
|
|
line.long 0x4 "LOCK,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "LOCKKEY,Configuration Lock"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "MISCLOCKWORD,No Description"
|
|
bitfld.long 0x0 4. "UDLOCKBIT,User Data Lock" "0,1"
|
|
bitfld.long 0x0 0. "MELOCKBIT,Mass Erase Lock" "0,1"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "PWRCTRL,No Description"
|
|
hexmask.long.byte 0x0 16.--23. 1. "PWROFFDLY,Power down delay"
|
|
bitfld.long 0x0 4. "PWROFFENTRYAGAIN,POWER down flash again in EM1/EM1p" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "PWROFFONEM1PENTRY,Power down Flash macro when enter EM1P" "0,1"
|
|
bitfld.long 0x0 0. "PWROFFONEM1ENTRY,Power down Flash macro when enter EM1" "0,1"
|
|
group.long 0x120++0x7
|
|
line.long 0x0 "PAGELOCK0,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "LOCKBIT,page lock bit"
|
|
line.long 0x4 "PAGELOCK1,No Description"
|
|
hexmask.long 0x4 0.--31. 1. "LOCKBIT,page lock bit"
|
|
tree.end
|
|
tree "MSC_S"
|
|
base ad:0x40030000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version ID"
|
|
group.long 0x8++0x7
|
|
line.long 0x0 "READCTRL,No Description"
|
|
bitfld.long 0x0 20.--21. "MODE,Read Mode" "0: Zero wait-states inserted in fetch or read..,1: One wait-state inserted for each fetch or read..,2: Two wait-states inserted for eatch fetch or read..,3: Three wait-states inserted for eatch fetch or.."
|
|
bitfld.long 0x0 12. "DOUTBUFEN,Flash dout pipeline buffer enable" "0,1"
|
|
line.long 0x4 "WRITECTRL,No Description"
|
|
bitfld.long 0x4 3. "LPWRITE,Low-Power Write" "0,1"
|
|
bitfld.long 0x4 1. "IRQERASEABORT,Abort Page Erase on Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "WREN,Enable Write/Erase Controller" "0,1"
|
|
wgroup.long 0x10++0x3
|
|
line.long 0x0 "WRITECMD,No Description"
|
|
bitfld.long 0x0 12. "CLEARWDATA,Clear WDATA state" "0,1"
|
|
bitfld.long 0x0 8. "ERASEMAIN0,Mass erase region 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ERASEABORT,Abort erase sequence" "0,1"
|
|
bitfld.long 0x0 2. "WRITEEND,End Write Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ERASEPAGE,Erase Page" "0,1"
|
|
group.long 0x14++0x7
|
|
line.long 0x0 "ADDRB,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "ADDRB,Page Erase or Write Address Buffer"
|
|
line.long 0x4 "WDATA,No Description"
|
|
hexmask.long 0x4 0.--31. 1. "DATAW,Write Data"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
hexmask.long.byte 0x0 28.--31. 1. "PWRUPCKBDFAILCOUNT,Flash power up checkerboard pattern chec"
|
|
bitfld.long 0x0 27. "WREADY,Flash Write Ready" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "PWRON,Flash Power On Status" "0,1"
|
|
bitfld.long 0x0 16. "REGLOCK,Register Lock Status" "0: Register lock is unlocked,1: Register lock is locked."
|
|
newline
|
|
bitfld.long 0x0 6. "TIMEOUT,Write Command Timeout" "0,1"
|
|
bitfld.long 0x0 5. "PENDING,Write Command In Queue" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "ERASEABORTED,Erase Operation Aborted" "0,1"
|
|
bitfld.long 0x0 3. "WDATAREADY,WDATA Write Ready" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "INVADDR,Invalid Write Address or Erase Page" "0,1"
|
|
bitfld.long 0x0 1. "LOCKED,Access Locked" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "BUSY,Erase/Write Busy" "0,1"
|
|
group.long 0x20++0x7
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 9. "PWROFF,Flash Power Off Sequence Complete Flag" "0,1"
|
|
bitfld.long 0x0 8. "PWRUPF,Flash Power Up Sequence Complete Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "WDATAOV,Host write buffer overflow" "0,1"
|
|
bitfld.long 0x0 1. "WRITE,Host Write Done Interrupt Read Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "ERASE,Host Erase Done Interrupt Read Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 9. "PWROFF,Flash Power Off Seq done irq enable" "0,1"
|
|
bitfld.long 0x4 8. "PWRUPF,Flash Power Up Seq done irq enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "WDATAOV,write data buffer overflow irq enable" "0,1"
|
|
bitfld.long 0x4 1. "WRITE,Write Done Interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "ERASE,Erase Done Interrupt enable" "0,1"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x0 "USERDATASIZE,No Description"
|
|
hexmask.long.byte 0x0 0.--5. 1. "USERDATASIZE,User Data Size"
|
|
wgroup.long 0x38++0x7
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 4. "PWROFF,Flash power off/sleep command" "0,1"
|
|
bitfld.long 0x0 0. "PWRUP,Flash Power Up Command" "0,1"
|
|
line.long 0x4 "LOCK,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "LOCKKEY,Configuration Lock"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "MISCLOCKWORD,No Description"
|
|
bitfld.long 0x0 4. "UDLOCKBIT,User Data Lock" "0,1"
|
|
bitfld.long 0x0 0. "MELOCKBIT,Mass Erase Lock" "0,1"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "PWRCTRL,No Description"
|
|
hexmask.long.byte 0x0 16.--23. 1. "PWROFFDLY,Power down delay"
|
|
bitfld.long 0x0 4. "PWROFFENTRYAGAIN,POWER down flash again in EM1/EM1p" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "PWROFFONEM1PENTRY,Power down Flash macro when enter EM1P" "0,1"
|
|
bitfld.long 0x0 0. "PWROFFONEM1ENTRY,Power down Flash macro when enter EM1" "0,1"
|
|
group.long 0x120++0x7
|
|
line.long 0x0 "PAGELOCK0,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "LOCKBIT,page lock bit"
|
|
line.long 0x4 "PAGELOCK1,No Description"
|
|
hexmask.long 0x4 0.--31. 1. "LOCKBIT,page lock bit"
|
|
tree.end
|
|
tree.end
|
|
tree "PDM (Pulse Density Modulation Interface)"
|
|
base ad:0x0
|
|
tree "PDM_NS"
|
|
base ad:0x50098000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP VERSION"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,PDM enable" "0: Disable module,1: Enable module"
|
|
line.long 0x4 "CTRL,No Description"
|
|
hexmask.long.word 0x4 8.--19. 1. "DSR,Down sampling rate of Decimation filter"
|
|
hexmask.long.byte 0x4 0.--4. 1. "GAIN,Selects Gain factor of DCF"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 16. "FIFOFL,FIFO Flush" "0,1"
|
|
bitfld.long 0x0 8. "CLEAR,Clear DCF" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "STOP,Stop DCF" "0,1"
|
|
bitfld.long 0x0 0. "START,Start DCF" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 8.--10. "FIFOCNT,FIFO CNT" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 5. "EMPTY,FIFO EMPTY Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "FULL,FIFO FULL Status" "0,1"
|
|
bitfld.long 0x0 0. "ACT,PDM is active" "0,1"
|
|
group.long 0x14++0x7
|
|
line.long 0x0 "CFG0,No Description"
|
|
bitfld.long 0x0 25. "CH1CLKPOL,CH1 CLK Polarity" "0: Input data clocked on rising clock edge.,1: Input data clocked on falling clock edge."
|
|
bitfld.long 0x0 24. "CH0CLKPOL,CH0 CLK Polarity" "0: Input data clocked on rising clock edge.,1: Input data clocked on falling clock edge."
|
|
newline
|
|
bitfld.long 0x0 16. "STEREOMODECH01,Stereo mode CH01" "0: No Stereo mode.,1: CH0 and CH1 in Stereo mode."
|
|
bitfld.long 0x0 12.--13. "FIFODVL,Data Valid level in FIFO" "0: Atleast one word.,1: Two words.,2: Three words.,3: Four words."
|
|
newline
|
|
bitfld.long 0x0 8.--10. "DATAFORMAT,Filter output format" "0: Right aligned 16-bit left bits are sign extended.,1: Pack two 16-bit samples into one 32-bit word.,2: Right aligned 24bit left bits are sign extended.,3: 32 bit data.,4: Left aligned 16-bit right bits are zeros.,5: Left aligned 24-bit right bits are zeros.,6: RAW 32 bit data from Integrator.,?"
|
|
bitfld.long 0x0 4. "NUMCH,Number of Channels" "0: One channel.,1: Two channels."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "FORDER,Filter order" "0: Second order filter.,1: Third order filter.,2: Fourth order filter.,3: Fifth order filter."
|
|
line.long 0x4 "CFG1,No Description"
|
|
bitfld.long 0x4 24.--25. "DLYMUXSEL,Data delay buffer mux selection" "0,1,2,3"
|
|
hexmask.long.word 0x4 0.--9. 1. "PRESC,Prescalar Setting for PDM sample"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "RXDATA,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "RXDATA,PDM received data"
|
|
group.long 0x40++0x7
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 3. "UF,FIFO Undeflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 2. "OF,FIFO Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "DVL,Data Valid Level Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 0. "DV,Data Valid Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 3. "UF,FIFO Undeflow Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 2. "OF,FIFO Overflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "DVL,Data Valid Level Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "DV,Data Valid Interrupt Enable" "0,1"
|
|
rgroup.long 0x60++0x3
|
|
line.long 0x0 "SYNCBUSY,No Description"
|
|
bitfld.long 0x0 3. "FIFOFLBUSY,FIFO Flush Sync busy" "0,1"
|
|
bitfld.long 0x0 0. "SYNCBUSY,sync busy" "0,1"
|
|
tree.end
|
|
tree "PDM_S"
|
|
base ad:0x40098000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP VERSION"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,PDM enable" "0: Disable module,1: Enable module"
|
|
line.long 0x4 "CTRL,No Description"
|
|
hexmask.long.word 0x4 8.--19. 1. "DSR,Down sampling rate of Decimation filter"
|
|
hexmask.long.byte 0x4 0.--4. 1. "GAIN,Selects Gain factor of DCF"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 16. "FIFOFL,FIFO Flush" "0,1"
|
|
bitfld.long 0x0 8. "CLEAR,Clear DCF" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "STOP,Stop DCF" "0,1"
|
|
bitfld.long 0x0 0. "START,Start DCF" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 8.--10. "FIFOCNT,FIFO CNT" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 5. "EMPTY,FIFO EMPTY Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "FULL,FIFO FULL Status" "0,1"
|
|
bitfld.long 0x0 0. "ACT,PDM is active" "0,1"
|
|
group.long 0x14++0x7
|
|
line.long 0x0 "CFG0,No Description"
|
|
bitfld.long 0x0 25. "CH1CLKPOL,CH1 CLK Polarity" "0: Input data clocked on rising clock edge.,1: Input data clocked on falling clock edge."
|
|
bitfld.long 0x0 24. "CH0CLKPOL,CH0 CLK Polarity" "0: Input data clocked on rising clock edge.,1: Input data clocked on falling clock edge."
|
|
newline
|
|
bitfld.long 0x0 16. "STEREOMODECH01,Stereo mode CH01" "0: No Stereo mode.,1: CH0 and CH1 in Stereo mode."
|
|
bitfld.long 0x0 12.--13. "FIFODVL,Data Valid level in FIFO" "0: Atleast one word.,1: Two words.,2: Three words.,3: Four words."
|
|
newline
|
|
bitfld.long 0x0 8.--10. "DATAFORMAT,Filter output format" "0: Right aligned 16-bit left bits are sign extended.,1: Pack two 16-bit samples into one 32-bit word.,2: Right aligned 24bit left bits are sign extended.,3: 32 bit data.,4: Left aligned 16-bit right bits are zeros.,5: Left aligned 24-bit right bits are zeros.,6: RAW 32 bit data from Integrator.,?"
|
|
bitfld.long 0x0 4. "NUMCH,Number of Channels" "0: One channel.,1: Two channels."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "FORDER,Filter order" "0: Second order filter.,1: Third order filter.,2: Fourth order filter.,3: Fifth order filter."
|
|
line.long 0x4 "CFG1,No Description"
|
|
bitfld.long 0x4 24.--25. "DLYMUXSEL,Data delay buffer mux selection" "0,1,2,3"
|
|
hexmask.long.word 0x4 0.--9. 1. "PRESC,Prescalar Setting for PDM sample"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "RXDATA,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "RXDATA,PDM received data"
|
|
group.long 0x40++0x7
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 3. "UF,FIFO Undeflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 2. "OF,FIFO Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "DVL,Data Valid Level Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 0. "DV,Data Valid Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 3. "UF,FIFO Undeflow Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 2. "OF,FIFO Overflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "DVL,Data Valid Level Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "DV,Data Valid Interrupt Enable" "0,1"
|
|
rgroup.long 0x60++0x3
|
|
line.long 0x0 "SYNCBUSY,No Description"
|
|
bitfld.long 0x0 3. "FIFOFLBUSY,FIFO Flush Sync busy" "0,1"
|
|
bitfld.long 0x0 0. "SYNCBUSY,sync busy" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "PRORTC"
|
|
base ad:0x0
|
|
tree "PRORTC_NS"
|
|
base ad:0xB8000000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP VERSION"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,RTCC Enable" "0,1"
|
|
line.long 0x4 "CFG,No Description"
|
|
hexmask.long.byte 0x4 4.--7. 1. "CNTPRESC,Counter prescaler value."
|
|
bitfld.long 0x4 3. "CNTTICK,Counter prescaler mode." "0: CNT register ticks according to configuration in..,1: CNT register ticks when PRECNT matches.."
|
|
newline
|
|
bitfld.long 0x4 2. "CNTCCV1TOP,CCV1 top value enable" "0,1"
|
|
bitfld.long 0x4 1. "PRECNTCCV0TOP,Pre-counter CCV0 top value enable." "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "DEBUGRUN,Debug Mode Run Enable" "0: RTCC is frozen in debug mode,1: RTCC is running in debug mode"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 1. "STOP,Stop RTCC main counter" "0,1"
|
|
bitfld.long 0x0 0. "START,Start RTCC main counter" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 1. "RTCCLOCKSTATUS,Lock Status" "0: RTCC registers are unlocked,1: RTCC registers are locked"
|
|
bitfld.long 0x0 0. "RUNNING,RTCC running status" "0,1"
|
|
group.long 0x14++0xF
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 6. "CC1,CC Channel n Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 4. "CC0,CC Channel n Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CNTTICK,Main counter tick" "0,1"
|
|
bitfld.long 0x0 0. "OF,Overflow Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 6. "CC1,CC Channel n Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 4. "CC0,CC Channel n Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "CNTTICK,CNTTICK Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "OF,OF Interrupt Enable" "0,1"
|
|
line.long 0x8 "PRECNT,No Description"
|
|
hexmask.long.word 0x8 0.--14. 1. "PRECNT,Pre-Counter Value"
|
|
line.long 0xC "CNT,No Description"
|
|
hexmask.long 0xC 0.--31. 1. "CNT,Counter Value"
|
|
rgroup.long 0x24++0x7
|
|
line.long 0x0 "COMBCNT,No Description"
|
|
hexmask.long.tbyte 0x0 15.--31. 1. "CNTLSB,Counter Value"
|
|
hexmask.long.word 0x0 0.--14. 1. "PRECNT,Pre-Counter Value"
|
|
line.long 0x4 "SYNCBUSY,No Description"
|
|
bitfld.long 0x4 3. "CNT,Sync busy for CNT" "0,1"
|
|
bitfld.long 0x4 2. "PRECNT,Sync busy for PRECNT" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "STOP,Sync busy for STOP" "0,1"
|
|
bitfld.long 0x4 0. "START,Sync busy for START" "0,1"
|
|
wgroup.long 0x2C++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Configuration Lock Key"
|
|
group.long 0x30++0x7
|
|
line.long 0x0 "CC0_CTRL,No Description"
|
|
bitfld.long 0x0 5.--6. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x0 4. "COMPBASE,Capture compare channel comparison base." "0: RTCC_CCx_ICVALUE/OCVALUE is compared with CNT..,1: Least significant bits of.."
|
|
newline
|
|
bitfld.long 0x0 2.--3. "CMOA,Compare Match Output Action" "0: A single clock cycle pulse is generated on output,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input capture,2: Output compare,?"
|
|
line.long 0x4 "CC0_OCVALUE,No Description"
|
|
hexmask.long 0x4 0.--31. 1. "OC,Output Compare Value"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x0 "CC0_ICVALUE,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IC,Input Capture Value"
|
|
group.long 0x3C++0x7
|
|
line.long 0x0 "CC1_CTRL,No Description"
|
|
bitfld.long 0x0 5.--6. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x0 4. "COMPBASE,Capture compare channel comparison base." "0: RTCC_CCx_ICVALUE/OCVALUE is compared with CNT..,1: Least significant bits of.."
|
|
newline
|
|
bitfld.long 0x0 2.--3. "CMOA,Compare Match Output Action" "0: A single clock cycle pulse is generated on output,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input capture,2: Output compare,?"
|
|
line.long 0x4 "CC1_OCVALUE,No Description"
|
|
hexmask.long 0x4 0.--31. 1. "OC,Output Compare Value"
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x0 "CC1_ICVALUE,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IC,Input Capture Value"
|
|
tree.end
|
|
tree "PRORTC_S"
|
|
base ad:0xA8000000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP VERSION"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,RTCC Enable" "0,1"
|
|
line.long 0x4 "CFG,No Description"
|
|
hexmask.long.byte 0x4 4.--7. 1. "CNTPRESC,Counter prescaler value."
|
|
bitfld.long 0x4 3. "CNTTICK,Counter prescaler mode." "0: CNT register ticks according to configuration in..,1: CNT register ticks when PRECNT matches.."
|
|
newline
|
|
bitfld.long 0x4 2. "CNTCCV1TOP,CCV1 top value enable" "0,1"
|
|
bitfld.long 0x4 1. "PRECNTCCV0TOP,Pre-counter CCV0 top value enable." "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "DEBUGRUN,Debug Mode Run Enable" "0: RTCC is frozen in debug mode,1: RTCC is running in debug mode"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 1. "STOP,Stop RTCC main counter" "0,1"
|
|
bitfld.long 0x0 0. "START,Start RTCC main counter" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 1. "RTCCLOCKSTATUS,Lock Status" "0: RTCC registers are unlocked,1: RTCC registers are locked"
|
|
bitfld.long 0x0 0. "RUNNING,RTCC running status" "0,1"
|
|
group.long 0x14++0xF
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 6. "CC1,CC Channel n Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 4. "CC0,CC Channel n Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CNTTICK,Main counter tick" "0,1"
|
|
bitfld.long 0x0 0. "OF,Overflow Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 6. "CC1,CC Channel n Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 4. "CC0,CC Channel n Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "CNTTICK,CNTTICK Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "OF,OF Interrupt Enable" "0,1"
|
|
line.long 0x8 "PRECNT,No Description"
|
|
hexmask.long.word 0x8 0.--14. 1. "PRECNT,Pre-Counter Value"
|
|
line.long 0xC "CNT,No Description"
|
|
hexmask.long 0xC 0.--31. 1. "CNT,Counter Value"
|
|
rgroup.long 0x24++0x7
|
|
line.long 0x0 "COMBCNT,No Description"
|
|
hexmask.long.tbyte 0x0 15.--31. 1. "CNTLSB,Counter Value"
|
|
hexmask.long.word 0x0 0.--14. 1. "PRECNT,Pre-Counter Value"
|
|
line.long 0x4 "SYNCBUSY,No Description"
|
|
bitfld.long 0x4 3. "CNT,Sync busy for CNT" "0,1"
|
|
bitfld.long 0x4 2. "PRECNT,Sync busy for PRECNT" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "STOP,Sync busy for STOP" "0,1"
|
|
bitfld.long 0x4 0. "START,Sync busy for START" "0,1"
|
|
wgroup.long 0x2C++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Configuration Lock Key"
|
|
group.long 0x30++0x7
|
|
line.long 0x0 "CC0_CTRL,No Description"
|
|
bitfld.long 0x0 5.--6. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x0 4. "COMPBASE,Capture compare channel comparison base." "0: RTCC_CCx_ICVALUE/OCVALUE is compared with CNT..,1: Least significant bits of.."
|
|
newline
|
|
bitfld.long 0x0 2.--3. "CMOA,Compare Match Output Action" "0: A single clock cycle pulse is generated on output,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input capture,2: Output compare,?"
|
|
line.long 0x4 "CC0_OCVALUE,No Description"
|
|
hexmask.long 0x4 0.--31. 1. "OC,Output Compare Value"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x0 "CC0_ICVALUE,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IC,Input Capture Value"
|
|
group.long 0x3C++0x7
|
|
line.long 0x0 "CC1_CTRL,No Description"
|
|
bitfld.long 0x0 5.--6. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x0 4. "COMPBASE,Capture compare channel comparison base." "0: RTCC_CCx_ICVALUE/OCVALUE is compared with CNT..,1: Least significant bits of.."
|
|
newline
|
|
bitfld.long 0x0 2.--3. "CMOA,Compare Match Output Action" "0: A single clock cycle pulse is generated on output,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input capture,2: Output compare,?"
|
|
line.long 0x4 "CC1_OCVALUE,No Description"
|
|
hexmask.long 0x4 0.--31. 1. "OC,Output Compare Value"
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x0 "CC1_ICVALUE,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IC,Input Capture Value"
|
|
tree.end
|
|
tree.end
|
|
tree "PROTIMER (Protocol Timer)"
|
|
base ad:0x0
|
|
tree "PROTIMER_NS"
|
|
base ad:0xB801C000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "IPVERSION,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "IPVERSION,IPVERSION"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "EN,No Description"
|
|
bitfld.long 0x00 0. "EN,EN" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTRL,No Description"
|
|
bitfld.long 0x00 29. "TOUT1MODE,Repeat Mode" "0: When started the TOUT1 counts down until it..,1: TOUT1 is stopped after it reaches zero"
|
|
bitfld.long 0x00 28. "TOUT0MODE,Repeat Mode" "0: When started the TOUT0 counts down until it..,1: TOUT0 is stopped after it reaches zero"
|
|
newline
|
|
bitfld.long 0x00 26.--27. "TOUT1SYNCSRC,Select timeout counter 1 event" "0: No synchronization,1: Pre-counter overflow event,2: Base counter overflow event,3: Wrap counter overflow event"
|
|
bitfld.long 0x00 24.--25. "TOUT1SRC,Selects clock to timeout counter 1" "0: No counting,1: Pre-counter overflow events,2: Base counter overflow events,3: Wrap counter overflow events"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "TOUT0SYNCSRC,Select timeout counter 0 event" "0: No synchronization,1: Pre-counter overflow event,2: Base counter overflow event,3: Wrap counter overflow event"
|
|
bitfld.long 0x00 20.--21. "TOUT0SRC,Selects clock to timeout counter 0" "0: No counting,1: Pre-counter overflow events,2: Base counter overflow events,3: Wrap counter overflow events"
|
|
newline
|
|
bitfld.long 0x00 16.--17. "WRAPCNTSRC,Selects clock to Wrap counter" "0: Disable Wrap counter,1: Pre-counter overflow events,2: Base counter overflow events,3: Do not use"
|
|
bitfld.long 0x00 12.--13. "BASECNTSRC,Selects clock to Base counter" "0: Disable base counter,1: Pre-counter overflow events,2: Do not use,3: Do not use"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "PRECNTSRC,Selects clock to Pre-counter" "0: Disable Pre-counter,1: Module clock,2: Do not use,3: Do not use"
|
|
bitfld.long 0x00 5. "ZEROSTARTEN,Start from zero enable" "0: Protimer starts from the previous count value,1: Protimer starts counting from zero"
|
|
newline
|
|
bitfld.long 0x00 4. "OSMEN,One-Shot Mode Enable" "0: Protimer continues to count when WRAP counter..,1: Protimer stops counting when WRAP counter.."
|
|
bitfld.long 0x00 2. "DMACLRACT,DMA Request Clear on Active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "DEBUGRUN,Debug Mode Run Enable" "0: PROTIMER is frozen in debug mode,1: PROTIMER is running in debug mode"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "CMD,No Description"
|
|
bitfld.long 0x00 18. "LBTSTOP,LBT sequence stop" "0,1"
|
|
bitfld.long 0x00 17. "LBTPAUSE,Pause LBT sequence" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "LBTSTART,LBT sequence start" "0,1"
|
|
bitfld.long 0x00 10. "FORCERXRX,Force to Rx state of rx_state" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "FORCERXIDLE,Force to Idle state of rx_state" "0,1"
|
|
bitfld.long 0x00 8. "FORCETXIDLE,Force to Idle state of tx_state" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "TOUT1STOP,Stop Timeout counter 0" "0,1"
|
|
bitfld.long 0x00 6. "TOUT1START,Start Timeout counter 1" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "TOUT0STOP,Stop Timeout counter 0" "0,1"
|
|
bitfld.long 0x00 4. "TOUT0START,Start Timeout counter 0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "STOP,Stop PROTIMER" "0,1"
|
|
bitfld.long 0x00 1. "RTCSYNCSTART,Start PROTIMER Synchronized with RTCC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "START,Start PROTIMER" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PRSCTRL,No Description"
|
|
bitfld.long 0x00 18.--19. "RTCCTRIGGEREDGE,RTCC Trigger Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 17. "RTCCTRIGGERPRSEN,Enable RTCC Trigger from PRS" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "STOPEDGE,Stop Command Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 9. "STOPPRSEN,Enable Protimer stop commands from PRS" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2.--3. "STARTEDGE,Start Command Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 1. "STARTPRSEN,Enable Protimer start commands from PRS" "0,1"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "STATUS,No Description"
|
|
bitfld.long 0x00 15. "ICV7,CC7 Capture Valid" "0,1"
|
|
bitfld.long 0x00 14. "ICV6,CC6 Capture Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "ICV5,CC5 Capture Valid" "0,1"
|
|
bitfld.long 0x00 12. "ICV4,CC4 Capture Valid" "0: PROTIMER_CC4_PRE -BASE or -WRAP does not..,1: PROTIMER_CC4_PRE -BASE or -WRAP contains a.."
|
|
newline
|
|
bitfld.long 0x00 11. "ICV3,CC3 Capture Valid" "0: PROTIMER_CC3_PRE -BASE or -WRAP does not..,1: PROTIMER_CC3_PRE -BASE or -WRAP contains a.."
|
|
bitfld.long 0x00 10. "ICV2,CC2 Capture Valid" "0: PROTIMER_CC2_PRE -BASE or -WRAP does not..,1: PROTIMER_CC2_PRE -BASE or -WRAP contains a.."
|
|
newline
|
|
bitfld.long 0x00 9. "ICV1,CC1 Capture Valid" "0: PROTIMER_CC1_PRE -BASE or -WRAP does not..,1: PROTIMER_CC1_PRE -BASE or -WRAP contains a.."
|
|
bitfld.long 0x00 8. "ICV0,CC0 Capture Valid" "0: PROTIMER_CC0_PRE -BASE or -WRAP does not..,1: PROTIMER_CC0_PRE -BASE or -WRAP contains a.."
|
|
newline
|
|
bitfld.long 0x00 7. "TOUT1SYNC,Timeout Counter 1 Synchronizing" "0,1"
|
|
bitfld.long 0x00 6. "TOUT1RUNNING,Timeout Counter 1 Running" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "TOUT0SYNC,Timeout Counter 0 Synchronizing" "0,1"
|
|
bitfld.long 0x00 4. "TOUT0RUNNING,Timeout Counter 0 Running" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "LBTPAUSED,LBT has been paused" "0,1"
|
|
bitfld.long 0x00 2. "LBTRUNNING,LBT Running" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "LBTSYNC,LBT Synchronizing" "0,1"
|
|
bitfld.long 0x00 0. "RUNNING,Running" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PRECNT,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "PRECNT,Pre Counter Value"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "BASECNT,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "BASECNT,Base Counter Value"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "WRAPCNT,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRAPCNT,Wrap Counter Value"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "BASEPRE,No Description"
|
|
hexmask.long.word 0x00 16.--31. 1. "BASECNTV,Base counter value"
|
|
hexmask.long.word 0x00 0.--15. 1. "PRECNTV,Pre counter value"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "LWRAPCNT,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "LWRAPCNT,Latched Wrap Counter Value"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "PRECNTTOPADJ,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "PRECNTTOPADJ,PRECNT Top Adjust Value"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "PRECNTTOP,No Description"
|
|
hexmask.long.word 0x00 8.--23. 1. "PRECNTTOP,PRECNT Top Value"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PRECNTTOPFRAC,PRECNT Top Fractional Value"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "BASECNTTOP,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "BASECNTTOP,BASECNT Top Value"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "WRAPCNTTOP,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRAPCNTTOP,WRAPCNT Top Value"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "TOUT0CNT,No Description"
|
|
hexmask.long.word 0x00 16.--31. 1. "TOUT0CNT,TOUT0CNT Value"
|
|
hexmask.long.word 0x00 0.--15. 1. "TOUT0PCNT,TOUT0PCNT Value"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "TOUT0CNTTOP,No Description"
|
|
hexmask.long.word 0x00 16.--31. 1. "TOUT0CNTTOP,TOUT0CNTTOP Value"
|
|
hexmask.long.word 0x00 0.--15. 1. "TOUT0PCNTTOP,TOUT0PCNTTOP Value"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "TOUT0COMP,No Description"
|
|
hexmask.long.word 0x00 16.--31. 1. "TOUT0CNTCOMP,TOUT0CNTCOMP Value"
|
|
hexmask.long.word 0x00 0.--15. 1. "TOUT0PCNTCOMP,TOUT0PCNTCOMP"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "TOUT1CNT,No Description"
|
|
hexmask.long.word 0x00 16.--31. 1. "TOUT1CNT,TOUT1CNT Value"
|
|
hexmask.long.word 0x00 0.--15. 1. "TOUT1PCNT,TOUT1PCNT Value"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "TOUT1CNTTOP,No Description"
|
|
hexmask.long.word 0x00 16.--31. 1. "TOUT1CNTTOP,TOUT1CNTTOP Value"
|
|
hexmask.long.word 0x00 0.--15. 1. "TOUT1PCNTTOP,TOUT1PCNTTOP Value"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "TOUT1COMP,No Description"
|
|
hexmask.long.word 0x00 16.--31. 1. "TOUT1CNTCOMP,TOUT1CNTCOMP Value"
|
|
hexmask.long.word 0x00 0.--15. 1. "TOUT1PCNTCOMP,TOUT1PCNTCOMP"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "LBTCTRL,No Description"
|
|
bitfld.long 0x00 24.--27. "RETRYLIMIT,Retry Limit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20. "FIXEDBACKOFF,Fixed backoff" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "CCAREPEAT,Clear Channel Assessment Repeat" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--12. "CCADELAY,Clear Channel Assessment Delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "MAXEXP,Maximum Exponent" "0: MAXEXP value = 0,1: MAXEXP value = 1,2: MAXEXP value = 2,3: MAXEXP value = 3,4: MAXEXP value = 4,5: MAXEXP value = 5,6: MAXEXP value = 6,7: MAXEXP value = 7,8: MAXEXP value = 8,?..."
|
|
bitfld.long 0x00 0.--3. "STARTEXP,Start Exponent" "0: STARTEXP value = 0 (used for Fast TX),1: STARTEXP value = 1,2: STARTEXP value = 2,3: STARTEXP value = 3,4: STARTEXP value = 4,5: STARTEXP value = 5,6: STARTEXP value = 6,7: STARTEXP value = 7,8: STARTEXP value = 8,?..."
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "LBTPRSCTRL,No Description"
|
|
bitfld.long 0x00 24. "LBTSTOPPRSEN,Enable LBT stop commands from PRS" "0,1"
|
|
bitfld.long 0x00 16. "LBTPAUSEPRSEN,Enable LBT pause commands from PRS" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "LBTSTARTPRSEN,Enable LBT start commands from PRS" "0,1"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "LBTSTATE,No Description"
|
|
hexmask.long.word 0x00 16.--31. 1. "TOUT0CNT,TOUT0CNT value to be saved"
|
|
hexmask.long.word 0x00 0.--15. 1. "TOUT0PCNT,TOUT0PCNT value to be saved"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "RANDOM,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "RANDOM,Pseudo Random Value"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "IF,No Description"
|
|
bitfld.long 0x00 29. "TOUT0MATCHLBT,TOUT0 compare match interrupt flag" "0,1"
|
|
bitfld.long 0x00 28. "RTCCSYNCHED,PROTIMER synchronized with the RTCC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "LBTRETRY,Listen Before Talk Retry" "0,1"
|
|
bitfld.long 0x00 26. "LBTPAUSED,Listen Before Talk Paused" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "LBTFAILURE,Listen Before Talk Failure" "0,1"
|
|
bitfld.long 0x00 24. "LBTSUCCESS,Listen Before Talk Success" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "COF7,CC Channel 7 Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 22. "COF6,CC Channel 6 Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "COF5,CC Channel 5 Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 20. "COF4,CC Channel 4 Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "COF3,CC Channel 3 Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 18. "COF2,CC Channel 2 Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "COF1,CC Channel 1 Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 16. "COF0,CC Channel 0 Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "CC7,CC Channel 7 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. "CC6,CC Channel 6 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "CC5,CC Channel 5 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 12. "CC4,CC Channel 4 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "CC3,CC Channel 3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. "CC2,CC Channel 2 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "CC1,CC Channel 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. "CC0,CC Channel 0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "TOUT1MATCH,TOUT1 compare match interrupt flag" "0,1"
|
|
bitfld.long 0x00 6. "TOUT0MATCH,TOUT0 compare match interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "TOUT1,TOUT1 underflow interrupt flag" "0,1"
|
|
bitfld.long 0x00 4. "TOUT0,TOUT0 underflow interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "WRAPCNTOF,WRAPCNT Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "BASECNTOF,BASECNT Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "PRECNTOF,PRECNT Overflow Interrupt Flag" "0,1"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "IEN,No Description"
|
|
bitfld.long 0x00 29. "TOUT0MATCHLBT,TOUT0MATCHLBT Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 28. "RTCCSYNCHED,RTCCSYNCHED Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "LBTRETRY,LBTRETRY Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 26. "LBTPAUSED,LBTPAUSED Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "LBTFAILURE,LBTFAILURE Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 24. "LBTSUCCESS,LBTSUCCESS Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "COF7,COF7 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 22. "COF6,COF6 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "COF5,COF5 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 20. "COF4,COF4 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "COF3,COF3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 18. "COF2,COF2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "COF1,COF1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 16. "COF0,COF0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "CC7,CC7 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 14. "CC6,CC6 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "CC5,CC5 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 12. "CC4,CC4 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "CC3,CC3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 10. "CC2,CC2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "CC1,CC1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 8. "CC0,CC0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "TOUT1MATCH,TOUT1MATCH Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 6. "TOUT0MATCH,TOUT0MATCH Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "TOUT1,TOUT1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 4. "TOUT0,TOUT0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "WRAPCNTOF,WRAPCNTOF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. "BASECNTOF,BASECNTOF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "PRECNTOF,PRECNTOF Interrupt Enable" "0,1"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "RXCTRL,No Description"
|
|
bitfld.long 0x00 24.--28. "RXCLREVENT2,Second event that clears RX req signal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--20. "RXCLREVENT1,First event that clears RX req signal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "RXSETEVENT2,Second event that sets RX req signal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "RXSETEVENT1,First event that sets RX req signal" "0: Request is never set,1: Does not wait for any particular event,2: Pre counter overflow,3: Base counter overflow,4: Wrap counter overflow,5: Timeout counter 0 underflow,6: Timeout counter 1 underflow,7: Timeout counter 0 match,8: Timeout counter 1 match,9: Channel 0 Capture/Compare event,10: Channel 1 Capture/Compare event,11: Channel 2 Capture/Compare event,12: Channel 3 Capture/Compare event,13: Channel 4 Capture/Compare event,14: MOD indicated that TX completed,15: FRC indicated that RX completed,16: MOD/FRC indicated that TX or RX completed,17: DEMOD indicated that syncword 0 was detected,18: DEMOD indicated that syncword 1 was detected,19: DEMOD indicated that syncword 0 or 1 was..,20: LBT completed successfully,21: LBT detected occupied channel and will try..,22: LBT could not start transmission,23: Any LBT event,24: A CCA measurement completed,25: A CCA measurement completed and channel was..,26: A CCA measurement completed and channel was..,27: Timeout counter 0 match occurred during LBT..,?..."
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "TXCTRL,No Description"
|
|
bitfld.long 0x00 8.--12. "TXSETEVENT2,Second event that sets TX req signal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "TXSETEVENT1,First event that sets TX req signal" "0: Request is never set,1: Does not wait for any particular event,2: Pre counter overflow,3: Base counter overflow,4: Wrap counter overflow,5: Timeout counter 0 underflow,6: Timeout counter 1 underflow,7: Timeout counter 0 match,8: Timeout counter 1 match,9: Channel 0 Capture/Compare event,10: Channel 1 Capture/Compare event,11: Channel 2 Capture/Compare event,12: Channel 3 Capture/Compare event,13: Channel 4 Capture/Compare event,14: MOD indicated that TX completed,15: FRC indicated that RX completed,16: MOD/FRC indicated that TX or RX completed,17: DEMOD indicated that syncword 0 was detected,18: DEMOD indicated that syncword 1 was detected,19: DEMOD indicated that syncword 0 or 1 was..,20: LBT completed successfully,21: LBT detected occupied channel and will try..,22: LBT could not start transmission,23: Any LBT event,24: A CCA measurement completed,25: A CCA measurement completed and channel was..,26: A CCA measurement completed and channel was..,27: Timeout counter 0 match occurred during LBT..,?..."
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "ETSI,No Description"
|
|
hexmask.long.word 0x00 10.--25. 1. "CCAFIXED,Fixed listening time"
|
|
hexmask.long.byte 0x00 2.--9. 1. "RXWARMTHLD,Minimum backoff period for RXWARM"
|
|
newline
|
|
bitfld.long 0x00 1. "GRANULARLESSTHANRXWARM,Granular less than RXWARM" "0,1"
|
|
bitfld.long 0x00 0. "ETSIEN,ETSI LBT enabling" "0,1"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "LBTSTATE1,No Description"
|
|
bitfld.long 0x00 8.--11. "RETRYCNT,LBT Retry counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "EXP,LBT Exponent" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "CCACNT,Current CCA counter value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "RANDOMFW0,No Description"
|
|
hexmask.long.word 0x00 18.--26. 1. "RANDOM2,Linear random backoff period from FW"
|
|
hexmask.long.word 0x00 9.--17. 1. "RANDOM1,Linear random backoff period from FW"
|
|
newline
|
|
hexmask.long.word 0x00 0.--8. 1. "RANDOM0,Linear random backoff period from FW"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "RANDOMFW1,No Description"
|
|
hexmask.long.word 0x00 18.--26. 1. "RANDOM5,Linear random backoff period from FW"
|
|
hexmask.long.word 0x00 9.--17. 1. "RANDOM4,Linear random backoff period from FW"
|
|
newline
|
|
hexmask.long.word 0x00 0.--8. 1. "RANDOM3,Linear random backoff period from FW"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "RANDOMFW2,No Description"
|
|
hexmask.long.word 0x00 9.--17. 1. "RANDOM7,Linear random backoff period from FW"
|
|
hexmask.long.word 0x00 0.--8. 1. "RANDOM6,Linear random backoff period from FW"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "SEQIF,No Description"
|
|
bitfld.long 0x00 29. "TOUT0MATCHLBT,TOUT0 compare match interrupt flag" "0,1"
|
|
bitfld.long 0x00 28. "RTCCSYNCHED,PROTIMER synchronized with the RTCC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "LBTRETRY,Listen Before Talk Retry" "0,1"
|
|
bitfld.long 0x00 26. "LBTPAUSED,Listen Before Talk Paused" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "LBTFAILURE,Listen Before Talk Failure" "0,1"
|
|
bitfld.long 0x00 24. "LBTSUCCESS,Listen Before Talk Success" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "COF7,CC Channel 7 Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 22. "COF6,CC Channel 6 Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "COF5,CC Channel 5 Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 20. "COF4,CC Channel 4 Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "COF3,CC Channel 3 Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 18. "COF2,CC Channel 2 Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "COF1,CC Channel 1 Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 16. "COF0,CC Channel 0 Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "CC7,CC Channel 7 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. "CC6,CC Channel 6 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "CC5,CC Channel 5 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 12. "CC4,CC Channel 4 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "CC3,CC Channel 3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. "CC2,CC Channel 2 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "CC1,CC Channel 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. "CC0,CC Channel 0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "TOUT1MATCH,TOUT1 compare match interrupt flag" "0,1"
|
|
bitfld.long 0x00 6. "TOUT0MATCH,TOUT0 compare match interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "TOUT1,TOUT1 underflow interrupt flag" "0,1"
|
|
bitfld.long 0x00 4. "TOUT0,TOUT0 underflow interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "WRAPCNTOF,WRAPCNT Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "BASECNTOF,BASECNT Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "PRECNTOF,PRECNT Overflow Interrupt Flag" "0,1"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "SEQIEN,No Description"
|
|
bitfld.long 0x00 29. "TOUT0MATCHLBT,TOUT0MATCHLBT Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 28. "RTCCSYNCHED,RTCCSYNCHED Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "LBTRETRY,LBTRETRY Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 26. "LBTPAUSED,LBTPAUSED Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "LBTFAILURE,LBTFAILURE Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 24. "LBTSUCCESS,LBTSUCCESS Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "COF7,COF7 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 22. "COF6,COF6 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "COF5,COF5 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 20. "COF4,COF4 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "COF3,COF3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 18. "COF2,COF2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "COF1,COF1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 16. "COF0,COF0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "CC7,CC7 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 14. "CC6,CC6 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "CC5,CC5 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 12. "CC4,CC4 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "CC3,CC3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 10. "CC2,CC2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "CC1,CC1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 8. "CC0,CC0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "TOUT1MATCH,TOUT1MATCH Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 6. "TOUT0MATCH,TOUT0MATCH Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "TOUT1,TOUT1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 4. "TOUT0,TOUT0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "WRAPCNTOF,WRAPCNTOF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. "BASECNTOF,BASECNTOF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "PRECNTOF,PRECNTOF Interrupt Enable" "0,1"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "CC0_CTRL,No Description"
|
|
bitfld.long 0x00 25.--26. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 21.--24. "INSEL,Capture input selection" "0: Use the selected PRS channel,1: TX completed,2: RX completed,3: TX or RX completed,4: Demodulator found sync word 0,5: Demodulator found sync word 1,6: Demodulator found sync word 0 or 1,7: Modulator sync word sent,8: RX at end of frame from demodulator,9: PRORTC capture/compare 0,10: PRORTC capture/compare 1,?..."
|
|
newline
|
|
bitfld.long 0x00 14. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one HFRADIOCLK..,1: Should be used when OFSEL OFOA or MOA are.."
|
|
bitfld.long 0x00 12.--13. "OFSEL,Select counter for OFOA bits" "0: Use PRECNT overflow,1: Use BASECNT overflow,2: Use WRAPCNT overflow,3: DISABLED"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "OFOA,Overflow Output Action" "0: No action,1: Toggle output when the selected counter has..,2: Clear output when the selected counter has an..,3: Set output when the selected counter has an.."
|
|
bitfld.long 0x00 8.--9. "MOA,Match Output Action" "0: No action on compare match,1: Toggle output on compare match in COMPARE mode,2: Clear output on compare match in COMPARE mode,3: Set output on compare match in COMPARE mode"
|
|
newline
|
|
bitfld.long 0x00 6. "OUTINV,Output Invert" "0,1"
|
|
bitfld.long 0x00 5. "OIST,Output Initial State" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "WRAPMATCHEN,Enable WRAPCNT matching" "0,1"
|
|
bitfld.long 0x00 3. "BASEMATCHEN,Enable BASECNT matching" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PREMATCHEN,Enable PRECNT matching" "0,1"
|
|
bitfld.long 0x00 1. "CCMODE,Compare/Capture mode" "0: Compare mode selected,1: Capture mode selected"
|
|
newline
|
|
bitfld.long 0x00 0. "ENABLE,Channel Enable" "0,1"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "CC0_PRE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "PRE,CC Channel PRE Value"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "CC0_BASE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "BASE,CC Channel BASE Value"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "CC0_WRAP,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRAP,CC Channel WRAP Value"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "CC1_CTRL,No Description"
|
|
bitfld.long 0x00 25.--26. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 21.--24. "INSEL,Capture input selection" "0: Use the selected PRS channel,1: TX completed,2: RX completed,3: TX or RX completed,4: Demodulator found sync word 0,5: Demodulator found sync word 1,6: Demodulator found sync word 0 or 1,7: Modulator sync word sent,8: RX at end of frame from demodulator,9: PRORTC capture/compare 0,10: PRORTC capture/compare 1,?..."
|
|
newline
|
|
bitfld.long 0x00 14. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one HFRADIOCLK..,1: Should be used when OFSEL OFOA or MOA are.."
|
|
bitfld.long 0x00 12.--13. "OFSEL,Select counter for OFOA bits" "0: Use PRECNT overflow,1: Use BASECNT overflow,2: Use WRAPCNT overflow,3: DISABLED"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "OFOA,Overflow Output Action" "0: No action,1: Toggle output when the selected counter has..,2: Clear output when the selected counter has an..,3: Set output when the selected counter has an.."
|
|
bitfld.long 0x00 8.--9. "MOA,Match Output Action" "0: No action on compare match,1: Toggle output on compare match in COMPARE mode,2: Clear output on compare match in COMPARE mode,3: Set output on compare match in COMPARE mode"
|
|
newline
|
|
bitfld.long 0x00 6. "OUTINV,Output Invert" "0,1"
|
|
bitfld.long 0x00 5. "OIST,Output Initial State" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "WRAPMATCHEN,Enable WRAPCNT matching" "0,1"
|
|
bitfld.long 0x00 3. "BASEMATCHEN,Enable BASECNT matching" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PREMATCHEN,Enable PRECNT matching" "0,1"
|
|
bitfld.long 0x00 1. "CCMODE,Compare/Capture mode" "0: Compare mode selected,1: Capture mode selected"
|
|
newline
|
|
bitfld.long 0x00 0. "ENABLE,Channel Enable" "0,1"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "CC1_PRE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "PRE,CC Channel PRE Value"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "CC1_BASE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "BASE,CC Channel BASE Value"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "CC1_WRAP,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRAP,CC Channel WRAP Value"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "CC2_CTRL,No Description"
|
|
bitfld.long 0x00 25.--26. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 21.--24. "INSEL,Capture input selection" "0: Use the selected PRS channel,1: TX completed,2: RX completed,3: TX or RX completed,4: Demodulator found sync word 0,5: Demodulator found sync word 1,6: Demodulator found sync word 0 or 1,7: Modulator sync word sent,8: RX at end of frame from demodulator,9: PRORTC capture/compare 0,10: PRORTC capture/compare 1,?..."
|
|
newline
|
|
bitfld.long 0x00 14. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one HFRADIOCLK..,1: Should be used when OFSEL OFOA or MOA are.."
|
|
bitfld.long 0x00 12.--13. "OFSEL,Select counter for OFOA bits" "0: Use PRECNT overflow,1: Use BASECNT overflow,2: Use WRAPCNT overflow,3: DISABLED"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "OFOA,Overflow Output Action" "0: No action,1: Toggle output when the selected counter has..,2: Clear output when the selected counter has an..,3: Set output when the selected counter has an.."
|
|
bitfld.long 0x00 8.--9. "MOA,Match Output Action" "0: No action on compare match,1: Toggle output on compare match in COMPARE mode,2: Clear output on compare match in COMPARE mode,3: Set output on compare match in COMPARE mode"
|
|
newline
|
|
bitfld.long 0x00 6. "OUTINV,Output Invert" "0,1"
|
|
bitfld.long 0x00 5. "OIST,Output Initial State" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "WRAPMATCHEN,Enable WRAPCNT matching" "0,1"
|
|
bitfld.long 0x00 3. "BASEMATCHEN,Enable BASECNT matching" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PREMATCHEN,Enable PRECNT matching" "0,1"
|
|
bitfld.long 0x00 1. "CCMODE,Compare/Capture mode" "0: Compare mode selected,1: Capture mode selected"
|
|
newline
|
|
bitfld.long 0x00 0. "ENABLE,Channel Enable" "0,1"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "CC2_PRE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "PRE,CC Channel PRE Value"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "CC2_BASE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "BASE,CC Channel BASE Value"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "CC2_WRAP,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRAP,CC Channel WRAP Value"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "CC3_CTRL,No Description"
|
|
bitfld.long 0x00 25.--26. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 21.--24. "INSEL,Capture input selection" "0: Use the selected PRS channel,1: TX completed,2: RX completed,3: TX or RX completed,4: Demodulator found sync word 0,5: Demodulator found sync word 1,6: Demodulator found sync word 0 or 1,7: Modulator sync word sent,8: RX at end of frame from demodulator,9: PRORTC capture/compare 0,10: PRORTC capture/compare 1,?..."
|
|
newline
|
|
bitfld.long 0x00 14. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one HFRADIOCLK..,1: Should be used when OFSEL OFOA or MOA are.."
|
|
bitfld.long 0x00 12.--13. "OFSEL,Select counter for OFOA bits" "0: Use PRECNT overflow,1: Use BASECNT overflow,2: Use WRAPCNT overflow,3: DISABLED"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "OFOA,Overflow Output Action" "0: No action,1: Toggle output when the selected counter has..,2: Clear output when the selected counter has an..,3: Set output when the selected counter has an.."
|
|
bitfld.long 0x00 8.--9. "MOA,Match Output Action" "0: No action on compare match,1: Toggle output on compare match in COMPARE mode,2: Clear output on compare match in COMPARE mode,3: Set output on compare match in COMPARE mode"
|
|
newline
|
|
bitfld.long 0x00 6. "OUTINV,Output Invert" "0,1"
|
|
bitfld.long 0x00 5. "OIST,Output Initial State" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "WRAPMATCHEN,Enable WRAPCNT matching" "0,1"
|
|
bitfld.long 0x00 3. "BASEMATCHEN,Enable BASECNT matching" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PREMATCHEN,Enable PRECNT matching" "0,1"
|
|
bitfld.long 0x00 1. "CCMODE,Compare/Capture mode" "0: Compare mode selected,1: Capture mode selected"
|
|
newline
|
|
bitfld.long 0x00 0. "ENABLE,Channel Enable" "0,1"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "CC3_PRE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "PRE,CC Channel PRE Value"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "CC3_BASE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "BASE,CC Channel BASE Value"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "CC3_WRAP,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRAP,CC Channel WRAP Value"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "CC4_CTRL,No Description"
|
|
bitfld.long 0x00 25.--26. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 21.--24. "INSEL,Capture input selection" "0: Use the selected PRS channel,1: TX completed,2: RX completed,3: TX or RX completed,4: Demodulator found sync word 0,5: Demodulator found sync word 1,6: Demodulator found sync word 0 or 1,7: Modulator sync word sent,8: RX at end of frame from demodulator,9: PRORTC capture/compare 0,10: PRORTC capture/compare 1,?..."
|
|
newline
|
|
bitfld.long 0x00 14. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one HFRADIOCLK..,1: Should be used when OFSEL OFOA or MOA are.."
|
|
bitfld.long 0x00 12.--13. "OFSEL,Select counter for OFOA bits" "0: Use PRECNT overflow,1: Use BASECNT overflow,2: Use WRAPCNT overflow,3: DISABLED"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "OFOA,Overflow Output Action" "0: No action,1: Toggle output when the selected counter has..,2: Clear output when the selected counter has an..,3: Set output when the selected counter has an.."
|
|
bitfld.long 0x00 8.--9. "MOA,Match Output Action" "0: No action on compare match,1: Toggle output on compare match in COMPARE mode,2: Clear output on compare match in COMPARE mode,3: Set output on compare match in COMPARE mode"
|
|
newline
|
|
bitfld.long 0x00 6. "OUTINV,Output Invert" "0,1"
|
|
bitfld.long 0x00 5. "OIST,Output Initial State" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "WRAPMATCHEN,Enable WRAPCNT matching" "0,1"
|
|
bitfld.long 0x00 3. "BASEMATCHEN,Enable BASECNT matching" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PREMATCHEN,Enable PRECNT matching" "0,1"
|
|
bitfld.long 0x00 1. "CCMODE,Compare/Capture mode" "0: Compare mode selected,1: Capture mode selected"
|
|
newline
|
|
bitfld.long 0x00 0. "ENABLE,Channel Enable" "0,1"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "CC4_PRE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "PRE,CC Channel PRE Value"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "CC4_BASE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "BASE,CC Channel BASE Value"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "CC4_WRAP,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRAP,CC Channel WRAP Value"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "CC5_CTRL,No Description"
|
|
bitfld.long 0x00 25.--26. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 21.--24. "INSEL,Capture input selection" "0: Use the selected PRS channel,1: TX completed,2: RX completed,3: TX or RX completed,4: Demodulator found sync word 0,5: Demodulator found sync word 1,6: Demodulator found sync word 0 or 1,7: Modulator sync word sent,8: RX at end of frame from demodulator,9: PRORTC capture/compare 0,10: PRORTC capture/compare 1,?..."
|
|
newline
|
|
bitfld.long 0x00 14. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one HFRADIOCLK..,1: Should be used when OFSEL OFOA or MOA are.."
|
|
bitfld.long 0x00 12.--13. "OFSEL,Select counter for OFOA bits" "0: Use PRECNT overflow,1: Use BASECNT overflow,2: Use WRAPCNT overflow,3: DISABLED"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "OFOA,Overflow Output Action" "0: No action,1: Toggle output when the selected counter has..,2: Clear output when the selected counter has an..,3: Set output when the selected counter has an.."
|
|
bitfld.long 0x00 8.--9. "MOA,Match Output Action" "0: No action on compare match,1: Toggle output on compare match in COMPARE mode,2: Clear output on compare match in COMPARE mode,3: Set output on compare match in COMPARE mode"
|
|
newline
|
|
bitfld.long 0x00 6. "OUTINV,Output Invert" "0,1"
|
|
bitfld.long 0x00 5. "OIST,Output Initial State" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "WRAPMATCHEN,Enable WRAPCNT matching" "0,1"
|
|
bitfld.long 0x00 3. "BASEMATCHEN,Enable BASECNT matching" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PREMATCHEN,Enable PRECNT matching" "0,1"
|
|
bitfld.long 0x00 1. "CCMODE,Compare/Capture mode" "0: Compare mode selected,1: Capture mode selected"
|
|
newline
|
|
bitfld.long 0x00 0. "ENABLE,Channel Enable" "0,1"
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "CC5_PRE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "PRE,CC Channel PRE Value"
|
|
group.long 0x158++0x03
|
|
line.long 0x00 "CC5_BASE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "BASE,CC Channel BASE Value"
|
|
group.long 0x15C++0x03
|
|
line.long 0x00 "CC5_WRAP,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRAP,CC Channel WRAP Value"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "CC6_CTRL,No Description"
|
|
bitfld.long 0x00 25.--26. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 21.--24. "INSEL,Capture input selection" "0: Use the selected PRS channel,1: TX completed,2: RX completed,3: TX or RX completed,4: Demodulator found sync word 0,5: Demodulator found sync word 1,6: Demodulator found sync word 0 or 1,7: Modulator sync word sent,8: RX at end of frame from demodulator,9: PRORTC capture/compare 0,10: PRORTC capture/compare 1,?..."
|
|
newline
|
|
bitfld.long 0x00 14. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one HFRADIOCLK..,1: Should be used when OFSEL OFOA or MOA are.."
|
|
bitfld.long 0x00 12.--13. "OFSEL,Select counter for OFOA bits" "0: Use PRECNT overflow,1: Use BASECNT overflow,2: Use WRAPCNT overflow,3: DISABLED"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "OFOA,Overflow Output Action" "0: No action,1: Toggle output when the selected counter has..,2: Clear output when the selected counter has an..,3: Set output when the selected counter has an.."
|
|
bitfld.long 0x00 8.--9. "MOA,Match Output Action" "0: No action on compare match,1: Toggle output on compare match in COMPARE mode,2: Clear output on compare match in COMPARE mode,3: Set output on compare match in COMPARE mode"
|
|
newline
|
|
bitfld.long 0x00 6. "OUTINV,Output Invert" "0,1"
|
|
bitfld.long 0x00 5. "OIST,Output Initial State" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "WRAPMATCHEN,Enable WRAPCNT matching" "0,1"
|
|
bitfld.long 0x00 3. "BASEMATCHEN,Enable BASECNT matching" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PREMATCHEN,Enable PRECNT matching" "0,1"
|
|
bitfld.long 0x00 1. "CCMODE,Compare/Capture mode" "0: Compare mode selected,1: Capture mode selected"
|
|
newline
|
|
bitfld.long 0x00 0. "ENABLE,Channel Enable" "0,1"
|
|
group.long 0x164++0x03
|
|
line.long 0x00 "CC6_PRE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "PRE,CC Channel PRE Value"
|
|
group.long 0x168++0x03
|
|
line.long 0x00 "CC6_BASE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "BASE,CC Channel BASE Value"
|
|
group.long 0x16C++0x03
|
|
line.long 0x00 "CC6_WRAP,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRAP,CC Channel WRAP Value"
|
|
group.long 0x170++0x03
|
|
line.long 0x00 "CC7_CTRL,No Description"
|
|
bitfld.long 0x00 25.--26. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 21.--24. "INSEL,Capture input selection" "0: Use the selected PRS channel,1: TX completed,2: RX completed,3: TX or RX completed,4: Demodulator found sync word 0,5: Demodulator found sync word 1,6: Demodulator found sync word 0 or 1,7: Modulator sync word sent,8: RX at end of frame from demodulator,9: PRORTC capture/compare 0,10: PRORTC capture/compare 1,?..."
|
|
newline
|
|
bitfld.long 0x00 14. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one HFRADIOCLK..,1: Should be used when OFSEL OFOA or MOA are.."
|
|
bitfld.long 0x00 12.--13. "OFSEL,Select counter for OFOA bits" "0: Use PRECNT overflow,1: Use BASECNT overflow,2: Use WRAPCNT overflow,3: DISABLED"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "OFOA,Overflow Output Action" "0: No action,1: Toggle output when the selected counter has..,2: Clear output when the selected counter has an..,3: Set output when the selected counter has an.."
|
|
bitfld.long 0x00 8.--9. "MOA,Match Output Action" "0: No action on compare match,1: Toggle output on compare match in COMPARE mode,2: Clear output on compare match in COMPARE mode,3: Set output on compare match in COMPARE mode"
|
|
newline
|
|
bitfld.long 0x00 6. "OUTINV,Output Invert" "0,1"
|
|
bitfld.long 0x00 5. "OIST,Output Initial State" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "WRAPMATCHEN,Enable WRAPCNT matching" "0,1"
|
|
bitfld.long 0x00 3. "BASEMATCHEN,Enable BASECNT matching" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PREMATCHEN,Enable PRECNT matching" "0,1"
|
|
bitfld.long 0x00 1. "CCMODE,Compare/Capture mode" "0: Compare mode selected,1: Capture mode selected"
|
|
newline
|
|
bitfld.long 0x00 0. "ENABLE,Channel Enable" "0,1"
|
|
group.long 0x174++0x03
|
|
line.long 0x00 "CC7_PRE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "PRE,CC Channel PRE Value"
|
|
group.long 0x178++0x03
|
|
line.long 0x00 "CC7_BASE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "BASE,CC Channel BASE Value"
|
|
group.long 0x17C++0x03
|
|
line.long 0x00 "CC7_WRAP,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRAP,CC Channel WRAP Value"
|
|
tree.end
|
|
tree "PROTIMER_S"
|
|
base ad:0xA801C000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "IPVERSION,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "IPVERSION,IPVERSION"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "EN,No Description"
|
|
bitfld.long 0x00 0. "EN,EN" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTRL,No Description"
|
|
bitfld.long 0x00 29. "TOUT1MODE,Repeat Mode" "0: When started the TOUT1 counts down until it..,1: TOUT1 is stopped after it reaches zero"
|
|
bitfld.long 0x00 28. "TOUT0MODE,Repeat Mode" "0: When started the TOUT0 counts down until it..,1: TOUT0 is stopped after it reaches zero"
|
|
newline
|
|
bitfld.long 0x00 26.--27. "TOUT1SYNCSRC,Select timeout counter 1 event" "0: No synchronization,1: Pre-counter overflow event,2: Base counter overflow event,3: Wrap counter overflow event"
|
|
bitfld.long 0x00 24.--25. "TOUT1SRC,Selects clock to timeout counter 1" "0: No counting,1: Pre-counter overflow events,2: Base counter overflow events,3: Wrap counter overflow events"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "TOUT0SYNCSRC,Select timeout counter 0 event" "0: No synchronization,1: Pre-counter overflow event,2: Base counter overflow event,3: Wrap counter overflow event"
|
|
bitfld.long 0x00 20.--21. "TOUT0SRC,Selects clock to timeout counter 0" "0: No counting,1: Pre-counter overflow events,2: Base counter overflow events,3: Wrap counter overflow events"
|
|
newline
|
|
bitfld.long 0x00 16.--17. "WRAPCNTSRC,Selects clock to Wrap counter" "0: Disable Wrap counter,1: Pre-counter overflow events,2: Base counter overflow events,3: Do not use"
|
|
bitfld.long 0x00 12.--13. "BASECNTSRC,Selects clock to Base counter" "0: Disable base counter,1: Pre-counter overflow events,2: Do not use,3: Do not use"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "PRECNTSRC,Selects clock to Pre-counter" "0: Disable Pre-counter,1: Module clock,2: Do not use,3: Do not use"
|
|
bitfld.long 0x00 5. "ZEROSTARTEN,Start from zero enable" "0: Protimer starts from the previous count value,1: Protimer starts counting from zero"
|
|
newline
|
|
bitfld.long 0x00 4. "OSMEN,One-Shot Mode Enable" "0: Protimer continues to count when WRAP counter..,1: Protimer stops counting when WRAP counter.."
|
|
bitfld.long 0x00 2. "DMACLRACT,DMA Request Clear on Active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "DEBUGRUN,Debug Mode Run Enable" "0: PROTIMER is frozen in debug mode,1: PROTIMER is running in debug mode"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "CMD,No Description"
|
|
bitfld.long 0x00 18. "LBTSTOP,LBT sequence stop" "0,1"
|
|
bitfld.long 0x00 17. "LBTPAUSE,Pause LBT sequence" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "LBTSTART,LBT sequence start" "0,1"
|
|
bitfld.long 0x00 10. "FORCERXRX,Force to Rx state of rx_state" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "FORCERXIDLE,Force to Idle state of rx_state" "0,1"
|
|
bitfld.long 0x00 8. "FORCETXIDLE,Force to Idle state of tx_state" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "TOUT1STOP,Stop Timeout counter 0" "0,1"
|
|
bitfld.long 0x00 6. "TOUT1START,Start Timeout counter 1" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "TOUT0STOP,Stop Timeout counter 0" "0,1"
|
|
bitfld.long 0x00 4. "TOUT0START,Start Timeout counter 0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "STOP,Stop PROTIMER" "0,1"
|
|
bitfld.long 0x00 1. "RTCSYNCSTART,Start PROTIMER Synchronized with RTCC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "START,Start PROTIMER" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PRSCTRL,No Description"
|
|
bitfld.long 0x00 18.--19. "RTCCTRIGGEREDGE,RTCC Trigger Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 17. "RTCCTRIGGERPRSEN,Enable RTCC Trigger from PRS" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "STOPEDGE,Stop Command Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 9. "STOPPRSEN,Enable Protimer stop commands from PRS" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2.--3. "STARTEDGE,Start Command Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 1. "STARTPRSEN,Enable Protimer start commands from PRS" "0,1"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "STATUS,No Description"
|
|
bitfld.long 0x00 15. "ICV7,CC7 Capture Valid" "0,1"
|
|
bitfld.long 0x00 14. "ICV6,CC6 Capture Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "ICV5,CC5 Capture Valid" "0,1"
|
|
bitfld.long 0x00 12. "ICV4,CC4 Capture Valid" "0: PROTIMER_CC4_PRE -BASE or -WRAP does not..,1: PROTIMER_CC4_PRE -BASE or -WRAP contains a.."
|
|
newline
|
|
bitfld.long 0x00 11. "ICV3,CC3 Capture Valid" "0: PROTIMER_CC3_PRE -BASE or -WRAP does not..,1: PROTIMER_CC3_PRE -BASE or -WRAP contains a.."
|
|
bitfld.long 0x00 10. "ICV2,CC2 Capture Valid" "0: PROTIMER_CC2_PRE -BASE or -WRAP does not..,1: PROTIMER_CC2_PRE -BASE or -WRAP contains a.."
|
|
newline
|
|
bitfld.long 0x00 9. "ICV1,CC1 Capture Valid" "0: PROTIMER_CC1_PRE -BASE or -WRAP does not..,1: PROTIMER_CC1_PRE -BASE or -WRAP contains a.."
|
|
bitfld.long 0x00 8. "ICV0,CC0 Capture Valid" "0: PROTIMER_CC0_PRE -BASE or -WRAP does not..,1: PROTIMER_CC0_PRE -BASE or -WRAP contains a.."
|
|
newline
|
|
bitfld.long 0x00 7. "TOUT1SYNC,Timeout Counter 1 Synchronizing" "0,1"
|
|
bitfld.long 0x00 6. "TOUT1RUNNING,Timeout Counter 1 Running" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "TOUT0SYNC,Timeout Counter 0 Synchronizing" "0,1"
|
|
bitfld.long 0x00 4. "TOUT0RUNNING,Timeout Counter 0 Running" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "LBTPAUSED,LBT has been paused" "0,1"
|
|
bitfld.long 0x00 2. "LBTRUNNING,LBT Running" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "LBTSYNC,LBT Synchronizing" "0,1"
|
|
bitfld.long 0x00 0. "RUNNING,Running" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PRECNT,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "PRECNT,Pre Counter Value"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "BASECNT,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "BASECNT,Base Counter Value"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "WRAPCNT,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRAPCNT,Wrap Counter Value"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "BASEPRE,No Description"
|
|
hexmask.long.word 0x00 16.--31. 1. "BASECNTV,Base counter value"
|
|
hexmask.long.word 0x00 0.--15. 1. "PRECNTV,Pre counter value"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "LWRAPCNT,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "LWRAPCNT,Latched Wrap Counter Value"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "PRECNTTOPADJ,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "PRECNTTOPADJ,PRECNT Top Adjust Value"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "PRECNTTOP,No Description"
|
|
hexmask.long.word 0x00 8.--23. 1. "PRECNTTOP,PRECNT Top Value"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PRECNTTOPFRAC,PRECNT Top Fractional Value"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "BASECNTTOP,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "BASECNTTOP,BASECNT Top Value"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "WRAPCNTTOP,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRAPCNTTOP,WRAPCNT Top Value"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "TOUT0CNT,No Description"
|
|
hexmask.long.word 0x00 16.--31. 1. "TOUT0CNT,TOUT0CNT Value"
|
|
hexmask.long.word 0x00 0.--15. 1. "TOUT0PCNT,TOUT0PCNT Value"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "TOUT0CNTTOP,No Description"
|
|
hexmask.long.word 0x00 16.--31. 1. "TOUT0CNTTOP,TOUT0CNTTOP Value"
|
|
hexmask.long.word 0x00 0.--15. 1. "TOUT0PCNTTOP,TOUT0PCNTTOP Value"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "TOUT0COMP,No Description"
|
|
hexmask.long.word 0x00 16.--31. 1. "TOUT0CNTCOMP,TOUT0CNTCOMP Value"
|
|
hexmask.long.word 0x00 0.--15. 1. "TOUT0PCNTCOMP,TOUT0PCNTCOMP"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "TOUT1CNT,No Description"
|
|
hexmask.long.word 0x00 16.--31. 1. "TOUT1CNT,TOUT1CNT Value"
|
|
hexmask.long.word 0x00 0.--15. 1. "TOUT1PCNT,TOUT1PCNT Value"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "TOUT1CNTTOP,No Description"
|
|
hexmask.long.word 0x00 16.--31. 1. "TOUT1CNTTOP,TOUT1CNTTOP Value"
|
|
hexmask.long.word 0x00 0.--15. 1. "TOUT1PCNTTOP,TOUT1PCNTTOP Value"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "TOUT1COMP,No Description"
|
|
hexmask.long.word 0x00 16.--31. 1. "TOUT1CNTCOMP,TOUT1CNTCOMP Value"
|
|
hexmask.long.word 0x00 0.--15. 1. "TOUT1PCNTCOMP,TOUT1PCNTCOMP"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "LBTCTRL,No Description"
|
|
bitfld.long 0x00 24.--27. "RETRYLIMIT,Retry Limit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20. "FIXEDBACKOFF,Fixed backoff" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "CCAREPEAT,Clear Channel Assessment Repeat" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--12. "CCADELAY,Clear Channel Assessment Delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "MAXEXP,Maximum Exponent" "0: MAXEXP value = 0,1: MAXEXP value = 1,2: MAXEXP value = 2,3: MAXEXP value = 3,4: MAXEXP value = 4,5: MAXEXP value = 5,6: MAXEXP value = 6,7: MAXEXP value = 7,8: MAXEXP value = 8,?..."
|
|
bitfld.long 0x00 0.--3. "STARTEXP,Start Exponent" "0: STARTEXP value = 0 (used for Fast TX),1: STARTEXP value = 1,2: STARTEXP value = 2,3: STARTEXP value = 3,4: STARTEXP value = 4,5: STARTEXP value = 5,6: STARTEXP value = 6,7: STARTEXP value = 7,8: STARTEXP value = 8,?..."
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "LBTPRSCTRL,No Description"
|
|
bitfld.long 0x00 24. "LBTSTOPPRSEN,Enable LBT stop commands from PRS" "0,1"
|
|
bitfld.long 0x00 16. "LBTPAUSEPRSEN,Enable LBT pause commands from PRS" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "LBTSTARTPRSEN,Enable LBT start commands from PRS" "0,1"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "LBTSTATE,No Description"
|
|
hexmask.long.word 0x00 16.--31. 1. "TOUT0CNT,TOUT0CNT value to be saved"
|
|
hexmask.long.word 0x00 0.--15. 1. "TOUT0PCNT,TOUT0PCNT value to be saved"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "RANDOM,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "RANDOM,Pseudo Random Value"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "IF,No Description"
|
|
bitfld.long 0x00 29. "TOUT0MATCHLBT,TOUT0 compare match interrupt flag" "0,1"
|
|
bitfld.long 0x00 28. "RTCCSYNCHED,PROTIMER synchronized with the RTCC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "LBTRETRY,Listen Before Talk Retry" "0,1"
|
|
bitfld.long 0x00 26. "LBTPAUSED,Listen Before Talk Paused" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "LBTFAILURE,Listen Before Talk Failure" "0,1"
|
|
bitfld.long 0x00 24. "LBTSUCCESS,Listen Before Talk Success" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "COF7,CC Channel 7 Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 22. "COF6,CC Channel 6 Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "COF5,CC Channel 5 Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 20. "COF4,CC Channel 4 Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "COF3,CC Channel 3 Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 18. "COF2,CC Channel 2 Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "COF1,CC Channel 1 Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 16. "COF0,CC Channel 0 Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "CC7,CC Channel 7 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. "CC6,CC Channel 6 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "CC5,CC Channel 5 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 12. "CC4,CC Channel 4 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "CC3,CC Channel 3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. "CC2,CC Channel 2 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "CC1,CC Channel 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. "CC0,CC Channel 0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "TOUT1MATCH,TOUT1 compare match interrupt flag" "0,1"
|
|
bitfld.long 0x00 6. "TOUT0MATCH,TOUT0 compare match interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "TOUT1,TOUT1 underflow interrupt flag" "0,1"
|
|
bitfld.long 0x00 4. "TOUT0,TOUT0 underflow interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "WRAPCNTOF,WRAPCNT Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "BASECNTOF,BASECNT Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "PRECNTOF,PRECNT Overflow Interrupt Flag" "0,1"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "IEN,No Description"
|
|
bitfld.long 0x00 29. "TOUT0MATCHLBT,TOUT0MATCHLBT Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 28. "RTCCSYNCHED,RTCCSYNCHED Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "LBTRETRY,LBTRETRY Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 26. "LBTPAUSED,LBTPAUSED Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "LBTFAILURE,LBTFAILURE Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 24. "LBTSUCCESS,LBTSUCCESS Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "COF7,COF7 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 22. "COF6,COF6 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "COF5,COF5 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 20. "COF4,COF4 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "COF3,COF3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 18. "COF2,COF2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "COF1,COF1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 16. "COF0,COF0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "CC7,CC7 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 14. "CC6,CC6 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "CC5,CC5 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 12. "CC4,CC4 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "CC3,CC3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 10. "CC2,CC2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "CC1,CC1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 8. "CC0,CC0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "TOUT1MATCH,TOUT1MATCH Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 6. "TOUT0MATCH,TOUT0MATCH Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "TOUT1,TOUT1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 4. "TOUT0,TOUT0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "WRAPCNTOF,WRAPCNTOF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. "BASECNTOF,BASECNTOF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "PRECNTOF,PRECNTOF Interrupt Enable" "0,1"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "RXCTRL,No Description"
|
|
bitfld.long 0x00 24.--28. "RXCLREVENT2,Second event that clears RX req signal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--20. "RXCLREVENT1,First event that clears RX req signal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "RXSETEVENT2,Second event that sets RX req signal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "RXSETEVENT1,First event that sets RX req signal" "0: Request is never set,1: Does not wait for any particular event,2: Pre counter overflow,3: Base counter overflow,4: Wrap counter overflow,5: Timeout counter 0 underflow,6: Timeout counter 1 underflow,7: Timeout counter 0 match,8: Timeout counter 1 match,9: Channel 0 Capture/Compare event,10: Channel 1 Capture/Compare event,11: Channel 2 Capture/Compare event,12: Channel 3 Capture/Compare event,13: Channel 4 Capture/Compare event,14: MOD indicated that TX completed,15: FRC indicated that RX completed,16: MOD/FRC indicated that TX or RX completed,17: DEMOD indicated that syncword 0 was detected,18: DEMOD indicated that syncword 1 was detected,19: DEMOD indicated that syncword 0 or 1 was..,20: LBT completed successfully,21: LBT detected occupied channel and will try..,22: LBT could not start transmission,23: Any LBT event,24: A CCA measurement completed,25: A CCA measurement completed and channel was..,26: A CCA measurement completed and channel was..,27: Timeout counter 0 match occurred during LBT..,?..."
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "TXCTRL,No Description"
|
|
bitfld.long 0x00 8.--12. "TXSETEVENT2,Second event that sets TX req signal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. "TXSETEVENT1,First event that sets TX req signal" "0: Request is never set,1: Does not wait for any particular event,2: Pre counter overflow,3: Base counter overflow,4: Wrap counter overflow,5: Timeout counter 0 underflow,6: Timeout counter 1 underflow,7: Timeout counter 0 match,8: Timeout counter 1 match,9: Channel 0 Capture/Compare event,10: Channel 1 Capture/Compare event,11: Channel 2 Capture/Compare event,12: Channel 3 Capture/Compare event,13: Channel 4 Capture/Compare event,14: MOD indicated that TX completed,15: FRC indicated that RX completed,16: MOD/FRC indicated that TX or RX completed,17: DEMOD indicated that syncword 0 was detected,18: DEMOD indicated that syncword 1 was detected,19: DEMOD indicated that syncword 0 or 1 was..,20: LBT completed successfully,21: LBT detected occupied channel and will try..,22: LBT could not start transmission,23: Any LBT event,24: A CCA measurement completed,25: A CCA measurement completed and channel was..,26: A CCA measurement completed and channel was..,27: Timeout counter 0 match occurred during LBT..,?..."
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "ETSI,No Description"
|
|
hexmask.long.word 0x00 10.--25. 1. "CCAFIXED,Fixed listening time"
|
|
hexmask.long.byte 0x00 2.--9. 1. "RXWARMTHLD,Minimum backoff period for RXWARM"
|
|
newline
|
|
bitfld.long 0x00 1. "GRANULARLESSTHANRXWARM,Granular less than RXWARM" "0,1"
|
|
bitfld.long 0x00 0. "ETSIEN,ETSI LBT enabling" "0,1"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "LBTSTATE1,No Description"
|
|
bitfld.long 0x00 8.--11. "RETRYCNT,LBT Retry counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. "EXP,LBT Exponent" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "CCACNT,Current CCA counter value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "RANDOMFW0,No Description"
|
|
hexmask.long.word 0x00 18.--26. 1. "RANDOM2,Linear random backoff period from FW"
|
|
hexmask.long.word 0x00 9.--17. 1. "RANDOM1,Linear random backoff period from FW"
|
|
newline
|
|
hexmask.long.word 0x00 0.--8. 1. "RANDOM0,Linear random backoff period from FW"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "RANDOMFW1,No Description"
|
|
hexmask.long.word 0x00 18.--26. 1. "RANDOM5,Linear random backoff period from FW"
|
|
hexmask.long.word 0x00 9.--17. 1. "RANDOM4,Linear random backoff period from FW"
|
|
newline
|
|
hexmask.long.word 0x00 0.--8. 1. "RANDOM3,Linear random backoff period from FW"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "RANDOMFW2,No Description"
|
|
hexmask.long.word 0x00 9.--17. 1. "RANDOM7,Linear random backoff period from FW"
|
|
hexmask.long.word 0x00 0.--8. 1. "RANDOM6,Linear random backoff period from FW"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "SEQIF,No Description"
|
|
bitfld.long 0x00 29. "TOUT0MATCHLBT,TOUT0 compare match interrupt flag" "0,1"
|
|
bitfld.long 0x00 28. "RTCCSYNCHED,PROTIMER synchronized with the RTCC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "LBTRETRY,Listen Before Talk Retry" "0,1"
|
|
bitfld.long 0x00 26. "LBTPAUSED,Listen Before Talk Paused" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "LBTFAILURE,Listen Before Talk Failure" "0,1"
|
|
bitfld.long 0x00 24. "LBTSUCCESS,Listen Before Talk Success" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "COF7,CC Channel 7 Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 22. "COF6,CC Channel 6 Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "COF5,CC Channel 5 Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 20. "COF4,CC Channel 4 Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "COF3,CC Channel 3 Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 18. "COF2,CC Channel 2 Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "COF1,CC Channel 1 Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 16. "COF0,CC Channel 0 Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "CC7,CC Channel 7 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. "CC6,CC Channel 6 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "CC5,CC Channel 5 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 12. "CC4,CC Channel 4 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "CC3,CC Channel 3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. "CC2,CC Channel 2 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "CC1,CC Channel 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. "CC0,CC Channel 0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "TOUT1MATCH,TOUT1 compare match interrupt flag" "0,1"
|
|
bitfld.long 0x00 6. "TOUT0MATCH,TOUT0 compare match interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "TOUT1,TOUT1 underflow interrupt flag" "0,1"
|
|
bitfld.long 0x00 4. "TOUT0,TOUT0 underflow interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "WRAPCNTOF,WRAPCNT Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "BASECNTOF,BASECNT Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "PRECNTOF,PRECNT Overflow Interrupt Flag" "0,1"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "SEQIEN,No Description"
|
|
bitfld.long 0x00 29. "TOUT0MATCHLBT,TOUT0MATCHLBT Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 28. "RTCCSYNCHED,RTCCSYNCHED Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "LBTRETRY,LBTRETRY Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 26. "LBTPAUSED,LBTPAUSED Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "LBTFAILURE,LBTFAILURE Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 24. "LBTSUCCESS,LBTSUCCESS Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "COF7,COF7 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 22. "COF6,COF6 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "COF5,COF5 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 20. "COF4,COF4 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "COF3,COF3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 18. "COF2,COF2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "COF1,COF1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 16. "COF0,COF0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "CC7,CC7 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 14. "CC6,CC6 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "CC5,CC5 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 12. "CC4,CC4 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "CC3,CC3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 10. "CC2,CC2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "CC1,CC1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 8. "CC0,CC0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "TOUT1MATCH,TOUT1MATCH Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 6. "TOUT0MATCH,TOUT0MATCH Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "TOUT1,TOUT1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 4. "TOUT0,TOUT0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "WRAPCNTOF,WRAPCNTOF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. "BASECNTOF,BASECNTOF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "PRECNTOF,PRECNTOF Interrupt Enable" "0,1"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "CC0_CTRL,No Description"
|
|
bitfld.long 0x00 25.--26. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 21.--24. "INSEL,Capture input selection" "0: Use the selected PRS channel,1: TX completed,2: RX completed,3: TX or RX completed,4: Demodulator found sync word 0,5: Demodulator found sync word 1,6: Demodulator found sync word 0 or 1,7: Modulator sync word sent,8: RX at end of frame from demodulator,9: PRORTC capture/compare 0,10: PRORTC capture/compare 1,?..."
|
|
newline
|
|
bitfld.long 0x00 14. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one HFRADIOCLK..,1: Should be used when OFSEL OFOA or MOA are.."
|
|
bitfld.long 0x00 12.--13. "OFSEL,Select counter for OFOA bits" "0: Use PRECNT overflow,1: Use BASECNT overflow,2: Use WRAPCNT overflow,3: DISABLED"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "OFOA,Overflow Output Action" "0: No action,1: Toggle output when the selected counter has..,2: Clear output when the selected counter has an..,3: Set output when the selected counter has an.."
|
|
bitfld.long 0x00 8.--9. "MOA,Match Output Action" "0: No action on compare match,1: Toggle output on compare match in COMPARE mode,2: Clear output on compare match in COMPARE mode,3: Set output on compare match in COMPARE mode"
|
|
newline
|
|
bitfld.long 0x00 6. "OUTINV,Output Invert" "0,1"
|
|
bitfld.long 0x00 5. "OIST,Output Initial State" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "WRAPMATCHEN,Enable WRAPCNT matching" "0,1"
|
|
bitfld.long 0x00 3. "BASEMATCHEN,Enable BASECNT matching" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PREMATCHEN,Enable PRECNT matching" "0,1"
|
|
bitfld.long 0x00 1. "CCMODE,Compare/Capture mode" "0: Compare mode selected,1: Capture mode selected"
|
|
newline
|
|
bitfld.long 0x00 0. "ENABLE,Channel Enable" "0,1"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "CC0_PRE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "PRE,CC Channel PRE Value"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "CC0_BASE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "BASE,CC Channel BASE Value"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "CC0_WRAP,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRAP,CC Channel WRAP Value"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "CC1_CTRL,No Description"
|
|
bitfld.long 0x00 25.--26. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 21.--24. "INSEL,Capture input selection" "0: Use the selected PRS channel,1: TX completed,2: RX completed,3: TX or RX completed,4: Demodulator found sync word 0,5: Demodulator found sync word 1,6: Demodulator found sync word 0 or 1,7: Modulator sync word sent,8: RX at end of frame from demodulator,9: PRORTC capture/compare 0,10: PRORTC capture/compare 1,?..."
|
|
newline
|
|
bitfld.long 0x00 14. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one HFRADIOCLK..,1: Should be used when OFSEL OFOA or MOA are.."
|
|
bitfld.long 0x00 12.--13. "OFSEL,Select counter for OFOA bits" "0: Use PRECNT overflow,1: Use BASECNT overflow,2: Use WRAPCNT overflow,3: DISABLED"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "OFOA,Overflow Output Action" "0: No action,1: Toggle output when the selected counter has..,2: Clear output when the selected counter has an..,3: Set output when the selected counter has an.."
|
|
bitfld.long 0x00 8.--9. "MOA,Match Output Action" "0: No action on compare match,1: Toggle output on compare match in COMPARE mode,2: Clear output on compare match in COMPARE mode,3: Set output on compare match in COMPARE mode"
|
|
newline
|
|
bitfld.long 0x00 6. "OUTINV,Output Invert" "0,1"
|
|
bitfld.long 0x00 5. "OIST,Output Initial State" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "WRAPMATCHEN,Enable WRAPCNT matching" "0,1"
|
|
bitfld.long 0x00 3. "BASEMATCHEN,Enable BASECNT matching" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PREMATCHEN,Enable PRECNT matching" "0,1"
|
|
bitfld.long 0x00 1. "CCMODE,Compare/Capture mode" "0: Compare mode selected,1: Capture mode selected"
|
|
newline
|
|
bitfld.long 0x00 0. "ENABLE,Channel Enable" "0,1"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "CC1_PRE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "PRE,CC Channel PRE Value"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "CC1_BASE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "BASE,CC Channel BASE Value"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "CC1_WRAP,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRAP,CC Channel WRAP Value"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "CC2_CTRL,No Description"
|
|
bitfld.long 0x00 25.--26. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 21.--24. "INSEL,Capture input selection" "0: Use the selected PRS channel,1: TX completed,2: RX completed,3: TX or RX completed,4: Demodulator found sync word 0,5: Demodulator found sync word 1,6: Demodulator found sync word 0 or 1,7: Modulator sync word sent,8: RX at end of frame from demodulator,9: PRORTC capture/compare 0,10: PRORTC capture/compare 1,?..."
|
|
newline
|
|
bitfld.long 0x00 14. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one HFRADIOCLK..,1: Should be used when OFSEL OFOA or MOA are.."
|
|
bitfld.long 0x00 12.--13. "OFSEL,Select counter for OFOA bits" "0: Use PRECNT overflow,1: Use BASECNT overflow,2: Use WRAPCNT overflow,3: DISABLED"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "OFOA,Overflow Output Action" "0: No action,1: Toggle output when the selected counter has..,2: Clear output when the selected counter has an..,3: Set output when the selected counter has an.."
|
|
bitfld.long 0x00 8.--9. "MOA,Match Output Action" "0: No action on compare match,1: Toggle output on compare match in COMPARE mode,2: Clear output on compare match in COMPARE mode,3: Set output on compare match in COMPARE mode"
|
|
newline
|
|
bitfld.long 0x00 6. "OUTINV,Output Invert" "0,1"
|
|
bitfld.long 0x00 5. "OIST,Output Initial State" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "WRAPMATCHEN,Enable WRAPCNT matching" "0,1"
|
|
bitfld.long 0x00 3. "BASEMATCHEN,Enable BASECNT matching" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PREMATCHEN,Enable PRECNT matching" "0,1"
|
|
bitfld.long 0x00 1. "CCMODE,Compare/Capture mode" "0: Compare mode selected,1: Capture mode selected"
|
|
newline
|
|
bitfld.long 0x00 0. "ENABLE,Channel Enable" "0,1"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "CC2_PRE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "PRE,CC Channel PRE Value"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "CC2_BASE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "BASE,CC Channel BASE Value"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "CC2_WRAP,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRAP,CC Channel WRAP Value"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "CC3_CTRL,No Description"
|
|
bitfld.long 0x00 25.--26. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 21.--24. "INSEL,Capture input selection" "0: Use the selected PRS channel,1: TX completed,2: RX completed,3: TX or RX completed,4: Demodulator found sync word 0,5: Demodulator found sync word 1,6: Demodulator found sync word 0 or 1,7: Modulator sync word sent,8: RX at end of frame from demodulator,9: PRORTC capture/compare 0,10: PRORTC capture/compare 1,?..."
|
|
newline
|
|
bitfld.long 0x00 14. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one HFRADIOCLK..,1: Should be used when OFSEL OFOA or MOA are.."
|
|
bitfld.long 0x00 12.--13. "OFSEL,Select counter for OFOA bits" "0: Use PRECNT overflow,1: Use BASECNT overflow,2: Use WRAPCNT overflow,3: DISABLED"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "OFOA,Overflow Output Action" "0: No action,1: Toggle output when the selected counter has..,2: Clear output when the selected counter has an..,3: Set output when the selected counter has an.."
|
|
bitfld.long 0x00 8.--9. "MOA,Match Output Action" "0: No action on compare match,1: Toggle output on compare match in COMPARE mode,2: Clear output on compare match in COMPARE mode,3: Set output on compare match in COMPARE mode"
|
|
newline
|
|
bitfld.long 0x00 6. "OUTINV,Output Invert" "0,1"
|
|
bitfld.long 0x00 5. "OIST,Output Initial State" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "WRAPMATCHEN,Enable WRAPCNT matching" "0,1"
|
|
bitfld.long 0x00 3. "BASEMATCHEN,Enable BASECNT matching" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PREMATCHEN,Enable PRECNT matching" "0,1"
|
|
bitfld.long 0x00 1. "CCMODE,Compare/Capture mode" "0: Compare mode selected,1: Capture mode selected"
|
|
newline
|
|
bitfld.long 0x00 0. "ENABLE,Channel Enable" "0,1"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "CC3_PRE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "PRE,CC Channel PRE Value"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "CC3_BASE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "BASE,CC Channel BASE Value"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "CC3_WRAP,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRAP,CC Channel WRAP Value"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "CC4_CTRL,No Description"
|
|
bitfld.long 0x00 25.--26. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 21.--24. "INSEL,Capture input selection" "0: Use the selected PRS channel,1: TX completed,2: RX completed,3: TX or RX completed,4: Demodulator found sync word 0,5: Demodulator found sync word 1,6: Demodulator found sync word 0 or 1,7: Modulator sync word sent,8: RX at end of frame from demodulator,9: PRORTC capture/compare 0,10: PRORTC capture/compare 1,?..."
|
|
newline
|
|
bitfld.long 0x00 14. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one HFRADIOCLK..,1: Should be used when OFSEL OFOA or MOA are.."
|
|
bitfld.long 0x00 12.--13. "OFSEL,Select counter for OFOA bits" "0: Use PRECNT overflow,1: Use BASECNT overflow,2: Use WRAPCNT overflow,3: DISABLED"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "OFOA,Overflow Output Action" "0: No action,1: Toggle output when the selected counter has..,2: Clear output when the selected counter has an..,3: Set output when the selected counter has an.."
|
|
bitfld.long 0x00 8.--9. "MOA,Match Output Action" "0: No action on compare match,1: Toggle output on compare match in COMPARE mode,2: Clear output on compare match in COMPARE mode,3: Set output on compare match in COMPARE mode"
|
|
newline
|
|
bitfld.long 0x00 6. "OUTINV,Output Invert" "0,1"
|
|
bitfld.long 0x00 5. "OIST,Output Initial State" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "WRAPMATCHEN,Enable WRAPCNT matching" "0,1"
|
|
bitfld.long 0x00 3. "BASEMATCHEN,Enable BASECNT matching" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PREMATCHEN,Enable PRECNT matching" "0,1"
|
|
bitfld.long 0x00 1. "CCMODE,Compare/Capture mode" "0: Compare mode selected,1: Capture mode selected"
|
|
newline
|
|
bitfld.long 0x00 0. "ENABLE,Channel Enable" "0,1"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "CC4_PRE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "PRE,CC Channel PRE Value"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "CC4_BASE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "BASE,CC Channel BASE Value"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "CC4_WRAP,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRAP,CC Channel WRAP Value"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "CC5_CTRL,No Description"
|
|
bitfld.long 0x00 25.--26. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 21.--24. "INSEL,Capture input selection" "0: Use the selected PRS channel,1: TX completed,2: RX completed,3: TX or RX completed,4: Demodulator found sync word 0,5: Demodulator found sync word 1,6: Demodulator found sync word 0 or 1,7: Modulator sync word sent,8: RX at end of frame from demodulator,9: PRORTC capture/compare 0,10: PRORTC capture/compare 1,?..."
|
|
newline
|
|
bitfld.long 0x00 14. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one HFRADIOCLK..,1: Should be used when OFSEL OFOA or MOA are.."
|
|
bitfld.long 0x00 12.--13. "OFSEL,Select counter for OFOA bits" "0: Use PRECNT overflow,1: Use BASECNT overflow,2: Use WRAPCNT overflow,3: DISABLED"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "OFOA,Overflow Output Action" "0: No action,1: Toggle output when the selected counter has..,2: Clear output when the selected counter has an..,3: Set output when the selected counter has an.."
|
|
bitfld.long 0x00 8.--9. "MOA,Match Output Action" "0: No action on compare match,1: Toggle output on compare match in COMPARE mode,2: Clear output on compare match in COMPARE mode,3: Set output on compare match in COMPARE mode"
|
|
newline
|
|
bitfld.long 0x00 6. "OUTINV,Output Invert" "0,1"
|
|
bitfld.long 0x00 5. "OIST,Output Initial State" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "WRAPMATCHEN,Enable WRAPCNT matching" "0,1"
|
|
bitfld.long 0x00 3. "BASEMATCHEN,Enable BASECNT matching" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PREMATCHEN,Enable PRECNT matching" "0,1"
|
|
bitfld.long 0x00 1. "CCMODE,Compare/Capture mode" "0: Compare mode selected,1: Capture mode selected"
|
|
newline
|
|
bitfld.long 0x00 0. "ENABLE,Channel Enable" "0,1"
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "CC5_PRE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "PRE,CC Channel PRE Value"
|
|
group.long 0x158++0x03
|
|
line.long 0x00 "CC5_BASE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "BASE,CC Channel BASE Value"
|
|
group.long 0x15C++0x03
|
|
line.long 0x00 "CC5_WRAP,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRAP,CC Channel WRAP Value"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "CC6_CTRL,No Description"
|
|
bitfld.long 0x00 25.--26. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 21.--24. "INSEL,Capture input selection" "0: Use the selected PRS channel,1: TX completed,2: RX completed,3: TX or RX completed,4: Demodulator found sync word 0,5: Demodulator found sync word 1,6: Demodulator found sync word 0 or 1,7: Modulator sync word sent,8: RX at end of frame from demodulator,9: PRORTC capture/compare 0,10: PRORTC capture/compare 1,?..."
|
|
newline
|
|
bitfld.long 0x00 14. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one HFRADIOCLK..,1: Should be used when OFSEL OFOA or MOA are.."
|
|
bitfld.long 0x00 12.--13. "OFSEL,Select counter for OFOA bits" "0: Use PRECNT overflow,1: Use BASECNT overflow,2: Use WRAPCNT overflow,3: DISABLED"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "OFOA,Overflow Output Action" "0: No action,1: Toggle output when the selected counter has..,2: Clear output when the selected counter has an..,3: Set output when the selected counter has an.."
|
|
bitfld.long 0x00 8.--9. "MOA,Match Output Action" "0: No action on compare match,1: Toggle output on compare match in COMPARE mode,2: Clear output on compare match in COMPARE mode,3: Set output on compare match in COMPARE mode"
|
|
newline
|
|
bitfld.long 0x00 6. "OUTINV,Output Invert" "0,1"
|
|
bitfld.long 0x00 5. "OIST,Output Initial State" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "WRAPMATCHEN,Enable WRAPCNT matching" "0,1"
|
|
bitfld.long 0x00 3. "BASEMATCHEN,Enable BASECNT matching" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PREMATCHEN,Enable PRECNT matching" "0,1"
|
|
bitfld.long 0x00 1. "CCMODE,Compare/Capture mode" "0: Compare mode selected,1: Capture mode selected"
|
|
newline
|
|
bitfld.long 0x00 0. "ENABLE,Channel Enable" "0,1"
|
|
group.long 0x164++0x03
|
|
line.long 0x00 "CC6_PRE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "PRE,CC Channel PRE Value"
|
|
group.long 0x168++0x03
|
|
line.long 0x00 "CC6_BASE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "BASE,CC Channel BASE Value"
|
|
group.long 0x16C++0x03
|
|
line.long 0x00 "CC6_WRAP,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRAP,CC Channel WRAP Value"
|
|
group.long 0x170++0x03
|
|
line.long 0x00 "CC7_CTRL,No Description"
|
|
bitfld.long 0x00 25.--26. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 21.--24. "INSEL,Capture input selection" "0: Use the selected PRS channel,1: TX completed,2: RX completed,3: TX or RX completed,4: Demodulator found sync word 0,5: Demodulator found sync word 1,6: Demodulator found sync word 0 or 1,7: Modulator sync word sent,8: RX at end of frame from demodulator,9: PRORTC capture/compare 0,10: PRORTC capture/compare 1,?..."
|
|
newline
|
|
bitfld.long 0x00 14. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one HFRADIOCLK..,1: Should be used when OFSEL OFOA or MOA are.."
|
|
bitfld.long 0x00 12.--13. "OFSEL,Select counter for OFOA bits" "0: Use PRECNT overflow,1: Use BASECNT overflow,2: Use WRAPCNT overflow,3: DISABLED"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "OFOA,Overflow Output Action" "0: No action,1: Toggle output when the selected counter has..,2: Clear output when the selected counter has an..,3: Set output when the selected counter has an.."
|
|
bitfld.long 0x00 8.--9. "MOA,Match Output Action" "0: No action on compare match,1: Toggle output on compare match in COMPARE mode,2: Clear output on compare match in COMPARE mode,3: Set output on compare match in COMPARE mode"
|
|
newline
|
|
bitfld.long 0x00 6. "OUTINV,Output Invert" "0,1"
|
|
bitfld.long 0x00 5. "OIST,Output Initial State" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "WRAPMATCHEN,Enable WRAPCNT matching" "0,1"
|
|
bitfld.long 0x00 3. "BASEMATCHEN,Enable BASECNT matching" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PREMATCHEN,Enable PRECNT matching" "0,1"
|
|
bitfld.long 0x00 1. "CCMODE,Compare/Capture mode" "0: Compare mode selected,1: Capture mode selected"
|
|
newline
|
|
bitfld.long 0x00 0. "ENABLE,Channel Enable" "0,1"
|
|
group.long 0x174++0x03
|
|
line.long 0x00 "CC7_PRE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "PRE,CC Channel PRE Value"
|
|
group.long 0x178++0x03
|
|
line.long 0x00 "CC7_BASE,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "BASE,CC Channel BASE Value"
|
|
group.long 0x17C++0x03
|
|
line.long 0x00 "CC7_WRAP,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "WRAP,CC Channel WRAP Value"
|
|
tree.end
|
|
tree.end
|
|
tree "PRS (Peripheral Reflex System)"
|
|
base ad:0x0
|
|
tree "PRS_NS"
|
|
base ad:0x50038000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP version ID"
|
|
wgroup.long 0x8++0x3
|
|
line.long 0x0 "ASYNC_SWPULSE,No Description"
|
|
bitfld.long 0x0 11. "CH11PULSE,Channel pulse" "0,1"
|
|
bitfld.long 0x0 10. "CH10PULSE,Channel pulse" "0,1"
|
|
bitfld.long 0x0 9. "CH9PULSE,Channel pulse" "0,1"
|
|
bitfld.long 0x0 8. "CH8PULSE,Channel pulse" "0,1"
|
|
bitfld.long 0x0 7. "CH7PULSE,Channel pulse" "0,1"
|
|
bitfld.long 0x0 6. "CH6PULSE,Channel pulse" "0,1"
|
|
bitfld.long 0x0 5. "CH5PULSE,Channel pulse" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "CH4PULSE,Channel pulse" "0,1"
|
|
bitfld.long 0x0 3. "CH3PULSE,Channel pulse" "0,1"
|
|
bitfld.long 0x0 2. "CH2PULSE,Channel pulse" "0,1"
|
|
bitfld.long 0x0 1. "CH1PULSE,Channel pulse" "0,1"
|
|
bitfld.long 0x0 0. "CH0PULSE,Channel pulse" "0,1"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "ASYNC_SWLEVEL,No Description"
|
|
bitfld.long 0x0 11. "CH11LEVEL,Channel Level" "0,1"
|
|
bitfld.long 0x0 10. "CH10LEVEL,Channel Level" "0,1"
|
|
bitfld.long 0x0 9. "CH9LEVEL,Channel Level" "0,1"
|
|
bitfld.long 0x0 8. "CH8LEVEL,Channel Level" "0,1"
|
|
bitfld.long 0x0 7. "CH7LEVEL,Channel Level" "0,1"
|
|
bitfld.long 0x0 6. "CH6LEVEL,Channel Level" "0,1"
|
|
bitfld.long 0x0 5. "CH5LEVEL,Channel Level" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "CH4LEVEL,Channel Level" "0,1"
|
|
bitfld.long 0x0 3. "CH3LEVEL,Channel Level" "0,1"
|
|
bitfld.long 0x0 2. "CH2LEVEL,Channel Level" "0,1"
|
|
bitfld.long 0x0 1. "CH1LEVEL,Channel Level" "0,1"
|
|
bitfld.long 0x0 0. "CH0LEVEL,Channel Level" "0,1"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "ASYNC_PEEK,No Description"
|
|
bitfld.long 0x0 11. "CH11VAL,Channel 11 Current Value" "0,1"
|
|
bitfld.long 0x0 10. "CH10VAL,Channel 10 Current Value" "0,1"
|
|
bitfld.long 0x0 9. "CH9VAL,Channel 9 Current Value" "0,1"
|
|
bitfld.long 0x0 8. "CH8VAL,Channel 8 Current Value" "0,1"
|
|
bitfld.long 0x0 7. "CH7VAL,Channel 7 Current Value" "0,1"
|
|
bitfld.long 0x0 6. "CH6VAL,Channel 6 Current Value" "0,1"
|
|
bitfld.long 0x0 5. "CH5VAL,Channel 5 Current Value" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "CH4VAL,Channel 4 Current Value" "0,1"
|
|
bitfld.long 0x0 3. "CH3VAL,Channel 3 Current Value" "0,1"
|
|
bitfld.long 0x0 2. "CH2VAL,Channel 2 Current Value" "0,1"
|
|
bitfld.long 0x0 1. "CH1VAL,Channel 1 Current Value" "0,1"
|
|
bitfld.long 0x0 0. "CH0VAL,Channel 0 Current Value" "0,1"
|
|
line.long 0x4 "SYNC_PEEK,No Description"
|
|
bitfld.long 0x4 3. "CH3VAL,Channel Value" "0,1"
|
|
bitfld.long 0x4 2. "CH2VAL,Channel Value" "0,1"
|
|
bitfld.long 0x4 1. "CH1VAL,Channel Value" "0,1"
|
|
bitfld.long 0x4 0. "CH0VAL,Channel Value" "0,1"
|
|
group.long 0x18++0x47
|
|
line.long 0x0 "ASYNC_CH0_CTRL,No Description"
|
|
hexmask.long.byte 0x0 24.--27. 1. "AUXSEL,Auxiliary LUT Input Select"
|
|
hexmask.long.byte 0x0 16.--19. 1. "FNSEL,Function Select"
|
|
hexmask.long.byte 0x0 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x0 0.--2. "SIGSEL,Signal Select" "0: NONE,?,?,?,?,?,?,?"
|
|
line.long 0x4 "ASYNC_CH1_CTRL,No Description"
|
|
hexmask.long.byte 0x4 24.--27. 1. "AUXSEL,Auxiliary LUT Input Select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "FNSEL,Function Select"
|
|
hexmask.long.byte 0x4 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x4 0.--2. "SIGSEL,Signal Select" "0: NONE,?,?,?,?,?,?,?"
|
|
line.long 0x8 "ASYNC_CH2_CTRL,No Description"
|
|
hexmask.long.byte 0x8 24.--27. 1. "AUXSEL,Auxiliary LUT Input Select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "FNSEL,Function Select"
|
|
hexmask.long.byte 0x8 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x8 0.--2. "SIGSEL,Signal Select" "0: NONE,?,?,?,?,?,?,?"
|
|
line.long 0xC "ASYNC_CH3_CTRL,No Description"
|
|
hexmask.long.byte 0xC 24.--27. 1. "AUXSEL,Auxiliary LUT Input Select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "FNSEL,Function Select"
|
|
hexmask.long.byte 0xC 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0xC 0.--2. "SIGSEL,Signal Select" "0: NONE,?,?,?,?,?,?,?"
|
|
line.long 0x10 "ASYNC_CH4_CTRL,No Description"
|
|
hexmask.long.byte 0x10 24.--27. 1. "AUXSEL,Auxiliary LUT Input Select"
|
|
hexmask.long.byte 0x10 16.--19. 1. "FNSEL,Function Select"
|
|
hexmask.long.byte 0x10 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x10 0.--2. "SIGSEL,Signal Select" "0: NONE,?,?,?,?,?,?,?"
|
|
line.long 0x14 "ASYNC_CH5_CTRL,No Description"
|
|
hexmask.long.byte 0x14 24.--27. 1. "AUXSEL,Auxiliary LUT Input Select"
|
|
hexmask.long.byte 0x14 16.--19. 1. "FNSEL,Function Select"
|
|
hexmask.long.byte 0x14 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x14 0.--2. "SIGSEL,Signal Select" "0: NONE,?,?,?,?,?,?,?"
|
|
line.long 0x18 "ASYNC_CH6_CTRL,No Description"
|
|
hexmask.long.byte 0x18 24.--27. 1. "AUXSEL,Auxiliary LUT Input Select"
|
|
hexmask.long.byte 0x18 16.--19. 1. "FNSEL,Function Select"
|
|
hexmask.long.byte 0x18 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x18 0.--2. "SIGSEL,Signal Select" "0: NONE,?,?,?,?,?,?,?"
|
|
line.long 0x1C "ASYNC_CH7_CTRL,No Description"
|
|
hexmask.long.byte 0x1C 24.--27. 1. "AUXSEL,Auxiliary LUT Input Select"
|
|
hexmask.long.byte 0x1C 16.--19. 1. "FNSEL,Function Select"
|
|
hexmask.long.byte 0x1C 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x1C 0.--2. "SIGSEL,Signal Select" "0: NONE,?,?,?,?,?,?,?"
|
|
line.long 0x20 "ASYNC_CH8_CTRL,No Description"
|
|
hexmask.long.byte 0x20 24.--27. 1. "AUXSEL,Auxiliary LUT Input Select"
|
|
hexmask.long.byte 0x20 16.--19. 1. "FNSEL,Function Select"
|
|
hexmask.long.byte 0x20 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x20 0.--2. "SIGSEL,Signal Select" "0: NONE,?,?,?,?,?,?,?"
|
|
line.long 0x24 "ASYNC_CH9_CTRL,No Description"
|
|
hexmask.long.byte 0x24 24.--27. 1. "AUXSEL,Auxiliary LUT Input Select"
|
|
hexmask.long.byte 0x24 16.--19. 1. "FNSEL,Function Select"
|
|
hexmask.long.byte 0x24 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x24 0.--2. "SIGSEL,Signal Select" "0: NONE,?,?,?,?,?,?,?"
|
|
line.long 0x28 "ASYNC_CH10_CTRL,No Description"
|
|
hexmask.long.byte 0x28 24.--27. 1. "AUXSEL,Auxiliary LUT Input Select"
|
|
hexmask.long.byte 0x28 16.--19. 1. "FNSEL,Function Select"
|
|
hexmask.long.byte 0x28 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x28 0.--2. "SIGSEL,Signal Select" "0: NONE,?,?,?,?,?,?,?"
|
|
line.long 0x2C "ASYNC_CH11_CTRL,No Description"
|
|
hexmask.long.byte 0x2C 24.--27. 1. "AUXSEL,Auxiliary LUT Input Select"
|
|
hexmask.long.byte 0x2C 16.--19. 1. "FNSEL,Function Select"
|
|
hexmask.long.byte 0x2C 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x2C 0.--2. "SIGSEL,Signal Select" "0: NONE,?,?,?,?,?,?,?"
|
|
line.long 0x30 "SYNC_CH0_CTRL,No Description"
|
|
hexmask.long.byte 0x30 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x30 0.--2. "SIGSEL,Signal Select" "0,1,2,3,4,5,6,7"
|
|
line.long 0x34 "SYNC_CH1_CTRL,No Description"
|
|
hexmask.long.byte 0x34 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x34 0.--2. "SIGSEL,Signal Select" "0,1,2,3,4,5,6,7"
|
|
line.long 0x38 "SYNC_CH2_CTRL,No Description"
|
|
hexmask.long.byte 0x38 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x38 0.--2. "SIGSEL,Signal Select" "0,1,2,3,4,5,6,7"
|
|
line.long 0x3C "SYNC_CH3_CTRL,No Description"
|
|
hexmask.long.byte 0x3C 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x3C 0.--2. "SIGSEL,Signal Select" "0,1,2,3,4,5,6,7"
|
|
line.long 0x40 "CONSUMER_CMU_CALDN,CALDN Consumer Register"
|
|
hexmask.long.byte 0x40 0.--3. 1. "PRSSEL,CALDN async channel select"
|
|
line.long 0x44 "CONSUMER_CMU_CALUP,CALUP Consumer Register"
|
|
hexmask.long.byte 0x44 0.--3. 1. "PRSSEL,CALUP async channel select"
|
|
group.long 0x64++0x27
|
|
line.long 0x0 "CONSUMER_IADC0_SCANTRIGGER,SCAN Consumer Register"
|
|
bitfld.long 0x0 8.--9. "SPRSSEL,SCAN sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x0 0.--3. 1. "PRSSEL,SCAN async channel select"
|
|
line.long 0x4 "CONSUMER_IADC0_SINGLETRIGGER,SINGLE Consumer Register"
|
|
bitfld.long 0x4 8.--9. "SPRSSEL,SINGLE sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x4 0.--3. 1. "PRSSEL,SINGLE async channel select"
|
|
line.long 0x8 "CONSUMER_LDMAXBAR_DMAREQ0,DMAREQ0 Consumer Register"
|
|
hexmask.long.byte 0x8 0.--3. 1. "PRSSEL,DMAREQ0 async channel select"
|
|
line.long 0xC "CONSUMER_LDMAXBAR_DMAREQ1,DMAREQ1 Consumer Register"
|
|
hexmask.long.byte 0xC 0.--3. 1. "PRSSEL,DMAREQ1 async channel select"
|
|
line.long 0x10 "CONSUMER_LETIMER0_CLEAR,CLEAR Consumer Register"
|
|
hexmask.long.byte 0x10 0.--3. 1. "PRSSEL,CLEAR async channel select"
|
|
line.long 0x14 "CONSUMER_LETIMER0_START,START Consumer Register"
|
|
hexmask.long.byte 0x14 0.--3. 1. "PRSSEL,START async channel select"
|
|
line.long 0x18 "CONSUMER_LETIMER0_STOP,STOP Consumer Register"
|
|
hexmask.long.byte 0x18 0.--3. 1. "PRSSEL,STOP async channel select"
|
|
line.long 0x1C "CONSUMER_EUART0_RX,RX Consumer Register"
|
|
hexmask.long.byte 0x1C 0.--3. 1. "PRSSEL,RX async channel select"
|
|
line.long 0x20 "CONSUMER_EUART0_TRIGGER,TRIGGER Consumer Register"
|
|
hexmask.long.byte 0x20 0.--3. 1. "PRSSEL,TRIGGER async channel select"
|
|
line.long 0x24 "CONSUMER_MODEM_DIN,DIN Consumer Register"
|
|
hexmask.long.byte 0x24 0.--3. 1. "PRSSEL,DIN async channel select"
|
|
group.long 0xC0++0x33
|
|
line.long 0x0 "CONSUMER_RAC_CLR,CLR Consumer Register"
|
|
hexmask.long.byte 0x0 0.--3. 1. "PRSSEL,CLR async channel select"
|
|
line.long 0x4 "CONSUMER_RAC_CTIIN0,CTI Consumer Register"
|
|
hexmask.long.byte 0x4 0.--3. 1. "PRSSEL,CTI async channel select"
|
|
line.long 0x8 "CONSUMER_RAC_CTIIN1,CTI Consumer Register"
|
|
hexmask.long.byte 0x8 0.--3. 1. "PRSSEL,CTI async channel select"
|
|
line.long 0xC "CONSUMER_RAC_CTIIN2,CTI Consumer Register"
|
|
hexmask.long.byte 0xC 0.--3. 1. "PRSSEL,CTI async channel select"
|
|
line.long 0x10 "CONSUMER_RAC_CTIIN3,CTI Consumer Register"
|
|
hexmask.long.byte 0x10 0.--3. 1. "PRSSEL,CTI async channel select"
|
|
line.long 0x14 "CONSUMER_RAC_FORCETX,FORCETX Consumer Register"
|
|
hexmask.long.byte 0x14 0.--3. 1. "PRSSEL,FORCETX async channel select"
|
|
line.long 0x18 "CONSUMER_RAC_RXDIS,RXDIS Consumer Register"
|
|
hexmask.long.byte 0x18 0.--3. 1. "PRSSEL,RXDIS async channel select"
|
|
line.long 0x1C "CONSUMER_RAC_RXEN,RXEN Consumer Register"
|
|
hexmask.long.byte 0x1C 0.--3. 1. "PRSSEL,RXEN async channel select"
|
|
line.long 0x20 "CONSUMER_RAC_SEQ,SEQ Consumer Register"
|
|
hexmask.long.byte 0x20 0.--3. 1. "PRSSEL,SEQ async channel select"
|
|
line.long 0x24 "CONSUMER_RAC_TXEN,TXEN Consumer Register"
|
|
hexmask.long.byte 0x24 0.--3. 1. "PRSSEL,TXEN async channel select"
|
|
line.long 0x28 "CONSUMER_RTCC_CC0,CC0 Consumer Register"
|
|
hexmask.long.byte 0x28 0.--3. 1. "PRSSEL,CC0 async channel select"
|
|
line.long 0x2C "CONSUMER_RTCC_CC1,CC1 Consumer Register"
|
|
hexmask.long.byte 0x2C 0.--3. 1. "PRSSEL,CC1 async channel select"
|
|
line.long 0x30 "CONSUMER_RTCC_CC2,CC2 Consumer Register"
|
|
hexmask.long.byte 0x30 0.--3. 1. "PRSSEL,CC2 async channel select"
|
|
group.long 0xF8++0xB3
|
|
line.long 0x0 "CONSUMER_CORE_CTIIN0,CTI Consumer Register"
|
|
hexmask.long.byte 0x0 0.--3. 1. "PRSSEL,CTI async channel select"
|
|
line.long 0x4 "CONSUMER_CORE_CTIIN1,CTI Consumer Register"
|
|
hexmask.long.byte 0x4 0.--3. 1. "PRSSEL,CTI async channel select"
|
|
line.long 0x8 "CONSUMER_CORE_CTIIN2,CTI Consumer Register"
|
|
hexmask.long.byte 0x8 0.--3. 1. "PRSSEL,CTI async channel select"
|
|
line.long 0xC "CONSUMER_CORE_CTIIN3,CTI Consumer Register"
|
|
hexmask.long.byte 0xC 0.--3. 1. "PRSSEL,CTI async channel select"
|
|
line.long 0x10 "CONSUMER_CORE_M33RXEV,M33 Consumer Register"
|
|
hexmask.long.byte 0x10 0.--3. 1. "PRSSEL,M33 async channel select"
|
|
line.long 0x14 "CONSUMER_TIMER0_CC0,CC0 Consumer Register"
|
|
bitfld.long 0x14 8.--9. "SPRSSEL,CC0 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x14 0.--3. 1. "PRSSEL,CC0 async channel select"
|
|
line.long 0x18 "CONSUMER_TIMER0_CC1,CC1 Consumer Register"
|
|
bitfld.long 0x18 8.--9. "SPRSSEL,CC1 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x18 0.--3. 1. "PRSSEL,CC1 async channel select"
|
|
line.long 0x1C "CONSUMER_TIMER0_CC2,CC2 Consumer Register"
|
|
bitfld.long 0x1C 8.--9. "SPRSSEL,CC2 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x1C 0.--3. 1. "PRSSEL,CC2 async channel select"
|
|
line.long 0x20 "CONSUMER_TIMER0_DTI,DTI Consumer Register"
|
|
hexmask.long.byte 0x20 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x24 "CONSUMER_TIMER0_DTIFS1,DTI Consumer Register"
|
|
hexmask.long.byte 0x24 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x28 "CONSUMER_TIMER0_DTIFS2,DTI Consumer Register"
|
|
hexmask.long.byte 0x28 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x2C "CONSUMER_TIMER1_CC0,CC0 Consumer Register"
|
|
bitfld.long 0x2C 8.--9. "SPRSSEL,CC0 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x2C 0.--3. 1. "PRSSEL,CC0 async channel select"
|
|
line.long 0x30 "CONSUMER_TIMER1_CC1,CC1 Consumer Register"
|
|
bitfld.long 0x30 8.--9. "SPRSSEL,CC1 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x30 0.--3. 1. "PRSSEL,CC1 async channel select"
|
|
line.long 0x34 "CONSUMER_TIMER1_CC2,CC2 Consumer Register"
|
|
bitfld.long 0x34 8.--9. "SPRSSEL,CC2 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x34 0.--3. 1. "PRSSEL,CC2 async channel select"
|
|
line.long 0x38 "CONSUMER_TIMER1_DTI,DTI Consumer Register"
|
|
hexmask.long.byte 0x38 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x3C "CONSUMER_TIMER1_DTIFS1,DTI Consumer Register"
|
|
hexmask.long.byte 0x3C 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x40 "CONSUMER_TIMER1_DTIFS2,DTI Consumer Register"
|
|
hexmask.long.byte 0x40 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x44 "CONSUMER_TIMER2_CC0,CC0 Consumer Register"
|
|
bitfld.long 0x44 8.--9. "SPRSSEL,CC0 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x44 0.--3. 1. "PRSSEL,CC0 async channel select"
|
|
line.long 0x48 "CONSUMER_TIMER2_CC1,CC1 Consumer Register"
|
|
bitfld.long 0x48 8.--9. "SPRSSEL,CC1 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x48 0.--3. 1. "PRSSEL,CC1 async channel select"
|
|
line.long 0x4C "CONSUMER_TIMER2_CC2,CC2 Consumer Register"
|
|
bitfld.long 0x4C 8.--9. "SPRSSEL,CC2 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x4C 0.--3. 1. "PRSSEL,CC2 async channel select"
|
|
line.long 0x50 "CONSUMER_TIMER2_DTI,DTI Consumer Register"
|
|
hexmask.long.byte 0x50 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x54 "CONSUMER_TIMER2_DTIFS1,DTI Consumer Register"
|
|
hexmask.long.byte 0x54 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x58 "CONSUMER_TIMER2_DTIFS2,DTI Consumer Register"
|
|
hexmask.long.byte 0x58 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x5C "CONSUMER_TIMER3_CC0,CC0 Consumer Register"
|
|
bitfld.long 0x5C 8.--9. "SPRSSEL,CC0 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x5C 0.--3. 1. "PRSSEL,CC0 async channel select"
|
|
line.long 0x60 "CONSUMER_TIMER3_CC1,CC1 Consumer Register"
|
|
bitfld.long 0x60 8.--9. "SPRSSEL,CC1 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x60 0.--3. 1. "PRSSEL,CC1 async channel select"
|
|
line.long 0x64 "CONSUMER_TIMER3_CC2,CC2 Consumer Register"
|
|
bitfld.long 0x64 8.--9. "SPRSSEL,CC2 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x64 0.--3. 1. "PRSSEL,CC2 async channel select"
|
|
line.long 0x68 "CONSUMER_TIMER3_DTI,DTI Consumer Register"
|
|
hexmask.long.byte 0x68 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x6C "CONSUMER_TIMER3_DTIFS1,DTI Consumer Register"
|
|
hexmask.long.byte 0x6C 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x70 "CONSUMER_TIMER3_DTIFS2,DTI Consumer Register"
|
|
hexmask.long.byte 0x70 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x74 "CONSUMER_TIMER4_CC0,CC0 Consumer Register"
|
|
bitfld.long 0x74 8.--9. "SPRSSEL,CC0 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x74 0.--3. 1. "PRSSEL,CC0 async channel select"
|
|
line.long 0x78 "CONSUMER_TIMER4_CC1,CC1 Consumer Register"
|
|
bitfld.long 0x78 8.--9. "SPRSSEL,CC1 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x78 0.--3. 1. "PRSSEL,CC1 async channel select"
|
|
line.long 0x7C "CONSUMER_TIMER4_CC2,CC2 Consumer Register"
|
|
bitfld.long 0x7C 8.--9. "SPRSSEL,CC2 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x7C 0.--3. 1. "PRSSEL,CC2 async channel select"
|
|
line.long 0x80 "CONSUMER_TIMER4_DTI,DTI Consumer Register"
|
|
hexmask.long.byte 0x80 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x84 "CONSUMER_TIMER4_DTIFS1,DTI Consumer Register"
|
|
hexmask.long.byte 0x84 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x88 "CONSUMER_TIMER4_DTIFS2,DTI Consumer Register"
|
|
hexmask.long.byte 0x88 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x8C "CONSUMER_USART0_CLK,CLK Consumer Register"
|
|
hexmask.long.byte 0x8C 0.--3. 1. "PRSSEL,CLK async channel select"
|
|
line.long 0x90 "CONSUMER_USART0_IR,IR Consumer Register"
|
|
hexmask.long.byte 0x90 0.--3. 1. "PRSSEL,IR async channel select"
|
|
line.long 0x94 "CONSUMER_USART0_RX,RX Consumer Register"
|
|
hexmask.long.byte 0x94 0.--3. 1. "PRSSEL,RX async channel select"
|
|
line.long 0x98 "CONSUMER_USART0_TRIGGER,TRIGGER Consumer Register"
|
|
hexmask.long.byte 0x98 0.--3. 1. "PRSSEL,TRIGGER async channel select"
|
|
line.long 0x9C "CONSUMER_USART1_CLK,CLK Consumer Register"
|
|
hexmask.long.byte 0x9C 0.--3. 1. "PRSSEL,CLK async channel select"
|
|
line.long 0xA0 "CONSUMER_USART1_IR,IR Consumer Register"
|
|
hexmask.long.byte 0xA0 0.--3. 1. "PRSSEL,IR async channel select"
|
|
line.long 0xA4 "CONSUMER_USART1_RX,RX Consumer Register"
|
|
hexmask.long.byte 0xA4 0.--3. 1. "PRSSEL,RX async channel select"
|
|
line.long 0xA8 "CONSUMER_USART1_TRIGGER,TRIGGER Consumer Register"
|
|
hexmask.long.byte 0xA8 0.--3. 1. "PRSSEL,TRIGGER async channel select"
|
|
line.long 0xAC "CONSUMER_WDOG0_SRC0,SRC0 Consumer Register"
|
|
hexmask.long.byte 0xAC 0.--3. 1. "PRSSEL,SRC0 async channel select"
|
|
line.long 0xB0 "CONSUMER_WDOG0_SRC1,SRC1 Consumer Register"
|
|
hexmask.long.byte 0xB0 0.--3. 1. "PRSSEL,SRC1 async channel select"
|
|
tree.end
|
|
tree "PRS_S"
|
|
base ad:0x40038000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP version ID"
|
|
wgroup.long 0x8++0x3
|
|
line.long 0x0 "ASYNC_SWPULSE,No Description"
|
|
bitfld.long 0x0 11. "CH11PULSE,Channel pulse" "0,1"
|
|
bitfld.long 0x0 10. "CH10PULSE,Channel pulse" "0,1"
|
|
bitfld.long 0x0 9. "CH9PULSE,Channel pulse" "0,1"
|
|
bitfld.long 0x0 8. "CH8PULSE,Channel pulse" "0,1"
|
|
bitfld.long 0x0 7. "CH7PULSE,Channel pulse" "0,1"
|
|
bitfld.long 0x0 6. "CH6PULSE,Channel pulse" "0,1"
|
|
bitfld.long 0x0 5. "CH5PULSE,Channel pulse" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "CH4PULSE,Channel pulse" "0,1"
|
|
bitfld.long 0x0 3. "CH3PULSE,Channel pulse" "0,1"
|
|
bitfld.long 0x0 2. "CH2PULSE,Channel pulse" "0,1"
|
|
bitfld.long 0x0 1. "CH1PULSE,Channel pulse" "0,1"
|
|
bitfld.long 0x0 0. "CH0PULSE,Channel pulse" "0,1"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "ASYNC_SWLEVEL,No Description"
|
|
bitfld.long 0x0 11. "CH11LEVEL,Channel Level" "0,1"
|
|
bitfld.long 0x0 10. "CH10LEVEL,Channel Level" "0,1"
|
|
bitfld.long 0x0 9. "CH9LEVEL,Channel Level" "0,1"
|
|
bitfld.long 0x0 8. "CH8LEVEL,Channel Level" "0,1"
|
|
bitfld.long 0x0 7. "CH7LEVEL,Channel Level" "0,1"
|
|
bitfld.long 0x0 6. "CH6LEVEL,Channel Level" "0,1"
|
|
bitfld.long 0x0 5. "CH5LEVEL,Channel Level" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "CH4LEVEL,Channel Level" "0,1"
|
|
bitfld.long 0x0 3. "CH3LEVEL,Channel Level" "0,1"
|
|
bitfld.long 0x0 2. "CH2LEVEL,Channel Level" "0,1"
|
|
bitfld.long 0x0 1. "CH1LEVEL,Channel Level" "0,1"
|
|
bitfld.long 0x0 0. "CH0LEVEL,Channel Level" "0,1"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "ASYNC_PEEK,No Description"
|
|
bitfld.long 0x0 11. "CH11VAL,Channel 11 Current Value" "0,1"
|
|
bitfld.long 0x0 10. "CH10VAL,Channel 10 Current Value" "0,1"
|
|
bitfld.long 0x0 9. "CH9VAL,Channel 9 Current Value" "0,1"
|
|
bitfld.long 0x0 8. "CH8VAL,Channel 8 Current Value" "0,1"
|
|
bitfld.long 0x0 7. "CH7VAL,Channel 7 Current Value" "0,1"
|
|
bitfld.long 0x0 6. "CH6VAL,Channel 6 Current Value" "0,1"
|
|
bitfld.long 0x0 5. "CH5VAL,Channel 5 Current Value" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "CH4VAL,Channel 4 Current Value" "0,1"
|
|
bitfld.long 0x0 3. "CH3VAL,Channel 3 Current Value" "0,1"
|
|
bitfld.long 0x0 2. "CH2VAL,Channel 2 Current Value" "0,1"
|
|
bitfld.long 0x0 1. "CH1VAL,Channel 1 Current Value" "0,1"
|
|
bitfld.long 0x0 0. "CH0VAL,Channel 0 Current Value" "0,1"
|
|
line.long 0x4 "SYNC_PEEK,No Description"
|
|
bitfld.long 0x4 3. "CH3VAL,Channel Value" "0,1"
|
|
bitfld.long 0x4 2. "CH2VAL,Channel Value" "0,1"
|
|
bitfld.long 0x4 1. "CH1VAL,Channel Value" "0,1"
|
|
bitfld.long 0x4 0. "CH0VAL,Channel Value" "0,1"
|
|
group.long 0x18++0x47
|
|
line.long 0x0 "ASYNC_CH0_CTRL,No Description"
|
|
hexmask.long.byte 0x0 24.--27. 1. "AUXSEL,Auxiliary LUT Input Select"
|
|
hexmask.long.byte 0x0 16.--19. 1. "FNSEL,Function Select"
|
|
hexmask.long.byte 0x0 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x0 0.--2. "SIGSEL,Signal Select" "0: NONE,?,?,?,?,?,?,?"
|
|
line.long 0x4 "ASYNC_CH1_CTRL,No Description"
|
|
hexmask.long.byte 0x4 24.--27. 1. "AUXSEL,Auxiliary LUT Input Select"
|
|
hexmask.long.byte 0x4 16.--19. 1. "FNSEL,Function Select"
|
|
hexmask.long.byte 0x4 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x4 0.--2. "SIGSEL,Signal Select" "0: NONE,?,?,?,?,?,?,?"
|
|
line.long 0x8 "ASYNC_CH2_CTRL,No Description"
|
|
hexmask.long.byte 0x8 24.--27. 1. "AUXSEL,Auxiliary LUT Input Select"
|
|
hexmask.long.byte 0x8 16.--19. 1. "FNSEL,Function Select"
|
|
hexmask.long.byte 0x8 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x8 0.--2. "SIGSEL,Signal Select" "0: NONE,?,?,?,?,?,?,?"
|
|
line.long 0xC "ASYNC_CH3_CTRL,No Description"
|
|
hexmask.long.byte 0xC 24.--27. 1. "AUXSEL,Auxiliary LUT Input Select"
|
|
hexmask.long.byte 0xC 16.--19. 1. "FNSEL,Function Select"
|
|
hexmask.long.byte 0xC 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0xC 0.--2. "SIGSEL,Signal Select" "0: NONE,?,?,?,?,?,?,?"
|
|
line.long 0x10 "ASYNC_CH4_CTRL,No Description"
|
|
hexmask.long.byte 0x10 24.--27. 1. "AUXSEL,Auxiliary LUT Input Select"
|
|
hexmask.long.byte 0x10 16.--19. 1. "FNSEL,Function Select"
|
|
hexmask.long.byte 0x10 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x10 0.--2. "SIGSEL,Signal Select" "0: NONE,?,?,?,?,?,?,?"
|
|
line.long 0x14 "ASYNC_CH5_CTRL,No Description"
|
|
hexmask.long.byte 0x14 24.--27. 1. "AUXSEL,Auxiliary LUT Input Select"
|
|
hexmask.long.byte 0x14 16.--19. 1. "FNSEL,Function Select"
|
|
hexmask.long.byte 0x14 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x14 0.--2. "SIGSEL,Signal Select" "0: NONE,?,?,?,?,?,?,?"
|
|
line.long 0x18 "ASYNC_CH6_CTRL,No Description"
|
|
hexmask.long.byte 0x18 24.--27. 1. "AUXSEL,Auxiliary LUT Input Select"
|
|
hexmask.long.byte 0x18 16.--19. 1. "FNSEL,Function Select"
|
|
hexmask.long.byte 0x18 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x18 0.--2. "SIGSEL,Signal Select" "0: NONE,?,?,?,?,?,?,?"
|
|
line.long 0x1C "ASYNC_CH7_CTRL,No Description"
|
|
hexmask.long.byte 0x1C 24.--27. 1. "AUXSEL,Auxiliary LUT Input Select"
|
|
hexmask.long.byte 0x1C 16.--19. 1. "FNSEL,Function Select"
|
|
hexmask.long.byte 0x1C 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x1C 0.--2. "SIGSEL,Signal Select" "0: NONE,?,?,?,?,?,?,?"
|
|
line.long 0x20 "ASYNC_CH8_CTRL,No Description"
|
|
hexmask.long.byte 0x20 24.--27. 1. "AUXSEL,Auxiliary LUT Input Select"
|
|
hexmask.long.byte 0x20 16.--19. 1. "FNSEL,Function Select"
|
|
hexmask.long.byte 0x20 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x20 0.--2. "SIGSEL,Signal Select" "0: NONE,?,?,?,?,?,?,?"
|
|
line.long 0x24 "ASYNC_CH9_CTRL,No Description"
|
|
hexmask.long.byte 0x24 24.--27. 1. "AUXSEL,Auxiliary LUT Input Select"
|
|
hexmask.long.byte 0x24 16.--19. 1. "FNSEL,Function Select"
|
|
hexmask.long.byte 0x24 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x24 0.--2. "SIGSEL,Signal Select" "0: NONE,?,?,?,?,?,?,?"
|
|
line.long 0x28 "ASYNC_CH10_CTRL,No Description"
|
|
hexmask.long.byte 0x28 24.--27. 1. "AUXSEL,Auxiliary LUT Input Select"
|
|
hexmask.long.byte 0x28 16.--19. 1. "FNSEL,Function Select"
|
|
hexmask.long.byte 0x28 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x28 0.--2. "SIGSEL,Signal Select" "0: NONE,?,?,?,?,?,?,?"
|
|
line.long 0x2C "ASYNC_CH11_CTRL,No Description"
|
|
hexmask.long.byte 0x2C 24.--27. 1. "AUXSEL,Auxiliary LUT Input Select"
|
|
hexmask.long.byte 0x2C 16.--19. 1. "FNSEL,Function Select"
|
|
hexmask.long.byte 0x2C 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x2C 0.--2. "SIGSEL,Signal Select" "0: NONE,?,?,?,?,?,?,?"
|
|
line.long 0x30 "SYNC_CH0_CTRL,No Description"
|
|
hexmask.long.byte 0x30 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x30 0.--2. "SIGSEL,Signal Select" "0,1,2,3,4,5,6,7"
|
|
line.long 0x34 "SYNC_CH1_CTRL,No Description"
|
|
hexmask.long.byte 0x34 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x34 0.--2. "SIGSEL,Signal Select" "0,1,2,3,4,5,6,7"
|
|
line.long 0x38 "SYNC_CH2_CTRL,No Description"
|
|
hexmask.long.byte 0x38 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x38 0.--2. "SIGSEL,Signal Select" "0,1,2,3,4,5,6,7"
|
|
line.long 0x3C "SYNC_CH3_CTRL,No Description"
|
|
hexmask.long.byte 0x3C 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x3C 0.--2. "SIGSEL,Signal Select" "0,1,2,3,4,5,6,7"
|
|
line.long 0x40 "CONSUMER_CMU_CALDN,CALDN Consumer Register"
|
|
hexmask.long.byte 0x40 0.--3. 1. "PRSSEL,CALDN async channel select"
|
|
line.long 0x44 "CONSUMER_CMU_CALUP,CALUP Consumer Register"
|
|
hexmask.long.byte 0x44 0.--3. 1. "PRSSEL,CALUP async channel select"
|
|
group.long 0x64++0x27
|
|
line.long 0x0 "CONSUMER_IADC0_SCANTRIGGER,SCAN Consumer Register"
|
|
bitfld.long 0x0 8.--9. "SPRSSEL,SCAN sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x0 0.--3. 1. "PRSSEL,SCAN async channel select"
|
|
line.long 0x4 "CONSUMER_IADC0_SINGLETRIGGER,SINGLE Consumer Register"
|
|
bitfld.long 0x4 8.--9. "SPRSSEL,SINGLE sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x4 0.--3. 1. "PRSSEL,SINGLE async channel select"
|
|
line.long 0x8 "CONSUMER_LDMAXBAR_DMAREQ0,DMAREQ0 Consumer Register"
|
|
hexmask.long.byte 0x8 0.--3. 1. "PRSSEL,DMAREQ0 async channel select"
|
|
line.long 0xC "CONSUMER_LDMAXBAR_DMAREQ1,DMAREQ1 Consumer Register"
|
|
hexmask.long.byte 0xC 0.--3. 1. "PRSSEL,DMAREQ1 async channel select"
|
|
line.long 0x10 "CONSUMER_LETIMER0_CLEAR,CLEAR Consumer Register"
|
|
hexmask.long.byte 0x10 0.--3. 1. "PRSSEL,CLEAR async channel select"
|
|
line.long 0x14 "CONSUMER_LETIMER0_START,START Consumer Register"
|
|
hexmask.long.byte 0x14 0.--3. 1. "PRSSEL,START async channel select"
|
|
line.long 0x18 "CONSUMER_LETIMER0_STOP,STOP Consumer Register"
|
|
hexmask.long.byte 0x18 0.--3. 1. "PRSSEL,STOP async channel select"
|
|
line.long 0x1C "CONSUMER_EUART0_RX,RX Consumer Register"
|
|
hexmask.long.byte 0x1C 0.--3. 1. "PRSSEL,RX async channel select"
|
|
line.long 0x20 "CONSUMER_EUART0_TRIGGER,TRIGGER Consumer Register"
|
|
hexmask.long.byte 0x20 0.--3. 1. "PRSSEL,TRIGGER async channel select"
|
|
line.long 0x24 "CONSUMER_MODEM_DIN,DIN Consumer Register"
|
|
hexmask.long.byte 0x24 0.--3. 1. "PRSSEL,DIN async channel select"
|
|
group.long 0xC0++0x33
|
|
line.long 0x0 "CONSUMER_RAC_CLR,CLR Consumer Register"
|
|
hexmask.long.byte 0x0 0.--3. 1. "PRSSEL,CLR async channel select"
|
|
line.long 0x4 "CONSUMER_RAC_CTIIN0,CTI Consumer Register"
|
|
hexmask.long.byte 0x4 0.--3. 1. "PRSSEL,CTI async channel select"
|
|
line.long 0x8 "CONSUMER_RAC_CTIIN1,CTI Consumer Register"
|
|
hexmask.long.byte 0x8 0.--3. 1. "PRSSEL,CTI async channel select"
|
|
line.long 0xC "CONSUMER_RAC_CTIIN2,CTI Consumer Register"
|
|
hexmask.long.byte 0xC 0.--3. 1. "PRSSEL,CTI async channel select"
|
|
line.long 0x10 "CONSUMER_RAC_CTIIN3,CTI Consumer Register"
|
|
hexmask.long.byte 0x10 0.--3. 1. "PRSSEL,CTI async channel select"
|
|
line.long 0x14 "CONSUMER_RAC_FORCETX,FORCETX Consumer Register"
|
|
hexmask.long.byte 0x14 0.--3. 1. "PRSSEL,FORCETX async channel select"
|
|
line.long 0x18 "CONSUMER_RAC_RXDIS,RXDIS Consumer Register"
|
|
hexmask.long.byte 0x18 0.--3. 1. "PRSSEL,RXDIS async channel select"
|
|
line.long 0x1C "CONSUMER_RAC_RXEN,RXEN Consumer Register"
|
|
hexmask.long.byte 0x1C 0.--3. 1. "PRSSEL,RXEN async channel select"
|
|
line.long 0x20 "CONSUMER_RAC_SEQ,SEQ Consumer Register"
|
|
hexmask.long.byte 0x20 0.--3. 1. "PRSSEL,SEQ async channel select"
|
|
line.long 0x24 "CONSUMER_RAC_TXEN,TXEN Consumer Register"
|
|
hexmask.long.byte 0x24 0.--3. 1. "PRSSEL,TXEN async channel select"
|
|
line.long 0x28 "CONSUMER_RTCC_CC0,CC0 Consumer Register"
|
|
hexmask.long.byte 0x28 0.--3. 1. "PRSSEL,CC0 async channel select"
|
|
line.long 0x2C "CONSUMER_RTCC_CC1,CC1 Consumer Register"
|
|
hexmask.long.byte 0x2C 0.--3. 1. "PRSSEL,CC1 async channel select"
|
|
line.long 0x30 "CONSUMER_RTCC_CC2,CC2 Consumer Register"
|
|
hexmask.long.byte 0x30 0.--3. 1. "PRSSEL,CC2 async channel select"
|
|
group.long 0xF8++0xB3
|
|
line.long 0x0 "CONSUMER_CORE_CTIIN0,CTI Consumer Register"
|
|
hexmask.long.byte 0x0 0.--3. 1. "PRSSEL,CTI async channel select"
|
|
line.long 0x4 "CONSUMER_CORE_CTIIN1,CTI Consumer Register"
|
|
hexmask.long.byte 0x4 0.--3. 1. "PRSSEL,CTI async channel select"
|
|
line.long 0x8 "CONSUMER_CORE_CTIIN2,CTI Consumer Register"
|
|
hexmask.long.byte 0x8 0.--3. 1. "PRSSEL,CTI async channel select"
|
|
line.long 0xC "CONSUMER_CORE_CTIIN3,CTI Consumer Register"
|
|
hexmask.long.byte 0xC 0.--3. 1. "PRSSEL,CTI async channel select"
|
|
line.long 0x10 "CONSUMER_CORE_M33RXEV,M33 Consumer Register"
|
|
hexmask.long.byte 0x10 0.--3. 1. "PRSSEL,M33 async channel select"
|
|
line.long 0x14 "CONSUMER_TIMER0_CC0,CC0 Consumer Register"
|
|
bitfld.long 0x14 8.--9. "SPRSSEL,CC0 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x14 0.--3. 1. "PRSSEL,CC0 async channel select"
|
|
line.long 0x18 "CONSUMER_TIMER0_CC1,CC1 Consumer Register"
|
|
bitfld.long 0x18 8.--9. "SPRSSEL,CC1 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x18 0.--3. 1. "PRSSEL,CC1 async channel select"
|
|
line.long 0x1C "CONSUMER_TIMER0_CC2,CC2 Consumer Register"
|
|
bitfld.long 0x1C 8.--9. "SPRSSEL,CC2 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x1C 0.--3. 1. "PRSSEL,CC2 async channel select"
|
|
line.long 0x20 "CONSUMER_TIMER0_DTI,DTI Consumer Register"
|
|
hexmask.long.byte 0x20 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x24 "CONSUMER_TIMER0_DTIFS1,DTI Consumer Register"
|
|
hexmask.long.byte 0x24 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x28 "CONSUMER_TIMER0_DTIFS2,DTI Consumer Register"
|
|
hexmask.long.byte 0x28 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x2C "CONSUMER_TIMER1_CC0,CC0 Consumer Register"
|
|
bitfld.long 0x2C 8.--9. "SPRSSEL,CC0 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x2C 0.--3. 1. "PRSSEL,CC0 async channel select"
|
|
line.long 0x30 "CONSUMER_TIMER1_CC1,CC1 Consumer Register"
|
|
bitfld.long 0x30 8.--9. "SPRSSEL,CC1 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x30 0.--3. 1. "PRSSEL,CC1 async channel select"
|
|
line.long 0x34 "CONSUMER_TIMER1_CC2,CC2 Consumer Register"
|
|
bitfld.long 0x34 8.--9. "SPRSSEL,CC2 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x34 0.--3. 1. "PRSSEL,CC2 async channel select"
|
|
line.long 0x38 "CONSUMER_TIMER1_DTI,DTI Consumer Register"
|
|
hexmask.long.byte 0x38 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x3C "CONSUMER_TIMER1_DTIFS1,DTI Consumer Register"
|
|
hexmask.long.byte 0x3C 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x40 "CONSUMER_TIMER1_DTIFS2,DTI Consumer Register"
|
|
hexmask.long.byte 0x40 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x44 "CONSUMER_TIMER2_CC0,CC0 Consumer Register"
|
|
bitfld.long 0x44 8.--9. "SPRSSEL,CC0 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x44 0.--3. 1. "PRSSEL,CC0 async channel select"
|
|
line.long 0x48 "CONSUMER_TIMER2_CC1,CC1 Consumer Register"
|
|
bitfld.long 0x48 8.--9. "SPRSSEL,CC1 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x48 0.--3. 1. "PRSSEL,CC1 async channel select"
|
|
line.long 0x4C "CONSUMER_TIMER2_CC2,CC2 Consumer Register"
|
|
bitfld.long 0x4C 8.--9. "SPRSSEL,CC2 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x4C 0.--3. 1. "PRSSEL,CC2 async channel select"
|
|
line.long 0x50 "CONSUMER_TIMER2_DTI,DTI Consumer Register"
|
|
hexmask.long.byte 0x50 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x54 "CONSUMER_TIMER2_DTIFS1,DTI Consumer Register"
|
|
hexmask.long.byte 0x54 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x58 "CONSUMER_TIMER2_DTIFS2,DTI Consumer Register"
|
|
hexmask.long.byte 0x58 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x5C "CONSUMER_TIMER3_CC0,CC0 Consumer Register"
|
|
bitfld.long 0x5C 8.--9. "SPRSSEL,CC0 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x5C 0.--3. 1. "PRSSEL,CC0 async channel select"
|
|
line.long 0x60 "CONSUMER_TIMER3_CC1,CC1 Consumer Register"
|
|
bitfld.long 0x60 8.--9. "SPRSSEL,CC1 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x60 0.--3. 1. "PRSSEL,CC1 async channel select"
|
|
line.long 0x64 "CONSUMER_TIMER3_CC2,CC2 Consumer Register"
|
|
bitfld.long 0x64 8.--9. "SPRSSEL,CC2 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x64 0.--3. 1. "PRSSEL,CC2 async channel select"
|
|
line.long 0x68 "CONSUMER_TIMER3_DTI,DTI Consumer Register"
|
|
hexmask.long.byte 0x68 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x6C "CONSUMER_TIMER3_DTIFS1,DTI Consumer Register"
|
|
hexmask.long.byte 0x6C 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x70 "CONSUMER_TIMER3_DTIFS2,DTI Consumer Register"
|
|
hexmask.long.byte 0x70 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x74 "CONSUMER_TIMER4_CC0,CC0 Consumer Register"
|
|
bitfld.long 0x74 8.--9. "SPRSSEL,CC0 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x74 0.--3. 1. "PRSSEL,CC0 async channel select"
|
|
line.long 0x78 "CONSUMER_TIMER4_CC1,CC1 Consumer Register"
|
|
bitfld.long 0x78 8.--9. "SPRSSEL,CC1 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x78 0.--3. 1. "PRSSEL,CC1 async channel select"
|
|
line.long 0x7C "CONSUMER_TIMER4_CC2,CC2 Consumer Register"
|
|
bitfld.long 0x7C 8.--9. "SPRSSEL,CC2 sync channel select" "0,1,2,3"
|
|
hexmask.long.byte 0x7C 0.--3. 1. "PRSSEL,CC2 async channel select"
|
|
line.long 0x80 "CONSUMER_TIMER4_DTI,DTI Consumer Register"
|
|
hexmask.long.byte 0x80 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x84 "CONSUMER_TIMER4_DTIFS1,DTI Consumer Register"
|
|
hexmask.long.byte 0x84 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x88 "CONSUMER_TIMER4_DTIFS2,DTI Consumer Register"
|
|
hexmask.long.byte 0x88 0.--3. 1. "PRSSEL,DTI async channel select"
|
|
line.long 0x8C "CONSUMER_USART0_CLK,CLK Consumer Register"
|
|
hexmask.long.byte 0x8C 0.--3. 1. "PRSSEL,CLK async channel select"
|
|
line.long 0x90 "CONSUMER_USART0_IR,IR Consumer Register"
|
|
hexmask.long.byte 0x90 0.--3. 1. "PRSSEL,IR async channel select"
|
|
line.long 0x94 "CONSUMER_USART0_RX,RX Consumer Register"
|
|
hexmask.long.byte 0x94 0.--3. 1. "PRSSEL,RX async channel select"
|
|
line.long 0x98 "CONSUMER_USART0_TRIGGER,TRIGGER Consumer Register"
|
|
hexmask.long.byte 0x98 0.--3. 1. "PRSSEL,TRIGGER async channel select"
|
|
line.long 0x9C "CONSUMER_USART1_CLK,CLK Consumer Register"
|
|
hexmask.long.byte 0x9C 0.--3. 1. "PRSSEL,CLK async channel select"
|
|
line.long 0xA0 "CONSUMER_USART1_IR,IR Consumer Register"
|
|
hexmask.long.byte 0xA0 0.--3. 1. "PRSSEL,IR async channel select"
|
|
line.long 0xA4 "CONSUMER_USART1_RX,RX Consumer Register"
|
|
hexmask.long.byte 0xA4 0.--3. 1. "PRSSEL,RX async channel select"
|
|
line.long 0xA8 "CONSUMER_USART1_TRIGGER,TRIGGER Consumer Register"
|
|
hexmask.long.byte 0xA8 0.--3. 1. "PRSSEL,TRIGGER async channel select"
|
|
line.long 0xAC "CONSUMER_WDOG0_SRC0,SRC0 Consumer Register"
|
|
hexmask.long.byte 0xAC 0.--3. 1. "PRSSEL,SRC0 async channel select"
|
|
line.long 0xB0 "CONSUMER_WDOG0_SRC1,SRC1 Consumer Register"
|
|
hexmask.long.byte 0xB0 0.--3. 1. "PRSSEL,SRC1 async channel select"
|
|
tree.end
|
|
tree.end
|
|
tree "RAC (Radio Controller)"
|
|
base ad:0x0
|
|
tree "RAC_NS"
|
|
base ad:0xB8020000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "IPVERSION,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "IPVERSION,IP Version"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "EN,No Description"
|
|
bitfld.long 0x00 0. "EN,Enable peripheral clock to this module" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RXENSRCEN,No Description"
|
|
bitfld.long 0x00 13. "PRSRXEN,PRS RX Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "DEMODRXREQEN,DEMOD RX Request Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "FRAMEDETEN,Frame Detected Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "PREDETEN,Preamble Detected Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "TIMDETEN,Timing Detected Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "CHANNELBUSYEN,Channel Busy Enable" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "SWRXEN,SW RX Enable"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "STATUS,No Description"
|
|
bitfld.long 0x00 31. "RXENS,RXEN Status" "0: RXEN is not set,1: RXEN is set"
|
|
newline
|
|
bitfld.long 0x00 30. "TXENS,TXEN Status" "0: TXEN is not set,1: TXEN is set"
|
|
newline
|
|
bitfld.long 0x00 28. "SEQACTIVE,SEQ active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24.--27. "STATE,Radio State" "0: Radio is off,1: Radio is enabling receiver,2: Radio is listening for incoming frames,3: Radio is receiving a frame,4: Radio is powering down receiver and going to..,5: Radio remains in receive mode after frame..,6: Received data was lost due to full receive..,7: Radio is disabling receiver and enabling..,8: Radio is enabling transmitter,9: Radio is transmitting data,10: Radio is powering down transmitter and going..,11: Radio is disabling transmitter and enabling..,12: Radio is preparing for a transmission after..,13: Radio is powering down receiver and going to..,14: Radio power-on-reset state,?..."
|
|
newline
|
|
bitfld.long 0x00 23. "SEQSLEEPDEEP,SEQ in deep sleep" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "SEQSLEEPING,SEQ in sleeping" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "TXAFTERFRAMEACTIVE,TX After Frame Active" "0: The currently ongoing TX was not initiated by..,1: The currently ongoing TX was initiated by a.."
|
|
newline
|
|
bitfld.long 0x00 20. "TXAFTERFRAMEPEND,TX After Frame Pending" "0: A transmit after frame operation is currently..,1: A transmit after frame operation is currently.."
|
|
newline
|
|
bitfld.long 0x00 19. "FORCESTATEACTIVE,FSM state force active" "0: No special state transition is currently in..,1: A forced state transition is currently in.."
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "RXMASK,Receive Enable Mask"
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "CMD,No Description"
|
|
bitfld.long 0x00 15. "LNAENCLEAR,LNAEN Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "LNAENSET,LNAEN Set" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "PAENCLEAR,PAEN Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "PAENSET,PAEN Set" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "FRCRD,FRC read cmd" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "FRCWR,FRC write cmd" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "RXDIS,RX Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "RXCAL,Start an RX Calibration" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "CLEARRXOVERFLOW,Clear RX Overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "TXDIS,TX Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TXAFTERFRAME,TX After Frame" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CLEARTXEN,Clear TX Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TXONCCA,Transmit On CCA" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "FORCETX,Force TX Command" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXEN,Transmitter Enable" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CTRL,No Description"
|
|
bitfld.long 0x00 28. "RXOFDIS,Switch to RXOVERFLOW Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "SEQCLKDIS,SEQ Clk Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26. "CPUWAITDIS,SEQ CPU Wait Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "EXITSHUTDOWNDIS,Exit SHUTDOWN state Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "SEQRESET,SEQ reset" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "PRSFORCETX,PRS Force RX" "0: PRS will not force TX,1: The channel selected by PRSFORCETXSEL will.."
|
|
newline
|
|
bitfld.long 0x00 10. "PRSRXDIS,PRS RX Disable" "0: PRS will not disable RX,1: The channel selected by PRSRXDISSEL will.."
|
|
newline
|
|
bitfld.long 0x00 9. "LNAENPOL,LNAEN signal polarity" "0: Active low,1: Active high"
|
|
newline
|
|
bitfld.long 0x00 8. "PAENPOL,PAEN signal polarity" "0: Active low,1: Active high"
|
|
newline
|
|
bitfld.long 0x00 7. "ACTIVEPOL,ACTIVE signal polarity" "0: Active low,1: Active high"
|
|
newline
|
|
bitfld.long 0x00 6. "TXPOSTPONE,TX Postpone" "0: In the TX state transmit data is output,1: In the TX state an unmodulated carrier is.."
|
|
newline
|
|
bitfld.long 0x00 5. "PRSCLR,PRS RXEN Clear" "0: The PRS RXEN signal is cleared when the RSM..,1: The Selected PRS channel in PRSCLRSEL is used.."
|
|
newline
|
|
bitfld.long 0x00 3. "PRSMODE,PRS RXEN Mode" "0: The PRS signal is used directly,1: The PRS signal is used as an RX enable pulse"
|
|
newline
|
|
bitfld.long 0x00 2. "TXAFTERRX,TX After RX" "0: TX will not be started automatically,1: A transition to TX is automatically started.."
|
|
newline
|
|
bitfld.long 0x00 1. "PRSTXEN,PRS TX Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "FORCEDISABLE,Force Radio Disable" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FORCESTATE,No Description"
|
|
bitfld.long 0x00 0.--3. "FORCESTATE,Force RAC state transition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "IF,No Description"
|
|
hexmask.long.byte 0x00 16.--23. 1. "SEQ,Sequencer Interrupt Flags"
|
|
newline
|
|
bitfld.long 0x00 3. "SEQRESETREQ,SEQ reset request" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "SEQLOCKUP,SEQ locked up" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "STIMCMPEV,STIMER Compare Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "STATECHANGE,Radio State Change" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "IEN,No Description"
|
|
hexmask.long.byte 0x00 16.--23. 1. "SEQ,Sequencer Flags Interrupt Enable"
|
|
newline
|
|
bitfld.long 0x00 3. "SEQRESETREQ,SEQ reset request Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "SEQLOCKUP,SEQ locked up Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "STIMCMPEV,STIMER Compare Event Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "STATECHANGE,Radio State Change Interrupt Enable" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "TESTCTRL,No Description"
|
|
bitfld.long 0x00 1. "DEMODEN,Demodulator enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "MODEN,Modulator enable" "0,1"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "SEQIF,No Description"
|
|
bitfld.long 0x00 29. "STATESHUTDOWN,entering STATE_SHUTDOWN" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "STATETX2TX,entering STATE_TX2TX" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "STATETX2RX,entering STATE_TX2RX" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26. "STATETXPD,entering STATE_TXPD" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "STATETX,entering STATE_TX" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "STATETXWARM,entering STATE_TXWARM" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "STATERX2TX,entering STATE_RX2TX" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "STATERXOVERFLOW,entering STATE_RXOVERFLOW" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "STATERX2RX,entering STATE_RX2RX" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "STATERXPD,entering STATE_RXPD" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "STATERXFRAME,entering STATE_RXFRAME" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "STATERXSEARCH,entering STATE_RXSEARCH" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "STATERXWARM,entering STATE_RXWARM" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "STATEOFF,entering STATE_OFF" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "PRSEVENTSEQ,SEQ PRS Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "DEMODRXREQCLRSEQ,Demod RX request clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "STIMCMPEVSEQ,STIMER Compare Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "STATECHANGESEQ,Radio State Change" "0,1"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "SEQIEN,No Description"
|
|
bitfld.long 0x00 29. "STATESHUTDOWN,STATE_SHUTDOWN Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "STATETX2TX,STATE_TX2TX Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "STATETX2RX,STATE_TX2RX Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26. "STATETXPD,STATE_TXPD Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "STATETX,STATE_TX Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "STATETXWARM,STATE_TXWARM Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "STATERX2TX,STATE_RX2TX Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "STATERXOVERFLOW,STATE_RXOVERFLOW Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "STATERX2RX,STATE_RX2RX Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "STATERXPD,STATE_RXPD Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "STATERXFRAME,STATE_RXFRAME Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "STATERXSEARCH,STATE_RXSEARC Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "STATERXWARM,STATE_RXWARM Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "STATEOFF,STATE_OFF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "PRSEVENTSEQ,PRS SEQ EVENT Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "DEMODRXREQCLRSEQ,Demod RX req clr Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "STIMCMPEVSEQ,STIMER Compare Event Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "STATECHANGESEQ,Radio State Change Interrupt Enable" "0,1"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "STIMER,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "STIMER,STIMER Register"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "STIMERCOMP,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "STIMERCOMP,STIMER Compare Register"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "SEQCTRL,No Description"
|
|
bitfld.long 0x00 24.--28. "SWIRQ,SW spare IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 6. "STATEDEBUGRUN,FSM state Debug Run" "0: FSM keeps unchanged when the Sequencer is..,1: FSM keeps going when the Sequencer is halted"
|
|
newline
|
|
bitfld.long 0x00 5. "STIMERDEBUGRUN,STIMER Debug Run" "0: STIMER is not running when the Sequencer is..,1: STIMER is running when the Sequencer is halted"
|
|
newline
|
|
bitfld.long 0x00 4. "STIMERALWAYSRUN,STIMER always Run" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "RELATIVE,STIMER Compare value relative" "0: The compare value set for stimer is an..,1: The compare value set for stimer is a.."
|
|
newline
|
|
bitfld.long 0x00 1.--2. "COMPINVALMODE,STIMER Comp Invalid Mode" "0: STIMERCOMP is always valid,1: STIMERCOMP is invalidated when the RSM..,2: STIMERCOMP is invalidated when an STIMER..,3: STIMERCOMP is invalidated both when the RSM.."
|
|
newline
|
|
bitfld.long 0x00 0. "COMPACT,STIMER Compare Action" "0: STIMER wraps when reaching STIMERCOMP,1: STIMER continues when reaching STIMERCOMP"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "PRESC,No Description"
|
|
hexmask.long.byte 0x00 0.--6. 1. "STIMER,STIMER Prescaler"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "SR0,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SR0,Sequencer Storage Register 0"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "SR1,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SR1,Sequencer Storage Register 1"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "SR2,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SR2,Sequencer Storage Register 2"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "SR3,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SR3,Sequencer Storage Register 3"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "STCTRL,No Description"
|
|
bitfld.long 0x00 24. "STSKEW,Systick timer skew" "0,1"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "STCAL,Systick timer freq cal"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "FRCTXWORD,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "WDATA,FRC write data"
|
|
rgroup.long 0x58++0x03
|
|
line.long 0x00 "FRCRXWORD,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "RDATA,FRC read data"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "EM1PCSR,No Description"
|
|
rbitfld.long 0x00 18. "RADIOEM1PHWREQ," "0,1"
|
|
newline
|
|
rbitfld.long 0x00 17. "RADIOEM1PACK," "0,1"
|
|
newline
|
|
rbitfld.long 0x00 16. "RADIOEM1PREQ," "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "MCUEM1PDISSWREQ," "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "MCUEM1PMODE," "0: Hardware Controls EM1P Request Signal,1: Software Controls EM1P Request Signal"
|
|
newline
|
|
bitfld.long 0x00 1. "RADIOEM1PDISSWREQ," "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "RADIOEM1PMODE," "0: Hardware Controls EM1P Request Signal,1: Software Controls EM1P Request Signal"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "SYNTHENCTRL,No Description"
|
|
bitfld.long 0x00 20. "LPFBWSEL,LPF bandwidth register selection" "0: Select LPFBWRX,1: Select LPFBWTX"
|
|
newline
|
|
bitfld.long 0x00 7. "VCBUFEN,SYLPFVCBUFEN" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "VCOSTARTUP,SYVCOFASTSTARTUP" "0: fast_start_up_0,1: fast_start_up_1"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "SYNTHREGCTRL,No Description"
|
|
bitfld.long 0x00 24.--26. "CHPLDOVREFTRIM,SYTRIMCHPREGVREF" "0: vref0p6000,1: vref0p6125,2: vref0p6250,3: vref0p6375,4: vref0p6500,5: vref0p6625,6: vref0p6750,7: vref0p6875"
|
|
newline
|
|
bitfld.long 0x00 10.--12. "MMDLDOVREFTRIM,SYTRIMMMDREGVREF" "0: vref0p6000,1: vref0p6125,2: vref0p6250,3: vref0p6375,4: vref0p6500,5: vref0p6625,6: vref0p6750,7: vref0p6875"
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "VCOCTRL,No Description"
|
|
bitfld.long 0x00 4.--7. "VCODETAMPLITUDE,SYVCOAMPLPKD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "VCOAMPLITUDE,SYVCOAMPLOPEN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "SYNTHCTRL,No Description"
|
|
bitfld.long 0x00 10. "MMDPOWERBALANCEDISABLE,SYMMDPOWERBALANCEENB" "0: EnablePowerbleed,1: DisablePowerBleed"
|
|
rgroup.long 0xAC++0x03
|
|
line.long 0x00 "STATUS2,No Description"
|
|
bitfld.long 0x00 12.--15. "CURRSTATE,Current Radio State" "0: Radio is off,1: Radio is enabling receiver,2: Radio is listening for incoming frames,3: Radio is receiving a frame,4: Radio is powering down receiver and going to..,5: Radio remains in receive mode after frame..,6: Received data was lost due to full receive..,7: Radio is disabling receiver and enabling..,8: Radio is enabling transmitter,9: Radio is transmitting data,10: Radio is powering down transmitter and going..,11: Radio is disabling transmitter and enabling..,12: Radio is preparing for a transmission after..,13: Radio is powering down receiver and going to..,14: Radio power-on-reset state,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--11. "PREVSTATE3,Previous Radio State 3" "0: Radio is off,1: Radio is enabling receiver,2: Radio is listening for incoming frames,3: Radio is receiving a frame,4: Radio is powering down receiver and going to..,5: Radio remains in receive mode after frame..,6: Received data was lost due to full receive..,7: Radio is disabling receiver and enabling..,8: Radio is enabling transmitter,9: Radio is transmitting data,10: Radio is powering down transmitter and going..,11: Radio is disabling transmitter and enabling..,12: Radio is preparing for a transmission after..,13: Radio is powering down receiver and going to..,14: Radio power-on-reset state,?..."
|
|
newline
|
|
bitfld.long 0x00 4.--7. "PREVSTATE2,Previous Radio State 2" "0: Radio is off,1: Radio is enabling receiver,2: Radio is listening for incoming frames,3: Radio is receiving a frame,4: Radio is powering down receiver and going to..,5: Radio remains in receive mode after frame..,6: Received data was lost due to full receive..,7: Radio is disabling receiver and enabling..,8: Radio is enabling transmitter,9: Radio is transmitting data,10: Radio is powering down transmitter and going..,11: Radio is disabling transmitter and enabling..,12: Radio is preparing for a transmission after..,13: Radio is powering down receiver and going to..,14: Radio power-on-reset state,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--3. "PREVSTATE1,Previous Radio State" "0: Radio is off,1: Radio is enabling receiver,2: Radio is listening for incoming frames,3: Radio is receiving a frame,4: Radio is powering down receiver and going to..,5: Radio remains in receive mode after frame..,6: Received data was lost due to full receive..,7: Radio is disabling receiver and enabling..,8: Radio is enabling transmitter,9: Radio is transmitting data,10: Radio is powering down transmitter and going..,11: Radio is disabling transmitter and enabling..,12: Radio is preparing for a transmission after..,13: Radio is powering down receiver and going to..,14: Radio power-on-reset state,?..."
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "IFPGACTRL,No Description"
|
|
bitfld.long 0x00 25.--27. "DCCALDCGEAR,DC COMP GEAR Value for DCCAL" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 22.--24. "DCCALDEC0,DEC0 Value for DCCAL" "0: Decimation Factor 0 = 3,1: Decimation Factor 0 = 4,2: Decimation Factor 0 = 4,3: Decimation Factor 0 = 8,4: Decimation Factor 0 = 8,?..."
|
|
newline
|
|
bitfld.long 0x00 21. "DCESTIEN,DCESTIEN Override for RAC" "0: DCESTI Disabled in MODEM,1: DCESTI Enabled in MODEM"
|
|
newline
|
|
bitfld.long 0x00 20. "DCRSTEN,DC Compensation Filter Reset Enable" "0: DC Comp out of Reset,1: DC Comp in Reset"
|
|
newline
|
|
bitfld.long 0x00 19. "DCCALON,Enable/Disable DCCAL in DEMOD" "0: DC ESTI DISABLED,1: DC ESTI ENABLED"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "PAENCTRL,No Description"
|
|
bitfld.long 0x00 28. "PARAMPMODE,PA ramp mode" "0: PA ramps in normal linear mode ramp offset..,1: PA ramps with an pre-determined offset that.."
|
|
newline
|
|
bitfld.long 0x00 16. "INVRAMPCLK,Invert PA ramping clock" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "PARAMP,PA output level ramping" "0,1"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "APC,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "AMPCONTROLLIMITSW,software amp_control top limit"
|
|
newline
|
|
bitfld.long 0x00 2. "ENAPCSW,software control bit for apc" "0: DISABLE,1: ENABLE"
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "AUXADCTRIM,"
|
|
bitfld.long 0x00 28. "AUXADCTSENSETRIMVBE2,AUXADCTSENSETRIMVBE2" "0: VBE_16uA,1: VBE_32uA"
|
|
newline
|
|
bitfld.long 0x00 26.--27. "AUXADCTRIMVREFVCM,AUXADCTRIMVREFVCM" "0: Trim0p6,1: Trim0p65,2: Trim0p7,3: Trim0p75"
|
|
newline
|
|
bitfld.long 0x00 24.--25. "AUXADCTRIMREFP,AUXADCTRIMREFP" "0: REF1p05,1: REF1p16,2: REF1p2,3: REF1p25"
|
|
newline
|
|
bitfld.long 0x00 23. "AUXADCTRIMLDOHIGHCURRENT,AUXADCTRIMLDOHIGHCURRENT" "0: LowCurrentMode,1: HighCurrentMode"
|
|
newline
|
|
bitfld.long 0x00 21.--22. "AUXADCTRIMCURRVCMBUF,AUXADCTRIMCURRVCMBUF" "0: Typ_minus_40pct,1: Typ_minus_20pct,2: Typ,3: Typ_plus_20pct"
|
|
newline
|
|
bitfld.long 0x00 19.--20. "AUXADCTRIMCURRTSENSE,AUXADCTRIMCURRTSENSE" "0: Typ_minus_40pct,1: Typ_minus_20pct,2: Typ,3: Typ_plus_20pct"
|
|
newline
|
|
bitfld.long 0x00 17.--18. "AUXADCTRIMCURRREFBUF,AUXADCTRIMCURRREFBUF" "0: Typ_minus_40pct,1: Typ_minus_20pct,2: Typ,3: Typ_plus_20pct"
|
|
newline
|
|
bitfld.long 0x00 15.--16. "AUXADCTRIMCURROPA2,AUXADCTRIMCURROPA2" "0: Typ_minus_40pct,1: Typ_minus_20pct,2: Typ,3: Typ_plus_20pct"
|
|
newline
|
|
bitfld.long 0x00 13.--14. "AUXADCTRIMCURROPA1,AUXADCTRIMCURROPA1" "0: Typ_minus_40pct,1: Typ_minus_20pct,2: Typ,3: Typ_plus_20pct"
|
|
newline
|
|
bitfld.long 0x00 11.--12. "AUXADCTRIMCURRINPUTBUF,AUXADCTRIMCURRINPUTBUF" "0: Typ_minus_40pct,1: Typ_minus_20pct,2: Typ,3: Typ_plus_20pct"
|
|
newline
|
|
bitfld.long 0x00 9.--10. "AUXADCTRIMADCINPUTRES,AUXADCTRIMADCINPUTRES" "0: RES200k,1: RES250k,2: RES300k,3: RES350k"
|
|
newline
|
|
bitfld.long 0x00 4.--8. "AUXADCRCTUNE,AUXADCRCTUNE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 3. "AUXADCOUTPUTINVERT,AUXADCOUTPUTINVERT" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 1.--2. "AUXADCLDOVREFTRIM,AUXADCLDOVREFTRIM" "0: TRIM1p27,1: TRIM1p3,2: TRIM1p35,3: TRIM1p4"
|
|
newline
|
|
bitfld.long 0x00 0. "AUXADCCLKINVERT,AUXADCCLKINVERT" "0: Disable_Invert,1: Enable_Invert"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "AUXADCEN,"
|
|
bitfld.long 0x00 9. "AUXADCENMEASTHERMISTOR,AUXADCENMEASTHERMISTOR" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 8. "AUXADCINPUTBUFFERBYPASS,AUXADCINPUTBUFFERBYPASS" "0: Not_Bypassed,1: Bypassed"
|
|
newline
|
|
bitfld.long 0x00 7. "AUXADCENTSENSECAL,AUXADCENTSENSECAL" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. "AUXADCENTSENSE,AUXADCENTSENSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 5. "AUXADCENRESONDIAGA,AUXADCENRESONDIAGA" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 4. "AUXADCENPMON,AUXADCENPMON" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 3. "AUXADCENOUTPUTDRV,AUXADCENOUTPUTDRV" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "AUXADCENLDO,AUXADCENLDO" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "AUXADCENINPUTBUFFER,AUXADCENINPUTBUFFER" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "AUXADCENAUXADC,AUXADCENAUXADC" "0: Disabled,1: Enabled"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "AUXADCCTRL0,No Description"
|
|
bitfld.long 0x00 13. "CLRFILTER,Clear accumulators" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "CLRCOUNTER,Clear counter" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "MUXSEL,Select accumulator" "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. "CYCLES,Cycle number to run"
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "AUXADCCTRL1,"
|
|
bitfld.long 0x00 28.--31. "AUXADCTHERMISTORFREQSEL,AUXADCTHERMISTORFREQSEL" "0: DIV1,1: DIV2,2: DIV4,3: DIV8,4: DIV16,5: DIV32,6: DIV64,7: DIV128,8: DIV256,9: DIV512,10: DIV1024,?..."
|
|
newline
|
|
bitfld.long 0x00 25. "AUXADCTSENSESELVBE,AUXADCTSENSESELVBE" "0: VBE1,1: VBE2"
|
|
newline
|
|
bitfld.long 0x00 24. "AUXADCRESET,AUXADCRESET" "0: Reset_Enabled,1: Reset_Disabled"
|
|
newline
|
|
bitfld.long 0x00 16.--20. "AUXADCTSENSESELCURR,AUXADCTSENSESELCURR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "AUXADCPMONSELECT,AUXADCPMONSELECT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "AUXADCINPUTSELECT,AUXADCINPUTSELECT" "0: SEL0,1: SEL1,2: SEL2,3: SEL3,4: SEL4,5: SEL5,6: SEL6,7: SEL7,8: SEL8,9: SEL9,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--3. "AUXADCINPUTRESSEL,AUXADCINPUTRESSEL" "0: RES640kOhm,1: RES320kOhm,2: RES160kOhm,3: RES80kOhm,4: RES40kOhm,5: RES20kOhm,6: RES10kOhm,7: RES5kOhm,8: RES2p5kOhm,9: RES1p25kOhm,10: RES0p6kOhm,11: RES_switch,?..."
|
|
rgroup.long 0xCC++0x03
|
|
line.long 0x00 "AUXADCOUT,No Description"
|
|
hexmask.long 0x00 0.--27. 1. "AUXADCOUT,AUXADC output"
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "CLKMULTEN0,"
|
|
bitfld.long 0x00 30.--31. "CLKMULTREG3ADJV,CLKMULTREG3ADJV" "0: v1p03,1: v1p06,2: v1p07,3: v1p09"
|
|
newline
|
|
bitfld.long 0x00 28.--29. "CLKMULTREG2ADJV,CLKMULTREG2ADJV" "0: v1p03,1: v1p09,2: v1p10,3: v1p16"
|
|
newline
|
|
bitfld.long 0x00 26.--27. "CLKMULTREG1ADJV,CLKMULTREG1ADJV" "0: v1p28,1: v1p32,2: v1p33,3: v1p38"
|
|
newline
|
|
bitfld.long 0x00 24.--25. "CLKMULTREG2ADJI,CLKMULTREG2ADJI" "0: I_80uA,1: I_100uA,2: I_120uA,3: I_140uA"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "CLKMULTFREQCAL,CLKMULTFREQCAL" "0: pedes_14uA,1: pedes_22uA,2: pedes_30uA,3: pedes_38uA"
|
|
newline
|
|
bitfld.long 0x00 20. "CLKMULTENBYPASS40MHZ,CLKMULTENBYPASS40MHZ" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 19. "CLKMULTENROTDET,CLKMULTENROTDET" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 18. "CLKMULTENREG3,CLKMULTENREG3" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 17. "CLKMULTENREG2,CLKMULTENREG2" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 16. "CLKMULTENREG1,CLKMULTENREG1" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 15. "CLKMULTENREFDIV,CLKMULTENREFDIV" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 14. "CLKMULTENFBDIV,CLKMULTENFBDIV" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 11. "CLKMULTENDRVRX2P4G,CLKMULTENDRVRX2P4G" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 10. "CLKMULTENDRVP,CLKMULTENDRVP" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 9. "CLKMULTENDRVN,CLKMULTENDRVN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 8. "CLKMULTENDRVADC,CLKMULTENDRVADC" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 7. "CLKMULTENDITHER,CLKMULTENDITHER" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 6. "CLKMULTENCFDET,CLKMULTENCFDET" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 5. "CLKMULTENBBXMDET,CLKMULTENBBXMDET" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 4. "CLKMULTENBBXLDET,CLKMULTENBBXLDET" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 3. "CLKMULTENBBDET,CLKMULTENBBDET" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 2. "CLKMULTDISICO,CLKMULTDISICO" "0: enable,1: disable"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "CLKMULTBWCAL,CLKMULTBWCAL" "0: bw_1lsb,1: bw_2lsb,2: bw_3lsb,3: bw_4lsb"
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "CLKMULTEN1,"
|
|
bitfld.long 0x00 11.--16. "CLKMULTDRVAMPSEL,CLKMULTDRVAMPSEL" "0: off,1: slide_x1,?,3: slide_x2,?,?,?,7: slide_x3,?,?,?,?,?,?,?,15: slide_x4,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,31: slide_x5,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,63: slide_x6"
|
|
newline
|
|
bitfld.long 0x00 10. "CLKMULTLDCNIB,CLKMULTLDCNIB" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 7.--8. "CLKMULTRDNIBBLE,CLKMULTRDNIBBLE" "0: quarter_nibble,1: fine_nibble,2: moderate_nibble,3: coarse_nibble"
|
|
newline
|
|
bitfld.long 0x00 6. "CLKMULTLDMNIB,CLKMULTLDMNIB" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 5. "CLKMULTLDFNIB,CLKMULTLDFNIB" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "CLKMULTINNIBBLE,CLKMULTINNIBBLE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xD8++0x03
|
|
line.long 0x00 "CLKMULTCTRL,"
|
|
bitfld.long 0x00 14. "CLKMULTVALID,CLKMULTVALID" "0: invalid,1: valid"
|
|
newline
|
|
bitfld.long 0x00 13. "CLKMULTENRESYNC,CLKMULTENRESYNC" "0: disable_sync,1: enable_sync"
|
|
newline
|
|
bitfld.long 0x00 10.--12. "CLKMULTDIVX,CLKMULTDIVX" "0: div_1,1: div_2,2: div_4,3: div_6,4: div_8,5: div10,6: div12,7: div14"
|
|
newline
|
|
bitfld.long 0x00 7.--9. "CLKMULTDIVR,CLKMULTDIVR" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--6. 1. "CLKMULTDIVN,CLKMULTDIVN"
|
|
rgroup.long 0xDC++0x03
|
|
line.long 0x00 "CLKMULTSTATUS,"
|
|
bitfld.long 0x00 4. "CLKMULTACKVALID,CLKMULTACKVALID" "0: invalid,1: valid"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "CLKMULTOUTNIBBLE,CLKMULTOUTNIBBLE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xE4++0x03
|
|
line.long 0x00 "IFADCTRIM0,"
|
|
bitfld.long 0x00 27.--29. "IFADCSIDETONEFREQ,IFADCSIDETONEFREQ" "0: na0,1: div_128,2: div_64,3: div_32,4: div_16,5: div_8,6: div_4,7: na7"
|
|
newline
|
|
bitfld.long 0x00 24.--26. "IFADCSIDETONEAMP,IFADCSIDETONEAMP" "0: diff_5p68mV,1: diff_29p1mV,2: diff_9p73mV,3: diff_76p9mV,4: diff_9p68_mV,5: diff_51_mV,6: diff_17p2_mV,7: disable"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "IFADCREFBUFCURLVL,IFADCREFBUFCURLVL" "0: i4u,1: i4p5u,2: i5u,3: i5p5u,4: i5u2,5: i5p5u2,6: i6u,7: i6p5u"
|
|
newline
|
|
bitfld.long 0x00 18.--20. "IFADCREFBUFAMPLVL,IFADCREFBUFAMPLVL" "0: v0p88,1: v0p91,2: v0p94,3: v0p97,4: v1p00,5: v1p03,6: v1p06,7: v1p09"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "IFADCOTACURRENT,IFADCOTACURRENT" "0: i3u,1: i3p5u,2: i4u,3: i4p5u,4: i4u2,5: i4p5u2,6: i5u,7: i5p5u"
|
|
newline
|
|
bitfld.long 0x00 12.--14. "IFADCLDOSHUNTCURLVL2,IFADCLDOSHUNTCURLVL2" "0: i4u,1: i4p5u,2: i5u,3: i5p5u,4: i5u2,5: i5p5u2,6: i6u,7: i6p5u"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "IFADCLDOSHUNTCURLVL1,IFADCLDOSHUNTCURLVL1" "0: i55u,1: i65u,2: i70u,3: i85u,4: i85u2,5: i95u,6: i100u,7: i110u"
|
|
newline
|
|
bitfld.long 0x00 8. "IFADCLDOSHUNTAMPLVL2,IFADCLDOSHUNTAMPLVL2" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 5.--7. "IFADCLDOSHUNTAMPLVL1,IFADCLDOSHUNTAMPLVL1" "0: v1p125,1: v1p150,2: v1p175,3: v1p200,4: v1p225,5: v1p250,6: v1p275,7: v1p300"
|
|
newline
|
|
bitfld.long 0x00 2.--4. "IFADCLDOSERIESAMPLVL,IFADCLDOSERIESAMPLVL" "0: v1p225,1: v1p250,2: v1p275,3: v1p300,4: v1p325,5: v1p350,6: v1p375,7: v1p400"
|
|
newline
|
|
bitfld.long 0x00 1. "IFADCENHALFMODE,IFADCENHALFMODE" "0: full_speed_mode,1: half_speed_mode"
|
|
newline
|
|
bitfld.long 0x00 0. "IFADCCLKSEL,IFADCCLKSEL" "0: clk_2p4g,1: clk_subg"
|
|
group.long 0xE8++0x03
|
|
line.long 0x00 "IFADCTRIM1,"
|
|
bitfld.long 0x00 7.--8. "IFADCNEGRESVCM,IFADCNEGRESVCM" "0: r210k_x_1uA,1: r210k_x_1uA2,2: r100k_x_2uA,3: r50k_x_3uA"
|
|
newline
|
|
bitfld.long 0x00 4.--6. "IFADCNEGRESCURRENT,IFADCNEGRESCURRENT" "0: i1p0u,1: i1p5u,2: i2p0u,3: i2p5u,4: i2p0u2,5: i2p5u2,6: i3p0u,7: i3p5u"
|
|
newline
|
|
bitfld.long 0x00 3. "IFADCENNEGRES,IFADCENNEGRES" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "IFADCVCMLVL,IFADCVCMLVL" "0: vcm_475mV,1: vcm_500mV,2: vcm_525mV,3: vcm_550mV,4: vcm_575mV,5: vcm_600mV,6: vcm_625mV,7: cm_650mV"
|
|
group.long 0xEC++0x03
|
|
line.long 0x00 "IFADCCAL,"
|
|
hexmask.long.byte 0x00 16.--23. 1. "IFADCRCCALCOUNTERSTARTVAL,IFADCRCCALCOUNTERSTARTVAL"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "IFADCTUNERC,IFADCTUNERC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 1. "IFADCTUNERCCALMODE,IFADCTUNERCCALMODE" "0: SYmode,1: ADCmode"
|
|
newline
|
|
bitfld.long 0x00 0. "IFADCENRCCAL,IFADCENRCCAL" "0: rccal_disable,1: rccal_enable"
|
|
rgroup.long 0xF0++0x03
|
|
line.long 0x00 "IFADCSTATUS,"
|
|
bitfld.long 0x00 0. "IFADCRCCALOUT,IFADCRCCALOUT" "0: lo,1: hi"
|
|
group.long 0xF8++0x03
|
|
line.long 0x00 "LNAMIXTRIM0,"
|
|
bitfld.long 0x00 25.--28. "LNAMIXTRIMVREG,LNAMIXTRIMVREG" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 20.--24. "LNAMIXRFPKDCALDM,LNAMIXRFPKDCALDM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 14.--19. "LNAMIXRFPKDCALCM,LNAMIXRFPKDCALCM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 12.--13. "LNAMIXRFPKDBWSEL,LNAMIXRFPKDBWSEL" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "LNAMIXLOWCUR,LNAMIXLOWCUR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "LNAMIXHIGHCUR,LNAMIXHIGHCUR" "0: current_470uA,1: current_530uA,2: unused,3: current_590uA"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "LNAMIXCURCTRL,LNAMIXCURCTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "LNAMIXTRIM1,"
|
|
bitfld.long 0x00 15.--18. "LNAMIXVOUTADJ,LNAMIXVOUTADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 13.--14. "LNAMIXPCASADJ,LNAMIXPCASADJ" "0: pcas_250m,1: unused,2: pcas_300m,3: pcas_350m"
|
|
newline
|
|
bitfld.long 0x00 11.--12. "LNAMIXNCASADJ,LNAMIXNCASADJ" "0: ncas_1V,1: unused,2: ncas_950m,3: ncas_900m"
|
|
newline
|
|
bitfld.long 0x00 9.--10. "LNAMIXMXRBIAS,LNAMIXMXRBIAS" "0: bias_1V,1: unused,2: bias_900m,3: bias_800m"
|
|
newline
|
|
bitfld.long 0x00 6.--8. "LNAMIXLNACAPSEL,LNAMIXLNACAPSEL" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "LNAMIXIBIASADJ,LNAMIXIBIASADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "LNAMIXCAL,"
|
|
bitfld.long 0x00 4.--6. "LNAMIXIRCALAMP,LNAMIXIRCALAMP" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 2. "LNAMIXENIRCAL,LNAMIXENIRCAL" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 1. "LNAMIXCALVMODE,LNAMIXCALVMODE" "0: current_mode,1: voltage_mode"
|
|
newline
|
|
bitfld.long 0x00 0. "LNAMIXCALEN,LNAMIXCALEN" "0: cal_disable,1: cal_enable"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "LNAMIXEN,"
|
|
bitfld.long 0x00 0. "LNAMIXENLDO,LNAMIXENLDO" "0: disable,1: enable"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "PRECTRL,"
|
|
bitfld.long 0x00 4.--5. "PREVREFTRIM,PREVREFTRIM" "0: v0p675,1: v0p688,2: v0p700,3: v0p713"
|
|
newline
|
|
bitfld.long 0x00 1.--3. "PREREGTRIM,PREREGTRIM" "0: v1p61,1: v1p68,2: v1p74,3: v1p80,4: v1p86,5: v1p91,6: v1p96,7: v2p00"
|
|
newline
|
|
bitfld.long 0x00 0. "PREBYPFORCE,PREBYPFORCE" "0: not_forced,1: forced"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "PATRIM0,"
|
|
bitfld.long 0x00 11.--13. "TX0DBMTRIMDUTYCYP,TX0DBMTRIMDUTYCYP" "0: dn_0pct,1: dn_1pct,2: dn_2pct,3: dn_3pct,4: dn_4pct,5: dn_5pct,6: dn_6pct,7: na"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "TX0DBMTRIMDUTYCYN,TX0DBMTRIMDUTYCYN" "0: up_0pct,1: up_1pct,2: up_2pct,3: up_3pct,4: up_4pct,5: up_5pct,6: up_6pct,7: na"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "TX0DBMTRIMBIASP,TX0DBMTRIMBIASP" "0: v_378m,1: v_392m,2: v_405m,3: v_418p5m,4: v_431m,5: v_444m,6: v_457m,7: v_470m,8: v_483m,9: v_496m,10: v_509m,11: v_522m,12: v_535m,13: v_548m,14: v_561m,15: v_574m"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "TX0DBMTRIMBIASN,TX0DBMTRIMBIASN" "0: v_378m,1: v_392m,2: v_405m,3: v_418p5m,4: v_431m,5: v_444m,6: v_457m,7: v_470m,8: v_483m,9: v_496m,10: v_509m,11: v_522m,12: v_535m,13: v_548m,14: v_561m,15: v_574m"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "PATRIM1,"
|
|
bitfld.long 0x00 16.--18. "TX0DBMTRIMTAPCAP,TX0DBMTRIMTAPCAP" "0: cap_0F,1: cap_0p35pF,2: cap_0p7pF,3: cap_1p05pF,4: cap_1p4pF,5: cap_1p75pF,6: cap_2p1pF,7: cap_2p45pF"
|
|
newline
|
|
bitfld.long 0x00 13.--15. "TX0DBMTRIMREGVREF,TX0DBMTRIMREGVREF" "0: v_900m,1: v_912p5m,2: v_925m,3: v_937p5m,4: v_950m,5: v_962p5m,6: v_975m,7: v_987p5m"
|
|
newline
|
|
bitfld.long 0x00 9.--12. "TX0DBMTRIMREGFB,TX0DBMTRIMREGFB" "0: vo_vi_0p475,1: vo_vi_0p500,2: vo_vi_0p525,3: vo_vi_0p550,4: vo_vi_0p575,5: vo_vi_0p600,6: vo_vi_0p625,7: vo_vi_0p650,8: vo_vi_0p675,9: vo_vi_0p700,10: vo_vi_0p725,11: vo_vi_0p750,12: vo_vi_0p775,13: vo_vi_0p800,14: vo_vi_0p825,15: vo_vi_0p850"
|
|
newline
|
|
bitfld.long 0x00 7.--8. "TX0DBMTRIMPREDRVSLOPE,TX0DBMTRIMPREDRVSLOPE" "0: slope_0,1: slope_1,2: slope_2,3: slope_max"
|
|
newline
|
|
bitfld.long 0x00 6. "TX0DBMTRIMPREDRVREGPSR,TX0DBMTRIMPREDRVREGPSR" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 2.--5. "TX0DBMTRIMPREDRVREGIBNDIO,TX0DBMTRIMPREDRVREGIBNDIO" "0: vreg_1p127,1: vreg_1p171,2: vreg_1p209,3: vreg_1p244,4: vreg_1p275,5: vreg_1p305,6: vreg_1p335,7: vreg_1p363,8: vreg_1p388,9: vreg_1p414,10: vreg_1p439,11: vreg_1p464,12: vreg_1p486,13: vreg_1p506,14: vreg_1p525,15: vreg_1p545"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "TX0DBMTRIMPREDRVREGIBCORE,TX0DBMTRIMPREDRVREGIBCORE" "0: i_4u,1: i_5u,2: i_6u,3: i_7u"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "PATRIM2,"
|
|
bitfld.long 0x00 11.--13. "TX6DBMTRIMDUTYCYP,TX6DBMTRIMDUTYCYP" "0: dn_0pct,1: dn_1pct,2: dn_2pct,3: dn_3pct,4: dn_4pct,5: dn_5pct,6: dn_6pct,7: na"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "TX6DBMTRIMDUTYCYN,TX6DBMTRIMDUTYCYN" "0: up_0pct,1: up_1pct,2: up_2pct,3: up_3pct,4: up_4pct,5: up_5pct,6: up_6pct,7: na"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "TX6DBMTRIMBIASP,TX6DBMTRIMBIASP" "0: vpbias_dn104mV,1: vpbias_dn91mV,2: vpbias_dn78mV,3: vpbias_dn65mV,4: vpbias_dn52mV,5: vpbias_dn39mV,6: vpbias_dn26mV,7: vpbias_dn13mV,8: vpbias_default_949mV,9: vpbias_up13mV,10: vpbias_up26mV,11: vpbias_up39mV,12: vpbias_up52mV,13: vpbias_up65mV,14: vpbias_up78mV,15: vpbias_up91mV"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "TX6DBMTRIMBIASN,TX6DBMTRIMBIASN" "0: vnbias_dn104mV,1: vnbias_dn91mV,2: vnbias_dn78mV,3: vnbias_dn65mV,4: vnbias_dn52mV,5: vnbias_dn39mV,6: vnbias_dn26mV,7: vnbias_dn13mV,8: vnbias_default_613mV,9: vnbias_up13mV,10: vnbias_up26mV,11: vnbias_up39mV,12: vnbias_up52mV,13: vnbias_up65mV,14: vnbias_up78mV,15: vnbias_up91mV"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "PATRIM3,No Description"
|
|
bitfld.long 0x00 21.--22. "TX6DBMTRIMRXMODEVREF,TX6DBMTRIMRXMODEVREF" "0: vddreg_1p05,1: vddreg_1p14,2: vddreg_1p20,3: vddreg_1p23"
|
|
newline
|
|
bitfld.long 0x00 17.--20. "TX6DBMTRIMREGVREF,TX6DBMTRIMREGVREF" "0: vref_0p6000,1: vref_0p6125,2: vref_0p6250,3: vref_0p6375,4: vref_0p6500,5: vref_0p6625,6: vref_0p6750,7: vref_0p6875,8: vref_0p7000,9: vref_0p7125,10: vref_0p7250,11: vref_0p7375,12: vref_0p7500,13: vref_0p7625,14: vref_0p7750,15: vref_0p7875"
|
|
newline
|
|
bitfld.long 0x00 14. "TX6DBMTRIMREGPSR,TX6DBMTRIMREGPSR" "0: low_PSR,1: high_PSR"
|
|
newline
|
|
bitfld.long 0x00 12.--13. "TX6DBMTRIMREGFB,TX6DBMTRIMREGFB" "0: Acl_2p0x,1: Acl_2p1x,2: Acl_2p3125x,3: Acl_2p5x"
|
|
newline
|
|
bitfld.long 0x00 11. "TX6DBMTRIMREGBLEEDAUTO,TX6DBMTRIMREGBLEEDAUTO" "0: not_automatic,1: automatic"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "TX6DBMTRIMPREDRVREGVREF,TX6DBMTRIMPREDRVREGVREF" "0: vref_0p675,1: vref_0p700,2: vref_0p725,3: vref_0p750,4: vref_0p775,5: vref_0p800,6: vref_0p825,7: vref_0p850"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "TX6DBMTRIMPREDRVREGSLICE,TX6DBMTRIMPREDRVREGSLICE" "0: iload_3mA,1: iload_6mA,2: iload_9mA,3: iload_12mA"
|
|
newline
|
|
bitfld.long 0x00 5. "TX6DBMTRIMPREDRVREGPSR,TX6DBMTRIMPREDRVREGPSR" "0: low_psr,1: high_psr"
|
|
newline
|
|
bitfld.long 0x00 4. "TX6DBMTRIMPREDRVREGFBKATT,TX6DBMTRIMPREDRVREGFBKATT" "0: reduce_BW,1: increase_BW"
|
|
newline
|
|
bitfld.long 0x00 2.--3. "TX6DBMTRIMPREDRVREGFB,TX6DBMTRIMPREDRVREGFB" "0: Acl_1p63,1: Acl_1p71,2: Acl_1p80,3: Acl_1p92"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "TX6DBMTRIMIBIASMASTER,TX6DBMTRIMIBIASMASTER" "0: ibias_45u,1: ibias_47p5u,2: ibias_50u,3: ibias_52p5u"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "PACTRL,"
|
|
bitfld.long 0x00 28. "TX6DBMREGBYPASS,TX6DBMREGBYPASS" "0: not_bypass,1: bypass"
|
|
newline
|
|
bitfld.long 0x00 27. "TX6DBMPULLDOWNREG,TX6DBMPULLDOWNREG" "0: not_pull_down,1: pull_down"
|
|
newline
|
|
bitfld.long 0x00 26. "TX6DBMPREDRVREGBYPASS,TX6DBMREGBYPASSPDRVLDo" "0: not_bypass,1: bypass"
|
|
newline
|
|
bitfld.long 0x00 25. "TX6DBMLATCHBYPASS,TX6DBMLATCHBYPASS" "0: not_bypass,1: bypass_latch"
|
|
newline
|
|
bitfld.long 0x00 24. "TX6DBMSLICERESET,TX6DBMSLICERESET" "0: disable_reset,1: enable_reset"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "TX6DBMSELSLICE,TX6DBMSELSLICE" "0: n_slice_on_0,1: n_slice_on_1,2: n_slice_on_2,3: n_slice_on_3,4: n_slice_on_4,5: tbd_5,6: tbd_6,7: tbd_7"
|
|
newline
|
|
bitfld.long 0x00 16.--20. "TX6DBMPOWER,TX6DBMPOWER" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 9. "TX0DBMLATCHBYPASS,TX0DBMLATCHBYPASS" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 8. "TX0DBMSLICERESET,TX0DBMSLICERESET" "0: active,1: reset"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "TX0DBMSELSLICE,TX0DBMSELSLICE" "0: on_0_slice,1: on_1_slices,2: on_2_slices,3: NA"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "TX0DBMPOWER,TX0DBMPOWER" "0: on_stripe_0,?,?,?,?,?,?,?,?,?,?,?,12: on_stripe_12,?..."
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "PGATRIM,"
|
|
bitfld.long 0x00 8.--10. "PGAVLDOTRIM,PGAVLDOTRIM" "0: vdda_1p15,1: vdda_1p2,2: vdda_1p25,3: vdda_1p3,4: vdda_1p35,5: vdda_1p4,6: vdda_1p5,7: vdda_1p55"
|
|
newline
|
|
bitfld.long 0x00 5.--7. "PGAVCMOUTTRIM,PGAVCMOUTTRIM" "0: vcm_out_0p4,1: vcm_out_0p45,2: vcm_out_0p5,3: vcm_out_0p55,4: vcm_out_0p6,5: vcm_out_0p65,6: vcm_out_0p7,7: vcm_out_0p75"
|
|
newline
|
|
bitfld.long 0x00 4. "PGADISANTILOCK,PGADISANTILOCK" "0: antilock_enable,1: antilock_disable"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "PGACTUNE,PGACTUNE" "0: cfb_0p7,?,?,?,?,?,?,7: cfb_nominal,?,?,?,?,?,?,?,15: cfb_1p32"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "PGACAL,"
|
|
bitfld.long 0x00 24.--29. "PGAOFFPCALQ,PGAOFFPCALQ" "0: offset_m_300mv,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,63: offset_p_300mv"
|
|
newline
|
|
bitfld.long 0x00 16.--21. "PGAOFFPCALI,PGAOFFPCALI" "0: offset_m_300mv,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,63: offset_p_300mv"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "PGAOFFNCALQ,PGAOFFNCALQ" "0: offset_m_300mv,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,63: offset_p_300mv"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "PGAOFFNCALI,PGAOFFNCALI" "0: offset_m_300mv,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,63: offset_p_300mv"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "PGACTRL,"
|
|
bitfld.long 0x00 24.--26. "LNAMIXRFPKDTHRESHSEL,LNAMIXRFPKDTHRESHSEL" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 20.--23. "PGATHRPKDHISEL,PGATHRPKDHISEL" "0: vref50mv,1: vref75mv,2: vref100mv,3: vref125mv,4: verf150mv,5: vref175mv,6: vref200mv,7: vref225mv,8: vref250mv,9: vref275mv,10: vref300mv,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--19. "PGATHRPKDLOSEL,PGATHRPKDLOSEL" "0: vref50mv,1: vref75mv,2: vref100mv,3: vref125mv,4: vref150mv,5: vref175mv,6: vref200mv,7: vref225mv,8: vref250mv,9: vref275mv,10: vref300mv,?..."
|
|
newline
|
|
bitfld.long 0x00 14.--15. "PGAPOWERMODE,PGAPOWERMODE" "0: pm_typ,1: pm_0p9,2: pm_1p2,3: pm_0p8"
|
|
newline
|
|
bitfld.long 0x00 12. "PGAENRCMOUT,PGAENRCMOUT" "0: rcm_out_disable,1: rcm_out_enable"
|
|
newline
|
|
bitfld.long 0x00 11. "PGAENPKD,PGAENPKD" "0: pkd_disable,1: pkd_enable"
|
|
newline
|
|
bitfld.long 0x00 10. "PGAENPGAQ,PGAENPGAQ" "0: pgaq_disable,1: pgaq_enable"
|
|
newline
|
|
bitfld.long 0x00 9. "PGAENPGAI,PGAENPGAI" "0: pgai_disable,1: pgai_enable"
|
|
newline
|
|
bitfld.long 0x00 7. "PGAENLDOLOAD,PGAENLDOLOAD" "0: disable_ldo_load,1: enable_ldo_load"
|
|
newline
|
|
bitfld.long 0x00 6. "PGAENLATCHQ,PGAENLATCHQ" "0: pkd_latch_q_disable,1: pkd_latch_q_enable"
|
|
newline
|
|
bitfld.long 0x00 5. "PGAENLATCHI,PGAENLATCHI" "0: pkd_latch_i_disable,1: pkd_latch_i_enable"
|
|
newline
|
|
bitfld.long 0x00 3. "PGAENGHZ,PGAENGHZ" "0: ghz_disable,1: ghz_enable"
|
|
newline
|
|
bitfld.long 0x00 2. "PGAENBIAS,PGAENBIAS" "0: bias_disable,1: bias_enable"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "PGABWMODE,PGABWMODE" "0: bw_5MHz,1: bw_2p5MHz,2: bw_1p67MHz,3: bw_1p25MHz"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "RFBIASCAL,"
|
|
bitfld.long 0x00 24.--29. "RFBIASCALVREFSTARTUP,RFBIASCALVREFSTARTUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 16.--21. "RFBIASCALVREF,RFBIASCALVREF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "RFBIASCALTC,RFBIASCALTC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "RFBIASCALBIAS,RFBIASCALBIAS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "RFBIASCTRL,"
|
|
bitfld.long 0x00 16.--19. "RFBIASLDOVREFTRIM,RFBIASLDOVREFTRIM" "0: vref_v0p800,1: vref_v0p813,2: vref_v0p825,3: vref_v0p837,4: vref_v0p850,5: vref_v0p863,6: vref_v0p875,7: vref_v0p887,8: vref_v0p900,9: vref_v0p913,10: vref_v0p925,11: vref_v0p938,12: vref_v0p950,13: vref_v0p963,14: vref_v0p975,15: vref_v0p988"
|
|
newline
|
|
bitfld.long 0x00 4. "RFBIASSTARTUPSUPPLY,RFBIASSTARTUPSUPPLY" "0: default,1: forc_start"
|
|
newline
|
|
bitfld.long 0x00 3. "RFBIASSTARTUPCORE,RFBIASSTARTUPCORE" "0: default,1: force_start"
|
|
newline
|
|
bitfld.long 0x00 2. "RFBIASNONFLASHMODE,RFBIASNONFLASHMODE" "0: flash_process,1: non_flash_process"
|
|
newline
|
|
bitfld.long 0x00 1. "RFBIASLDOHIGHCURRENT,RFBIASLDOHIGHCURRENT" "0: low_current,1: high_current"
|
|
newline
|
|
bitfld.long 0x00 0. "RFBIASDISABLEBOOTSTRAP,RFBIASDISABLEBOOTSTRAP" "0: enable_startup,1: disable_startup"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "RADIOEN,"
|
|
bitfld.long 0x00 2. "RFBIASEN,RFBIASEN" "0: disable_rfis_vtr,1: enable_rfis_vtr"
|
|
newline
|
|
bitfld.long 0x00 1. "PRESTB100UDIS,PRESTB100UDIS" "0: i100ua_enabled,1: i100ua_disabled"
|
|
newline
|
|
bitfld.long 0x00 0. "PREEN,PREEN" "0: powered_off,1: powered_on"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "RFPATHEN,No Description"
|
|
bitfld.long 0x00 4. "LNAMIXTRSW,LNAMIXTRSW" "0: disabled,1: enabled"
|
|
newline
|
|
bitfld.long 0x00 3. "LNAMIXRFPKDENRF,LNAMIXRFPKDENRF" "0: disable,1: enable_path"
|
|
newline
|
|
bitfld.long 0x00 2. "LNAMIXRFATTDCEN,LNAMIXRFATTDCEN" "0: disable_dc,1: enable_dc"
|
|
newline
|
|
bitfld.long 0x00 1. "LNAMIXEN,LNAMIXEN" "0: disable,1: enable"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "RX,"
|
|
bitfld.long 0x00 11. "TX6DBMENRXMODEBIAS,TX6DBMENRXMODEBIAS" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x00 10. "SYPFDFPWEN,SYPFDFPWEN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 9. "SYPFDCHPLPEN,SYPFDCHPLPEN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 8. "SYCHPQNC3EN,SYCHPQNC3EN" "0: qnc_2,1: qnc_3"
|
|
newline
|
|
bitfld.long 0x00 7. "SYCHPBIASTRIMBUF,SYCHPBIASTRIMBUF" "0: i_tail_10u,1: i_tail_20u"
|
|
newline
|
|
bitfld.long 0x00 6. "PGAENLDO,PGAENLDO" "0: disable_ldo,1: enable_ldo"
|
|
newline
|
|
bitfld.long 0x00 5. "LNAMIXREGLOADEN,LNAMIXREGLOADEN" "0: disable_resistor,1: enable_resistor"
|
|
newline
|
|
bitfld.long 0x00 4. "LNAMIXLDOLOWCUR,LNAMIXLDOLOWCUR" "0: regular_mode,1: low_current_mode"
|
|
newline
|
|
bitfld.long 0x00 3. "LNAMIXENRFPKD,LNAMIXENRFPKD" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 2. "IFADCENLDOSHUNT,IFADCENLDOSHUNT" "0: shunt_ldo_disable,1: shunt_ldo_enable"
|
|
newline
|
|
bitfld.long 0x00 1. "IFADCENLDOSERIES,IFADCENLDOSERIES" "0: series_ldo_disable,1: series_ldo_enable"
|
|
newline
|
|
bitfld.long 0x00 0. "IFADCCAPRESET,IFADCCAPRESET" "0: cap_reset_disable,1: cap_reset_enable"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "TX,"
|
|
bitfld.long 0x00 31. "ENPASELSLICE,Override" "0,1"
|
|
newline
|
|
bitfld.long 0x00 30. "ENPAPOWER,Override" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "ENXOSQBUFFILT,Override" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "TX6DBMENPAOUT,TX6DBMENPAOUT" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 24. "TX6DBMENPACORE,TX6DBMENPACORE" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 23. "TX6DBMENREG,TX6DBMENREG" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 22. "TX6DBMENRAMPCLK,TX6DBMENRAMPCLK" "0: disable_clock,1: enable_clock"
|
|
newline
|
|
bitfld.long 0x00 19. "TX6DBMENPREDRVREG,TX6DBMENPREDRVREG" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 17. "TX6DBMENBLEEDREG,TX6DBMENBLEEDREG" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 16. "TX6DBMENBLEEDPREDRVREG,TX6DBMENBLEEDPREDRVREG" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 7. "TX0DBMENREG,TX0DBMENREG" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 6. "TX0DBMENRAMPCLK,TX0DBMENRAMPCLK" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 5. "TX0DBMENBIAS,TX0DBMENBIAS" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 4. "TX0DBMENPREDRVREGBIAS,TX0DBMENPREDRVREGBIAS" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 3. "TX0DBMENPREDRVREG,TX0DBMENPREDRVREG" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 2. "TX0DBMENPREDRV,TX0DBMENPREDRV" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 1. "TX0DBMENBLEEDREG,TX0DBMENBLEEDREG" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 0. "TX0DBMENBLEEDPREDRVREG,TX0DBMENBLEEDPREDRVREG" "0: disable,1: enable"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "SYTRIM0,"
|
|
bitfld.long 0x00 20.--21. "SYTRIMCHPREGAMPBW,SYTRIMCHPREGAMPBW" "0: C_000f,1: C_300f,2: C_600f,3: C_900f"
|
|
newline
|
|
bitfld.long 0x00 17.--19. "SYTRIMCHPREGAMPBIAS,SYTRIMCHPREGAMPBIAS" "0: bias_14uA,1: bias_20uA,2: bias_26uA,3: bias_32uA,4: bias_38uA,5: bias_44uA,6: bias_50uA,7: bias_56uA"
|
|
newline
|
|
bitfld.long 0x00 14.--16. "SYCHPREPLICACURRADJ,SYCHPREPLICACURRADJ" "0: load_8ua,1: load_16ua,2: load_20ua,3: load_28ua,4: load_24ua,5: load_32ua,6: load_36ua,7: load_44ua"
|
|
newline
|
|
bitfld.long 0x00 13. "SYCHPSRCEN,SYCHPSRCEN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "SYCHPLEVPSRC,SYCHPLEVPSRC" "0: vsrcp_n105m,1: vsrcp_n90m,2: vsrcp_n75m,3: vsrcp_n60m,4: vsrcp_n45m,5: vsrcp_n30m,6: vsrcp_n15m,7: vsrcp_n0m"
|
|
newline
|
|
bitfld.long 0x00 6.--8. "SYCHPLEVNSRC,SYCHPLEVNSRC" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "SYCHPCURR,SYCHPCURR" "0: curr_1p5uA,1: curr_2p0uA,2: curr_2p5uA,3: curr_3p0uA,4: curr_3p5uA,5: curr_4p0uA,6: curr_4p5uA,7: curr_5p0uA"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "SYCHPBIAS,SYCHPBIAS" "0: bias_0,1: bias_1,?,3: bias_2,?,?,?,7: bias_3"
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "SYTRIM1,"
|
|
bitfld.long 0x00 29.--31. "SYLODIVSGTESTDIV,SYLODIVSGTESTDIV" "0: div2,1: div3,2: div4,3: div6,4: div8,5: div12,6: div16,7: div12x"
|
|
newline
|
|
bitfld.long 0x00 17. "SYLODIVRLOADCCLKSEL,SYLODIVRLOADCCLKSEL" "0: adc_clk_div8,1: adc_clk_div16"
|
|
newline
|
|
bitfld.long 0x00 15.--16. "SYTRIMMMDREGAMPBW,SYTRIMMMDREGAMPBW" "0: C_000f,1: C_300f,2: C_600f,3: C_900f"
|
|
newline
|
|
bitfld.long 0x00 12.--14. "SYTRIMMMDREGAMPBIAS,SYTRIMMMDREGAMPBIAS" "0: bias_14uA,1: bias_20uA,2: bias_26uA,3: bias_32uA,4: bias_38uA,5: bias_44uA,6: bias_50uA,7: bias_56uA"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "SYMMDREPLICA2CURRADJ,SYMMDREPLICA2CURRADJ" "0: load_32u,1: load_64u,2: load_96u,3: load_128u,4: load_160u,5: load_192u,6: load_224u,7: load_256u"
|
|
newline
|
|
bitfld.long 0x00 6.--8. "SYMMDREPLICA1CURRADJ,SYMMDREPLICA1CURRADJ" "0: load_8ua,1: load_16u,2: load_20ua,3: load_28ua,4: load_24ua,5: load_32ua,6: load_36ua,7: load_44ua"
|
|
newline
|
|
bitfld.long 0x00 2.--5. "SYLODIVLDOTRIMNDIO,SYLODIVLDOTRIMNDIO" "0: vreg_1p08,1: vreg_1p11,2: vreg_1p15,3: vreg_1p18,4: vreg_1p21,5: vreg_1p24,6: vreg_1p27,7: vreg_1p29,8: vreg_1p32,9: vreg_1p34,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--1. "SYLODIVLDOTRIMCORE,SYLODIVLDOTRIMCORE" "0: RXLO,?,?,3: TXLO"
|
|
group.long 0x158++0x03
|
|
line.long 0x00 "SYCAL,"
|
|
bitfld.long 0x00 24.--25. "SYHILOADCHPREG,SYHILOADCHPREG" "0: i_350uA,1: i_500uA,2: i_550uA,3: i_700uA"
|
|
newline
|
|
bitfld.long 0x00 15.--16. "SYVCOVCAPVCM,SYVCOVCAPVCM" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 10. "SYVCOSLOWNOISEFILTER,SYVCOSLOWNOISEFILTER" "0: slow_noise_filter_0,1: slow_noise_filter_1"
|
|
newline
|
|
bitfld.long 0x00 9. "SYVCOMORECURRENT,SYVCOMORECURRENT" "0: more_current_0,1: more_current_1"
|
|
newline
|
|
bitfld.long 0x00 8. "SYVCOMODEPKD,SYVCOMODEPKD" "0: t_openloop_0,1: t_pkdetect_1"
|
|
group.long 0x15C++0x03
|
|
line.long 0x00 "SYEN,"
|
|
bitfld.long 0x00 14. "SYSTARTMMDREG,SYSTARTMMDREG" "0: no_fast_startup,1: fast_startup"
|
|
newline
|
|
bitfld.long 0x00 13. "SYSTARTCHPREG,SYSTARTCHPREG" "0: no_fast_startup,1: fast_startup"
|
|
newline
|
|
bitfld.long 0x00 12. "SYLODIVLDOEN,SYLODIVLDOEN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 11. "SYLODIVLDOBIASEN,SYLODIVLDOBIASEN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 10. "SYLODIVEN,SYLODIVEN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 9. "SYENVCOREG,SYENVCOREG" "0: en_vco_reg_0,1: en_vco_reg_1"
|
|
newline
|
|
bitfld.long 0x00 8. "SYENVCOPFET,SYENVCOPFET" "0: en_vco_pfet_0,1: en_vco_pfet_1"
|
|
newline
|
|
bitfld.long 0x00 7. "SYENVCOBIAS,SYENVCOBIAS" "0: en_vco_bias_0,1: en_vco_bias_1"
|
|
newline
|
|
bitfld.long 0x00 6. "SYENMMDREPLICA2,SYENMMDREPLICA2" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x00 5. "SYENMMDREPLICA1,SYENMMDREPLICA1" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 4. "SYENMMDREG,SYENMMDREG" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x00 3. "SYENCHPREPLICA,SYENCHPREPLICA" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 2. "SYENCHPREG,SYENCHPREG" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x00 1. "SYCHPLPEN,SYCHPLPEN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 0. "SYCHPEN,SYCHPEN" "0: disable,1: enable"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "SYLOEN,"
|
|
bitfld.long 0x00 31. "SYLODIVSGTESTDIVEN,SYLODIVSGTESTDIVEN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 10. "SYLODIVTLO6DBM2G4EN,SYLODIVTLO6DBM2G4EN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 9. "SYLODIVTLO6DBM2G4AUXEN,SYLODIVTLO6DBM2G4AUXEN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 6. "SYLODIVTLO0DBM2G4EN,SYLODIVTLO0DBM2G4EN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 5. "SYLODIVTLO0DBM2G4AUXEN,SYLODIVTLO0DBM2G4AUXEN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 1. "SYLODIVRLO2G4EN,SYLODIVRLO2G4EN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 0. "SYLODIVRLOADCCLK2G4EN,SYLODIVRLOADCCLK2G4EN" "0: disable,1: enable"
|
|
group.long 0x168++0x03
|
|
line.long 0x00 "SYMMDCTRL,"
|
|
bitfld.long 0x00 9.--11. "SYMMDMODE,SYMMDMODE" "0: rx_w_swctrl,1: rx_wo_swctrl,2: qnc_dsm2,3: qnc_dsm3,4: rxlp_wo_swctrl,5: notuse_5,6: notuse_6,7: notuse_7"
|
|
newline
|
|
bitfld.long 0x00 1.--2. "SYMMDDIVRSDIG,SYMMDDIVRSDIG" "0: Divideby1,1: Divideby2,2: Divideby4,3: Divideby8"
|
|
newline
|
|
bitfld.long 0x00 0. "SYMMDENRSDIG,SYMMDENRSDIG" "0: disable,1: enable"
|
|
group.long 0x16C++0x03
|
|
line.long 0x00 "DIGCLKRETIMECTRL,No Description"
|
|
bitfld.long 0x00 8.--10. "DIGCLKRETIMELIMITL,DIGCLKRETIMELIMITL" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 4.--6. "DIGCLKRETIMELIMITH,DIGCLKRETIMELIMITH" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 2. "DIGCLKRETIMERESETN,DIGCLKRETIMERESETN" "0: operate,1: reset"
|
|
newline
|
|
bitfld.long 0x00 1. "DIGCLKRETIMEDISRETIME,DIGCLKRETIMEDISRETIME" "0: enable_retime,1: disable_retime"
|
|
newline
|
|
bitfld.long 0x00 0. "DIGCLKRETIMEENRETIME,DIGCLKRETIMEENRETIME" "0: disable,1: enable"
|
|
rgroup.long 0x170++0x03
|
|
line.long 0x00 "DIGCLKRETIMESTATUS,No Description"
|
|
bitfld.long 0x00 1. "DIGCLKRETIMERESETNLO,DIGCLKRETIMERESETNLO" "0: lo,1: hi"
|
|
newline
|
|
bitfld.long 0x00 0. "DIGCLKRETIMECLKSEL,DIGCLKRETIMECLKSEL" "0: use_raw_clk,1: use_retimed_clk"
|
|
group.long 0x174++0x03
|
|
line.long 0x00 "XORETIMECTRL,No Description"
|
|
bitfld.long 0x00 8.--10. "XORETIMELIMITL,XORETIMELIMITL" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 4.--6. "XORETIMELIMITH,XORETIMELIMITH" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 2. "XORETIMERESETN,XORETIMERESETN" "0: operate,1: reset"
|
|
newline
|
|
bitfld.long 0x00 1. "XORETIMEDISRETIME,XORETIMEDISRETIME" "0: enable_retime,1: disable_retime"
|
|
newline
|
|
bitfld.long 0x00 0. "XORETIMEENRETIME,XORETIMEENRETIME" "0: disable,1: enable"
|
|
rgroup.long 0x178++0x03
|
|
line.long 0x00 "XORETIMESTATUS,No Description"
|
|
bitfld.long 0x00 1. "XORETIMERESETNLO,XORETIMERESETNLO" "0: lo,1: hi"
|
|
newline
|
|
bitfld.long 0x00 0. "XORETIMECLKSEL,XORETIMECLKSEL" "0: use_raw_clk,1: use_retimed_clk"
|
|
group.long 0x17C++0x03
|
|
line.long 0x00 "XOSQBUFFILT,"
|
|
bitfld.long 0x00 0.--1. "XOSQBUFFILT,XOSQBUFFILT" "0: bypass,1: filter_1,2: filter_2,3: filter_3"
|
|
group.long 0x188++0x03
|
|
line.long 0x00 "AGCOVERWRITE,No Description"
|
|
bitfld.long 0x00 24.--25. "MANIFADCSCALE,RAC Overwite PGA" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 20.--23. "MANPGAGAIN,RAC Overwite PGA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--15. "MANLNAMIXSLICE,RAC Overwite LNA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 4.--9. "MANLNAMIXRFATT,RAC Overwite PN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 3. "ENMANIFADCSCALE,Enable RAC Overwite PN" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "ENMANPGAGAIN,Enable RAC Overwite PGA" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "ENMANLNAMIXSLICE,Enable RAC Overwite LNA" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "ENMANLNAMIXRFATT,Enable RAC Overwite PN" "0,1"
|
|
group.long 0x3E0++0x03
|
|
line.long 0x00 "SCRATCH0,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SCRATCH0,SCRATCH0"
|
|
group.long 0x3E4++0x03
|
|
line.long 0x00 "SCRATCH1,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SCRATCH1,SCRATCH1"
|
|
group.long 0x3E8++0x03
|
|
line.long 0x00 "SCRATCH2,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SCRATCH2,SCRATCH2"
|
|
group.long 0x3EC++0x03
|
|
line.long 0x00 "SCRATCH3,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SCRATCH3,SCRATCH3"
|
|
group.long 0x3F0++0x03
|
|
line.long 0x00 "SCRATCH4,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SCRATCH4,SCRATCH4"
|
|
group.long 0x3F4++0x03
|
|
line.long 0x00 "SCRATCH5,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SCRATCH5,SCRATCH5"
|
|
group.long 0x3F8++0x03
|
|
line.long 0x00 "SCRATCH6,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SCRATCH6,SCRATCH6"
|
|
group.long 0x3FC++0x03
|
|
line.long 0x00 "SCRATCH7,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SCRATCH7,SCRATCH7"
|
|
group.long 0x7E8++0x03
|
|
line.long 0x00 "THMSW,No Description"
|
|
bitfld.long 0x00 1. "HALFSWITCH,Halfswitch Mode enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "EN,Enable Switch" "0: Disabled,1: Enabled"
|
|
tree.end
|
|
tree "RAC_S"
|
|
base ad:0xA8020000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "IPVERSION,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "IPVERSION,IP Version"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "EN,No Description"
|
|
bitfld.long 0x00 0. "EN,Enable peripheral clock to this module" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RXENSRCEN,No Description"
|
|
bitfld.long 0x00 13. "PRSRXEN,PRS RX Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "DEMODRXREQEN,DEMOD RX Request Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "FRAMEDETEN,Frame Detected Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "PREDETEN,Preamble Detected Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "TIMDETEN,Timing Detected Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "CHANNELBUSYEN,Channel Busy Enable" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "SWRXEN,SW RX Enable"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "STATUS,No Description"
|
|
bitfld.long 0x00 31. "RXENS,RXEN Status" "0: RXEN is not set,1: RXEN is set"
|
|
newline
|
|
bitfld.long 0x00 30. "TXENS,TXEN Status" "0: TXEN is not set,1: TXEN is set"
|
|
newline
|
|
bitfld.long 0x00 28. "SEQACTIVE,SEQ active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24.--27. "STATE,Radio State" "0: Radio is off,1: Radio is enabling receiver,2: Radio is listening for incoming frames,3: Radio is receiving a frame,4: Radio is powering down receiver and going to..,5: Radio remains in receive mode after frame..,6: Received data was lost due to full receive..,7: Radio is disabling receiver and enabling..,8: Radio is enabling transmitter,9: Radio is transmitting data,10: Radio is powering down transmitter and going..,11: Radio is disabling transmitter and enabling..,12: Radio is preparing for a transmission after..,13: Radio is powering down receiver and going to..,14: Radio power-on-reset state,?..."
|
|
newline
|
|
bitfld.long 0x00 23. "SEQSLEEPDEEP,SEQ in deep sleep" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "SEQSLEEPING,SEQ in sleeping" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "TXAFTERFRAMEACTIVE,TX After Frame Active" "0: The currently ongoing TX was not initiated by..,1: The currently ongoing TX was initiated by a.."
|
|
newline
|
|
bitfld.long 0x00 20. "TXAFTERFRAMEPEND,TX After Frame Pending" "0: A transmit after frame operation is currently..,1: A transmit after frame operation is currently.."
|
|
newline
|
|
bitfld.long 0x00 19. "FORCESTATEACTIVE,FSM state force active" "0: No special state transition is currently in..,1: A forced state transition is currently in.."
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "RXMASK,Receive Enable Mask"
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "CMD,No Description"
|
|
bitfld.long 0x00 15. "LNAENCLEAR,LNAEN Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "LNAENSET,LNAEN Set" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "PAENCLEAR,PAEN Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "PAENSET,PAEN Set" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "FRCRD,FRC read cmd" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "FRCWR,FRC write cmd" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "RXDIS,RX Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "RXCAL,Start an RX Calibration" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "CLEARRXOVERFLOW,Clear RX Overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "TXDIS,TX Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TXAFTERFRAME,TX After Frame" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CLEARTXEN,Clear TX Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TXONCCA,Transmit On CCA" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "FORCETX,Force TX Command" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXEN,Transmitter Enable" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CTRL,No Description"
|
|
bitfld.long 0x00 28. "RXOFDIS,Switch to RXOVERFLOW Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "SEQCLKDIS,SEQ Clk Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26. "CPUWAITDIS,SEQ CPU Wait Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "EXITSHUTDOWNDIS,Exit SHUTDOWN state Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "SEQRESET,SEQ reset" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "PRSFORCETX,PRS Force RX" "0: PRS will not force TX,1: The channel selected by PRSFORCETXSEL will.."
|
|
newline
|
|
bitfld.long 0x00 10. "PRSRXDIS,PRS RX Disable" "0: PRS will not disable RX,1: The channel selected by PRSRXDISSEL will.."
|
|
newline
|
|
bitfld.long 0x00 9. "LNAENPOL,LNAEN signal polarity" "0: Active low,1: Active high"
|
|
newline
|
|
bitfld.long 0x00 8. "PAENPOL,PAEN signal polarity" "0: Active low,1: Active high"
|
|
newline
|
|
bitfld.long 0x00 7. "ACTIVEPOL,ACTIVE signal polarity" "0: Active low,1: Active high"
|
|
newline
|
|
bitfld.long 0x00 6. "TXPOSTPONE,TX Postpone" "0: In the TX state transmit data is output,1: In the TX state an unmodulated carrier is.."
|
|
newline
|
|
bitfld.long 0x00 5. "PRSCLR,PRS RXEN Clear" "0: The PRS RXEN signal is cleared when the RSM..,1: The Selected PRS channel in PRSCLRSEL is used.."
|
|
newline
|
|
bitfld.long 0x00 3. "PRSMODE,PRS RXEN Mode" "0: The PRS signal is used directly,1: The PRS signal is used as an RX enable pulse"
|
|
newline
|
|
bitfld.long 0x00 2. "TXAFTERRX,TX After RX" "0: TX will not be started automatically,1: A transition to TX is automatically started.."
|
|
newline
|
|
bitfld.long 0x00 1. "PRSTXEN,PRS TX Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "FORCEDISABLE,Force Radio Disable" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FORCESTATE,No Description"
|
|
bitfld.long 0x00 0.--3. "FORCESTATE,Force RAC state transition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "IF,No Description"
|
|
hexmask.long.byte 0x00 16.--23. 1. "SEQ,Sequencer Interrupt Flags"
|
|
newline
|
|
bitfld.long 0x00 3. "SEQRESETREQ,SEQ reset request" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "SEQLOCKUP,SEQ locked up" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "STIMCMPEV,STIMER Compare Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "STATECHANGE,Radio State Change" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "IEN,No Description"
|
|
hexmask.long.byte 0x00 16.--23. 1. "SEQ,Sequencer Flags Interrupt Enable"
|
|
newline
|
|
bitfld.long 0x00 3. "SEQRESETREQ,SEQ reset request Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "SEQLOCKUP,SEQ locked up Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "STIMCMPEV,STIMER Compare Event Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "STATECHANGE,Radio State Change Interrupt Enable" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "TESTCTRL,No Description"
|
|
bitfld.long 0x00 1. "DEMODEN,Demodulator enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "MODEN,Modulator enable" "0,1"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "SEQIF,No Description"
|
|
bitfld.long 0x00 29. "STATESHUTDOWN,entering STATE_SHUTDOWN" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "STATETX2TX,entering STATE_TX2TX" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "STATETX2RX,entering STATE_TX2RX" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26. "STATETXPD,entering STATE_TXPD" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "STATETX,entering STATE_TX" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "STATETXWARM,entering STATE_TXWARM" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "STATERX2TX,entering STATE_RX2TX" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "STATERXOVERFLOW,entering STATE_RXOVERFLOW" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "STATERX2RX,entering STATE_RX2RX" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "STATERXPD,entering STATE_RXPD" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "STATERXFRAME,entering STATE_RXFRAME" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "STATERXSEARCH,entering STATE_RXSEARCH" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "STATERXWARM,entering STATE_RXWARM" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "STATEOFF,entering STATE_OFF" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "PRSEVENTSEQ,SEQ PRS Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "DEMODRXREQCLRSEQ,Demod RX request clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "STIMCMPEVSEQ,STIMER Compare Event" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "STATECHANGESEQ,Radio State Change" "0,1"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "SEQIEN,No Description"
|
|
bitfld.long 0x00 29. "STATESHUTDOWN,STATE_SHUTDOWN Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "STATETX2TX,STATE_TX2TX Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "STATETX2RX,STATE_TX2RX Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26. "STATETXPD,STATE_TXPD Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "STATETX,STATE_TX Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "STATETXWARM,STATE_TXWARM Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "STATERX2TX,STATE_RX2TX Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "STATERXOVERFLOW,STATE_RXOVERFLOW Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "STATERX2RX,STATE_RX2RX Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "STATERXPD,STATE_RXPD Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "STATERXFRAME,STATE_RXFRAME Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "STATERXSEARCH,STATE_RXSEARC Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "STATERXWARM,STATE_RXWARM Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "STATEOFF,STATE_OFF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "PRSEVENTSEQ,PRS SEQ EVENT Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "DEMODRXREQCLRSEQ,Demod RX req clr Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "STIMCMPEVSEQ,STIMER Compare Event Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "STATECHANGESEQ,Radio State Change Interrupt Enable" "0,1"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "STIMER,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "STIMER,STIMER Register"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "STIMERCOMP,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "STIMERCOMP,STIMER Compare Register"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "SEQCTRL,No Description"
|
|
bitfld.long 0x00 24.--28. "SWIRQ,SW spare IRQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 6. "STATEDEBUGRUN,FSM state Debug Run" "0: FSM keeps unchanged when the Sequencer is..,1: FSM keeps going when the Sequencer is halted"
|
|
newline
|
|
bitfld.long 0x00 5. "STIMERDEBUGRUN,STIMER Debug Run" "0: STIMER is not running when the Sequencer is..,1: STIMER is running when the Sequencer is halted"
|
|
newline
|
|
bitfld.long 0x00 4. "STIMERALWAYSRUN,STIMER always Run" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "RELATIVE,STIMER Compare value relative" "0: The compare value set for stimer is an..,1: The compare value set for stimer is a.."
|
|
newline
|
|
bitfld.long 0x00 1.--2. "COMPINVALMODE,STIMER Comp Invalid Mode" "0: STIMERCOMP is always valid,1: STIMERCOMP is invalidated when the RSM..,2: STIMERCOMP is invalidated when an STIMER..,3: STIMERCOMP is invalidated both when the RSM.."
|
|
newline
|
|
bitfld.long 0x00 0. "COMPACT,STIMER Compare Action" "0: STIMER wraps when reaching STIMERCOMP,1: STIMER continues when reaching STIMERCOMP"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "PRESC,No Description"
|
|
hexmask.long.byte 0x00 0.--6. 1. "STIMER,STIMER Prescaler"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "SR0,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SR0,Sequencer Storage Register 0"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "SR1,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SR1,Sequencer Storage Register 1"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "SR2,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SR2,Sequencer Storage Register 2"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "SR3,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SR3,Sequencer Storage Register 3"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "STCTRL,No Description"
|
|
bitfld.long 0x00 24. "STSKEW,Systick timer skew" "0,1"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "STCAL,Systick timer freq cal"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "FRCTXWORD,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "WDATA,FRC write data"
|
|
rgroup.long 0x58++0x03
|
|
line.long 0x00 "FRCRXWORD,No Description"
|
|
hexmask.long.byte 0x00 0.--7. 1. "RDATA,FRC read data"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "EM1PCSR,No Description"
|
|
rbitfld.long 0x00 18. "RADIOEM1PHWREQ," "0,1"
|
|
newline
|
|
rbitfld.long 0x00 17. "RADIOEM1PACK," "0,1"
|
|
newline
|
|
rbitfld.long 0x00 16. "RADIOEM1PREQ," "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "MCUEM1PDISSWREQ," "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "MCUEM1PMODE," "0: Hardware Controls EM1P Request Signal,1: Software Controls EM1P Request Signal"
|
|
newline
|
|
bitfld.long 0x00 1. "RADIOEM1PDISSWREQ," "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "RADIOEM1PMODE," "0: Hardware Controls EM1P Request Signal,1: Software Controls EM1P Request Signal"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "SYNTHENCTRL,No Description"
|
|
bitfld.long 0x00 20. "LPFBWSEL,LPF bandwidth register selection" "0: Select LPFBWRX,1: Select LPFBWTX"
|
|
newline
|
|
bitfld.long 0x00 7. "VCBUFEN,SYLPFVCBUFEN" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "VCOSTARTUP,SYVCOFASTSTARTUP" "0: fast_start_up_0,1: fast_start_up_1"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "SYNTHREGCTRL,No Description"
|
|
bitfld.long 0x00 24.--26. "CHPLDOVREFTRIM,SYTRIMCHPREGVREF" "0: vref0p6000,1: vref0p6125,2: vref0p6250,3: vref0p6375,4: vref0p6500,5: vref0p6625,6: vref0p6750,7: vref0p6875"
|
|
newline
|
|
bitfld.long 0x00 10.--12. "MMDLDOVREFTRIM,SYTRIMMMDREGVREF" "0: vref0p6000,1: vref0p6125,2: vref0p6250,3: vref0p6375,4: vref0p6500,5: vref0p6625,6: vref0p6750,7: vref0p6875"
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "VCOCTRL,No Description"
|
|
bitfld.long 0x00 4.--7. "VCODETAMPLITUDE,SYVCOAMPLPKD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "VCOAMPLITUDE,SYVCOAMPLOPEN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "SYNTHCTRL,No Description"
|
|
bitfld.long 0x00 10. "MMDPOWERBALANCEDISABLE,SYMMDPOWERBALANCEENB" "0: EnablePowerbleed,1: DisablePowerBleed"
|
|
rgroup.long 0xAC++0x03
|
|
line.long 0x00 "STATUS2,No Description"
|
|
bitfld.long 0x00 12.--15. "CURRSTATE,Current Radio State" "0: Radio is off,1: Radio is enabling receiver,2: Radio is listening for incoming frames,3: Radio is receiving a frame,4: Radio is powering down receiver and going to..,5: Radio remains in receive mode after frame..,6: Received data was lost due to full receive..,7: Radio is disabling receiver and enabling..,8: Radio is enabling transmitter,9: Radio is transmitting data,10: Radio is powering down transmitter and going..,11: Radio is disabling transmitter and enabling..,12: Radio is preparing for a transmission after..,13: Radio is powering down receiver and going to..,14: Radio power-on-reset state,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--11. "PREVSTATE3,Previous Radio State 3" "0: Radio is off,1: Radio is enabling receiver,2: Radio is listening for incoming frames,3: Radio is receiving a frame,4: Radio is powering down receiver and going to..,5: Radio remains in receive mode after frame..,6: Received data was lost due to full receive..,7: Radio is disabling receiver and enabling..,8: Radio is enabling transmitter,9: Radio is transmitting data,10: Radio is powering down transmitter and going..,11: Radio is disabling transmitter and enabling..,12: Radio is preparing for a transmission after..,13: Radio is powering down receiver and going to..,14: Radio power-on-reset state,?..."
|
|
newline
|
|
bitfld.long 0x00 4.--7. "PREVSTATE2,Previous Radio State 2" "0: Radio is off,1: Radio is enabling receiver,2: Radio is listening for incoming frames,3: Radio is receiving a frame,4: Radio is powering down receiver and going to..,5: Radio remains in receive mode after frame..,6: Received data was lost due to full receive..,7: Radio is disabling receiver and enabling..,8: Radio is enabling transmitter,9: Radio is transmitting data,10: Radio is powering down transmitter and going..,11: Radio is disabling transmitter and enabling..,12: Radio is preparing for a transmission after..,13: Radio is powering down receiver and going to..,14: Radio power-on-reset state,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--3. "PREVSTATE1,Previous Radio State" "0: Radio is off,1: Radio is enabling receiver,2: Radio is listening for incoming frames,3: Radio is receiving a frame,4: Radio is powering down receiver and going to..,5: Radio remains in receive mode after frame..,6: Received data was lost due to full receive..,7: Radio is disabling receiver and enabling..,8: Radio is enabling transmitter,9: Radio is transmitting data,10: Radio is powering down transmitter and going..,11: Radio is disabling transmitter and enabling..,12: Radio is preparing for a transmission after..,13: Radio is powering down receiver and going to..,14: Radio power-on-reset state,?..."
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "IFPGACTRL,No Description"
|
|
bitfld.long 0x00 25.--27. "DCCALDCGEAR,DC COMP GEAR Value for DCCAL" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 22.--24. "DCCALDEC0,DEC0 Value for DCCAL" "0: Decimation Factor 0 = 3,1: Decimation Factor 0 = 4,2: Decimation Factor 0 = 4,3: Decimation Factor 0 = 8,4: Decimation Factor 0 = 8,?..."
|
|
newline
|
|
bitfld.long 0x00 21. "DCESTIEN,DCESTIEN Override for RAC" "0: DCESTI Disabled in MODEM,1: DCESTI Enabled in MODEM"
|
|
newline
|
|
bitfld.long 0x00 20. "DCRSTEN,DC Compensation Filter Reset Enable" "0: DC Comp out of Reset,1: DC Comp in Reset"
|
|
newline
|
|
bitfld.long 0x00 19. "DCCALON,Enable/Disable DCCAL in DEMOD" "0: DC ESTI DISABLED,1: DC ESTI ENABLED"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "PAENCTRL,No Description"
|
|
bitfld.long 0x00 28. "PARAMPMODE,PA ramp mode" "0: PA ramps in normal linear mode ramp offset..,1: PA ramps with an pre-determined offset that.."
|
|
newline
|
|
bitfld.long 0x00 16. "INVRAMPCLK,Invert PA ramping clock" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "PARAMP,PA output level ramping" "0,1"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "APC,No Description"
|
|
hexmask.long.byte 0x00 24.--31. 1. "AMPCONTROLLIMITSW,software amp_control top limit"
|
|
newline
|
|
bitfld.long 0x00 2. "ENAPCSW,software control bit for apc" "0: DISABLE,1: ENABLE"
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "AUXADCTRIM,"
|
|
bitfld.long 0x00 28. "AUXADCTSENSETRIMVBE2,AUXADCTSENSETRIMVBE2" "0: VBE_16uA,1: VBE_32uA"
|
|
newline
|
|
bitfld.long 0x00 26.--27. "AUXADCTRIMVREFVCM,AUXADCTRIMVREFVCM" "0: Trim0p6,1: Trim0p65,2: Trim0p7,3: Trim0p75"
|
|
newline
|
|
bitfld.long 0x00 24.--25. "AUXADCTRIMREFP,AUXADCTRIMREFP" "0: REF1p05,1: REF1p16,2: REF1p2,3: REF1p25"
|
|
newline
|
|
bitfld.long 0x00 23. "AUXADCTRIMLDOHIGHCURRENT,AUXADCTRIMLDOHIGHCURRENT" "0: LowCurrentMode,1: HighCurrentMode"
|
|
newline
|
|
bitfld.long 0x00 21.--22. "AUXADCTRIMCURRVCMBUF,AUXADCTRIMCURRVCMBUF" "0: Typ_minus_40pct,1: Typ_minus_20pct,2: Typ,3: Typ_plus_20pct"
|
|
newline
|
|
bitfld.long 0x00 19.--20. "AUXADCTRIMCURRTSENSE,AUXADCTRIMCURRTSENSE" "0: Typ_minus_40pct,1: Typ_minus_20pct,2: Typ,3: Typ_plus_20pct"
|
|
newline
|
|
bitfld.long 0x00 17.--18. "AUXADCTRIMCURRREFBUF,AUXADCTRIMCURRREFBUF" "0: Typ_minus_40pct,1: Typ_minus_20pct,2: Typ,3: Typ_plus_20pct"
|
|
newline
|
|
bitfld.long 0x00 15.--16. "AUXADCTRIMCURROPA2,AUXADCTRIMCURROPA2" "0: Typ_minus_40pct,1: Typ_minus_20pct,2: Typ,3: Typ_plus_20pct"
|
|
newline
|
|
bitfld.long 0x00 13.--14. "AUXADCTRIMCURROPA1,AUXADCTRIMCURROPA1" "0: Typ_minus_40pct,1: Typ_minus_20pct,2: Typ,3: Typ_plus_20pct"
|
|
newline
|
|
bitfld.long 0x00 11.--12. "AUXADCTRIMCURRINPUTBUF,AUXADCTRIMCURRINPUTBUF" "0: Typ_minus_40pct,1: Typ_minus_20pct,2: Typ,3: Typ_plus_20pct"
|
|
newline
|
|
bitfld.long 0x00 9.--10. "AUXADCTRIMADCINPUTRES,AUXADCTRIMADCINPUTRES" "0: RES200k,1: RES250k,2: RES300k,3: RES350k"
|
|
newline
|
|
bitfld.long 0x00 4.--8. "AUXADCRCTUNE,AUXADCRCTUNE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 3. "AUXADCOUTPUTINVERT,AUXADCOUTPUTINVERT" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 1.--2. "AUXADCLDOVREFTRIM,AUXADCLDOVREFTRIM" "0: TRIM1p27,1: TRIM1p3,2: TRIM1p35,3: TRIM1p4"
|
|
newline
|
|
bitfld.long 0x00 0. "AUXADCCLKINVERT,AUXADCCLKINVERT" "0: Disable_Invert,1: Enable_Invert"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "AUXADCEN,"
|
|
bitfld.long 0x00 9. "AUXADCENMEASTHERMISTOR,AUXADCENMEASTHERMISTOR" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 8. "AUXADCINPUTBUFFERBYPASS,AUXADCINPUTBUFFERBYPASS" "0: Not_Bypassed,1: Bypassed"
|
|
newline
|
|
bitfld.long 0x00 7. "AUXADCENTSENSECAL,AUXADCENTSENSECAL" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. "AUXADCENTSENSE,AUXADCENTSENSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 5. "AUXADCENRESONDIAGA,AUXADCENRESONDIAGA" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 4. "AUXADCENPMON,AUXADCENPMON" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 3. "AUXADCENOUTPUTDRV,AUXADCENOUTPUTDRV" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "AUXADCENLDO,AUXADCENLDO" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "AUXADCENINPUTBUFFER,AUXADCENINPUTBUFFER" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "AUXADCENAUXADC,AUXADCENAUXADC" "0: Disabled,1: Enabled"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "AUXADCCTRL0,No Description"
|
|
bitfld.long 0x00 13. "CLRFILTER,Clear accumulators" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "CLRCOUNTER,Clear counter" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "MUXSEL,Select accumulator" "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. "CYCLES,Cycle number to run"
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "AUXADCCTRL1,"
|
|
bitfld.long 0x00 28.--31. "AUXADCTHERMISTORFREQSEL,AUXADCTHERMISTORFREQSEL" "0: DIV1,1: DIV2,2: DIV4,3: DIV8,4: DIV16,5: DIV32,6: DIV64,7: DIV128,8: DIV256,9: DIV512,10: DIV1024,?..."
|
|
newline
|
|
bitfld.long 0x00 25. "AUXADCTSENSESELVBE,AUXADCTSENSESELVBE" "0: VBE1,1: VBE2"
|
|
newline
|
|
bitfld.long 0x00 24. "AUXADCRESET,AUXADCRESET" "0: Reset_Enabled,1: Reset_Disabled"
|
|
newline
|
|
bitfld.long 0x00 16.--20. "AUXADCTSENSESELCURR,AUXADCTSENSESELCURR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "AUXADCPMONSELECT,AUXADCPMONSELECT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "AUXADCINPUTSELECT,AUXADCINPUTSELECT" "0: SEL0,1: SEL1,2: SEL2,3: SEL3,4: SEL4,5: SEL5,6: SEL6,7: SEL7,8: SEL8,9: SEL9,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--3. "AUXADCINPUTRESSEL,AUXADCINPUTRESSEL" "0: RES640kOhm,1: RES320kOhm,2: RES160kOhm,3: RES80kOhm,4: RES40kOhm,5: RES20kOhm,6: RES10kOhm,7: RES5kOhm,8: RES2p5kOhm,9: RES1p25kOhm,10: RES0p6kOhm,11: RES_switch,?..."
|
|
rgroup.long 0xCC++0x03
|
|
line.long 0x00 "AUXADCOUT,No Description"
|
|
hexmask.long 0x00 0.--27. 1. "AUXADCOUT,AUXADC output"
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "CLKMULTEN0,"
|
|
bitfld.long 0x00 30.--31. "CLKMULTREG3ADJV,CLKMULTREG3ADJV" "0: v1p03,1: v1p06,2: v1p07,3: v1p09"
|
|
newline
|
|
bitfld.long 0x00 28.--29. "CLKMULTREG2ADJV,CLKMULTREG2ADJV" "0: v1p03,1: v1p09,2: v1p10,3: v1p16"
|
|
newline
|
|
bitfld.long 0x00 26.--27. "CLKMULTREG1ADJV,CLKMULTREG1ADJV" "0: v1p28,1: v1p32,2: v1p33,3: v1p38"
|
|
newline
|
|
bitfld.long 0x00 24.--25. "CLKMULTREG2ADJI,CLKMULTREG2ADJI" "0: I_80uA,1: I_100uA,2: I_120uA,3: I_140uA"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "CLKMULTFREQCAL,CLKMULTFREQCAL" "0: pedes_14uA,1: pedes_22uA,2: pedes_30uA,3: pedes_38uA"
|
|
newline
|
|
bitfld.long 0x00 20. "CLKMULTENBYPASS40MHZ,CLKMULTENBYPASS40MHZ" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 19. "CLKMULTENROTDET,CLKMULTENROTDET" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 18. "CLKMULTENREG3,CLKMULTENREG3" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 17. "CLKMULTENREG2,CLKMULTENREG2" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 16. "CLKMULTENREG1,CLKMULTENREG1" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 15. "CLKMULTENREFDIV,CLKMULTENREFDIV" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 14. "CLKMULTENFBDIV,CLKMULTENFBDIV" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 11. "CLKMULTENDRVRX2P4G,CLKMULTENDRVRX2P4G" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 10. "CLKMULTENDRVP,CLKMULTENDRVP" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 9. "CLKMULTENDRVN,CLKMULTENDRVN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 8. "CLKMULTENDRVADC,CLKMULTENDRVADC" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 7. "CLKMULTENDITHER,CLKMULTENDITHER" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 6. "CLKMULTENCFDET,CLKMULTENCFDET" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 5. "CLKMULTENBBXMDET,CLKMULTENBBXMDET" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 4. "CLKMULTENBBXLDET,CLKMULTENBBXLDET" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 3. "CLKMULTENBBDET,CLKMULTENBBDET" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 2. "CLKMULTDISICO,CLKMULTDISICO" "0: enable,1: disable"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "CLKMULTBWCAL,CLKMULTBWCAL" "0: bw_1lsb,1: bw_2lsb,2: bw_3lsb,3: bw_4lsb"
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "CLKMULTEN1,"
|
|
bitfld.long 0x00 11.--16. "CLKMULTDRVAMPSEL,CLKMULTDRVAMPSEL" "0: off,1: slide_x1,?,3: slide_x2,?,?,?,7: slide_x3,?,?,?,?,?,?,?,15: slide_x4,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,31: slide_x5,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,63: slide_x6"
|
|
newline
|
|
bitfld.long 0x00 10. "CLKMULTLDCNIB,CLKMULTLDCNIB" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 7.--8. "CLKMULTRDNIBBLE,CLKMULTRDNIBBLE" "0: quarter_nibble,1: fine_nibble,2: moderate_nibble,3: coarse_nibble"
|
|
newline
|
|
bitfld.long 0x00 6. "CLKMULTLDMNIB,CLKMULTLDMNIB" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 5. "CLKMULTLDFNIB,CLKMULTLDFNIB" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "CLKMULTINNIBBLE,CLKMULTINNIBBLE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xD8++0x03
|
|
line.long 0x00 "CLKMULTCTRL,"
|
|
bitfld.long 0x00 14. "CLKMULTVALID,CLKMULTVALID" "0: invalid,1: valid"
|
|
newline
|
|
bitfld.long 0x00 13. "CLKMULTENRESYNC,CLKMULTENRESYNC" "0: disable_sync,1: enable_sync"
|
|
newline
|
|
bitfld.long 0x00 10.--12. "CLKMULTDIVX,CLKMULTDIVX" "0: div_1,1: div_2,2: div_4,3: div_6,4: div_8,5: div10,6: div12,7: div14"
|
|
newline
|
|
bitfld.long 0x00 7.--9. "CLKMULTDIVR,CLKMULTDIVR" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--6. 1. "CLKMULTDIVN,CLKMULTDIVN"
|
|
rgroup.long 0xDC++0x03
|
|
line.long 0x00 "CLKMULTSTATUS,"
|
|
bitfld.long 0x00 4. "CLKMULTACKVALID,CLKMULTACKVALID" "0: invalid,1: valid"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "CLKMULTOUTNIBBLE,CLKMULTOUTNIBBLE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xE4++0x03
|
|
line.long 0x00 "IFADCTRIM0,"
|
|
bitfld.long 0x00 27.--29. "IFADCSIDETONEFREQ,IFADCSIDETONEFREQ" "0: na0,1: div_128,2: div_64,3: div_32,4: div_16,5: div_8,6: div_4,7: na7"
|
|
newline
|
|
bitfld.long 0x00 24.--26. "IFADCSIDETONEAMP,IFADCSIDETONEAMP" "0: diff_5p68mV,1: diff_29p1mV,2: diff_9p73mV,3: diff_76p9mV,4: diff_9p68_mV,5: diff_51_mV,6: diff_17p2_mV,7: disable"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "IFADCREFBUFCURLVL,IFADCREFBUFCURLVL" "0: i4u,1: i4p5u,2: i5u,3: i5p5u,4: i5u2,5: i5p5u2,6: i6u,7: i6p5u"
|
|
newline
|
|
bitfld.long 0x00 18.--20. "IFADCREFBUFAMPLVL,IFADCREFBUFAMPLVL" "0: v0p88,1: v0p91,2: v0p94,3: v0p97,4: v1p00,5: v1p03,6: v1p06,7: v1p09"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "IFADCOTACURRENT,IFADCOTACURRENT" "0: i3u,1: i3p5u,2: i4u,3: i4p5u,4: i4u2,5: i4p5u2,6: i5u,7: i5p5u"
|
|
newline
|
|
bitfld.long 0x00 12.--14. "IFADCLDOSHUNTCURLVL2,IFADCLDOSHUNTCURLVL2" "0: i4u,1: i4p5u,2: i5u,3: i5p5u,4: i5u2,5: i5p5u2,6: i6u,7: i6p5u"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "IFADCLDOSHUNTCURLVL1,IFADCLDOSHUNTCURLVL1" "0: i55u,1: i65u,2: i70u,3: i85u,4: i85u2,5: i95u,6: i100u,7: i110u"
|
|
newline
|
|
bitfld.long 0x00 8. "IFADCLDOSHUNTAMPLVL2,IFADCLDOSHUNTAMPLVL2" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 5.--7. "IFADCLDOSHUNTAMPLVL1,IFADCLDOSHUNTAMPLVL1" "0: v1p125,1: v1p150,2: v1p175,3: v1p200,4: v1p225,5: v1p250,6: v1p275,7: v1p300"
|
|
newline
|
|
bitfld.long 0x00 2.--4. "IFADCLDOSERIESAMPLVL,IFADCLDOSERIESAMPLVL" "0: v1p225,1: v1p250,2: v1p275,3: v1p300,4: v1p325,5: v1p350,6: v1p375,7: v1p400"
|
|
newline
|
|
bitfld.long 0x00 1. "IFADCENHALFMODE,IFADCENHALFMODE" "0: full_speed_mode,1: half_speed_mode"
|
|
newline
|
|
bitfld.long 0x00 0. "IFADCCLKSEL,IFADCCLKSEL" "0: clk_2p4g,1: clk_subg"
|
|
group.long 0xE8++0x03
|
|
line.long 0x00 "IFADCTRIM1,"
|
|
bitfld.long 0x00 7.--8. "IFADCNEGRESVCM,IFADCNEGRESVCM" "0: r210k_x_1uA,1: r210k_x_1uA2,2: r100k_x_2uA,3: r50k_x_3uA"
|
|
newline
|
|
bitfld.long 0x00 4.--6. "IFADCNEGRESCURRENT,IFADCNEGRESCURRENT" "0: i1p0u,1: i1p5u,2: i2p0u,3: i2p5u,4: i2p0u2,5: i2p5u2,6: i3p0u,7: i3p5u"
|
|
newline
|
|
bitfld.long 0x00 3. "IFADCENNEGRES,IFADCENNEGRES" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "IFADCVCMLVL,IFADCVCMLVL" "0: vcm_475mV,1: vcm_500mV,2: vcm_525mV,3: vcm_550mV,4: vcm_575mV,5: vcm_600mV,6: vcm_625mV,7: cm_650mV"
|
|
group.long 0xEC++0x03
|
|
line.long 0x00 "IFADCCAL,"
|
|
hexmask.long.byte 0x00 16.--23. 1. "IFADCRCCALCOUNTERSTARTVAL,IFADCRCCALCOUNTERSTARTVAL"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "IFADCTUNERC,IFADCTUNERC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 1. "IFADCTUNERCCALMODE,IFADCTUNERCCALMODE" "0: SYmode,1: ADCmode"
|
|
newline
|
|
bitfld.long 0x00 0. "IFADCENRCCAL,IFADCENRCCAL" "0: rccal_disable,1: rccal_enable"
|
|
rgroup.long 0xF0++0x03
|
|
line.long 0x00 "IFADCSTATUS,"
|
|
bitfld.long 0x00 0. "IFADCRCCALOUT,IFADCRCCALOUT" "0: lo,1: hi"
|
|
group.long 0xF8++0x03
|
|
line.long 0x00 "LNAMIXTRIM0,"
|
|
bitfld.long 0x00 25.--28. "LNAMIXTRIMVREG,LNAMIXTRIMVREG" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 20.--24. "LNAMIXRFPKDCALDM,LNAMIXRFPKDCALDM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 14.--19. "LNAMIXRFPKDCALCM,LNAMIXRFPKDCALCM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 12.--13. "LNAMIXRFPKDBWSEL,LNAMIXRFPKDBWSEL" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "LNAMIXLOWCUR,LNAMIXLOWCUR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "LNAMIXHIGHCUR,LNAMIXHIGHCUR" "0: current_470uA,1: current_530uA,2: unused,3: current_590uA"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "LNAMIXCURCTRL,LNAMIXCURCTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "LNAMIXTRIM1,"
|
|
bitfld.long 0x00 15.--18. "LNAMIXVOUTADJ,LNAMIXVOUTADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 13.--14. "LNAMIXPCASADJ,LNAMIXPCASADJ" "0: pcas_250m,1: unused,2: pcas_300m,3: pcas_350m"
|
|
newline
|
|
bitfld.long 0x00 11.--12. "LNAMIXNCASADJ,LNAMIXNCASADJ" "0: ncas_1V,1: unused,2: ncas_950m,3: ncas_900m"
|
|
newline
|
|
bitfld.long 0x00 9.--10. "LNAMIXMXRBIAS,LNAMIXMXRBIAS" "0: bias_1V,1: unused,2: bias_900m,3: bias_800m"
|
|
newline
|
|
bitfld.long 0x00 6.--8. "LNAMIXLNACAPSEL,LNAMIXLNACAPSEL" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "LNAMIXIBIASADJ,LNAMIXIBIASADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "LNAMIXCAL,"
|
|
bitfld.long 0x00 4.--6. "LNAMIXIRCALAMP,LNAMIXIRCALAMP" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 2. "LNAMIXENIRCAL,LNAMIXENIRCAL" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 1. "LNAMIXCALVMODE,LNAMIXCALVMODE" "0: current_mode,1: voltage_mode"
|
|
newline
|
|
bitfld.long 0x00 0. "LNAMIXCALEN,LNAMIXCALEN" "0: cal_disable,1: cal_enable"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "LNAMIXEN,"
|
|
bitfld.long 0x00 0. "LNAMIXENLDO,LNAMIXENLDO" "0: disable,1: enable"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "PRECTRL,"
|
|
bitfld.long 0x00 4.--5. "PREVREFTRIM,PREVREFTRIM" "0: v0p675,1: v0p688,2: v0p700,3: v0p713"
|
|
newline
|
|
bitfld.long 0x00 1.--3. "PREREGTRIM,PREREGTRIM" "0: v1p61,1: v1p68,2: v1p74,3: v1p80,4: v1p86,5: v1p91,6: v1p96,7: v2p00"
|
|
newline
|
|
bitfld.long 0x00 0. "PREBYPFORCE,PREBYPFORCE" "0: not_forced,1: forced"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "PATRIM0,"
|
|
bitfld.long 0x00 11.--13. "TX0DBMTRIMDUTYCYP,TX0DBMTRIMDUTYCYP" "0: dn_0pct,1: dn_1pct,2: dn_2pct,3: dn_3pct,4: dn_4pct,5: dn_5pct,6: dn_6pct,7: na"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "TX0DBMTRIMDUTYCYN,TX0DBMTRIMDUTYCYN" "0: up_0pct,1: up_1pct,2: up_2pct,3: up_3pct,4: up_4pct,5: up_5pct,6: up_6pct,7: na"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "TX0DBMTRIMBIASP,TX0DBMTRIMBIASP" "0: v_378m,1: v_392m,2: v_405m,3: v_418p5m,4: v_431m,5: v_444m,6: v_457m,7: v_470m,8: v_483m,9: v_496m,10: v_509m,11: v_522m,12: v_535m,13: v_548m,14: v_561m,15: v_574m"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "TX0DBMTRIMBIASN,TX0DBMTRIMBIASN" "0: v_378m,1: v_392m,2: v_405m,3: v_418p5m,4: v_431m,5: v_444m,6: v_457m,7: v_470m,8: v_483m,9: v_496m,10: v_509m,11: v_522m,12: v_535m,13: v_548m,14: v_561m,15: v_574m"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "PATRIM1,"
|
|
bitfld.long 0x00 16.--18. "TX0DBMTRIMTAPCAP,TX0DBMTRIMTAPCAP" "0: cap_0F,1: cap_0p35pF,2: cap_0p7pF,3: cap_1p05pF,4: cap_1p4pF,5: cap_1p75pF,6: cap_2p1pF,7: cap_2p45pF"
|
|
newline
|
|
bitfld.long 0x00 13.--15. "TX0DBMTRIMREGVREF,TX0DBMTRIMREGVREF" "0: v_900m,1: v_912p5m,2: v_925m,3: v_937p5m,4: v_950m,5: v_962p5m,6: v_975m,7: v_987p5m"
|
|
newline
|
|
bitfld.long 0x00 9.--12. "TX0DBMTRIMREGFB,TX0DBMTRIMREGFB" "0: vo_vi_0p475,1: vo_vi_0p500,2: vo_vi_0p525,3: vo_vi_0p550,4: vo_vi_0p575,5: vo_vi_0p600,6: vo_vi_0p625,7: vo_vi_0p650,8: vo_vi_0p675,9: vo_vi_0p700,10: vo_vi_0p725,11: vo_vi_0p750,12: vo_vi_0p775,13: vo_vi_0p800,14: vo_vi_0p825,15: vo_vi_0p850"
|
|
newline
|
|
bitfld.long 0x00 7.--8. "TX0DBMTRIMPREDRVSLOPE,TX0DBMTRIMPREDRVSLOPE" "0: slope_0,1: slope_1,2: slope_2,3: slope_max"
|
|
newline
|
|
bitfld.long 0x00 6. "TX0DBMTRIMPREDRVREGPSR,TX0DBMTRIMPREDRVREGPSR" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 2.--5. "TX0DBMTRIMPREDRVREGIBNDIO,TX0DBMTRIMPREDRVREGIBNDIO" "0: vreg_1p127,1: vreg_1p171,2: vreg_1p209,3: vreg_1p244,4: vreg_1p275,5: vreg_1p305,6: vreg_1p335,7: vreg_1p363,8: vreg_1p388,9: vreg_1p414,10: vreg_1p439,11: vreg_1p464,12: vreg_1p486,13: vreg_1p506,14: vreg_1p525,15: vreg_1p545"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "TX0DBMTRIMPREDRVREGIBCORE,TX0DBMTRIMPREDRVREGIBCORE" "0: i_4u,1: i_5u,2: i_6u,3: i_7u"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "PATRIM2,"
|
|
bitfld.long 0x00 11.--13. "TX6DBMTRIMDUTYCYP,TX6DBMTRIMDUTYCYP" "0: dn_0pct,1: dn_1pct,2: dn_2pct,3: dn_3pct,4: dn_4pct,5: dn_5pct,6: dn_6pct,7: na"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "TX6DBMTRIMDUTYCYN,TX6DBMTRIMDUTYCYN" "0: up_0pct,1: up_1pct,2: up_2pct,3: up_3pct,4: up_4pct,5: up_5pct,6: up_6pct,7: na"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "TX6DBMTRIMBIASP,TX6DBMTRIMBIASP" "0: vpbias_dn104mV,1: vpbias_dn91mV,2: vpbias_dn78mV,3: vpbias_dn65mV,4: vpbias_dn52mV,5: vpbias_dn39mV,6: vpbias_dn26mV,7: vpbias_dn13mV,8: vpbias_default_949mV,9: vpbias_up13mV,10: vpbias_up26mV,11: vpbias_up39mV,12: vpbias_up52mV,13: vpbias_up65mV,14: vpbias_up78mV,15: vpbias_up91mV"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "TX6DBMTRIMBIASN,TX6DBMTRIMBIASN" "0: vnbias_dn104mV,1: vnbias_dn91mV,2: vnbias_dn78mV,3: vnbias_dn65mV,4: vnbias_dn52mV,5: vnbias_dn39mV,6: vnbias_dn26mV,7: vnbias_dn13mV,8: vnbias_default_613mV,9: vnbias_up13mV,10: vnbias_up26mV,11: vnbias_up39mV,12: vnbias_up52mV,13: vnbias_up65mV,14: vnbias_up78mV,15: vnbias_up91mV"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "PATRIM3,No Description"
|
|
bitfld.long 0x00 21.--22. "TX6DBMTRIMRXMODEVREF,TX6DBMTRIMRXMODEVREF" "0: vddreg_1p05,1: vddreg_1p14,2: vddreg_1p20,3: vddreg_1p23"
|
|
newline
|
|
bitfld.long 0x00 17.--20. "TX6DBMTRIMREGVREF,TX6DBMTRIMREGVREF" "0: vref_0p6000,1: vref_0p6125,2: vref_0p6250,3: vref_0p6375,4: vref_0p6500,5: vref_0p6625,6: vref_0p6750,7: vref_0p6875,8: vref_0p7000,9: vref_0p7125,10: vref_0p7250,11: vref_0p7375,12: vref_0p7500,13: vref_0p7625,14: vref_0p7750,15: vref_0p7875"
|
|
newline
|
|
bitfld.long 0x00 14. "TX6DBMTRIMREGPSR,TX6DBMTRIMREGPSR" "0: low_PSR,1: high_PSR"
|
|
newline
|
|
bitfld.long 0x00 12.--13. "TX6DBMTRIMREGFB,TX6DBMTRIMREGFB" "0: Acl_2p0x,1: Acl_2p1x,2: Acl_2p3125x,3: Acl_2p5x"
|
|
newline
|
|
bitfld.long 0x00 11. "TX6DBMTRIMREGBLEEDAUTO,TX6DBMTRIMREGBLEEDAUTO" "0: not_automatic,1: automatic"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "TX6DBMTRIMPREDRVREGVREF,TX6DBMTRIMPREDRVREGVREF" "0: vref_0p675,1: vref_0p700,2: vref_0p725,3: vref_0p750,4: vref_0p775,5: vref_0p800,6: vref_0p825,7: vref_0p850"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "TX6DBMTRIMPREDRVREGSLICE,TX6DBMTRIMPREDRVREGSLICE" "0: iload_3mA,1: iload_6mA,2: iload_9mA,3: iload_12mA"
|
|
newline
|
|
bitfld.long 0x00 5. "TX6DBMTRIMPREDRVREGPSR,TX6DBMTRIMPREDRVREGPSR" "0: low_psr,1: high_psr"
|
|
newline
|
|
bitfld.long 0x00 4. "TX6DBMTRIMPREDRVREGFBKATT,TX6DBMTRIMPREDRVREGFBKATT" "0: reduce_BW,1: increase_BW"
|
|
newline
|
|
bitfld.long 0x00 2.--3. "TX6DBMTRIMPREDRVREGFB,TX6DBMTRIMPREDRVREGFB" "0: Acl_1p63,1: Acl_1p71,2: Acl_1p80,3: Acl_1p92"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "TX6DBMTRIMIBIASMASTER,TX6DBMTRIMIBIASMASTER" "0: ibias_45u,1: ibias_47p5u,2: ibias_50u,3: ibias_52p5u"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "PACTRL,"
|
|
bitfld.long 0x00 28. "TX6DBMREGBYPASS,TX6DBMREGBYPASS" "0: not_bypass,1: bypass"
|
|
newline
|
|
bitfld.long 0x00 27. "TX6DBMPULLDOWNREG,TX6DBMPULLDOWNREG" "0: not_pull_down,1: pull_down"
|
|
newline
|
|
bitfld.long 0x00 26. "TX6DBMPREDRVREGBYPASS,TX6DBMREGBYPASSPDRVLDo" "0: not_bypass,1: bypass"
|
|
newline
|
|
bitfld.long 0x00 25. "TX6DBMLATCHBYPASS,TX6DBMLATCHBYPASS" "0: not_bypass,1: bypass_latch"
|
|
newline
|
|
bitfld.long 0x00 24. "TX6DBMSLICERESET,TX6DBMSLICERESET" "0: disable_reset,1: enable_reset"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "TX6DBMSELSLICE,TX6DBMSELSLICE" "0: n_slice_on_0,1: n_slice_on_1,2: n_slice_on_2,3: n_slice_on_3,4: n_slice_on_4,5: tbd_5,6: tbd_6,7: tbd_7"
|
|
newline
|
|
bitfld.long 0x00 16.--20. "TX6DBMPOWER,TX6DBMPOWER" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 9. "TX0DBMLATCHBYPASS,TX0DBMLATCHBYPASS" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 8. "TX0DBMSLICERESET,TX0DBMSLICERESET" "0: active,1: reset"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "TX0DBMSELSLICE,TX0DBMSELSLICE" "0: on_0_slice,1: on_1_slices,2: on_2_slices,3: NA"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "TX0DBMPOWER,TX0DBMPOWER" "0: on_stripe_0,?,?,?,?,?,?,?,?,?,?,?,12: on_stripe_12,?..."
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "PGATRIM,"
|
|
bitfld.long 0x00 8.--10. "PGAVLDOTRIM,PGAVLDOTRIM" "0: vdda_1p15,1: vdda_1p2,2: vdda_1p25,3: vdda_1p3,4: vdda_1p35,5: vdda_1p4,6: vdda_1p5,7: vdda_1p55"
|
|
newline
|
|
bitfld.long 0x00 5.--7. "PGAVCMOUTTRIM,PGAVCMOUTTRIM" "0: vcm_out_0p4,1: vcm_out_0p45,2: vcm_out_0p5,3: vcm_out_0p55,4: vcm_out_0p6,5: vcm_out_0p65,6: vcm_out_0p7,7: vcm_out_0p75"
|
|
newline
|
|
bitfld.long 0x00 4. "PGADISANTILOCK,PGADISANTILOCK" "0: antilock_enable,1: antilock_disable"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "PGACTUNE,PGACTUNE" "0: cfb_0p7,?,?,?,?,?,?,7: cfb_nominal,?,?,?,?,?,?,?,15: cfb_1p32"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "PGACAL,"
|
|
bitfld.long 0x00 24.--29. "PGAOFFPCALQ,PGAOFFPCALQ" "0: offset_m_300mv,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,63: offset_p_300mv"
|
|
newline
|
|
bitfld.long 0x00 16.--21. "PGAOFFPCALI,PGAOFFPCALI" "0: offset_m_300mv,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,63: offset_p_300mv"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "PGAOFFNCALQ,PGAOFFNCALQ" "0: offset_m_300mv,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,63: offset_p_300mv"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "PGAOFFNCALI,PGAOFFNCALI" "0: offset_m_300mv,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,63: offset_p_300mv"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "PGACTRL,"
|
|
bitfld.long 0x00 24.--26. "LNAMIXRFPKDTHRESHSEL,LNAMIXRFPKDTHRESHSEL" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 20.--23. "PGATHRPKDHISEL,PGATHRPKDHISEL" "0: vref50mv,1: vref75mv,2: vref100mv,3: vref125mv,4: verf150mv,5: vref175mv,6: vref200mv,7: vref225mv,8: vref250mv,9: vref275mv,10: vref300mv,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--19. "PGATHRPKDLOSEL,PGATHRPKDLOSEL" "0: vref50mv,1: vref75mv,2: vref100mv,3: vref125mv,4: vref150mv,5: vref175mv,6: vref200mv,7: vref225mv,8: vref250mv,9: vref275mv,10: vref300mv,?..."
|
|
newline
|
|
bitfld.long 0x00 14.--15. "PGAPOWERMODE,PGAPOWERMODE" "0: pm_typ,1: pm_0p9,2: pm_1p2,3: pm_0p8"
|
|
newline
|
|
bitfld.long 0x00 12. "PGAENRCMOUT,PGAENRCMOUT" "0: rcm_out_disable,1: rcm_out_enable"
|
|
newline
|
|
bitfld.long 0x00 11. "PGAENPKD,PGAENPKD" "0: pkd_disable,1: pkd_enable"
|
|
newline
|
|
bitfld.long 0x00 10. "PGAENPGAQ,PGAENPGAQ" "0: pgaq_disable,1: pgaq_enable"
|
|
newline
|
|
bitfld.long 0x00 9. "PGAENPGAI,PGAENPGAI" "0: pgai_disable,1: pgai_enable"
|
|
newline
|
|
bitfld.long 0x00 7. "PGAENLDOLOAD,PGAENLDOLOAD" "0: disable_ldo_load,1: enable_ldo_load"
|
|
newline
|
|
bitfld.long 0x00 6. "PGAENLATCHQ,PGAENLATCHQ" "0: pkd_latch_q_disable,1: pkd_latch_q_enable"
|
|
newline
|
|
bitfld.long 0x00 5. "PGAENLATCHI,PGAENLATCHI" "0: pkd_latch_i_disable,1: pkd_latch_i_enable"
|
|
newline
|
|
bitfld.long 0x00 3. "PGAENGHZ,PGAENGHZ" "0: ghz_disable,1: ghz_enable"
|
|
newline
|
|
bitfld.long 0x00 2. "PGAENBIAS,PGAENBIAS" "0: bias_disable,1: bias_enable"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "PGABWMODE,PGABWMODE" "0: bw_5MHz,1: bw_2p5MHz,2: bw_1p67MHz,3: bw_1p25MHz"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "RFBIASCAL,"
|
|
bitfld.long 0x00 24.--29. "RFBIASCALVREFSTARTUP,RFBIASCALVREFSTARTUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 16.--21. "RFBIASCALVREF,RFBIASCALVREF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "RFBIASCALTC,RFBIASCALTC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "RFBIASCALBIAS,RFBIASCALBIAS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "RFBIASCTRL,"
|
|
bitfld.long 0x00 16.--19. "RFBIASLDOVREFTRIM,RFBIASLDOVREFTRIM" "0: vref_v0p800,1: vref_v0p813,2: vref_v0p825,3: vref_v0p837,4: vref_v0p850,5: vref_v0p863,6: vref_v0p875,7: vref_v0p887,8: vref_v0p900,9: vref_v0p913,10: vref_v0p925,11: vref_v0p938,12: vref_v0p950,13: vref_v0p963,14: vref_v0p975,15: vref_v0p988"
|
|
newline
|
|
bitfld.long 0x00 4. "RFBIASSTARTUPSUPPLY,RFBIASSTARTUPSUPPLY" "0: default,1: forc_start"
|
|
newline
|
|
bitfld.long 0x00 3. "RFBIASSTARTUPCORE,RFBIASSTARTUPCORE" "0: default,1: force_start"
|
|
newline
|
|
bitfld.long 0x00 2. "RFBIASNONFLASHMODE,RFBIASNONFLASHMODE" "0: flash_process,1: non_flash_process"
|
|
newline
|
|
bitfld.long 0x00 1. "RFBIASLDOHIGHCURRENT,RFBIASLDOHIGHCURRENT" "0: low_current,1: high_current"
|
|
newline
|
|
bitfld.long 0x00 0. "RFBIASDISABLEBOOTSTRAP,RFBIASDISABLEBOOTSTRAP" "0: enable_startup,1: disable_startup"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "RADIOEN,"
|
|
bitfld.long 0x00 2. "RFBIASEN,RFBIASEN" "0: disable_rfis_vtr,1: enable_rfis_vtr"
|
|
newline
|
|
bitfld.long 0x00 1. "PRESTB100UDIS,PRESTB100UDIS" "0: i100ua_enabled,1: i100ua_disabled"
|
|
newline
|
|
bitfld.long 0x00 0. "PREEN,PREEN" "0: powered_off,1: powered_on"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "RFPATHEN,No Description"
|
|
bitfld.long 0x00 4. "LNAMIXTRSW,LNAMIXTRSW" "0: disabled,1: enabled"
|
|
newline
|
|
bitfld.long 0x00 3. "LNAMIXRFPKDENRF,LNAMIXRFPKDENRF" "0: disable,1: enable_path"
|
|
newline
|
|
bitfld.long 0x00 2. "LNAMIXRFATTDCEN,LNAMIXRFATTDCEN" "0: disable_dc,1: enable_dc"
|
|
newline
|
|
bitfld.long 0x00 1. "LNAMIXEN,LNAMIXEN" "0: disable,1: enable"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "RX,"
|
|
bitfld.long 0x00 11. "TX6DBMENRXMODEBIAS,TX6DBMENRXMODEBIAS" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x00 10. "SYPFDFPWEN,SYPFDFPWEN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 9. "SYPFDCHPLPEN,SYPFDCHPLPEN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 8. "SYCHPQNC3EN,SYCHPQNC3EN" "0: qnc_2,1: qnc_3"
|
|
newline
|
|
bitfld.long 0x00 7. "SYCHPBIASTRIMBUF,SYCHPBIASTRIMBUF" "0: i_tail_10u,1: i_tail_20u"
|
|
newline
|
|
bitfld.long 0x00 6. "PGAENLDO,PGAENLDO" "0: disable_ldo,1: enable_ldo"
|
|
newline
|
|
bitfld.long 0x00 5. "LNAMIXREGLOADEN,LNAMIXREGLOADEN" "0: disable_resistor,1: enable_resistor"
|
|
newline
|
|
bitfld.long 0x00 4. "LNAMIXLDOLOWCUR,LNAMIXLDOLOWCUR" "0: regular_mode,1: low_current_mode"
|
|
newline
|
|
bitfld.long 0x00 3. "LNAMIXENRFPKD,LNAMIXENRFPKD" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 2. "IFADCENLDOSHUNT,IFADCENLDOSHUNT" "0: shunt_ldo_disable,1: shunt_ldo_enable"
|
|
newline
|
|
bitfld.long 0x00 1. "IFADCENLDOSERIES,IFADCENLDOSERIES" "0: series_ldo_disable,1: series_ldo_enable"
|
|
newline
|
|
bitfld.long 0x00 0. "IFADCCAPRESET,IFADCCAPRESET" "0: cap_reset_disable,1: cap_reset_enable"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "TX,"
|
|
bitfld.long 0x00 31. "ENPASELSLICE,Override" "0,1"
|
|
newline
|
|
bitfld.long 0x00 30. "ENPAPOWER,Override" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "ENXOSQBUFFILT,Override" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "TX6DBMENPAOUT,TX6DBMENPAOUT" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 24. "TX6DBMENPACORE,TX6DBMENPACORE" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 23. "TX6DBMENREG,TX6DBMENREG" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 22. "TX6DBMENRAMPCLK,TX6DBMENRAMPCLK" "0: disable_clock,1: enable_clock"
|
|
newline
|
|
bitfld.long 0x00 19. "TX6DBMENPREDRVREG,TX6DBMENPREDRVREG" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 17. "TX6DBMENBLEEDREG,TX6DBMENBLEEDREG" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 16. "TX6DBMENBLEEDPREDRVREG,TX6DBMENBLEEDPREDRVREG" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 7. "TX0DBMENREG,TX0DBMENREG" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 6. "TX0DBMENRAMPCLK,TX0DBMENRAMPCLK" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 5. "TX0DBMENBIAS,TX0DBMENBIAS" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 4. "TX0DBMENPREDRVREGBIAS,TX0DBMENPREDRVREGBIAS" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 3. "TX0DBMENPREDRVREG,TX0DBMENPREDRVREG" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 2. "TX0DBMENPREDRV,TX0DBMENPREDRV" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 1. "TX0DBMENBLEEDREG,TX0DBMENBLEEDREG" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 0. "TX0DBMENBLEEDPREDRVREG,TX0DBMENBLEEDPREDRVREG" "0: disable,1: enable"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "SYTRIM0,"
|
|
bitfld.long 0x00 20.--21. "SYTRIMCHPREGAMPBW,SYTRIMCHPREGAMPBW" "0: C_000f,1: C_300f,2: C_600f,3: C_900f"
|
|
newline
|
|
bitfld.long 0x00 17.--19. "SYTRIMCHPREGAMPBIAS,SYTRIMCHPREGAMPBIAS" "0: bias_14uA,1: bias_20uA,2: bias_26uA,3: bias_32uA,4: bias_38uA,5: bias_44uA,6: bias_50uA,7: bias_56uA"
|
|
newline
|
|
bitfld.long 0x00 14.--16. "SYCHPREPLICACURRADJ,SYCHPREPLICACURRADJ" "0: load_8ua,1: load_16ua,2: load_20ua,3: load_28ua,4: load_24ua,5: load_32ua,6: load_36ua,7: load_44ua"
|
|
newline
|
|
bitfld.long 0x00 13. "SYCHPSRCEN,SYCHPSRCEN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "SYCHPLEVPSRC,SYCHPLEVPSRC" "0: vsrcp_n105m,1: vsrcp_n90m,2: vsrcp_n75m,3: vsrcp_n60m,4: vsrcp_n45m,5: vsrcp_n30m,6: vsrcp_n15m,7: vsrcp_n0m"
|
|
newline
|
|
bitfld.long 0x00 6.--8. "SYCHPLEVNSRC,SYCHPLEVNSRC" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "SYCHPCURR,SYCHPCURR" "0: curr_1p5uA,1: curr_2p0uA,2: curr_2p5uA,3: curr_3p0uA,4: curr_3p5uA,5: curr_4p0uA,6: curr_4p5uA,7: curr_5p0uA"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "SYCHPBIAS,SYCHPBIAS" "0: bias_0,1: bias_1,?,3: bias_2,?,?,?,7: bias_3"
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "SYTRIM1,"
|
|
bitfld.long 0x00 29.--31. "SYLODIVSGTESTDIV,SYLODIVSGTESTDIV" "0: div2,1: div3,2: div4,3: div6,4: div8,5: div12,6: div16,7: div12x"
|
|
newline
|
|
bitfld.long 0x00 17. "SYLODIVRLOADCCLKSEL,SYLODIVRLOADCCLKSEL" "0: adc_clk_div8,1: adc_clk_div16"
|
|
newline
|
|
bitfld.long 0x00 15.--16. "SYTRIMMMDREGAMPBW,SYTRIMMMDREGAMPBW" "0: C_000f,1: C_300f,2: C_600f,3: C_900f"
|
|
newline
|
|
bitfld.long 0x00 12.--14. "SYTRIMMMDREGAMPBIAS,SYTRIMMMDREGAMPBIAS" "0: bias_14uA,1: bias_20uA,2: bias_26uA,3: bias_32uA,4: bias_38uA,5: bias_44uA,6: bias_50uA,7: bias_56uA"
|
|
newline
|
|
bitfld.long 0x00 9.--11. "SYMMDREPLICA2CURRADJ,SYMMDREPLICA2CURRADJ" "0: load_32u,1: load_64u,2: load_96u,3: load_128u,4: load_160u,5: load_192u,6: load_224u,7: load_256u"
|
|
newline
|
|
bitfld.long 0x00 6.--8. "SYMMDREPLICA1CURRADJ,SYMMDREPLICA1CURRADJ" "0: load_8ua,1: load_16u,2: load_20ua,3: load_28ua,4: load_24ua,5: load_32ua,6: load_36ua,7: load_44ua"
|
|
newline
|
|
bitfld.long 0x00 2.--5. "SYLODIVLDOTRIMNDIO,SYLODIVLDOTRIMNDIO" "0: vreg_1p08,1: vreg_1p11,2: vreg_1p15,3: vreg_1p18,4: vreg_1p21,5: vreg_1p24,6: vreg_1p27,7: vreg_1p29,8: vreg_1p32,9: vreg_1p34,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--1. "SYLODIVLDOTRIMCORE,SYLODIVLDOTRIMCORE" "0: RXLO,?,?,3: TXLO"
|
|
group.long 0x158++0x03
|
|
line.long 0x00 "SYCAL,"
|
|
bitfld.long 0x00 24.--25. "SYHILOADCHPREG,SYHILOADCHPREG" "0: i_350uA,1: i_500uA,2: i_550uA,3: i_700uA"
|
|
newline
|
|
bitfld.long 0x00 15.--16. "SYVCOVCAPVCM,SYVCOVCAPVCM" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 10. "SYVCOSLOWNOISEFILTER,SYVCOSLOWNOISEFILTER" "0: slow_noise_filter_0,1: slow_noise_filter_1"
|
|
newline
|
|
bitfld.long 0x00 9. "SYVCOMORECURRENT,SYVCOMORECURRENT" "0: more_current_0,1: more_current_1"
|
|
newline
|
|
bitfld.long 0x00 8. "SYVCOMODEPKD,SYVCOMODEPKD" "0: t_openloop_0,1: t_pkdetect_1"
|
|
group.long 0x15C++0x03
|
|
line.long 0x00 "SYEN,"
|
|
bitfld.long 0x00 14. "SYSTARTMMDREG,SYSTARTMMDREG" "0: no_fast_startup,1: fast_startup"
|
|
newline
|
|
bitfld.long 0x00 13. "SYSTARTCHPREG,SYSTARTCHPREG" "0: no_fast_startup,1: fast_startup"
|
|
newline
|
|
bitfld.long 0x00 12. "SYLODIVLDOEN,SYLODIVLDOEN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 11. "SYLODIVLDOBIASEN,SYLODIVLDOBIASEN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 10. "SYLODIVEN,SYLODIVEN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 9. "SYENVCOREG,SYENVCOREG" "0: en_vco_reg_0,1: en_vco_reg_1"
|
|
newline
|
|
bitfld.long 0x00 8. "SYENVCOPFET,SYENVCOPFET" "0: en_vco_pfet_0,1: en_vco_pfet_1"
|
|
newline
|
|
bitfld.long 0x00 7. "SYENVCOBIAS,SYENVCOBIAS" "0: en_vco_bias_0,1: en_vco_bias_1"
|
|
newline
|
|
bitfld.long 0x00 6. "SYENMMDREPLICA2,SYENMMDREPLICA2" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x00 5. "SYENMMDREPLICA1,SYENMMDREPLICA1" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 4. "SYENMMDREG,SYENMMDREG" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x00 3. "SYENCHPREPLICA,SYENCHPREPLICA" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 2. "SYENCHPREG,SYENCHPREG" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x00 1. "SYCHPLPEN,SYCHPLPEN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 0. "SYCHPEN,SYCHPEN" "0: disable,1: enable"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "SYLOEN,"
|
|
bitfld.long 0x00 31. "SYLODIVSGTESTDIVEN,SYLODIVSGTESTDIVEN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 10. "SYLODIVTLO6DBM2G4EN,SYLODIVTLO6DBM2G4EN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 9. "SYLODIVTLO6DBM2G4AUXEN,SYLODIVTLO6DBM2G4AUXEN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 6. "SYLODIVTLO0DBM2G4EN,SYLODIVTLO0DBM2G4EN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 5. "SYLODIVTLO0DBM2G4AUXEN,SYLODIVTLO0DBM2G4AUXEN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 1. "SYLODIVRLO2G4EN,SYLODIVRLO2G4EN" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 0. "SYLODIVRLOADCCLK2G4EN,SYLODIVRLOADCCLK2G4EN" "0: disable,1: enable"
|
|
group.long 0x168++0x03
|
|
line.long 0x00 "SYMMDCTRL,"
|
|
bitfld.long 0x00 9.--11. "SYMMDMODE,SYMMDMODE" "0: rx_w_swctrl,1: rx_wo_swctrl,2: qnc_dsm2,3: qnc_dsm3,4: rxlp_wo_swctrl,5: notuse_5,6: notuse_6,7: notuse_7"
|
|
newline
|
|
bitfld.long 0x00 1.--2. "SYMMDDIVRSDIG,SYMMDDIVRSDIG" "0: Divideby1,1: Divideby2,2: Divideby4,3: Divideby8"
|
|
newline
|
|
bitfld.long 0x00 0. "SYMMDENRSDIG,SYMMDENRSDIG" "0: disable,1: enable"
|
|
group.long 0x16C++0x03
|
|
line.long 0x00 "DIGCLKRETIMECTRL,No Description"
|
|
bitfld.long 0x00 8.--10. "DIGCLKRETIMELIMITL,DIGCLKRETIMELIMITL" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 4.--6. "DIGCLKRETIMELIMITH,DIGCLKRETIMELIMITH" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 2. "DIGCLKRETIMERESETN,DIGCLKRETIMERESETN" "0: operate,1: reset"
|
|
newline
|
|
bitfld.long 0x00 1. "DIGCLKRETIMEDISRETIME,DIGCLKRETIMEDISRETIME" "0: enable_retime,1: disable_retime"
|
|
newline
|
|
bitfld.long 0x00 0. "DIGCLKRETIMEENRETIME,DIGCLKRETIMEENRETIME" "0: disable,1: enable"
|
|
rgroup.long 0x170++0x03
|
|
line.long 0x00 "DIGCLKRETIMESTATUS,No Description"
|
|
bitfld.long 0x00 1. "DIGCLKRETIMERESETNLO,DIGCLKRETIMERESETNLO" "0: lo,1: hi"
|
|
newline
|
|
bitfld.long 0x00 0. "DIGCLKRETIMECLKSEL,DIGCLKRETIMECLKSEL" "0: use_raw_clk,1: use_retimed_clk"
|
|
group.long 0x174++0x03
|
|
line.long 0x00 "XORETIMECTRL,No Description"
|
|
bitfld.long 0x00 8.--10. "XORETIMELIMITL,XORETIMELIMITL" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 4.--6. "XORETIMELIMITH,XORETIMELIMITH" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 2. "XORETIMERESETN,XORETIMERESETN" "0: operate,1: reset"
|
|
newline
|
|
bitfld.long 0x00 1. "XORETIMEDISRETIME,XORETIMEDISRETIME" "0: enable_retime,1: disable_retime"
|
|
newline
|
|
bitfld.long 0x00 0. "XORETIMEENRETIME,XORETIMEENRETIME" "0: disable,1: enable"
|
|
rgroup.long 0x178++0x03
|
|
line.long 0x00 "XORETIMESTATUS,No Description"
|
|
bitfld.long 0x00 1. "XORETIMERESETNLO,XORETIMERESETNLO" "0: lo,1: hi"
|
|
newline
|
|
bitfld.long 0x00 0. "XORETIMECLKSEL,XORETIMECLKSEL" "0: use_raw_clk,1: use_retimed_clk"
|
|
group.long 0x17C++0x03
|
|
line.long 0x00 "XOSQBUFFILT,"
|
|
bitfld.long 0x00 0.--1. "XOSQBUFFILT,XOSQBUFFILT" "0: bypass,1: filter_1,2: filter_2,3: filter_3"
|
|
group.long 0x188++0x03
|
|
line.long 0x00 "AGCOVERWRITE,No Description"
|
|
bitfld.long 0x00 24.--25. "MANIFADCSCALE,RAC Overwite PGA" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 20.--23. "MANPGAGAIN,RAC Overwite PGA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--15. "MANLNAMIXSLICE,RAC Overwite LNA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 4.--9. "MANLNAMIXRFATT,RAC Overwite PN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 3. "ENMANIFADCSCALE,Enable RAC Overwite PN" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "ENMANPGAGAIN,Enable RAC Overwite PGA" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "ENMANLNAMIXSLICE,Enable RAC Overwite LNA" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "ENMANLNAMIXRFATT,Enable RAC Overwite PN" "0,1"
|
|
group.long 0x3E0++0x03
|
|
line.long 0x00 "SCRATCH0,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SCRATCH0,SCRATCH0"
|
|
group.long 0x3E4++0x03
|
|
line.long 0x00 "SCRATCH1,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SCRATCH1,SCRATCH1"
|
|
group.long 0x3E8++0x03
|
|
line.long 0x00 "SCRATCH2,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SCRATCH2,SCRATCH2"
|
|
group.long 0x3EC++0x03
|
|
line.long 0x00 "SCRATCH3,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SCRATCH3,SCRATCH3"
|
|
group.long 0x3F0++0x03
|
|
line.long 0x00 "SCRATCH4,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SCRATCH4,SCRATCH4"
|
|
group.long 0x3F4++0x03
|
|
line.long 0x00 "SCRATCH5,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SCRATCH5,SCRATCH5"
|
|
group.long 0x3F8++0x03
|
|
line.long 0x00 "SCRATCH6,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SCRATCH6,SCRATCH6"
|
|
group.long 0x3FC++0x03
|
|
line.long 0x00 "SCRATCH7,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "SCRATCH7,SCRATCH7"
|
|
group.long 0x7E8++0x03
|
|
line.long 0x00 "THMSW,No Description"
|
|
bitfld.long 0x00 1. "HALFSWITCH,Halfswitch Mode enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "EN,Enable Switch" "0: Disabled,1: Enabled"
|
|
tree.end
|
|
tree.end
|
|
tree "RADIOAES"
|
|
base ad:0x0
|
|
tree "RADIOAES_NS"
|
|
base ad:0x54000000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "FETCHADDR,Fetcher: Start address of data block. In direct mode. this register is written by the software. In scatter-gather mode. this register is updated after each processed descriptor."
|
|
hexmask.long 0x0 0.--31. 1. "ADDR,Start address of data block"
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "FETCHLEN,Fetcher: Length of data block. In direct mode. this register is written by the software. In scatter-gather mode. this register is not used."
|
|
bitfld.long 0x0 29. "REALIGN,Realign lengh" "0,1"
|
|
bitfld.long 0x0 28. "CONSTADDR,Constant address" "0,1"
|
|
hexmask.long 0x0 0.--27. 1. "LENGTH,Length of data block"
|
|
line.long 0x4 "FETCHTAG,Fetcher: User tag. In direct mode. this register is written by the software. In scatter-gather mode. this register is not used."
|
|
hexmask.long 0x4 0.--31. 1. "TAG,User tag"
|
|
line.long 0x8 "PUSHADDR,Pusher: Start address of data block (LSB). In direct mode. this register is written by the software. In scatter-gather mode. this register is updated after each processed descriptor."
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Start address of data block"
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "PUSHLEN,Pusher: Length of data block. In direct mode. this register is written by the software. In scatter-gather mode. this register is not used."
|
|
bitfld.long 0x0 30. "DISCARD,Discard data" "0,1"
|
|
bitfld.long 0x0 29. "REALIGN,Realign length" "0,1"
|
|
bitfld.long 0x0 28. "CONSTADDR,Constant address" "0,1"
|
|
hexmask.long 0x0 0.--27. 1. "LENGTH,Start address of data block"
|
|
line.long 0x4 "IEN,Interrupt enable"
|
|
bitfld.long 0x4 5. "PUSHERERROR,Error interrupt enable" "0,1"
|
|
bitfld.long 0x4 4. "PUSHERSTOPPED,Stopped interrupt enable" "0,1"
|
|
bitfld.long 0x4 3. "PUSHERENDOFBLOCK,End of block interrupt enable" "0,1"
|
|
bitfld.long 0x4 2. "FETCHERERROR,Error interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "FETCHERSTOPPED,Stopped interrupt enable" "0,1"
|
|
bitfld.long 0x4 0. "FETCHERENDOFBLOCK,End of block interrupt enable" "0,1"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x0 "IF,Interrupt flag register"
|
|
bitfld.long 0x0 5. "PUSHERERROR,Error interrupt flag" "0,1"
|
|
bitfld.long 0x0 4. "PUSHERSTOPPED,Stopped interrupt flag" "0,1"
|
|
bitfld.long 0x0 3. "PUSHERENDOFBLOCK,End of block interrupt flag" "0,1"
|
|
bitfld.long 0x0 2. "FETCHERERROR,Error interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "FETCHERSTOPPED,Stopped interrupt flag" "0,1"
|
|
bitfld.long 0x0 0. "FETCHERENDOFBLOCK,End of block interrupt flag" "0,1"
|
|
wgroup.long 0x30++0x3
|
|
line.long 0x0 "IF_CLR,Writing a '1' clears the interrupt status. Writing a '0' has no effect."
|
|
bitfld.long 0x0 5. "PUSHERERROR,FETCHERERRORIFC" "0,1"
|
|
bitfld.long 0x0 4. "PUSHERSTOPPED,FETCHERSTOPPEDIFC" "0,1"
|
|
bitfld.long 0x0 3. "PUSHERENDOFBLOCK,FETCHERENDOFBLOCKIFC" "0,1"
|
|
bitfld.long 0x0 2. "FETCHERERROR,Error interrupt flag clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "FETCHERSTOPPED,Stopped interrupt flag clear" "0,1"
|
|
bitfld.long 0x0 0. "FETCHERENDOFBLOCK,End of block interrupt flag clear" "0,1"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "CTRL,Control register. called CONFIG in Barco datasheet."
|
|
bitfld.long 0x0 4. "SWRESET,Software reset" "0,1"
|
|
bitfld.long 0x0 3. "STOPPUSHER,Stop pusher" "0,1"
|
|
bitfld.long 0x0 2. "STOPFETCHER,Stop fetcher" "0,1"
|
|
bitfld.long 0x0 1. "PUSHERSCATTERGATHER,Pusher scatter/gather" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "FETCHERSCATTERGATHER,Fetcher scatter/gather" "0,1"
|
|
wgroup.long 0x38++0x3
|
|
line.long 0x0 "CMD,Command register for starting the fetcher and pusher"
|
|
bitfld.long 0x0 1. "STARTPUSHER,Start push" "0,1"
|
|
bitfld.long 0x0 0. "STARTFETCHER,Start fetch" "0,1"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x0 "STATUS,Status register"
|
|
hexmask.long.word 0x0 16.--31. 1. "FIFODATANUM,Number of data in output FIFO"
|
|
bitfld.long 0x0 6. "SOFTRSTBSY,Software reset busy" "0,1"
|
|
bitfld.long 0x0 5. "WAITING,Pusher waiting for FIFO" "0,1"
|
|
bitfld.long 0x0 4. "NOTEMPTY,Not empty flag from input FIFO (fetcher)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "PUSHERBSY,Pusher busy" "0,1"
|
|
bitfld.long 0x0 0. "FETCHERBSY,Fetcher busy" "0,1"
|
|
rgroup.long 0x400++0x17
|
|
line.long 0x0 "INCL_IPS_HW_CFG,No Description"
|
|
bitfld.long 0x0 10. "g_IncludeNDRNG,Generic g_IncludeNDRNG value" "0,1"
|
|
bitfld.long 0x0 9. "g_IncludePKE,Generic g_IncludePKE value" "0,1"
|
|
bitfld.long 0x0 8. "g_IncludeSM4,Generic g_IncludeSM4 value" "0,1"
|
|
bitfld.long 0x0 7. "g_IncludeZUC,Generic g_IncludeZUC value" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "g_IncludeSHA3,Generic g_IncludeSHA3 value" "0,1"
|
|
bitfld.long 0x0 5. "g_IncludeChachaPoly,Generic g_IncludeChachaPoly value" "0,1"
|
|
bitfld.long 0x0 4. "g_IncludeHASH,Generic g_IncludeHASH value" "0,1"
|
|
bitfld.long 0x0 3. "g_IncludeDES,Generic g_IncludeDES value" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "g_IncludeAESXTS,Generic g_IncludeAESXTS value" "0,1"
|
|
bitfld.long 0x0 1. "g_IncludeAESGCM,Generic g_IncludeAESGCM value" "0,1"
|
|
bitfld.long 0x0 0. "g_IncludeAES,Generic g_IncludeAES value" "0,1"
|
|
line.long 0x4 "BA411E_HW_CFG_1,No Description"
|
|
bitfld.long 0x4 24.--26. "g_Keysize,Generic g_Keysize value" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 17. "g_UseMasking,Generic g_UseMasking value" "0,1"
|
|
bitfld.long 0x4 16. "g_CS,Generic g_CS value" "0,1"
|
|
hexmask.long.word 0x4 0.--8. 1. "g_AesModesPoss,AES Modes Supported"
|
|
line.long 0x8 "BA411E_HW_CFG_2,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "g_CtrSize,Generic g_CtrSize value"
|
|
line.long 0xC "BA413_HW_CFG,No Description"
|
|
bitfld.long 0xC 18. "g_HashVerifyDigest,Generic g_HashVerifyDigest value" "0,1"
|
|
bitfld.long 0xC 17. "g_HMAC_enabled,Generic g_HMAC_enabled value" "0,1"
|
|
bitfld.long 0xC 16. "g_HashPadding,Generic g_HashPadding value" "0,1"
|
|
hexmask.long.byte 0xC 0.--6. 1. "g_HashMaskFunc,Generic g_HashMaskFunc value"
|
|
line.long 0x10 "BA418_HW_CFG,No Description"
|
|
bitfld.long 0x10 0. "g_Sha3CtxtEn,Generic g_Sha3CtxtEn value" "0,1"
|
|
line.long 0x14 "BA419_HW_CFG,No Description"
|
|
hexmask.long.byte 0x14 0.--6. 1. "g_SM4ModesPoss,Generic g_SM4ModesPoss value"
|
|
tree.end
|
|
tree "RADIOAES_S"
|
|
base ad:0x44000000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "FETCHADDR,Fetcher: Start address of data block. In direct mode. this register is written by the software. In scatter-gather mode. this register is updated after each processed descriptor."
|
|
hexmask.long 0x0 0.--31. 1. "ADDR,Start address of data block"
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "FETCHLEN,Fetcher: Length of data block. In direct mode. this register is written by the software. In scatter-gather mode. this register is not used."
|
|
bitfld.long 0x0 29. "REALIGN,Realign lengh" "0,1"
|
|
bitfld.long 0x0 28. "CONSTADDR,Constant address" "0,1"
|
|
hexmask.long 0x0 0.--27. 1. "LENGTH,Length of data block"
|
|
line.long 0x4 "FETCHTAG,Fetcher: User tag. In direct mode. this register is written by the software. In scatter-gather mode. this register is not used."
|
|
hexmask.long 0x4 0.--31. 1. "TAG,User tag"
|
|
line.long 0x8 "PUSHADDR,Pusher: Start address of data block (LSB). In direct mode. this register is written by the software. In scatter-gather mode. this register is updated after each processed descriptor."
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Start address of data block"
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "PUSHLEN,Pusher: Length of data block. In direct mode. this register is written by the software. In scatter-gather mode. this register is not used."
|
|
bitfld.long 0x0 30. "DISCARD,Discard data" "0,1"
|
|
bitfld.long 0x0 29. "REALIGN,Realign length" "0,1"
|
|
bitfld.long 0x0 28. "CONSTADDR,Constant address" "0,1"
|
|
hexmask.long 0x0 0.--27. 1. "LENGTH,Start address of data block"
|
|
line.long 0x4 "IEN,Interrupt enable"
|
|
bitfld.long 0x4 5. "PUSHERERROR,Error interrupt enable" "0,1"
|
|
bitfld.long 0x4 4. "PUSHERSTOPPED,Stopped interrupt enable" "0,1"
|
|
bitfld.long 0x4 3. "PUSHERENDOFBLOCK,End of block interrupt enable" "0,1"
|
|
bitfld.long 0x4 2. "FETCHERERROR,Error interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "FETCHERSTOPPED,Stopped interrupt enable" "0,1"
|
|
bitfld.long 0x4 0. "FETCHERENDOFBLOCK,End of block interrupt enable" "0,1"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x0 "IF,Interrupt flag register"
|
|
bitfld.long 0x0 5. "PUSHERERROR,Error interrupt flag" "0,1"
|
|
bitfld.long 0x0 4. "PUSHERSTOPPED,Stopped interrupt flag" "0,1"
|
|
bitfld.long 0x0 3. "PUSHERENDOFBLOCK,End of block interrupt flag" "0,1"
|
|
bitfld.long 0x0 2. "FETCHERERROR,Error interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "FETCHERSTOPPED,Stopped interrupt flag" "0,1"
|
|
bitfld.long 0x0 0. "FETCHERENDOFBLOCK,End of block interrupt flag" "0,1"
|
|
wgroup.long 0x30++0x3
|
|
line.long 0x0 "IF_CLR,Writing a '1' clears the interrupt status. Writing a '0' has no effect."
|
|
bitfld.long 0x0 5. "PUSHERERROR,FETCHERERRORIFC" "0,1"
|
|
bitfld.long 0x0 4. "PUSHERSTOPPED,FETCHERSTOPPEDIFC" "0,1"
|
|
bitfld.long 0x0 3. "PUSHERENDOFBLOCK,FETCHERENDOFBLOCKIFC" "0,1"
|
|
bitfld.long 0x0 2. "FETCHERERROR,Error interrupt flag clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "FETCHERSTOPPED,Stopped interrupt flag clear" "0,1"
|
|
bitfld.long 0x0 0. "FETCHERENDOFBLOCK,End of block interrupt flag clear" "0,1"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "CTRL,Control register. called CONFIG in Barco datasheet."
|
|
bitfld.long 0x0 4. "SWRESET,Software reset" "0,1"
|
|
bitfld.long 0x0 3. "STOPPUSHER,Stop pusher" "0,1"
|
|
bitfld.long 0x0 2. "STOPFETCHER,Stop fetcher" "0,1"
|
|
bitfld.long 0x0 1. "PUSHERSCATTERGATHER,Pusher scatter/gather" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "FETCHERSCATTERGATHER,Fetcher scatter/gather" "0,1"
|
|
wgroup.long 0x38++0x3
|
|
line.long 0x0 "CMD,Command register for starting the fetcher and pusher"
|
|
bitfld.long 0x0 1. "STARTPUSHER,Start push" "0,1"
|
|
bitfld.long 0x0 0. "STARTFETCHER,Start fetch" "0,1"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x0 "STATUS,Status register"
|
|
hexmask.long.word 0x0 16.--31. 1. "FIFODATANUM,Number of data in output FIFO"
|
|
bitfld.long 0x0 6. "SOFTRSTBSY,Software reset busy" "0,1"
|
|
bitfld.long 0x0 5. "WAITING,Pusher waiting for FIFO" "0,1"
|
|
bitfld.long 0x0 4. "NOTEMPTY,Not empty flag from input FIFO (fetcher)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "PUSHERBSY,Pusher busy" "0,1"
|
|
bitfld.long 0x0 0. "FETCHERBSY,Fetcher busy" "0,1"
|
|
rgroup.long 0x400++0x17
|
|
line.long 0x0 "INCL_IPS_HW_CFG,No Description"
|
|
bitfld.long 0x0 10. "g_IncludeNDRNG,Generic g_IncludeNDRNG value" "0,1"
|
|
bitfld.long 0x0 9. "g_IncludePKE,Generic g_IncludePKE value" "0,1"
|
|
bitfld.long 0x0 8. "g_IncludeSM4,Generic g_IncludeSM4 value" "0,1"
|
|
bitfld.long 0x0 7. "g_IncludeZUC,Generic g_IncludeZUC value" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "g_IncludeSHA3,Generic g_IncludeSHA3 value" "0,1"
|
|
bitfld.long 0x0 5. "g_IncludeChachaPoly,Generic g_IncludeChachaPoly value" "0,1"
|
|
bitfld.long 0x0 4. "g_IncludeHASH,Generic g_IncludeHASH value" "0,1"
|
|
bitfld.long 0x0 3. "g_IncludeDES,Generic g_IncludeDES value" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "g_IncludeAESXTS,Generic g_IncludeAESXTS value" "0,1"
|
|
bitfld.long 0x0 1. "g_IncludeAESGCM,Generic g_IncludeAESGCM value" "0,1"
|
|
bitfld.long 0x0 0. "g_IncludeAES,Generic g_IncludeAES value" "0,1"
|
|
line.long 0x4 "BA411E_HW_CFG_1,No Description"
|
|
bitfld.long 0x4 24.--26. "g_Keysize,Generic g_Keysize value" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 17. "g_UseMasking,Generic g_UseMasking value" "0,1"
|
|
bitfld.long 0x4 16. "g_CS,Generic g_CS value" "0,1"
|
|
hexmask.long.word 0x4 0.--8. 1. "g_AesModesPoss,AES Modes Supported"
|
|
line.long 0x8 "BA411E_HW_CFG_2,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "g_CtrSize,Generic g_CtrSize value"
|
|
line.long 0xC "BA413_HW_CFG,No Description"
|
|
bitfld.long 0xC 18. "g_HashVerifyDigest,Generic g_HashVerifyDigest value" "0,1"
|
|
bitfld.long 0xC 17. "g_HMAC_enabled,Generic g_HMAC_enabled value" "0,1"
|
|
bitfld.long 0xC 16. "g_HashPadding,Generic g_HashPadding value" "0,1"
|
|
hexmask.long.byte 0xC 0.--6. 1. "g_HashMaskFunc,Generic g_HashMaskFunc value"
|
|
line.long 0x10 "BA418_HW_CFG,No Description"
|
|
bitfld.long 0x10 0. "g_Sha3CtxtEn,Generic g_Sha3CtxtEn value" "0,1"
|
|
line.long 0x14 "BA419_HW_CFG,No Description"
|
|
hexmask.long.byte 0x14 0.--6. 1. "g_SM4ModesPoss,Generic g_SM4ModesPoss value"
|
|
tree.end
|
|
tree.end
|
|
tree "RDMAILBOX"
|
|
base ad:0x0
|
|
tree "RDMAILBOX0_NS"
|
|
base ad:0xB8028000
|
|
repeat 4. (strings "0" "1" "2" "3" )(list 0x0 0x4 0x8 0xC )
|
|
group.long ($2+0x00)++0x03
|
|
line.long 0x00 "MSGPTR$1,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "PTR,Pointer"
|
|
repeat.end
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "IF,No Description"
|
|
bitfld.long 0x00 3. "MBOXIF3,Mailbox Interupt Flag" "0,1"
|
|
bitfld.long 0x00 2. "MBOXIF2,Mailbox Interupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "MBOXIF1,Mailbox Interupt Flag" "0,1"
|
|
bitfld.long 0x00 0. "MBOXIF0,Mailbox Interupt Flag" "0,1"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "IEN,No Description"
|
|
bitfld.long 0x00 3. "MBOXIEN3,Mailbox Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. "MBOXIEN2,Mailbox Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "MBOXIEN1,Mailbox Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. "MBOXIEN0,Mailbox Interrupt Enable" "0,1"
|
|
tree.end
|
|
tree "RDMAILBOX0_S"
|
|
base ad:0xA8028000
|
|
repeat 4. (strings "0" "1" "2" "3" )(list 0x0 0x4 0x8 0xC )
|
|
group.long ($2+0x00)++0x03
|
|
line.long 0x00 "MSGPTR$1,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "PTR,Pointer"
|
|
repeat.end
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "IF,No Description"
|
|
bitfld.long 0x00 3. "MBOXIF3,Mailbox Interupt Flag" "0,1"
|
|
bitfld.long 0x00 2. "MBOXIF2,Mailbox Interupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "MBOXIF1,Mailbox Interupt Flag" "0,1"
|
|
bitfld.long 0x00 0. "MBOXIF0,Mailbox Interupt Flag" "0,1"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "IEN,No Description"
|
|
bitfld.long 0x00 3. "MBOXIEN3,Mailbox Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. "MBOXIEN2,Mailbox Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "MBOXIEN1,Mailbox Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. "MBOXIEN0,Mailbox Interrupt Enable" "0,1"
|
|
tree.end
|
|
tree "RDMAILBOX1_NS"
|
|
base ad:0xB802C000
|
|
repeat 4. (strings "0" "1" "2" "3" )(list 0x0 0x4 0x8 0xC )
|
|
group.long ($2+0x00)++0x03
|
|
line.long 0x00 "MSGPTR$1,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "PTR,Pointer"
|
|
repeat.end
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "IF,No Description"
|
|
bitfld.long 0x00 3. "MBOXIF3,Mailbox Interupt Flag" "0,1"
|
|
bitfld.long 0x00 2. "MBOXIF2,Mailbox Interupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "MBOXIF1,Mailbox Interupt Flag" "0,1"
|
|
bitfld.long 0x00 0. "MBOXIF0,Mailbox Interupt Flag" "0,1"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "IEN,No Description"
|
|
bitfld.long 0x00 3. "MBOXIEN3,Mailbox Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. "MBOXIEN2,Mailbox Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "MBOXIEN1,Mailbox Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. "MBOXIEN0,Mailbox Interrupt Enable" "0,1"
|
|
tree.end
|
|
tree "RDMAILBOX1_S"
|
|
base ad:0xA802C000
|
|
repeat 4. (strings "0" "1" "2" "3" )(list 0x0 0x4 0x8 0xC )
|
|
group.long ($2+0x00)++0x03
|
|
line.long 0x00 "MSGPTR$1,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "PTR,Pointer"
|
|
repeat.end
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "IF,No Description"
|
|
bitfld.long 0x00 3. "MBOXIF3,Mailbox Interupt Flag" "0,1"
|
|
bitfld.long 0x00 2. "MBOXIF2,Mailbox Interupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "MBOXIF1,Mailbox Interupt Flag" "0,1"
|
|
bitfld.long 0x00 0. "MBOXIF0,Mailbox Interupt Flag" "0,1"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "IEN,No Description"
|
|
bitfld.long 0x00 3. "MBOXIEN3,Mailbox Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. "MBOXIEN2,Mailbox Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "MBOXIEN1,Mailbox Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. "MBOXIEN0,Mailbox Interrupt Enable" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "RFCRC (Radio Frequency Cyclic Redundancy Check)"
|
|
base ad:0x0
|
|
tree "RFCRC_NS"
|
|
base ad:0xB8010000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "IPVERSION,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "IPVERSION,IP Version"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "EN,No Description"
|
|
bitfld.long 0x00 0. "EN,Enable peripheral clock to this module" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTRL,No Description"
|
|
bitfld.long 0x00 12. "PADCRCINPUT,Pad CRC input data" "0: No zero-padding of CRC input data is applied,1: CRC input data is zero-padded such that the.."
|
|
bitfld.long 0x00 8.--11. "BITSPERWORD,Number of bits per input word" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 7. "BITREVERSE,Reverse CRC bit ordering over air" "0: The bit ordering of CRC data is the same as..,1: The bit ordering of CRC data is the opposite.."
|
|
bitfld.long 0x00 6. "BYTEREVERSE,Reverse CRC byte ordering over air" "0: The least significant byte of the CRC..,1: The most significant byte of the CRC register.."
|
|
newline
|
|
bitfld.long 0x00 5. "INPUTBITORDER,CRC input bit ordering setting" "0: The least significant data bit is first input..,1: The most significant data bit is first input.."
|
|
bitfld.long 0x00 2.--3. "CRCWIDTH," "0: 8 bit (1 Byte) CRC code,1: 16 bit (2 Bytes) CRC code,2: 24 bit (3 Bytes) CRC code,3: 32 bit (4 Bytes) CRC code"
|
|
newline
|
|
bitfld.long 0x00 1. "OUTPUTINV,Output Invert" "0,1"
|
|
bitfld.long 0x00 0. "INPUTINV,Input Invert" "0,1"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "STATUS,No Description"
|
|
bitfld.long 0x00 0. "BUSY,CRC Running" "0,1"
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "CMD,No Description"
|
|
bitfld.long 0x00 0. "INITIALIZE,Initialize CRC" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "INPUTDATA,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "INPUTDATA,Input Data"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "INIT,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "INIT,CRC Initialization Value"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DATA,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,CRC Data Register"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "POLY,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "POLY,CRC Polynomial Value"
|
|
tree.end
|
|
tree "RFCRC_S"
|
|
base ad:0xA8010000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "IPVERSION,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "IPVERSION,IP Version"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "EN,No Description"
|
|
bitfld.long 0x00 0. "EN,Enable peripheral clock to this module" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTRL,No Description"
|
|
bitfld.long 0x00 12. "PADCRCINPUT,Pad CRC input data" "0: No zero-padding of CRC input data is applied,1: CRC input data is zero-padded such that the.."
|
|
bitfld.long 0x00 8.--11. "BITSPERWORD,Number of bits per input word" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 7. "BITREVERSE,Reverse CRC bit ordering over air" "0: The bit ordering of CRC data is the same as..,1: The bit ordering of CRC data is the opposite.."
|
|
bitfld.long 0x00 6. "BYTEREVERSE,Reverse CRC byte ordering over air" "0: The least significant byte of the CRC..,1: The most significant byte of the CRC register.."
|
|
newline
|
|
bitfld.long 0x00 5. "INPUTBITORDER,CRC input bit ordering setting" "0: The least significant data bit is first input..,1: The most significant data bit is first input.."
|
|
bitfld.long 0x00 2.--3. "CRCWIDTH," "0: 8 bit (1 Byte) CRC code,1: 16 bit (2 Bytes) CRC code,2: 24 bit (3 Bytes) CRC code,3: 32 bit (4 Bytes) CRC code"
|
|
newline
|
|
bitfld.long 0x00 1. "OUTPUTINV,Output Invert" "0,1"
|
|
bitfld.long 0x00 0. "INPUTINV,Input Invert" "0,1"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "STATUS,No Description"
|
|
bitfld.long 0x00 0. "BUSY,CRC Running" "0,1"
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "CMD,No Description"
|
|
bitfld.long 0x00 0. "INITIALIZE,Initialize CRC" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "INPUTDATA,No Description"
|
|
hexmask.long.word 0x00 0.--15. 1. "INPUTDATA,Input Data"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "INIT,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "INIT,CRC Initialization Value"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DATA,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,CRC Data Register"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "POLY,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "POLY,CRC Polynomial Value"
|
|
tree.end
|
|
tree.end
|
|
tree "RTCC (Real Time Clock with Capture)"
|
|
base ad:0x0
|
|
tree "RTCC_NS"
|
|
base ad:0x58000000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP VERSION"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,RTCC Enable" "0,1"
|
|
line.long 0x4 "CFG,No Description"
|
|
hexmask.long.byte 0x4 4.--7. 1. "CNTPRESC,Counter prescaler value."
|
|
bitfld.long 0x4 3. "CNTTICK,Counter prescaler mode." "0: CNT register ticks according to configuration in..,1: CNT register ticks when PRECNT matches.."
|
|
newline
|
|
bitfld.long 0x4 2. "CNTCCV1TOP,CCV1 top value enable" "0,1"
|
|
bitfld.long 0x4 1. "PRECNTCCV0TOP,Pre-counter CCV0 top value enable." "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "DEBUGRUN,Debug Mode Run Enable" "0: RTCC is frozen in debug mode,1: RTCC is running in debug mode"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 1. "STOP,Stop RTCC main counter" "0,1"
|
|
bitfld.long 0x0 0. "START,Start RTCC main counter" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 1. "RTCCLOCKSTATUS,Lock Status" "0: RTCC registers are unlocked,1: RTCC registers are locked"
|
|
bitfld.long 0x0 0. "RUNNING,RTCC running status" "0,1"
|
|
group.long 0x14++0xF
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 8. "CC2,CC Channel n Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 6. "CC1,CC Channel n Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "CC0,CC Channel n Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 1. "CNTTICK,Main counter tick" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "OF,Overflow Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 8. "CC2,CC Channel n Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 6. "CC1,CC Channel n Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "CC0,CC Channel n Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 1. "CNTTICK,CNTTICK Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "OF,OF Interrupt Enable" "0,1"
|
|
line.long 0x8 "PRECNT,No Description"
|
|
hexmask.long.word 0x8 0.--14. 1. "PRECNT,Pre-Counter Value"
|
|
line.long 0xC "CNT,No Description"
|
|
hexmask.long 0xC 0.--31. 1. "CNT,Counter Value"
|
|
rgroup.long 0x24++0x7
|
|
line.long 0x0 "COMBCNT,No Description"
|
|
hexmask.long.tbyte 0x0 15.--31. 1. "CNTLSB,Counter Value"
|
|
hexmask.long.word 0x0 0.--14. 1. "PRECNT,Pre-Counter Value"
|
|
line.long 0x4 "SYNCBUSY,No Description"
|
|
bitfld.long 0x4 3. "CNT,Sync busy for CNT" "0,1"
|
|
bitfld.long 0x4 2. "PRECNT,Sync busy for PRECNT" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "STOP,Sync busy for STOP" "0,1"
|
|
bitfld.long 0x4 0. "START,Sync busy for START" "0,1"
|
|
wgroup.long 0x2C++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Configuration Lock Key"
|
|
group.long 0x30++0x7
|
|
line.long 0x0 "CC0_CTRL,No Description"
|
|
bitfld.long 0x0 5.--6. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x0 4. "COMPBASE,Capture compare channel comparison base." "0: RTCC_CCx_ICVALUE/OCVALUE is compared with CNT..,1: Least significant bits of.."
|
|
newline
|
|
bitfld.long 0x0 2.--3. "CMOA,Compare Match Output Action" "0: A single clock cycle pulse is generated on output,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input capture,2: Output compare,?"
|
|
line.long 0x4 "CC0_OCVALUE,No Description"
|
|
hexmask.long 0x4 0.--31. 1. "OC,Output Compare Value"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x0 "CC0_ICVALUE,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IC,Input Capture Value"
|
|
group.long 0x3C++0x7
|
|
line.long 0x0 "CC1_CTRL,No Description"
|
|
bitfld.long 0x0 5.--6. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x0 4. "COMPBASE,Capture compare channel comparison base." "0: RTCC_CCx_ICVALUE/OCVALUE is compared with CNT..,1: Least significant bits of.."
|
|
newline
|
|
bitfld.long 0x0 2.--3. "CMOA,Compare Match Output Action" "0: A single clock cycle pulse is generated on output,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input capture,2: Output compare,?"
|
|
line.long 0x4 "CC1_OCVALUE,No Description"
|
|
hexmask.long 0x4 0.--31. 1. "OC,Output Compare Value"
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x0 "CC1_ICVALUE,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IC,Input Capture Value"
|
|
group.long 0x48++0x7
|
|
line.long 0x0 "CC2_CTRL,No Description"
|
|
bitfld.long 0x0 5.--6. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x0 4. "COMPBASE,Capture compare channel comparison base." "0: RTCC_CCx_ICVALUE/OCVALUE is compared with CNT..,1: Least significant bits of.."
|
|
newline
|
|
bitfld.long 0x0 2.--3. "CMOA,Compare Match Output Action" "0: A single clock cycle pulse is generated on output,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input capture,2: Output compare,?"
|
|
line.long 0x4 "CC2_OCVALUE,No Description"
|
|
hexmask.long 0x4 0.--31. 1. "OC,Output Compare Value"
|
|
rgroup.long 0x50++0x3
|
|
line.long 0x0 "CC2_ICVALUE,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IC,Input Capture Value"
|
|
tree.end
|
|
tree "RTCC_S"
|
|
base ad:0x48000000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP VERSION"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,RTCC Enable" "0,1"
|
|
line.long 0x4 "CFG,No Description"
|
|
hexmask.long.byte 0x4 4.--7. 1. "CNTPRESC,Counter prescaler value."
|
|
bitfld.long 0x4 3. "CNTTICK,Counter prescaler mode." "0: CNT register ticks according to configuration in..,1: CNT register ticks when PRECNT matches.."
|
|
newline
|
|
bitfld.long 0x4 2. "CNTCCV1TOP,CCV1 top value enable" "0,1"
|
|
bitfld.long 0x4 1. "PRECNTCCV0TOP,Pre-counter CCV0 top value enable." "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "DEBUGRUN,Debug Mode Run Enable" "0: RTCC is frozen in debug mode,1: RTCC is running in debug mode"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 1. "STOP,Stop RTCC main counter" "0,1"
|
|
bitfld.long 0x0 0. "START,Start RTCC main counter" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 1. "RTCCLOCKSTATUS,Lock Status" "0: RTCC registers are unlocked,1: RTCC registers are locked"
|
|
bitfld.long 0x0 0. "RUNNING,RTCC running status" "0,1"
|
|
group.long 0x14++0xF
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 8. "CC2,CC Channel n Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 6. "CC1,CC Channel n Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "CC0,CC Channel n Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 1. "CNTTICK,Main counter tick" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "OF,Overflow Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 8. "CC2,CC Channel n Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 6. "CC1,CC Channel n Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "CC0,CC Channel n Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 1. "CNTTICK,CNTTICK Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "OF,OF Interrupt Enable" "0,1"
|
|
line.long 0x8 "PRECNT,No Description"
|
|
hexmask.long.word 0x8 0.--14. 1. "PRECNT,Pre-Counter Value"
|
|
line.long 0xC "CNT,No Description"
|
|
hexmask.long 0xC 0.--31. 1. "CNT,Counter Value"
|
|
rgroup.long 0x24++0x7
|
|
line.long 0x0 "COMBCNT,No Description"
|
|
hexmask.long.tbyte 0x0 15.--31. 1. "CNTLSB,Counter Value"
|
|
hexmask.long.word 0x0 0.--14. 1. "PRECNT,Pre-Counter Value"
|
|
line.long 0x4 "SYNCBUSY,No Description"
|
|
bitfld.long 0x4 3. "CNT,Sync busy for CNT" "0,1"
|
|
bitfld.long 0x4 2. "PRECNT,Sync busy for PRECNT" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "STOP,Sync busy for STOP" "0,1"
|
|
bitfld.long 0x4 0. "START,Sync busy for START" "0,1"
|
|
wgroup.long 0x2C++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Configuration Lock Key"
|
|
group.long 0x30++0x7
|
|
line.long 0x0 "CC0_CTRL,No Description"
|
|
bitfld.long 0x0 5.--6. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x0 4. "COMPBASE,Capture compare channel comparison base." "0: RTCC_CCx_ICVALUE/OCVALUE is compared with CNT..,1: Least significant bits of.."
|
|
newline
|
|
bitfld.long 0x0 2.--3. "CMOA,Compare Match Output Action" "0: A single clock cycle pulse is generated on output,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input capture,2: Output compare,?"
|
|
line.long 0x4 "CC0_OCVALUE,No Description"
|
|
hexmask.long 0x4 0.--31. 1. "OC,Output Compare Value"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x0 "CC0_ICVALUE,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IC,Input Capture Value"
|
|
group.long 0x3C++0x7
|
|
line.long 0x0 "CC1_CTRL,No Description"
|
|
bitfld.long 0x0 5.--6. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x0 4. "COMPBASE,Capture compare channel comparison base." "0: RTCC_CCx_ICVALUE/OCVALUE is compared with CNT..,1: Least significant bits of.."
|
|
newline
|
|
bitfld.long 0x0 2.--3. "CMOA,Compare Match Output Action" "0: A single clock cycle pulse is generated on output,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input capture,2: Output compare,?"
|
|
line.long 0x4 "CC1_OCVALUE,No Description"
|
|
hexmask.long 0x4 0.--31. 1. "OC,Output Compare Value"
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x0 "CC1_ICVALUE,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IC,Input Capture Value"
|
|
group.long 0x48++0x7
|
|
line.long 0x0 "CC2_CTRL,No Description"
|
|
bitfld.long 0x0 5.--6. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x0 4. "COMPBASE,Capture compare channel comparison base." "0: RTCC_CCx_ICVALUE/OCVALUE is compared with CNT..,1: Least significant bits of.."
|
|
newline
|
|
bitfld.long 0x0 2.--3. "CMOA,Compare Match Output Action" "0: A single clock cycle pulse is generated on output,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input capture,2: Output compare,?"
|
|
line.long 0x4 "CC2_OCVALUE,No Description"
|
|
hexmask.long 0x4 0.--31. 1. "OC,Output Compare Value"
|
|
rgroup.long 0x50++0x3
|
|
line.long 0x0 "CC2_ICVALUE,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IC,Input Capture Value"
|
|
tree.end
|
|
tree.end
|
|
tree "SMU (Security Management Unit)"
|
|
base ad:0x0
|
|
tree "SMU"
|
|
tree "SMU_NS"
|
|
base ad:0x54008000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "IPVERSION,The read only IPVERSION field gives the version for this module. There may be minor software changes required for modules with different values of IPVERSION."
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version"
|
|
line.long 0x4 "STATUS,Read to get SMU status."
|
|
bitfld.long 0x4 1. "SMUPRGERR,SMU Programming Error" "0,1"
|
|
bitfld.long 0x4 0. "SMULOCK,SMU Lock" "0: SMULOCK is Unlocked,1: SMULOCK is Locked"
|
|
wgroup.long 0x8++0x3
|
|
line.long 0x0 "LOCK,Access to Lock/unlock the SMU Configuration."
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "SMULOCKKEY,SMU Lock/Key"
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "IF,Read to get status of SMU interrupts."
|
|
bitfld.long 0x0 17. "BMPUSEC,BMPU Security Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 16. "PPUSEC,PPU Security Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 2. "PPUINST,PPU Instruction Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 0. "PPUPRIV,PPU Privilege Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,Write to Enable/Disable SMU interrupts."
|
|
bitfld.long 0x4 17. "BMPUSEC,BMPU Security Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 16. "PPUSEC,PPU Security Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 2. "PPUINST,PPU Instruction Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "PPUPRIV,PPU Privilege Interrupt Enable" "0,1"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "M33CTRL,Holds the M33 control settings."
|
|
bitfld.long 0x0 4. "LOCKSAU,LOCKSAU control of M33 CPU" "0,1"
|
|
bitfld.long 0x0 3. "LOCKNSMPU,LOCKNSMPU control of M33 CPU" "0,1"
|
|
bitfld.long 0x0 2. "LOCKSMPU,LOCKSMPU control of M33 CPU" "0,1"
|
|
bitfld.long 0x0 1. "LOCKNSVTOR,LOCKNSVTOR control of M33 CPU" "0,1"
|
|
bitfld.long 0x0 0. "LOCKSVTAIRCR,LOCKSVTAIRCR control of M33 CPU" "0,1"
|
|
group.long 0x40++0x7
|
|
line.long 0x0 "PPUPATD0,Set peripheral bits to 1 to mark as privileged access only."
|
|
bitfld.long 0x0 31. "DCI,DCI Privileged Access" "0,1"
|
|
bitfld.long 0x0 30. "GPCRC,GPCRC Privileged Access" "0,1"
|
|
bitfld.long 0x0 29. "IFADCDEBUG,IFADCDEBUG Privileged Access" "0,1"
|
|
bitfld.long 0x0 28. "BURAM,BURAM Privileged Access" "0,1"
|
|
bitfld.long 0x0 27. "SYSCFG,SYSCFG Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "SYSCFGCFGNS,SYSCFGCFGNS Privileged Access" "0,1"
|
|
bitfld.long 0x0 25. "CHIPTESTCTRL,CHIPTESTCTRL Privileged Access" "0,1"
|
|
bitfld.long 0x0 24. "I2C1,I2C1 Privileged Access" "0,1"
|
|
bitfld.long 0x0 23. "BURTC,BURTC Privileged Access" "0,1"
|
|
bitfld.long 0x0 22. "USART1,USART1 Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "USART0,USART0 Privileged Access" "0,1"
|
|
bitfld.long 0x0 20. "TIMER4,TIMER4 Privileged Access" "0,1"
|
|
bitfld.long 0x0 19. "TIMER3,TIMER3 Privileged Access" "0,1"
|
|
bitfld.long 0x0 18. "TIMER2,TIMER2 Privileged Access" "0,1"
|
|
bitfld.long 0x0 17. "TIMER1,TIMER1 Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "TIMER0,TIMER0 Privileged Access" "0,1"
|
|
bitfld.long 0x0 15. "LDMAXBAR,LDMAXBAR Privileged Access" "0,1"
|
|
bitfld.long 0x0 14. "LDMA,LDMA Privileged Access" "0,1"
|
|
bitfld.long 0x0 13. "GPIO,GPIO Privileged Access" "0,1"
|
|
bitfld.long 0x0 12. "PRS,PRS Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "ICACHE0,ICACHE0 Privileged Access" "0,1"
|
|
bitfld.long 0x0 10. "MSC,MSC Privileged Access" "0,1"
|
|
bitfld.long 0x0 9. "ULFRCO,ULFRCO Privileged Access" "0,1"
|
|
bitfld.long 0x0 8. "LFRCO,LFRCO Privileged Access" "0,1"
|
|
bitfld.long 0x0 7. "LFXO,LFXO Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "DPLL0,DPLL0 Privileged Access" "0,1"
|
|
bitfld.long 0x0 5. "FSRCO,FSRCO Privileged Access" "0,1"
|
|
bitfld.long 0x0 4. "HFRCO0,HFRCO0 Privileged Access" "0,1"
|
|
bitfld.long 0x0 3. "HFXO0,HFXO0 Privileged Access" "0,1"
|
|
bitfld.long 0x0 2. "CMU,CMU Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "EMU,EMU Privileged Access" "0,1"
|
|
line.long 0x4 "PPUPATD1,Set peripheral bits to 1 to mark as privileged access only."
|
|
bitfld.long 0x4 15. "AHBRADIO,AHBRADIO Privileged Access" "0,1"
|
|
bitfld.long 0x4 14. "CRYPTOACC,CRYPTOACC Privileged Access" "0,1"
|
|
bitfld.long 0x4 13. "EUART0,EUART0 Privileged Access" "0,1"
|
|
bitfld.long 0x4 12. "AMUXCP0,AMUXCP0 Privileged Access" "0,1"
|
|
bitfld.long 0x4 11. "WDOG0,WDOG0 Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "I2C0,I2C0 Privileged Access" "0,1"
|
|
bitfld.long 0x4 9. "IADC0,IADC0 Privileged Access" "0,1"
|
|
bitfld.long 0x4 8. "LETIMER0,LETIMER0 Privileged Access" "0,1"
|
|
bitfld.long 0x4 7. "RTCC,RTCC Privileged Access" "0,1"
|
|
bitfld.long 0x4 6. "SMUCFGNS,SMUCFGNS Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "SMU,SMU Privileged Access" "0,1"
|
|
bitfld.long 0x4 4. "RADIOAES,RADIOAES Privileged Access" "0,1"
|
|
bitfld.long 0x4 3. "RFSENSE,RFSENSE Privileged Access" "0,1"
|
|
bitfld.long 0x4 2. "PDM,PDM Privileged Access" "0,1"
|
|
bitfld.long 0x4 1. "DCDC,DCDC Privileged Access" "0,1"
|
|
group.long 0x60++0x7
|
|
line.long 0x0 "PPUSATD0,Set peripheral bits to 1 to mark as secure access only."
|
|
bitfld.long 0x0 31. "DCI,DCI Secure Access" "0,1"
|
|
bitfld.long 0x0 30. "GPCRC,GPCRC Secure Access" "0,1"
|
|
bitfld.long 0x0 29. "IFADCDEBUG,IFADCDEBUG Secure Access" "0,1"
|
|
bitfld.long 0x0 28. "BURAM,BURAM Secure Access" "0,1"
|
|
bitfld.long 0x0 27. "SYSCFG,SYSCFG Secure Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "SYSCFGCFGNS,SYSCFGCFGNS Secure Access" "0,1"
|
|
bitfld.long 0x0 25. "CHIPTESTCTRL,CHIPTESTCTRL Secure Access" "0,1"
|
|
bitfld.long 0x0 24. "I2C1,I2C1 Secure Access" "0,1"
|
|
bitfld.long 0x0 23. "BURTC,BURTC Secure Access" "0,1"
|
|
bitfld.long 0x0 22. "USART1,USART1 Secure Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "USART0,USART0 Secure Access" "0,1"
|
|
bitfld.long 0x0 20. "TIMER4,TIMER4 Secure Access" "0,1"
|
|
bitfld.long 0x0 19. "TIMER3,TIMER3 Secure Access" "0,1"
|
|
bitfld.long 0x0 18. "TIMER2,TIMER2 Secure Access" "0,1"
|
|
bitfld.long 0x0 17. "TIMER1,TIMER1 Secure Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "TIMER0,TIMER0 Secure Access" "0,1"
|
|
bitfld.long 0x0 15. "LDMAXBAR,LDMAXBAR Secure Access" "0,1"
|
|
bitfld.long 0x0 14. "LDMA,LDMA Secure Access" "0,1"
|
|
bitfld.long 0x0 13. "GPIO,GPIO Secure Access" "0,1"
|
|
bitfld.long 0x0 12. "PRS,PRS Secure Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "ICACHE0,ICACHE0 Secure Access" "0,1"
|
|
bitfld.long 0x0 10. "MSC,MSC Secure Access" "0,1"
|
|
bitfld.long 0x0 9. "ULFRCO,ULFRCO Secure Access" "0,1"
|
|
bitfld.long 0x0 8. "LFRCO,LFRCO Secure Access" "0,1"
|
|
bitfld.long 0x0 7. "LFXO,LFXO Secure Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "DPLL0,DPLL0 Secure Access" "0,1"
|
|
bitfld.long 0x0 5. "FSRCO,FSRCO Secure Access" "0,1"
|
|
bitfld.long 0x0 4. "HFRCO0,HFRCO0 Secure Access" "0,1"
|
|
bitfld.long 0x0 3. "HFXO0,HFXO0 Secure Access" "0,1"
|
|
bitfld.long 0x0 2. "CMU,CMU Secure Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "EMU,EMU Secure Access" "0,1"
|
|
line.long 0x4 "PPUSATD1,Set peripheral bits to 1 to mark as secure access only."
|
|
bitfld.long 0x4 15. "AHBRADIO,AHBRADIO Secure Access" "0,1"
|
|
bitfld.long 0x4 14. "CRYPTOACC,CRYPTOACC Secure Access" "0,1"
|
|
bitfld.long 0x4 13. "EUART0,EUART0 Secure Access" "0,1"
|
|
bitfld.long 0x4 12. "AMUXCP0,AMUXCP0 Secure Access" "0,1"
|
|
bitfld.long 0x4 11. "WDOG0,WDOG0 Secure Access" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "I2C0,I2C0 Secure Access" "0,1"
|
|
bitfld.long 0x4 9. "IADC0,IADC0 Secure Access" "0,1"
|
|
bitfld.long 0x4 8. "LETIMER0,LETIMER0 Secure Access" "0,1"
|
|
bitfld.long 0x4 7. "RTCC,RTCC Secure Access" "0,1"
|
|
bitfld.long 0x4 6. "SMUCFGNS,SMUCFGNS Secure Access" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "SMU,SMU Secure Access" "0,1"
|
|
bitfld.long 0x4 4. "RADIOAES,RADIOAES Secure Access" "0,1"
|
|
bitfld.long 0x4 3. "RFSENSE,RFSENSE Secure Access" "0,1"
|
|
bitfld.long 0x4 2. "PDM,PDM Secure Access" "0,1"
|
|
bitfld.long 0x4 1. "DCDC,DCDC Secure Access" "0,1"
|
|
rgroup.long 0x140++0x3
|
|
line.long 0x0 "PPUFS,Read to get fault status of SMU."
|
|
hexmask.long.byte 0x0 0.--7. 1. "PPUFSPERIPHID,Peripheral ID"
|
|
group.long 0x150++0x3
|
|
line.long 0x0 "BMPUPATD0,Set master bits to 1 to mark as a privileged master."
|
|
bitfld.long 0x0 4. "LDMA,MCU LDMA privileged mode" "0,1"
|
|
bitfld.long 0x0 3. "RADIOIFADCDEBUG,RADIO IFADC debug privileged mode" "0,1"
|
|
bitfld.long 0x0 2. "RADIOSUBSYSTEM,RADIO subsystem manager privileged mode" "0,1"
|
|
bitfld.long 0x0 1. "CRYPTOACC,CRYPTOACC DMA privileged mode" "0,1"
|
|
bitfld.long 0x0 0. "RADIOAES,RADIO AES DMA privileged mode" "0,1"
|
|
group.long 0x170++0x3
|
|
line.long 0x0 "BMPUSATD0,Set master bits to 1 to mark as a secure master."
|
|
bitfld.long 0x0 4. "LDMA,MCU LDMA secure mode" "0,1"
|
|
bitfld.long 0x0 3. "RADIOIFADCDEBUG,RADIO IFADC debug secure mode" "0,1"
|
|
bitfld.long 0x0 2. "RADIOSUBSYSTEM,RADIO subsystem manager secure mode" "0,1"
|
|
bitfld.long 0x0 1. "CRYPTOACC,CRYPTOACC DMA secure mode" "0,1"
|
|
bitfld.long 0x0 0. "RADIOAES,RADIOAES DMA secure mode" "0,1"
|
|
rgroup.long 0x250++0x7
|
|
line.long 0x0 "BMPUFS,Read to get status about the master that triggered a fault."
|
|
hexmask.long.byte 0x0 0.--7. 1. "BMPUFSMASTERID,Manager ID"
|
|
line.long 0x4 "BMPUFSADDR,Read to get the access address that triggered a fault."
|
|
hexmask.long 0x4 0.--31. 1. "BMPUFSADDR,Fault Address"
|
|
group.long 0x260++0x7
|
|
line.long 0x0 "ESAURTYPES0,Write to specify if a region is secure or non-secure."
|
|
bitfld.long 0x0 12. "ESAUR3NS,Region 3 Non-Secure Type" "0,1"
|
|
line.long 0x4 "ESAURTYPES1,Write to specify if a region is secure or non-secure."
|
|
bitfld.long 0x4 12. "ESAUR11NS,Region 11 Non-Secure Type" "0,1"
|
|
group.long 0x270++0x7
|
|
line.long 0x0 "ESAUMRB01,Specify the boundary between regions 0 and 1."
|
|
hexmask.long.word 0x0 12.--27. 1. "ESAUMRB01,Moveable Region Boundary 0-1"
|
|
line.long 0x4 "ESAUMRB12,Specify the boundary between regions 1 and 2."
|
|
hexmask.long.word 0x4 12.--27. 1. "ESAUMRB12,Moveable Region Boundary 1-2"
|
|
group.long 0x280++0x7
|
|
line.long 0x0 "ESAUMRB45,Specify the boundary between regions 4 and 5."
|
|
hexmask.long.word 0x0 12.--27. 1. "ESAUMRB45,Moveable Region Boundary 4-5"
|
|
line.long 0x4 "ESAUMRB56,Specify the boundary between regions 5 and 6."
|
|
hexmask.long.word 0x4 12.--27. 1. "ESAUMRB56,Moveable Region Boundary 5-6"
|
|
tree.end
|
|
tree "SMU_NS_CFGNS"
|
|
base ad:0x5400C000
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "NSSTATUS,Register for status flags."
|
|
bitfld.long 0x0 0. "SMUNSLOCK,SMUNS Lock Status" "0: SMUNSLOCK Unlocked,1: SMUNSLOCK Locked"
|
|
wgroup.long 0x8++0x3
|
|
line.long 0x0 "NSLOCK,Register used to lock/unlock access to the register file."
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "SMUNSLOCKKEY,SMU Non-Secure Lock/Key"
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "NSIF,Register for interrupt status flags."
|
|
bitfld.long 0x0 2. "PPUNSINST,PPUNS Instruction Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 0. "PPUNSPRIV,PPUNS Privilege Interrupt Flag" "0,1"
|
|
line.long 0x4 "NSIEN,Register used for enabling/disabling interrupts."
|
|
bitfld.long 0x4 2. "PPUNSINST,PPUNS Instruction Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "PPUNSPRIV,PPUNS Privilege Interrupt Enable" "0,1"
|
|
group.long 0x40++0x7
|
|
line.long 0x0 "PPUNSPATD0,Set peripheral bits to 1 to mark as privileged access only."
|
|
bitfld.long 0x0 31. "DCI,DCI Privileged Access" "0,1"
|
|
bitfld.long 0x0 30. "GPCRC,GPCRC Privileged Access" "0,1"
|
|
bitfld.long 0x0 29. "IFADCDEBUG,IFADCDEBUG Privileged Access" "0,1"
|
|
bitfld.long 0x0 28. "BURAM,BURAM Privileged Access" "0,1"
|
|
bitfld.long 0x0 27. "SYSCFG,SYSCFG Privileged Access" "0,1"
|
|
bitfld.long 0x0 26. "SYSCFGCFGNS,SYSCFGCFGNS Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "CHIPTESTCTRL,CHIPTESTCTRL Privileged Access" "0,1"
|
|
bitfld.long 0x0 24. "I2C1,I2C1 Privileged Access" "0,1"
|
|
bitfld.long 0x0 23. "BURTC,BURTC Privileged Access" "0,1"
|
|
bitfld.long 0x0 22. "USART1,USART1 Privileged Access" "0,1"
|
|
bitfld.long 0x0 21. "USART0,USART0 Privileged Access" "0,1"
|
|
bitfld.long 0x0 20. "TIMER4,TIMER4 Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "TIMER3,TIMER3 Privileged Access" "0,1"
|
|
bitfld.long 0x0 18. "TIMER2,TIMER2 Privileged Access" "0,1"
|
|
bitfld.long 0x0 17. "TIMER1,TIMER1 Privileged Access" "0,1"
|
|
bitfld.long 0x0 16. "TIMER0,TIMER0 Privileged Access" "0,1"
|
|
bitfld.long 0x0 15. "LDMAXBAR,LDMAXBAR Privileged Access" "0,1"
|
|
bitfld.long 0x0 14. "LDMA,LDMA Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "GPIO,GPIO Privileged Access" "0,1"
|
|
bitfld.long 0x0 12. "PRS,PRS Privileged Access" "0,1"
|
|
bitfld.long 0x0 11. "ICACHE0,ICACHE0 Privileged Access" "0,1"
|
|
bitfld.long 0x0 10. "MSC,MSC Privileged Access" "0,1"
|
|
bitfld.long 0x0 9. "ULFRCO,ULFRCO Privileged Access" "0,1"
|
|
bitfld.long 0x0 8. "LFRCO,LFRCO Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "LFXO,LFXO Privileged Access" "0,1"
|
|
bitfld.long 0x0 6. "DPLL0,DPLL0 Privileged Access" "0,1"
|
|
bitfld.long 0x0 5. "FSRCO,FSRCO Privileged Access" "0,1"
|
|
bitfld.long 0x0 4. "HFRCO0,HFRCO0 Privileged Access" "0,1"
|
|
bitfld.long 0x0 3. "HFXO0,HFXO0 Privileged Access" "0,1"
|
|
bitfld.long 0x0 2. "CMU,CMU Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "EMU,EMU Privileged Access" "0,1"
|
|
line.long 0x4 "PPUNSPATD1,Set peripheral bits to 1 to mark as privileged access only."
|
|
bitfld.long 0x4 15. "AHBRADIO,AHBRADIO Privileged Access" "0,1"
|
|
bitfld.long 0x4 14. "CRYPTOACC,CRYPTOACC Privileged Access" "0,1"
|
|
bitfld.long 0x4 13. "EUART0,EUART0 Privileged Access" "0,1"
|
|
bitfld.long 0x4 12. "AMUXCP0,AMUXCP0 Privileged Access" "0,1"
|
|
bitfld.long 0x4 11. "WDOG0,WDOG0 Privileged Access" "0,1"
|
|
bitfld.long 0x4 10. "I2C0,I2C0 Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "IADC0,IADC0 Privileged Access" "0,1"
|
|
bitfld.long 0x4 8. "LETIMER0,LETIMER0 Privileged Access" "0,1"
|
|
bitfld.long 0x4 7. "RTCC,RTCC Privileged Access" "0,1"
|
|
bitfld.long 0x4 6. "SMUCFGNS,SMUCFGNS Privileged Access" "0,1"
|
|
bitfld.long 0x4 5. "SMU,SMU Privileged Access" "0,1"
|
|
bitfld.long 0x4 4. "RADIOAES,RADIOAES Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "RFSENSE,RFSENSE Privileged Access" "0,1"
|
|
bitfld.long 0x4 2. "PDM,PDM Privileged Access" "0,1"
|
|
bitfld.long 0x4 1. "DCDC,DCDC Privileged Access" "0,1"
|
|
rgroup.long 0x140++0x3
|
|
line.long 0x0 "PPUNSFS,Read this register to query the fault status."
|
|
hexmask.long.byte 0x0 0.--7. 1. "PPUFSPERIPHID,Peripheral ID"
|
|
group.long 0x150++0x3
|
|
line.long 0x0 "BMPUNSPATD0,Write to set BMPU priveledged attributes."
|
|
bitfld.long 0x0 4. "LDMA,MCU LDMA privileged mode" "0,1"
|
|
bitfld.long 0x0 3. "RADIOIFADCDEBUG,RADIO IFADC debug privileged mode" "0,1"
|
|
bitfld.long 0x0 2. "RADIOSUBSYSTEM,RADIO subsystem manager privileged mode" "0,1"
|
|
bitfld.long 0x0 1. "CRYPTOACC,CRYPTOACC DMA privileged mode" "0,1"
|
|
bitfld.long 0x0 0. "RADIOAES,RADIO AES DMA privileged mode" "0,1"
|
|
tree.end
|
|
tree "SMU_S"
|
|
base ad:0x44008000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "IPVERSION,The read only IPVERSION field gives the version for this module. There may be minor software changes required for modules with different values of IPVERSION."
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version"
|
|
line.long 0x4 "STATUS,Read to get SMU status."
|
|
bitfld.long 0x4 1. "SMUPRGERR,SMU Programming Error" "0,1"
|
|
bitfld.long 0x4 0. "SMULOCK,SMU Lock" "0: SMULOCK is Unlocked,1: SMULOCK is Locked"
|
|
wgroup.long 0x8++0x3
|
|
line.long 0x0 "LOCK,Access to Lock/unlock the SMU Configuration."
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "SMULOCKKEY,SMU Lock/Key"
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "IF,Read to get status of SMU interrupts."
|
|
bitfld.long 0x0 17. "BMPUSEC,BMPU Security Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 16. "PPUSEC,PPU Security Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 2. "PPUINST,PPU Instruction Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 0. "PPUPRIV,PPU Privilege Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,Write to Enable/Disable SMU interrupts."
|
|
bitfld.long 0x4 17. "BMPUSEC,BMPU Security Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 16. "PPUSEC,PPU Security Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 2. "PPUINST,PPU Instruction Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "PPUPRIV,PPU Privilege Interrupt Enable" "0,1"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "M33CTRL,Holds the M33 control settings."
|
|
bitfld.long 0x0 4. "LOCKSAU,LOCKSAU control of M33 CPU" "0,1"
|
|
bitfld.long 0x0 3. "LOCKNSMPU,LOCKNSMPU control of M33 CPU" "0,1"
|
|
bitfld.long 0x0 2. "LOCKSMPU,LOCKSMPU control of M33 CPU" "0,1"
|
|
bitfld.long 0x0 1. "LOCKNSVTOR,LOCKNSVTOR control of M33 CPU" "0,1"
|
|
bitfld.long 0x0 0. "LOCKSVTAIRCR,LOCKSVTAIRCR control of M33 CPU" "0,1"
|
|
group.long 0x40++0x7
|
|
line.long 0x0 "PPUPATD0,Set peripheral bits to 1 to mark as privileged access only."
|
|
bitfld.long 0x0 31. "DCI,DCI Privileged Access" "0,1"
|
|
bitfld.long 0x0 30. "GPCRC,GPCRC Privileged Access" "0,1"
|
|
bitfld.long 0x0 29. "IFADCDEBUG,IFADCDEBUG Privileged Access" "0,1"
|
|
bitfld.long 0x0 28. "BURAM,BURAM Privileged Access" "0,1"
|
|
bitfld.long 0x0 27. "SYSCFG,SYSCFG Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "SYSCFGCFGNS,SYSCFGCFGNS Privileged Access" "0,1"
|
|
bitfld.long 0x0 25. "CHIPTESTCTRL,CHIPTESTCTRL Privileged Access" "0,1"
|
|
bitfld.long 0x0 24. "I2C1,I2C1 Privileged Access" "0,1"
|
|
bitfld.long 0x0 23. "BURTC,BURTC Privileged Access" "0,1"
|
|
bitfld.long 0x0 22. "USART1,USART1 Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "USART0,USART0 Privileged Access" "0,1"
|
|
bitfld.long 0x0 20. "TIMER4,TIMER4 Privileged Access" "0,1"
|
|
bitfld.long 0x0 19. "TIMER3,TIMER3 Privileged Access" "0,1"
|
|
bitfld.long 0x0 18. "TIMER2,TIMER2 Privileged Access" "0,1"
|
|
bitfld.long 0x0 17. "TIMER1,TIMER1 Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "TIMER0,TIMER0 Privileged Access" "0,1"
|
|
bitfld.long 0x0 15. "LDMAXBAR,LDMAXBAR Privileged Access" "0,1"
|
|
bitfld.long 0x0 14. "LDMA,LDMA Privileged Access" "0,1"
|
|
bitfld.long 0x0 13. "GPIO,GPIO Privileged Access" "0,1"
|
|
bitfld.long 0x0 12. "PRS,PRS Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "ICACHE0,ICACHE0 Privileged Access" "0,1"
|
|
bitfld.long 0x0 10. "MSC,MSC Privileged Access" "0,1"
|
|
bitfld.long 0x0 9. "ULFRCO,ULFRCO Privileged Access" "0,1"
|
|
bitfld.long 0x0 8. "LFRCO,LFRCO Privileged Access" "0,1"
|
|
bitfld.long 0x0 7. "LFXO,LFXO Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "DPLL0,DPLL0 Privileged Access" "0,1"
|
|
bitfld.long 0x0 5. "FSRCO,FSRCO Privileged Access" "0,1"
|
|
bitfld.long 0x0 4. "HFRCO0,HFRCO0 Privileged Access" "0,1"
|
|
bitfld.long 0x0 3. "HFXO0,HFXO0 Privileged Access" "0,1"
|
|
bitfld.long 0x0 2. "CMU,CMU Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "EMU,EMU Privileged Access" "0,1"
|
|
line.long 0x4 "PPUPATD1,Set peripheral bits to 1 to mark as privileged access only."
|
|
bitfld.long 0x4 15. "AHBRADIO,AHBRADIO Privileged Access" "0,1"
|
|
bitfld.long 0x4 14. "CRYPTOACC,CRYPTOACC Privileged Access" "0,1"
|
|
bitfld.long 0x4 13. "EUART0,EUART0 Privileged Access" "0,1"
|
|
bitfld.long 0x4 12. "AMUXCP0,AMUXCP0 Privileged Access" "0,1"
|
|
bitfld.long 0x4 11. "WDOG0,WDOG0 Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "I2C0,I2C0 Privileged Access" "0,1"
|
|
bitfld.long 0x4 9. "IADC0,IADC0 Privileged Access" "0,1"
|
|
bitfld.long 0x4 8. "LETIMER0,LETIMER0 Privileged Access" "0,1"
|
|
bitfld.long 0x4 7. "RTCC,RTCC Privileged Access" "0,1"
|
|
bitfld.long 0x4 6. "SMUCFGNS,SMUCFGNS Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "SMU,SMU Privileged Access" "0,1"
|
|
bitfld.long 0x4 4. "RADIOAES,RADIOAES Privileged Access" "0,1"
|
|
bitfld.long 0x4 3. "RFSENSE,RFSENSE Privileged Access" "0,1"
|
|
bitfld.long 0x4 2. "PDM,PDM Privileged Access" "0,1"
|
|
bitfld.long 0x4 1. "DCDC,DCDC Privileged Access" "0,1"
|
|
group.long 0x60++0x7
|
|
line.long 0x0 "PPUSATD0,Set peripheral bits to 1 to mark as secure access only."
|
|
bitfld.long 0x0 31. "DCI,DCI Secure Access" "0,1"
|
|
bitfld.long 0x0 30. "GPCRC,GPCRC Secure Access" "0,1"
|
|
bitfld.long 0x0 29. "IFADCDEBUG,IFADCDEBUG Secure Access" "0,1"
|
|
bitfld.long 0x0 28. "BURAM,BURAM Secure Access" "0,1"
|
|
bitfld.long 0x0 27. "SYSCFG,SYSCFG Secure Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "SYSCFGCFGNS,SYSCFGCFGNS Secure Access" "0,1"
|
|
bitfld.long 0x0 25. "CHIPTESTCTRL,CHIPTESTCTRL Secure Access" "0,1"
|
|
bitfld.long 0x0 24. "I2C1,I2C1 Secure Access" "0,1"
|
|
bitfld.long 0x0 23. "BURTC,BURTC Secure Access" "0,1"
|
|
bitfld.long 0x0 22. "USART1,USART1 Secure Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "USART0,USART0 Secure Access" "0,1"
|
|
bitfld.long 0x0 20. "TIMER4,TIMER4 Secure Access" "0,1"
|
|
bitfld.long 0x0 19. "TIMER3,TIMER3 Secure Access" "0,1"
|
|
bitfld.long 0x0 18. "TIMER2,TIMER2 Secure Access" "0,1"
|
|
bitfld.long 0x0 17. "TIMER1,TIMER1 Secure Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "TIMER0,TIMER0 Secure Access" "0,1"
|
|
bitfld.long 0x0 15. "LDMAXBAR,LDMAXBAR Secure Access" "0,1"
|
|
bitfld.long 0x0 14. "LDMA,LDMA Secure Access" "0,1"
|
|
bitfld.long 0x0 13. "GPIO,GPIO Secure Access" "0,1"
|
|
bitfld.long 0x0 12. "PRS,PRS Secure Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "ICACHE0,ICACHE0 Secure Access" "0,1"
|
|
bitfld.long 0x0 10. "MSC,MSC Secure Access" "0,1"
|
|
bitfld.long 0x0 9. "ULFRCO,ULFRCO Secure Access" "0,1"
|
|
bitfld.long 0x0 8. "LFRCO,LFRCO Secure Access" "0,1"
|
|
bitfld.long 0x0 7. "LFXO,LFXO Secure Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "DPLL0,DPLL0 Secure Access" "0,1"
|
|
bitfld.long 0x0 5. "FSRCO,FSRCO Secure Access" "0,1"
|
|
bitfld.long 0x0 4. "HFRCO0,HFRCO0 Secure Access" "0,1"
|
|
bitfld.long 0x0 3. "HFXO0,HFXO0 Secure Access" "0,1"
|
|
bitfld.long 0x0 2. "CMU,CMU Secure Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "EMU,EMU Secure Access" "0,1"
|
|
line.long 0x4 "PPUSATD1,Set peripheral bits to 1 to mark as secure access only."
|
|
bitfld.long 0x4 15. "AHBRADIO,AHBRADIO Secure Access" "0,1"
|
|
bitfld.long 0x4 14. "CRYPTOACC,CRYPTOACC Secure Access" "0,1"
|
|
bitfld.long 0x4 13. "EUART0,EUART0 Secure Access" "0,1"
|
|
bitfld.long 0x4 12. "AMUXCP0,AMUXCP0 Secure Access" "0,1"
|
|
bitfld.long 0x4 11. "WDOG0,WDOG0 Secure Access" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "I2C0,I2C0 Secure Access" "0,1"
|
|
bitfld.long 0x4 9. "IADC0,IADC0 Secure Access" "0,1"
|
|
bitfld.long 0x4 8. "LETIMER0,LETIMER0 Secure Access" "0,1"
|
|
bitfld.long 0x4 7. "RTCC,RTCC Secure Access" "0,1"
|
|
bitfld.long 0x4 6. "SMUCFGNS,SMUCFGNS Secure Access" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "SMU,SMU Secure Access" "0,1"
|
|
bitfld.long 0x4 4. "RADIOAES,RADIOAES Secure Access" "0,1"
|
|
bitfld.long 0x4 3. "RFSENSE,RFSENSE Secure Access" "0,1"
|
|
bitfld.long 0x4 2. "PDM,PDM Secure Access" "0,1"
|
|
bitfld.long 0x4 1. "DCDC,DCDC Secure Access" "0,1"
|
|
rgroup.long 0x140++0x3
|
|
line.long 0x0 "PPUFS,Read to get fault status of SMU."
|
|
hexmask.long.byte 0x0 0.--7. 1. "PPUFSPERIPHID,Peripheral ID"
|
|
group.long 0x150++0x3
|
|
line.long 0x0 "BMPUPATD0,Set master bits to 1 to mark as a privileged master."
|
|
bitfld.long 0x0 4. "LDMA,MCU LDMA privileged mode" "0,1"
|
|
bitfld.long 0x0 3. "RADIOIFADCDEBUG,RADIO IFADC debug privileged mode" "0,1"
|
|
bitfld.long 0x0 2. "RADIOSUBSYSTEM,RADIO subsystem manager privileged mode" "0,1"
|
|
bitfld.long 0x0 1. "CRYPTOACC,CRYPTOACC DMA privileged mode" "0,1"
|
|
bitfld.long 0x0 0. "RADIOAES,RADIO AES DMA privileged mode" "0,1"
|
|
group.long 0x170++0x3
|
|
line.long 0x0 "BMPUSATD0,Set master bits to 1 to mark as a secure master."
|
|
bitfld.long 0x0 4. "LDMA,MCU LDMA secure mode" "0,1"
|
|
bitfld.long 0x0 3. "RADIOIFADCDEBUG,RADIO IFADC debug secure mode" "0,1"
|
|
bitfld.long 0x0 2. "RADIOSUBSYSTEM,RADIO subsystem manager secure mode" "0,1"
|
|
bitfld.long 0x0 1. "CRYPTOACC,CRYPTOACC DMA secure mode" "0,1"
|
|
bitfld.long 0x0 0. "RADIOAES,RADIOAES DMA secure mode" "0,1"
|
|
rgroup.long 0x250++0x7
|
|
line.long 0x0 "BMPUFS,Read to get status about the master that triggered a fault."
|
|
hexmask.long.byte 0x0 0.--7. 1. "BMPUFSMASTERID,Manager ID"
|
|
line.long 0x4 "BMPUFSADDR,Read to get the access address that triggered a fault."
|
|
hexmask.long 0x4 0.--31. 1. "BMPUFSADDR,Fault Address"
|
|
group.long 0x260++0x7
|
|
line.long 0x0 "ESAURTYPES0,Write to specify if a region is secure or non-secure."
|
|
bitfld.long 0x0 12. "ESAUR3NS,Region 3 Non-Secure Type" "0,1"
|
|
line.long 0x4 "ESAURTYPES1,Write to specify if a region is secure or non-secure."
|
|
bitfld.long 0x4 12. "ESAUR11NS,Region 11 Non-Secure Type" "0,1"
|
|
group.long 0x270++0x7
|
|
line.long 0x0 "ESAUMRB01,Specify the boundary between regions 0 and 1."
|
|
hexmask.long.word 0x0 12.--27. 1. "ESAUMRB01,Moveable Region Boundary 0-1"
|
|
line.long 0x4 "ESAUMRB12,Specify the boundary between regions 1 and 2."
|
|
hexmask.long.word 0x4 12.--27. 1. "ESAUMRB12,Moveable Region Boundary 1-2"
|
|
group.long 0x280++0x7
|
|
line.long 0x0 "ESAUMRB45,Specify the boundary between regions 4 and 5."
|
|
hexmask.long.word 0x0 12.--27. 1. "ESAUMRB45,Moveable Region Boundary 4-5"
|
|
line.long 0x4 "ESAUMRB56,Specify the boundary between regions 5 and 6."
|
|
hexmask.long.word 0x4 12.--27. 1. "ESAUMRB56,Moveable Region Boundary 5-6"
|
|
tree.end
|
|
tree "SMU_S_CFGNS"
|
|
base ad:0x4400C000
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "NSSTATUS,Register for status flags."
|
|
bitfld.long 0x0 0. "SMUNSLOCK,SMUNS Lock Status" "0: SMUNSLOCK Unlocked,1: SMUNSLOCK Locked"
|
|
wgroup.long 0x8++0x3
|
|
line.long 0x0 "NSLOCK,Register used to lock/unlock access to the register file."
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "SMUNSLOCKKEY,SMU Non-Secure Lock/Key"
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "NSIF,Register for interrupt status flags."
|
|
bitfld.long 0x0 2. "PPUNSINST,PPUNS Instruction Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 0. "PPUNSPRIV,PPUNS Privilege Interrupt Flag" "0,1"
|
|
line.long 0x4 "NSIEN,Register used for enabling/disabling interrupts."
|
|
bitfld.long 0x4 2. "PPUNSINST,PPUNS Instruction Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "PPUNSPRIV,PPUNS Privilege Interrupt Enable" "0,1"
|
|
group.long 0x40++0x7
|
|
line.long 0x0 "PPUNSPATD0,Set peripheral bits to 1 to mark as privileged access only."
|
|
bitfld.long 0x0 31. "DCI,DCI Privileged Access" "0,1"
|
|
bitfld.long 0x0 30. "GPCRC,GPCRC Privileged Access" "0,1"
|
|
bitfld.long 0x0 29. "IFADCDEBUG,IFADCDEBUG Privileged Access" "0,1"
|
|
bitfld.long 0x0 28. "BURAM,BURAM Privileged Access" "0,1"
|
|
bitfld.long 0x0 27. "SYSCFG,SYSCFG Privileged Access" "0,1"
|
|
bitfld.long 0x0 26. "SYSCFGCFGNS,SYSCFGCFGNS Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "CHIPTESTCTRL,CHIPTESTCTRL Privileged Access" "0,1"
|
|
bitfld.long 0x0 24. "I2C1,I2C1 Privileged Access" "0,1"
|
|
bitfld.long 0x0 23. "BURTC,BURTC Privileged Access" "0,1"
|
|
bitfld.long 0x0 22. "USART1,USART1 Privileged Access" "0,1"
|
|
bitfld.long 0x0 21. "USART0,USART0 Privileged Access" "0,1"
|
|
bitfld.long 0x0 20. "TIMER4,TIMER4 Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "TIMER3,TIMER3 Privileged Access" "0,1"
|
|
bitfld.long 0x0 18. "TIMER2,TIMER2 Privileged Access" "0,1"
|
|
bitfld.long 0x0 17. "TIMER1,TIMER1 Privileged Access" "0,1"
|
|
bitfld.long 0x0 16. "TIMER0,TIMER0 Privileged Access" "0,1"
|
|
bitfld.long 0x0 15. "LDMAXBAR,LDMAXBAR Privileged Access" "0,1"
|
|
bitfld.long 0x0 14. "LDMA,LDMA Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "GPIO,GPIO Privileged Access" "0,1"
|
|
bitfld.long 0x0 12. "PRS,PRS Privileged Access" "0,1"
|
|
bitfld.long 0x0 11. "ICACHE0,ICACHE0 Privileged Access" "0,1"
|
|
bitfld.long 0x0 10. "MSC,MSC Privileged Access" "0,1"
|
|
bitfld.long 0x0 9. "ULFRCO,ULFRCO Privileged Access" "0,1"
|
|
bitfld.long 0x0 8. "LFRCO,LFRCO Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "LFXO,LFXO Privileged Access" "0,1"
|
|
bitfld.long 0x0 6. "DPLL0,DPLL0 Privileged Access" "0,1"
|
|
bitfld.long 0x0 5. "FSRCO,FSRCO Privileged Access" "0,1"
|
|
bitfld.long 0x0 4. "HFRCO0,HFRCO0 Privileged Access" "0,1"
|
|
bitfld.long 0x0 3. "HFXO0,HFXO0 Privileged Access" "0,1"
|
|
bitfld.long 0x0 2. "CMU,CMU Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "EMU,EMU Privileged Access" "0,1"
|
|
line.long 0x4 "PPUNSPATD1,Set peripheral bits to 1 to mark as privileged access only."
|
|
bitfld.long 0x4 15. "AHBRADIO,AHBRADIO Privileged Access" "0,1"
|
|
bitfld.long 0x4 14. "CRYPTOACC,CRYPTOACC Privileged Access" "0,1"
|
|
bitfld.long 0x4 13. "EUART0,EUART0 Privileged Access" "0,1"
|
|
bitfld.long 0x4 12. "AMUXCP0,AMUXCP0 Privileged Access" "0,1"
|
|
bitfld.long 0x4 11. "WDOG0,WDOG0 Privileged Access" "0,1"
|
|
bitfld.long 0x4 10. "I2C0,I2C0 Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "IADC0,IADC0 Privileged Access" "0,1"
|
|
bitfld.long 0x4 8. "LETIMER0,LETIMER0 Privileged Access" "0,1"
|
|
bitfld.long 0x4 7. "RTCC,RTCC Privileged Access" "0,1"
|
|
bitfld.long 0x4 6. "SMUCFGNS,SMUCFGNS Privileged Access" "0,1"
|
|
bitfld.long 0x4 5. "SMU,SMU Privileged Access" "0,1"
|
|
bitfld.long 0x4 4. "RADIOAES,RADIOAES Privileged Access" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "RFSENSE,RFSENSE Privileged Access" "0,1"
|
|
bitfld.long 0x4 2. "PDM,PDM Privileged Access" "0,1"
|
|
bitfld.long 0x4 1. "DCDC,DCDC Privileged Access" "0,1"
|
|
rgroup.long 0x140++0x3
|
|
line.long 0x0 "PPUNSFS,Read this register to query the fault status."
|
|
hexmask.long.byte 0x0 0.--7. 1. "PPUFSPERIPHID,Peripheral ID"
|
|
group.long 0x150++0x3
|
|
line.long 0x0 "BMPUNSPATD0,Write to set BMPU priveledged attributes."
|
|
bitfld.long 0x0 4. "LDMA,MCU LDMA privileged mode" "0,1"
|
|
bitfld.long 0x0 3. "RADIOIFADCDEBUG,RADIO IFADC debug privileged mode" "0,1"
|
|
bitfld.long 0x0 2. "RADIOSUBSYSTEM,RADIO subsystem manager privileged mode" "0,1"
|
|
bitfld.long 0x0 1. "CRYPTOACC,CRYPTOACC DMA privileged mode" "0,1"
|
|
bitfld.long 0x0 0. "RADIOAES,RADIO AES DMA privileged mode" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree.end
|
|
tree "SYNTH (Synthesizer)"
|
|
base ad:0x0
|
|
tree "SYNTH_NS"
|
|
base ad:0xB8018000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "IPVERSION,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "IPVERSION,IP Version"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "EN,No Description"
|
|
bitfld.long 0x00 0. "EN,Enable peripheral clock to this module" "0,1"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "STATUS,No Description"
|
|
bitfld.long 0x00 1. "IFFREQEN,Synthesizer IF frequency enable status" "0,1"
|
|
bitfld.long 0x00 0. "INLOCK,RF Synthesizer in Lock" "0,1"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "CMD,No Description"
|
|
bitfld.long 0x00 4. "CAPCALSTART,Start VCO capacitor array calibration" "0,1"
|
|
bitfld.long 0x00 3. "DISABLEIF,Disable the synthesizer IF frequency" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "ENABLEIF,Enable the synthesizer IF frequency" "0,1"
|
|
bitfld.long 0x00 1. "SYNTHSTOP,Stops the RF synthesizer" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "SYNTHSTART,Starts the RF synthesizer" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CTRL,No Description"
|
|
bitfld.long 0x00 31. "MMDMANRSTN,Manual MMD reset" "0: Reset MMD and DSM logic,1: Allow MMD and DSM to run"
|
|
bitfld.long 0x00 30. "MMDRSTNOVERRIDEEN,Enable MMD reset override" "0: Disable MMD reset override,1: Enable MMD reset override"
|
|
newline
|
|
bitfld.long 0x00 24. "INVCLKSYNTH,Invert clk_synth" "0: Do not invert clk_synth,1: Invert clk_synth"
|
|
bitfld.long 0x00 20.--22. "PRSMUX1,PRS output mux 1 selector" "0: PRS output 1 is disabled,1: Obsolete,2: Disabled,3: Divided PLL clock,4: VCO voltage low detected,5: MMD prescaler reset active low,6: MMD next denom output corresponding to the..,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--18. "PRSMUX0,PRS output mux 0 selector" "0: PRS output 0 is disabled,1: Synthesizer is in lock,2: PLL Lock Window sampled by PFD,3: Divided PLL clock,4: VCO voltage high detected,5: Obsolete,6: Obsolete,?..."
|
|
bitfld.long 0x00 0.--2. "LOCKTHRESHOLD,Frequency synthesizer lock threshold" "0,1,2,3,4,5,6,7"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "VCDACCTRL,No Description"
|
|
bitfld.long 0x00 8. "LPFQSEN,LPF Quickstart Control" "0: Disable LPF,1: Enable LPF"
|
|
bitfld.long 0x00 7. "LPFEN,LPF Enable Control" "0: Disable LPF,1: Enable LPF"
|
|
newline
|
|
bitfld.long 0x00 6. "VCDACEN,Enable VCDAC" "0: VC DAC disabled,1: VC DAC enabled"
|
|
bitfld.long 0x00 0.--5. "VCDACVAL,Control voltage to VCO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "FREQ,No Description"
|
|
hexmask.long 0x00 0.--27. 1. "FREQ,RF Carrier Frequency"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "IFFREQ,No Description"
|
|
bitfld.long 0x00 20. "LOSIDE,Configure LO in receive" "0: The local oscillator (LO) is lower in..,1: The local oscillator (LO) is higher in.."
|
|
hexmask.long.tbyte 0x00 0.--19. 1. "IFFREQ,IF used in receive mode"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "DIVCTRL,No Description"
|
|
hexmask.long.word 0x00 0.--8. 1. "LODIVFREQCTRL,Frequency division"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CHCTRL,No Description"
|
|
bitfld.long 0x00 0.--5. "CHNO,Channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CHSP,No Description"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "CHSP,Channel spacing"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "CALOFFSET,No Description"
|
|
hexmask.long.word 0x00 0.--14. 1. "CALOFFSET,Carrier calibration offset"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "VCOTUNING,No Description"
|
|
bitfld.long 0x00 11.--15. "VCAPSEL,VCO varactor cap select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 0.--10. 1. "VCOTUNING,VCO capacitor array calibration value"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "VCOGAIN,No Description"
|
|
bitfld.long 0x00 4.--7. "VCOKVFINE,VCO varactor fine gain setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "VCOKVCOARSE,VCO varactor coarse gain setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "IF,No Description"
|
|
bitfld.long 0x00 9. "LOCNTDONE,LOCNT measurement done Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. "VCOLOW,VCO low voltage Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "VCOHIGH,VCO high voltage Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. "SYRDY,Synthesizer ready Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "UNLOCKED,Synthesizer unlocked Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. "LOCKED,Synthesizer locked Interrupt Flag" "0,1"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "IEN,No Description"
|
|
bitfld.long 0x00 9. "LOCNTDONE,LOCNTDONE Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 5. "VCOLOW,VCOLOW Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "VCOHIGH,VCOHIGH Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. "SYRDY,CAPCALDONE Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "UNLOCKED,UNLOCKED Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. "LOCKED,LOCKED Interrupt Enable" "0,1"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "LOCNTCTRL,No Description"
|
|
bitfld.long 0x00 11. "FCALRUNCLKEN,Enable FCAL run pulse counter clock" "0: Don't enable clock,1: Enable clock"
|
|
bitfld.long 0x00 10. "LOCNTMANRUN,Manual Control of the LO counter RUN" "0: Don't initiate start/stop LO counter,1: Initiate start/stop of LO counter"
|
|
newline
|
|
bitfld.long 0x00 9. "LOCNTMANCLEAR,Manual Control of LO counter CLEAR" "0: Don't clear LO counter,1: Clear LO counter"
|
|
bitfld.long 0x00 8. "LOCNTOVERRIDEEN,Enable manual override of CLEAR and RUN" "0: Disable manual override,1: Enable manual override"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "NUMCYCLE,Number of Clock Cycles to Run LO Counter" "0: Set count length to 2 XO clock cycles,1: Set count length to 4 XO clock cycles,2: Set count length to 8 XO clock cycles,3: Set count length to 16 XO clock cycles,4: Set count length to 32 XO clock cycles,5: Set count length to 64 XO clock cycles,6: Set count length to 128 XO clock cycles,7: Set count length to 256 XO clock cycles,8: Set count length to 512 XO clock cycles,9: Set count length to 1024 XO clock cycles,10: Set count length to 2048 XO clock cycles,11: Set count length to 4096 XO clock cycles,12: Set count length to 8192 XO clock cycles,?..."
|
|
bitfld.long 0x00 3. "READ,Read LO Counter" "0: LOCOUNT register read returns all 0's,1: LOCOUNT register read returns count value"
|
|
newline
|
|
bitfld.long 0x00 2. "RUN,Run LO Counter" "0: Do not run LO counter,1: Run LO counter"
|
|
bitfld.long 0x00 1. "CLEAR,Clear LO Counter" "0: Do not clear LO counter,1: Clear LO counter"
|
|
newline
|
|
bitfld.long 0x00 0. "ENABLE,Enable LO Counter" "0: LO counter is disabled,1: LO counter is enabled"
|
|
rgroup.long 0x8C++0x03
|
|
line.long 0x00 "LOCNTSTATUS,No Description"
|
|
bitfld.long 0x00 19. "BUSY,LO Counter is Busy" "0,1"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "LOCOUNT,LO Counter Value"
|
|
rgroup.long 0x90++0x03
|
|
line.long 0x00 "LOCNTTARGET,No Description"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TARGET,LO Counter Measurement Target"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "MMDDENOMINIT,No Description"
|
|
hexmask.long.word 0x00 18.--26. 1. "DENOMINIT2,New BitField"
|
|
hexmask.long.word 0x00 9.--17. 1. "DENOMINIT1,New BitField"
|
|
newline
|
|
hexmask.long.word 0x00 0.--8. 1. "DENOMINIT0,New BitField"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "CHPDACINIT,No Description"
|
|
hexmask.long.word 0x00 0.--11. 1. "DACINIT,Initial CHP DAC Value"
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "LPFCTRL1CAL,No Description"
|
|
bitfld.long 0x00 14.--17. "RZVALCAL,LPF Rz Value Select in Cal Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11.--13. "RPVALCAL,LPF Rp Value Select in Cal Mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "RFBVALCAL,LPF Rfb Value Select in Cal Mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--7. "OP1COMPCAL,LPF Op1 Comp Control in Cal Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "OP1BWCAL,LPF Op1 BW Control in Cal Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "LPFCTRL1RX,No Description"
|
|
bitfld.long 0x00 14.--17. "RZVALRX,LPF Rz Value Select in RX Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11.--13. "RPVALRX,LPF Rp Value Select in RX Mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "RFBVALRX,LPF Rfb Value Select in RX Mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--7. "OP1COMPRX,LPF Op1 Comp Control in RX Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "OP1BWRX,LPF Op1 BW Control in RX Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "LPFCTRL1TX,No Description"
|
|
bitfld.long 0x00 14.--17. "RZVALTX,LPF Rz Value Select in TX Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11.--13. "RPVALTX,LPF Rp Value Select in TX Mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "RFBVALTX,LPF Rfb Value Select in TX Mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--7. "OP1COMPTX,LPF Op1 Comp Control in TX Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "OP1BWTX,LPF Op1 BW Control in TX Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "LPFCTRL2RX,No Description"
|
|
bitfld.long 0x00 26.--28. "VCMLVLRX,LPF Vcm Level Select in RX Mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 25. "MODESELRX,LPF Filter Mode Select in RX Mode" "0: Sets 1 opamp configuration,1: Sets 2 opamp configuration"
|
|
newline
|
|
hexmask.long.byte 0x00 17.--24. 1. "CZVALRX,LPF Cz Value Select in RX Mode"
|
|
bitfld.long 0x00 16. "CZSELRX,LPF Cz Select in RX Mode" "0: Disable Cz,1: Enable Cz"
|
|
newline
|
|
bitfld.long 0x00 15. "CFBSELRX,LPF Cfb Select in RX Mode" "0: Disable Cfb,1: Enable Cfb"
|
|
bitfld.long 0x00 10.--14. "CAVALRX,LPF Ca Value Select in RX Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 9. "CASELRX,LPF Ca Select in RX Mode" "0: Disable Ca,1: Enable Ca"
|
|
bitfld.long 0x00 4.--8. "CALCRX,LPF Cap Cal Select in RX Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 3. "LPFGNDSWENRX,LPF Gnd Switch Enable in RX Mode" "0: Disable GND switching,1: Enable GND switching"
|
|
bitfld.long 0x00 1.--2. "LPFINCAPRX,LPF Input Cap Select in RX Mode" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 0. "LPFSWENRX,LPF Switching Enable in RX Mode" "0: Disable switching,1: Enable switching"
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "LPFCTRL2TX,No Description"
|
|
bitfld.long 0x00 26.--28. "VCMLVLTX,LPF Vcm Level Select in TX Mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 25. "MODESELTX,LPF Filter Mode Select in TX Mode" "0: 1 opamp configuration,1: 2 opamp configuration"
|
|
newline
|
|
hexmask.long.byte 0x00 17.--24. 1. "CZVALTX,LPF Cz Value Select in TX Mode"
|
|
bitfld.long 0x00 16. "CZSELTX,LPF Cz Select in TX Mode" "0: Disable Cz,1: Enable Cz"
|
|
newline
|
|
bitfld.long 0x00 15. "CFBSELTX,LPF Cfb Select in TX Mode" "0: Disable Cfb,1: Enable Cfb"
|
|
bitfld.long 0x00 10.--14. "CAVALTX,LPF Ca Value Select in TX Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 9. "CASELTX,LPF Ca Select in TX Mode" "0: Disable Ca,1: Enable Ca"
|
|
bitfld.long 0x00 4.--8. "CALCTX,LPF Cap Cal Select in TX Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 3. "LPFGNDSWENTX,LPF Gnd Switch Enable in TX Mode" "0: Disable GND switching,1: Enable GND switching"
|
|
bitfld.long 0x00 1.--2. "LPFINCAPTX,LPF Input Cap Select in TX Mode" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 0. "LPFSWENTX,LPF Switching Enable in TX Mode" "0: Disable switching,1: Enable switching"
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "DSMCTRLRX,No Description"
|
|
bitfld.long 0x00 26. "REQORDERRX,ReQuant order for RX mode" "0: 1st Order DAC,1: 2rd Order DAC"
|
|
bitfld.long 0x00 25. "MASHORDERRX,MASH order for RX mode" "0: 2nd Order Mash,1: 3rd Order Mash"
|
|
newline
|
|
bitfld.long 0x00 24. "DEMMODERX,DEM Mode for RX mode" "0: DEM is disabled,1: DEM is enabled"
|
|
bitfld.long 0x00 9. "LSBFORCERX,Delta-sigma input force LSB for RX mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "DSMMODERX,Delta-sigma topology for RX mode" "0: Feed forward architecture,1: MASH architecture"
|
|
bitfld.long 0x00 4.--7. "DITHERDACRX,Dithering of charge pump DAC for RX mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 1.--3. "DITHERDSMOUTPUTRX,Dithering of DSM output for RX mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. "DITHERDSMINPUTRX,Dithering of DSM input for RX mode" "0,1"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "DSMCTRLTX,No Description"
|
|
bitfld.long 0x00 26. "REQORDERTX,ReQuant order for TX mode" "0: 1st Order DAC,1: 2rd Order DAC"
|
|
bitfld.long 0x00 25. "MASHORDERTX,MASH order for TX mode" "0: 2nd Order Mash,1: 3rd Order Mash"
|
|
newline
|
|
bitfld.long 0x00 24. "DEMMODETX,DEM Mode for TX mode" "0: DEM is disabled,1: DEM is enabled"
|
|
bitfld.long 0x00 9. "LSBFORCETX,Delta-sigma input force LSB for TX mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "DSMMODETX,Delta-sigma topology for TX mode" "0: Feed forward architecture,1: MASH architecture"
|
|
bitfld.long 0x00 4.--7. "DITHERDACTX,Dithering of charge pump DAC for TX mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 1.--3. "DITHERDSMOUTPUTTX,Dithering of DSM output for TX mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. "DITHERDSMINPUTTX,Dithering of DSM input for TX mode" "0,1"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "SEQIF,No Description"
|
|
bitfld.long 0x00 9. "LOCNTDONE,LOCNT measurement done Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. "VCOLOW,VCO low voltage Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "VCOHIGH,VCO high voltage Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. "SYRDY,Synthesizer ready Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "UNLOCKED,Synthesizer unlocked Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. "LOCKED,Synthesizer locked Interrupt Flag" "0,1"
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "SEQIEN,No Description"
|
|
bitfld.long 0x00 9. "LOCNTDONE,LOCNTDONE Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 5. "VCOLOW,VCOLOW Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "VCOHIGH,VCOHIGH Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. "SYRDY,CAPCALDONE Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "UNLOCKED,UNLOCKED Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. "LOCKED,LOCKED Interrupt Enable" "0,1"
|
|
tree.end
|
|
tree "SYNTH_S"
|
|
base ad:0xA8018000
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "IPVERSION,No Description"
|
|
hexmask.long 0x00 0.--31. 1. "IPVERSION,IP Version"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "EN,No Description"
|
|
bitfld.long 0x00 0. "EN,Enable peripheral clock to this module" "0,1"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "STATUS,No Description"
|
|
bitfld.long 0x00 1. "IFFREQEN,Synthesizer IF frequency enable status" "0,1"
|
|
bitfld.long 0x00 0. "INLOCK,RF Synthesizer in Lock" "0,1"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "CMD,No Description"
|
|
bitfld.long 0x00 4. "CAPCALSTART,Start VCO capacitor array calibration" "0,1"
|
|
bitfld.long 0x00 3. "DISABLEIF,Disable the synthesizer IF frequency" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "ENABLEIF,Enable the synthesizer IF frequency" "0,1"
|
|
bitfld.long 0x00 1. "SYNTHSTOP,Stops the RF synthesizer" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "SYNTHSTART,Starts the RF synthesizer" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CTRL,No Description"
|
|
bitfld.long 0x00 31. "MMDMANRSTN,Manual MMD reset" "0: Reset MMD and DSM logic,1: Allow MMD and DSM to run"
|
|
bitfld.long 0x00 30. "MMDRSTNOVERRIDEEN,Enable MMD reset override" "0: Disable MMD reset override,1: Enable MMD reset override"
|
|
newline
|
|
bitfld.long 0x00 24. "INVCLKSYNTH,Invert clk_synth" "0: Do not invert clk_synth,1: Invert clk_synth"
|
|
bitfld.long 0x00 20.--22. "PRSMUX1,PRS output mux 1 selector" "0: PRS output 1 is disabled,1: Obsolete,2: Disabled,3: Divided PLL clock,4: VCO voltage low detected,5: MMD prescaler reset active low,6: MMD next denom output corresponding to the..,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--18. "PRSMUX0,PRS output mux 0 selector" "0: PRS output 0 is disabled,1: Synthesizer is in lock,2: PLL Lock Window sampled by PFD,3: Divided PLL clock,4: VCO voltage high detected,5: Obsolete,6: Obsolete,?..."
|
|
bitfld.long 0x00 0.--2. "LOCKTHRESHOLD,Frequency synthesizer lock threshold" "0,1,2,3,4,5,6,7"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "VCDACCTRL,No Description"
|
|
bitfld.long 0x00 8. "LPFQSEN,LPF Quickstart Control" "0: Disable LPF,1: Enable LPF"
|
|
bitfld.long 0x00 7. "LPFEN,LPF Enable Control" "0: Disable LPF,1: Enable LPF"
|
|
newline
|
|
bitfld.long 0x00 6. "VCDACEN,Enable VCDAC" "0: VC DAC disabled,1: VC DAC enabled"
|
|
bitfld.long 0x00 0.--5. "VCDACVAL,Control voltage to VCO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "FREQ,No Description"
|
|
hexmask.long 0x00 0.--27. 1. "FREQ,RF Carrier Frequency"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "IFFREQ,No Description"
|
|
bitfld.long 0x00 20. "LOSIDE,Configure LO in receive" "0: The local oscillator (LO) is lower in..,1: The local oscillator (LO) is higher in.."
|
|
hexmask.long.tbyte 0x00 0.--19. 1. "IFFREQ,IF used in receive mode"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "DIVCTRL,No Description"
|
|
hexmask.long.word 0x00 0.--8. 1. "LODIVFREQCTRL,Frequency division"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CHCTRL,No Description"
|
|
bitfld.long 0x00 0.--5. "CHNO,Channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CHSP,No Description"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "CHSP,Channel spacing"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "CALOFFSET,No Description"
|
|
hexmask.long.word 0x00 0.--14. 1. "CALOFFSET,Carrier calibration offset"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "VCOTUNING,No Description"
|
|
bitfld.long 0x00 11.--15. "VCAPSEL,VCO varactor cap select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 0.--10. 1. "VCOTUNING,VCO capacitor array calibration value"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "VCOGAIN,No Description"
|
|
bitfld.long 0x00 4.--7. "VCOKVFINE,VCO varactor fine gain setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "VCOKVCOARSE,VCO varactor coarse gain setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "IF,No Description"
|
|
bitfld.long 0x00 9. "LOCNTDONE,LOCNT measurement done Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. "VCOLOW,VCO low voltage Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "VCOHIGH,VCO high voltage Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. "SYRDY,Synthesizer ready Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "UNLOCKED,Synthesizer unlocked Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. "LOCKED,Synthesizer locked Interrupt Flag" "0,1"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "IEN,No Description"
|
|
bitfld.long 0x00 9. "LOCNTDONE,LOCNTDONE Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 5. "VCOLOW,VCOLOW Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "VCOHIGH,VCOHIGH Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. "SYRDY,CAPCALDONE Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "UNLOCKED,UNLOCKED Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. "LOCKED,LOCKED Interrupt Enable" "0,1"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "LOCNTCTRL,No Description"
|
|
bitfld.long 0x00 11. "FCALRUNCLKEN,Enable FCAL run pulse counter clock" "0: Don't enable clock,1: Enable clock"
|
|
bitfld.long 0x00 10. "LOCNTMANRUN,Manual Control of the LO counter RUN" "0: Don't initiate start/stop LO counter,1: Initiate start/stop of LO counter"
|
|
newline
|
|
bitfld.long 0x00 9. "LOCNTMANCLEAR,Manual Control of LO counter CLEAR" "0: Don't clear LO counter,1: Clear LO counter"
|
|
bitfld.long 0x00 8. "LOCNTOVERRIDEEN,Enable manual override of CLEAR and RUN" "0: Disable manual override,1: Enable manual override"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "NUMCYCLE,Number of Clock Cycles to Run LO Counter" "0: Set count length to 2 XO clock cycles,1: Set count length to 4 XO clock cycles,2: Set count length to 8 XO clock cycles,3: Set count length to 16 XO clock cycles,4: Set count length to 32 XO clock cycles,5: Set count length to 64 XO clock cycles,6: Set count length to 128 XO clock cycles,7: Set count length to 256 XO clock cycles,8: Set count length to 512 XO clock cycles,9: Set count length to 1024 XO clock cycles,10: Set count length to 2048 XO clock cycles,11: Set count length to 4096 XO clock cycles,12: Set count length to 8192 XO clock cycles,?..."
|
|
bitfld.long 0x00 3. "READ,Read LO Counter" "0: LOCOUNT register read returns all 0's,1: LOCOUNT register read returns count value"
|
|
newline
|
|
bitfld.long 0x00 2. "RUN,Run LO Counter" "0: Do not run LO counter,1: Run LO counter"
|
|
bitfld.long 0x00 1. "CLEAR,Clear LO Counter" "0: Do not clear LO counter,1: Clear LO counter"
|
|
newline
|
|
bitfld.long 0x00 0. "ENABLE,Enable LO Counter" "0: LO counter is disabled,1: LO counter is enabled"
|
|
rgroup.long 0x8C++0x03
|
|
line.long 0x00 "LOCNTSTATUS,No Description"
|
|
bitfld.long 0x00 19. "BUSY,LO Counter is Busy" "0,1"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "LOCOUNT,LO Counter Value"
|
|
rgroup.long 0x90++0x03
|
|
line.long 0x00 "LOCNTTARGET,No Description"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. "TARGET,LO Counter Measurement Target"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "MMDDENOMINIT,No Description"
|
|
hexmask.long.word 0x00 18.--26. 1. "DENOMINIT2,New BitField"
|
|
hexmask.long.word 0x00 9.--17. 1. "DENOMINIT1,New BitField"
|
|
newline
|
|
hexmask.long.word 0x00 0.--8. 1. "DENOMINIT0,New BitField"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "CHPDACINIT,No Description"
|
|
hexmask.long.word 0x00 0.--11. 1. "DACINIT,Initial CHP DAC Value"
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "LPFCTRL1CAL,No Description"
|
|
bitfld.long 0x00 14.--17. "RZVALCAL,LPF Rz Value Select in Cal Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11.--13. "RPVALCAL,LPF Rp Value Select in Cal Mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "RFBVALCAL,LPF Rfb Value Select in Cal Mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--7. "OP1COMPCAL,LPF Op1 Comp Control in Cal Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "OP1BWCAL,LPF Op1 BW Control in Cal Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "LPFCTRL1RX,No Description"
|
|
bitfld.long 0x00 14.--17. "RZVALRX,LPF Rz Value Select in RX Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11.--13. "RPVALRX,LPF Rp Value Select in RX Mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "RFBVALRX,LPF Rfb Value Select in RX Mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--7. "OP1COMPRX,LPF Op1 Comp Control in RX Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "OP1BWRX,LPF Op1 BW Control in RX Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "LPFCTRL1TX,No Description"
|
|
bitfld.long 0x00 14.--17. "RZVALTX,LPF Rz Value Select in TX Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11.--13. "RPVALTX,LPF Rp Value Select in TX Mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "RFBVALTX,LPF Rfb Value Select in TX Mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--7. "OP1COMPTX,LPF Op1 Comp Control in TX Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "OP1BWTX,LPF Op1 BW Control in TX Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "LPFCTRL2RX,No Description"
|
|
bitfld.long 0x00 26.--28. "VCMLVLRX,LPF Vcm Level Select in RX Mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 25. "MODESELRX,LPF Filter Mode Select in RX Mode" "0: Sets 1 opamp configuration,1: Sets 2 opamp configuration"
|
|
newline
|
|
hexmask.long.byte 0x00 17.--24. 1. "CZVALRX,LPF Cz Value Select in RX Mode"
|
|
bitfld.long 0x00 16. "CZSELRX,LPF Cz Select in RX Mode" "0: Disable Cz,1: Enable Cz"
|
|
newline
|
|
bitfld.long 0x00 15. "CFBSELRX,LPF Cfb Select in RX Mode" "0: Disable Cfb,1: Enable Cfb"
|
|
bitfld.long 0x00 10.--14. "CAVALRX,LPF Ca Value Select in RX Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 9. "CASELRX,LPF Ca Select in RX Mode" "0: Disable Ca,1: Enable Ca"
|
|
bitfld.long 0x00 4.--8. "CALCRX,LPF Cap Cal Select in RX Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 3. "LPFGNDSWENRX,LPF Gnd Switch Enable in RX Mode" "0: Disable GND switching,1: Enable GND switching"
|
|
bitfld.long 0x00 1.--2. "LPFINCAPRX,LPF Input Cap Select in RX Mode" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 0. "LPFSWENRX,LPF Switching Enable in RX Mode" "0: Disable switching,1: Enable switching"
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "LPFCTRL2TX,No Description"
|
|
bitfld.long 0x00 26.--28. "VCMLVLTX,LPF Vcm Level Select in TX Mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 25. "MODESELTX,LPF Filter Mode Select in TX Mode" "0: 1 opamp configuration,1: 2 opamp configuration"
|
|
newline
|
|
hexmask.long.byte 0x00 17.--24. 1. "CZVALTX,LPF Cz Value Select in TX Mode"
|
|
bitfld.long 0x00 16. "CZSELTX,LPF Cz Select in TX Mode" "0: Disable Cz,1: Enable Cz"
|
|
newline
|
|
bitfld.long 0x00 15. "CFBSELTX,LPF Cfb Select in TX Mode" "0: Disable Cfb,1: Enable Cfb"
|
|
bitfld.long 0x00 10.--14. "CAVALTX,LPF Ca Value Select in TX Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 9. "CASELTX,LPF Ca Select in TX Mode" "0: Disable Ca,1: Enable Ca"
|
|
bitfld.long 0x00 4.--8. "CALCTX,LPF Cap Cal Select in TX Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 3. "LPFGNDSWENTX,LPF Gnd Switch Enable in TX Mode" "0: Disable GND switching,1: Enable GND switching"
|
|
bitfld.long 0x00 1.--2. "LPFINCAPTX,LPF Input Cap Select in TX Mode" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 0. "LPFSWENTX,LPF Switching Enable in TX Mode" "0: Disable switching,1: Enable switching"
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "DSMCTRLRX,No Description"
|
|
bitfld.long 0x00 26. "REQORDERRX,ReQuant order for RX mode" "0: 1st Order DAC,1: 2rd Order DAC"
|
|
bitfld.long 0x00 25. "MASHORDERRX,MASH order for RX mode" "0: 2nd Order Mash,1: 3rd Order Mash"
|
|
newline
|
|
bitfld.long 0x00 24. "DEMMODERX,DEM Mode for RX mode" "0: DEM is disabled,1: DEM is enabled"
|
|
bitfld.long 0x00 9. "LSBFORCERX,Delta-sigma input force LSB for RX mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "DSMMODERX,Delta-sigma topology for RX mode" "0: Feed forward architecture,1: MASH architecture"
|
|
bitfld.long 0x00 4.--7. "DITHERDACRX,Dithering of charge pump DAC for RX mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 1.--3. "DITHERDSMOUTPUTRX,Dithering of DSM output for RX mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. "DITHERDSMINPUTRX,Dithering of DSM input for RX mode" "0,1"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "DSMCTRLTX,No Description"
|
|
bitfld.long 0x00 26. "REQORDERTX,ReQuant order for TX mode" "0: 1st Order DAC,1: 2rd Order DAC"
|
|
bitfld.long 0x00 25. "MASHORDERTX,MASH order for TX mode" "0: 2nd Order Mash,1: 3rd Order Mash"
|
|
newline
|
|
bitfld.long 0x00 24. "DEMMODETX,DEM Mode for TX mode" "0: DEM is disabled,1: DEM is enabled"
|
|
bitfld.long 0x00 9. "LSBFORCETX,Delta-sigma input force LSB for TX mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "DSMMODETX,Delta-sigma topology for TX mode" "0: Feed forward architecture,1: MASH architecture"
|
|
bitfld.long 0x00 4.--7. "DITHERDACTX,Dithering of charge pump DAC for TX mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 1.--3. "DITHERDSMOUTPUTTX,Dithering of DSM output for TX mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. "DITHERDSMINPUTTX,Dithering of DSM input for TX mode" "0,1"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "SEQIF,No Description"
|
|
bitfld.long 0x00 9. "LOCNTDONE,LOCNT measurement done Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. "VCOLOW,VCO low voltage Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "VCOHIGH,VCO high voltage Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. "SYRDY,Synthesizer ready Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "UNLOCKED,Synthesizer unlocked Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. "LOCKED,Synthesizer locked Interrupt Flag" "0,1"
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "SEQIEN,No Description"
|
|
bitfld.long 0x00 9. "LOCNTDONE,LOCNTDONE Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 5. "VCOLOW,VCOLOW Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "VCOHIGH,VCOHIGH Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. "SYRDY,CAPCALDONE Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "UNLOCKED,UNLOCKED Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. "LOCKED,LOCKED Interrupt Enable" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "SYSCFG (System Configuration)"
|
|
base ad:0x0
|
|
tree "SYSCFG_NS"
|
|
base ad:0x5007C000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "IF,Read to get system status."
|
|
bitfld.long 0x0 29. "FRCRAMERR2B,FRCRAM 2-Bit Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 28. "FRCRAMERR1B,FRCRAM 1-Bit Error Interrupt Flag" "?,1: Bit Error Interrupt Flag"
|
|
newline
|
|
bitfld.long 0x0 25. "SEQRAMERR2B,SEQRAM 2-Bit Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 24. "SEQRAMERR1B,SEQRAM 1-Bit Error Interrupt Flag" "?,1: Bit Error Interrupt Flag"
|
|
newline
|
|
bitfld.long 0x0 17. "RAMERR2B,RAM 2-Bit Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 16. "RAMERR1B,RAM 1-Bit Error Interrupt Flag" "?,1: Bit Error Interrupt Flag"
|
|
newline
|
|
bitfld.long 0x0 3. "SW3,Software Interrupt 3" "0,1"
|
|
bitfld.long 0x0 2. "SW2,Software Interrupt 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "SW1,Software Interrupt 1" "0,1"
|
|
bitfld.long 0x0 0. "SW0,Software Interrupt 0" "0,1"
|
|
line.long 0x4 "IEN,Write to enable interrupts."
|
|
bitfld.long 0x4 29. "FRCRAMERR2B,FRCRAM 2-bit Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 28. "FRCRAMERR1B,FRCRAM 1-bit Error Interrupt Enable" "?,1: bit Error Interrupt Enable"
|
|
newline
|
|
bitfld.long 0x4 25. "SEQRAMERR2B,SEQRAM 2-bit Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 24. "SEQRAMERR1B,SEQRAM 1-bit Error Interrupt Enable" "?,1: bit Error Interrupt Enable"
|
|
newline
|
|
bitfld.long 0x4 17. "RAMERR2B,RAM 2-bit Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 16. "RAMERR1B,RAM 1-bit Error Interrupt Enable" "?,1: bit Error Interrupt Enable"
|
|
newline
|
|
bitfld.long 0x4 3. "SW3,Software interrupt 3" "0,1"
|
|
bitfld.long 0x4 2. "SW2,Software interrupt 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "SW1,Software interrupt 1" "0,1"
|
|
bitfld.long 0x4 0. "SW0,Software interrupt 0" "0,1"
|
|
group.long 0x10++0x7
|
|
line.long 0x0 "CHIPREVHW,Read to get the hard-wired chip revision."
|
|
hexmask.long.byte 0x0 12.--19. 1. "MINOR,Hardwired Chip Revision Minor value"
|
|
hexmask.long.byte 0x0 6.--11. 1. "FAMILY,Hardwired Chip Family value"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "MAJOR,Hardwired Chip Revision Major value"
|
|
line.long 0x4 "CHIPREV,Read to get the chip revision programmed by feature configuration."
|
|
hexmask.long.byte 0x4 12.--19. 1. "MINOR,Chip Revision Minor value"
|
|
hexmask.long.byte 0x4 6.--11. 1. "FAMILY,Chip Family value"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--5. 1. "MAJOR,Chip Revision Major value"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "CFGSYSTIC,Configure the source of the system tick for the M33."
|
|
bitfld.long 0x0 0. "SYSTICEXTCLKEN,SysTick External Clock Enable" "0,1"
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "CTRL,Configure to provide general RAM configuration."
|
|
bitfld.long 0x0 5. "RAMECCERRFAULTEN,Two bit ECC Error Bus Fault Response Enable" "0,1"
|
|
bitfld.long 0x0 0. "ADDRFAULTEN,Invalid Address Bus Fault Response Enable" "0,1"
|
|
group.long 0x208++0x3
|
|
line.long 0x0 "DMEM0RETNCTRL,Configure to provide general RAM retention configuration."
|
|
bitfld.long 0x0 0.--1. "RAMRETNCTRL,DMEM0 blockset retention control" "0: None of the RAM blocks powered down,1: Power down RAM block 0,2: Power down RAM block 1,?"
|
|
rgroup.long 0x210++0x3
|
|
line.long 0x0 "DMEM0ECCADDR,Read to get status of the DMEM0 ECC error address."
|
|
hexmask.long 0x0 0.--31. 1. "DMEM0ECCADDR,DMEM0 RAM ECC Error Address"
|
|
group.long 0x214++0x3
|
|
line.long 0x0 "DMEM0ECCCTRL,Configure to set RAM ECC control."
|
|
bitfld.long 0x0 1. "RAMECCEWEN,RAM ECC Error Writeback Enable" "0,1"
|
|
bitfld.long 0x0 0. "RAMECCEN,RAM ECC Enable" "0,1"
|
|
group.long 0x400++0x3
|
|
line.long 0x0 "RADIORAMRETNCTRL,Configure SEQRAM Retention controls."
|
|
bitfld.long 0x0 8. "FRCRAMRETNCTRL,FRCRAM Retention Control" "0: FRCRAM not powered down,1: Power down FRCRAM"
|
|
bitfld.long 0x0 0.--1. "SEQRAMRETNCTRL,SEQRAM Retention Control" "0: SEQRAM not powered down,1: Power down SEQRAM block 0,2: Power down SEQRAM block 1,3: Power down all SEQRAM blocks"
|
|
group.long 0x408++0x3
|
|
line.long 0x0 "RADIOECCCTRL,Configure to set RAM ECC control."
|
|
bitfld.long 0x0 9. "FRCRAMECCEWEN,FRCRAM ECC Error Writeback Enable" "0,1"
|
|
bitfld.long 0x0 8. "FRCRAMECCEN,FRCRAM ECC Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "SEQRAMECCEWEN,SEQRAM ECC Error Writeback Enable" "0,1"
|
|
bitfld.long 0x0 0. "SEQRAMECCEN,SEQRAM ECC Enable" "0,1"
|
|
rgroup.long 0x410++0x7
|
|
line.long 0x0 "SEQRAMECCADDR,Read to get status of the SEQRAM ECC error address."
|
|
hexmask.long 0x0 0.--31. 1. "SEQRAMECCADDR,SEQRAM ECC Address"
|
|
line.long 0x4 "FRCRAMECCADDR,Read to get status of the FRCRAM ECC error address."
|
|
hexmask.long 0x4 0.--31. 1. "FRCRAMECCADDR,FRCRAM ECC Error Address"
|
|
group.long 0x600++0x7
|
|
line.long 0x0 "ROOTDATA0,Data in this register is passed to the trusted root firmware upon reset."
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
line.long 0x4 "ROOTDATA1,Data in this register is passed to the trusted root firmware upon reset."
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Data"
|
|
rgroup.long 0x608++0x3
|
|
line.long 0x0 "ROOTLOCKSTATUS,This register returns the status of the SE managed locks."
|
|
bitfld.long 0x0 24. "RADIODBGLOCK,Radio Debug Lock" "0,1"
|
|
bitfld.long 0x0 20. "USERDBGAPLOCK,User Debug Access Port Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "USERSPNIDLOCK,User Secure Non-invasive Debug Lock" "0,1"
|
|
bitfld.long 0x0 18. "USERSPIDLOCK,User Secure Invasive Debug Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "USERNIDLOCK,User Non-invasive Debug Lock" "0,1"
|
|
bitfld.long 0x0 16. "USERDBGLOCK,User Invasive Debug Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "ROOTDBGLOCK,Root Debug Lock" "0,1"
|
|
bitfld.long 0x0 4. "ROOTMODELOCK,Root Mode Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "MFRLOCK,Manufacture Lock" "0,1"
|
|
bitfld.long 0x0 1. "REGLOCK,Register Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "BUSLOCK,Bus Lock" "0,1"
|
|
tree.end
|
|
tree "SYSCFG_NS_CFGNS"
|
|
base ad:0x50078000
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "CFGNSTCALIB,Configure to define the system tick for the M33."
|
|
bitfld.long 0x0 25. "NOREF,No Reference" "0: Reference clock is implemented,1: Reference clock is not implemented"
|
|
bitfld.long 0x0 24. "SKEW,Skew" "0,1"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "TENMS,Ten Milliseconds"
|
|
group.long 0x600++0x7
|
|
line.long 0x0 "ROOTNSDATA0,Generic data space for user to pass to root. e.g.. address of struct in mem"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
line.long 0x4 "ROOTNSDATA1,Generic data space for user to pass to root. e.g.. address of struct in mem"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Data"
|
|
tree.end
|
|
tree "SYSCFG_S"
|
|
base ad:0x4007C000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "IF,Read to get system status."
|
|
bitfld.long 0x0 29. "FRCRAMERR2B,FRCRAM 2-Bit Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 28. "FRCRAMERR1B,FRCRAM 1-Bit Error Interrupt Flag" "?,1: Bit Error Interrupt Flag"
|
|
newline
|
|
bitfld.long 0x0 25. "SEQRAMERR2B,SEQRAM 2-Bit Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 24. "SEQRAMERR1B,SEQRAM 1-Bit Error Interrupt Flag" "?,1: Bit Error Interrupt Flag"
|
|
newline
|
|
bitfld.long 0x0 17. "RAMERR2B,RAM 2-Bit Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 16. "RAMERR1B,RAM 1-Bit Error Interrupt Flag" "?,1: Bit Error Interrupt Flag"
|
|
newline
|
|
bitfld.long 0x0 3. "SW3,Software Interrupt 3" "0,1"
|
|
bitfld.long 0x0 2. "SW2,Software Interrupt 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "SW1,Software Interrupt 1" "0,1"
|
|
bitfld.long 0x0 0. "SW0,Software Interrupt 0" "0,1"
|
|
line.long 0x4 "IEN,Write to enable interrupts."
|
|
bitfld.long 0x4 29. "FRCRAMERR2B,FRCRAM 2-bit Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 28. "FRCRAMERR1B,FRCRAM 1-bit Error Interrupt Enable" "?,1: bit Error Interrupt Enable"
|
|
newline
|
|
bitfld.long 0x4 25. "SEQRAMERR2B,SEQRAM 2-bit Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 24. "SEQRAMERR1B,SEQRAM 1-bit Error Interrupt Enable" "?,1: bit Error Interrupt Enable"
|
|
newline
|
|
bitfld.long 0x4 17. "RAMERR2B,RAM 2-bit Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 16. "RAMERR1B,RAM 1-bit Error Interrupt Enable" "?,1: bit Error Interrupt Enable"
|
|
newline
|
|
bitfld.long 0x4 3. "SW3,Software interrupt 3" "0,1"
|
|
bitfld.long 0x4 2. "SW2,Software interrupt 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "SW1,Software interrupt 1" "0,1"
|
|
bitfld.long 0x4 0. "SW0,Software interrupt 0" "0,1"
|
|
group.long 0x10++0x7
|
|
line.long 0x0 "CHIPREVHW,Read to get the hard-wired chip revision."
|
|
hexmask.long.byte 0x0 12.--19. 1. "MINOR,Hardwired Chip Revision Minor value"
|
|
hexmask.long.byte 0x0 6.--11. 1. "FAMILY,Hardwired Chip Family value"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "MAJOR,Hardwired Chip Revision Major value"
|
|
line.long 0x4 "CHIPREV,Read to get the chip revision programmed by feature configuration."
|
|
hexmask.long.byte 0x4 12.--19. 1. "MINOR,Chip Revision Minor value"
|
|
hexmask.long.byte 0x4 6.--11. 1. "FAMILY,Chip Family value"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--5. 1. "MAJOR,Chip Revision Major value"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "CFGSYSTIC,Configure the source of the system tick for the M33."
|
|
bitfld.long 0x0 0. "SYSTICEXTCLKEN,SysTick External Clock Enable" "0,1"
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "CTRL,Configure to provide general RAM configuration."
|
|
bitfld.long 0x0 5. "RAMECCERRFAULTEN,Two bit ECC Error Bus Fault Response Enable" "0,1"
|
|
bitfld.long 0x0 0. "ADDRFAULTEN,Invalid Address Bus Fault Response Enable" "0,1"
|
|
group.long 0x208++0x3
|
|
line.long 0x0 "DMEM0RETNCTRL,Configure to provide general RAM retention configuration."
|
|
bitfld.long 0x0 0.--1. "RAMRETNCTRL,DMEM0 blockset retention control" "0: None of the RAM blocks powered down,1: Power down RAM block 0,2: Power down RAM block 1,?"
|
|
rgroup.long 0x210++0x3
|
|
line.long 0x0 "DMEM0ECCADDR,Read to get status of the DMEM0 ECC error address."
|
|
hexmask.long 0x0 0.--31. 1. "DMEM0ECCADDR,DMEM0 RAM ECC Error Address"
|
|
group.long 0x214++0x3
|
|
line.long 0x0 "DMEM0ECCCTRL,Configure to set RAM ECC control."
|
|
bitfld.long 0x0 1. "RAMECCEWEN,RAM ECC Error Writeback Enable" "0,1"
|
|
bitfld.long 0x0 0. "RAMECCEN,RAM ECC Enable" "0,1"
|
|
group.long 0x400++0x3
|
|
line.long 0x0 "RADIORAMRETNCTRL,Configure SEQRAM Retention controls."
|
|
bitfld.long 0x0 8. "FRCRAMRETNCTRL,FRCRAM Retention Control" "0: FRCRAM not powered down,1: Power down FRCRAM"
|
|
bitfld.long 0x0 0.--1. "SEQRAMRETNCTRL,SEQRAM Retention Control" "0: SEQRAM not powered down,1: Power down SEQRAM block 0,2: Power down SEQRAM block 1,3: Power down all SEQRAM blocks"
|
|
group.long 0x408++0x3
|
|
line.long 0x0 "RADIOECCCTRL,Configure to set RAM ECC control."
|
|
bitfld.long 0x0 9. "FRCRAMECCEWEN,FRCRAM ECC Error Writeback Enable" "0,1"
|
|
bitfld.long 0x0 8. "FRCRAMECCEN,FRCRAM ECC Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "SEQRAMECCEWEN,SEQRAM ECC Error Writeback Enable" "0,1"
|
|
bitfld.long 0x0 0. "SEQRAMECCEN,SEQRAM ECC Enable" "0,1"
|
|
rgroup.long 0x410++0x7
|
|
line.long 0x0 "SEQRAMECCADDR,Read to get status of the SEQRAM ECC error address."
|
|
hexmask.long 0x0 0.--31. 1. "SEQRAMECCADDR,SEQRAM ECC Address"
|
|
line.long 0x4 "FRCRAMECCADDR,Read to get status of the FRCRAM ECC error address."
|
|
hexmask.long 0x4 0.--31. 1. "FRCRAMECCADDR,FRCRAM ECC Error Address"
|
|
group.long 0x600++0x7
|
|
line.long 0x0 "ROOTDATA0,Data in this register is passed to the trusted root firmware upon reset."
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
line.long 0x4 "ROOTDATA1,Data in this register is passed to the trusted root firmware upon reset."
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Data"
|
|
rgroup.long 0x608++0x3
|
|
line.long 0x0 "ROOTLOCKSTATUS,This register returns the status of the SE managed locks."
|
|
bitfld.long 0x0 24. "RADIODBGLOCK,Radio Debug Lock" "0,1"
|
|
bitfld.long 0x0 20. "USERDBGAPLOCK,User Debug Access Port Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "USERSPNIDLOCK,User Secure Non-invasive Debug Lock" "0,1"
|
|
bitfld.long 0x0 18. "USERSPIDLOCK,User Secure Invasive Debug Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "USERNIDLOCK,User Non-invasive Debug Lock" "0,1"
|
|
bitfld.long 0x0 16. "USERDBGLOCK,User Invasive Debug Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "ROOTDBGLOCK,Root Debug Lock" "0,1"
|
|
bitfld.long 0x0 4. "ROOTMODELOCK,Root Mode Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "MFRLOCK,Manufacture Lock" "0,1"
|
|
bitfld.long 0x0 1. "REGLOCK,Register Lock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "BUSLOCK,Bus Lock" "0,1"
|
|
tree.end
|
|
tree "SYSCFG_S_CFGNS"
|
|
base ad:0x40078000
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "CFGNSTCALIB,Configure to define the system tick for the M33."
|
|
bitfld.long 0x0 25. "NOREF,No Reference" "0: Reference clock is implemented,1: Reference clock is not implemented"
|
|
bitfld.long 0x0 24. "SKEW,Skew" "0,1"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "TENMS,Ten Milliseconds"
|
|
group.long 0x600++0x7
|
|
line.long 0x0 "ROOTNSDATA0,Generic data space for user to pass to root. e.g.. address of struct in mem"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
line.long 0x4 "ROOTNSDATA1,Generic data space for user to pass to root. e.g.. address of struct in mem"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Data"
|
|
tree.end
|
|
tree.end
|
|
tree "TIMER (Timer/Counter)"
|
|
base ad:0x0
|
|
tree "TIMER0_NS"
|
|
base ad:0x50048000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version ID"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "CFG,No Description"
|
|
hexmask.long.word 0x0 18.--27. 1. "PRESC,Prescaler Setting"
|
|
bitfld.long 0x0 17. "RSSCOIST,Reload-Start Sets COIST" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "ATI,Always Track Inputs" "0,1"
|
|
bitfld.long 0x0 12. "RETIMESEL,PWM output retime select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "DISSYNCOUT,Disable Timer Start/Stop/Reload output" "0: Timer can start/stop/reload other timers with..,1: Timer cannot start/stop/reload other timers with.."
|
|
bitfld.long 0x0 10. "RETIMEEN,PWM output retimed enable" "0: PWM outputs are not re-timed.,1: PWM outputs are re-timed."
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CLKSEL,Clock Source Select" "0: Prescaled EM01GRPACLK,1: Compare/Capture Channel 1 Input,2: Timer is clocked by underflow(down-count) or..,?"
|
|
bitfld.long 0x0 7. "DMACLRACT,DMA Request Clear on Active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "DEBUGRUN,Debug Mode Run Enable" "0: Timer is halted in debug mode,1: Timer is running in debug mode"
|
|
bitfld.long 0x0 5. "QDM,Quadrature Decoder Mode Selection" "0: X2 mode selected,1: X4 mode selected"
|
|
newline
|
|
bitfld.long 0x0 4. "OSMEN,One-shot Mode Enable" "0,1"
|
|
bitfld.long 0x0 3. "SYNC,Timer Start/Stop/Reload Synchronization" "0: Timer operation is unaffected by other timers.,1: Timer may be started stopped and re-loaded from.."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "MODE,Timer Mode" "0: Up-count mode,1: Down-count mode,2: Up/down-count mode,3: Quadrature decoder mode"
|
|
line.long 0x4 "CTRL,No Description"
|
|
bitfld.long 0x4 4. "X2CNT,2x Count Mode" "0,1"
|
|
bitfld.long 0x4 2.--3. "FALLA,Timer Falling Input Edge Action" "0: No action,1: Start counter without reload,2: Stop counter without reload,3: Reload and start counter"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "RISEA,Timer Rising Input Edge Action" "0: No action,1: Start counter without reload,2: Stop counter without reload,3: Reload and start counter"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 1. "STOP,Stop Timer" "0,1"
|
|
bitfld.long 0x0 0. "START,Start Timer" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 26. "CCPOL2,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
bitfld.long 0x0 25. "CCPOL1,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
newline
|
|
bitfld.long 0x0 24. "CCPOL0,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
bitfld.long 0x0 18. "ICFEMPTY2,Input capture fifo empty" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "ICFEMPTY1,Input capture fifo empty" "0,1"
|
|
bitfld.long 0x0 16. "ICFEMPTY0,Input capture fifo empty" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "OCBV2,Output Compare Buffer Valid" "0,1"
|
|
bitfld.long 0x0 9. "OCBV1,Output Compare Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "OCBV0,Output Compare Buffer Valid" "0,1"
|
|
bitfld.long 0x0 6. "SYNCBUSY,Sync Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "DTILOCKSTATUS,DTI lock status" "0: DTI registers are unlocked,1: DTI registers are locked"
|
|
bitfld.long 0x0 4. "TIMERLOCKSTATUS,Timer lock status" "0: TIMER registers are unlocked,1: TIMER registers are locked"
|
|
newline
|
|
bitfld.long 0x0 2. "TOPBV,TOP Buffer Valid" "0,1"
|
|
bitfld.long 0x0 1. "DIR,Direction" "0: Counting up,1: Counting down"
|
|
newline
|
|
bitfld.long 0x0 0. "RUNNING,Running" "0,1"
|
|
group.long 0x14++0x13
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 26. "ICFUF2,Input capture FIFO underflow" "0,1"
|
|
bitfld.long 0x0 25. "ICFUF1,Input capture FIFO underflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "ICFUF0,Input capture FIFO underflow" "0,1"
|
|
bitfld.long 0x0 22. "ICFOF2,Input Capture FIFO overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "ICFOF1,Input Capture FIFO overflow" "0,1"
|
|
bitfld.long 0x0 20. "ICFOF0,Input Capture FIFO overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "ICFWLFULL2,Input Capture Watermark Level Full" "0,1"
|
|
bitfld.long 0x0 17. "ICFWLFULL1,Input Capture Watermark Level Full" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "ICFWLFULL0,Input Capture Watermark Level Full" "0,1"
|
|
bitfld.long 0x0 6. "CC2,Capture Compare Channel 2 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "CC1,Capture Compare Channel 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 4. "CC0,Capture Compare Channel 0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DIRCHG,Direction Change Detect Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 1. "UF,Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "OF,Overflow Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 26. "ICFUF2,ICFUF2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 25. "ICFUF1,ICFUF1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "ICFUF0,ICFUF0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 22. "ICFOF2,ICFOF2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "ICFOF1,ICFOF1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 20. "ICFOF0,ICFOF0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "ICFWLFULL2,ICFWLFULL2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 17. "ICFWLFULL1,ICFWLFULL1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "ICFWLFULL0,ICFWLFULL0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 6. "CC2,CC2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "CC1,CC1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 4. "CC0,CC0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "DIRCHG,Direction Change Detect Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 1. "UF,Underflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "OF,Overflow Interrupt Enable" "0,1"
|
|
line.long 0x8 "TOP,No Description"
|
|
hexmask.long 0x8 0.--31. 1. "TOP,Counter Top Value"
|
|
line.long 0xC "TOPB,No Description"
|
|
hexmask.long 0xC 0.--31. 1. "TOPB,Counter Top Buffer Register"
|
|
line.long 0x10 "CNT,No Description"
|
|
hexmask.long 0x10 0.--31. 1. "CNT,Counter Value"
|
|
wgroup.long 0x2C++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Timer Lock Key"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,Timer Module Enable" "0,1"
|
|
group.long 0x60++0xB
|
|
line.long 0x0 "CC0_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC0_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC0_OC,No Description"
|
|
hexmask.long 0x8 0.--31. 1. "OC,Output Compare Value"
|
|
group.long 0x70++0x3
|
|
line.long 0x0 "CC0_OCB,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0x74++0x7
|
|
line.long 0x0 "CC0_ICF,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC0_ICOF,No Description"
|
|
hexmask.long 0x4 0.--31. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0x80++0xB
|
|
line.long 0x0 "CC1_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC1_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC1_OC,No Description"
|
|
hexmask.long 0x8 0.--31. 1. "OC,Output Compare Value"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "CC1_OCB,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0x94++0x7
|
|
line.long 0x0 "CC1_ICF,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC1_ICOF,No Description"
|
|
hexmask.long 0x4 0.--31. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0xA0++0xB
|
|
line.long 0x0 "CC2_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC2_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC2_OC,No Description"
|
|
hexmask.long 0x8 0.--31. 1. "OC,Output Compare Value"
|
|
group.long 0xB0++0x3
|
|
line.long 0x0 "CC2_OCB,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0xB4++0x7
|
|
line.long 0x0 "CC2_ICF,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC2_ICOF,No Description"
|
|
hexmask.long 0x4 0.--31. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0xE0++0x13
|
|
line.long 0x0 "DTCFG,No Description"
|
|
bitfld.long 0x0 11. "DTPRSEN,DTI PRS Source Enable" "0,1"
|
|
bitfld.long 0x0 10. "DTFATS,DTI Fault Action on Timer Stop" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "DTAR,DTI Always Run" "0,1"
|
|
bitfld.long 0x0 1. "DTDAS,DTI Automatic Start-up Functionality" "0: No DTI restart on debugger exit,1: DTI restart on debugger exit"
|
|
newline
|
|
bitfld.long 0x0 0. "DTEN,DTI Enable" "0,1"
|
|
line.long 0x4 "DTTIMECFG,No Description"
|
|
hexmask.long.byte 0x4 16.--21. 1. "DTFALLT,DTI Fall-time"
|
|
hexmask.long.byte 0x4 10.--15. 1. "DTRISET,DTI Rise-time"
|
|
newline
|
|
hexmask.long.word 0x4 0.--9. 1. "DTPRESC,DTI Prescaler Setting"
|
|
line.long 0x8 "DTFCFG,No Description"
|
|
bitfld.long 0x8 28. "DTEM23FEN,DTI EM23 Fault Enable" "0,1"
|
|
bitfld.long 0x8 27. "DTLOCKUPFEN,DTI Lockup Fault Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 26. "DTDBGFEN,DTI Debugger Fault Enable" "0,1"
|
|
bitfld.long 0x8 25. "DTPRS1FEN,DTI PRS 1 Fault Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 24. "DTPRS0FEN,DTI PRS 0 Fault Enable" "0,1"
|
|
bitfld.long 0x8 16.--17. "DTFA,DTI Fault Action" "0: No action on fault,1: Set outputs inactive,2: Clear outputs,3: Tristate outputs"
|
|
line.long 0xC "DTCTRL,No Description"
|
|
bitfld.long 0xC 1. "DTIPOL,DTI Inactive Polarity" "0,1"
|
|
bitfld.long 0xC 0. "DTCINV,DTI Complementary Output Invert." "0,1"
|
|
line.long 0x10 "DTOGEN,No Description"
|
|
bitfld.long 0x10 5. "DTOGCDTI2EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 4. "DTOGCDTI1EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x10 3. "DTOGCDTI0EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 2. "DTOGCC2EN,DTI CCn Output Generation Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x10 1. "DTOGCC1EN,DTI CCn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 0. "DTOGCC0EN,DTI CCn Output Generation Enable" "0,1"
|
|
rgroup.long 0xF4++0x3
|
|
line.long 0x0 "DTFAULT,No Description"
|
|
bitfld.long 0x0 4. "DTEM23F,DTI EM23 Entry Fault" "0,1"
|
|
bitfld.long 0x0 3. "DTLOCKUPF,DTI Lockup Fault" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DTDBGF,DTI Debugger Fault" "0,1"
|
|
bitfld.long 0x0 1. "DTPRS1F,DTI PRS 1 Fault" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DTPRS0F,DTI PRS 0 Fault" "0,1"
|
|
wgroup.long 0xF8++0x7
|
|
line.long 0x0 "DTFAULTC,No Description"
|
|
bitfld.long 0x0 4. "DTEM23FC,DTI EM23 Fault Clear" "0,1"
|
|
bitfld.long 0x0 3. "DTLOCKUPFC,DTI Lockup Fault Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DTDBGFC,DTI Debugger Fault Clear" "0,1"
|
|
bitfld.long 0x0 1. "DTPRS1FC,DTI PRS1 Fault Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DTPRS0FC,DTI PRS0 Fault Clear" "0,1"
|
|
line.long 0x4 "DTLOCK,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "DTILOCKKEY,DTI Lock Key"
|
|
tree.end
|
|
tree "TIMER0_S"
|
|
base ad:0x40048000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version ID"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "CFG,No Description"
|
|
hexmask.long.word 0x0 18.--27. 1. "PRESC,Prescaler Setting"
|
|
bitfld.long 0x0 17. "RSSCOIST,Reload-Start Sets COIST" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "ATI,Always Track Inputs" "0,1"
|
|
bitfld.long 0x0 12. "RETIMESEL,PWM output retime select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "DISSYNCOUT,Disable Timer Start/Stop/Reload output" "0: Timer can start/stop/reload other timers with..,1: Timer cannot start/stop/reload other timers with.."
|
|
bitfld.long 0x0 10. "RETIMEEN,PWM output retimed enable" "0: PWM outputs are not re-timed.,1: PWM outputs are re-timed."
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CLKSEL,Clock Source Select" "0: Prescaled EM01GRPACLK,1: Compare/Capture Channel 1 Input,2: Timer is clocked by underflow(down-count) or..,?"
|
|
bitfld.long 0x0 7. "DMACLRACT,DMA Request Clear on Active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "DEBUGRUN,Debug Mode Run Enable" "0: Timer is halted in debug mode,1: Timer is running in debug mode"
|
|
bitfld.long 0x0 5. "QDM,Quadrature Decoder Mode Selection" "0: X2 mode selected,1: X4 mode selected"
|
|
newline
|
|
bitfld.long 0x0 4. "OSMEN,One-shot Mode Enable" "0,1"
|
|
bitfld.long 0x0 3. "SYNC,Timer Start/Stop/Reload Synchronization" "0: Timer operation is unaffected by other timers.,1: Timer may be started stopped and re-loaded from.."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "MODE,Timer Mode" "0: Up-count mode,1: Down-count mode,2: Up/down-count mode,3: Quadrature decoder mode"
|
|
line.long 0x4 "CTRL,No Description"
|
|
bitfld.long 0x4 4. "X2CNT,2x Count Mode" "0,1"
|
|
bitfld.long 0x4 2.--3. "FALLA,Timer Falling Input Edge Action" "0: No action,1: Start counter without reload,2: Stop counter without reload,3: Reload and start counter"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "RISEA,Timer Rising Input Edge Action" "0: No action,1: Start counter without reload,2: Stop counter without reload,3: Reload and start counter"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 1. "STOP,Stop Timer" "0,1"
|
|
bitfld.long 0x0 0. "START,Start Timer" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 26. "CCPOL2,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
bitfld.long 0x0 25. "CCPOL1,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
newline
|
|
bitfld.long 0x0 24. "CCPOL0,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
bitfld.long 0x0 18. "ICFEMPTY2,Input capture fifo empty" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "ICFEMPTY1,Input capture fifo empty" "0,1"
|
|
bitfld.long 0x0 16. "ICFEMPTY0,Input capture fifo empty" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "OCBV2,Output Compare Buffer Valid" "0,1"
|
|
bitfld.long 0x0 9. "OCBV1,Output Compare Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "OCBV0,Output Compare Buffer Valid" "0,1"
|
|
bitfld.long 0x0 6. "SYNCBUSY,Sync Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "DTILOCKSTATUS,DTI lock status" "0: DTI registers are unlocked,1: DTI registers are locked"
|
|
bitfld.long 0x0 4. "TIMERLOCKSTATUS,Timer lock status" "0: TIMER registers are unlocked,1: TIMER registers are locked"
|
|
newline
|
|
bitfld.long 0x0 2. "TOPBV,TOP Buffer Valid" "0,1"
|
|
bitfld.long 0x0 1. "DIR,Direction" "0: Counting up,1: Counting down"
|
|
newline
|
|
bitfld.long 0x0 0. "RUNNING,Running" "0,1"
|
|
group.long 0x14++0x13
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 26. "ICFUF2,Input capture FIFO underflow" "0,1"
|
|
bitfld.long 0x0 25. "ICFUF1,Input capture FIFO underflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "ICFUF0,Input capture FIFO underflow" "0,1"
|
|
bitfld.long 0x0 22. "ICFOF2,Input Capture FIFO overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "ICFOF1,Input Capture FIFO overflow" "0,1"
|
|
bitfld.long 0x0 20. "ICFOF0,Input Capture FIFO overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "ICFWLFULL2,Input Capture Watermark Level Full" "0,1"
|
|
bitfld.long 0x0 17. "ICFWLFULL1,Input Capture Watermark Level Full" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "ICFWLFULL0,Input Capture Watermark Level Full" "0,1"
|
|
bitfld.long 0x0 6. "CC2,Capture Compare Channel 2 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "CC1,Capture Compare Channel 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 4. "CC0,Capture Compare Channel 0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DIRCHG,Direction Change Detect Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 1. "UF,Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "OF,Overflow Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 26. "ICFUF2,ICFUF2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 25. "ICFUF1,ICFUF1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "ICFUF0,ICFUF0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 22. "ICFOF2,ICFOF2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "ICFOF1,ICFOF1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 20. "ICFOF0,ICFOF0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "ICFWLFULL2,ICFWLFULL2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 17. "ICFWLFULL1,ICFWLFULL1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "ICFWLFULL0,ICFWLFULL0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 6. "CC2,CC2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "CC1,CC1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 4. "CC0,CC0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "DIRCHG,Direction Change Detect Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 1. "UF,Underflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "OF,Overflow Interrupt Enable" "0,1"
|
|
line.long 0x8 "TOP,No Description"
|
|
hexmask.long 0x8 0.--31. 1. "TOP,Counter Top Value"
|
|
line.long 0xC "TOPB,No Description"
|
|
hexmask.long 0xC 0.--31. 1. "TOPB,Counter Top Buffer Register"
|
|
line.long 0x10 "CNT,No Description"
|
|
hexmask.long 0x10 0.--31. 1. "CNT,Counter Value"
|
|
wgroup.long 0x2C++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Timer Lock Key"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,Timer Module Enable" "0,1"
|
|
group.long 0x60++0xB
|
|
line.long 0x0 "CC0_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC0_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC0_OC,No Description"
|
|
hexmask.long 0x8 0.--31. 1. "OC,Output Compare Value"
|
|
group.long 0x70++0x3
|
|
line.long 0x0 "CC0_OCB,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0x74++0x7
|
|
line.long 0x0 "CC0_ICF,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC0_ICOF,No Description"
|
|
hexmask.long 0x4 0.--31. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0x80++0xB
|
|
line.long 0x0 "CC1_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC1_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC1_OC,No Description"
|
|
hexmask.long 0x8 0.--31. 1. "OC,Output Compare Value"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "CC1_OCB,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0x94++0x7
|
|
line.long 0x0 "CC1_ICF,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC1_ICOF,No Description"
|
|
hexmask.long 0x4 0.--31. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0xA0++0xB
|
|
line.long 0x0 "CC2_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC2_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC2_OC,No Description"
|
|
hexmask.long 0x8 0.--31. 1. "OC,Output Compare Value"
|
|
group.long 0xB0++0x3
|
|
line.long 0x0 "CC2_OCB,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0xB4++0x7
|
|
line.long 0x0 "CC2_ICF,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC2_ICOF,No Description"
|
|
hexmask.long 0x4 0.--31. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0xE0++0x13
|
|
line.long 0x0 "DTCFG,No Description"
|
|
bitfld.long 0x0 11. "DTPRSEN,DTI PRS Source Enable" "0,1"
|
|
bitfld.long 0x0 10. "DTFATS,DTI Fault Action on Timer Stop" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "DTAR,DTI Always Run" "0,1"
|
|
bitfld.long 0x0 1. "DTDAS,DTI Automatic Start-up Functionality" "0: No DTI restart on debugger exit,1: DTI restart on debugger exit"
|
|
newline
|
|
bitfld.long 0x0 0. "DTEN,DTI Enable" "0,1"
|
|
line.long 0x4 "DTTIMECFG,No Description"
|
|
hexmask.long.byte 0x4 16.--21. 1. "DTFALLT,DTI Fall-time"
|
|
hexmask.long.byte 0x4 10.--15. 1. "DTRISET,DTI Rise-time"
|
|
newline
|
|
hexmask.long.word 0x4 0.--9. 1. "DTPRESC,DTI Prescaler Setting"
|
|
line.long 0x8 "DTFCFG,No Description"
|
|
bitfld.long 0x8 28. "DTEM23FEN,DTI EM23 Fault Enable" "0,1"
|
|
bitfld.long 0x8 27. "DTLOCKUPFEN,DTI Lockup Fault Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 26. "DTDBGFEN,DTI Debugger Fault Enable" "0,1"
|
|
bitfld.long 0x8 25. "DTPRS1FEN,DTI PRS 1 Fault Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 24. "DTPRS0FEN,DTI PRS 0 Fault Enable" "0,1"
|
|
bitfld.long 0x8 16.--17. "DTFA,DTI Fault Action" "0: No action on fault,1: Set outputs inactive,2: Clear outputs,3: Tristate outputs"
|
|
line.long 0xC "DTCTRL,No Description"
|
|
bitfld.long 0xC 1. "DTIPOL,DTI Inactive Polarity" "0,1"
|
|
bitfld.long 0xC 0. "DTCINV,DTI Complementary Output Invert." "0,1"
|
|
line.long 0x10 "DTOGEN,No Description"
|
|
bitfld.long 0x10 5. "DTOGCDTI2EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 4. "DTOGCDTI1EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x10 3. "DTOGCDTI0EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 2. "DTOGCC2EN,DTI CCn Output Generation Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x10 1. "DTOGCC1EN,DTI CCn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 0. "DTOGCC0EN,DTI CCn Output Generation Enable" "0,1"
|
|
rgroup.long 0xF4++0x3
|
|
line.long 0x0 "DTFAULT,No Description"
|
|
bitfld.long 0x0 4. "DTEM23F,DTI EM23 Entry Fault" "0,1"
|
|
bitfld.long 0x0 3. "DTLOCKUPF,DTI Lockup Fault" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DTDBGF,DTI Debugger Fault" "0,1"
|
|
bitfld.long 0x0 1. "DTPRS1F,DTI PRS 1 Fault" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DTPRS0F,DTI PRS 0 Fault" "0,1"
|
|
wgroup.long 0xF8++0x7
|
|
line.long 0x0 "DTFAULTC,No Description"
|
|
bitfld.long 0x0 4. "DTEM23FC,DTI EM23 Fault Clear" "0,1"
|
|
bitfld.long 0x0 3. "DTLOCKUPFC,DTI Lockup Fault Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DTDBGFC,DTI Debugger Fault Clear" "0,1"
|
|
bitfld.long 0x0 1. "DTPRS1FC,DTI PRS1 Fault Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DTPRS0FC,DTI PRS0 Fault Clear" "0,1"
|
|
line.long 0x4 "DTLOCK,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "DTILOCKKEY,DTI Lock Key"
|
|
tree.end
|
|
tree "TIMER1_NS"
|
|
base ad:0x5004C000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version ID"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "CFG,No Description"
|
|
hexmask.long.word 0x0 18.--27. 1. "PRESC,Prescaler Setting"
|
|
bitfld.long 0x0 17. "RSSCOIST,Reload-Start Sets COIST" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "ATI,Always Track Inputs" "0,1"
|
|
bitfld.long 0x0 12. "RETIMESEL,PWM output retime select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "DISSYNCOUT,Disable Timer Start/Stop/Reload output" "0: Timer can start/stop/reload other timers with..,1: Timer cannot start/stop/reload other timers with.."
|
|
bitfld.long 0x0 10. "RETIMEEN,PWM output retimed enable" "0: PWM outputs are not re-timed.,1: PWM outputs are re-timed."
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CLKSEL,Clock Source Select" "0: Prescaled EM01GRPACLK,1: Compare/Capture Channel 1 Input,2: Timer is clocked by underflow(down-count) or..,?"
|
|
bitfld.long 0x0 7. "DMACLRACT,DMA Request Clear on Active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "DEBUGRUN,Debug Mode Run Enable" "0: Timer is halted in debug mode,1: Timer is running in debug mode"
|
|
bitfld.long 0x0 5. "QDM,Quadrature Decoder Mode Selection" "0: X2 mode selected,1: X4 mode selected"
|
|
newline
|
|
bitfld.long 0x0 4. "OSMEN,One-shot Mode Enable" "0,1"
|
|
bitfld.long 0x0 3. "SYNC,Timer Start/Stop/Reload Synchronization" "0: Timer operation is unaffected by other timers.,1: Timer may be started stopped and re-loaded from.."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "MODE,Timer Mode" "0: Up-count mode,1: Down-count mode,2: Up/down-count mode,3: Quadrature decoder mode"
|
|
line.long 0x4 "CTRL,No Description"
|
|
bitfld.long 0x4 4. "X2CNT,2x Count Mode" "0,1"
|
|
bitfld.long 0x4 2.--3. "FALLA,Timer Falling Input Edge Action" "0: No action,1: Start counter without reload,2: Stop counter without reload,3: Reload and start counter"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "RISEA,Timer Rising Input Edge Action" "0: No action,1: Start counter without reload,2: Stop counter without reload,3: Reload and start counter"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 1. "STOP,Stop Timer" "0,1"
|
|
bitfld.long 0x0 0. "START,Start Timer" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 26. "CCPOL2,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
bitfld.long 0x0 25. "CCPOL1,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
newline
|
|
bitfld.long 0x0 24. "CCPOL0,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
bitfld.long 0x0 18. "ICFEMPTY2,Input capture fifo empty" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "ICFEMPTY1,Input capture fifo empty" "0,1"
|
|
bitfld.long 0x0 16. "ICFEMPTY0,Input capture fifo empty" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "OCBV2,Output Compare Buffer Valid" "0,1"
|
|
bitfld.long 0x0 9. "OCBV1,Output Compare Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "OCBV0,Output Compare Buffer Valid" "0,1"
|
|
bitfld.long 0x0 6. "SYNCBUSY,Sync Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "DTILOCKSTATUS,DTI lock status" "0: DTI registers are unlocked,1: DTI registers are locked"
|
|
bitfld.long 0x0 4. "TIMERLOCKSTATUS,Timer lock status" "0: TIMER registers are unlocked,1: TIMER registers are locked"
|
|
newline
|
|
bitfld.long 0x0 2. "TOPBV,TOP Buffer Valid" "0,1"
|
|
bitfld.long 0x0 1. "DIR,Direction" "0: Counting up,1: Counting down"
|
|
newline
|
|
bitfld.long 0x0 0. "RUNNING,Running" "0,1"
|
|
group.long 0x14++0x13
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 26. "ICFUF2,Input capture FIFO underflow" "0,1"
|
|
bitfld.long 0x0 25. "ICFUF1,Input capture FIFO underflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "ICFUF0,Input capture FIFO underflow" "0,1"
|
|
bitfld.long 0x0 22. "ICFOF2,Input Capture FIFO overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "ICFOF1,Input Capture FIFO overflow" "0,1"
|
|
bitfld.long 0x0 20. "ICFOF0,Input Capture FIFO overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "ICFWLFULL2,Input Capture Watermark Level Full" "0,1"
|
|
bitfld.long 0x0 17. "ICFWLFULL1,Input Capture Watermark Level Full" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "ICFWLFULL0,Input Capture Watermark Level Full" "0,1"
|
|
bitfld.long 0x0 6. "CC2,Capture Compare Channel 2 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "CC1,Capture Compare Channel 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 4. "CC0,Capture Compare Channel 0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DIRCHG,Direction Change Detect Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 1. "UF,Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "OF,Overflow Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 26. "ICFUF2,ICFUF2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 25. "ICFUF1,ICFUF1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "ICFUF0,ICFUF0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 22. "ICFOF2,ICFOF2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "ICFOF1,ICFOF1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 20. "ICFOF0,ICFOF0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "ICFWLFULL2,ICFWLFULL2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 17. "ICFWLFULL1,ICFWLFULL1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "ICFWLFULL0,ICFWLFULL0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 6. "CC2,CC2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "CC1,CC1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 4. "CC0,CC0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "DIRCHG,Direction Change Detect Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 1. "UF,Underflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "OF,Overflow Interrupt Enable" "0,1"
|
|
line.long 0x8 "TOP,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "TOP,Counter Top Value"
|
|
line.long 0xC "TOPB,No Description"
|
|
hexmask.long.word 0xC 0.--15. 1. "TOPB,Counter Top Buffer Register"
|
|
line.long 0x10 "CNT,No Description"
|
|
hexmask.long.word 0x10 0.--15. 1. "CNT,Counter Value"
|
|
wgroup.long 0x2C++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Timer Lock Key"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,Timer Module Enable" "0,1"
|
|
group.long 0x60++0xB
|
|
line.long 0x0 "CC0_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC0_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC0_OC,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "OC,Output Compare Value"
|
|
group.long 0x70++0x3
|
|
line.long 0x0 "CC0_OCB,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0x74++0x7
|
|
line.long 0x0 "CC0_ICF,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC0_ICOF,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0x80++0xB
|
|
line.long 0x0 "CC1_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC1_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC1_OC,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "OC,Output Compare Value"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "CC1_OCB,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0x94++0x7
|
|
line.long 0x0 "CC1_ICF,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC1_ICOF,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0xA0++0xB
|
|
line.long 0x0 "CC2_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC2_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC2_OC,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "OC,Output Compare Value"
|
|
group.long 0xB0++0x3
|
|
line.long 0x0 "CC2_OCB,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0xB4++0x7
|
|
line.long 0x0 "CC2_ICF,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC2_ICOF,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0xE0++0x13
|
|
line.long 0x0 "DTCFG,No Description"
|
|
bitfld.long 0x0 11. "DTPRSEN,DTI PRS Source Enable" "0,1"
|
|
bitfld.long 0x0 10. "DTFATS,DTI Fault Action on Timer Stop" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "DTAR,DTI Always Run" "0,1"
|
|
bitfld.long 0x0 1. "DTDAS,DTI Automatic Start-up Functionality" "0: No DTI restart on debugger exit,1: DTI restart on debugger exit"
|
|
newline
|
|
bitfld.long 0x0 0. "DTEN,DTI Enable" "0,1"
|
|
line.long 0x4 "DTTIMECFG,No Description"
|
|
hexmask.long.byte 0x4 16.--21. 1. "DTFALLT,DTI Fall-time"
|
|
hexmask.long.byte 0x4 10.--15. 1. "DTRISET,DTI Rise-time"
|
|
newline
|
|
hexmask.long.word 0x4 0.--9. 1. "DTPRESC,DTI Prescaler Setting"
|
|
line.long 0x8 "DTFCFG,No Description"
|
|
bitfld.long 0x8 28. "DTEM23FEN,DTI EM23 Fault Enable" "0,1"
|
|
bitfld.long 0x8 27. "DTLOCKUPFEN,DTI Lockup Fault Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 26. "DTDBGFEN,DTI Debugger Fault Enable" "0,1"
|
|
bitfld.long 0x8 25. "DTPRS1FEN,DTI PRS 1 Fault Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 24. "DTPRS0FEN,DTI PRS 0 Fault Enable" "0,1"
|
|
bitfld.long 0x8 16.--17. "DTFA,DTI Fault Action" "0: No action on fault,1: Set outputs inactive,2: Clear outputs,3: Tristate outputs"
|
|
line.long 0xC "DTCTRL,No Description"
|
|
bitfld.long 0xC 1. "DTIPOL,DTI Inactive Polarity" "0,1"
|
|
bitfld.long 0xC 0. "DTCINV,DTI Complementary Output Invert." "0,1"
|
|
line.long 0x10 "DTOGEN,No Description"
|
|
bitfld.long 0x10 5. "DTOGCDTI2EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 4. "DTOGCDTI1EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x10 3. "DTOGCDTI0EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 2. "DTOGCC2EN,DTI CCn Output Generation Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x10 1. "DTOGCC1EN,DTI CCn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 0. "DTOGCC0EN,DTI CCn Output Generation Enable" "0,1"
|
|
rgroup.long 0xF4++0x3
|
|
line.long 0x0 "DTFAULT,No Description"
|
|
bitfld.long 0x0 4. "DTEM23F,DTI EM23 Entry Fault" "0,1"
|
|
bitfld.long 0x0 3. "DTLOCKUPF,DTI Lockup Fault" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DTDBGF,DTI Debugger Fault" "0,1"
|
|
bitfld.long 0x0 1. "DTPRS1F,DTI PRS 1 Fault" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DTPRS0F,DTI PRS 0 Fault" "0,1"
|
|
wgroup.long 0xF8++0x7
|
|
line.long 0x0 "DTFAULTC,No Description"
|
|
bitfld.long 0x0 4. "DTEM23FC,DTI EM23 Fault Clear" "0,1"
|
|
bitfld.long 0x0 3. "DTLOCKUPFC,DTI Lockup Fault Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DTDBGFC,DTI Debugger Fault Clear" "0,1"
|
|
bitfld.long 0x0 1. "DTPRS1FC,DTI PRS1 Fault Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DTPRS0FC,DTI PRS0 Fault Clear" "0,1"
|
|
line.long 0x4 "DTLOCK,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "DTILOCKKEY,DTI Lock Key"
|
|
tree.end
|
|
tree "TIMER1_S"
|
|
base ad:0x4004C000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version ID"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "CFG,No Description"
|
|
hexmask.long.word 0x0 18.--27. 1. "PRESC,Prescaler Setting"
|
|
bitfld.long 0x0 17. "RSSCOIST,Reload-Start Sets COIST" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "ATI,Always Track Inputs" "0,1"
|
|
bitfld.long 0x0 12. "RETIMESEL,PWM output retime select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "DISSYNCOUT,Disable Timer Start/Stop/Reload output" "0: Timer can start/stop/reload other timers with..,1: Timer cannot start/stop/reload other timers with.."
|
|
bitfld.long 0x0 10. "RETIMEEN,PWM output retimed enable" "0: PWM outputs are not re-timed.,1: PWM outputs are re-timed."
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CLKSEL,Clock Source Select" "0: Prescaled EM01GRPACLK,1: Compare/Capture Channel 1 Input,2: Timer is clocked by underflow(down-count) or..,?"
|
|
bitfld.long 0x0 7. "DMACLRACT,DMA Request Clear on Active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "DEBUGRUN,Debug Mode Run Enable" "0: Timer is halted in debug mode,1: Timer is running in debug mode"
|
|
bitfld.long 0x0 5. "QDM,Quadrature Decoder Mode Selection" "0: X2 mode selected,1: X4 mode selected"
|
|
newline
|
|
bitfld.long 0x0 4. "OSMEN,One-shot Mode Enable" "0,1"
|
|
bitfld.long 0x0 3. "SYNC,Timer Start/Stop/Reload Synchronization" "0: Timer operation is unaffected by other timers.,1: Timer may be started stopped and re-loaded from.."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "MODE,Timer Mode" "0: Up-count mode,1: Down-count mode,2: Up/down-count mode,3: Quadrature decoder mode"
|
|
line.long 0x4 "CTRL,No Description"
|
|
bitfld.long 0x4 4. "X2CNT,2x Count Mode" "0,1"
|
|
bitfld.long 0x4 2.--3. "FALLA,Timer Falling Input Edge Action" "0: No action,1: Start counter without reload,2: Stop counter without reload,3: Reload and start counter"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "RISEA,Timer Rising Input Edge Action" "0: No action,1: Start counter without reload,2: Stop counter without reload,3: Reload and start counter"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 1. "STOP,Stop Timer" "0,1"
|
|
bitfld.long 0x0 0. "START,Start Timer" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 26. "CCPOL2,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
bitfld.long 0x0 25. "CCPOL1,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
newline
|
|
bitfld.long 0x0 24. "CCPOL0,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
bitfld.long 0x0 18. "ICFEMPTY2,Input capture fifo empty" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "ICFEMPTY1,Input capture fifo empty" "0,1"
|
|
bitfld.long 0x0 16. "ICFEMPTY0,Input capture fifo empty" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "OCBV2,Output Compare Buffer Valid" "0,1"
|
|
bitfld.long 0x0 9. "OCBV1,Output Compare Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "OCBV0,Output Compare Buffer Valid" "0,1"
|
|
bitfld.long 0x0 6. "SYNCBUSY,Sync Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "DTILOCKSTATUS,DTI lock status" "0: DTI registers are unlocked,1: DTI registers are locked"
|
|
bitfld.long 0x0 4. "TIMERLOCKSTATUS,Timer lock status" "0: TIMER registers are unlocked,1: TIMER registers are locked"
|
|
newline
|
|
bitfld.long 0x0 2. "TOPBV,TOP Buffer Valid" "0,1"
|
|
bitfld.long 0x0 1. "DIR,Direction" "0: Counting up,1: Counting down"
|
|
newline
|
|
bitfld.long 0x0 0. "RUNNING,Running" "0,1"
|
|
group.long 0x14++0x13
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 26. "ICFUF2,Input capture FIFO underflow" "0,1"
|
|
bitfld.long 0x0 25. "ICFUF1,Input capture FIFO underflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "ICFUF0,Input capture FIFO underflow" "0,1"
|
|
bitfld.long 0x0 22. "ICFOF2,Input Capture FIFO overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "ICFOF1,Input Capture FIFO overflow" "0,1"
|
|
bitfld.long 0x0 20. "ICFOF0,Input Capture FIFO overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "ICFWLFULL2,Input Capture Watermark Level Full" "0,1"
|
|
bitfld.long 0x0 17. "ICFWLFULL1,Input Capture Watermark Level Full" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "ICFWLFULL0,Input Capture Watermark Level Full" "0,1"
|
|
bitfld.long 0x0 6. "CC2,Capture Compare Channel 2 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "CC1,Capture Compare Channel 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 4. "CC0,Capture Compare Channel 0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DIRCHG,Direction Change Detect Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 1. "UF,Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "OF,Overflow Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 26. "ICFUF2,ICFUF2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 25. "ICFUF1,ICFUF1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "ICFUF0,ICFUF0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 22. "ICFOF2,ICFOF2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "ICFOF1,ICFOF1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 20. "ICFOF0,ICFOF0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "ICFWLFULL2,ICFWLFULL2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 17. "ICFWLFULL1,ICFWLFULL1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "ICFWLFULL0,ICFWLFULL0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 6. "CC2,CC2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "CC1,CC1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 4. "CC0,CC0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "DIRCHG,Direction Change Detect Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 1. "UF,Underflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "OF,Overflow Interrupt Enable" "0,1"
|
|
line.long 0x8 "TOP,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "TOP,Counter Top Value"
|
|
line.long 0xC "TOPB,No Description"
|
|
hexmask.long.word 0xC 0.--15. 1. "TOPB,Counter Top Buffer Register"
|
|
line.long 0x10 "CNT,No Description"
|
|
hexmask.long.word 0x10 0.--15. 1. "CNT,Counter Value"
|
|
wgroup.long 0x2C++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Timer Lock Key"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,Timer Module Enable" "0,1"
|
|
group.long 0x60++0xB
|
|
line.long 0x0 "CC0_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC0_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC0_OC,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "OC,Output Compare Value"
|
|
group.long 0x70++0x3
|
|
line.long 0x0 "CC0_OCB,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0x74++0x7
|
|
line.long 0x0 "CC0_ICF,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC0_ICOF,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0x80++0xB
|
|
line.long 0x0 "CC1_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC1_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC1_OC,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "OC,Output Compare Value"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "CC1_OCB,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0x94++0x7
|
|
line.long 0x0 "CC1_ICF,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC1_ICOF,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0xA0++0xB
|
|
line.long 0x0 "CC2_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC2_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC2_OC,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "OC,Output Compare Value"
|
|
group.long 0xB0++0x3
|
|
line.long 0x0 "CC2_OCB,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0xB4++0x7
|
|
line.long 0x0 "CC2_ICF,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC2_ICOF,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0xE0++0x13
|
|
line.long 0x0 "DTCFG,No Description"
|
|
bitfld.long 0x0 11. "DTPRSEN,DTI PRS Source Enable" "0,1"
|
|
bitfld.long 0x0 10. "DTFATS,DTI Fault Action on Timer Stop" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "DTAR,DTI Always Run" "0,1"
|
|
bitfld.long 0x0 1. "DTDAS,DTI Automatic Start-up Functionality" "0: No DTI restart on debugger exit,1: DTI restart on debugger exit"
|
|
newline
|
|
bitfld.long 0x0 0. "DTEN,DTI Enable" "0,1"
|
|
line.long 0x4 "DTTIMECFG,No Description"
|
|
hexmask.long.byte 0x4 16.--21. 1. "DTFALLT,DTI Fall-time"
|
|
hexmask.long.byte 0x4 10.--15. 1. "DTRISET,DTI Rise-time"
|
|
newline
|
|
hexmask.long.word 0x4 0.--9. 1. "DTPRESC,DTI Prescaler Setting"
|
|
line.long 0x8 "DTFCFG,No Description"
|
|
bitfld.long 0x8 28. "DTEM23FEN,DTI EM23 Fault Enable" "0,1"
|
|
bitfld.long 0x8 27. "DTLOCKUPFEN,DTI Lockup Fault Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 26. "DTDBGFEN,DTI Debugger Fault Enable" "0,1"
|
|
bitfld.long 0x8 25. "DTPRS1FEN,DTI PRS 1 Fault Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 24. "DTPRS0FEN,DTI PRS 0 Fault Enable" "0,1"
|
|
bitfld.long 0x8 16.--17. "DTFA,DTI Fault Action" "0: No action on fault,1: Set outputs inactive,2: Clear outputs,3: Tristate outputs"
|
|
line.long 0xC "DTCTRL,No Description"
|
|
bitfld.long 0xC 1. "DTIPOL,DTI Inactive Polarity" "0,1"
|
|
bitfld.long 0xC 0. "DTCINV,DTI Complementary Output Invert." "0,1"
|
|
line.long 0x10 "DTOGEN,No Description"
|
|
bitfld.long 0x10 5. "DTOGCDTI2EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 4. "DTOGCDTI1EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x10 3. "DTOGCDTI0EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 2. "DTOGCC2EN,DTI CCn Output Generation Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x10 1. "DTOGCC1EN,DTI CCn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 0. "DTOGCC0EN,DTI CCn Output Generation Enable" "0,1"
|
|
rgroup.long 0xF4++0x3
|
|
line.long 0x0 "DTFAULT,No Description"
|
|
bitfld.long 0x0 4. "DTEM23F,DTI EM23 Entry Fault" "0,1"
|
|
bitfld.long 0x0 3. "DTLOCKUPF,DTI Lockup Fault" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DTDBGF,DTI Debugger Fault" "0,1"
|
|
bitfld.long 0x0 1. "DTPRS1F,DTI PRS 1 Fault" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DTPRS0F,DTI PRS 0 Fault" "0,1"
|
|
wgroup.long 0xF8++0x7
|
|
line.long 0x0 "DTFAULTC,No Description"
|
|
bitfld.long 0x0 4. "DTEM23FC,DTI EM23 Fault Clear" "0,1"
|
|
bitfld.long 0x0 3. "DTLOCKUPFC,DTI Lockup Fault Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DTDBGFC,DTI Debugger Fault Clear" "0,1"
|
|
bitfld.long 0x0 1. "DTPRS1FC,DTI PRS1 Fault Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DTPRS0FC,DTI PRS0 Fault Clear" "0,1"
|
|
line.long 0x4 "DTLOCK,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "DTILOCKKEY,DTI Lock Key"
|
|
tree.end
|
|
tree "TIMER2_NS"
|
|
base ad:0x50050000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version ID"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "CFG,No Description"
|
|
hexmask.long.word 0x0 18.--27. 1. "PRESC,Prescaler Setting"
|
|
bitfld.long 0x0 17. "RSSCOIST,Reload-Start Sets COIST" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "ATI,Always Track Inputs" "0,1"
|
|
bitfld.long 0x0 12. "RETIMESEL,PWM output retime select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "DISSYNCOUT,Disable Timer Start/Stop/Reload output" "0: Timer can start/stop/reload other timers with..,1: Timer cannot start/stop/reload other timers with.."
|
|
bitfld.long 0x0 10. "RETIMEEN,PWM output retimed enable" "0: PWM outputs are not re-timed.,1: PWM outputs are re-timed."
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CLKSEL,Clock Source Select" "0: Prescaled EM01GRPACLK,1: Compare/Capture Channel 1 Input,2: Timer is clocked by underflow(down-count) or..,?"
|
|
bitfld.long 0x0 7. "DMACLRACT,DMA Request Clear on Active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "DEBUGRUN,Debug Mode Run Enable" "0: Timer is halted in debug mode,1: Timer is running in debug mode"
|
|
bitfld.long 0x0 5. "QDM,Quadrature Decoder Mode Selection" "0: X2 mode selected,1: X4 mode selected"
|
|
newline
|
|
bitfld.long 0x0 4. "OSMEN,One-shot Mode Enable" "0,1"
|
|
bitfld.long 0x0 3. "SYNC,Timer Start/Stop/Reload Synchronization" "0: Timer operation is unaffected by other timers.,1: Timer may be started stopped and re-loaded from.."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "MODE,Timer Mode" "0: Up-count mode,1: Down-count mode,2: Up/down-count mode,3: Quadrature decoder mode"
|
|
line.long 0x4 "CTRL,No Description"
|
|
bitfld.long 0x4 4. "X2CNT,2x Count Mode" "0,1"
|
|
bitfld.long 0x4 2.--3. "FALLA,Timer Falling Input Edge Action" "0: No action,1: Start counter without reload,2: Stop counter without reload,3: Reload and start counter"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "RISEA,Timer Rising Input Edge Action" "0: No action,1: Start counter without reload,2: Stop counter without reload,3: Reload and start counter"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 1. "STOP,Stop Timer" "0,1"
|
|
bitfld.long 0x0 0. "START,Start Timer" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 26. "CCPOL2,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
bitfld.long 0x0 25. "CCPOL1,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
newline
|
|
bitfld.long 0x0 24. "CCPOL0,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
bitfld.long 0x0 18. "ICFEMPTY2,Input capture fifo empty" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "ICFEMPTY1,Input capture fifo empty" "0,1"
|
|
bitfld.long 0x0 16. "ICFEMPTY0,Input capture fifo empty" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "OCBV2,Output Compare Buffer Valid" "0,1"
|
|
bitfld.long 0x0 9. "OCBV1,Output Compare Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "OCBV0,Output Compare Buffer Valid" "0,1"
|
|
bitfld.long 0x0 6. "SYNCBUSY,Sync Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "DTILOCKSTATUS,DTI lock status" "0: DTI registers are unlocked,1: DTI registers are locked"
|
|
bitfld.long 0x0 4. "TIMERLOCKSTATUS,Timer lock status" "0: TIMER registers are unlocked,1: TIMER registers are locked"
|
|
newline
|
|
bitfld.long 0x0 2. "TOPBV,TOP Buffer Valid" "0,1"
|
|
bitfld.long 0x0 1. "DIR,Direction" "0: Counting up,1: Counting down"
|
|
newline
|
|
bitfld.long 0x0 0. "RUNNING,Running" "0,1"
|
|
group.long 0x14++0x13
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 26. "ICFUF2,Input capture FIFO underflow" "0,1"
|
|
bitfld.long 0x0 25. "ICFUF1,Input capture FIFO underflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "ICFUF0,Input capture FIFO underflow" "0,1"
|
|
bitfld.long 0x0 22. "ICFOF2,Input Capture FIFO overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "ICFOF1,Input Capture FIFO overflow" "0,1"
|
|
bitfld.long 0x0 20. "ICFOF0,Input Capture FIFO overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "ICFWLFULL2,Input Capture Watermark Level Full" "0,1"
|
|
bitfld.long 0x0 17. "ICFWLFULL1,Input Capture Watermark Level Full" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "ICFWLFULL0,Input Capture Watermark Level Full" "0,1"
|
|
bitfld.long 0x0 6. "CC2,Capture Compare Channel 2 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "CC1,Capture Compare Channel 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 4. "CC0,Capture Compare Channel 0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DIRCHG,Direction Change Detect Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 1. "UF,Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "OF,Overflow Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 26. "ICFUF2,ICFUF2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 25. "ICFUF1,ICFUF1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "ICFUF0,ICFUF0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 22. "ICFOF2,ICFOF2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "ICFOF1,ICFOF1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 20. "ICFOF0,ICFOF0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "ICFWLFULL2,ICFWLFULL2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 17. "ICFWLFULL1,ICFWLFULL1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "ICFWLFULL0,ICFWLFULL0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 6. "CC2,CC2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "CC1,CC1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 4. "CC0,CC0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "DIRCHG,Direction Change Detect Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 1. "UF,Underflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "OF,Overflow Interrupt Enable" "0,1"
|
|
line.long 0x8 "TOP,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "TOP,Counter Top Value"
|
|
line.long 0xC "TOPB,No Description"
|
|
hexmask.long.word 0xC 0.--15. 1. "TOPB,Counter Top Buffer Register"
|
|
line.long 0x10 "CNT,No Description"
|
|
hexmask.long.word 0x10 0.--15. 1. "CNT,Counter Value"
|
|
wgroup.long 0x2C++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Timer Lock Key"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,Timer Module Enable" "0,1"
|
|
group.long 0x60++0xB
|
|
line.long 0x0 "CC0_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC0_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC0_OC,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "OC,Output Compare Value"
|
|
group.long 0x70++0x3
|
|
line.long 0x0 "CC0_OCB,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0x74++0x7
|
|
line.long 0x0 "CC0_ICF,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC0_ICOF,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0x80++0xB
|
|
line.long 0x0 "CC1_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC1_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC1_OC,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "OC,Output Compare Value"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "CC1_OCB,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0x94++0x7
|
|
line.long 0x0 "CC1_ICF,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC1_ICOF,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0xA0++0xB
|
|
line.long 0x0 "CC2_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC2_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC2_OC,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "OC,Output Compare Value"
|
|
group.long 0xB0++0x3
|
|
line.long 0x0 "CC2_OCB,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0xB4++0x7
|
|
line.long 0x0 "CC2_ICF,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC2_ICOF,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0xE0++0x13
|
|
line.long 0x0 "DTCFG,No Description"
|
|
bitfld.long 0x0 11. "DTPRSEN,DTI PRS Source Enable" "0,1"
|
|
bitfld.long 0x0 10. "DTFATS,DTI Fault Action on Timer Stop" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "DTAR,DTI Always Run" "0,1"
|
|
bitfld.long 0x0 1. "DTDAS,DTI Automatic Start-up Functionality" "0: No DTI restart on debugger exit,1: DTI restart on debugger exit"
|
|
newline
|
|
bitfld.long 0x0 0. "DTEN,DTI Enable" "0,1"
|
|
line.long 0x4 "DTTIMECFG,No Description"
|
|
hexmask.long.byte 0x4 16.--21. 1. "DTFALLT,DTI Fall-time"
|
|
hexmask.long.byte 0x4 10.--15. 1. "DTRISET,DTI Rise-time"
|
|
newline
|
|
hexmask.long.word 0x4 0.--9. 1. "DTPRESC,DTI Prescaler Setting"
|
|
line.long 0x8 "DTFCFG,No Description"
|
|
bitfld.long 0x8 28. "DTEM23FEN,DTI EM23 Fault Enable" "0,1"
|
|
bitfld.long 0x8 27. "DTLOCKUPFEN,DTI Lockup Fault Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 26. "DTDBGFEN,DTI Debugger Fault Enable" "0,1"
|
|
bitfld.long 0x8 25. "DTPRS1FEN,DTI PRS 1 Fault Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 24. "DTPRS0FEN,DTI PRS 0 Fault Enable" "0,1"
|
|
bitfld.long 0x8 16.--17. "DTFA,DTI Fault Action" "0: No action on fault,1: Set outputs inactive,2: Clear outputs,3: Tristate outputs"
|
|
line.long 0xC "DTCTRL,No Description"
|
|
bitfld.long 0xC 1. "DTIPOL,DTI Inactive Polarity" "0,1"
|
|
bitfld.long 0xC 0. "DTCINV,DTI Complementary Output Invert." "0,1"
|
|
line.long 0x10 "DTOGEN,No Description"
|
|
bitfld.long 0x10 5. "DTOGCDTI2EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 4. "DTOGCDTI1EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x10 3. "DTOGCDTI0EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 2. "DTOGCC2EN,DTI CCn Output Generation Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x10 1. "DTOGCC1EN,DTI CCn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 0. "DTOGCC0EN,DTI CCn Output Generation Enable" "0,1"
|
|
rgroup.long 0xF4++0x3
|
|
line.long 0x0 "DTFAULT,No Description"
|
|
bitfld.long 0x0 4. "DTEM23F,DTI EM23 Entry Fault" "0,1"
|
|
bitfld.long 0x0 3. "DTLOCKUPF,DTI Lockup Fault" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DTDBGF,DTI Debugger Fault" "0,1"
|
|
bitfld.long 0x0 1. "DTPRS1F,DTI PRS 1 Fault" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DTPRS0F,DTI PRS 0 Fault" "0,1"
|
|
wgroup.long 0xF8++0x7
|
|
line.long 0x0 "DTFAULTC,No Description"
|
|
bitfld.long 0x0 4. "DTEM23FC,DTI EM23 Fault Clear" "0,1"
|
|
bitfld.long 0x0 3. "DTLOCKUPFC,DTI Lockup Fault Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DTDBGFC,DTI Debugger Fault Clear" "0,1"
|
|
bitfld.long 0x0 1. "DTPRS1FC,DTI PRS1 Fault Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DTPRS0FC,DTI PRS0 Fault Clear" "0,1"
|
|
line.long 0x4 "DTLOCK,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "DTILOCKKEY,DTI Lock Key"
|
|
tree.end
|
|
tree "TIMER2_S"
|
|
base ad:0x40050000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version ID"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "CFG,No Description"
|
|
hexmask.long.word 0x0 18.--27. 1. "PRESC,Prescaler Setting"
|
|
bitfld.long 0x0 17. "RSSCOIST,Reload-Start Sets COIST" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "ATI,Always Track Inputs" "0,1"
|
|
bitfld.long 0x0 12. "RETIMESEL,PWM output retime select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "DISSYNCOUT,Disable Timer Start/Stop/Reload output" "0: Timer can start/stop/reload other timers with..,1: Timer cannot start/stop/reload other timers with.."
|
|
bitfld.long 0x0 10. "RETIMEEN,PWM output retimed enable" "0: PWM outputs are not re-timed.,1: PWM outputs are re-timed."
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CLKSEL,Clock Source Select" "0: Prescaled EM01GRPACLK,1: Compare/Capture Channel 1 Input,2: Timer is clocked by underflow(down-count) or..,?"
|
|
bitfld.long 0x0 7. "DMACLRACT,DMA Request Clear on Active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "DEBUGRUN,Debug Mode Run Enable" "0: Timer is halted in debug mode,1: Timer is running in debug mode"
|
|
bitfld.long 0x0 5. "QDM,Quadrature Decoder Mode Selection" "0: X2 mode selected,1: X4 mode selected"
|
|
newline
|
|
bitfld.long 0x0 4. "OSMEN,One-shot Mode Enable" "0,1"
|
|
bitfld.long 0x0 3. "SYNC,Timer Start/Stop/Reload Synchronization" "0: Timer operation is unaffected by other timers.,1: Timer may be started stopped and re-loaded from.."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "MODE,Timer Mode" "0: Up-count mode,1: Down-count mode,2: Up/down-count mode,3: Quadrature decoder mode"
|
|
line.long 0x4 "CTRL,No Description"
|
|
bitfld.long 0x4 4. "X2CNT,2x Count Mode" "0,1"
|
|
bitfld.long 0x4 2.--3. "FALLA,Timer Falling Input Edge Action" "0: No action,1: Start counter without reload,2: Stop counter without reload,3: Reload and start counter"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "RISEA,Timer Rising Input Edge Action" "0: No action,1: Start counter without reload,2: Stop counter without reload,3: Reload and start counter"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 1. "STOP,Stop Timer" "0,1"
|
|
bitfld.long 0x0 0. "START,Start Timer" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 26. "CCPOL2,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
bitfld.long 0x0 25. "CCPOL1,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
newline
|
|
bitfld.long 0x0 24. "CCPOL0,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
bitfld.long 0x0 18. "ICFEMPTY2,Input capture fifo empty" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "ICFEMPTY1,Input capture fifo empty" "0,1"
|
|
bitfld.long 0x0 16. "ICFEMPTY0,Input capture fifo empty" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "OCBV2,Output Compare Buffer Valid" "0,1"
|
|
bitfld.long 0x0 9. "OCBV1,Output Compare Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "OCBV0,Output Compare Buffer Valid" "0,1"
|
|
bitfld.long 0x0 6. "SYNCBUSY,Sync Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "DTILOCKSTATUS,DTI lock status" "0: DTI registers are unlocked,1: DTI registers are locked"
|
|
bitfld.long 0x0 4. "TIMERLOCKSTATUS,Timer lock status" "0: TIMER registers are unlocked,1: TIMER registers are locked"
|
|
newline
|
|
bitfld.long 0x0 2. "TOPBV,TOP Buffer Valid" "0,1"
|
|
bitfld.long 0x0 1. "DIR,Direction" "0: Counting up,1: Counting down"
|
|
newline
|
|
bitfld.long 0x0 0. "RUNNING,Running" "0,1"
|
|
group.long 0x14++0x13
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 26. "ICFUF2,Input capture FIFO underflow" "0,1"
|
|
bitfld.long 0x0 25. "ICFUF1,Input capture FIFO underflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "ICFUF0,Input capture FIFO underflow" "0,1"
|
|
bitfld.long 0x0 22. "ICFOF2,Input Capture FIFO overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "ICFOF1,Input Capture FIFO overflow" "0,1"
|
|
bitfld.long 0x0 20. "ICFOF0,Input Capture FIFO overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "ICFWLFULL2,Input Capture Watermark Level Full" "0,1"
|
|
bitfld.long 0x0 17. "ICFWLFULL1,Input Capture Watermark Level Full" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "ICFWLFULL0,Input Capture Watermark Level Full" "0,1"
|
|
bitfld.long 0x0 6. "CC2,Capture Compare Channel 2 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "CC1,Capture Compare Channel 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 4. "CC0,Capture Compare Channel 0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DIRCHG,Direction Change Detect Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 1. "UF,Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "OF,Overflow Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 26. "ICFUF2,ICFUF2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 25. "ICFUF1,ICFUF1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "ICFUF0,ICFUF0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 22. "ICFOF2,ICFOF2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "ICFOF1,ICFOF1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 20. "ICFOF0,ICFOF0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "ICFWLFULL2,ICFWLFULL2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 17. "ICFWLFULL1,ICFWLFULL1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "ICFWLFULL0,ICFWLFULL0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 6. "CC2,CC2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "CC1,CC1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 4. "CC0,CC0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "DIRCHG,Direction Change Detect Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 1. "UF,Underflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "OF,Overflow Interrupt Enable" "0,1"
|
|
line.long 0x8 "TOP,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "TOP,Counter Top Value"
|
|
line.long 0xC "TOPB,No Description"
|
|
hexmask.long.word 0xC 0.--15. 1. "TOPB,Counter Top Buffer Register"
|
|
line.long 0x10 "CNT,No Description"
|
|
hexmask.long.word 0x10 0.--15. 1. "CNT,Counter Value"
|
|
wgroup.long 0x2C++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Timer Lock Key"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,Timer Module Enable" "0,1"
|
|
group.long 0x60++0xB
|
|
line.long 0x0 "CC0_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC0_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC0_OC,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "OC,Output Compare Value"
|
|
group.long 0x70++0x3
|
|
line.long 0x0 "CC0_OCB,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0x74++0x7
|
|
line.long 0x0 "CC0_ICF,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC0_ICOF,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0x80++0xB
|
|
line.long 0x0 "CC1_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC1_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC1_OC,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "OC,Output Compare Value"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "CC1_OCB,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0x94++0x7
|
|
line.long 0x0 "CC1_ICF,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC1_ICOF,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0xA0++0xB
|
|
line.long 0x0 "CC2_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC2_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC2_OC,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "OC,Output Compare Value"
|
|
group.long 0xB0++0x3
|
|
line.long 0x0 "CC2_OCB,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0xB4++0x7
|
|
line.long 0x0 "CC2_ICF,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC2_ICOF,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0xE0++0x13
|
|
line.long 0x0 "DTCFG,No Description"
|
|
bitfld.long 0x0 11. "DTPRSEN,DTI PRS Source Enable" "0,1"
|
|
bitfld.long 0x0 10. "DTFATS,DTI Fault Action on Timer Stop" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "DTAR,DTI Always Run" "0,1"
|
|
bitfld.long 0x0 1. "DTDAS,DTI Automatic Start-up Functionality" "0: No DTI restart on debugger exit,1: DTI restart on debugger exit"
|
|
newline
|
|
bitfld.long 0x0 0. "DTEN,DTI Enable" "0,1"
|
|
line.long 0x4 "DTTIMECFG,No Description"
|
|
hexmask.long.byte 0x4 16.--21. 1. "DTFALLT,DTI Fall-time"
|
|
hexmask.long.byte 0x4 10.--15. 1. "DTRISET,DTI Rise-time"
|
|
newline
|
|
hexmask.long.word 0x4 0.--9. 1. "DTPRESC,DTI Prescaler Setting"
|
|
line.long 0x8 "DTFCFG,No Description"
|
|
bitfld.long 0x8 28. "DTEM23FEN,DTI EM23 Fault Enable" "0,1"
|
|
bitfld.long 0x8 27. "DTLOCKUPFEN,DTI Lockup Fault Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 26. "DTDBGFEN,DTI Debugger Fault Enable" "0,1"
|
|
bitfld.long 0x8 25. "DTPRS1FEN,DTI PRS 1 Fault Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 24. "DTPRS0FEN,DTI PRS 0 Fault Enable" "0,1"
|
|
bitfld.long 0x8 16.--17. "DTFA,DTI Fault Action" "0: No action on fault,1: Set outputs inactive,2: Clear outputs,3: Tristate outputs"
|
|
line.long 0xC "DTCTRL,No Description"
|
|
bitfld.long 0xC 1. "DTIPOL,DTI Inactive Polarity" "0,1"
|
|
bitfld.long 0xC 0. "DTCINV,DTI Complementary Output Invert." "0,1"
|
|
line.long 0x10 "DTOGEN,No Description"
|
|
bitfld.long 0x10 5. "DTOGCDTI2EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 4. "DTOGCDTI1EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x10 3. "DTOGCDTI0EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 2. "DTOGCC2EN,DTI CCn Output Generation Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x10 1. "DTOGCC1EN,DTI CCn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 0. "DTOGCC0EN,DTI CCn Output Generation Enable" "0,1"
|
|
rgroup.long 0xF4++0x3
|
|
line.long 0x0 "DTFAULT,No Description"
|
|
bitfld.long 0x0 4. "DTEM23F,DTI EM23 Entry Fault" "0,1"
|
|
bitfld.long 0x0 3. "DTLOCKUPF,DTI Lockup Fault" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DTDBGF,DTI Debugger Fault" "0,1"
|
|
bitfld.long 0x0 1. "DTPRS1F,DTI PRS 1 Fault" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DTPRS0F,DTI PRS 0 Fault" "0,1"
|
|
wgroup.long 0xF8++0x7
|
|
line.long 0x0 "DTFAULTC,No Description"
|
|
bitfld.long 0x0 4. "DTEM23FC,DTI EM23 Fault Clear" "0,1"
|
|
bitfld.long 0x0 3. "DTLOCKUPFC,DTI Lockup Fault Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DTDBGFC,DTI Debugger Fault Clear" "0,1"
|
|
bitfld.long 0x0 1. "DTPRS1FC,DTI PRS1 Fault Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DTPRS0FC,DTI PRS0 Fault Clear" "0,1"
|
|
line.long 0x4 "DTLOCK,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "DTILOCKKEY,DTI Lock Key"
|
|
tree.end
|
|
tree "TIMER3_NS"
|
|
base ad:0x50054000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version ID"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "CFG,No Description"
|
|
hexmask.long.word 0x0 18.--27. 1. "PRESC,Prescaler Setting"
|
|
bitfld.long 0x0 17. "RSSCOIST,Reload-Start Sets COIST" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "ATI,Always Track Inputs" "0,1"
|
|
bitfld.long 0x0 12. "RETIMESEL,PWM output retime select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "DISSYNCOUT,Disable Timer Start/Stop/Reload output" "0: Timer can start/stop/reload other timers with..,1: Timer cannot start/stop/reload other timers with.."
|
|
bitfld.long 0x0 10. "RETIMEEN,PWM output retimed enable" "0: PWM outputs are not re-timed.,1: PWM outputs are re-timed."
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CLKSEL,Clock Source Select" "0: Prescaled EM01GRPACLK,1: Compare/Capture Channel 1 Input,2: Timer is clocked by underflow(down-count) or..,?"
|
|
bitfld.long 0x0 7. "DMACLRACT,DMA Request Clear on Active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "DEBUGRUN,Debug Mode Run Enable" "0: Timer is halted in debug mode,1: Timer is running in debug mode"
|
|
bitfld.long 0x0 5. "QDM,Quadrature Decoder Mode Selection" "0: X2 mode selected,1: X4 mode selected"
|
|
newline
|
|
bitfld.long 0x0 4. "OSMEN,One-shot Mode Enable" "0,1"
|
|
bitfld.long 0x0 3. "SYNC,Timer Start/Stop/Reload Synchronization" "0: Timer operation is unaffected by other timers.,1: Timer may be started stopped and re-loaded from.."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "MODE,Timer Mode" "0: Up-count mode,1: Down-count mode,2: Up/down-count mode,3: Quadrature decoder mode"
|
|
line.long 0x4 "CTRL,No Description"
|
|
bitfld.long 0x4 4. "X2CNT,2x Count Mode" "0,1"
|
|
bitfld.long 0x4 2.--3. "FALLA,Timer Falling Input Edge Action" "0: No action,1: Start counter without reload,2: Stop counter without reload,3: Reload and start counter"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "RISEA,Timer Rising Input Edge Action" "0: No action,1: Start counter without reload,2: Stop counter without reload,3: Reload and start counter"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 1. "STOP,Stop Timer" "0,1"
|
|
bitfld.long 0x0 0. "START,Start Timer" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 26. "CCPOL2,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
bitfld.long 0x0 25. "CCPOL1,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
newline
|
|
bitfld.long 0x0 24. "CCPOL0,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
bitfld.long 0x0 18. "ICFEMPTY2,Input capture fifo empty" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "ICFEMPTY1,Input capture fifo empty" "0,1"
|
|
bitfld.long 0x0 16. "ICFEMPTY0,Input capture fifo empty" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "OCBV2,Output Compare Buffer Valid" "0,1"
|
|
bitfld.long 0x0 9. "OCBV1,Output Compare Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "OCBV0,Output Compare Buffer Valid" "0,1"
|
|
bitfld.long 0x0 6. "SYNCBUSY,Sync Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "DTILOCKSTATUS,DTI lock status" "0: DTI registers are unlocked,1: DTI registers are locked"
|
|
bitfld.long 0x0 4. "TIMERLOCKSTATUS,Timer lock status" "0: TIMER registers are unlocked,1: TIMER registers are locked"
|
|
newline
|
|
bitfld.long 0x0 2. "TOPBV,TOP Buffer Valid" "0,1"
|
|
bitfld.long 0x0 1. "DIR,Direction" "0: Counting up,1: Counting down"
|
|
newline
|
|
bitfld.long 0x0 0. "RUNNING,Running" "0,1"
|
|
group.long 0x14++0x13
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 26. "ICFUF2,Input capture FIFO underflow" "0,1"
|
|
bitfld.long 0x0 25. "ICFUF1,Input capture FIFO underflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "ICFUF0,Input capture FIFO underflow" "0,1"
|
|
bitfld.long 0x0 22. "ICFOF2,Input Capture FIFO overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "ICFOF1,Input Capture FIFO overflow" "0,1"
|
|
bitfld.long 0x0 20. "ICFOF0,Input Capture FIFO overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "ICFWLFULL2,Input Capture Watermark Level Full" "0,1"
|
|
bitfld.long 0x0 17. "ICFWLFULL1,Input Capture Watermark Level Full" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "ICFWLFULL0,Input Capture Watermark Level Full" "0,1"
|
|
bitfld.long 0x0 6. "CC2,Capture Compare Channel 2 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "CC1,Capture Compare Channel 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 4. "CC0,Capture Compare Channel 0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DIRCHG,Direction Change Detect Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 1. "UF,Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "OF,Overflow Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 26. "ICFUF2,ICFUF2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 25. "ICFUF1,ICFUF1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "ICFUF0,ICFUF0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 22. "ICFOF2,ICFOF2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "ICFOF1,ICFOF1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 20. "ICFOF0,ICFOF0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "ICFWLFULL2,ICFWLFULL2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 17. "ICFWLFULL1,ICFWLFULL1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "ICFWLFULL0,ICFWLFULL0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 6. "CC2,CC2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "CC1,CC1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 4. "CC0,CC0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "DIRCHG,Direction Change Detect Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 1. "UF,Underflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "OF,Overflow Interrupt Enable" "0,1"
|
|
line.long 0x8 "TOP,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "TOP,Counter Top Value"
|
|
line.long 0xC "TOPB,No Description"
|
|
hexmask.long.word 0xC 0.--15. 1. "TOPB,Counter Top Buffer Register"
|
|
line.long 0x10 "CNT,No Description"
|
|
hexmask.long.word 0x10 0.--15. 1. "CNT,Counter Value"
|
|
wgroup.long 0x2C++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Timer Lock Key"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,Timer Module Enable" "0,1"
|
|
group.long 0x60++0xB
|
|
line.long 0x0 "CC0_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC0_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC0_OC,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "OC,Output Compare Value"
|
|
group.long 0x70++0x3
|
|
line.long 0x0 "CC0_OCB,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0x74++0x7
|
|
line.long 0x0 "CC0_ICF,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC0_ICOF,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0x80++0xB
|
|
line.long 0x0 "CC1_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC1_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC1_OC,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "OC,Output Compare Value"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "CC1_OCB,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0x94++0x7
|
|
line.long 0x0 "CC1_ICF,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC1_ICOF,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0xA0++0xB
|
|
line.long 0x0 "CC2_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC2_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC2_OC,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "OC,Output Compare Value"
|
|
group.long 0xB0++0x3
|
|
line.long 0x0 "CC2_OCB,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0xB4++0x7
|
|
line.long 0x0 "CC2_ICF,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC2_ICOF,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0xE0++0x13
|
|
line.long 0x0 "DTCFG,No Description"
|
|
bitfld.long 0x0 11. "DTPRSEN,DTI PRS Source Enable" "0,1"
|
|
bitfld.long 0x0 10. "DTFATS,DTI Fault Action on Timer Stop" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "DTAR,DTI Always Run" "0,1"
|
|
bitfld.long 0x0 1. "DTDAS,DTI Automatic Start-up Functionality" "0: No DTI restart on debugger exit,1: DTI restart on debugger exit"
|
|
newline
|
|
bitfld.long 0x0 0. "DTEN,DTI Enable" "0,1"
|
|
line.long 0x4 "DTTIMECFG,No Description"
|
|
hexmask.long.byte 0x4 16.--21. 1. "DTFALLT,DTI Fall-time"
|
|
hexmask.long.byte 0x4 10.--15. 1. "DTRISET,DTI Rise-time"
|
|
newline
|
|
hexmask.long.word 0x4 0.--9. 1. "DTPRESC,DTI Prescaler Setting"
|
|
line.long 0x8 "DTFCFG,No Description"
|
|
bitfld.long 0x8 28. "DTEM23FEN,DTI EM23 Fault Enable" "0,1"
|
|
bitfld.long 0x8 27. "DTLOCKUPFEN,DTI Lockup Fault Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 26. "DTDBGFEN,DTI Debugger Fault Enable" "0,1"
|
|
bitfld.long 0x8 25. "DTPRS1FEN,DTI PRS 1 Fault Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 24. "DTPRS0FEN,DTI PRS 0 Fault Enable" "0,1"
|
|
bitfld.long 0x8 16.--17. "DTFA,DTI Fault Action" "0: No action on fault,1: Set outputs inactive,2: Clear outputs,3: Tristate outputs"
|
|
line.long 0xC "DTCTRL,No Description"
|
|
bitfld.long 0xC 1. "DTIPOL,DTI Inactive Polarity" "0,1"
|
|
bitfld.long 0xC 0. "DTCINV,DTI Complementary Output Invert." "0,1"
|
|
line.long 0x10 "DTOGEN,No Description"
|
|
bitfld.long 0x10 5. "DTOGCDTI2EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 4. "DTOGCDTI1EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x10 3. "DTOGCDTI0EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 2. "DTOGCC2EN,DTI CCn Output Generation Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x10 1. "DTOGCC1EN,DTI CCn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 0. "DTOGCC0EN,DTI CCn Output Generation Enable" "0,1"
|
|
rgroup.long 0xF4++0x3
|
|
line.long 0x0 "DTFAULT,No Description"
|
|
bitfld.long 0x0 4. "DTEM23F,DTI EM23 Entry Fault" "0,1"
|
|
bitfld.long 0x0 3. "DTLOCKUPF,DTI Lockup Fault" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DTDBGF,DTI Debugger Fault" "0,1"
|
|
bitfld.long 0x0 1. "DTPRS1F,DTI PRS 1 Fault" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DTPRS0F,DTI PRS 0 Fault" "0,1"
|
|
wgroup.long 0xF8++0x7
|
|
line.long 0x0 "DTFAULTC,No Description"
|
|
bitfld.long 0x0 4. "DTEM23FC,DTI EM23 Fault Clear" "0,1"
|
|
bitfld.long 0x0 3. "DTLOCKUPFC,DTI Lockup Fault Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DTDBGFC,DTI Debugger Fault Clear" "0,1"
|
|
bitfld.long 0x0 1. "DTPRS1FC,DTI PRS1 Fault Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DTPRS0FC,DTI PRS0 Fault Clear" "0,1"
|
|
line.long 0x4 "DTLOCK,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "DTILOCKKEY,DTI Lock Key"
|
|
tree.end
|
|
tree "TIMER3_S"
|
|
base ad:0x40054000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version ID"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "CFG,No Description"
|
|
hexmask.long.word 0x0 18.--27. 1. "PRESC,Prescaler Setting"
|
|
bitfld.long 0x0 17. "RSSCOIST,Reload-Start Sets COIST" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "ATI,Always Track Inputs" "0,1"
|
|
bitfld.long 0x0 12. "RETIMESEL,PWM output retime select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "DISSYNCOUT,Disable Timer Start/Stop/Reload output" "0: Timer can start/stop/reload other timers with..,1: Timer cannot start/stop/reload other timers with.."
|
|
bitfld.long 0x0 10. "RETIMEEN,PWM output retimed enable" "0: PWM outputs are not re-timed.,1: PWM outputs are re-timed."
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CLKSEL,Clock Source Select" "0: Prescaled EM01GRPACLK,1: Compare/Capture Channel 1 Input,2: Timer is clocked by underflow(down-count) or..,?"
|
|
bitfld.long 0x0 7. "DMACLRACT,DMA Request Clear on Active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "DEBUGRUN,Debug Mode Run Enable" "0: Timer is halted in debug mode,1: Timer is running in debug mode"
|
|
bitfld.long 0x0 5. "QDM,Quadrature Decoder Mode Selection" "0: X2 mode selected,1: X4 mode selected"
|
|
newline
|
|
bitfld.long 0x0 4. "OSMEN,One-shot Mode Enable" "0,1"
|
|
bitfld.long 0x0 3. "SYNC,Timer Start/Stop/Reload Synchronization" "0: Timer operation is unaffected by other timers.,1: Timer may be started stopped and re-loaded from.."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "MODE,Timer Mode" "0: Up-count mode,1: Down-count mode,2: Up/down-count mode,3: Quadrature decoder mode"
|
|
line.long 0x4 "CTRL,No Description"
|
|
bitfld.long 0x4 4. "X2CNT,2x Count Mode" "0,1"
|
|
bitfld.long 0x4 2.--3. "FALLA,Timer Falling Input Edge Action" "0: No action,1: Start counter without reload,2: Stop counter without reload,3: Reload and start counter"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "RISEA,Timer Rising Input Edge Action" "0: No action,1: Start counter without reload,2: Stop counter without reload,3: Reload and start counter"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 1. "STOP,Stop Timer" "0,1"
|
|
bitfld.long 0x0 0. "START,Start Timer" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 26. "CCPOL2,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
bitfld.long 0x0 25. "CCPOL1,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
newline
|
|
bitfld.long 0x0 24. "CCPOL0,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
bitfld.long 0x0 18. "ICFEMPTY2,Input capture fifo empty" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "ICFEMPTY1,Input capture fifo empty" "0,1"
|
|
bitfld.long 0x0 16. "ICFEMPTY0,Input capture fifo empty" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "OCBV2,Output Compare Buffer Valid" "0,1"
|
|
bitfld.long 0x0 9. "OCBV1,Output Compare Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "OCBV0,Output Compare Buffer Valid" "0,1"
|
|
bitfld.long 0x0 6. "SYNCBUSY,Sync Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "DTILOCKSTATUS,DTI lock status" "0: DTI registers are unlocked,1: DTI registers are locked"
|
|
bitfld.long 0x0 4. "TIMERLOCKSTATUS,Timer lock status" "0: TIMER registers are unlocked,1: TIMER registers are locked"
|
|
newline
|
|
bitfld.long 0x0 2. "TOPBV,TOP Buffer Valid" "0,1"
|
|
bitfld.long 0x0 1. "DIR,Direction" "0: Counting up,1: Counting down"
|
|
newline
|
|
bitfld.long 0x0 0. "RUNNING,Running" "0,1"
|
|
group.long 0x14++0x13
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 26. "ICFUF2,Input capture FIFO underflow" "0,1"
|
|
bitfld.long 0x0 25. "ICFUF1,Input capture FIFO underflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "ICFUF0,Input capture FIFO underflow" "0,1"
|
|
bitfld.long 0x0 22. "ICFOF2,Input Capture FIFO overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "ICFOF1,Input Capture FIFO overflow" "0,1"
|
|
bitfld.long 0x0 20. "ICFOF0,Input Capture FIFO overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "ICFWLFULL2,Input Capture Watermark Level Full" "0,1"
|
|
bitfld.long 0x0 17. "ICFWLFULL1,Input Capture Watermark Level Full" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "ICFWLFULL0,Input Capture Watermark Level Full" "0,1"
|
|
bitfld.long 0x0 6. "CC2,Capture Compare Channel 2 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "CC1,Capture Compare Channel 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 4. "CC0,Capture Compare Channel 0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DIRCHG,Direction Change Detect Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 1. "UF,Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "OF,Overflow Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 26. "ICFUF2,ICFUF2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 25. "ICFUF1,ICFUF1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "ICFUF0,ICFUF0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 22. "ICFOF2,ICFOF2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "ICFOF1,ICFOF1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 20. "ICFOF0,ICFOF0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "ICFWLFULL2,ICFWLFULL2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 17. "ICFWLFULL1,ICFWLFULL1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "ICFWLFULL0,ICFWLFULL0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 6. "CC2,CC2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "CC1,CC1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 4. "CC0,CC0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "DIRCHG,Direction Change Detect Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 1. "UF,Underflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "OF,Overflow Interrupt Enable" "0,1"
|
|
line.long 0x8 "TOP,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "TOP,Counter Top Value"
|
|
line.long 0xC "TOPB,No Description"
|
|
hexmask.long.word 0xC 0.--15. 1. "TOPB,Counter Top Buffer Register"
|
|
line.long 0x10 "CNT,No Description"
|
|
hexmask.long.word 0x10 0.--15. 1. "CNT,Counter Value"
|
|
wgroup.long 0x2C++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Timer Lock Key"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,Timer Module Enable" "0,1"
|
|
group.long 0x60++0xB
|
|
line.long 0x0 "CC0_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC0_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC0_OC,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "OC,Output Compare Value"
|
|
group.long 0x70++0x3
|
|
line.long 0x0 "CC0_OCB,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0x74++0x7
|
|
line.long 0x0 "CC0_ICF,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC0_ICOF,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0x80++0xB
|
|
line.long 0x0 "CC1_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC1_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC1_OC,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "OC,Output Compare Value"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "CC1_OCB,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0x94++0x7
|
|
line.long 0x0 "CC1_ICF,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC1_ICOF,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0xA0++0xB
|
|
line.long 0x0 "CC2_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC2_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC2_OC,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "OC,Output Compare Value"
|
|
group.long 0xB0++0x3
|
|
line.long 0x0 "CC2_OCB,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0xB4++0x7
|
|
line.long 0x0 "CC2_ICF,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC2_ICOF,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0xE0++0x13
|
|
line.long 0x0 "DTCFG,No Description"
|
|
bitfld.long 0x0 11. "DTPRSEN,DTI PRS Source Enable" "0,1"
|
|
bitfld.long 0x0 10. "DTFATS,DTI Fault Action on Timer Stop" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "DTAR,DTI Always Run" "0,1"
|
|
bitfld.long 0x0 1. "DTDAS,DTI Automatic Start-up Functionality" "0: No DTI restart on debugger exit,1: DTI restart on debugger exit"
|
|
newline
|
|
bitfld.long 0x0 0. "DTEN,DTI Enable" "0,1"
|
|
line.long 0x4 "DTTIMECFG,No Description"
|
|
hexmask.long.byte 0x4 16.--21. 1. "DTFALLT,DTI Fall-time"
|
|
hexmask.long.byte 0x4 10.--15. 1. "DTRISET,DTI Rise-time"
|
|
newline
|
|
hexmask.long.word 0x4 0.--9. 1. "DTPRESC,DTI Prescaler Setting"
|
|
line.long 0x8 "DTFCFG,No Description"
|
|
bitfld.long 0x8 28. "DTEM23FEN,DTI EM23 Fault Enable" "0,1"
|
|
bitfld.long 0x8 27. "DTLOCKUPFEN,DTI Lockup Fault Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 26. "DTDBGFEN,DTI Debugger Fault Enable" "0,1"
|
|
bitfld.long 0x8 25. "DTPRS1FEN,DTI PRS 1 Fault Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 24. "DTPRS0FEN,DTI PRS 0 Fault Enable" "0,1"
|
|
bitfld.long 0x8 16.--17. "DTFA,DTI Fault Action" "0: No action on fault,1: Set outputs inactive,2: Clear outputs,3: Tristate outputs"
|
|
line.long 0xC "DTCTRL,No Description"
|
|
bitfld.long 0xC 1. "DTIPOL,DTI Inactive Polarity" "0,1"
|
|
bitfld.long 0xC 0. "DTCINV,DTI Complementary Output Invert." "0,1"
|
|
line.long 0x10 "DTOGEN,No Description"
|
|
bitfld.long 0x10 5. "DTOGCDTI2EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 4. "DTOGCDTI1EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x10 3. "DTOGCDTI0EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 2. "DTOGCC2EN,DTI CCn Output Generation Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x10 1. "DTOGCC1EN,DTI CCn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 0. "DTOGCC0EN,DTI CCn Output Generation Enable" "0,1"
|
|
rgroup.long 0xF4++0x3
|
|
line.long 0x0 "DTFAULT,No Description"
|
|
bitfld.long 0x0 4. "DTEM23F,DTI EM23 Entry Fault" "0,1"
|
|
bitfld.long 0x0 3. "DTLOCKUPF,DTI Lockup Fault" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DTDBGF,DTI Debugger Fault" "0,1"
|
|
bitfld.long 0x0 1. "DTPRS1F,DTI PRS 1 Fault" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DTPRS0F,DTI PRS 0 Fault" "0,1"
|
|
wgroup.long 0xF8++0x7
|
|
line.long 0x0 "DTFAULTC,No Description"
|
|
bitfld.long 0x0 4. "DTEM23FC,DTI EM23 Fault Clear" "0,1"
|
|
bitfld.long 0x0 3. "DTLOCKUPFC,DTI Lockup Fault Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DTDBGFC,DTI Debugger Fault Clear" "0,1"
|
|
bitfld.long 0x0 1. "DTPRS1FC,DTI PRS1 Fault Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DTPRS0FC,DTI PRS0 Fault Clear" "0,1"
|
|
line.long 0x4 "DTLOCK,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "DTILOCKKEY,DTI Lock Key"
|
|
tree.end
|
|
tree "TIMER4_NS"
|
|
base ad:0x50058000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version ID"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "CFG,No Description"
|
|
hexmask.long.word 0x0 18.--27. 1. "PRESC,Prescaler Setting"
|
|
bitfld.long 0x0 17. "RSSCOIST,Reload-Start Sets COIST" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "ATI,Always Track Inputs" "0,1"
|
|
bitfld.long 0x0 12. "RETIMESEL,PWM output retime select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "DISSYNCOUT,Disable Timer Start/Stop/Reload output" "0: Timer can start/stop/reload other timers with..,1: Timer cannot start/stop/reload other timers with.."
|
|
bitfld.long 0x0 10. "RETIMEEN,PWM output retimed enable" "0: PWM outputs are not re-timed.,1: PWM outputs are re-timed."
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CLKSEL,Clock Source Select" "0: Prescaled EM01GRPACLK,1: Compare/Capture Channel 1 Input,2: Timer is clocked by underflow(down-count) or..,?"
|
|
bitfld.long 0x0 7. "DMACLRACT,DMA Request Clear on Active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "DEBUGRUN,Debug Mode Run Enable" "0: Timer is halted in debug mode,1: Timer is running in debug mode"
|
|
bitfld.long 0x0 5. "QDM,Quadrature Decoder Mode Selection" "0: X2 mode selected,1: X4 mode selected"
|
|
newline
|
|
bitfld.long 0x0 4. "OSMEN,One-shot Mode Enable" "0,1"
|
|
bitfld.long 0x0 3. "SYNC,Timer Start/Stop/Reload Synchronization" "0: Timer operation is unaffected by other timers.,1: Timer may be started stopped and re-loaded from.."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "MODE,Timer Mode" "0: Up-count mode,1: Down-count mode,2: Up/down-count mode,3: Quadrature decoder mode"
|
|
line.long 0x4 "CTRL,No Description"
|
|
bitfld.long 0x4 4. "X2CNT,2x Count Mode" "0,1"
|
|
bitfld.long 0x4 2.--3. "FALLA,Timer Falling Input Edge Action" "0: No action,1: Start counter without reload,2: Stop counter without reload,3: Reload and start counter"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "RISEA,Timer Rising Input Edge Action" "0: No action,1: Start counter without reload,2: Stop counter without reload,3: Reload and start counter"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 1. "STOP,Stop Timer" "0,1"
|
|
bitfld.long 0x0 0. "START,Start Timer" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 26. "CCPOL2,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
bitfld.long 0x0 25. "CCPOL1,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
newline
|
|
bitfld.long 0x0 24. "CCPOL0,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
bitfld.long 0x0 18. "ICFEMPTY2,Input capture fifo empty" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "ICFEMPTY1,Input capture fifo empty" "0,1"
|
|
bitfld.long 0x0 16. "ICFEMPTY0,Input capture fifo empty" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "OCBV2,Output Compare Buffer Valid" "0,1"
|
|
bitfld.long 0x0 9. "OCBV1,Output Compare Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "OCBV0,Output Compare Buffer Valid" "0,1"
|
|
bitfld.long 0x0 6. "SYNCBUSY,Sync Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "DTILOCKSTATUS,DTI lock status" "0: DTI registers are unlocked,1: DTI registers are locked"
|
|
bitfld.long 0x0 4. "TIMERLOCKSTATUS,Timer lock status" "0: TIMER registers are unlocked,1: TIMER registers are locked"
|
|
newline
|
|
bitfld.long 0x0 2. "TOPBV,TOP Buffer Valid" "0,1"
|
|
bitfld.long 0x0 1. "DIR,Direction" "0: Counting up,1: Counting down"
|
|
newline
|
|
bitfld.long 0x0 0. "RUNNING,Running" "0,1"
|
|
group.long 0x14++0x13
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 26. "ICFUF2,Input capture FIFO underflow" "0,1"
|
|
bitfld.long 0x0 25. "ICFUF1,Input capture FIFO underflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "ICFUF0,Input capture FIFO underflow" "0,1"
|
|
bitfld.long 0x0 22. "ICFOF2,Input Capture FIFO overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "ICFOF1,Input Capture FIFO overflow" "0,1"
|
|
bitfld.long 0x0 20. "ICFOF0,Input Capture FIFO overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "ICFWLFULL2,Input Capture Watermark Level Full" "0,1"
|
|
bitfld.long 0x0 17. "ICFWLFULL1,Input Capture Watermark Level Full" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "ICFWLFULL0,Input Capture Watermark Level Full" "0,1"
|
|
bitfld.long 0x0 6. "CC2,Capture Compare Channel 2 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "CC1,Capture Compare Channel 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 4. "CC0,Capture Compare Channel 0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DIRCHG,Direction Change Detect Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 1. "UF,Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "OF,Overflow Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 26. "ICFUF2,ICFUF2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 25. "ICFUF1,ICFUF1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "ICFUF0,ICFUF0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 22. "ICFOF2,ICFOF2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "ICFOF1,ICFOF1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 20. "ICFOF0,ICFOF0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "ICFWLFULL2,ICFWLFULL2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 17. "ICFWLFULL1,ICFWLFULL1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "ICFWLFULL0,ICFWLFULL0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 6. "CC2,CC2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "CC1,CC1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 4. "CC0,CC0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "DIRCHG,Direction Change Detect Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 1. "UF,Underflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "OF,Overflow Interrupt Enable" "0,1"
|
|
line.long 0x8 "TOP,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "TOP,Counter Top Value"
|
|
line.long 0xC "TOPB,No Description"
|
|
hexmask.long.word 0xC 0.--15. 1. "TOPB,Counter Top Buffer Register"
|
|
line.long 0x10 "CNT,No Description"
|
|
hexmask.long.word 0x10 0.--15. 1. "CNT,Counter Value"
|
|
wgroup.long 0x2C++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Timer Lock Key"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,Timer Module Enable" "0,1"
|
|
group.long 0x60++0xB
|
|
line.long 0x0 "CC0_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC0_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC0_OC,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "OC,Output Compare Value"
|
|
group.long 0x70++0x3
|
|
line.long 0x0 "CC0_OCB,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0x74++0x7
|
|
line.long 0x0 "CC0_ICF,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC0_ICOF,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0x80++0xB
|
|
line.long 0x0 "CC1_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC1_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC1_OC,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "OC,Output Compare Value"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "CC1_OCB,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0x94++0x7
|
|
line.long 0x0 "CC1_ICF,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC1_ICOF,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0xA0++0xB
|
|
line.long 0x0 "CC2_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC2_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC2_OC,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "OC,Output Compare Value"
|
|
group.long 0xB0++0x3
|
|
line.long 0x0 "CC2_OCB,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0xB4++0x7
|
|
line.long 0x0 "CC2_ICF,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC2_ICOF,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0xE0++0x13
|
|
line.long 0x0 "DTCFG,No Description"
|
|
bitfld.long 0x0 11. "DTPRSEN,DTI PRS Source Enable" "0,1"
|
|
bitfld.long 0x0 10. "DTFATS,DTI Fault Action on Timer Stop" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "DTAR,DTI Always Run" "0,1"
|
|
bitfld.long 0x0 1. "DTDAS,DTI Automatic Start-up Functionality" "0: No DTI restart on debugger exit,1: DTI restart on debugger exit"
|
|
newline
|
|
bitfld.long 0x0 0. "DTEN,DTI Enable" "0,1"
|
|
line.long 0x4 "DTTIMECFG,No Description"
|
|
hexmask.long.byte 0x4 16.--21. 1. "DTFALLT,DTI Fall-time"
|
|
hexmask.long.byte 0x4 10.--15. 1. "DTRISET,DTI Rise-time"
|
|
newline
|
|
hexmask.long.word 0x4 0.--9. 1. "DTPRESC,DTI Prescaler Setting"
|
|
line.long 0x8 "DTFCFG,No Description"
|
|
bitfld.long 0x8 28. "DTEM23FEN,DTI EM23 Fault Enable" "0,1"
|
|
bitfld.long 0x8 27. "DTLOCKUPFEN,DTI Lockup Fault Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 26. "DTDBGFEN,DTI Debugger Fault Enable" "0,1"
|
|
bitfld.long 0x8 25. "DTPRS1FEN,DTI PRS 1 Fault Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 24. "DTPRS0FEN,DTI PRS 0 Fault Enable" "0,1"
|
|
bitfld.long 0x8 16.--17. "DTFA,DTI Fault Action" "0: No action on fault,1: Set outputs inactive,2: Clear outputs,3: Tristate outputs"
|
|
line.long 0xC "DTCTRL,No Description"
|
|
bitfld.long 0xC 1. "DTIPOL,DTI Inactive Polarity" "0,1"
|
|
bitfld.long 0xC 0. "DTCINV,DTI Complementary Output Invert." "0,1"
|
|
line.long 0x10 "DTOGEN,No Description"
|
|
bitfld.long 0x10 5. "DTOGCDTI2EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 4. "DTOGCDTI1EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x10 3. "DTOGCDTI0EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 2. "DTOGCC2EN,DTI CCn Output Generation Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x10 1. "DTOGCC1EN,DTI CCn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 0. "DTOGCC0EN,DTI CCn Output Generation Enable" "0,1"
|
|
rgroup.long 0xF4++0x3
|
|
line.long 0x0 "DTFAULT,No Description"
|
|
bitfld.long 0x0 4. "DTEM23F,DTI EM23 Entry Fault" "0,1"
|
|
bitfld.long 0x0 3. "DTLOCKUPF,DTI Lockup Fault" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DTDBGF,DTI Debugger Fault" "0,1"
|
|
bitfld.long 0x0 1. "DTPRS1F,DTI PRS 1 Fault" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DTPRS0F,DTI PRS 0 Fault" "0,1"
|
|
wgroup.long 0xF8++0x7
|
|
line.long 0x0 "DTFAULTC,No Description"
|
|
bitfld.long 0x0 4. "DTEM23FC,DTI EM23 Fault Clear" "0,1"
|
|
bitfld.long 0x0 3. "DTLOCKUPFC,DTI Lockup Fault Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DTDBGFC,DTI Debugger Fault Clear" "0,1"
|
|
bitfld.long 0x0 1. "DTPRS1FC,DTI PRS1 Fault Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DTPRS0FC,DTI PRS0 Fault Clear" "0,1"
|
|
line.long 0x4 "DTLOCK,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "DTILOCKKEY,DTI Lock Key"
|
|
tree.end
|
|
tree "TIMER4_S"
|
|
base ad:0x40058000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version ID"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "CFG,No Description"
|
|
hexmask.long.word 0x0 18.--27. 1. "PRESC,Prescaler Setting"
|
|
bitfld.long 0x0 17. "RSSCOIST,Reload-Start Sets COIST" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "ATI,Always Track Inputs" "0,1"
|
|
bitfld.long 0x0 12. "RETIMESEL,PWM output retime select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "DISSYNCOUT,Disable Timer Start/Stop/Reload output" "0: Timer can start/stop/reload other timers with..,1: Timer cannot start/stop/reload other timers with.."
|
|
bitfld.long 0x0 10. "RETIMEEN,PWM output retimed enable" "0: PWM outputs are not re-timed.,1: PWM outputs are re-timed."
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CLKSEL,Clock Source Select" "0: Prescaled EM01GRPACLK,1: Compare/Capture Channel 1 Input,2: Timer is clocked by underflow(down-count) or..,?"
|
|
bitfld.long 0x0 7. "DMACLRACT,DMA Request Clear on Active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "DEBUGRUN,Debug Mode Run Enable" "0: Timer is halted in debug mode,1: Timer is running in debug mode"
|
|
bitfld.long 0x0 5. "QDM,Quadrature Decoder Mode Selection" "0: X2 mode selected,1: X4 mode selected"
|
|
newline
|
|
bitfld.long 0x0 4. "OSMEN,One-shot Mode Enable" "0,1"
|
|
bitfld.long 0x0 3. "SYNC,Timer Start/Stop/Reload Synchronization" "0: Timer operation is unaffected by other timers.,1: Timer may be started stopped and re-loaded from.."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "MODE,Timer Mode" "0: Up-count mode,1: Down-count mode,2: Up/down-count mode,3: Quadrature decoder mode"
|
|
line.long 0x4 "CTRL,No Description"
|
|
bitfld.long 0x4 4. "X2CNT,2x Count Mode" "0,1"
|
|
bitfld.long 0x4 2.--3. "FALLA,Timer Falling Input Edge Action" "0: No action,1: Start counter without reload,2: Stop counter without reload,3: Reload and start counter"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "RISEA,Timer Rising Input Edge Action" "0: No action,1: Start counter without reload,2: Stop counter without reload,3: Reload and start counter"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 1. "STOP,Stop Timer" "0,1"
|
|
bitfld.long 0x0 0. "START,Start Timer" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 26. "CCPOL2,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
bitfld.long 0x0 25. "CCPOL1,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
newline
|
|
bitfld.long 0x0 24. "CCPOL0,Compare/Capture Polarity" "0: CCx polarity low level/rising edge,1: CCx polarity high level/falling edge"
|
|
bitfld.long 0x0 18. "ICFEMPTY2,Input capture fifo empty" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "ICFEMPTY1,Input capture fifo empty" "0,1"
|
|
bitfld.long 0x0 16. "ICFEMPTY0,Input capture fifo empty" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "OCBV2,Output Compare Buffer Valid" "0,1"
|
|
bitfld.long 0x0 9. "OCBV1,Output Compare Buffer Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "OCBV0,Output Compare Buffer Valid" "0,1"
|
|
bitfld.long 0x0 6. "SYNCBUSY,Sync Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "DTILOCKSTATUS,DTI lock status" "0: DTI registers are unlocked,1: DTI registers are locked"
|
|
bitfld.long 0x0 4. "TIMERLOCKSTATUS,Timer lock status" "0: TIMER registers are unlocked,1: TIMER registers are locked"
|
|
newline
|
|
bitfld.long 0x0 2. "TOPBV,TOP Buffer Valid" "0,1"
|
|
bitfld.long 0x0 1. "DIR,Direction" "0: Counting up,1: Counting down"
|
|
newline
|
|
bitfld.long 0x0 0. "RUNNING,Running" "0,1"
|
|
group.long 0x14++0x13
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 26. "ICFUF2,Input capture FIFO underflow" "0,1"
|
|
bitfld.long 0x0 25. "ICFUF1,Input capture FIFO underflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "ICFUF0,Input capture FIFO underflow" "0,1"
|
|
bitfld.long 0x0 22. "ICFOF2,Input Capture FIFO overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "ICFOF1,Input Capture FIFO overflow" "0,1"
|
|
bitfld.long 0x0 20. "ICFOF0,Input Capture FIFO overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "ICFWLFULL2,Input Capture Watermark Level Full" "0,1"
|
|
bitfld.long 0x0 17. "ICFWLFULL1,Input Capture Watermark Level Full" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "ICFWLFULL0,Input Capture Watermark Level Full" "0,1"
|
|
bitfld.long 0x0 6. "CC2,Capture Compare Channel 2 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "CC1,Capture Compare Channel 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 4. "CC0,Capture Compare Channel 0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DIRCHG,Direction Change Detect Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 1. "UF,Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "OF,Overflow Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 26. "ICFUF2,ICFUF2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 25. "ICFUF1,ICFUF1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "ICFUF0,ICFUF0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 22. "ICFOF2,ICFOF2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "ICFOF1,ICFOF1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 20. "ICFOF0,ICFOF0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "ICFWLFULL2,ICFWLFULL2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 17. "ICFWLFULL1,ICFWLFULL1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "ICFWLFULL0,ICFWLFULL0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 6. "CC2,CC2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "CC1,CC1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 4. "CC0,CC0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "DIRCHG,Direction Change Detect Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 1. "UF,Underflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "OF,Overflow Interrupt Enable" "0,1"
|
|
line.long 0x8 "TOP,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "TOP,Counter Top Value"
|
|
line.long 0xC "TOPB,No Description"
|
|
hexmask.long.word 0xC 0.--15. 1. "TOPB,Counter Top Buffer Register"
|
|
line.long 0x10 "CNT,No Description"
|
|
hexmask.long.word 0x10 0.--15. 1. "CNT,Counter Value"
|
|
wgroup.long 0x2C++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,Timer Lock Key"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,Timer Module Enable" "0,1"
|
|
group.long 0x60++0xB
|
|
line.long 0x0 "CC0_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC0_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC0_OC,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "OC,Output Compare Value"
|
|
group.long 0x70++0x3
|
|
line.long 0x0 "CC0_OCB,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0x74++0x7
|
|
line.long 0x0 "CC0_ICF,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC0_ICOF,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0x80++0xB
|
|
line.long 0x0 "CC1_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC1_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC1_OC,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "OC,Output Compare Value"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "CC1_OCB,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0x94++0x7
|
|
line.long 0x0 "CC1_ICF,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC1_ICOF,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0xA0++0xB
|
|
line.long 0x0 "CC2_CFG,No Description"
|
|
bitfld.long 0x0 21. "ICFWL,Input Capture FIFO watermark level" "0,1"
|
|
bitfld.long 0x0 20. "FILT,Digital Filter" "0: Digital Filter Disabled,1: Digital Filter Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "PRSCONF,PRS Configuration" "0: Each CC event will generate a one EM01GRPACLK..,1: The PRS channel will follow CC out"
|
|
bitfld.long 0x0 17.--18. "INSEL,Input Selection" "0: TIMERnCCx pin is selected,1: Synchornous PRS selected,2: Asynchronous Level PRS selected,3: Asynchronous Pulse PRS selected"
|
|
newline
|
|
bitfld.long 0x0 4. "COIST,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x0 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input Capture,2: Output Compare,3: Pulse-Width Modulation"
|
|
line.long 0x4 "CC2_CTRL,No Description"
|
|
bitfld.long 0x4 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on every..,1: PRS output pulse and interrupt flag set on every..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
bitfld.long 0x4 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x4 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x4 2. "OUTINV,Output Invert" "0,1"
|
|
line.long 0x8 "CC2_OC,No Description"
|
|
hexmask.long.word 0x8 0.--15. 1. "OC,Output Compare Value"
|
|
group.long 0xB0++0x3
|
|
line.long 0x0 "CC2_OCB,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "OCB,Output Compare Value Buffer"
|
|
rgroup.long 0xB4++0x7
|
|
line.long 0x0 "CC2_ICF,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "ICF,Input Capture FIFO"
|
|
line.long 0x4 "CC2_ICOF,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "ICOF,Input Capture FIFO Overflow"
|
|
group.long 0xE0++0x13
|
|
line.long 0x0 "DTCFG,No Description"
|
|
bitfld.long 0x0 11. "DTPRSEN,DTI PRS Source Enable" "0,1"
|
|
bitfld.long 0x0 10. "DTFATS,DTI Fault Action on Timer Stop" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "DTAR,DTI Always Run" "0,1"
|
|
bitfld.long 0x0 1. "DTDAS,DTI Automatic Start-up Functionality" "0: No DTI restart on debugger exit,1: DTI restart on debugger exit"
|
|
newline
|
|
bitfld.long 0x0 0. "DTEN,DTI Enable" "0,1"
|
|
line.long 0x4 "DTTIMECFG,No Description"
|
|
hexmask.long.byte 0x4 16.--21. 1. "DTFALLT,DTI Fall-time"
|
|
hexmask.long.byte 0x4 10.--15. 1. "DTRISET,DTI Rise-time"
|
|
newline
|
|
hexmask.long.word 0x4 0.--9. 1. "DTPRESC,DTI Prescaler Setting"
|
|
line.long 0x8 "DTFCFG,No Description"
|
|
bitfld.long 0x8 28. "DTEM23FEN,DTI EM23 Fault Enable" "0,1"
|
|
bitfld.long 0x8 27. "DTLOCKUPFEN,DTI Lockup Fault Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 26. "DTDBGFEN,DTI Debugger Fault Enable" "0,1"
|
|
bitfld.long 0x8 25. "DTPRS1FEN,DTI PRS 1 Fault Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 24. "DTPRS0FEN,DTI PRS 0 Fault Enable" "0,1"
|
|
bitfld.long 0x8 16.--17. "DTFA,DTI Fault Action" "0: No action on fault,1: Set outputs inactive,2: Clear outputs,3: Tristate outputs"
|
|
line.long 0xC "DTCTRL,No Description"
|
|
bitfld.long 0xC 1. "DTIPOL,DTI Inactive Polarity" "0,1"
|
|
bitfld.long 0xC 0. "DTCINV,DTI Complementary Output Invert." "0,1"
|
|
line.long 0x10 "DTOGEN,No Description"
|
|
bitfld.long 0x10 5. "DTOGCDTI2EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 4. "DTOGCDTI1EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x10 3. "DTOGCDTI0EN,DTI CDTIn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 2. "DTOGCC2EN,DTI CCn Output Generation Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x10 1. "DTOGCC1EN,DTI CCn Output Generation Enable" "0,1"
|
|
bitfld.long 0x10 0. "DTOGCC0EN,DTI CCn Output Generation Enable" "0,1"
|
|
rgroup.long 0xF4++0x3
|
|
line.long 0x0 "DTFAULT,No Description"
|
|
bitfld.long 0x0 4. "DTEM23F,DTI EM23 Entry Fault" "0,1"
|
|
bitfld.long 0x0 3. "DTLOCKUPF,DTI Lockup Fault" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DTDBGF,DTI Debugger Fault" "0,1"
|
|
bitfld.long 0x0 1. "DTPRS1F,DTI PRS 1 Fault" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DTPRS0F,DTI PRS 0 Fault" "0,1"
|
|
wgroup.long 0xF8++0x7
|
|
line.long 0x0 "DTFAULTC,No Description"
|
|
bitfld.long 0x0 4. "DTEM23FC,DTI EM23 Fault Clear" "0,1"
|
|
bitfld.long 0x0 3. "DTLOCKUPFC,DTI Lockup Fault Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DTDBGFC,DTI Debugger Fault Clear" "0,1"
|
|
bitfld.long 0x0 1. "DTPRS1FC,DTI PRS1 Fault Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DTPRS0FC,DTI PRS0 Fault Clear" "0,1"
|
|
line.long 0x4 "DTLOCK,No Description"
|
|
hexmask.long.word 0x4 0.--15. 1. "DTILOCKKEY,DTI Lock Key"
|
|
tree.end
|
|
tree.end
|
|
tree "ULFRCO (Ultra Low Frequency RC Oscillator)"
|
|
base ad:0x0
|
|
tree "ULFRCO_NS"
|
|
base ad:0x50028000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,ULFRCO IP version"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 16. "ENS,Enable Status" "0,1"
|
|
bitfld.long 0x0 0. "RDY,Ready Status" "0,1"
|
|
group.long 0x14++0x7
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 2. "NEGEDGE,Negative Edge Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 1. "POSEDGE,Positive Edge Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 0. "RDY,Ready Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 2. "NEGEDGE,Enable Negative Edge Interrupt" "0,1"
|
|
bitfld.long 0x4 1. "POSEDGE,Enable Positive Edge Interrupt" "0,1"
|
|
bitfld.long 0x4 0. "RDY,Enable Ready Interrupt" "0,1"
|
|
tree.end
|
|
tree "ULFRCO_S"
|
|
base ad:0x40028000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,ULFRCO IP version"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 16. "ENS,Enable Status" "0,1"
|
|
bitfld.long 0x0 0. "RDY,Ready Status" "0,1"
|
|
group.long 0x14++0x7
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 2. "NEGEDGE,Negative Edge Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 1. "POSEDGE,Positive Edge Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 0. "RDY,Ready Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 2. "NEGEDGE,Enable Negative Edge Interrupt" "0,1"
|
|
bitfld.long 0x4 1. "POSEDGE,Enable Positive Edge Interrupt" "0,1"
|
|
bitfld.long 0x4 0. "RDY,Enable Ready Interrupt" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "USART (Universal Synchronous Asynchronous Receiver/Transmitter)"
|
|
base ad:0x0
|
|
tree "USART0_NS"
|
|
base ad:0x5005C000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IPVERSION"
|
|
group.long 0x4++0xF
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,USART Enable" "0,1"
|
|
line.long 0x4 "CTRL,No Description"
|
|
bitfld.long 0x4 31. "SMSDELAY,Synchronous Main Sample Delay" "0,1"
|
|
bitfld.long 0x4 30. "MVDIS,Majority Vote Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "AUTOTX,Always Transmit When RX Not Full" "0,1"
|
|
bitfld.long 0x4 28. "BYTESWAP,Byteswap In Double Accesses" "0: Normal byte order,1: Byte order swapped"
|
|
newline
|
|
bitfld.long 0x4 25. "SSSEARLY,Synchronous Secondary Setup Early" "0,1"
|
|
bitfld.long 0x4 24. "ERRSTX,Disable TX On Error" "0: Received framing and parity errors have no..,1: Received framing and parity errors disable the.."
|
|
newline
|
|
bitfld.long 0x4 23. "ERRSRX,Disable RX On Error" "0: Framing and parity errors have no effect on..,1: Framing and parity errors disable the receiver"
|
|
bitfld.long 0x4 22. "ERRSDMA,Halt DMA On Error" "0: Framing and parity errors have no effect on DMA..,1: DMA requests from the USART are blocked while.."
|
|
newline
|
|
bitfld.long 0x4 21. "BIT8DV,Bit 8 Default Value" "0,1"
|
|
bitfld.long 0x4 20. "SKIPPERRF,Skip Parity Error Frames" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "SCRETRANS,SmartCard Retransmit" "0,1"
|
|
bitfld.long 0x4 18. "SCMODE,SmartCard Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "AUTOTRI,Automatic TX Tristate" "0: The output on U(S)n_TX when the transmitter is..,1: U(S)n_TX is tristated whenever the transmitter.."
|
|
bitfld.long 0x4 16. "AUTOCS,Automatic Chip Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "CSINV,Chip Select Invert" "0: Chip select is active low,1: Chip select is active high"
|
|
bitfld.long 0x4 14. "TXINV,Transmitter output Invert" "0: Output from the transmitter is passed unchanged..,1: Output from the transmitter is inverted before.."
|
|
newline
|
|
bitfld.long 0x4 13. "RXINV,Receiver Input Invert" "0: Input is passed directly to the receiver,1: Input is inverted before it is passed to the.."
|
|
bitfld.long 0x4 12. "TXBIL,TX Buffer Interrupt Level" "0: TXBL and the TXBL interrupt flag are set when..,1: TXBL and TXBLIF are set when the transmit buffer.."
|
|
newline
|
|
bitfld.long 0x4 11. "CSMA,Action On Chip Select In Main Mode" "0: No action taken,1: Go to secondary mode"
|
|
bitfld.long 0x4 10. "MSBF,Most Significant Bit First" "0: Data is sent with the least significant bit first,1: Data is sent with the most significant bit first"
|
|
newline
|
|
bitfld.long 0x4 9. "CLKPHA,Clock Edge For Setup/Sample" "0: Data is sampled on the leading edge and set-up..,1: Data is set-up on the leading edge and sampled.."
|
|
bitfld.long 0x4 8. "CLKPOL,Clock Polarity" "0: The bus clock used in synchronous mode has a low..,1: The bus clock used in synchronous mode has a.."
|
|
newline
|
|
bitfld.long 0x4 5.--6. "OVS,Oversampling" "0: Regular UART mode with 16X oversampling in..,1: Double speed with 8X oversampling in..,2: 6X oversampling in asynchronous mode,3: Quadruple speed with 4X oversampling in.."
|
|
bitfld.long 0x4 4. "MPAB,Multi-Processor Address-Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "MPM,Multi-Processor Mode" "0: The 9th bit of incoming frames has no special..,1: An incoming frame with the 9th bit equal to MPAB.."
|
|
bitfld.long 0x4 2. "CCEN,Collision Check Enable" "0: Collision check is disabled,1: Collision check is enabled. The receiver must be.."
|
|
newline
|
|
bitfld.long 0x4 1. "LOOPBK,Loopback Enable" "0: The receiver is connected to and receives data..,1: The receiver is connected to and receives data.."
|
|
bitfld.long 0x4 0. "SYNC,USART Synchronous Mode" "0: The USART operates in asynchronous mode,1: The USART operates in synchronous mode"
|
|
line.long 0x8 "FRAME,No Description"
|
|
bitfld.long 0x8 12.--13. "STOPBITS,Stop-Bit Mode" "0: The transmitter generates a half stop bit.,1: One stop bit is generated and verified,2: The transmitter generates one and a half stop..,3: The transmitter generates two stop bits. The.."
|
|
bitfld.long 0x8 8.--9. "PARITY,Parity-Bit Mode" "0: Parity bits are not used,?,2: Even parity are used. Parity bits are..,3: Odd parity is used. Parity bits are.."
|
|
newline
|
|
hexmask.long.byte 0x8 0.--3. 1. "DATABITS,Data-Bit Mode"
|
|
line.long 0xC "TRIGCTRL,No Description"
|
|
bitfld.long 0xC 12. "RXATX2EN,Enable Receive Trigger after TX end of f" "0,1"
|
|
bitfld.long 0xC 11. "RXATX1EN,Enable Receive Trigger after TX end of f" "0,1"
|
|
newline
|
|
bitfld.long 0xC 10. "RXATX0EN,Enable Receive Trigger after TX end of f" "0,1"
|
|
bitfld.long 0xC 9. "TXARX2EN,Enable Transmit Trigger after RX End of" "0,1"
|
|
newline
|
|
bitfld.long 0xC 8. "TXARX1EN,Enable Transmit Trigger after RX End of" "0,1"
|
|
bitfld.long 0xC 7. "TXARX0EN,Enable Transmit Trigger after RX End of" "0,1"
|
|
newline
|
|
bitfld.long 0xC 6. "AUTOTXTEN,AUTOTX Trigger Enable" "0,1"
|
|
bitfld.long 0xC 5. "TXTEN,Transmit Trigger Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 4. "RXTEN,Receive Trigger Enable" "0,1"
|
|
wgroup.long 0x14++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 11. "CLEARRX,Clear RX" "0,1"
|
|
bitfld.long 0x0 10. "CLEARTX,Clear TX" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXTRIDIS,Transmitter Tristate Disable" "0,1"
|
|
bitfld.long 0x0 8. "TXTRIEN,Transmitter Tristate Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "RXBLOCKDIS,Receiver Block Disable" "0,1"
|
|
bitfld.long 0x0 6. "RXBLOCKEN,Receiver Block Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "MASTERDIS,Main Mode Disable" "0,1"
|
|
bitfld.long 0x0 4. "MASTEREN,Main Mode Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "TXDIS,Transmitter Disable" "0,1"
|
|
bitfld.long 0x0 2. "TXEN,Transmitter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXDIS,Receiver Disable" "0,1"
|
|
bitfld.long 0x0 0. "RXEN,Receiver Enable" "0,1"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 16.--17. "TXBUFCNT,TX Buffer Count" "0,1,2,3"
|
|
bitfld.long 0x0 14. "TIMERRESTARTED,The USART Timer restarted itself" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TXIDLE,TX Idle" "0,1"
|
|
bitfld.long 0x0 12. "RXFULLRIGHT,RX Full of Right Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "RXDATAVRIGHT,RX Data Right" "0,1"
|
|
bitfld.long 0x0 10. "TXBSRIGHT,TX Buffer Expects Single Right Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXBDRIGHT,TX Buffer Expects Double Right Data" "0,1"
|
|
bitfld.long 0x0 8. "RXFULL,RX FIFO Full" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "RXDATAV,RX Data Valid" "0,1"
|
|
bitfld.long 0x0 6. "TXBL,TX Buffer Level" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "TXC,TX Complete" "0,1"
|
|
bitfld.long 0x0 4. "TXTRI,Transmitter Tristated" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RXBLOCK,Block Incoming Data" "0,1"
|
|
bitfld.long 0x0 2. "MASTER,SPI Main Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXENS,Transmitter Enable Status" "0,1"
|
|
bitfld.long 0x0 0. "RXENS,Receiver Enable Status" "0,1"
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "CLKDIV,No Description"
|
|
bitfld.long 0x0 31. "AUTOBAUDEN,AUTOBAUD detection enable" "0,1"
|
|
hexmask.long.tbyte 0x0 3.--22. 1. "DIV,Fractional Clock Divider"
|
|
rgroup.long 0x20++0x17
|
|
line.long 0x0 "RXDATAX,No Description"
|
|
bitfld.long 0x0 15. "FERR,Data Framing Error" "0,1"
|
|
bitfld.long 0x0 14. "PERR,Data Parity Error" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--8. 1. "RXDATA,RX Data"
|
|
line.long 0x4 "RXDATA,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "RXDATA,RX Data"
|
|
line.long 0x8 "RXDOUBLEX,No Description"
|
|
bitfld.long 0x8 31. "FERR1,Data Framing Error 1" "0,1"
|
|
bitfld.long 0x8 30. "PERR1,Data Parity Error 1" "0,1"
|
|
newline
|
|
hexmask.long.word 0x8 16.--24. 1. "RXDATA1,RX Data 1"
|
|
bitfld.long 0x8 15. "FERR0,Data Framing Error 0" "0,1"
|
|
newline
|
|
bitfld.long 0x8 14. "PERR0,Data Parity Error 0" "0,1"
|
|
hexmask.long.word 0x8 0.--8. 1. "RXDATA0,RX Data 0"
|
|
line.long 0xC "RXDOUBLE,No Description"
|
|
hexmask.long.byte 0xC 8.--15. 1. "RXDATA1,RX Data 1"
|
|
hexmask.long.byte 0xC 0.--7. 1. "RXDATA0,RX Data 0"
|
|
line.long 0x10 "RXDATAXP,No Description"
|
|
bitfld.long 0x10 15. "FERRP,Data Framing Error Peek" "0,1"
|
|
bitfld.long 0x10 14. "PERRP,Data Parity Error Peek" "0,1"
|
|
newline
|
|
hexmask.long.word 0x10 0.--8. 1. "RXDATAP,RX Data Peek"
|
|
line.long 0x14 "RXDOUBLEXP,No Description"
|
|
bitfld.long 0x14 31. "FERRP1,Data Framing Error 1 Peek" "0,1"
|
|
bitfld.long 0x14 30. "PERRP1,Data Parity Error 1 Peek" "0,1"
|
|
newline
|
|
hexmask.long.word 0x14 16.--24. 1. "RXDATAP1,RX Data 1 Peek"
|
|
bitfld.long 0x14 15. "FERRP0,Data Framing Error 0 Peek" "0,1"
|
|
newline
|
|
bitfld.long 0x14 14. "PERRP0,Data Parity Error 0 Peek" "0,1"
|
|
hexmask.long.word 0x14 0.--8. 1. "RXDATAP0,RX Data 0 Peek"
|
|
wgroup.long 0x38++0xF
|
|
line.long 0x0 "TXDATAX,No Description"
|
|
bitfld.long 0x0 15. "RXENAT,Enable RX After Transmission" "0,1"
|
|
bitfld.long 0x0 14. "TXDISAT,Clear TXEN After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TXBREAK,Transmit Data As Break" "0,1"
|
|
bitfld.long 0x0 12. "TXTRIAT,Set TXTRI After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "UBRXAT,Unblock RX After Transmission" "0,1"
|
|
hexmask.long.word 0x0 0.--8. 1. "TXDATAX,TX Data"
|
|
line.long 0x4 "TXDATA,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "TXDATA,TX Data"
|
|
line.long 0x8 "TXDOUBLEX,No Description"
|
|
bitfld.long 0x8 31. "RXENAT1,Enable RX After Transmission" "0,1"
|
|
bitfld.long 0x8 30. "TXDISAT1,Clear TXEN After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x8 29. "TXBREAK1,Transmit Data As Break" "0,1"
|
|
bitfld.long 0x8 28. "TXTRIAT1,Set TXTRI After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x8 27. "UBRXAT1,Unblock RX After Transmission" "0,1"
|
|
hexmask.long.word 0x8 16.--24. 1. "TXDATA1,TX Data"
|
|
newline
|
|
bitfld.long 0x8 15. "RXENAT0,Enable RX After Transmission" "0,1"
|
|
bitfld.long 0x8 14. "TXDISAT0,Clear TXEN After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x8 13. "TXBREAK0,Transmit Data As Break" "0,1"
|
|
bitfld.long 0x8 12. "TXTRIAT0,Set TXTRI After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x8 11. "UBRXAT0,Unblock RX After Transmission" "0,1"
|
|
hexmask.long.word 0x8 0.--8. 1. "TXDATA0,TX Data"
|
|
line.long 0xC "TXDOUBLE,No Description"
|
|
hexmask.long.byte 0xC 8.--15. 1. "TXDATA1,TX Data"
|
|
hexmask.long.byte 0xC 0.--7. 1. "TXDATA0,TX Data"
|
|
group.long 0x48++0x23
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 16. "TCMP2,Timer comparator 2 Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 15. "TCMP1,Timer comparator 1 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "TCMP0,Timer comparator 0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 13. "TXIDLE,TX Idle Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "CCF,Collision Check Fail Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 11. "SSM,Chip-Select In Main Mode Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "MPAF,Multi-Processor Address Frame Interrupt" "0,1"
|
|
bitfld.long 0x0 9. "FERR,Framing Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "PERR,Parity Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 7. "TXUF,TX Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TXOF,TX Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 5. "RXUF,RX Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "RXOF,RX Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 3. "RXFULL,RX Buffer Full Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXDATAV,RX Data Valid Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 1. "TXBL,TX Buffer Level Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXC,TX Complete Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 16. "TCMP2,Timer comparator 2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 15. "TCMP1,Timer comparator 1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "TCMP0,Timer comparator 0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 13. "TXIDLE,TX Idle Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "CCF,Collision Check Fail Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 11. "SSM,Chip-Select In Main Mode Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "MPAF,Multi-Processor Address Frame Interrupt" "0,1"
|
|
bitfld.long 0x4 9. "FERR,Framing Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "PERR,Parity Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 7. "TXUF,TX Underflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "TXOF,TX Overflow Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 5. "RXUF,RX Underflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "RXOF,RX Overflow Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 3. "RXFULL,RX Buffer Full Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "RXDATAV,RX Data Valid Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 1. "TXBL,TX Buffer Level Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "TXC,TX Complete Interrupt Enable" "0,1"
|
|
line.long 0x8 "IRCTRL,No Description"
|
|
bitfld.long 0x8 3. "IRFILT,IrDA RX Filter" "0: No filter enabled,1: Filter enabled. IrDA pulse must be high for at.."
|
|
bitfld.long 0x8 1.--2. "IRPW,IrDA TX Pulse Width" "0: IrDA pulse width is 1/16 for OVS=0 and 1/8 for..,1: IrDA pulse width is 2/16 for OVS=0 and 2/8 for..,2: IrDA pulse width is 3/16 for OVS=0 and 3/8 for..,3: IrDA pulse width is 4/16 for OVS=0 and 4/8 for.."
|
|
newline
|
|
bitfld.long 0x8 0. "IREN,Enable IrDA Module" "0,1"
|
|
line.long 0xC "I2SCTRL,No Description"
|
|
bitfld.long 0xC 8.--10. "FORMAT,I2S Word Format" "0: 32-bit word 32-bit data,1: 32-bit word 32-bit data with 8 lsb masked,2: 32-bit word 24-bit data,3: 32-bit word 16-bit data,4: 32-bit word 8-bit data,5: 16-bit word 16-bit data,6: 16-bit word 8-bit data,7: 8-bit word 8-bit data"
|
|
bitfld.long 0xC 4. "DELAY,Delay on I2S data" "0,1"
|
|
newline
|
|
bitfld.long 0xC 3. "DMASPLIT,Separate DMA Request For Left/Right Data" "0,1"
|
|
bitfld.long 0xC 2. "JUSTIFY,Justification of I2S Data" "0: Data is left-justified,1: Data is right-justified"
|
|
newline
|
|
bitfld.long 0xC 1. "MONO,Stero or Mono" "0,1"
|
|
bitfld.long 0xC 0. "EN,Enable I2S Mode" "0,1"
|
|
line.long 0x10 "TIMING,No Description"
|
|
bitfld.long 0x10 28.--30. "CSHOLD,Chip Select Hold" "0: Disable CS being asserted after the end of..,1: CS is asserted for 1 baud-times after the end of..,2: CS is asserted for 2 baud-times after the end of..,3: CS is asserted for 3 baud-times after the end of..,4: CS is asserted for 7 baud-times after the end of..,5: CS is asserted after the end of transmission for..,6: CS is asserted after the end of transmission for..,7: CS is asserted after the end of transmission for.."
|
|
bitfld.long 0x10 24.--26. "ICS,Inter-character spacing" "0: There is no space between charcters,1: Create a space of 1 baud-times before start of..,2: Create a space of 2 baud-times before start of..,3: Create a space of 3 baud-times before start of..,4: Create a space of 7 baud-times before start of..,5: Create a space of before the start of..,6: Create a space of before the start of..,7: Create a space of before the start of.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "CSSETUP,Chip Select Setup" "0: CS is not asserted before start of transmission,1: CS is asserted for 1 baud-times before start of..,2: CS is asserted for 2 baud-times before start of..,3: CS is asserted for 3 baud-times before start of..,4: CS is asserted for 7 baud-times before start of..,5: CS is asserted before the start of transmission..,6: CS is asserted before the start of transmission..,7: CS is asserted before the start of transmission.."
|
|
bitfld.long 0x10 16.--18. "TXDELAY,TX frame start delay" "0: Disable - TXDELAY in USARTn_CTRL can be used for..,1: Start of transmission is delayed for 1 baud-times,2: Start of transmission is delayed for 2 baud-times,3: Start of transmission is delayed for 3 baud-times,4: Start of transmission is delayed for 7 baud-times,5: Start of transmission is delayed for TCMPVAL0..,6: Start of transmission is delayed for TCMPVAL1..,7: Start of transmission is delayed for TCMPVAL2.."
|
|
line.long 0x14 "CTRLX,No Description"
|
|
bitfld.long 0x14 15. "CLKPRSEN,PRS CLK Enable" "0,1"
|
|
bitfld.long 0x14 7. "RXPRSEN,PRS RX Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x14 3. "RTSINV,RTS Pin Inversion" "0: The USn_RTS pin is low true,1: The USn_RTS pin is high true"
|
|
bitfld.long 0x14 2. "CTSEN,CTS Function enabled" "0: Ingore CTS,1: Stop transmitting when CTS is negated"
|
|
newline
|
|
bitfld.long 0x14 1. "CTSINV,CTS Pin Inversion" "0: The USn_CTS pin is low true,1: The USn_CTS pin is high true"
|
|
bitfld.long 0x14 0. "DBGHALT,Debug halt" "0: Continue to transmit until TX buffer is empty,1: Negate RTS to stop link partner's transmission.."
|
|
line.long 0x18 "TIMECMP0,No Description"
|
|
bitfld.long 0x18 24. "RESTARTEN,Restart Timer on TCMP0" "0: Disable the timer restarting on TCMP0,1: Enable the timer restarting on TCMP0"
|
|
bitfld.long 0x18 20.--22. "TSTOP,Source used to disable comparator 0" "0: Comparator 0 is disabled when the counter equals..,1: Comparator 0 is disabled at TX start TX Engine,2: Comparator 0 is disabled on RX going going..,3: Comparator 0 is disabled on RX going Inactive,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x18 16.--18. "TSTART,Timer start source" "0: Comparator 0 is disabled,1: Comparator 0 and timer are started at TX end of..,2: Comparator 0 and timer are started at TX Complete,3: Comparator 0 and timer are started at RX going..,4: Comparator 0 and timer are started at RX end of..,?,?,?"
|
|
hexmask.long.byte 0x18 0.--7. 1. "TCMPVAL,Timer comparator 0."
|
|
line.long 0x1C "TIMECMP1,No Description"
|
|
bitfld.long 0x1C 24. "RESTARTEN,Restart Timer on TCMP1" "0: Disable the timer restarting on TCMP1,1: Enable the timer restarting on TCMP1"
|
|
bitfld.long 0x1C 20.--22. "TSTOP,Source used to disable comparator 1" "0: Comparator 1 is disabled when the counter equals..,1: Comparator 1 is disabled at TX start TX Engine,2: Comparator 1 is disabled on RX going going..,3: Comparator 1 is disabled on RX going Inactive,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--18. "TSTART,Timer start source" "0: Comparator 1 is disabled,1: Comparator 1 and timer are started at TX end of..,2: Comparator 1 and timer are started at TX Complete,3: Comparator 1 and timer are started at RX going..,4: Comparator 1 and timer are started at RX end of..,?,?,?"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "TCMPVAL,Timer comparator 1."
|
|
line.long 0x20 "TIMECMP2,No Description"
|
|
bitfld.long 0x20 24. "RESTARTEN,Restart Timer on TCMP2" "0: Disable the timer restarting on TCMP2,1: Enable the timer restarting on TCMP2"
|
|
bitfld.long 0x20 20.--22. "TSTOP,Source used to disable comparator 2" "0: Comparator 2 is disabled when the counter equals..,1: Comparator 2 is disabled at TX start TX Engine,2: Comparator 2 is disabled on RX going going..,3: Comparator 2 is disabled on RX going Inactive,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x20 16.--18. "TSTART,Timer start source" "0: Comparator 2 is disabled,1: Comparator 2 and timer are started at TX end of..,2: Comparator 2 and timer are started at TX Complete,3: Comparator 2 and timer are started at RX going..,4: Comparator 2 and timer are started at RX end of..,?,?,?"
|
|
hexmask.long.byte 0x20 0.--7. 1. "TCMPVAL,Timer comparator 2."
|
|
tree.end
|
|
tree "USART0_S"
|
|
base ad:0x4005C000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IPVERSION"
|
|
group.long 0x4++0xF
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,USART Enable" "0,1"
|
|
line.long 0x4 "CTRL,No Description"
|
|
bitfld.long 0x4 31. "SMSDELAY,Synchronous Main Sample Delay" "0,1"
|
|
bitfld.long 0x4 30. "MVDIS,Majority Vote Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "AUTOTX,Always Transmit When RX Not Full" "0,1"
|
|
bitfld.long 0x4 28. "BYTESWAP,Byteswap In Double Accesses" "0: Normal byte order,1: Byte order swapped"
|
|
newline
|
|
bitfld.long 0x4 25. "SSSEARLY,Synchronous Secondary Setup Early" "0,1"
|
|
bitfld.long 0x4 24. "ERRSTX,Disable TX On Error" "0: Received framing and parity errors have no..,1: Received framing and parity errors disable the.."
|
|
newline
|
|
bitfld.long 0x4 23. "ERRSRX,Disable RX On Error" "0: Framing and parity errors have no effect on..,1: Framing and parity errors disable the receiver"
|
|
bitfld.long 0x4 22. "ERRSDMA,Halt DMA On Error" "0: Framing and parity errors have no effect on DMA..,1: DMA requests from the USART are blocked while.."
|
|
newline
|
|
bitfld.long 0x4 21. "BIT8DV,Bit 8 Default Value" "0,1"
|
|
bitfld.long 0x4 20. "SKIPPERRF,Skip Parity Error Frames" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "SCRETRANS,SmartCard Retransmit" "0,1"
|
|
bitfld.long 0x4 18. "SCMODE,SmartCard Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "AUTOTRI,Automatic TX Tristate" "0: The output on U(S)n_TX when the transmitter is..,1: U(S)n_TX is tristated whenever the transmitter.."
|
|
bitfld.long 0x4 16. "AUTOCS,Automatic Chip Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "CSINV,Chip Select Invert" "0: Chip select is active low,1: Chip select is active high"
|
|
bitfld.long 0x4 14. "TXINV,Transmitter output Invert" "0: Output from the transmitter is passed unchanged..,1: Output from the transmitter is inverted before.."
|
|
newline
|
|
bitfld.long 0x4 13. "RXINV,Receiver Input Invert" "0: Input is passed directly to the receiver,1: Input is inverted before it is passed to the.."
|
|
bitfld.long 0x4 12. "TXBIL,TX Buffer Interrupt Level" "0: TXBL and the TXBL interrupt flag are set when..,1: TXBL and TXBLIF are set when the transmit buffer.."
|
|
newline
|
|
bitfld.long 0x4 11. "CSMA,Action On Chip Select In Main Mode" "0: No action taken,1: Go to secondary mode"
|
|
bitfld.long 0x4 10. "MSBF,Most Significant Bit First" "0: Data is sent with the least significant bit first,1: Data is sent with the most significant bit first"
|
|
newline
|
|
bitfld.long 0x4 9. "CLKPHA,Clock Edge For Setup/Sample" "0: Data is sampled on the leading edge and set-up..,1: Data is set-up on the leading edge and sampled.."
|
|
bitfld.long 0x4 8. "CLKPOL,Clock Polarity" "0: The bus clock used in synchronous mode has a low..,1: The bus clock used in synchronous mode has a.."
|
|
newline
|
|
bitfld.long 0x4 5.--6. "OVS,Oversampling" "0: Regular UART mode with 16X oversampling in..,1: Double speed with 8X oversampling in..,2: 6X oversampling in asynchronous mode,3: Quadruple speed with 4X oversampling in.."
|
|
bitfld.long 0x4 4. "MPAB,Multi-Processor Address-Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "MPM,Multi-Processor Mode" "0: The 9th bit of incoming frames has no special..,1: An incoming frame with the 9th bit equal to MPAB.."
|
|
bitfld.long 0x4 2. "CCEN,Collision Check Enable" "0: Collision check is disabled,1: Collision check is enabled. The receiver must be.."
|
|
newline
|
|
bitfld.long 0x4 1. "LOOPBK,Loopback Enable" "0: The receiver is connected to and receives data..,1: The receiver is connected to and receives data.."
|
|
bitfld.long 0x4 0. "SYNC,USART Synchronous Mode" "0: The USART operates in asynchronous mode,1: The USART operates in synchronous mode"
|
|
line.long 0x8 "FRAME,No Description"
|
|
bitfld.long 0x8 12.--13. "STOPBITS,Stop-Bit Mode" "0: The transmitter generates a half stop bit.,1: One stop bit is generated and verified,2: The transmitter generates one and a half stop..,3: The transmitter generates two stop bits. The.."
|
|
bitfld.long 0x8 8.--9. "PARITY,Parity-Bit Mode" "0: Parity bits are not used,?,2: Even parity are used. Parity bits are..,3: Odd parity is used. Parity bits are.."
|
|
newline
|
|
hexmask.long.byte 0x8 0.--3. 1. "DATABITS,Data-Bit Mode"
|
|
line.long 0xC "TRIGCTRL,No Description"
|
|
bitfld.long 0xC 12. "RXATX2EN,Enable Receive Trigger after TX end of f" "0,1"
|
|
bitfld.long 0xC 11. "RXATX1EN,Enable Receive Trigger after TX end of f" "0,1"
|
|
newline
|
|
bitfld.long 0xC 10. "RXATX0EN,Enable Receive Trigger after TX end of f" "0,1"
|
|
bitfld.long 0xC 9. "TXARX2EN,Enable Transmit Trigger after RX End of" "0,1"
|
|
newline
|
|
bitfld.long 0xC 8. "TXARX1EN,Enable Transmit Trigger after RX End of" "0,1"
|
|
bitfld.long 0xC 7. "TXARX0EN,Enable Transmit Trigger after RX End of" "0,1"
|
|
newline
|
|
bitfld.long 0xC 6. "AUTOTXTEN,AUTOTX Trigger Enable" "0,1"
|
|
bitfld.long 0xC 5. "TXTEN,Transmit Trigger Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 4. "RXTEN,Receive Trigger Enable" "0,1"
|
|
wgroup.long 0x14++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 11. "CLEARRX,Clear RX" "0,1"
|
|
bitfld.long 0x0 10. "CLEARTX,Clear TX" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXTRIDIS,Transmitter Tristate Disable" "0,1"
|
|
bitfld.long 0x0 8. "TXTRIEN,Transmitter Tristate Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "RXBLOCKDIS,Receiver Block Disable" "0,1"
|
|
bitfld.long 0x0 6. "RXBLOCKEN,Receiver Block Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "MASTERDIS,Main Mode Disable" "0,1"
|
|
bitfld.long 0x0 4. "MASTEREN,Main Mode Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "TXDIS,Transmitter Disable" "0,1"
|
|
bitfld.long 0x0 2. "TXEN,Transmitter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXDIS,Receiver Disable" "0,1"
|
|
bitfld.long 0x0 0. "RXEN,Receiver Enable" "0,1"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 16.--17. "TXBUFCNT,TX Buffer Count" "0,1,2,3"
|
|
bitfld.long 0x0 14. "TIMERRESTARTED,The USART Timer restarted itself" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TXIDLE,TX Idle" "0,1"
|
|
bitfld.long 0x0 12. "RXFULLRIGHT,RX Full of Right Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "RXDATAVRIGHT,RX Data Right" "0,1"
|
|
bitfld.long 0x0 10. "TXBSRIGHT,TX Buffer Expects Single Right Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXBDRIGHT,TX Buffer Expects Double Right Data" "0,1"
|
|
bitfld.long 0x0 8. "RXFULL,RX FIFO Full" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "RXDATAV,RX Data Valid" "0,1"
|
|
bitfld.long 0x0 6. "TXBL,TX Buffer Level" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "TXC,TX Complete" "0,1"
|
|
bitfld.long 0x0 4. "TXTRI,Transmitter Tristated" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RXBLOCK,Block Incoming Data" "0,1"
|
|
bitfld.long 0x0 2. "MASTER,SPI Main Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXENS,Transmitter Enable Status" "0,1"
|
|
bitfld.long 0x0 0. "RXENS,Receiver Enable Status" "0,1"
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "CLKDIV,No Description"
|
|
bitfld.long 0x0 31. "AUTOBAUDEN,AUTOBAUD detection enable" "0,1"
|
|
hexmask.long.tbyte 0x0 3.--22. 1. "DIV,Fractional Clock Divider"
|
|
rgroup.long 0x20++0x17
|
|
line.long 0x0 "RXDATAX,No Description"
|
|
bitfld.long 0x0 15. "FERR,Data Framing Error" "0,1"
|
|
bitfld.long 0x0 14. "PERR,Data Parity Error" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--8. 1. "RXDATA,RX Data"
|
|
line.long 0x4 "RXDATA,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "RXDATA,RX Data"
|
|
line.long 0x8 "RXDOUBLEX,No Description"
|
|
bitfld.long 0x8 31. "FERR1,Data Framing Error 1" "0,1"
|
|
bitfld.long 0x8 30. "PERR1,Data Parity Error 1" "0,1"
|
|
newline
|
|
hexmask.long.word 0x8 16.--24. 1. "RXDATA1,RX Data 1"
|
|
bitfld.long 0x8 15. "FERR0,Data Framing Error 0" "0,1"
|
|
newline
|
|
bitfld.long 0x8 14. "PERR0,Data Parity Error 0" "0,1"
|
|
hexmask.long.word 0x8 0.--8. 1. "RXDATA0,RX Data 0"
|
|
line.long 0xC "RXDOUBLE,No Description"
|
|
hexmask.long.byte 0xC 8.--15. 1. "RXDATA1,RX Data 1"
|
|
hexmask.long.byte 0xC 0.--7. 1. "RXDATA0,RX Data 0"
|
|
line.long 0x10 "RXDATAXP,No Description"
|
|
bitfld.long 0x10 15. "FERRP,Data Framing Error Peek" "0,1"
|
|
bitfld.long 0x10 14. "PERRP,Data Parity Error Peek" "0,1"
|
|
newline
|
|
hexmask.long.word 0x10 0.--8. 1. "RXDATAP,RX Data Peek"
|
|
line.long 0x14 "RXDOUBLEXP,No Description"
|
|
bitfld.long 0x14 31. "FERRP1,Data Framing Error 1 Peek" "0,1"
|
|
bitfld.long 0x14 30. "PERRP1,Data Parity Error 1 Peek" "0,1"
|
|
newline
|
|
hexmask.long.word 0x14 16.--24. 1. "RXDATAP1,RX Data 1 Peek"
|
|
bitfld.long 0x14 15. "FERRP0,Data Framing Error 0 Peek" "0,1"
|
|
newline
|
|
bitfld.long 0x14 14. "PERRP0,Data Parity Error 0 Peek" "0,1"
|
|
hexmask.long.word 0x14 0.--8. 1. "RXDATAP0,RX Data 0 Peek"
|
|
wgroup.long 0x38++0xF
|
|
line.long 0x0 "TXDATAX,No Description"
|
|
bitfld.long 0x0 15. "RXENAT,Enable RX After Transmission" "0,1"
|
|
bitfld.long 0x0 14. "TXDISAT,Clear TXEN After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TXBREAK,Transmit Data As Break" "0,1"
|
|
bitfld.long 0x0 12. "TXTRIAT,Set TXTRI After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "UBRXAT,Unblock RX After Transmission" "0,1"
|
|
hexmask.long.word 0x0 0.--8. 1. "TXDATAX,TX Data"
|
|
line.long 0x4 "TXDATA,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "TXDATA,TX Data"
|
|
line.long 0x8 "TXDOUBLEX,No Description"
|
|
bitfld.long 0x8 31. "RXENAT1,Enable RX After Transmission" "0,1"
|
|
bitfld.long 0x8 30. "TXDISAT1,Clear TXEN After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x8 29. "TXBREAK1,Transmit Data As Break" "0,1"
|
|
bitfld.long 0x8 28. "TXTRIAT1,Set TXTRI After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x8 27. "UBRXAT1,Unblock RX After Transmission" "0,1"
|
|
hexmask.long.word 0x8 16.--24. 1. "TXDATA1,TX Data"
|
|
newline
|
|
bitfld.long 0x8 15. "RXENAT0,Enable RX After Transmission" "0,1"
|
|
bitfld.long 0x8 14. "TXDISAT0,Clear TXEN After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x8 13. "TXBREAK0,Transmit Data As Break" "0,1"
|
|
bitfld.long 0x8 12. "TXTRIAT0,Set TXTRI After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x8 11. "UBRXAT0,Unblock RX After Transmission" "0,1"
|
|
hexmask.long.word 0x8 0.--8. 1. "TXDATA0,TX Data"
|
|
line.long 0xC "TXDOUBLE,No Description"
|
|
hexmask.long.byte 0xC 8.--15. 1. "TXDATA1,TX Data"
|
|
hexmask.long.byte 0xC 0.--7. 1. "TXDATA0,TX Data"
|
|
group.long 0x48++0x23
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 16. "TCMP2,Timer comparator 2 Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 15. "TCMP1,Timer comparator 1 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "TCMP0,Timer comparator 0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 13. "TXIDLE,TX Idle Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "CCF,Collision Check Fail Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 11. "SSM,Chip-Select In Main Mode Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "MPAF,Multi-Processor Address Frame Interrupt" "0,1"
|
|
bitfld.long 0x0 9. "FERR,Framing Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "PERR,Parity Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 7. "TXUF,TX Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TXOF,TX Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 5. "RXUF,RX Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "RXOF,RX Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 3. "RXFULL,RX Buffer Full Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXDATAV,RX Data Valid Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 1. "TXBL,TX Buffer Level Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXC,TX Complete Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 16. "TCMP2,Timer comparator 2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 15. "TCMP1,Timer comparator 1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "TCMP0,Timer comparator 0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 13. "TXIDLE,TX Idle Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "CCF,Collision Check Fail Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 11. "SSM,Chip-Select In Main Mode Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "MPAF,Multi-Processor Address Frame Interrupt" "0,1"
|
|
bitfld.long 0x4 9. "FERR,Framing Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "PERR,Parity Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 7. "TXUF,TX Underflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "TXOF,TX Overflow Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 5. "RXUF,RX Underflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "RXOF,RX Overflow Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 3. "RXFULL,RX Buffer Full Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "RXDATAV,RX Data Valid Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 1. "TXBL,TX Buffer Level Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "TXC,TX Complete Interrupt Enable" "0,1"
|
|
line.long 0x8 "IRCTRL,No Description"
|
|
bitfld.long 0x8 3. "IRFILT,IrDA RX Filter" "0: No filter enabled,1: Filter enabled. IrDA pulse must be high for at.."
|
|
bitfld.long 0x8 1.--2. "IRPW,IrDA TX Pulse Width" "0: IrDA pulse width is 1/16 for OVS=0 and 1/8 for..,1: IrDA pulse width is 2/16 for OVS=0 and 2/8 for..,2: IrDA pulse width is 3/16 for OVS=0 and 3/8 for..,3: IrDA pulse width is 4/16 for OVS=0 and 4/8 for.."
|
|
newline
|
|
bitfld.long 0x8 0. "IREN,Enable IrDA Module" "0,1"
|
|
line.long 0xC "I2SCTRL,No Description"
|
|
bitfld.long 0xC 8.--10. "FORMAT,I2S Word Format" "0: 32-bit word 32-bit data,1: 32-bit word 32-bit data with 8 lsb masked,2: 32-bit word 24-bit data,3: 32-bit word 16-bit data,4: 32-bit word 8-bit data,5: 16-bit word 16-bit data,6: 16-bit word 8-bit data,7: 8-bit word 8-bit data"
|
|
bitfld.long 0xC 4. "DELAY,Delay on I2S data" "0,1"
|
|
newline
|
|
bitfld.long 0xC 3. "DMASPLIT,Separate DMA Request For Left/Right Data" "0,1"
|
|
bitfld.long 0xC 2. "JUSTIFY,Justification of I2S Data" "0: Data is left-justified,1: Data is right-justified"
|
|
newline
|
|
bitfld.long 0xC 1. "MONO,Stero or Mono" "0,1"
|
|
bitfld.long 0xC 0. "EN,Enable I2S Mode" "0,1"
|
|
line.long 0x10 "TIMING,No Description"
|
|
bitfld.long 0x10 28.--30. "CSHOLD,Chip Select Hold" "0: Disable CS being asserted after the end of..,1: CS is asserted for 1 baud-times after the end of..,2: CS is asserted for 2 baud-times after the end of..,3: CS is asserted for 3 baud-times after the end of..,4: CS is asserted for 7 baud-times after the end of..,5: CS is asserted after the end of transmission for..,6: CS is asserted after the end of transmission for..,7: CS is asserted after the end of transmission for.."
|
|
bitfld.long 0x10 24.--26. "ICS,Inter-character spacing" "0: There is no space between charcters,1: Create a space of 1 baud-times before start of..,2: Create a space of 2 baud-times before start of..,3: Create a space of 3 baud-times before start of..,4: Create a space of 7 baud-times before start of..,5: Create a space of before the start of..,6: Create a space of before the start of..,7: Create a space of before the start of.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "CSSETUP,Chip Select Setup" "0: CS is not asserted before start of transmission,1: CS is asserted for 1 baud-times before start of..,2: CS is asserted for 2 baud-times before start of..,3: CS is asserted for 3 baud-times before start of..,4: CS is asserted for 7 baud-times before start of..,5: CS is asserted before the start of transmission..,6: CS is asserted before the start of transmission..,7: CS is asserted before the start of transmission.."
|
|
bitfld.long 0x10 16.--18. "TXDELAY,TX frame start delay" "0: Disable - TXDELAY in USARTn_CTRL can be used for..,1: Start of transmission is delayed for 1 baud-times,2: Start of transmission is delayed for 2 baud-times,3: Start of transmission is delayed for 3 baud-times,4: Start of transmission is delayed for 7 baud-times,5: Start of transmission is delayed for TCMPVAL0..,6: Start of transmission is delayed for TCMPVAL1..,7: Start of transmission is delayed for TCMPVAL2.."
|
|
line.long 0x14 "CTRLX,No Description"
|
|
bitfld.long 0x14 15. "CLKPRSEN,PRS CLK Enable" "0,1"
|
|
bitfld.long 0x14 7. "RXPRSEN,PRS RX Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x14 3. "RTSINV,RTS Pin Inversion" "0: The USn_RTS pin is low true,1: The USn_RTS pin is high true"
|
|
bitfld.long 0x14 2. "CTSEN,CTS Function enabled" "0: Ingore CTS,1: Stop transmitting when CTS is negated"
|
|
newline
|
|
bitfld.long 0x14 1. "CTSINV,CTS Pin Inversion" "0: The USn_CTS pin is low true,1: The USn_CTS pin is high true"
|
|
bitfld.long 0x14 0. "DBGHALT,Debug halt" "0: Continue to transmit until TX buffer is empty,1: Negate RTS to stop link partner's transmission.."
|
|
line.long 0x18 "TIMECMP0,No Description"
|
|
bitfld.long 0x18 24. "RESTARTEN,Restart Timer on TCMP0" "0: Disable the timer restarting on TCMP0,1: Enable the timer restarting on TCMP0"
|
|
bitfld.long 0x18 20.--22. "TSTOP,Source used to disable comparator 0" "0: Comparator 0 is disabled when the counter equals..,1: Comparator 0 is disabled at TX start TX Engine,2: Comparator 0 is disabled on RX going going..,3: Comparator 0 is disabled on RX going Inactive,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x18 16.--18. "TSTART,Timer start source" "0: Comparator 0 is disabled,1: Comparator 0 and timer are started at TX end of..,2: Comparator 0 and timer are started at TX Complete,3: Comparator 0 and timer are started at RX going..,4: Comparator 0 and timer are started at RX end of..,?,?,?"
|
|
hexmask.long.byte 0x18 0.--7. 1. "TCMPVAL,Timer comparator 0."
|
|
line.long 0x1C "TIMECMP1,No Description"
|
|
bitfld.long 0x1C 24. "RESTARTEN,Restart Timer on TCMP1" "0: Disable the timer restarting on TCMP1,1: Enable the timer restarting on TCMP1"
|
|
bitfld.long 0x1C 20.--22. "TSTOP,Source used to disable comparator 1" "0: Comparator 1 is disabled when the counter equals..,1: Comparator 1 is disabled at TX start TX Engine,2: Comparator 1 is disabled on RX going going..,3: Comparator 1 is disabled on RX going Inactive,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--18. "TSTART,Timer start source" "0: Comparator 1 is disabled,1: Comparator 1 and timer are started at TX end of..,2: Comparator 1 and timer are started at TX Complete,3: Comparator 1 and timer are started at RX going..,4: Comparator 1 and timer are started at RX end of..,?,?,?"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "TCMPVAL,Timer comparator 1."
|
|
line.long 0x20 "TIMECMP2,No Description"
|
|
bitfld.long 0x20 24. "RESTARTEN,Restart Timer on TCMP2" "0: Disable the timer restarting on TCMP2,1: Enable the timer restarting on TCMP2"
|
|
bitfld.long 0x20 20.--22. "TSTOP,Source used to disable comparator 2" "0: Comparator 2 is disabled when the counter equals..,1: Comparator 2 is disabled at TX start TX Engine,2: Comparator 2 is disabled on RX going going..,3: Comparator 2 is disabled on RX going Inactive,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x20 16.--18. "TSTART,Timer start source" "0: Comparator 2 is disabled,1: Comparator 2 and timer are started at TX end of..,2: Comparator 2 and timer are started at TX Complete,3: Comparator 2 and timer are started at RX going..,4: Comparator 2 and timer are started at RX end of..,?,?,?"
|
|
hexmask.long.byte 0x20 0.--7. 1. "TCMPVAL,Timer comparator 2."
|
|
tree.end
|
|
tree "USART1_NS"
|
|
base ad:0x50060000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IPVERSION"
|
|
group.long 0x4++0xF
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,USART Enable" "0,1"
|
|
line.long 0x4 "CTRL,No Description"
|
|
bitfld.long 0x4 31. "SMSDELAY,Synchronous Main Sample Delay" "0,1"
|
|
bitfld.long 0x4 30. "MVDIS,Majority Vote Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "AUTOTX,Always Transmit When RX Not Full" "0,1"
|
|
bitfld.long 0x4 28. "BYTESWAP,Byteswap In Double Accesses" "0: Normal byte order,1: Byte order swapped"
|
|
newline
|
|
bitfld.long 0x4 25. "SSSEARLY,Synchronous Secondary Setup Early" "0,1"
|
|
bitfld.long 0x4 24. "ERRSTX,Disable TX On Error" "0: Received framing and parity errors have no..,1: Received framing and parity errors disable the.."
|
|
newline
|
|
bitfld.long 0x4 23. "ERRSRX,Disable RX On Error" "0: Framing and parity errors have no effect on..,1: Framing and parity errors disable the receiver"
|
|
bitfld.long 0x4 22. "ERRSDMA,Halt DMA On Error" "0: Framing and parity errors have no effect on DMA..,1: DMA requests from the USART are blocked while.."
|
|
newline
|
|
bitfld.long 0x4 21. "BIT8DV,Bit 8 Default Value" "0,1"
|
|
bitfld.long 0x4 20. "SKIPPERRF,Skip Parity Error Frames" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "SCRETRANS,SmartCard Retransmit" "0,1"
|
|
bitfld.long 0x4 18. "SCMODE,SmartCard Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "AUTOTRI,Automatic TX Tristate" "0: The output on U(S)n_TX when the transmitter is..,1: U(S)n_TX is tristated whenever the transmitter.."
|
|
bitfld.long 0x4 16. "AUTOCS,Automatic Chip Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "CSINV,Chip Select Invert" "0: Chip select is active low,1: Chip select is active high"
|
|
bitfld.long 0x4 14. "TXINV,Transmitter output Invert" "0: Output from the transmitter is passed unchanged..,1: Output from the transmitter is inverted before.."
|
|
newline
|
|
bitfld.long 0x4 13. "RXINV,Receiver Input Invert" "0: Input is passed directly to the receiver,1: Input is inverted before it is passed to the.."
|
|
bitfld.long 0x4 12. "TXBIL,TX Buffer Interrupt Level" "0: TXBL and the TXBL interrupt flag are set when..,1: TXBL and TXBLIF are set when the transmit buffer.."
|
|
newline
|
|
bitfld.long 0x4 11. "CSMA,Action On Chip Select In Main Mode" "0: No action taken,1: Go to secondary mode"
|
|
bitfld.long 0x4 10. "MSBF,Most Significant Bit First" "0: Data is sent with the least significant bit first,1: Data is sent with the most significant bit first"
|
|
newline
|
|
bitfld.long 0x4 9. "CLKPHA,Clock Edge For Setup/Sample" "0: Data is sampled on the leading edge and set-up..,1: Data is set-up on the leading edge and sampled.."
|
|
bitfld.long 0x4 8. "CLKPOL,Clock Polarity" "0: The bus clock used in synchronous mode has a low..,1: The bus clock used in synchronous mode has a.."
|
|
newline
|
|
bitfld.long 0x4 5.--6. "OVS,Oversampling" "0: Regular UART mode with 16X oversampling in..,1: Double speed with 8X oversampling in..,2: 6X oversampling in asynchronous mode,3: Quadruple speed with 4X oversampling in.."
|
|
bitfld.long 0x4 4. "MPAB,Multi-Processor Address-Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "MPM,Multi-Processor Mode" "0: The 9th bit of incoming frames has no special..,1: An incoming frame with the 9th bit equal to MPAB.."
|
|
bitfld.long 0x4 2. "CCEN,Collision Check Enable" "0: Collision check is disabled,1: Collision check is enabled. The receiver must be.."
|
|
newline
|
|
bitfld.long 0x4 1. "LOOPBK,Loopback Enable" "0: The receiver is connected to and receives data..,1: The receiver is connected to and receives data.."
|
|
bitfld.long 0x4 0. "SYNC,USART Synchronous Mode" "0: The USART operates in asynchronous mode,1: The USART operates in synchronous mode"
|
|
line.long 0x8 "FRAME,No Description"
|
|
bitfld.long 0x8 12.--13. "STOPBITS,Stop-Bit Mode" "0: The transmitter generates a half stop bit.,1: One stop bit is generated and verified,2: The transmitter generates one and a half stop..,3: The transmitter generates two stop bits. The.."
|
|
bitfld.long 0x8 8.--9. "PARITY,Parity-Bit Mode" "0: Parity bits are not used,?,2: Even parity are used. Parity bits are..,3: Odd parity is used. Parity bits are.."
|
|
newline
|
|
hexmask.long.byte 0x8 0.--3. 1. "DATABITS,Data-Bit Mode"
|
|
line.long 0xC "TRIGCTRL,No Description"
|
|
bitfld.long 0xC 12. "RXATX2EN,Enable Receive Trigger after TX end of f" "0,1"
|
|
bitfld.long 0xC 11. "RXATX1EN,Enable Receive Trigger after TX end of f" "0,1"
|
|
newline
|
|
bitfld.long 0xC 10. "RXATX0EN,Enable Receive Trigger after TX end of f" "0,1"
|
|
bitfld.long 0xC 9. "TXARX2EN,Enable Transmit Trigger after RX End of" "0,1"
|
|
newline
|
|
bitfld.long 0xC 8. "TXARX1EN,Enable Transmit Trigger after RX End of" "0,1"
|
|
bitfld.long 0xC 7. "TXARX0EN,Enable Transmit Trigger after RX End of" "0,1"
|
|
newline
|
|
bitfld.long 0xC 6. "AUTOTXTEN,AUTOTX Trigger Enable" "0,1"
|
|
bitfld.long 0xC 5. "TXTEN,Transmit Trigger Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 4. "RXTEN,Receive Trigger Enable" "0,1"
|
|
wgroup.long 0x14++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 11. "CLEARRX,Clear RX" "0,1"
|
|
bitfld.long 0x0 10. "CLEARTX,Clear TX" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXTRIDIS,Transmitter Tristate Disable" "0,1"
|
|
bitfld.long 0x0 8. "TXTRIEN,Transmitter Tristate Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "RXBLOCKDIS,Receiver Block Disable" "0,1"
|
|
bitfld.long 0x0 6. "RXBLOCKEN,Receiver Block Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "MASTERDIS,Main Mode Disable" "0,1"
|
|
bitfld.long 0x0 4. "MASTEREN,Main Mode Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "TXDIS,Transmitter Disable" "0,1"
|
|
bitfld.long 0x0 2. "TXEN,Transmitter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXDIS,Receiver Disable" "0,1"
|
|
bitfld.long 0x0 0. "RXEN,Receiver Enable" "0,1"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 16.--17. "TXBUFCNT,TX Buffer Count" "0,1,2,3"
|
|
bitfld.long 0x0 14. "TIMERRESTARTED,The USART Timer restarted itself" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TXIDLE,TX Idle" "0,1"
|
|
bitfld.long 0x0 12. "RXFULLRIGHT,RX Full of Right Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "RXDATAVRIGHT,RX Data Right" "0,1"
|
|
bitfld.long 0x0 10. "TXBSRIGHT,TX Buffer Expects Single Right Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXBDRIGHT,TX Buffer Expects Double Right Data" "0,1"
|
|
bitfld.long 0x0 8. "RXFULL,RX FIFO Full" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "RXDATAV,RX Data Valid" "0,1"
|
|
bitfld.long 0x0 6. "TXBL,TX Buffer Level" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "TXC,TX Complete" "0,1"
|
|
bitfld.long 0x0 4. "TXTRI,Transmitter Tristated" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RXBLOCK,Block Incoming Data" "0,1"
|
|
bitfld.long 0x0 2. "MASTER,SPI Main Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXENS,Transmitter Enable Status" "0,1"
|
|
bitfld.long 0x0 0. "RXENS,Receiver Enable Status" "0,1"
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "CLKDIV,No Description"
|
|
bitfld.long 0x0 31. "AUTOBAUDEN,AUTOBAUD detection enable" "0,1"
|
|
hexmask.long.tbyte 0x0 3.--22. 1. "DIV,Fractional Clock Divider"
|
|
rgroup.long 0x20++0x17
|
|
line.long 0x0 "RXDATAX,No Description"
|
|
bitfld.long 0x0 15. "FERR,Data Framing Error" "0,1"
|
|
bitfld.long 0x0 14. "PERR,Data Parity Error" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--8. 1. "RXDATA,RX Data"
|
|
line.long 0x4 "RXDATA,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "RXDATA,RX Data"
|
|
line.long 0x8 "RXDOUBLEX,No Description"
|
|
bitfld.long 0x8 31. "FERR1,Data Framing Error 1" "0,1"
|
|
bitfld.long 0x8 30. "PERR1,Data Parity Error 1" "0,1"
|
|
newline
|
|
hexmask.long.word 0x8 16.--24. 1. "RXDATA1,RX Data 1"
|
|
bitfld.long 0x8 15. "FERR0,Data Framing Error 0" "0,1"
|
|
newline
|
|
bitfld.long 0x8 14. "PERR0,Data Parity Error 0" "0,1"
|
|
hexmask.long.word 0x8 0.--8. 1. "RXDATA0,RX Data 0"
|
|
line.long 0xC "RXDOUBLE,No Description"
|
|
hexmask.long.byte 0xC 8.--15. 1. "RXDATA1,RX Data 1"
|
|
hexmask.long.byte 0xC 0.--7. 1. "RXDATA0,RX Data 0"
|
|
line.long 0x10 "RXDATAXP,No Description"
|
|
bitfld.long 0x10 15. "FERRP,Data Framing Error Peek" "0,1"
|
|
bitfld.long 0x10 14. "PERRP,Data Parity Error Peek" "0,1"
|
|
newline
|
|
hexmask.long.word 0x10 0.--8. 1. "RXDATAP,RX Data Peek"
|
|
line.long 0x14 "RXDOUBLEXP,No Description"
|
|
bitfld.long 0x14 31. "FERRP1,Data Framing Error 1 Peek" "0,1"
|
|
bitfld.long 0x14 30. "PERRP1,Data Parity Error 1 Peek" "0,1"
|
|
newline
|
|
hexmask.long.word 0x14 16.--24. 1. "RXDATAP1,RX Data 1 Peek"
|
|
bitfld.long 0x14 15. "FERRP0,Data Framing Error 0 Peek" "0,1"
|
|
newline
|
|
bitfld.long 0x14 14. "PERRP0,Data Parity Error 0 Peek" "0,1"
|
|
hexmask.long.word 0x14 0.--8. 1. "RXDATAP0,RX Data 0 Peek"
|
|
wgroup.long 0x38++0xF
|
|
line.long 0x0 "TXDATAX,No Description"
|
|
bitfld.long 0x0 15. "RXENAT,Enable RX After Transmission" "0,1"
|
|
bitfld.long 0x0 14. "TXDISAT,Clear TXEN After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TXBREAK,Transmit Data As Break" "0,1"
|
|
bitfld.long 0x0 12. "TXTRIAT,Set TXTRI After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "UBRXAT,Unblock RX After Transmission" "0,1"
|
|
hexmask.long.word 0x0 0.--8. 1. "TXDATAX,TX Data"
|
|
line.long 0x4 "TXDATA,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "TXDATA,TX Data"
|
|
line.long 0x8 "TXDOUBLEX,No Description"
|
|
bitfld.long 0x8 31. "RXENAT1,Enable RX After Transmission" "0,1"
|
|
bitfld.long 0x8 30. "TXDISAT1,Clear TXEN After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x8 29. "TXBREAK1,Transmit Data As Break" "0,1"
|
|
bitfld.long 0x8 28. "TXTRIAT1,Set TXTRI After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x8 27. "UBRXAT1,Unblock RX After Transmission" "0,1"
|
|
hexmask.long.word 0x8 16.--24. 1. "TXDATA1,TX Data"
|
|
newline
|
|
bitfld.long 0x8 15. "RXENAT0,Enable RX After Transmission" "0,1"
|
|
bitfld.long 0x8 14. "TXDISAT0,Clear TXEN After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x8 13. "TXBREAK0,Transmit Data As Break" "0,1"
|
|
bitfld.long 0x8 12. "TXTRIAT0,Set TXTRI After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x8 11. "UBRXAT0,Unblock RX After Transmission" "0,1"
|
|
hexmask.long.word 0x8 0.--8. 1. "TXDATA0,TX Data"
|
|
line.long 0xC "TXDOUBLE,No Description"
|
|
hexmask.long.byte 0xC 8.--15. 1. "TXDATA1,TX Data"
|
|
hexmask.long.byte 0xC 0.--7. 1. "TXDATA0,TX Data"
|
|
group.long 0x48++0x23
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 16. "TCMP2,Timer comparator 2 Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 15. "TCMP1,Timer comparator 1 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "TCMP0,Timer comparator 0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 13. "TXIDLE,TX Idle Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "CCF,Collision Check Fail Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 11. "SSM,Chip-Select In Main Mode Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "MPAF,Multi-Processor Address Frame Interrupt" "0,1"
|
|
bitfld.long 0x0 9. "FERR,Framing Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "PERR,Parity Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 7. "TXUF,TX Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TXOF,TX Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 5. "RXUF,RX Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "RXOF,RX Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 3. "RXFULL,RX Buffer Full Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXDATAV,RX Data Valid Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 1. "TXBL,TX Buffer Level Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXC,TX Complete Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 16. "TCMP2,Timer comparator 2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 15. "TCMP1,Timer comparator 1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "TCMP0,Timer comparator 0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 13. "TXIDLE,TX Idle Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "CCF,Collision Check Fail Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 11. "SSM,Chip-Select In Main Mode Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "MPAF,Multi-Processor Address Frame Interrupt" "0,1"
|
|
bitfld.long 0x4 9. "FERR,Framing Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "PERR,Parity Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 7. "TXUF,TX Underflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "TXOF,TX Overflow Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 5. "RXUF,RX Underflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "RXOF,RX Overflow Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 3. "RXFULL,RX Buffer Full Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "RXDATAV,RX Data Valid Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 1. "TXBL,TX Buffer Level Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "TXC,TX Complete Interrupt Enable" "0,1"
|
|
line.long 0x8 "IRCTRL,No Description"
|
|
bitfld.long 0x8 3. "IRFILT,IrDA RX Filter" "0: No filter enabled,1: Filter enabled. IrDA pulse must be high for at.."
|
|
bitfld.long 0x8 1.--2. "IRPW,IrDA TX Pulse Width" "0: IrDA pulse width is 1/16 for OVS=0 and 1/8 for..,1: IrDA pulse width is 2/16 for OVS=0 and 2/8 for..,2: IrDA pulse width is 3/16 for OVS=0 and 3/8 for..,3: IrDA pulse width is 4/16 for OVS=0 and 4/8 for.."
|
|
newline
|
|
bitfld.long 0x8 0. "IREN,Enable IrDA Module" "0,1"
|
|
line.long 0xC "I2SCTRL,No Description"
|
|
bitfld.long 0xC 8.--10. "FORMAT,I2S Word Format" "0: 32-bit word 32-bit data,1: 32-bit word 32-bit data with 8 lsb masked,2: 32-bit word 24-bit data,3: 32-bit word 16-bit data,4: 32-bit word 8-bit data,5: 16-bit word 16-bit data,6: 16-bit word 8-bit data,7: 8-bit word 8-bit data"
|
|
bitfld.long 0xC 4. "DELAY,Delay on I2S data" "0,1"
|
|
newline
|
|
bitfld.long 0xC 3. "DMASPLIT,Separate DMA Request For Left/Right Data" "0,1"
|
|
bitfld.long 0xC 2. "JUSTIFY,Justification of I2S Data" "0: Data is left-justified,1: Data is right-justified"
|
|
newline
|
|
bitfld.long 0xC 1. "MONO,Stero or Mono" "0,1"
|
|
bitfld.long 0xC 0. "EN,Enable I2S Mode" "0,1"
|
|
line.long 0x10 "TIMING,No Description"
|
|
bitfld.long 0x10 28.--30. "CSHOLD,Chip Select Hold" "0: Disable CS being asserted after the end of..,1: CS is asserted for 1 baud-times after the end of..,2: CS is asserted for 2 baud-times after the end of..,3: CS is asserted for 3 baud-times after the end of..,4: CS is asserted for 7 baud-times after the end of..,5: CS is asserted after the end of transmission for..,6: CS is asserted after the end of transmission for..,7: CS is asserted after the end of transmission for.."
|
|
bitfld.long 0x10 24.--26. "ICS,Inter-character spacing" "0: There is no space between charcters,1: Create a space of 1 baud-times before start of..,2: Create a space of 2 baud-times before start of..,3: Create a space of 3 baud-times before start of..,4: Create a space of 7 baud-times before start of..,5: Create a space of before the start of..,6: Create a space of before the start of..,7: Create a space of before the start of.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "CSSETUP,Chip Select Setup" "0: CS is not asserted before start of transmission,1: CS is asserted for 1 baud-times before start of..,2: CS is asserted for 2 baud-times before start of..,3: CS is asserted for 3 baud-times before start of..,4: CS is asserted for 7 baud-times before start of..,5: CS is asserted before the start of transmission..,6: CS is asserted before the start of transmission..,7: CS is asserted before the start of transmission.."
|
|
bitfld.long 0x10 16.--18. "TXDELAY,TX frame start delay" "0: Disable - TXDELAY in USARTn_CTRL can be used for..,1: Start of transmission is delayed for 1 baud-times,2: Start of transmission is delayed for 2 baud-times,3: Start of transmission is delayed for 3 baud-times,4: Start of transmission is delayed for 7 baud-times,5: Start of transmission is delayed for TCMPVAL0..,6: Start of transmission is delayed for TCMPVAL1..,7: Start of transmission is delayed for TCMPVAL2.."
|
|
line.long 0x14 "CTRLX,No Description"
|
|
bitfld.long 0x14 15. "CLKPRSEN,PRS CLK Enable" "0,1"
|
|
bitfld.long 0x14 7. "RXPRSEN,PRS RX Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x14 3. "RTSINV,RTS Pin Inversion" "0: The USn_RTS pin is low true,1: The USn_RTS pin is high true"
|
|
bitfld.long 0x14 2. "CTSEN,CTS Function enabled" "0: Ingore CTS,1: Stop transmitting when CTS is negated"
|
|
newline
|
|
bitfld.long 0x14 1. "CTSINV,CTS Pin Inversion" "0: The USn_CTS pin is low true,1: The USn_CTS pin is high true"
|
|
bitfld.long 0x14 0. "DBGHALT,Debug halt" "0: Continue to transmit until TX buffer is empty,1: Negate RTS to stop link partner's transmission.."
|
|
line.long 0x18 "TIMECMP0,No Description"
|
|
bitfld.long 0x18 24. "RESTARTEN,Restart Timer on TCMP0" "0: Disable the timer restarting on TCMP0,1: Enable the timer restarting on TCMP0"
|
|
bitfld.long 0x18 20.--22. "TSTOP,Source used to disable comparator 0" "0: Comparator 0 is disabled when the counter equals..,1: Comparator 0 is disabled at TX start TX Engine,2: Comparator 0 is disabled on RX going going..,3: Comparator 0 is disabled on RX going Inactive,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x18 16.--18. "TSTART,Timer start source" "0: Comparator 0 is disabled,1: Comparator 0 and timer are started at TX end of..,2: Comparator 0 and timer are started at TX Complete,3: Comparator 0 and timer are started at RX going..,4: Comparator 0 and timer are started at RX end of..,?,?,?"
|
|
hexmask.long.byte 0x18 0.--7. 1. "TCMPVAL,Timer comparator 0."
|
|
line.long 0x1C "TIMECMP1,No Description"
|
|
bitfld.long 0x1C 24. "RESTARTEN,Restart Timer on TCMP1" "0: Disable the timer restarting on TCMP1,1: Enable the timer restarting on TCMP1"
|
|
bitfld.long 0x1C 20.--22. "TSTOP,Source used to disable comparator 1" "0: Comparator 1 is disabled when the counter equals..,1: Comparator 1 is disabled at TX start TX Engine,2: Comparator 1 is disabled on RX going going..,3: Comparator 1 is disabled on RX going Inactive,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--18. "TSTART,Timer start source" "0: Comparator 1 is disabled,1: Comparator 1 and timer are started at TX end of..,2: Comparator 1 and timer are started at TX Complete,3: Comparator 1 and timer are started at RX going..,4: Comparator 1 and timer are started at RX end of..,?,?,?"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "TCMPVAL,Timer comparator 1."
|
|
line.long 0x20 "TIMECMP2,No Description"
|
|
bitfld.long 0x20 24. "RESTARTEN,Restart Timer on TCMP2" "0: Disable the timer restarting on TCMP2,1: Enable the timer restarting on TCMP2"
|
|
bitfld.long 0x20 20.--22. "TSTOP,Source used to disable comparator 2" "0: Comparator 2 is disabled when the counter equals..,1: Comparator 2 is disabled at TX start TX Engine,2: Comparator 2 is disabled on RX going going..,3: Comparator 2 is disabled on RX going Inactive,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x20 16.--18. "TSTART,Timer start source" "0: Comparator 2 is disabled,1: Comparator 2 and timer are started at TX end of..,2: Comparator 2 and timer are started at TX Complete,3: Comparator 2 and timer are started at RX going..,4: Comparator 2 and timer are started at RX end of..,?,?,?"
|
|
hexmask.long.byte 0x20 0.--7. 1. "TCMPVAL,Timer comparator 2."
|
|
tree.end
|
|
tree "USART1_S"
|
|
base ad:0x40060000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IPVERSION"
|
|
group.long 0x4++0xF
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,USART Enable" "0,1"
|
|
line.long 0x4 "CTRL,No Description"
|
|
bitfld.long 0x4 31. "SMSDELAY,Synchronous Main Sample Delay" "0,1"
|
|
bitfld.long 0x4 30. "MVDIS,Majority Vote Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "AUTOTX,Always Transmit When RX Not Full" "0,1"
|
|
bitfld.long 0x4 28. "BYTESWAP,Byteswap In Double Accesses" "0: Normal byte order,1: Byte order swapped"
|
|
newline
|
|
bitfld.long 0x4 25. "SSSEARLY,Synchronous Secondary Setup Early" "0,1"
|
|
bitfld.long 0x4 24. "ERRSTX,Disable TX On Error" "0: Received framing and parity errors have no..,1: Received framing and parity errors disable the.."
|
|
newline
|
|
bitfld.long 0x4 23. "ERRSRX,Disable RX On Error" "0: Framing and parity errors have no effect on..,1: Framing and parity errors disable the receiver"
|
|
bitfld.long 0x4 22. "ERRSDMA,Halt DMA On Error" "0: Framing and parity errors have no effect on DMA..,1: DMA requests from the USART are blocked while.."
|
|
newline
|
|
bitfld.long 0x4 21. "BIT8DV,Bit 8 Default Value" "0,1"
|
|
bitfld.long 0x4 20. "SKIPPERRF,Skip Parity Error Frames" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "SCRETRANS,SmartCard Retransmit" "0,1"
|
|
bitfld.long 0x4 18. "SCMODE,SmartCard Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "AUTOTRI,Automatic TX Tristate" "0: The output on U(S)n_TX when the transmitter is..,1: U(S)n_TX is tristated whenever the transmitter.."
|
|
bitfld.long 0x4 16. "AUTOCS,Automatic Chip Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "CSINV,Chip Select Invert" "0: Chip select is active low,1: Chip select is active high"
|
|
bitfld.long 0x4 14. "TXINV,Transmitter output Invert" "0: Output from the transmitter is passed unchanged..,1: Output from the transmitter is inverted before.."
|
|
newline
|
|
bitfld.long 0x4 13. "RXINV,Receiver Input Invert" "0: Input is passed directly to the receiver,1: Input is inverted before it is passed to the.."
|
|
bitfld.long 0x4 12. "TXBIL,TX Buffer Interrupt Level" "0: TXBL and the TXBL interrupt flag are set when..,1: TXBL and TXBLIF are set when the transmit buffer.."
|
|
newline
|
|
bitfld.long 0x4 11. "CSMA,Action On Chip Select In Main Mode" "0: No action taken,1: Go to secondary mode"
|
|
bitfld.long 0x4 10. "MSBF,Most Significant Bit First" "0: Data is sent with the least significant bit first,1: Data is sent with the most significant bit first"
|
|
newline
|
|
bitfld.long 0x4 9. "CLKPHA,Clock Edge For Setup/Sample" "0: Data is sampled on the leading edge and set-up..,1: Data is set-up on the leading edge and sampled.."
|
|
bitfld.long 0x4 8. "CLKPOL,Clock Polarity" "0: The bus clock used in synchronous mode has a low..,1: The bus clock used in synchronous mode has a.."
|
|
newline
|
|
bitfld.long 0x4 5.--6. "OVS,Oversampling" "0: Regular UART mode with 16X oversampling in..,1: Double speed with 8X oversampling in..,2: 6X oversampling in asynchronous mode,3: Quadruple speed with 4X oversampling in.."
|
|
bitfld.long 0x4 4. "MPAB,Multi-Processor Address-Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "MPM,Multi-Processor Mode" "0: The 9th bit of incoming frames has no special..,1: An incoming frame with the 9th bit equal to MPAB.."
|
|
bitfld.long 0x4 2. "CCEN,Collision Check Enable" "0: Collision check is disabled,1: Collision check is enabled. The receiver must be.."
|
|
newline
|
|
bitfld.long 0x4 1. "LOOPBK,Loopback Enable" "0: The receiver is connected to and receives data..,1: The receiver is connected to and receives data.."
|
|
bitfld.long 0x4 0. "SYNC,USART Synchronous Mode" "0: The USART operates in asynchronous mode,1: The USART operates in synchronous mode"
|
|
line.long 0x8 "FRAME,No Description"
|
|
bitfld.long 0x8 12.--13. "STOPBITS,Stop-Bit Mode" "0: The transmitter generates a half stop bit.,1: One stop bit is generated and verified,2: The transmitter generates one and a half stop..,3: The transmitter generates two stop bits. The.."
|
|
bitfld.long 0x8 8.--9. "PARITY,Parity-Bit Mode" "0: Parity bits are not used,?,2: Even parity are used. Parity bits are..,3: Odd parity is used. Parity bits are.."
|
|
newline
|
|
hexmask.long.byte 0x8 0.--3. 1. "DATABITS,Data-Bit Mode"
|
|
line.long 0xC "TRIGCTRL,No Description"
|
|
bitfld.long 0xC 12. "RXATX2EN,Enable Receive Trigger after TX end of f" "0,1"
|
|
bitfld.long 0xC 11. "RXATX1EN,Enable Receive Trigger after TX end of f" "0,1"
|
|
newline
|
|
bitfld.long 0xC 10. "RXATX0EN,Enable Receive Trigger after TX end of f" "0,1"
|
|
bitfld.long 0xC 9. "TXARX2EN,Enable Transmit Trigger after RX End of" "0,1"
|
|
newline
|
|
bitfld.long 0xC 8. "TXARX1EN,Enable Transmit Trigger after RX End of" "0,1"
|
|
bitfld.long 0xC 7. "TXARX0EN,Enable Transmit Trigger after RX End of" "0,1"
|
|
newline
|
|
bitfld.long 0xC 6. "AUTOTXTEN,AUTOTX Trigger Enable" "0,1"
|
|
bitfld.long 0xC 5. "TXTEN,Transmit Trigger Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 4. "RXTEN,Receive Trigger Enable" "0,1"
|
|
wgroup.long 0x14++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 11. "CLEARRX,Clear RX" "0,1"
|
|
bitfld.long 0x0 10. "CLEARTX,Clear TX" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXTRIDIS,Transmitter Tristate Disable" "0,1"
|
|
bitfld.long 0x0 8. "TXTRIEN,Transmitter Tristate Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "RXBLOCKDIS,Receiver Block Disable" "0,1"
|
|
bitfld.long 0x0 6. "RXBLOCKEN,Receiver Block Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "MASTERDIS,Main Mode Disable" "0,1"
|
|
bitfld.long 0x0 4. "MASTEREN,Main Mode Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "TXDIS,Transmitter Disable" "0,1"
|
|
bitfld.long 0x0 2. "TXEN,Transmitter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXDIS,Receiver Disable" "0,1"
|
|
bitfld.long 0x0 0. "RXEN,Receiver Enable" "0,1"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 16.--17. "TXBUFCNT,TX Buffer Count" "0,1,2,3"
|
|
bitfld.long 0x0 14. "TIMERRESTARTED,The USART Timer restarted itself" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TXIDLE,TX Idle" "0,1"
|
|
bitfld.long 0x0 12. "RXFULLRIGHT,RX Full of Right Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "RXDATAVRIGHT,RX Data Right" "0,1"
|
|
bitfld.long 0x0 10. "TXBSRIGHT,TX Buffer Expects Single Right Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXBDRIGHT,TX Buffer Expects Double Right Data" "0,1"
|
|
bitfld.long 0x0 8. "RXFULL,RX FIFO Full" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "RXDATAV,RX Data Valid" "0,1"
|
|
bitfld.long 0x0 6. "TXBL,TX Buffer Level" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "TXC,TX Complete" "0,1"
|
|
bitfld.long 0x0 4. "TXTRI,Transmitter Tristated" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RXBLOCK,Block Incoming Data" "0,1"
|
|
bitfld.long 0x0 2. "MASTER,SPI Main Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXENS,Transmitter Enable Status" "0,1"
|
|
bitfld.long 0x0 0. "RXENS,Receiver Enable Status" "0,1"
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "CLKDIV,No Description"
|
|
bitfld.long 0x0 31. "AUTOBAUDEN,AUTOBAUD detection enable" "0,1"
|
|
hexmask.long.tbyte 0x0 3.--22. 1. "DIV,Fractional Clock Divider"
|
|
rgroup.long 0x20++0x17
|
|
line.long 0x0 "RXDATAX,No Description"
|
|
bitfld.long 0x0 15. "FERR,Data Framing Error" "0,1"
|
|
bitfld.long 0x0 14. "PERR,Data Parity Error" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--8. 1. "RXDATA,RX Data"
|
|
line.long 0x4 "RXDATA,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "RXDATA,RX Data"
|
|
line.long 0x8 "RXDOUBLEX,No Description"
|
|
bitfld.long 0x8 31. "FERR1,Data Framing Error 1" "0,1"
|
|
bitfld.long 0x8 30. "PERR1,Data Parity Error 1" "0,1"
|
|
newline
|
|
hexmask.long.word 0x8 16.--24. 1. "RXDATA1,RX Data 1"
|
|
bitfld.long 0x8 15. "FERR0,Data Framing Error 0" "0,1"
|
|
newline
|
|
bitfld.long 0x8 14. "PERR0,Data Parity Error 0" "0,1"
|
|
hexmask.long.word 0x8 0.--8. 1. "RXDATA0,RX Data 0"
|
|
line.long 0xC "RXDOUBLE,No Description"
|
|
hexmask.long.byte 0xC 8.--15. 1. "RXDATA1,RX Data 1"
|
|
hexmask.long.byte 0xC 0.--7. 1. "RXDATA0,RX Data 0"
|
|
line.long 0x10 "RXDATAXP,No Description"
|
|
bitfld.long 0x10 15. "FERRP,Data Framing Error Peek" "0,1"
|
|
bitfld.long 0x10 14. "PERRP,Data Parity Error Peek" "0,1"
|
|
newline
|
|
hexmask.long.word 0x10 0.--8. 1. "RXDATAP,RX Data Peek"
|
|
line.long 0x14 "RXDOUBLEXP,No Description"
|
|
bitfld.long 0x14 31. "FERRP1,Data Framing Error 1 Peek" "0,1"
|
|
bitfld.long 0x14 30. "PERRP1,Data Parity Error 1 Peek" "0,1"
|
|
newline
|
|
hexmask.long.word 0x14 16.--24. 1. "RXDATAP1,RX Data 1 Peek"
|
|
bitfld.long 0x14 15. "FERRP0,Data Framing Error 0 Peek" "0,1"
|
|
newline
|
|
bitfld.long 0x14 14. "PERRP0,Data Parity Error 0 Peek" "0,1"
|
|
hexmask.long.word 0x14 0.--8. 1. "RXDATAP0,RX Data 0 Peek"
|
|
wgroup.long 0x38++0xF
|
|
line.long 0x0 "TXDATAX,No Description"
|
|
bitfld.long 0x0 15. "RXENAT,Enable RX After Transmission" "0,1"
|
|
bitfld.long 0x0 14. "TXDISAT,Clear TXEN After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TXBREAK,Transmit Data As Break" "0,1"
|
|
bitfld.long 0x0 12. "TXTRIAT,Set TXTRI After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "UBRXAT,Unblock RX After Transmission" "0,1"
|
|
hexmask.long.word 0x0 0.--8. 1. "TXDATAX,TX Data"
|
|
line.long 0x4 "TXDATA,No Description"
|
|
hexmask.long.byte 0x4 0.--7. 1. "TXDATA,TX Data"
|
|
line.long 0x8 "TXDOUBLEX,No Description"
|
|
bitfld.long 0x8 31. "RXENAT1,Enable RX After Transmission" "0,1"
|
|
bitfld.long 0x8 30. "TXDISAT1,Clear TXEN After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x8 29. "TXBREAK1,Transmit Data As Break" "0,1"
|
|
bitfld.long 0x8 28. "TXTRIAT1,Set TXTRI After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x8 27. "UBRXAT1,Unblock RX After Transmission" "0,1"
|
|
hexmask.long.word 0x8 16.--24. 1. "TXDATA1,TX Data"
|
|
newline
|
|
bitfld.long 0x8 15. "RXENAT0,Enable RX After Transmission" "0,1"
|
|
bitfld.long 0x8 14. "TXDISAT0,Clear TXEN After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x8 13. "TXBREAK0,Transmit Data As Break" "0,1"
|
|
bitfld.long 0x8 12. "TXTRIAT0,Set TXTRI After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x8 11. "UBRXAT0,Unblock RX After Transmission" "0,1"
|
|
hexmask.long.word 0x8 0.--8. 1. "TXDATA0,TX Data"
|
|
line.long 0xC "TXDOUBLE,No Description"
|
|
hexmask.long.byte 0xC 8.--15. 1. "TXDATA1,TX Data"
|
|
hexmask.long.byte 0xC 0.--7. 1. "TXDATA0,TX Data"
|
|
group.long 0x48++0x23
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 16. "TCMP2,Timer comparator 2 Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 15. "TCMP1,Timer comparator 1 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "TCMP0,Timer comparator 0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 13. "TXIDLE,TX Idle Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "CCF,Collision Check Fail Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 11. "SSM,Chip-Select In Main Mode Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "MPAF,Multi-Processor Address Frame Interrupt" "0,1"
|
|
bitfld.long 0x0 9. "FERR,Framing Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "PERR,Parity Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 7. "TXUF,TX Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TXOF,TX Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 5. "RXUF,RX Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "RXOF,RX Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 3. "RXFULL,RX Buffer Full Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXDATAV,RX Data Valid Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 1. "TXBL,TX Buffer Level Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXC,TX Complete Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 16. "TCMP2,Timer comparator 2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 15. "TCMP1,Timer comparator 1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "TCMP0,Timer comparator 0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 13. "TXIDLE,TX Idle Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "CCF,Collision Check Fail Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 11. "SSM,Chip-Select In Main Mode Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "MPAF,Multi-Processor Address Frame Interrupt" "0,1"
|
|
bitfld.long 0x4 9. "FERR,Framing Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "PERR,Parity Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 7. "TXUF,TX Underflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "TXOF,TX Overflow Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 5. "RXUF,RX Underflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "RXOF,RX Overflow Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 3. "RXFULL,RX Buffer Full Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "RXDATAV,RX Data Valid Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 1. "TXBL,TX Buffer Level Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "TXC,TX Complete Interrupt Enable" "0,1"
|
|
line.long 0x8 "IRCTRL,No Description"
|
|
bitfld.long 0x8 3. "IRFILT,IrDA RX Filter" "0: No filter enabled,1: Filter enabled. IrDA pulse must be high for at.."
|
|
bitfld.long 0x8 1.--2. "IRPW,IrDA TX Pulse Width" "0: IrDA pulse width is 1/16 for OVS=0 and 1/8 for..,1: IrDA pulse width is 2/16 for OVS=0 and 2/8 for..,2: IrDA pulse width is 3/16 for OVS=0 and 3/8 for..,3: IrDA pulse width is 4/16 for OVS=0 and 4/8 for.."
|
|
newline
|
|
bitfld.long 0x8 0. "IREN,Enable IrDA Module" "0,1"
|
|
line.long 0xC "I2SCTRL,No Description"
|
|
bitfld.long 0xC 8.--10. "FORMAT,I2S Word Format" "0: 32-bit word 32-bit data,1: 32-bit word 32-bit data with 8 lsb masked,2: 32-bit word 24-bit data,3: 32-bit word 16-bit data,4: 32-bit word 8-bit data,5: 16-bit word 16-bit data,6: 16-bit word 8-bit data,7: 8-bit word 8-bit data"
|
|
bitfld.long 0xC 4. "DELAY,Delay on I2S data" "0,1"
|
|
newline
|
|
bitfld.long 0xC 3. "DMASPLIT,Separate DMA Request For Left/Right Data" "0,1"
|
|
bitfld.long 0xC 2. "JUSTIFY,Justification of I2S Data" "0: Data is left-justified,1: Data is right-justified"
|
|
newline
|
|
bitfld.long 0xC 1. "MONO,Stero or Mono" "0,1"
|
|
bitfld.long 0xC 0. "EN,Enable I2S Mode" "0,1"
|
|
line.long 0x10 "TIMING,No Description"
|
|
bitfld.long 0x10 28.--30. "CSHOLD,Chip Select Hold" "0: Disable CS being asserted after the end of..,1: CS is asserted for 1 baud-times after the end of..,2: CS is asserted for 2 baud-times after the end of..,3: CS is asserted for 3 baud-times after the end of..,4: CS is asserted for 7 baud-times after the end of..,5: CS is asserted after the end of transmission for..,6: CS is asserted after the end of transmission for..,7: CS is asserted after the end of transmission for.."
|
|
bitfld.long 0x10 24.--26. "ICS,Inter-character spacing" "0: There is no space between charcters,1: Create a space of 1 baud-times before start of..,2: Create a space of 2 baud-times before start of..,3: Create a space of 3 baud-times before start of..,4: Create a space of 7 baud-times before start of..,5: Create a space of before the start of..,6: Create a space of before the start of..,7: Create a space of before the start of.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "CSSETUP,Chip Select Setup" "0: CS is not asserted before start of transmission,1: CS is asserted for 1 baud-times before start of..,2: CS is asserted for 2 baud-times before start of..,3: CS is asserted for 3 baud-times before start of..,4: CS is asserted for 7 baud-times before start of..,5: CS is asserted before the start of transmission..,6: CS is asserted before the start of transmission..,7: CS is asserted before the start of transmission.."
|
|
bitfld.long 0x10 16.--18. "TXDELAY,TX frame start delay" "0: Disable - TXDELAY in USARTn_CTRL can be used for..,1: Start of transmission is delayed for 1 baud-times,2: Start of transmission is delayed for 2 baud-times,3: Start of transmission is delayed for 3 baud-times,4: Start of transmission is delayed for 7 baud-times,5: Start of transmission is delayed for TCMPVAL0..,6: Start of transmission is delayed for TCMPVAL1..,7: Start of transmission is delayed for TCMPVAL2.."
|
|
line.long 0x14 "CTRLX,No Description"
|
|
bitfld.long 0x14 15. "CLKPRSEN,PRS CLK Enable" "0,1"
|
|
bitfld.long 0x14 7. "RXPRSEN,PRS RX Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x14 3. "RTSINV,RTS Pin Inversion" "0: The USn_RTS pin is low true,1: The USn_RTS pin is high true"
|
|
bitfld.long 0x14 2. "CTSEN,CTS Function enabled" "0: Ingore CTS,1: Stop transmitting when CTS is negated"
|
|
newline
|
|
bitfld.long 0x14 1. "CTSINV,CTS Pin Inversion" "0: The USn_CTS pin is low true,1: The USn_CTS pin is high true"
|
|
bitfld.long 0x14 0. "DBGHALT,Debug halt" "0: Continue to transmit until TX buffer is empty,1: Negate RTS to stop link partner's transmission.."
|
|
line.long 0x18 "TIMECMP0,No Description"
|
|
bitfld.long 0x18 24. "RESTARTEN,Restart Timer on TCMP0" "0: Disable the timer restarting on TCMP0,1: Enable the timer restarting on TCMP0"
|
|
bitfld.long 0x18 20.--22. "TSTOP,Source used to disable comparator 0" "0: Comparator 0 is disabled when the counter equals..,1: Comparator 0 is disabled at TX start TX Engine,2: Comparator 0 is disabled on RX going going..,3: Comparator 0 is disabled on RX going Inactive,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x18 16.--18. "TSTART,Timer start source" "0: Comparator 0 is disabled,1: Comparator 0 and timer are started at TX end of..,2: Comparator 0 and timer are started at TX Complete,3: Comparator 0 and timer are started at RX going..,4: Comparator 0 and timer are started at RX end of..,?,?,?"
|
|
hexmask.long.byte 0x18 0.--7. 1. "TCMPVAL,Timer comparator 0."
|
|
line.long 0x1C "TIMECMP1,No Description"
|
|
bitfld.long 0x1C 24. "RESTARTEN,Restart Timer on TCMP1" "0: Disable the timer restarting on TCMP1,1: Enable the timer restarting on TCMP1"
|
|
bitfld.long 0x1C 20.--22. "TSTOP,Source used to disable comparator 1" "0: Comparator 1 is disabled when the counter equals..,1: Comparator 1 is disabled at TX start TX Engine,2: Comparator 1 is disabled on RX going going..,3: Comparator 1 is disabled on RX going Inactive,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--18. "TSTART,Timer start source" "0: Comparator 1 is disabled,1: Comparator 1 and timer are started at TX end of..,2: Comparator 1 and timer are started at TX Complete,3: Comparator 1 and timer are started at RX going..,4: Comparator 1 and timer are started at RX end of..,?,?,?"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "TCMPVAL,Timer comparator 1."
|
|
line.long 0x20 "TIMECMP2,No Description"
|
|
bitfld.long 0x20 24. "RESTARTEN,Restart Timer on TCMP2" "0: Disable the timer restarting on TCMP2,1: Enable the timer restarting on TCMP2"
|
|
bitfld.long 0x20 20.--22. "TSTOP,Source used to disable comparator 2" "0: Comparator 2 is disabled when the counter equals..,1: Comparator 2 is disabled at TX start TX Engine,2: Comparator 2 is disabled on RX going going..,3: Comparator 2 is disabled on RX going Inactive,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x20 16.--18. "TSTART,Timer start source" "0: Comparator 2 is disabled,1: Comparator 2 and timer are started at TX end of..,2: Comparator 2 and timer are started at TX Complete,3: Comparator 2 and timer are started at RX going..,4: Comparator 2 and timer are started at RX end of..,?,?,?"
|
|
hexmask.long.byte 0x20 0.--7. 1. "TCMPVAL,Timer comparator 2."
|
|
tree.end
|
|
tree.end
|
|
tree "WDOG (Watch Dog Timer)"
|
|
base ad:0x0
|
|
tree "WDOG0_NS"
|
|
base ad:0x5A018000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,Module Enable" "0,1"
|
|
line.long 0x4 "CFG,No Description"
|
|
bitfld.long 0x4 28.--30. "WINSEL,WDOG Illegal Window Select" "0: Disabled.,1: Window timeout is 12.5% of the Timeout.,2: Window timeout is 25% of the Timeout.,3: Window timeout is 37.5% of the Timeout.,4: Window timeout is 50% of the Timeout.,5: Window timeout is 62.5% of the Timeout.,6: Window timeout is 75.5% of the Timeout.,7: Window timeout is 87.5% of the Timeout."
|
|
bitfld.long 0x4 24.--25. "WARNSEL,WDOG Warning Period Select" "0: Disable,1: Warning timeout is 25% of the Timeout.,2: Warning timeout is 50% of the Timeout.,3: Warning timeout is 75% of the Timeout."
|
|
newline
|
|
hexmask.long.byte 0x4 16.--19. 1. "PERSEL,WDOG Timeout Period Select"
|
|
bitfld.long 0x4 10. "PRS1MISSRSTEN,PRS Src1 Missing Event WDOG Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "PRS0MISSRSTEN,PRS Src0 Missing Event WDOG Reset" "0,1"
|
|
bitfld.long 0x4 8. "WDOGRSTDIS,WDOG Reset Disable" "0: A timeout will cause a WDOG reset,1: A timeout will not cause a WDOG reset"
|
|
newline
|
|
bitfld.long 0x4 4. "DEBUGRUN,Debug Mode Run" "0: WDOG timer is frozen in debug mode,1: WDOG timer is running in debug mode"
|
|
bitfld.long 0x4 3. "EM4BLOCK,EM4 Block" "0: EM4 can be entered by software. See EMU for..,1: EM4 cannot be entered by software."
|
|
newline
|
|
bitfld.long 0x4 2. "EM3RUN,EM3 Run" "0: WDOG timer is frozen in EM3.,1: WDOG timer is running in EM3."
|
|
bitfld.long 0x4 1. "EM2RUN,EM2 Run" "0: WDOG timer is frozen in EM2.,1: WDOG timer is running in EM2."
|
|
newline
|
|
bitfld.long 0x4 0. "CLRSRC,WDOG Clear Source" "0: A write to the clear bit will clear the WDOG..,1: A rising edge on the PRS Source 0 will clear the.."
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 0. "CLEAR,WDOG Timer Clear" "0: WDOG timer is unchanged.,1: WDOG timer is cleared to 0."
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 31. "LOCK,WDOG Configuration Lock Status" "0: All WDOG lockable registers are unlocked.,1: All WDOG lockable registers are locked."
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 4. "PEM1,PRS Src1 Event Missing Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 3. "PEM0,PRS Src0 Event Missing Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "WIN,WDOG Window Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 1. "WARN,WDOG Warning Timeout Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TOUT,WDOG Timeout Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 4. "PEM1,PRS Src1 Event Missing Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 3. "PEM0,PRS Src0 Event Missing Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "WIN,WDOG Window Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 1. "WARN,WDOG Warning Timeout Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "TOUT,WDOG Timeout Interrupt Enable" "0,1"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,WDOG Configuration Lock"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x0 "SYNCBUSY,No Description"
|
|
bitfld.long 0x0 0. "CMD,Sync Busy for Cmd Register" "0,1"
|
|
tree.end
|
|
tree "WDOG0_S"
|
|
base ad:0x4A018000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IPVERSION,No Description"
|
|
hexmask.long 0x0 0.--31. 1. "IPVERSION,IP Version"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "EN,No Description"
|
|
bitfld.long 0x0 0. "EN,Module Enable" "0,1"
|
|
line.long 0x4 "CFG,No Description"
|
|
bitfld.long 0x4 28.--30. "WINSEL,WDOG Illegal Window Select" "0: Disabled.,1: Window timeout is 12.5% of the Timeout.,2: Window timeout is 25% of the Timeout.,3: Window timeout is 37.5% of the Timeout.,4: Window timeout is 50% of the Timeout.,5: Window timeout is 62.5% of the Timeout.,6: Window timeout is 75.5% of the Timeout.,7: Window timeout is 87.5% of the Timeout."
|
|
bitfld.long 0x4 24.--25. "WARNSEL,WDOG Warning Period Select" "0: Disable,1: Warning timeout is 25% of the Timeout.,2: Warning timeout is 50% of the Timeout.,3: Warning timeout is 75% of the Timeout."
|
|
newline
|
|
hexmask.long.byte 0x4 16.--19. 1. "PERSEL,WDOG Timeout Period Select"
|
|
bitfld.long 0x4 10. "PRS1MISSRSTEN,PRS Src1 Missing Event WDOG Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "PRS0MISSRSTEN,PRS Src0 Missing Event WDOG Reset" "0,1"
|
|
bitfld.long 0x4 8. "WDOGRSTDIS,WDOG Reset Disable" "0: A timeout will cause a WDOG reset,1: A timeout will not cause a WDOG reset"
|
|
newline
|
|
bitfld.long 0x4 4. "DEBUGRUN,Debug Mode Run" "0: WDOG timer is frozen in debug mode,1: WDOG timer is running in debug mode"
|
|
bitfld.long 0x4 3. "EM4BLOCK,EM4 Block" "0: EM4 can be entered by software. See EMU for..,1: EM4 cannot be entered by software."
|
|
newline
|
|
bitfld.long 0x4 2. "EM3RUN,EM3 Run" "0: WDOG timer is frozen in EM3.,1: WDOG timer is running in EM3."
|
|
bitfld.long 0x4 1. "EM2RUN,EM2 Run" "0: WDOG timer is frozen in EM2.,1: WDOG timer is running in EM2."
|
|
newline
|
|
bitfld.long 0x4 0. "CLRSRC,WDOG Clear Source" "0: A write to the clear bit will clear the WDOG..,1: A rising edge on the PRS Source 0 will clear the.."
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "CMD,No Description"
|
|
bitfld.long 0x0 0. "CLEAR,WDOG Timer Clear" "0: WDOG timer is unchanged.,1: WDOG timer is cleared to 0."
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "STATUS,No Description"
|
|
bitfld.long 0x0 31. "LOCK,WDOG Configuration Lock Status" "0: All WDOG lockable registers are unlocked.,1: All WDOG lockable registers are locked."
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "IF,No Description"
|
|
bitfld.long 0x0 4. "PEM1,PRS Src1 Event Missing Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 3. "PEM0,PRS Src0 Event Missing Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "WIN,WDOG Window Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 1. "WARN,WDOG Warning Timeout Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TOUT,WDOG Timeout Interrupt Flag" "0,1"
|
|
line.long 0x4 "IEN,No Description"
|
|
bitfld.long 0x4 4. "PEM1,PRS Src1 Event Missing Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 3. "PEM0,PRS Src0 Event Missing Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "WIN,WDOG Window Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 1. "WARN,WDOG Warning Timeout Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "TOUT,WDOG Timeout Interrupt Enable" "0,1"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "LOCK,No Description"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOCKKEY,WDOG Configuration Lock"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x0 "SYNCBUSY,No Description"
|
|
bitfld.long 0x0 0. "CMD,Sync Busy for Cmd Register" "0,1"
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.OFF
|