8004 lines
549 KiB
Plaintext
8004 lines
549 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: EFM32HGxxx On-Chip Peripherals
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; @Props: Released
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; @Author: DPR, MJE, BCA, RMG
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; @Changelog: 2018-05-22 DPR
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; @Manufacturer: SiliconLabs - Silicon Laboratories Inc.
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; @Doc: EFM32HG-RM.pdf (d0321_Rev0.90, 2015-03-16)
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; EFM32HG108.pdf (d0291_Rev1.00, 2015-12-04)
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; EFM32HG110.pdf (d0292_Rev1.00, 2015-12-04)
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; EFM32HG210.pdf (d0293_Rev1.00, 2015-12-04)
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; EFM32HG222.pdf (d0294_Rev1.00, 2015-12-04)
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; EFM32HG308.pdf (d0295_Rev1.00, 2015-12-04)
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; EFM32HG309.pdf (d0296_Rev1.00, 2015-12-04)
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; EFM32HG310.pdf (d0297_Rev1.00, 2015-12-04)
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; EFM32HG321.pdf (d0298_Rev1.00, 2015-12-04)
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; EFM32HG322.pdf (d0299_Rev1.00, 2015-12-04)
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; EFM32HG350.pdf (d0300_Rev1.00, 2015-12-04)
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; @Core: Cortex-M0+
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; @Chip: EFM32HG108F32, EFM32HG108F64, EFM32HG110F32, EFM32HG110F64,
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; EFM32HG210F32, EFM32HG210F64, EFM32HG222F32, EFM32HG222F64,
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; EFM32HG308F32, EFM32HG308F64, EFM32HG309F32, EFM32HG309F64,
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; EFM32HG310F32 ,EFM32HG310F64, EFM32HG321F32, EFM32HG321F64,
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; EFM32HG322F32, EFM32HG322F64, EFM32HG350F32, EFM32HG350F64
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; @Copyright: (C) 1989-2018 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perefm32hgxxx.per 12537 2020-11-13 13:58:59Z amerkle $
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; Known Problems:
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; MODULE REGISTER DESCRIPTION
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; --------------------------------------------------------------------------------
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; USB USB_DCFG Missing descriptions for bit 15 ERRATICINTMSK
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; DBG There is no base address to DBG module.
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config 16. 8.
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tree.close "Core Registers (Cortex-M0+)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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tree "System Control"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 0x8
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if (CORENAME()=="CORTEXM1")
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group.long 0x10++0x0b
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line.long 0x00 "STCSR,SysTick Control and Status Register"
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bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
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bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "No effect,Processor clock"
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textline " "
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bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
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bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
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line.long 0x04 "STRVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
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line.long 0x08 "STCVR,SysTick Current Value Register"
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hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
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else
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group.long 0x10++0x0b
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line.long 0x00 "STCSR,SysTick Control and Status Register"
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bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
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bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "External clock,Processor clock"
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textline " "
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bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
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bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
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line.long 0x04 "STRVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
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line.long 0x08 "STCVR,SysTick Current Value Register"
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hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
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endif
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if (CORENAME()=="CORTEXM1")
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rgroup.long 0x1c++0x03
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line.long 0x00 "STCR,SysTick Calibration Value Register"
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bitfld.long 0x00 31. " NOREF ,Reads as one" "0,1"
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bitfld.long 0x00 30. " SKEW ,Reads as zero" "0,1"
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textline " "
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Indicates calibration value is not known"
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else
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rgroup.long 0x1c++0x03
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line.long 0x00 "STCR,SysTick Calibration Value Register"
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bitfld.long 0x00 31. " NOREF ,Indicates whether the IMPL_DEF reference clock is provided" "Implemented,Not implemented"
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bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
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textline " "
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing subject to system clock skew errors"
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endif
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rgroup.long 0xd00++0x03
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line.long 0x00 "CPUID,CPU ID Base Register"
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hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer code"
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hexmask.long.byte 0x00 20.--23. 1. " VARIANT ,Implementation defined variant number"
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textline " "
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hexmask.long.byte 0x00 4.--15. 1. " PARTNO ,Number of processor within family"
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hexmask.long.byte 0x00 0.--3. 1. " REVISION ,Implementation defined revision number"
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group.long 0xd04++0x03
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line.long 0x00 "ICSR,Interrupt Control State Register"
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bitfld.long 0x00 31. " NMIPENDSET ,Setting this bit will activate an NMI" "No effect,Set pending"
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bitfld.long 0x00 28. " PENDSVSET ,Set a pending PendSV interrupt" "No effect,Set pending"
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textline " "
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bitfld.long 0x00 27. " PENDSVCLR ,Clear a pending PendSV interrupt" "No effect,Clear pending"
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bitfld.long 0x00 26. " PENDSTSET ,Set a pending SysTick" "No effect,Set pending"
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textline " "
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bitfld.long 0x00 25. " PENDSVCLR ,Clear a pending SysTick" "No effect,Clear pending"
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bitfld.long 0x00 23. " ISRPREEMPT ,Pending exception service" "No service,Service"
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textline " "
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bitfld.long 0x00 22. " ISRPENDING ,External interrupt pending flag" "No interrupt,Interrupt"
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hexmask.long.byte 0x00 12.--17. 1. " VECTPENDING ,Active exception number field"
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textline " "
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hexmask.long.byte 0x00 0.--5. 1. " VECTACTIVET ,Active exception number field"
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if (CORENAME()=="CORTEXM0+")
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group.long 0xd08++0x03
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line.long 0x00 "VTOR,Vector Table Offset Register"
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hexmask.long 0x00 7.--31. 0x80 " TBLOFF ,Vector table address"
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else
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textline " "
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endif
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group.long 0xd0c++0x03
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line.long 0x00 "AIRCR,Application Interrupt and Reset Control Register"
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hexmask.long.word 0x00 16.--31. 1. " VECTKEY ,Vector Key"
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bitfld.long 0x00 15. " ENDIANNESS ,Data endianness bit" "Little-endian,Big-endian"
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textline " "
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bitfld.long 0x00 2. " SYSRESETREQ ,System reset setup request" "No effect,Reset"
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bitfld.long 0x00 1. " VECTCLRACTIVE ,Clears all active state information" "No clear,Clear"
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group.long 0xd10++0x03
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line.long 0x00 "SCR,System Control Register"
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bitfld.long 0x00 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
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bitfld.long 0x00 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
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textline " "
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bitfld.long 0x00 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
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rgroup.long 0xd14++0x03
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line.long 0x00 "CCR,Configuration and Control Register"
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bitfld.long 0x00 9. " STKALIGN ,Indicates whether on exception entry all exceptions are entered with 8-byte stack alignment and the context to restore it is saved" "Reserved,Aligned"
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bitfld.long 0x00 3. " UNALIGN_TRP ,Indicates that all unaligned accesses results in a Hard Fault" "Reserved,Trapped"
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group.long 0xd1c++0x0b
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line.long 0x00 "SHPR2,System Handler Priority Register 2"
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bitfld.long 0x00 30.--31. " PRI_11 ,Priority of system handler 11-SVCall" "00,01,10,11"
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line.long 0x04 "SHPR3,System Handler Priority Register 3"
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bitfld.long 0x04 30.--31. " PRI_15 ,Priority of system handler 15-SysTick" "00,01,10,11"
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bitfld.long 0x04 22.--23. " PRI_14 ,Priority of system handler 14- PendSV" "00,01,10,11"
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line.long 0x08 "SHCSR,System Handler Control and State Register"
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bitfld.long 0x08 15. " SVCALLPENDED ,Reads as 1 if SVCall is pending" "Not pending,Pending"
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if (CORENAME()=="CORTEXM0+")
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hgroup.long 0x08++0x03
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hide.long 0x00 "ACTLR,Auxiliary Control Register"
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else
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textline " "
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endif
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else
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newline
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textline "COREDEBUG component base address not specified"
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newline
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endif
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tree.end
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tree "Memory Protection Unit (MPU)"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 15.
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rgroup.long 0xD90++0x03
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line.long 0x00 "MPU_TYPE,MPU Type Register"
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bitfld.long 0x00 8.--15. 1. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,?..."
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group.long 0xD94++0x03
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line.long 0x00 "MPU_CTRL,MPU Control Register"
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bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
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bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
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bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
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group.long 0xD98++0x03
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line.long 0x00 "MPU_RNR,MPU Region Number Register"
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hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
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tree.close "MPU regions"
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if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
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group.long 0xD9C++0x03 "Region 0"
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saveout 0xD98 %l 0x0
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line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
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hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
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group.long 0xDA0++0x03
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saveout 0xD98 %l 0x0
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line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
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bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
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bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
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bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
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textline " "
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bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
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bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
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bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
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textline " "
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bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
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bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
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bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
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bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
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bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
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bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
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bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
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bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
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bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
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bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
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else
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hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
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saveout 0xD98 %l 0x0
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hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
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hgroup.long 0xDA0++0x03
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saveout 0xD98 %l 0x0
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hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
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textline " "
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textline " "
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endif
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if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
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group.long 0xD9C++0x03 "Region 1"
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saveout 0xD98 %l 0x1
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line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
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hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
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group.long 0xDA0++0x03
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saveout 0xD98 %l 0x1
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line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
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bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
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bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
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bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
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textline " "
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bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
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bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
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bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
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textline " "
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bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
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bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
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bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
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bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
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bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
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bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
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bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
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bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
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bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
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bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
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else
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hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
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saveout 0xD98 %l 0x1
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hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
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hgroup.long 0xDA0++0x03
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saveout 0xD98 %l 0x1
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hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
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textline " "
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textline " "
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endif
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if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
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group.long 0xD9C++0x03 "Region 2"
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saveout 0xD98 %l 0x2
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line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
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|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
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group.long 0xDA0++0x03
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saveout 0xD98 %l 0x2
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|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
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|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
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|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
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bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
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|
textline " "
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|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
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bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
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bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
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textline " "
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|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
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bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
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|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
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bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
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|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
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bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
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bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
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bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
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|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
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|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
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|
else
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|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
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|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hgroup.long 0xDA0++0x03
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|
saveout 0xD98 %l 0x2
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|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
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textline " "
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|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
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|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
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|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
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|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller (NVIC)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 12.
|
|
tree "Interrupt Enable Registers"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "SET/CLREN,Interrupt Set/Clear Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "SET/CLRPEN,Interrupt Set/Clear Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
tree.end
|
|
width 6.
|
|
tree "Interrupt Priority Registers"
|
|
group.long 0x400++0x1F
|
|
line.long 0x00 "INT0,Interrupt Priority Register"
|
|
bitfld.long 0x00 30.--31. " IP_3 ,Priority of interrupt 3" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. " IP_2 ,Priority of interrupt 2" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. " IP_1 ,Priority of interrupt 1" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " IP_0 ,Priority of interrupt 0" "0,1,2,3"
|
|
line.long 0x04 "INT1,Interrupt Priority Register"
|
|
bitfld.long 0x04 30.--31. " IP_7 ,Priority of interrupt 7" "0,1,2,3"
|
|
bitfld.long 0x04 22.--23. " IP_6 ,Priority of interrupt 6" "0,1,2,3"
|
|
bitfld.long 0x04 14.--15. " IP_5 ,Priority of interrupt 5" "0,1,2,3"
|
|
bitfld.long 0x04 6.--7. " IP_4 ,Priority of interrupt 4" "0,1,2,3"
|
|
line.long 0x08 "INT2,Interrupt Priority Register"
|
|
bitfld.long 0x08 30.--31. " IP_11 ,Priority of interrupt 11" "0,1,2,3"
|
|
bitfld.long 0x08 22.--23. " IP_10 ,Priority of interrupt 10" "0,1,2,3"
|
|
bitfld.long 0x08 14.--15. " IP_9 ,Priority of interrupt 9" "0,1,2,3"
|
|
bitfld.long 0x08 6.--7. " IP_8 ,Priority of interrupt 8" "0,1,2,3"
|
|
line.long 0x0C "INT3,Interrupt Priority Register"
|
|
bitfld.long 0x0C 30.--31. " IP_15 ,Priority of interrupt 15" "0,1,2,3"
|
|
bitfld.long 0x0C 22.--23. " IP_14 ,Priority of interrupt 14" "0,1,2,3"
|
|
bitfld.long 0x0C 14.--15. " IP_13 ,Priority of interrupt 13" "0,1,2,3"
|
|
bitfld.long 0x0C 6.--7. " IP_12 ,Priority of interrupt 12" "0,1,2,3"
|
|
line.long 0x10 "INT4,Interrupt Priority Register"
|
|
bitfld.long 0x10 30.--31. " IP_19 ,Priority of interrupt 19" "0,1,2,3"
|
|
bitfld.long 0x10 22.--23. " IP_18 ,Priority of interrupt 18" "0,1,2,3"
|
|
bitfld.long 0x10 14.--15. " IP_17 ,Priority of interrupt 17" "0,1,2,3"
|
|
bitfld.long 0x10 6.--7. " IP_16 ,Priority of interrupt 16" "0,1,2,3"
|
|
line.long 0x14 "INT5,Interrupt Priority Register"
|
|
bitfld.long 0x14 30.--31. " IP_23 ,Priority of interrupt 23" "0,1,2,3"
|
|
bitfld.long 0x14 22.--23. " IP_22 ,Priority of interrupt 22" "0,1,2,3"
|
|
bitfld.long 0x14 14.--15. " IP_21 ,Priority of interrupt 21" "0,1,2,3"
|
|
bitfld.long 0x14 6.--7. " IP_20 ,Priority of interrupt 20" "0,1,2,3"
|
|
line.long 0x18 "INT6,Interrupt Priority Register"
|
|
bitfld.long 0x18 30.--31. " IP_27 ,Priority of interrupt 27" "0,1,2,3"
|
|
bitfld.long 0x18 22.--23. " IP_26 ,Priority of interrupt 26" "0,1,2,3"
|
|
bitfld.long 0x18 14.--15. " IP_25 ,Priority of interrupt 25" "0,1,2,3"
|
|
bitfld.long 0x18 6.--7. " IP_24 ,Priority of interrupt 24" "0,1,2,3"
|
|
line.long 0x1C "INT7,Interrupt Priority Register"
|
|
bitfld.long 0x1C 30.--31. " IP_31 ,Priority of interrupt 31" "0,1,2,3"
|
|
bitfld.long 0x1C 22.--23. " IP_30 ,Priority of interrupt 30" "0,1,2,3"
|
|
bitfld.long 0x1C 14.--15. " IP_29 ,Priority of interrupt 29" "0,1,2,3"
|
|
bitfld.long 0x1C 6.--7. " IP_28 ,Priority of interrupt 28" "0,1,2,3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 0xA
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,External debug request flag" "No occurred,Occurred"
|
|
eventfld.long 0x00 3. " VCATCH ,Vector catch flag" "No occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 2. " DWTRAP ,Data Watchpoint flag" "No match,Match"
|
|
textline " "
|
|
eventfld.long 0x00 1. " BKPT ,BKPT flag" "No match,Match"
|
|
eventfld.long 0x00 0. " HALTED ,Halt request flag" "No request,Request"
|
|
if (CORENAME()=="CORTEXM1")
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
textline " "
|
|
textfld " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
textline " "
|
|
textfld " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Selector Register"
|
|
bitfld.long 0x00 16. " REGWnR ,Register Read/Write" "Read,Write"
|
|
bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,Current SP,LR,DebugReturnAddress,xPSR Flags,MSP,PSP,Reserved,CONTROL[1]/PRIMASK[0],?..."
|
|
group.long 0xDF8++0x07
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,Data for reading and writing registers to and from the processor"
|
|
line.long 0x04 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x04 24. " DWTENA ,Global enable or disable for the DW unit" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " VC_HARDERR ,Debug trap on a Hard Fault" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 0. " VC_CORERESET ,Reset Vector Catch" "No reset,Reset"
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Breakpoint Unit (BPU)"
|
|
sif COMPonent.AVAILABLE("BPU")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BPU",-1))
|
|
width 8.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "BP_CTRL,Breakpoint Control Register"
|
|
bitfld.long 0x00 4.--7. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1. " KEY ,Key field" "No write,Write"
|
|
bitfld.long 0x00 0. " ENABLE ,Breakpoint unit enable bit" "Disabled,Enabled"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "B_COMP0,Breakpoint Comparator Registers 0"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 0" "Disabled,Enabled"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "B_COMP1,Breakpoint Comparator Registers 1"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 1" "Disabled,Enabled"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "B_COMP2,Breakpoint Comparator Registers 2"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 2" "Disabled,Enabled"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "B_COMP3,Breakpoint Comparator Registers 3"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 3" "Disabled,Enabled"
|
|
else
|
|
newline
|
|
textline "BPU component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 14.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "DW_CTRL,DW Control Register "
|
|
bitfld.long 0x00 28.--31. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "DW_PCSR,DW Program Counter Sample Register"
|
|
hexmask.long 0x00 0.--31. 1. " EIASAMPLE ,Execution instruction address sample or 0xFFFFFFFF"
|
|
group.long 0x20++0x0b
|
|
line.long 0x00 "DW_COMP0,DW Comparator Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " COMP1 ,Compare against PC or the data address"
|
|
line.long 0x04 "DW_MASK0,DW Mask Register 0"
|
|
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
|
|
line.long 0x08 "DW_FUNCTION0,DW Function Register 0"
|
|
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
|
|
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
|
|
group.long 0x30++0x0b
|
|
line.long 0x00 "DW_COMP1,DW Comparator Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " COMP ,Compare against PC or the data address"
|
|
line.long 0x04 "DW_MASK1,DW Mask Register 1 "
|
|
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
|
|
line.long 0x08 "DW_FUNCTION1,DW Function Register 1"
|
|
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
|
|
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
; tree "DBG (Debug Interface)"
|
|
; base ad:0x0
|
|
; %include ${TOPDIR}/arm/cortex/energymicro/efm32lgxxx/dbg.ph
|
|
; tree.end
|
|
tree "MSC (Memory System Controller)"
|
|
base ad:0x400C0000
|
|
width 16.
|
|
group.long 0x00++0x0B
|
|
line.long 0x00 "MSC_CTRL,Memory System Control Register"
|
|
bitfld.long 0x00 0. " BUSFAULT ,Bus Error Response" "Generate,Ignore"
|
|
line.long 0x04 "MSC_READCTRL,Read Control Register"
|
|
sif (cpuis("EFM32GG*")||(cpuis("EFM32LG*"))||(cpuis("EFM32WG*")))
|
|
bitfld.long 0x04 16.--17. " BUSSTRATEGY ,Strategy for bus matrix" "CPU,DMA,DMAEM1,NONE"
|
|
bitfld.long 0x04 8. " PREFETCH ,Prefetch Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " RAMCEN ,RAM Cache Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " EBICDIS ,External Bus Interface Cache Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x04 5. " ICCDIS ,Interrupt Context Cache Disable" "No,Yes"
|
|
bitfld.long 0x04 4. " AIDIS ,Automatic Invalidate Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x04 3. " IFCDIS ,Internal Flash Cache Disable" "No,Yes"
|
|
bitfld.long 0x04 0.--2. " MODE ,Read Mode" "WS0,WS1,WS0SCBTP,WS1SCBTP,WS2,WS2SCBTP,?..."
|
|
elif (cpuis("EFM32TG*"))
|
|
bitfld.long 0x04 5. " ICCDIS ,Interrupt Context Cache Disable" "No,Yes"
|
|
bitfld.long 0x04 4. " AIDIS ,Automatic Invalidate Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x04 3. " IFCDIS ,Internal Flash Cache Disable" "No,Yes"
|
|
bitfld.long 0x04 0.--2. " MODE ,Read Mode" "WS0,WS1,WS0SCBTP,WS1SCBTP,?..."
|
|
elif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x04 7. " RAMCEN ,RAM Cache Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " AIDIS ,Automatic Invalidate Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x04 3. " IFCDIS ,Internal Flash Cache Disable" "No,Yes"
|
|
bitfld.long 0x04 0.--2. " MODE ,Read Mode" "WS0,WS1,?..."
|
|
else
|
|
bitfld.long 0x04 0.--2. " MODE ,Read Mode" "WS0,WS1,WS0SCBTP,WS1SCBTP,?..."
|
|
endif
|
|
line.long 0x08 "MSC_WRITECTRL,Write Control Register"
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32LG*"))
|
|
bitfld.long 0x08 5. " RWWEN ,Read-While-Write Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " LPERASE ,Low-Power Erase" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " LPWRITE ,Low-Power Write" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " WDOUBLE ,Write two words at a time" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x08 1. " IRQERASEABORT ,Abort Page Erase on Interrupt" "Not aborted,Aborted"
|
|
bitfld.long 0x08 0. " WREN ,Write and Erase Enable" "Disabled,Enabled"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "MSC_WRITECMD,Write Command Register"
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32LG*"))
|
|
bitfld.long 0x00 12. " CLEARWDATA ,Clear WDATA state" "No effect,Clear"
|
|
bitfld.long 0x00 9. " ERASEMAIN1 ,Mass erase region 1" "No effect,Erase"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ERASEMAIN0 ,Mass erase region 0" "No effect,Erase"
|
|
bitfld.long 0x00 5. " ERASEABORT ,Abort erase sequence" "No effect,Abort"
|
|
textline " "
|
|
elif (cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 12. " CLEARWDATA ,Clear WDATA state" "No effect,Clear"
|
|
bitfld.long 0x00 8. " ERASEMAIN0 ,Mass erase region 0" "No effect,Erase"
|
|
textline " "
|
|
bitfld.long 0x00 5. " ERASEABORT ,Abort erase sequence" "No effect,Abort"
|
|
textline " "
|
|
elif (cpuis("EFM32TG*"))
|
|
bitfld.long 0x00 5. " ERASEABORT ,Abort erase sequence" "No effect,Abort"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 4. " WRITETRIG ,Word Write Sequence Trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 3. " WRITEONCE ,Word Write-Once Trigger" "No effect,Trigger"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WRITEEND ,End Write Mode" "No effect,End"
|
|
bitfld.long 0x00 1. " ERASEPAGE ,Erase Page" "No effect,Erase"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LADDRIM ,Load MSC_ADDRB into ADDR" "No effect,Load"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "ADDRB,WTCR Page Erase or Write Address Buffer"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "MSC_WDATA,Write Data Register"
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "MSC_STATUS,Status Register"
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 6. " PCRUNNING ,Performance Counters Running" "Not running,Running"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 5. " ERASEABORTED ,Flash Operation Aborted" "Not aborted,Aborted"
|
|
bitfld.long 0x00 4. " WORDTIMEOUT ,Flash Write Word Timeout" "No timeout,Timeout"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WDATAREADY ,WDATA Write Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 2. " INVADDR ,Invalid Write Address or Erase Page" "Valid,Invalid"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LOCKED ,Access Locked" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " BUSY ,Erase/Write Busy" "Not busy,Busy"
|
|
group.long 0x2c++0x03
|
|
line.long 0x00 "MSC_IF,Interrupt Flag Register"
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " CMOF_set/clr ,Cache Misses Overflow Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " CHOF_set/clr ,Cache Hits Overflow Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " WRITE_set/clr ,Write Done Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " ERASE_set/clr ,Erase Done Interrupt Flag" "No interrupt,Interrupt"
|
|
group.long 0x38++0x07
|
|
line.long 0x00 "MSC_IEN, Interrupt Enable Register"
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 3. " CMOF ,Cache Misses Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CHOF ,Cache Hits Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 1. " WRITE , Write Done Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ERASE , Erase Done Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x04 "MSC_LOCK, Configuration Lock Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " LOCKKEY ,Configurartion Lock"
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*"))
|
|
wgroup.long 0x40++0x03
|
|
line.long 0x00 "MSC_CMD,Command Register"
|
|
bitfld.long 0x00 2. " STOPPC ,Stop Performance Counters" "No effect,Stop"
|
|
bitfld.long 0x00 1. " STARTPC ,Start Performance Counters" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 0. " INVCACHE ,Invalidate Instruction Cache" "No effect,Invalidate"
|
|
rgroup.long 0x44++0x07
|
|
line.long 0x00 "MSC_CACHEHITS,Cache Hits Performance Counter"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " CACHEHITS ,Cache hits since last performance counter start command"
|
|
line.long 0x04 "MSC_CACHEMISSES,Cache Misses Performance Counter"
|
|
hexmask.long.tbyte 0x04 0.--19. 1. " CACHEMISSES ,Cache misses since last performance counter start command"
|
|
group.long 0x50++0x3
|
|
line.long 0x00 "MSC_TIMEBASE,Flash Write and Erase Timebase"
|
|
bitfld.long 0x00 16. " PERIOD ,Sets the timebase period" "1us,5us"
|
|
hexmask.long.byte 0x00 0.--5. 1. " BASE ,Timebase used by MSC to time flash writes and erases"
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
group.long 0x54++0x3
|
|
line.long 0x00 "MSC_MASSLOCK,Mass Erase Lock Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " LOCKKEY ,Mass Erase Lock"
|
|
endif
|
|
sif (cpuis("EFM32ZG*"))
|
|
group.long 0x58++0x3
|
|
line.long 0x00 "MSC_IRQLATENCY,Irq Latency Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " IRQLATENCY ,Irq Latency Register"
|
|
endif
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree "DMA (DMA Controller)"
|
|
base ad:0x400C2000
|
|
width 19.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "DMA_STATUS,DMA Status Registers"
|
|
bitfld.long 0x00 16.--20. " CHNUM ,Channel Number" "Reserved,Reserved,Reserved,4,?..."
|
|
bitfld.long 0x00 4.--7. " STATE ,Control Current State" "IDLE,RDCHCTRLDATA,RDSRCENDPTR,RDDSTENDPTR,RDSRCDATA,WRDSTDATA,WAITREQCLR,WRCHCTRLDATA,STALLED,DONE,PERSCATTRANS,Undefined,Undefined,Undefined,Undefined,Undefined"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN , DMA Enable Status" "Disabled,Enabled"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "DMA_CONFIG,DMA Configuration Register"
|
|
bitfld.long 0x00 5. " CHPROT ,Channel Protection Control" "Low,High"
|
|
bitfld.long 0x00 0. " EN ,Enable DMA Controller" "Disabled,Enabled"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "DMA_CTRLBASE,Channel Control Data Base Pointer Register"
|
|
rgroup.long 0x0c++0x07
|
|
line.long 0x00 "DMA_ALTCTRLBASE,Channel Alternate Control Data Base Pointer Register"
|
|
line.long 0x04 "DMA_CHWAITSTATUS,Channel Wait on Request Status Register"
|
|
bitfld.long 0x04 3. " CH3WAITSTATUS ,Channel 3 Wait on Request Status" "Not requested,Requested"
|
|
bitfld.long 0x04 2. " CH2WAITSTATUS ,Channel 2 Wait on Request Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CH1WAITSTATUS ,Channel 1 Wait on Request Status" "Not requested,Requested"
|
|
bitfld.long 0x04 0. " CH0WAITSTATUS ,Channel 0 Wait on Request Status" "Not requested,Requested"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "DMA_CHSWREQ,Channel Software Request Register"
|
|
bitfld.long 0x00 3. " CHSWREQ3 ,Channel 3 software Request" "No effect,Request"
|
|
bitfld.long 0x00 2. " CHSWREQ2 ,Channel 2 software Request" "No effect,Request"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHSWREQ1 ,Channel 1 software Request" "No effect,Request"
|
|
bitfld.long 0x00 0. " CHSWREQ0 ,Channel 0 software Request" "No effect,Request"
|
|
group.long 0x018++0x03
|
|
line.long 0x00 "DMA_CHUSEBURSTS,Channel Useburst Set Register"
|
|
bitfld.long 0x00 3. " CHUSEBURST3 ,Channel 3 Useburst Mode Set" "SINGLEBURST,BURSTONLY"
|
|
bitfld.long 0x00 2. " CHUSEBURST2 ,Channel 2 Useburst Mode Set" "SINGLEBURST,BURSTONLY"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHUSEBURST1 ,Channel 1 Useburst Mode Set" "SINGLEBURST,BURSTONLY"
|
|
bitfld.long 0x00 0. " CHUSEBURST0 ,Channel 0 Useburst Mode Set" "SINGLEBURST,BURSTONLY"
|
|
wgroup.long 0x1c++0x03
|
|
line.long 0x00 "DMA_CHUSEBURSTSTC,Channel Useburst Clear Register"
|
|
bitfld.long 0x00 3. " CHUSEBURSTSTC3 ,Channel 3 Useburst Clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " CHUSEBURSTSTC2 ,Channel 2 Useburst Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHUSEBURSTSTC1 ,Channel 1 Useburst Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CHUSEBURSTSTC0 ,Channel 0 Useburst Clear" "No effect,Clear"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DMA_CHREQMASKS,Channel Request Mask Set Register"
|
|
bitfld.long 0x00 3. " CHREQMASKS3 ,Channel 3 Request Mask Set Register" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " CHREQMASKS2 ,Channel 2 Request Mask Set Register" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHREQMASKS1 ,Channel 1 Request Mask Set Register" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " CHREQMASKS0 ,Channel 0 Request Mask Set Register" "Not masked,Masked"
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "DMAC_HREQMASKC,Channel Request Mask Clear Register"
|
|
bitfld.long 0x00 3. " CHREQMASKC3 ,Channel 3 Request Mask Clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " CHREQMASKC2 ,Channel 2 Request Mask Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHREQMASKC1 ,Channel 1 Request Mask Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CHREQMASKC0 ,Channel 0 Request Mask Clear" "No effect,Clear"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DMA_CHENS,Channel Enable Set Register"
|
|
bitfld.long 0x00 3. " CHENS3 ,Channel 3 Enable Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CHENS2 ,Channel 2 Enable Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHENS1 ,Channel 1 Enable Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CHENS0 ,Channel 0 Enable Set" "Disabled,Enabled"
|
|
wgroup.long 0x2c++0x03
|
|
line.long 0x00 "DMA_CHENC,Channel Enable Clear Register"
|
|
bitfld.long 0x00 3. " CHENC3 ,Channel 3 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " CHENC2 ,Channel 2 Enable Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHENC1 ,Channel 1 Enable Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CHENC0 ,Channel 0 Enable Clear" "No effect,Clear"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DMA_CHALTS,Channel Alternate Set Register"
|
|
bitfld.long 0x00 3. " CHALTS3 ,Channel 3 Alternate Structure Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CHALTS2 ,Channel 2 Alternate Structure Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHALTS1 ,Channel 1 Alternate Structure Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CHALTS0 ,Channel 0 Alternate Structure Set" "Disabled,Enabled"
|
|
wgroup.long 0x34++0x03
|
|
line.long 0x00 "DMA_CHALTC,Channel Alternate Clear Register"
|
|
bitfld.long 0x00 3. " CHALTC3 ,Channel 3 Alternate Structure Clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " CHALTC2 ,Channel 2 Alternate Structure Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHALTC1 ,Channel 1 Alternate Structure Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CHALTC0 ,Channel 0 Alternate Structure Clear" "No effect,Clear"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "DMA_CHPRIS,Channel Priority Set Register"
|
|
bitfld.long 0x00 3. " CHPRIS3 ,Channel 3 High Priority Set" "Low,High"
|
|
bitfld.long 0x00 2. " CHPRIS2 ,Channel 2 High Priority Set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHPRIS1 ,Channel 1 High Priority Set" "Low,High"
|
|
bitfld.long 0x00 0. " CHPRIS0 ,Channel 0 High Priority Set" "Low,High"
|
|
wgroup.long 0x3c++0x03
|
|
line.long 0x00 "DMA_CHPRIC,Channel Priority Clear Register"
|
|
bitfld.long 0x00 3. " CHPRIC3 ,Channel 3 Default Priority Clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " CHPRIC2 ,Channel 2 Default Priority Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHPRIC1 ,Channel 1 Default Priority Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CHPRIC0 ,Channel 0 Default Priority Clear" "No effect,Clear"
|
|
group.long 0x4c++0x03
|
|
line.long 0x00 "DMA_ERRORC,Bus Error Clear Register"
|
|
eventfld.long 0x00 0. " ERRORC ,Bus Error Clear" "No error,Error"
|
|
rgroup.long 0xE10++0x3
|
|
line.long 0x00 "DMA_CHREQSTATUS,Channel Request Status"
|
|
bitfld.long 0x00 3. " CH3REQSTATUS ,Channel 3 Request Status" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " CH2REQSTATUS ,Channel 2 Request Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CH1REQSTATUS ,Channel 1 Request Status" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " CH0REQSTATUS ,Channel 0 Request Status" "Not requested,Requested"
|
|
rgroup.long 0xE18++0x3
|
|
line.long 0x00 "DMA_CHSREQSTATUS,Channel Single Request Status"
|
|
bitfld.long 0x00 3. " CH3SREQSTATUS ,Channel 3 Single Request Status" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " CH2SREQSTATUS ,Channel 2 Single Request Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CH1SREQSTATUS ,Channel 1 Single Request Status" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " CH0SREQSTATUS ,Channel 0 Single Request Status" "Not requested,Requested"
|
|
group.long 0x1000++0x03
|
|
line.long 0x00 "DMA_IF,Interrupt Flag Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " ERR_set/clr ,Error Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " DONE3_set/clr ,DMA Channel 3 Cycle Complete Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " DONE2_set/clr ,DMA Channel 2 Cycle Complete Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " DONE1_set/clr ,DMA Channel 1 Cycle Complete Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DONE0_set/clr ,DMA Channel 0 Cycle Complete Interrupt Flag" "No interrupt,Interrupt"
|
|
group.long 0x100C++0x03
|
|
line.long 0x00 "DMA_IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 31. " ERR ,DMA Error Interrupt Flag Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " DONE3 ,DMA Channel 3 Cycle Complete Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DONE2 ,DMA Channel 2 Cycle Complete Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " DONE1 ,DMA Channel 1 Cycle Complete Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DONE0 ,DMA Channel 0 Cycle Complete Interrupt Enable" "Disabled,Enabled"
|
|
if (((d.l((ad:0x400C2000+0x1100)))&0x3F0000)==0x0)
|
|
group.long 0x1100++0x03
|
|
line.long 0x00 "DMA_CH0_CTRL,Channel 0 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF"
|
|
elif (((d.l((ad:0x400C2000+0x1100)))&0x3F0000)==0x80000)
|
|
group.long 0x1100++0x03
|
|
line.long 0x00 "DMA_CH0_CTRL,Channel 0 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "ADC0SINGLE,ADC0SCAN,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1100)))&0x3F0000)==0xd0000)
|
|
group.long 0x1100++0x03
|
|
line.long 0x00 "DMA_CH0_CTRL,Channel 0 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "USART1RXDATAV,USART1TXBL,USART1TXEMPTY,USART1RXDATAVRIGHT,USART1TXBLRIGHT,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1100)))&0x3F0000)==0x100000)
|
|
group.long 0x1100++0x03
|
|
line.long 0x00 "DMA_CH0_CTRL,Channel 0 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "LEUART0RXDATAV,LEUART0TXBL,LEUART0TXEMPTY,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1100)))&0x3F0000)==0x140000)
|
|
group.long 0x1100++0x03
|
|
line.long 0x00 "DMA_CH0_CTRL,Channel 0 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "I2C0RXDATAV,I2C0TXBL,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1100)))&0x3F0000)==0x180000)
|
|
group.long 0x1100++0x03
|
|
line.long 0x00 "DMA_CH0_CTRL,Channel 0 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "TIMER0UFOF0,TIMER0CC0,TIMER0CC1,TIMER0CC2,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1100)))&0x3F0000)==0x190000)
|
|
group.long 0x1100++0x03
|
|
line.long 0x00 "DMA_CH0_CTRL,Channel 0 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "TIMER1UFOF,TIMER1CC0,TIMER1CC1,TIMER1CC2,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1100)))&0x3F0000)==0x300000)
|
|
group.long 0x1100++0x03
|
|
line.long 0x00 "DMA_CH0_CTRL,Channel 0 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "MSCWDATA,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1100)))&0x3F0000)==0x310000)
|
|
group.long 0x1100++0x03
|
|
line.long 0x00 "DMA_CH0_CTRL,Channel 0 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "AESDATAWR,AESXORDATAWR,AESDATARD,AESKEYWR,?..."
|
|
else
|
|
group.long 0x1100++0x03
|
|
line.long 0x00 "DMA_CH0_CTRL,Channel 0 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
endif
|
|
if (((d.l((ad:0x400C2000+0x1104)))&0x3F0000)==0x0)
|
|
group.long 0x1104++0x03
|
|
line.long 0x00 "DMA_CH1_CTRL,Channel 1 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF"
|
|
elif (((d.l((ad:0x400C2000+0x1104)))&0x3F0000)==0x80000)
|
|
group.long 0x1104++0x03
|
|
line.long 0x00 "DMA_CH1_CTRL,Channel 1 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "ADC0SINGLE,ADC0SCAN,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1104)))&0x3F0000)==0xd0000)
|
|
group.long 0x1104++0x03
|
|
line.long 0x00 "DMA_CH1_CTRL,Channel 1 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "USART1RXDATAV,USART1TXBL,USART1TXEMPTY,USART1RXDATAVRIGHT,USART1TXBLRIGHT,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1104)))&0x3F0000)==0x100000)
|
|
group.long 0x1104++0x03
|
|
line.long 0x00 "DMA_CH1_CTRL,Channel 1 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "LEUART0RXDATAV,LEUART0TXBL,LEUART0TXEMPTY,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1104)))&0x3F0000)==0x140000)
|
|
group.long 0x1104++0x03
|
|
line.long 0x00 "DMA_CH1_CTRL,Channel 1 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "I2C0RXDATAV,I2C0TXBL,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1104)))&0x3F0000)==0x180000)
|
|
group.long 0x1104++0x03
|
|
line.long 0x00 "DMA_CH1_CTRL,Channel 1 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "TIMER0UFOF0,TIMER0CC0,TIMER0CC1,TIMER0CC2,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1104)))&0x3F0000)==0x190000)
|
|
group.long 0x1104++0x03
|
|
line.long 0x00 "DMA_CH1_CTRL,Channel 1 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "TIMER1UFOF,TIMER1CC0,TIMER1CC1,TIMER1CC2,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1104)))&0x3F0000)==0x300000)
|
|
group.long 0x1104++0x03
|
|
line.long 0x00 "DMA_CH1_CTRL,Channel 1 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "MSCWDATA,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1104)))&0x3F0000)==0x310000)
|
|
group.long 0x1104++0x03
|
|
line.long 0x00 "DMA_CH1_CTRL,Channel 1 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "AESDATAWR,AESXORDATAWR,AESDATARD,AESKEYWR,?..."
|
|
else
|
|
group.long 0x1104++0x03
|
|
line.long 0x00 "DMA_CH1_CTRL,Channel 1 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
endif
|
|
if (((d.l((ad:0x400C2000+0x1108)))&0x3F0000)==0x0)
|
|
group.long 0x1108++0x03
|
|
line.long 0x00 "DMA_CH2_CTRL,Channel 2 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF"
|
|
elif (((d.l((ad:0x400C2000+0x1108)))&0x3F0000)==0x80000)
|
|
group.long 0x1108++0x03
|
|
line.long 0x00 "DMA_CH2_CTRL,Channel 2 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "ADC0SINGLE,ADC0SCAN,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1108)))&0x3F0000)==0xd0000)
|
|
group.long 0x1108++0x03
|
|
line.long 0x00 "DMA_CH2_CTRL,Channel 2 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "USART1RXDATAV,USART1TXBL,USART1TXEMPTY,USART1RXDATAVRIGHT,USART1TXBLRIGHT,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1108)))&0x3F0000)==0x100000)
|
|
group.long 0x1108++0x03
|
|
line.long 0x00 "DMA_CH2_CTRL,Channel 2 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "LEUART0RXDATAV,LEUART0TXBL,LEUART0TXEMPTY,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1108)))&0x3F0000)==0x140000)
|
|
group.long 0x1108++0x03
|
|
line.long 0x00 "DMA_CH2_CTRL,Channel 2 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "I2C0RXDATAV,I2C0TXBL,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1108)))&0x3F0000)==0x180000)
|
|
group.long 0x1108++0x03
|
|
line.long 0x00 "DMA_CH2_CTRL,Channel 2 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "TIMER0UFOF0,TIMER0CC0,TIMER0CC1,TIMER0CC2,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1108)))&0x3F0000)==0x190000)
|
|
group.long 0x1108++0x03
|
|
line.long 0x00 "DMA_CH2_CTRL,Channel 2 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "TIMER1UFOF,TIMER1CC0,TIMER1CC1,TIMER1CC2,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1108)))&0x3F0000)==0x300000)
|
|
group.long 0x1108++0x03
|
|
line.long 0x00 "DMA_CH2_CTRL,Channel 2 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "MSCWDATA,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1108)))&0x3F0000)==0x310000)
|
|
group.long 0x1108++0x03
|
|
line.long 0x00 "DMA_CH2_CTRL,Channel 2 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "AESDATAWR,AESXORDATAWR,AESDATARD,AESKEYWR,?..."
|
|
else
|
|
group.long 0x1108++0x03
|
|
line.long 0x00 "DMA_CH2_CTRL,Channel 2 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
endif
|
|
if (((d.l((ad:0x400C2000+0x110C)))&0x3F0000)==0x0)
|
|
group.long 0x110C++0x03
|
|
line.long 0x00 "DMA_CH3_CTRL,Channel 3 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF"
|
|
elif (((d.l((ad:0x400C2000+0x110C)))&0x3F0000)==0x80000)
|
|
group.long 0x110C++0x03
|
|
line.long 0x00 "DMA_CH3_CTRL,Channel 3 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "ADC0SINGLE,ADC0SCAN,?..."
|
|
elif (((d.l((ad:0x400C2000+0x110C)))&0x3F0000)==0xd0000)
|
|
group.long 0x110C++0x03
|
|
line.long 0x00 "DMA_CH3_CTRL,Channel 3 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "USART1RXDATAV,USART1TXBL,USART1TXEMPTY,USART1RXDATAVRIGHT,USART1TXBLRIGHT,?..."
|
|
elif (((d.l((ad:0x400C2000+0x110C)))&0x3F0000)==0x100000)
|
|
group.long 0x110C++0x03
|
|
line.long 0x00 "DMA_CH3_CTRL,Channel 3 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "LEUART0RXDATAV,LEUART0TXBL,LEUART0TXEMPTY,?..."
|
|
elif (((d.l((ad:0x400C2000+0x110C)))&0x3F0000)==0x140000)
|
|
group.long 0x110C++0x03
|
|
line.long 0x00 "DMA_CH3_CTRL,Channel 3 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "I2C0RXDATAV,I2C0TXBL,?..."
|
|
elif (((d.l((ad:0x400C2000+0x110C)))&0x3F0000)==0x180000)
|
|
group.long 0x110C++0x03
|
|
line.long 0x00 "DMA_CH3_CTRL,Channel 3 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "TIMER0UFOF0,TIMER0CC0,TIMER0CC1,TIMER0CC2,?..."
|
|
elif (((d.l((ad:0x400C2000+0x110C)))&0x3F0000)==0x190000)
|
|
group.long 0x110C++0x03
|
|
line.long 0x00 "DMA_CH3_CTRL,Channel 3 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "TIMER1UFOF,TIMER1CC0,TIMER1CC1,TIMER1CC2,?..."
|
|
elif (((d.l((ad:0x400C2000+0x110C)))&0x3F0000)==0x300000)
|
|
group.long 0x110C++0x03
|
|
line.long 0x00 "DMA_CH3_CTRL,Channel 3 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "MSCWDATA,?..."
|
|
elif (((d.l((ad:0x400C2000+0x110C)))&0x3F0000)==0x310000)
|
|
group.long 0x110C++0x03
|
|
line.long 0x00 "DMA_CH3_CTRL,Channel 3 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "AESDATAWR,AESXORDATAWR,AESDATARD,AESKEYWR,?..."
|
|
else
|
|
group.long 0x110C++0x03
|
|
line.long 0x00 "DMA_CH3_CTRL,Channel 3 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
endif
|
|
if (((d.l((ad:0x400C2000+0x1110)))&0x3F0000)==0x0)
|
|
group.long 0x1110++0x03
|
|
line.long 0x00 "DMA_CH4_CTRL,Channel 4 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF"
|
|
elif (((d.l((ad:0x400C2000+0x1110)))&0x3F0000)==0x80000)
|
|
group.long 0x1110++0x03
|
|
line.long 0x00 "DMA_CH4_CTRL,Channel 4 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "ADC0SINGLE,ADC0SCAN,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1110)))&0x3F0000)==0xd0000)
|
|
group.long 0x1110++0x03
|
|
line.long 0x00 "DMA_CH4_CTRL,Channel 4 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "USART1RXDATAV,USART1TXBL,USART1TXEMPTY,USART1RXDATAVRIGHT,USART1TXBLRIGHT,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1110)))&0x3F0000)==0x100000)
|
|
group.long 0x1110++0x03
|
|
line.long 0x00 "DMA_CH4_CTRL,Channel 4 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "LEUART0RXDATAV,LEUART0TXBL,LEUART0TXEMPTY,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1110)))&0x3F0000)==0x140000)
|
|
group.long 0x1110++0x03
|
|
line.long 0x00 "DMA_CH4_CTRL,Channel 4 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "I2C0RXDATAV,I2C0TXBL,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1110)))&0x3F0000)==0x180000)
|
|
group.long 0x1110++0x03
|
|
line.long 0x00 "DMA_CH4_CTRL,Channel 4 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "TIMER0UFOF0,TIMER0CC0,TIMER0CC1,TIMER0CC2,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1110)))&0x3F0000)==0x190000)
|
|
group.long 0x1110++0x03
|
|
line.long 0x00 "DMA_CH4_CTRL,Channel 4 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "TIMER1UFOF,TIMER1CC0,TIMER1CC1,TIMER1CC2,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1110)))&0x3F0000)==0x300000)
|
|
group.long 0x1110++0x03
|
|
line.long 0x00 "DMA_CH4_CTRL,Channel 4 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "MSCWDATA,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1110)))&0x3F0000)==0x310000)
|
|
group.long 0x1110++0x03
|
|
line.long 0x00 "DMA_CH4_CTRL,Channel 4 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "AESDATAWR,AESXORDATAWR,AESDATARD,AESKEYWR,?..."
|
|
else
|
|
group.long 0x1110++0x03
|
|
line.long 0x00 "DMA_CH4_CTRL,Channel 4 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
endif
|
|
if (((d.l((ad:0x400C2000+0x1114)))&0x3F0000)==0x0)
|
|
group.long 0x1114++0x03
|
|
line.long 0x00 "DMA_CH5_CTRL,Channel 5 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF,OFF"
|
|
elif (((d.l((ad:0x400C2000+0x1114)))&0x3F0000)==0x80000)
|
|
group.long 0x1114++0x03
|
|
line.long 0x00 "DMA_CH5_CTRL,Channel 5 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "ADC0SINGLE,ADC0SCAN,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1114)))&0x3F0000)==0xd0000)
|
|
group.long 0x1114++0x03
|
|
line.long 0x00 "DMA_CH5_CTRL,Channel 5 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "USART1RXDATAV,USART1TXBL,USART1TXEMPTY,USART1RXDATAVRIGHT,USART1TXBLRIGHT,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1114)))&0x3F0000)==0x100000)
|
|
group.long 0x1114++0x03
|
|
line.long 0x00 "DMA_CH5_CTRL,Channel 5 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "LEUART0RXDATAV,LEUART0TXBL,LEUART0TXEMPTY,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1114)))&0x3F0000)==0x140000)
|
|
group.long 0x1114++0x03
|
|
line.long 0x00 "DMA_CH5_CTRL,Channel 5 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "I2C0RXDATAV,I2C0TXBL,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1114)))&0x3F0000)==0x180000)
|
|
group.long 0x1114++0x03
|
|
line.long 0x00 "DMA_CH5_CTRL,Channel 5 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "TIMER0UFOF0,TIMER0CC0,TIMER0CC1,TIMER0CC2,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1114)))&0x3F0000)==0x190000)
|
|
group.long 0x1114++0x03
|
|
line.long 0x00 "DMA_CH5_CTRL,Channel 5 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "TIMER1UFOF,TIMER1CC0,TIMER1CC1,TIMER1CC2,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1114)))&0x3F0000)==0x300000)
|
|
group.long 0x1114++0x03
|
|
line.long 0x00 "DMA_CH5_CTRL,Channel 5 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "MSCWDATA,?..."
|
|
elif (((d.l((ad:0x400C2000+0x1114)))&0x3F0000)==0x310000)
|
|
group.long 0x1114++0x03
|
|
line.long 0x00 "DMA_CH5_CTRL,Channel 5 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "AESDATAWR,AESXORDATAWR,AESDATARD,AESKEYWR,?..."
|
|
else
|
|
group.long 0x1114++0x03
|
|
line.long 0x00 "DMA_CH5_CTRL,Channel 5 Control Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ADC0,Reserved,Reserved,Reserved,Reserved,USART1,Reserved,Reserved,LEUART0,Reserved,Reserved,Reserved,I2C0,Reserved,Reserved,Reserved,TIMER0,TIMER1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,MSC,AES,?..."
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree "RMU (Reset Management Unit)"
|
|
base ad:0x400CA000
|
|
width 14.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "RMU_CTRL,RMU Control Register"
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32WG*"))
|
|
bitfld.long 0x00 1. " BURSTEN ,Backup domain reset enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 0. " LOCKUPRDIS ,Lockup Reset Disable" "No,Yes"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "RMU_RSTCAUSE,Reset Cause Register"
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32WG*"))
|
|
bitfld.long 0x00 15. " BUMODERST ,Backup mode reset" "Not performed,Performed"
|
|
textline " "
|
|
bitfld.long 0x00 14. " BUBODREG ,Backup Brown Out Detector Regulated Domain" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13. " BUBODUNREG ,Backup Brown Out Detector Unregulated Domain" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 12. " BUBODBUVIN ,Backup Brown Out Detector" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " BUBODVDDDREG ,Backup Brown Out Detector" "Not occurred,Occurred"
|
|
textline " "
|
|
endif
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 10. " BODAVDD1 ,AVDD1 Bod Reset" "Not performed,Performed"
|
|
bitfld.long 0x00 9. " BODAVDD0 ,AVDD0 Bod Reset" "Not performed,Performed"
|
|
textline " "
|
|
bitfld.long 0x00 8. " EM4WURST ,EM4 Wake-up Reset" "Not performed,Performed"
|
|
bitfld.long 0x00 7. " EM4RST ,EM4 Reset" "Not performed,Performed"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 6. " SYSREQRST ,System Request Reset" "Not performed,Performed"
|
|
bitfld.long 0x00 5. " LOCKUPRST ,Lockup Reset" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 4. " WDOGRST ,Watchdog Reset" "Not performed,Performed"
|
|
bitfld.long 0x00 3. " EXTRST ,External Pin Reset" "Not performed,Performed"
|
|
textline " "
|
|
bitfld.long 0x00 2. " BODREGRST ,Brown Out Detector Regulated Domain Reset" "Not performed,Performed"
|
|
bitfld.long 0x00 1. " BODUNREGRST ,Brown Out Detector Unregulated Domain Reset" "Not performed,Performed"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PORST ,Power on Reset" "Not performed,Performed"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "RMU_CMD,Command Register"
|
|
bitfld.long 0x00 0. " RCCLR ,Reset Cause Clear" "No effect,Clear"
|
|
width 0xb
|
|
tree.end
|
|
tree "EMU (Energy Management Unit)"
|
|
base ad:0x400C6000
|
|
width 15.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "EMU_CTRL,EMU Control Register"
|
|
bitfld.long 0x00 2.--3. " EM4CTRL ,Energy Mode 4 Control" "0,1,2,3"
|
|
bitfld.long 0x00 1. " EM2BLOCK ,Energy Mode 2 Block or lower" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EMVREG ,Energy Mode Voltage Regulator Control" "Reduced,Full"
|
|
sif ((!cpuis("EFM32TG*"))&&(!cpuis("EFM32WG*"))&&(!cpuis("EFM32ZG*")))
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "EMU_MEMCTRL,Memory Control Register"
|
|
bitfld.long 0x00 0.--2. " POWERDOWN ,RAM block power-down" "Reserved,Reserved,Reserved,Reserved,BLK3,Reserved,BLK23,BLK123"
|
|
endif
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "EMU_LOCK,Configuration Lock Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " LOCKKEY ,EMU Configuration Lock Key"
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*"))
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "EMU_AUXCTRL,Auxiliary Control Register"
|
|
bitfld.long 0x00 8. " REDLFXOBOOST ,Reduce LFXO Start-up Boost Current" "Not reduced,Reduced"
|
|
bitfld.long 0x00 0. " HRCCLR ,Hard Reset Cause Clear" "0,1"
|
|
group.long 0x2C++0x13
|
|
line.long 0x00 "EMU_EM4CONF,Energy mode 4 configuration register"
|
|
bitfld.long 0x00 16. " LOCKCONF ,EM4 configuration lock enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " BUBODRSTDIS ,Disable reset from Backup BOD in EM4" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " OSC ,Select EM4 duty oscillator" "ULFRCO,LFRCO,LFXO,?..."
|
|
textline " "
|
|
bitfld.long 0x00 1. " BURTCWU ,Backup RTC EM4 wakeup enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " VREGEN ,EM4 voltage regulator enable" "Disabled,Enabled"
|
|
line.long 0x04 "EMU_BUCTRL,Backup Power configuration register"
|
|
bitfld.long 0x04 5.--6. " PROBE ,Voltage probe select" "Disabled,VDD_DREG,BU_IN,BU_OUT"
|
|
textline " "
|
|
sif (cpuis("EFM32WG*"))
|
|
bitfld.long 0x04 3. " BUMODEBODEN ,Enable brown out detection on BU_VIN when in backup mode" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x04 2. " BODCAL ,Enable BOD calibration mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " STATEN ,Enable backup mode status export" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " EN ,Enable backup mode" "Disabled,Enabled"
|
|
line.long 0x08 "EMU_PWRCONF,Power connection configuration register"
|
|
bitfld.long 0x08 3.--4. " PWRRES ,Power domain resistor select" "RES0,RES1,RES2,RES3"
|
|
bitfld.long 0x08 2. " VOUTSTRONG ,BU_VOUT strong enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " VOUTMED ,BU_VOUT medium enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " VOUTWEAK ,BU_VOUT weak enable" "Disabled,Enabled"
|
|
line.long 0x0C "EMU_BUINACT,Backup mode inactive configuration register"
|
|
bitfld.long 0x0C 5.--6. " PWRCON ,Power connection configuration when not in Backup mode" "None,BUMAIN,MAINBU,NODIODE"
|
|
bitfld.long 0x0C 3.--4. " BUENRANGE ,Threshold range for Backup BOD sensing on VDD_DREG when not in backup mode" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x0C 0.--2. " BUENTHRES ,Threshold for Backup BOD sensing on VDD_DREG" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "EMU_BUACT,Backup mode active configuration register"
|
|
bitfld.long 0x10 5.--6. " PWRCON ,Power connection configuration when in Backup mode" "None,BUMAIN,MAINBU,NODIODE"
|
|
bitfld.long 0x10 3.--4. " BUEXRANGE ,Threshold range for Backup BOD sensing on VDD_DREG when in backup mode" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x10 0.--2. " BUEXTHRES ,Threshold for Backup BOD sensing on VDD_DREG when in backup mode" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x00 "EMU_STATUS,Status register"
|
|
bitfld.long 0x00 0. " BURDY ,Backup mode ready" "Not ready,Ready"
|
|
group.long 0x44++0x3
|
|
line.long 0x00 "EMU_ROUTE,I/O Routing Register"
|
|
bitfld.long 0x00 0. " BUVINPEN ,BU_VIN Pin Enable" "Disabled,Enabled"
|
|
group.long 0x48++0x3
|
|
line.long 0x00 "EMU_IF,Interrupt Flag Register"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " BURDY_set/clr ,Backup functionality ready Interrupt Flag" "No interrupt,Interrupt"
|
|
group.long 0x54++0x3
|
|
line.long 0x00 "EMU_IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " BURDY ,Backup functionality ready Interrupt Enable" "Disabled,Enabled"
|
|
width 19.
|
|
group.long 0x58++0x07
|
|
line.long 0x00 "EMU_BUBODBUVINCAL,BU_VIN Backup BOD calibration"
|
|
bitfld.long 0x00 3.--4. " RANGE ,Threshold range for Backup BOD sensing on BU_VIN" "0,1,2,3"
|
|
bitfld.long 0x00 0.--2. " THRES ,Threshold for Backup BOD sensing on BU_VIN" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "EMU_BUBODUNREGCAL,Unregulated power Backup BOD calibration"
|
|
bitfld.long 0x04 3.--4. " RANGE ,Threshold range for Backup BOD sensing on unregulated power" "0,1,2,3"
|
|
bitfld.long 0x04 0.--2. " THRES ,Threshold for Backup BOD sensing on unregulated power" "0,1,2,3,4,5,6,7"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "EMU_AUXCTRL,EMU Auxiliary Control Register"
|
|
bitfld.long 0x00 0. " HRCCLR ,Hard Reset Cause Clear" "Low,High"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree "CMU (Clock Management Unit)"
|
|
base ad:0x400C8000
|
|
width 18.
|
|
group.long 0x00++0x1F
|
|
line.long 0x00 "CTRL,CMU Control Register"
|
|
bitfld.long 0x00 23.--26. " CLKOUTSEL1 ,Clock output select 1" "LFRCO,LFXO,HFCLK,LFXOQ,HFXOQ,LFRCOQ,HFRCOQ,AUXHFRCOQ,USHFRCO,?..."
|
|
bitfld.long 0x00 20.--22. " CLKOUTSEL0 ,Clock output select 0" "HFRCO,HFXO,HFCLK2,HFCLK4,HFCLK8,HFCLK16,ULFRCO,AUXHFRCO"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " LFXOTIMEOUT ,LFXO OTIMEOUT" "8 cycles,1K cycles,16k cycles,32k cycles"
|
|
bitfld.long 0x00 17. " LFXOBUFCUR ,LFXO boost buffer current" "100 PCENT,150 PCENT"
|
|
textline " "
|
|
bitfld.long 0x00 14.--16. " HFCLKDIV ,HFCLK division" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
textline " "
|
|
bitfld.long 0x00 13. " LFXOBOOST ,LFXO Start-Up boost current" "70 PCENT,100 PCENT"
|
|
bitfld.long 0x00 11.--12. " LFXOMODE ,LFXO mode select" "XTAL,BUFEXTCLK,DIGEXTCLK,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " HFXOTIMEOUT ,HFXO timeout" "8 cycles,256 cycles,1k cycles,16k cycles"
|
|
bitfld.long 0x00 7. " HFXOGLITCHDETEN ,HFXO glitch detector enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " HFXOBUFCUR ,HFXO boost buffer current" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " HFXOBOOST ,HFXO Star-Up boost current" "50 PCENT,70 PCENT,80 PCENT,100 PCENT"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " HFXOMODE ,HFXO mode select" "XTAL,BUFEXTCLK,DIGEXTCLK,?..."
|
|
line.long 0x04 "HFCORECLKDIV,High Frequency Core Clock Division Register"
|
|
bitfld.long 0x04 8. " HFCORECLKLEDIV ,Additional division factor for HFCORECLKLE" "HFCORECLK/2,HFCORECLK/4"
|
|
bitfld.long 0x04 0.--3. " HFCORECLKDIV ,HFCORECLK divider" "HFCLK,HFCLK2,HFCLK4,HFCLK8,HFCLK16,HFCLK32,HFCLK64,HFCLK128,HFCLK256,HFCLK512,?..."
|
|
line.long 0x08 "HFPERCLKDIV,High Frequency Peripheral Clock Division Register"
|
|
bitfld.long 0x08 8. " HFPERCLKEN ,HFPERCLK enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0.--3. " HFPERCLKDIV ,HFPERCL divider" "HFCLK,HFCLK2,HFCLK4,HFCLK8,HFCLK16,HFCLK32,HFCLK64,HFCLK128,HFCLK256,HFCLK512,?..."
|
|
line.long 0x0C "HFRCOCTRL,HFRCO Control Register"
|
|
bitfld.long 0x0C 12.--16. " SUDELAY ,HFRCO Start-Up delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x0C 8.--10. " BAND ,HFCRO band select [MHz]" "1 MHz,7 MHz,11 MHz,14 MHz,21 MHz,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x0C 0.--7. 1. " TUNING ,HFRCO tunning value"
|
|
line.long 0x10 "LFRCOCTRL,LFRCO Control Register"
|
|
hexmask.long.byte 0x10 0.--6. 1. " TUNING ,LFRCO tuning value"
|
|
line.long 0x14 "AUXHFRCOCTRL,AUXHFRCO Control Register"
|
|
bitfld.long 0x14 8.--10. " BAND ,AUXHFRCO band select" "14MHz,11MHz,7MHz,1MHz,,,28MHz,21MHz"
|
|
textline " "
|
|
hexmask.long.byte 0x14 0.--7. 1. " TUNING ,AUXHFRCO tuning value"
|
|
line.long 0x18 "CALCTRL,Calibration Control Register"
|
|
bitfld.long 0x18 6. " CONT ,Continuous calibration" "Disabled,Enabled"
|
|
bitfld.long 0x18 3.--5. " DOWNSEL ,Calibration Down-counter select" "HFCLK,HFXO,LFXO,HFRCO,LFRCO,AUXHFRCO,USHFRCO,?..."
|
|
textline " "
|
|
bitfld.long 0x18 0.--2. " UPSEL ,Calibration Up-counter select" "HFXO,LFXO,HFRCO,LFRCO,AUXHFRCO,USHFRCO,?..."
|
|
line.long 0x1C "CALCNT,Calibration Counter Register"
|
|
hexmask.long.tbyte 0x1C 0.--19. 1. " CALCNT ,Calibration counter"
|
|
wgroup.long 0x20++0x07
|
|
line.long 0x00 "OSCENCMD,Oscillator Enable/disable Command Register"
|
|
bitfld.long 0x00 11. " USHFRCODIS ,USHFRCO disable" "No effect,Yes"
|
|
bitfld.long 0x00 10. " USHFRCOEN ,USHFRCO enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " LFXODIS ,LFXO disable" "No effect,Yes"
|
|
bitfld.long 0x00 8. " LFXOEN ,LFXO enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LFRCODIS ,LFRCO disable" "No effect,Yes"
|
|
bitfld.long 0x00 6. " LFRCOEN ,LFRCO enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 5. " AUXHFRCODIS ,AUHFRCO disable" "No effect,Yes"
|
|
bitfld.long 0x00 4. " AUXHFRCOEN ,AUXHFRCO enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 3. " HFXODIS ,HFXO disable" "No effect,Yes"
|
|
bitfld.long 0x00 2. " HFXOEN ,HFXO enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 1. " HFCODIS ,HFRCO disable" "No effect,Yes"
|
|
bitfld.long 0x00 0. " HFRCOEN ,HFRCO enable" "No effect,Enable"
|
|
line.long 0x04 "CMD,Command Register"
|
|
bitfld.long 0x04 5.--7. " USBCCLKSEL ,USB core clock select" ",,LFXO,LFRCO,USHFRCO,?..."
|
|
bitfld.long 0x04 4. " CALSTOP ,Calibration stop" "No effect,Stop"
|
|
textline " "
|
|
bitfld.long 0x04 3. " CALSTART ,Calibration start" "No effect,Start"
|
|
bitfld.long 0x04 0.--2. " HFCLKSEL ,HFCLK select" ",HFRCO,HFXO,LFRCO,LFXO,USHFRCODIV2,?..."
|
|
if (((per.l(ad:0x400C8000+0x28))&0x110000)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "LFCLKSEL,Low Frequency Clock Select Register"
|
|
bitfld.long 0x00 20. " LFBE ,Clock select for LFB extended" "Disabled,ULFRCO"
|
|
bitfld.long 0x00 16. " LFAE ,Clock select for LFA extended" "Disabled,ULFRCO"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " LFC ,Clock select for LFC" "Disabled,LFRCO,LFXO,?..."
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " LFB ,Clock select for LFB" "Disabled,LFRCO,LFXO,HFCORECLKLEDIV2"
|
|
bitfld.long 0x00 0.--1. " LFA ,Clock select for LFA" "Disabled,LFRCO,LFXO,HFCORECLKLEDIV2"
|
|
elif (((per.l(ad:0x400C8000+0x28))&0x110000)==0x100000)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "LFCLKSEL,Low Frequency Clock Select Register"
|
|
bitfld.long 0x00 20. " LFBE ,Clock select for LFB extended" "Disabled,ULFRCO"
|
|
bitfld.long 0x00 16. " LFAE ,Clock select for LFA extended" "Disabled,ULFRCO"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " LFC ,Clock select for LFC" "Disabled,LFRCO,LFXO,?..."
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " LFB ,Clock select for LFB" "ULFRCO,LFRCO,LFXO,HFCORECLKLEDIV2"
|
|
bitfld.long 0x00 0.--1. " LFA ,Clock select for LFA" "Disabled,LFRCO,LFXO,HFCORECLKLEDIV2"
|
|
elif (((per.l(ad:0x400C8000+0x28))&0x110000)==0x10000)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "LFCLKSEL,Low Frequency Clock Select Register"
|
|
bitfld.long 0x00 20. " LFBE ,Clock select for LFB extended" "Disabled,ULFRCO"
|
|
bitfld.long 0x00 16. " LFAE ,Clock select for LFA extended" "Disabled,ULFRCO"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " LFC ,Clock ,clock select for LFC" "Disabled,LFRCO,LFXO,?..."
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " LFB ,Clock select for LFB" "Disabled,LFRCO,LFXO,HFCORECLKLEDIV2"
|
|
bitfld.long 0x00 0.--1. " LFA ,Clock select for LFA" "ULFRCO,LFRCO,LFXO,HFCORECLKLEDIV2"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "LFCLKSEL,Low Frequency Clock Select Register"
|
|
bitfld.long 0x00 20. " LFBE ,Clock select for LFB extended" "Disabled,ULFRCO"
|
|
bitfld.long 0x00 16. " LFAE ,Clock select for LFA extended" "Disabled,ULFRCO"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " LFC ,Clock ,clock select for LFC" "Disabled,LFRCO,LFXO,?..."
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " LFB ,Clock select for LFB" "ULFRCO,LFRCO,LFXO,HFCORECLKLEDIV2"
|
|
bitfld.long 0x00 0.--1. " LFA ,Clock select for LFA" "ULFRCO,LFRCO,LFXO,HFCORECLKLEDIV2"
|
|
endif
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 26. " USHFRCODIV2SEL ,USHFRCODIV2 selected" "Not selected,Selected"
|
|
bitfld.long 0x00 23. " USHFRCOSUSPEND ,USHFRCO is suspended" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x00 22. " USHFRCORDY ,USHFRCO ready" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " USHFRCOENS ,USHFRCO enable status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " USBCHFCLKSYNC ,USBC is synchronous to HFCLK" "Disabled,Synchronized"
|
|
bitfld.long 0x00 18. " USBCUSHFRCOSEL ,USBC USHFRCO selected" "No selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " USBCLFRCOSEL ,USBC LFRCO selected" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 16. " USBCLFXOSEL ,USBC LFXO selected" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 14. " CALBSY ,Calibration busy" "Not busy,Busy"
|
|
bitfld.long 0x00 13. " LFXOSEL ,LFXO selected" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12. " LFRCOSEL ,LFRCO selected" "Not selected,Selected"
|
|
bitfld.long 0x00 11. " HFXOSEL ,HFXO selected" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " HFRCOSEL ,HFRCO selected" "Not selected,Selected"
|
|
bitfld.long 0x00 9. " LFXORDY ,LFXO ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 8. " LFXOENS ,LFXO enable status" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " LFRCORDY ,LFRCO ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 6. " LFRCOENS ,LFRCO enable status" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " AUXHFRCORDY ,AUXHFRCO ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 4. " AUXHFRCOENS ,AUXHFRCO enable status" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " HFXORDY ,HFXO ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 2. " HFXOENS ,HFXO enable status" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFCORDY ,HFRCO ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 0. " HFRCOENS ,HFRCO enable status" "Disabled,Enabled"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " USBCHFOSCSEL_SET/CLR ,USBC HF-oscillator selected interrupt flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " USHFRCORDY_SET/CLR ,USHFRCO ready interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " CALOF_SET/CLR ,Calibration overflow interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " CALRDY_SET/CLR ,Calibration ready interrupt flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " AUXHFRCORDY_SET/CLR ,AUXHFRCO ready interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " LFXORDY_SET/CLR ,LFXO ready interrupt flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " LFRCORDY_SET/CLR ,LFRCO ready interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " HFXORDY_SET/CLR ,HFXO ready interrupt flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " HFRCORDY_SET/CLR ,HFRCO ready interrupt flag" "No interrupt,Interrupt"
|
|
group.long 0x3C++0x0B
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 9. " USBCHFOSCSEL ,USBC HF-oscillator selected interrupt flag clear" "No cleared,Cleared"
|
|
bitfld.long 0x00 8. " USHFRCORDY ,USHFRCO ready interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CALOF ,Calibration overflow interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CALRDY ,Calibration ready interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " AUXHFRCORDY ,AUXHFRCO ready interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LFXORDY ,LFXO ready interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " LFRCORDY ,LFRCO ready interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " HFXORDY ,HFXO ready interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " HFRCORDY ,HFRCO ready interrupt enable" "Disabled,Enabled"
|
|
line.long 0x04 "HFCORECLKEN0,High Frequency Core Clock Enable Register 0"
|
|
bitfld.long 0x04 4. " USB ,Universal serial bus interface clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " USBC ,Universal serial bus interface core clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " LE ,Low energy peripheral interface clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " DMA ,Direct memory access controller clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " AES ,Advanced encryption standard accelerator clock enable" "Disabled,Enabled"
|
|
line.long 0x08 "HFPERCLKEN0,High Frequency Peripheral Clock Enable Register 0"
|
|
bitfld.long 0x08 11. " I2C0 ,I2C 0 clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 10. " ADC0 ,Analog to digital converter 0 clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 9. " VCMP ,Voltage comparator clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " GPIO ,General purpose input/output clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " IDAC0 ,Current digital to analog converter 0 clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " PRS ,Peripheral reflex system clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 5. " ACMP0 ,Analog comparator 0 clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " USART1 ,USART 1 clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " USART0 ,Universal synchronous/asynchronous receiver/transmitter 0 clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " TIMER2 ,Timer 2 clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " TIMER1 ,Timer 1 clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " TIMER0 ,Timer 0 clock enable" "Disabled,Enabled"
|
|
rgroup.long 0x50++0x03
|
|
line.long 0x00 "SYNCBUSY,Synchronization Busy Register"
|
|
bitfld.long 0x00 8. " LFCCLKEN0 ,Low frequency C clock enable 0 busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 6. " LFBPRESC0 ,Low frequency B prescaler 0 busy" "Not busy,Busy"
|
|
bitfld.long 0x00 4. " LFBCLKEN0 ,Low frequency B clock enable 0 busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LFAPRESC0 ,Low frequency A clock enable 0 busy" "Not busy,Busy"
|
|
bitfld.long 0x00 0. " LFACLKEN0 ,Low frequency A clock enable 0 busy" "Not busy,Busy"
|
|
group.long 0x54++0x07
|
|
line.long 0x00 "FREEZE,Freeze Register"
|
|
bitfld.long 0x00 0. " REGFREEZE ,Register update freeze" "Update,Freeze"
|
|
line.long 0x04 "LFACLKEN0,Low Frequency A Clock Enable Register 0"
|
|
bitfld.long 0x04 0. " RTC ,Real-Time counter clock enable" "Disabled,Enabled"
|
|
group.long 0x60++0x07
|
|
line.long 0x00 "LFBCLKEN0,Low Frequency B Clock Enable Register 0"
|
|
bitfld.long 0x00 0. " LEUART0 ,Low energy UART 0 clock enable" "Disabled,Enabled"
|
|
line.long 0x04 "LFCCLKEN0,Low Frequency C Clock Enable Register 0"
|
|
bitfld.long 0x04 0. " USBLE ,Universal serial bus low energy clock clock enable" "Disabled,Enabled"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "LFAPRESC0,Low Frequency A Prescaler Register 0"
|
|
bitfld.long 0x00 0.--3. " RTC ,Real-Tim counter prescaler" "DIV1,DIV2,DIV4,DIV8,DIV16,DIV32,DIV64,DIV128,DIV256,DIV512,DIV1024,DIV2048,DIV4096,DIV8192,DIV16384,DIV32768"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "LFBPRESC0,Low Frequency B Prescaler Register 0"
|
|
bitfld.long 0x00 0.--1. " LEUART0 ,Low energy UART 0 prescaler" "DIV1,DIV2,DIV4,DIV8"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "PCNTCTRL,PCNT Control Register"
|
|
bitfld.long 0x00 1. " PCNT0CLKSEL ,PCNT0 clock select" "LFACLK,PCNT0S0"
|
|
bitfld.long 0x00 0. " PCNT0CLKEN ,PCNT0 clock enable" "Disabled,Enabled"
|
|
group.long 0x80++0x07
|
|
line.long 0x00 "ROUTE,I/O Routing Register"
|
|
bitfld.long 0x00 2.--4. " LOCATION ,I/O location" "LOC0,LOC1,LOC2,LOC3,?..."
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLKOUT1PEN ,CLKOUT1 pin enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLKOUT0PEN ,CLKOUT0 pin enable" "Disabled,Enabled"
|
|
line.long 0x04 "LOCK,Configuration Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " LOCKKEY ,Configuration lock key"
|
|
group.long 0xD0++0x0F
|
|
line.long 0x00 "USBCRCTRL,USB Clock Recovery Control"
|
|
bitfld.long 0x00 1. " LSMODE ,Low speed clock recovery mode" "Disabled,USB"
|
|
bitfld.long 0x00 0. " EN ,Clock recovery enable" "Disabled,Enabled"
|
|
line.long 0x04 "USHFRCOCTRL,USHFRCO Control"
|
|
hexmask.long.byte 0x04 12.--19. 1. " TIMEOUT ,USHFRCO timeout"
|
|
bitfld.long 0x04 9. " SUSPEND ,USHFRCO suspend" "Not suspend,Suspended"
|
|
textline " "
|
|
bitfld.long 0x04 8. " DITHEN ,USHFRCO dither enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x04 0.--6. 1. " TUNING ,USHFRCO frequency adjust"
|
|
line.long 0x08 "USHFRCOTUNE,USHFRCO Frequency Tune"
|
|
bitfld.long 0x08 0.--5. " FINETUNING ,Oscillator fine frequency adjust" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x0C "USHFRCOCONF,USHFRCO Configuration"
|
|
bitfld.long 0x0C 4. " USHFRCODIV2DIS ,USHFRCO divider for HFCLK disable" "No,Yes"
|
|
bitfld.long 0x0C 0.--2. " BAND ,USHFRCO band select" ",48MHz,,24MHz,?..."
|
|
width 0x0B
|
|
tree.end
|
|
tree "WDOG (Watchdog Timer)"
|
|
base ad:0x40088000
|
|
width 15.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Watchdog Control Register"
|
|
sif cpuis("EFM32GG11B*")
|
|
bitfld.long 0x00 31. " WDOGRSTDIS ,Watchdog reset disable" "No,Yes"
|
|
bitfld.long 0x00 30. " CLRSRC ,Watchdog clear source" "SW,PCH0"
|
|
bitfld.long 0x00 24.--26. " WINSEL ,Watchdog illegal windows select" "Disabled,12.5%,25%,37.5%,50%,62.5%,75%,87.5%"
|
|
newline
|
|
bitfld.long 0x00 16.--17. " WARNSEL ,Watchdog timeout period select" "Disabled,25%,50%,75%"
|
|
bitfld.long 0x00 12.--13. " CLKSEL ,Watchdog clock select" "ULFRCO,LFRCO,LFXO,HFCORECLK"
|
|
newline
|
|
else
|
|
bitfld.long 0x00 12.--13. " CLKSEL ,Watchdog clock select" "ULFRCO,LFRCO,LFXO,?..."
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 8.--11. " PERSEL ,Watchdog timeout period select" "9 cycles,17 cycles,33 cycles,65 cycles,129 cycles,257 cycles,513 cycles,1k cycles,2k cycles,4k cycles,8k cycles,16k cycles,32k cycles,64k cycles,128k cycles,256k cycles"
|
|
bitfld.long 0x00 6. " SWOSCBLOCK ,Software oscillator disable block" "No,Yes"
|
|
bitfld.long 0x00 5. " EM4BLOCK ,Energy mode 4 block" "Not blocked,Blocked"
|
|
newline
|
|
bitfld.long 0x00 4. " LOCK ,Configuration lock" "Not locked,Locked"
|
|
bitfld.long 0x00 3. " EM3RUN ,Energy mode 3 run enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " EM2RUN ,Energy mode 2 run enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " DEBUGRUN ,Debug mode run enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EN ,Watchdog timer enable" "Disabled,Enabled"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "CMD,Watchdog Command Register"
|
|
bitfld.long 0x00 0. " CLEAR ,Watchdog timer clear" "No effect,Clear"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "SYNCBUSY,Watchdog Synchronization Busy Register"
|
|
sif cpuis("EFM32GG11B*")
|
|
bitfld.long 0x00 3. " PCH1_PRSCTRL ,PCH1_PRSCTRL register busy" "Not busy,Busy"
|
|
bitfld.long 0x00 2. " PCH0_PRSCTRL ,PCH0_PRSCTRL register busy" "Not busy,Busy"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 1. " CMD ,CMD register busy" "Not busy,Busy"
|
|
bitfld.long 0x00 0. " CTRL ,CTRL register busy" "Not busy,Busy"
|
|
sif cpuis("EFM32GG11B*")
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "PCH0_PRSCTRL,PRS Control Register 0"
|
|
bitfld.long 0x00 8. " PRSMISSRSTEN ,PRS missing event will trigger a watchdog reset" "No reset,Reset"
|
|
bitfld.long 0x00 0.--4. " PRSSEL ,PRS channel PRS select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,PRSCH12,PRSCH13,PRSCH14,PRSCH15,PRSCH16,PRSCH17,PRSCH18,PRSCH19,PRSCH20,PRSCH21,PRSCH22,PRSCH23,?..."
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PCH1_PRSCTRL,PRS Control Register 1"
|
|
bitfld.long 0x00 8. " PRSMISSRSTEN ,PRS missing event will trigger a watchdog reset" "No reset,Reset"
|
|
bitfld.long 0x00 0.--4. " PRSSEL ,PRS channel PRS select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,PRSCH12,PRSCH13,PRSCH14,PRSCH15,PRSCH16,PRSCH17,PRSCH18,PRSCH19,PRSCH20,PRSCH21,PRSCH22,PRSCH23,?..."
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "IF_SET/CLEAR,Watchdog Interrupt Flags Set/Clear Register"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " PEM1 ,PRS channel one event missing interrupt flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " PEM0 ,PRS channel zero event missing interrupt flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " WIN ,Watchdog window interrupt flag" "No interrupt,Interrupt"
|
|
newline
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " WARN ,Watchdog warning timeout interrupt flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TOUT ,Watchdog timeout interrupt flag" "No interrupt,Interrupt"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "IEN,Watchdog Interrupt Enable Register"
|
|
bitfld.long 0x00 4. " PEM1 ,PRS channel one event missing interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " PEM0 ,PRS channel zero event missing interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " WIN ,Watchdog window interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " WARN ,Watchdog warning timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TOUT ,Watchdog timeout interrupt enable" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "PRS (Peripheral Reflex System)"
|
|
base ad:0x400CC000
|
|
width 15.
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "SWPULSE,Software Pulse Register"
|
|
bitfld.long 0x00 5. " CH5PULSE ,Channel 5 pulse generation" "No effect,Generate"
|
|
bitfld.long 0x00 4. " CH4PULSE ,Channel 4 pulse generation" "No effect,Generate"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CH3PULSE ,Channel 3 pulse generation" "No effect,Generate"
|
|
bitfld.long 0x00 2. " CH2PULSE ,Channel 2 pulse generation" "No effect,Generate"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CH1PULSE ,Channel 1 pulse generation" "No effect,Generate"
|
|
bitfld.long 0x00 0. " CH0PULSE ,Channel 0 pulse generation" "No effect,Generate"
|
|
group.long 0x04++0x07
|
|
line.long 0x00 "SWLEVEL,Software Level Register"
|
|
bitfld.long 0x00 5. " CH5LEVEL ,Channel 5 software level" "Low,High"
|
|
bitfld.long 0x00 4. " CH4LEVEL ,Channel 4 software level" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CH3LEVEL ,Channel 3 software level" "Low,High"
|
|
bitfld.long 0x00 2. " CH2LEVEL ,Channel 2 software level" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CH1LEVEL ,Channel 1 software level" "Low,High"
|
|
bitfld.long 0x00 0. " CH0LEVEL ,Channel 0 software level" "Low,High"
|
|
line.long 0x04 "ROUTE,I/O Routing Register"
|
|
bitfld.long 0x00 8.--10. " LOCATION ,I/O location" "LOC0,LOC1,LOC2,LOC3,?..."
|
|
textline " "
|
|
bitfld.long 0x00 3. " CH3PEN ,CH3 pin enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CH2PEN ,CH2 pin enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CH1PEN ,CH1 pin enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CH0PEN ,CH0 pin enable" "Disabled,Enabled"
|
|
if (((per.l((ad:0x400CC000+0x10)))&0x3F0000)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CH0_CTRL,Channel 0 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "Off,Off,Off,Off,Off,Off,Off,Off"
|
|
elif (((per.l((ad:0x400CC000+0x10)))&0x3F0000)==0x10000)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CH0_CTRL,Channel 0 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "VCMPOUT,?..."
|
|
elif (((per.l((ad:0x400CC000+0x10)))&0x3F0000)==0x20000)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CH0_CTRL,Channel 0 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "ACMP0OUT,?..."
|
|
elif (((per.l((ad:0x400CC000+0x10)))&0x3F0000)==0x80000)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CH0_CTRL,Channel 0 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "ADC0SINGLE,ADC0SCAN,?..."
|
|
elif (((per.l((ad:0x400CC000+0x10)))&0x3F0000)==0x100000)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CH0_CTRL,Channel 0 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "USART0IRTX,USART0TXC,USART0RXDATAV,?..."
|
|
elif (((per.l((ad:0x400CC000+0x10)))&0x3F0000)==0x110000)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CH0_CTRL,Channel 0 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "USART1IRTX,USART1TXC,USART1RXDATAV,?..."
|
|
elif (((per.l((ad:0x400CC000+0x10)))&0x3F0000)==0x1C0000)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CH0_CTRL,Channel 0 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "TIMER0UF,TIMER0OF,TIMER0CC0,TIMER0CC1,TIMER0CC2,?..."
|
|
elif (((per.l((ad:0x400CC000+0x10)))&0x3F0000)==0x1D0000)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CH0_CTRL,Channel 0 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "TIMER1UF,TIMER1OF,TIMER1CC0,TIMER1CC1,TIMER1CC2,?..."
|
|
elif (((per.l((ad:0x400CC000+0x10)))&0x3F0000)==0x1E0000)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CH0_CTRL,Channel 0 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "TIMER2UF,TIMER2OF,TIMER2CC0,TIMER2CC1,TIMER2CC2,?..."
|
|
elif (((per.l((ad:0x400CC000+0x10)))&0x3F0000)==0x240000)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CH0_CTRL,Channel 0 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "USBSOF,USBSOFSR,?..."
|
|
elif (((per.l((ad:0x400CC000+0x10)))&0x3F0000)==0x280000)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CH0_CTRL,Channel 0 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "RTCOF,RTCCOMP0,RTCCOMP1,?..."
|
|
elif (((per.l((ad:0x400CC000+0x10)))&0x3F0000)==0x300000)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CH0_CTRL,Channel 0 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "GPIOPIN0,GPIOPIN1,GPIOPIN2,GPIOPIN3,GPIOPIN4,GPIOPIN5,GPIOPIN6,GPIOPIN7"
|
|
elif (((per.l((ad:0x400CC000+0x10)))&0x3F0000)==0x310000)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CH0_CTRL,Channel 0 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "GPIOPIN8,GPIOPIN9,GPIOPIN10,GPIOPIN11,GPIOPIN12,GPIOPIN13,GPIOPIN14,GPIOPIN15"
|
|
elif (((per.l((ad:0x400CC000+0x10)))&0x3F0000)==0x360000)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CH0_CTRL,Channel 0 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "PCNT0TCC,?..."
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CH0_CTRL,Channel 0 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" ",?..."
|
|
endif
|
|
if (((per.l((ad:0x400CC000+0x14)))&0x3F0000)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CH1_CTRL,Channel 1 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "Off,Off,Off,Off,Off,Off,Off,Off"
|
|
elif (((per.l((ad:0x400CC000+0x14)))&0x3F0000)==0x10000)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CH1_CTRL,Channel 1 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "VCMPOUT,?..."
|
|
elif (((per.l((ad:0x400CC000+0x14)))&0x3F0000)==0x20000)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CH1_CTRL,Channel 1 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "ACMP0OUT,?..."
|
|
elif (((per.l((ad:0x400CC000+0x14)))&0x3F0000)==0x80000)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CH1_CTRL,Channel 1 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "ADC0SINGLE,ADC0SCAN,?..."
|
|
elif (((per.l((ad:0x400CC000+0x14)))&0x3F0000)==0x100000)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CH1_CTRL,Channel 1 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "USART0IRTX,USART0TXC,USART0RXDATAV,?..."
|
|
elif (((per.l((ad:0x400CC000+0x14)))&0x3F0000)==0x110000)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CH1_CTRL,Channel 1 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "USART1IRTX,USART1TXC,USART1RXDATAV,?..."
|
|
elif (((per.l((ad:0x400CC000+0x14)))&0x3F0000)==0x1C0000)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CH1_CTRL,Channel 1 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "TIMER0UF,TIMER0OF,TIMER0CC0,TIMER0CC1,TIMER0CC2,?..."
|
|
elif (((per.l((ad:0x400CC000+0x14)))&0x3F0000)==0x1D0000)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CH1_CTRL,Channel 1 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "TIMER1UF,TIMER1OF,TIMER1CC0,TIMER1CC1,TIMER1CC2,?..."
|
|
elif (((per.l((ad:0x400CC000+0x14)))&0x3F0000)==0x1E0000)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CH1_CTRL,Channel 1 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "TIMER2UF,TIMER2OF,TIMER2CC0,TIMER2CC1,TIMER2CC2,?..."
|
|
elif (((per.l((ad:0x400CC000+0x14)))&0x3F0000)==0x240000)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CH1_CTRL,Channel 1 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "USBSOF,USBSOFSR,?..."
|
|
elif (((per.l((ad:0x400CC000+0x14)))&0x3F0000)==0x280000)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CH1_CTRL,Channel 1 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "RTCOF,RTCCOMP0,RTCCOMP1,?..."
|
|
elif (((per.l((ad:0x400CC000+0x14)))&0x3F0000)==0x300000)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CH1_CTRL,Channel 1 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "GPIOPIN0,GPIOPIN1,GPIOPIN2,GPIOPIN3,GPIOPIN4,GPIOPIN5,GPIOPIN6,GPIOPIN7"
|
|
elif (((per.l((ad:0x400CC000+0x14)))&0x3F0000)==0x310000)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CH1_CTRL,Channel 1 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "GPIOPIN8,GPIOPIN9,GPIOPIN10,GPIOPIN11,GPIOPIN12,GPIOPIN13,GPIOPIN14,GPIOPIN15"
|
|
elif (((per.l((ad:0x400CC000+0x14)))&0x3F0000)==0x360000)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CH1_CTRL,Channel 1 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "PCNT0TCC,?..."
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CH1_CTRL,Channel 1 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" ",?..."
|
|
endif
|
|
if (((per.l((ad:0x400CC000+0x18)))&0x3F0000)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CH2_CTRL,Channel 2 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "Off,Off,Off,Off,Off,Off,Off,Off"
|
|
elif (((per.l((ad:0x400CC000+0x18)))&0x3F0000)==0x10000)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CH2_CTRL,Channel 2 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "VCMPOUT,?..."
|
|
elif (((per.l((ad:0x400CC000+0x18)))&0x3F0000)==0x20000)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CH2_CTRL,Channel 2 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "ACMP0OUT,?..."
|
|
elif (((per.l((ad:0x400CC000+0x18)))&0x3F0000)==0x80000)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CH2_CTRL,Channel 2 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "ADC0SINGLE,ADC0SCAN,?..."
|
|
elif (((per.l((ad:0x400CC000+0x18)))&0x3F0000)==0x100000)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CH2_CTRL,Channel 2 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "USART0IRTX,USART0TXC,USART0RXDATAV,?..."
|
|
elif (((per.l((ad:0x400CC000+0x18)))&0x3F0000)==0x110000)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CH2_CTRL,Channel 2 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "USART1IRTX,USART1TXC,USART1RXDATAV,?..."
|
|
elif (((per.l((ad:0x400CC000+0x18)))&0x3F0000)==0x1C0000)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CH2_CTRL,Channel 2 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "TIMER0UF,TIMER0OF,TIMER0CC0,TIMER0CC1,TIMER0CC2,?..."
|
|
elif (((per.l((ad:0x400CC000+0x18)))&0x3F0000)==0x1D0000)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CH2_CTRL,Channel 2 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "TIMER1UF,TIMER1OF,TIMER1CC0,TIMER1CC1,TIMER1CC2,?..."
|
|
elif (((per.l((ad:0x400CC000+0x18)))&0x3F0000)==0x1E0000)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CH2_CTRL,Channel 2 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "TIMER2UF,TIMER2OF,TIMER2CC0,TIMER2CC1,TIMER2CC2,?..."
|
|
elif (((per.l((ad:0x400CC000+0x18)))&0x3F0000)==0x240000)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CH2_CTRL,Channel 2 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "USBSOF,USBSOFSR,?..."
|
|
elif (((per.l((ad:0x400CC000+0x18)))&0x3F0000)==0x280000)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CH2_CTRL,Channel 2 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "RTCOF,RTCCOMP0,RTCCOMP1,?..."
|
|
elif (((per.l((ad:0x400CC000+0x18)))&0x3F0000)==0x300000)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CH2_CTRL,Channel 2 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "GPIOPIN0,GPIOPIN1,GPIOPIN2,GPIOPIN3,GPIOPIN4,GPIOPIN5,GPIOPIN6,GPIOPIN7"
|
|
elif (((per.l((ad:0x400CC000+0x18)))&0x3F0000)==0x310000)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CH2_CTRL,Channel 2 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "GPIOPIN8,GPIOPIN9,GPIOPIN10,GPIOPIN11,GPIOPIN12,GPIOPIN13,GPIOPIN14,GPIOPIN15"
|
|
elif (((per.l((ad:0x400CC000+0x18)))&0x3F0000)==0x360000)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CH2_CTRL,Channel 2 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "PCNT0TCC,?..."
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CH2_CTRL,Channel 2 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" ",?..."
|
|
endif
|
|
if (((per.l((ad:0x400CC000+0x1C)))&0x3F0000)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CH3_CTRL,Channel 3 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "Off,Off,Off,Off,Off,Off,Off,Off"
|
|
elif (((per.l((ad:0x400CC000+0x1C)))&0x3F0000)==0x10000)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CH3_CTRL,Channel 3 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "VCMPOUT,?..."
|
|
elif (((per.l((ad:0x400CC000+0x1C)))&0x3F0000)==0x20000)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CH3_CTRL,Channel 3 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "ACMP0OUT,?..."
|
|
elif (((per.l((ad:0x400CC000+0x1C)))&0x3F0000)==0x80000)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CH3_CTRL,Channel 3 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "ADC0SINGLE,ADC0SCAN,?..."
|
|
elif (((per.l((ad:0x400CC000+0x1C)))&0x3F0000)==0x100000)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CH3_CTRL,Channel 3 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "USART0IRTX,USART0TXC,USART0RXDATAV,?..."
|
|
elif (((per.l((ad:0x400CC000+0x1C)))&0x3F0000)==0x110000)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CH3_CTRL,Channel 3 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "USART1IRTX,USART1TXC,USART1RXDATAV,?..."
|
|
elif (((per.l((ad:0x400CC000+0x1C)))&0x3F0000)==0x1C0000)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CH3_CTRL,Channel 3 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "TIMER0UF,TIMER0OF,TIMER0CC0,TIMER0CC1,TIMER0CC2,?..."
|
|
elif (((per.l((ad:0x400CC000+0x1C)))&0x3F0000)==0x1D0000)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CH3_CTRL,Channel 3 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "TIMER1UF,TIMER1OF,TIMER1CC0,TIMER1CC1,TIMER1CC2,?..."
|
|
elif (((per.l((ad:0x400CC000+0x1C)))&0x3F0000)==0x1E0000)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CH3_CTRL,Channel 3 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "TIMER2UF,TIMER2OF,TIMER2CC0,TIMER2CC1,TIMER2CC2,?..."
|
|
elif (((per.l((ad:0x400CC000+0x1C)))&0x3F0000)==0x240000)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CH3_CTRL,Channel 3 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "USBSOF,USBSOFSR,?..."
|
|
elif (((per.l((ad:0x400CC000+0x1C)))&0x3F0000)==0x280000)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CH3_CTRL,Channel 3 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "RTCOF,RTCCOMP0,RTCCOMP1,?..."
|
|
elif (((per.l((ad:0x400CC000+0x1C)))&0x3F0000)==0x300000)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CH3_CTRL,Channel 3 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "GPIOPIN0,GPIOPIN1,GPIOPIN2,GPIOPIN3,GPIOPIN4,GPIOPIN5,GPIOPIN6,GPIOPIN7"
|
|
elif (((per.l((ad:0x400CC000+0x1C)))&0x3F0000)==0x310000)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CH3_CTRL,Channel 3 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "GPIOPIN8,GPIOPIN9,GPIOPIN10,GPIOPIN11,GPIOPIN12,GPIOPIN13,GPIOPIN14,GPIOPIN15"
|
|
elif (((per.l((ad:0x400CC000+0x1C)))&0x3F0000)==0x360000)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CH3_CTRL,Channel 3 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "PCNT0TCC,?..."
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CH3_CTRL,Channel 3 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" ",?..."
|
|
endif
|
|
if (((per.l((ad:0x400CC000+0x20)))&0x3F0000)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CH4_CTRL,Channel 4 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "Off,Off,Off,Off,Off,Off,Off,Off"
|
|
elif (((per.l((ad:0x400CC000+0x20)))&0x3F0000)==0x10000)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CH4_CTRL,Channel 4 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "VCMPOUT,?..."
|
|
elif (((per.l((ad:0x400CC000+0x20)))&0x3F0000)==0x20000)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CH4_CTRL,Channel 4 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "ACMP0OUT,?..."
|
|
elif (((per.l((ad:0x400CC000+0x20)))&0x3F0000)==0x80000)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CH4_CTRL,Channel 4 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "ADC0SINGLE,ADC0SCAN,?..."
|
|
elif (((per.l((ad:0x400CC000+0x20)))&0x3F0000)==0x100000)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CH4_CTRL,Channel 4 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "USART0IRTX,USART0TXC,USART0RXDATAV,?..."
|
|
elif (((per.l((ad:0x400CC000+0x20)))&0x3F0000)==0x110000)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CH4_CTRL,Channel 4 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "USART1IRTX,USART1TXC,USART1RXDATAV,?..."
|
|
elif (((per.l((ad:0x400CC000+0x20)))&0x3F0000)==0x1C0000)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CH4_CTRL,Channel 4 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "TIMER0UF,TIMER0OF,TIMER0CC0,TIMER0CC1,TIMER0CC2,?..."
|
|
elif (((per.l((ad:0x400CC000+0x20)))&0x3F0000)==0x1D0000)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CH4_CTRL,Channel 4 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "TIMER1UF,TIMER1OF,TIMER1CC0,TIMER1CC1,TIMER1CC2,?..."
|
|
elif (((per.l((ad:0x400CC000+0x20)))&0x3F0000)==0x1E0000)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CH4_CTRL,Channel 4 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "TIMER2UF,TIMER2OF,TIMER2CC0,TIMER2CC1,TIMER2CC2,?..."
|
|
elif (((per.l((ad:0x400CC000+0x20)))&0x3F0000)==0x240000)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CH4_CTRL,Channel 4 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "USBSOF,USBSOFSR,?..."
|
|
elif (((per.l((ad:0x400CC000+0x20)))&0x3F0000)==0x280000)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CH4_CTRL,Channel 4 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "RTCOF,RTCCOMP0,RTCCOMP1,?..."
|
|
elif (((per.l((ad:0x400CC000+0x20)))&0x3F0000)==0x300000)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CH4_CTRL,Channel 4 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "GPIOPIN0,GPIOPIN1,GPIOPIN2,GPIOPIN3,GPIOPIN4,GPIOPIN5,GPIOPIN6,GPIOPIN7"
|
|
elif (((per.l((ad:0x400CC000+0x20)))&0x3F0000)==0x310000)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CH4_CTRL,Channel 4 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "GPIOPIN8,GPIOPIN9,GPIOPIN10,GPIOPIN11,GPIOPIN12,GPIOPIN13,GPIOPIN14,GPIOPIN15"
|
|
elif (((per.l((ad:0x400CC000+0x20)))&0x3F0000)==0x360000)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CH4_CTRL,Channel 4 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "PCNT0TCC,?..."
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CH4_CTRL,Channel 4 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" ",?..."
|
|
endif
|
|
if (((per.l((ad:0x400CC000+0x24)))&0x3F0000)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CH5_CTRL,Channel 5 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "Off,Off,Off,Off,Off,Off,Off,Off"
|
|
elif (((per.l((ad:0x400CC000+0x24)))&0x3F0000)==0x10000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CH5_CTRL,Channel 5 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "VCMPOUT,?..."
|
|
elif (((per.l((ad:0x400CC000+0x24)))&0x3F0000)==0x20000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CH5_CTRL,Channel 5 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "ACMP0OUT,?..."
|
|
elif (((per.l((ad:0x400CC000+0x24)))&0x3F0000)==0x80000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CH5_CTRL,Channel 5 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "ADC0SINGLE,ADC0SCAN,?..."
|
|
elif (((per.l((ad:0x400CC000+0x24)))&0x3F0000)==0x100000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CH5_CTRL,Channel 5 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "USART0IRTX,USART0TXC,USART0RXDATAV,?..."
|
|
elif (((per.l((ad:0x400CC000+0x24)))&0x3F0000)==0x110000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CH5_CTRL,Channel 5 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "USART1IRTX,USART1TXC,USART1RXDATAV,?..."
|
|
elif (((per.l((ad:0x400CC000+0x24)))&0x3F0000)==0x1C0000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CH5_CTRL,Channel 5 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "TIMER0UF,TIMER0OF,TIMER0CC0,TIMER0CC1,TIMER0CC2,?..."
|
|
elif (((per.l((ad:0x400CC000+0x24)))&0x3F0000)==0x1D0000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CH5_CTRL,Channel 5 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "TIMER1UF,TIMER1OF,TIMER1CC0,TIMER1CC1,TIMER1CC2,?..."
|
|
elif (((per.l((ad:0x400CC000+0x24)))&0x3F0000)==0x1E0000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CH5_CTRL,Channel 5 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "TIMER2UF,TIMER2OF,TIMER2CC0,TIMER2CC1,TIMER2CC2,?..."
|
|
elif (((per.l((ad:0x400CC000+0x24)))&0x3F0000)==0x240000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CH5_CTRL,Channel 5 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "USBSOF,USBSOFSR,?..."
|
|
elif (((per.l((ad:0x400CC000+0x24)))&0x3F0000)==0x280000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CH5_CTRL,Channel 5 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "RTCOF,RTCCOMP0,RTCCOMP1,?..."
|
|
elif (((per.l((ad:0x400CC000+0x24)))&0x3F0000)==0x300000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CH5_CTRL,Channel 5 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "GPIOPIN0,GPIOPIN1,GPIOPIN2,GPIOPIN3,GPIOPIN4,GPIOPIN5,GPIOPIN6,GPIOPIN7"
|
|
elif (((per.l((ad:0x400CC000+0x24)))&0x3F0000)==0x310000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CH5_CTRL,Channel 5 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "GPIOPIN8,GPIOPIN9,GPIOPIN10,GPIOPIN11,GPIOPIN12,GPIOPIN13,GPIOPIN14,GPIOPIN15"
|
|
elif (((per.l((ad:0x400CC000+0x24)))&0x3F0000)==0x360000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CH5_CTRL,Channel 5 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" "PCNT0TCC,?..."
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CH5_CTRL,Channel 5 Control Register"
|
|
bitfld.long 0x00 28. " ASYNC ,Asynchronous reflex" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " EDSEL ,Edge detect select" "Off,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source select" "None,VCMP,ACMP0,,,,,,ADC0,,,,,,,,USART0,USART1,,,,,,,,,,,TIMER0,TIMER1,TIMER2,,,,,,USB,,,,RTC,,,,,,,,GPIOL,GPIOH,,,,,PCNT0,?..."
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal select" ",?..."
|
|
endif
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "TRACECTRL,MTB Trace Control Register"
|
|
bitfld.long 0x00 9.--11. " TSTOP ,MTB TSTOP PRS select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,?..."
|
|
bitfld.long 0x00 8. " TSTOPEN ,PRS TSTOP enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1.--3. " TSTART ,MTB TSTART PRS select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,?..."
|
|
bitfld.long 0x00 0. " TSTARTEN ,PRS TSTART enable" "Disabled,Enabled"
|
|
width 0x0B
|
|
tree.end
|
|
sif (cpu()!="EFM32HG108"&&cpu()!="EFM32HG310"&&cpu()!="EFM32HG210"&&cpu()!="EFM32HG222")
|
|
tree "USB (Universal Serial Bus Controller)"
|
|
base ad:0x400C4000
|
|
width 18.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "USB_CTRL,System Control Register"
|
|
bitfld.long 0x00 24.--25. " BIASPROGEM23 ,Regulator Bias Programming Value in EM2/3" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. " BIASPROGEM01 ,Regulator Bias Programming Value in EM0/1" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 17. " VREGOSEN ,VREGO Sense Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " VREGDIS ,Voltage Regulator Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DMPUAP ,DMPU Active Polarity" "High,Low"
|
|
bitfld.long 0x00 0. " VBUSENAP ,VBUSEN Active Polarity" "High,Low"
|
|
rgroup.long 0x04++0x3
|
|
line.long 0x00 "USB_STATUS,System Status Register"
|
|
bitfld.long 0x00 0. " VREGOS ,VREGO Sense Output" "Low,High"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "USB_IF,Interrupt Flag Register"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " VREGOSL ,VREGO Sense Low Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " VREGOSH ,VREGO Sense High Interrupt Flag" "No interrupt,Interrupt"
|
|
group.long 0x14++0x7
|
|
line.long 0x00 "USB_IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 1. " VREGOSL ,VREGO Sense Low Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " VREGOSH ,VREGO Sense High Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x04 "USB_ROUTE,I/O Routing Register"
|
|
bitfld.long 0x04 2. " DMPUPEN ,DMPU Pin Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " VBUSENPEN ,VBUSEN Pin Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " PHYPEN ,USB PHY Pin Enable" "Disabled,Enabled"
|
|
if (((d.l(ad:0x400C4000+0x3C014))&0x1)==0x0)
|
|
group.long 0x3C000++0x1B
|
|
line.long 0x00 "USB_GOTGCTL,OTG Control and Status Register"
|
|
bitfld.long 0x00 20. " OTGVER ,OTG Version" "OTG13,OTG20"
|
|
rbitfld.long 0x00 19. " BSESVLD ,B-Session Valid (device only)" "Not Valid,Valid"
|
|
textline " "
|
|
rbitfld.long 0x00 16. " CONIDSTS ,Connector ID Status (host and device)" "A-Device,B-Device"
|
|
bitfld.long 0x00 11. " DEVHNPEN ,Device HNP Enabled (device only)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " HNPREQ ,HNP Request (device only)" "Not requested,Requested"
|
|
rbitfld.long 0x00 8. " HSTNEGSCS ,Host Negotiation Success" "Not succeed,Succeed"
|
|
textline " "
|
|
bitfld.long 0x00 7. " AVALIDOVVAL ,Avalid Override Value" "Low,High"
|
|
bitfld.long 0x00 6. " AVALIDOVEN ,AValid Override Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " BVALIDOVVAL ,Bvalid Override Value" "Low,High"
|
|
bitfld.long 0x00 4. " BVALIDOVEN ,BValid Override Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " VBVALIDOVVAL ,VBUS Valid Override Value" "Low,High"
|
|
bitfld.long 0x00 2. " VBVALIDOVEN ,VBUS-Valid Override Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SESREQ ,Session Request (device only)" "Not requested,Requested"
|
|
rbitfld.long 0x00 0. " SESREQSCS ,Session Request Success (device only)" "Not succeed,Succeed"
|
|
line.long 0x04 "USB_GOTGINT,OTG Interrupt Register"
|
|
eventfld.long 0x04 18. " ADEVTOUTCHG ,A-Device Timeout Change (host and device)" "Not Valid,Valid"
|
|
eventfld.long 0x04 17. " HSTNEGDET ,Host Negotiation Detected (host and device)" "Not Valid,Valid"
|
|
textline " "
|
|
eventfld.long 0x04 9. " HSTNEGSUCSTSCHNG ,Host Negotiation Success Status Change (host and device)" "Long,Short"
|
|
eventfld.long 0x04 8. " SESREQSUCSTSCHNG ,Session Request Success Status Change (host and device)" "A-Device,B-Device"
|
|
textline " "
|
|
eventfld.long 0x04 2. " SESENDDET ,Session End Detected (host and device)" "Disabled,Enabled"
|
|
line.long 0x08 "USB_GAHBCFG,AHB Configuration Register"
|
|
bitfld.long 0x08 22. " NOTIALLDMAWRIT ,Notify All DMA Writes" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " REMMEMSUPP ,Remote Memory Support" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " NPTXFEMPLVL ,Non-Periodic TxFIFO Empty Level (host and device)" "HALFEMPTY,EMPTY"
|
|
textline " "
|
|
bitfld.long 0x08 5. " DMAEN ,DMA Enable (host and device)" "Disabled,Enabled"
|
|
bitfld.long 0x08 1.--4. " HBSTLEN ,Burst Length/Type (host and device)" "SINGLE,INCR,Reserved,INCR4,Reserved,INCR8,Reserved,INCR16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " GLBLINTRMSK ,Global Interrupt Mask (host and device)" "Masked,Not masked"
|
|
line.long 0x0C "USB_GUSBCFG,USB Configuration Register"
|
|
bitfld.long 0x0C 31. " CORRUPTTXPKT ,Corrupt Tx packet (host and device)" "No effect,Corrupt"
|
|
bitfld.long 0x0C 30. " FORCEDEVMODE ,Force Device Mode (host and device)" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x0C 29. " FORCEHSTMODE ,Force Host Mode (host and device)" "Not forced,Forced"
|
|
bitfld.long 0x0C 28. " TXENDDELAY ,Tx End Delay (device only)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 22. " TERMSELDLPULSE ,TermSel DLine Pulsing Selection (device only)" "TXVALID,TERMSEL"
|
|
bitfld.long 0x0C 10.--13. " USBTRDTIM ,USB Turnaround Time (device only)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x0C 9. " HNPCAP ,HNP-Capable (host and device)" "Not capable,Capable"
|
|
bitfld.long 0x0C 8. " SRPCAP ,SRP-Capable (host and device)" "Not capable,Capable"
|
|
textline " "
|
|
bitfld.long 0x0C 5. " FSINTF ,Full-Speed Serial Interface Select (host and device)" "Not selected,Selected"
|
|
bitfld.long 0x0C 0.--2. " TOUTCAL ,Timeout Calibration (host and device)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "USB_GRSTCTL,Reset Register"
|
|
rbitfld.long 0x10 31. " AHBIDLE ,AHB Master Idle (host and device)" "No idle,Idle"
|
|
rbitfld.long 0x10 30. " DMAREQ ,DMA Request Signal (host and device)" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x10 6.--10. " TXFNUM ,TxFIFO Number (host and device)" "F0,F1,F2,F3,F4,F5,F6,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,FALL,?..."
|
|
bitfld.long 0x10 5. " TXFFLSH ,TxFIFO Flush (host and device)" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x10 4. " RXFFLSH ,RxFIFO Flush (host and device)" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x10 0. " CSFTRST ,Core Soft Reset (host and device)" "Not flushed,Flushed"
|
|
line.long 0x14 "USB_GINTSTS,Interrupt Register"
|
|
eventfld.long 0x14 31. " WKUPINT ,Resume/Remote Wakeup Detected Interrupt (host and device)" "No interrupt,Interrupt"
|
|
eventfld.long 0x14 30. " SESSREQINT ,Session Request/New Session Detected Interrupt (host and device)" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x14 28. " CONIDSTSCHNG ,Connector ID Status Change (host and device)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 23. " RESETDET ,Reset detected Interrupt (device only)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 22. " FETSUSP ,Data Fetch Suspended (device only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 21. " INCOMPLP ,Incomplete Periodic Transfer (device only)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 20. " INCOMPISOIN ,Incomplete Isochronous IN Transfer (device only)" "No interrupt,Interrupt"
|
|
rbitfld.long 0x14 19. " OEPINT ,OUT Endpoints Interrupt (device only)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.long 0x14 18. " IEPINT ,IN Endpoints Interrupt (device only)" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 14. " ISOOUTDROP ,Isochronous OUT Packet Dropped Interrupt (device only)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ENUMDONE ,Enumeration Done (device only)" "Not completed,Completed"
|
|
bitfld.long 0x14 12. " USBRST ,USB Reset (device only)" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x14 11. " USBSUSP ,USB Suspend (device only)" "Not suspended,Suspended"
|
|
bitfld.long 0x14 10. " ERLYSUSP ,Early Suspend (device only)" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x14 7. " GINNAKEFF ,Global OUT NAK Effective (device only)" "Not effective,Effective"
|
|
rbitfld.long 0x14 6. " GINNAKEFF ,Global IN Non-periodic NAK Effective (device only)" "Not effective,Effective"
|
|
textline " "
|
|
rbitfld.long 0x14 4. " RXFLVL ,RxFIFO Non-Empty (host and device)" "Empty,Not empty"
|
|
textline " "
|
|
eventfld.long 0x14 3. " SOF ,Start of Frame (host and device)" "No SOF,SOF"
|
|
rbitfld.long 0x14 2. " OTGINT ,OTG Interrupt (host and device)" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x14 1. " MODEMIS ,Mode Mismatch Interrupt (host and device)" "No interrupt,Interrupt"
|
|
rbitfld.long 0x14 0. " CURMOD ,Current Mode of Operation (host and device)" "DEVICE,HOST"
|
|
line.long 0x18 "USB_GINTMSK,Interrupt Mask Register"
|
|
bitfld.long 0x18 31. " WKUPINTMSK ,Resume/Remote Wakeup Detected Interrupt Mask (host and device)" "Masked,Not masked"
|
|
bitfld.long 0x18 30. " SESSREQINTMSK ,Session Request/New Session Detected Interrupt Mask (host and device)" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x18 29. " DISCONNINTMSK ,Disconnect Detected Interrupt Mask (host and device)" "Masked,Not masked"
|
|
bitfld.long 0x18 28. " CONIDSTSCHNGMSK ,Connector ID Status Change Mask (host and device)" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x18 23. " RESETDETMSK ,Reset detected Interrupt Mask (device only)" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x18 22. " FETSUSPMSK ,Data Fetch Suspended Mask (device only)" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x18 20. " INCOMPISOINMSK ,Incomplete Isochronous IN Transfer Mask (device only)" "Masked,Not masked"
|
|
bitfld.long 0x18 19. " OEPINTMSK ,OUT Endpoints Interrupt Mask (device only)" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x18 18. " IEPINTMSK ,IN Endpoints Interrupt Mask (device only)" "Masked,Not masked"
|
|
bitfld.long 0x18 14. " ISOOUTDROPMSK ,Isochronous OUT Packet Dropped Interrupt Mask (device only)" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ENUMDONEMSK ,Enumeration Done Mask (device only)" "Masked,Not masked"
|
|
bitfld.long 0x18 12. " USBRSTMSK ,USB Reset Mask (device only)" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x18 11. " USBSUSPMSK ,USB Suspend Mask (device only)" "Masked,Not masked"
|
|
bitfld.long 0x18 10. " ERLYSUSPMSK ,Early Suspend Mask (device only)" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x18 7. " GOUTNAKEFFMSK ,Global OUT NAK Effective Mask (device only)" "Masked,Not masked"
|
|
bitfld.long 0x18 6. " GINNAKEFFMSK ,Global Non-periodic IN NAK Effective Mask (device only)" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x18 4. " RXFLVLMSK ,Receive FIFO Non-Empty Mask (host and device)" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x18 3. " SOFMSK ,Start of Frame Mask (host and device)" "Masked,Not masked"
|
|
bitfld.long 0x18 2. " OTGINTMSK ,OTG Interrupt Mask (host and device)" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x18 1. " MODEMISMSK ,Mode Mismatch Interrupt Mask (host and device)" "Masked,Not masked"
|
|
else
|
|
group.long 0x3C000++0x1B
|
|
line.long 0x00 "USB_GOTGCTL,OTG Control and Status Register"
|
|
bitfld.long 0x00 20. " OTGVER ,OTG Version" "OTG13,OTG20"
|
|
rbitfld.long 0x00 18. " ASESVLD ,A-Session Valid (host only)" "Not Valid,Valid"
|
|
textline " "
|
|
rbitfld.long 0x00 17. " DBNCTIME ,Long/Short Debounce Time (host only)" "Long,Short"
|
|
rbitfld.long 0x00 16. " CONIDSTS ,Connector ID Status (host and device)" "A-Device,B-Device"
|
|
textline " "
|
|
bitfld.long 0x00 10. " HSTSETHNPEN ,Host Set HNP Enable (host only)" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " AVALIDOVVAL ,Avalid Override Value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " AVALIDOVEN ,AValid Override Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " BVALIDOVVAL ,Bvalid Override Value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BVALIDOVEN ,BValid Override Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " VBVALIDOVVAL ,VBUS Valid Override Value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " VBVALIDOVEN ,VBUS-Valid Override Enable" "Disabled,Enabled"
|
|
line.long 0x04 "USB_GOTGINT,OTG Interrupt Register"
|
|
eventfld.long 0x04 19. " DBNCEDONE ,Debounce Done (host only)" "OTG13,OTG20"
|
|
eventfld.long 0x04 18. " ADEVTOUTCHG ,A-Device Timeout Change (host and device)" "Not Valid,Valid"
|
|
textline " "
|
|
eventfld.long 0x04 17. " HSTNEGDET ,Host Negotiation Detected (host and device)" "Not Valid,Valid"
|
|
eventfld.long 0x04 9. " HSTNEGSUCSTSCHNG ,Host Negotiation Success Status Change (host and device)" "Long,Short"
|
|
textline " "
|
|
eventfld.long 0x04 8. " SESREQSUCSTSCHNG ,Session Request Success Status Change (host and device)" "A-Device,B-Device"
|
|
eventfld.long 0x04 2. " SESENDDET ,Session End Detected" "Disabled,Enabled (host and device)"
|
|
line.long 0x08 "USB_GAHBCFG,AHB Configuration Register"
|
|
bitfld.long 0x08 22. " NOTIALLDMAWRIT ,Notify All DMA Writes" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " REMMEMSUPP ,Remote Memory Support" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 8. " PTXFEMPLVL ,Periodic TxFIFO Empty Level (host only)" "HALFEMPTY,EMPTY"
|
|
bitfld.long 0x08 7. " NPTXFEMPLVL ,Non-Periodic TxFIFO Empty Level (host and device)" "HALFEMPTY,EMPTY"
|
|
textline " "
|
|
bitfld.long 0x08 5. " DMAEN ,DMA Enable (host and device)" "Disabled,Enabled"
|
|
bitfld.long 0x08 1.--4. " HBSTLEN ,Burst Length/Type (host and device)" "SINGLE,INCR,Reserved,INCR4,Reserved,INCR8,Reserved,INCR16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " GLBLINTRMSK ,Global Interrupt Mask (host and device)" "Masked,Not masked"
|
|
line.long 0x0C "USB_GUSBCFG,USB Configuration Register"
|
|
bitfld.long 0x0C 31. " CORRUPTTXPKT ,Corrupt Tx packet (host and device)" "Low,High"
|
|
bitfld.long 0x0C 30. " FORCEDEVMODE ,Force Device Mode (host and device)" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x0C 29. " FORCEHSTMODE ,Force Host Mode (host and device)" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x0C 9. " HNPCAP ,HNP-Capable (host and device)" "Not capable,Capable"
|
|
bitfld.long 0x0C 8. " SRPCAP ,SRP-Capable (host and device)" "Not capable,Capable"
|
|
textline " "
|
|
bitfld.long 0x0C 5. " FSINTF ,Full-Speed Serial Interface Select (host and device)" "Not selected,Selected"
|
|
bitfld.long 0x0C 0.--2. " TOUTCAL ,Timeout Calibration (host and device)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "USB_GRSTCTL,Reset Register"
|
|
rbitfld.long 0x10 31. " AHBIDLE ,AHB Master Idle (host and device)" "No idle,Idle"
|
|
rbitfld.long 0x10 30. " DMAREQ ,DMA Request Signal (host and device)" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x10 6.--10. " TXFNUM ,TxFIFO Number (host and device)" "F0,F1,F2,F3,F4,F5,F6,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,FALL,?..."
|
|
bitfld.long 0x10 5. " TXFFLSH ,TxFIFO Flush (host and device)" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.long 0x10 4. " RXFFLSH ,RxFIFO Flush (host and device)" "Not flushed,Flushed"
|
|
bitfld.long 0x10 2. " FRMCNTRRST ,Host Frame Counter Reset (host only)" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x10 0. " CSFTRST ,Core Soft Reset (host and device)" "Not flushed,Flushed"
|
|
line.long 0x14 "USB_GINTSTS,Interrupt Register"
|
|
eventfld.long 0x14 31. " WKUPINT ,Resume/Remote Wakeup Detected Interrupt (host and device)" "No interrupt,Interrupt"
|
|
eventfld.long 0x14 30. " SESSREQINT ,Session Request/New Session Detected Interrupt (host and device)" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x14 29. " DISCONNINT ,Disconnect Detected Interrupt (host only)" "No interrupt,Interrupt"
|
|
eventfld.long 0x14 28. " CONIDSTSCHNG ,Connector ID Status Change (host and device)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.long 0x14 26. " PTXFEMP ,Periodic TxFIFO Empty (host only)" "No interrupt,Interrupt"
|
|
rbitfld.long 0x14 25. " HCHINT ,Host Channels Interrupt (host only)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.long 0x14 24. " PRTINT ,Host Port Interrupt (host only)" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.long 0x14 5. " NPTXFEMP ,Non-Periodic TxFIFO Empty (host only)" "Not empty,Empty"
|
|
rbitfld.long 0x14 4. " RXFLVL ,RxFIFO Non-Empty (host and device)" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.long 0x14 3. " SOF ,Start of Frame (host and device)" "No SOF,SOF"
|
|
rbitfld.long 0x14 2. " OTGINT ,OTG Interrupt (host and device)" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x14 1. " MODEMIS ,Mode Mismatch Interrupt (host and device)" "No interrupt,Interrupt"
|
|
rbitfld.long 0x14 0. " CURMOD ,Current Mode of Operation (host and device)" "DEVICE,HOST"
|
|
line.long 0x18 "USB_GINTMSK,Interrupt Mask Register"
|
|
bitfld.long 0x18 31. " WKUPINTMSK ,Resume/Remote Wakeup Detected Interrupt Mask (host and device)" "Masked,Not masked"
|
|
bitfld.long 0x18 30. " SESSREQINTMSK ,Session Request/New Session Detected Interrupt Mask (host and device)" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x18 29. " DISCONNINTMSK ,Disconnect Detected Interrupt Mask (host and device)" "Masked,Not masked"
|
|
bitfld.long 0x18 28. " CONIDSTSCHNGMSK ,Connector ID Status Change Mask (host and device)" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x18 26. " PTXFEMPMSK ,Periodic TxFIFO Empty Mask (host only)" "Masked,Not masked"
|
|
bitfld.long 0x18 25. " HCHINTMSK ,Host Channels Interrupt Mask (host only)" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x18 24. " PRTINTMSK ,Host Port Interrupt Mask (host only)" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x18 21. " INCOMPLPMSK ,Incomplete Periodic Transfer Mask (host only)" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x18 5. " NPTXFEMPMSK ,Non-Periodic TxFIFO Empty Mask (host only)" "Masked,Not masked"
|
|
bitfld.long 0x18 4. " RXFLVLMSK ,Receive FIFO Non-Empty Mask (host and device)" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x18 3. " SOFMSK ,Start of Frame Mask (host and device)" "Masked,Not masked"
|
|
bitfld.long 0x18 2. " OTGINTMSK ,OTG Interrupt Mask (host and device)" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x18 1. " MODEMISMSK ,Mode Mismatch Interrupt Mask (host and device)" "Masked,Not masked"
|
|
endif
|
|
if (((d.l(ad:0x400C4000+0x3C014))&0x1)==0x0)
|
|
rgroup.long 0x3C01C++0x7
|
|
line.long 0x00 "USB_GRXSTSR,Receive Status Debug Read Register"
|
|
bitfld.long 0x00 24.--27. " FN ,Frame Number (device only)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 17.--20. " PKTSTS ,Packet Status (host or device)" "Reserved,GOUTNAK,PKTRCV,XFERCOMPL,SETUPCOMPL,Reserved,SETUPRCV,?..."
|
|
textline " "
|
|
bitfld.long 0x00 15.--16. " DPID ,Data PID (host or device)" "DATA0,DATA1,DATA2,MDATA"
|
|
hexmask.long.word 0x00 4.--14. 1. " BCNT ,Byte Count (host or device)"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHEPNUM ,Endpoint Number (device only)" "0,1,2,3,4,5,6,7,8,9,10,11,?..."
|
|
line.long 0x04 "USB_GRXSTSP,Receive Status Read and Pop Register"
|
|
bitfld.long 0x04 21.--24. " FN ,Frame Number (device only)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 17.--20. " PKTSTS ,Packet Status (host or device)" "Reserved,GOUTNAK,PKTRCV,XFERCOMPL,SETUPCOMPL,Reserved,SETUPRCV,?..."
|
|
textline " "
|
|
bitfld.long 0x04 15.--16. " DPID ,Data PID (host or device)" "DATA0,DATA1,DATA2,MDATA"
|
|
hexmask.long.word 0x04 4.--14. 1. " BCNT ,Byte Count (host or device)"
|
|
textline " "
|
|
bitfld.long 0x04 0.--3. " CHEPNUM ,Endpoint Number (device only)" "0,1,2,3,4,5,6,7,8,9,10,11,?..."
|
|
else
|
|
rgroup.long 0x3C01C++0x7
|
|
line.long 0x00 "USB_GRXSTSR,Receive Status Debug Read Register"
|
|
bitfld.long 0x00 17.--20. " PKTSTS ,Packet Status (host or device)" "Reserved,Reserved,PKTRCV,XFERCOMPL,Reserved,TGLERR,Reserved,CHLT,?..."
|
|
textline " "
|
|
bitfld.long 0x00 15.--16. " DPID ,Data PID (host or device)" "DATA0,DATA1,DATA2,MDATA"
|
|
hexmask.long.word 0x00 4.--14. 1. " BCNT ,Byte Count (host or device)"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHEPNUM ,Channel Number (host only)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,?..."
|
|
line.long 0x04 "USB_GRXSTSP,Receive Status Read and Pop Register"
|
|
bitfld.long 0x04 17.--20. " PKTSTS ,Packet Status (host or device)" "Reserved,GOUTNAK,PKTRCV,XFERCOMPL,Reserved,TGLERR,Reserved,CHLT,?..."
|
|
textline " "
|
|
bitfld.long 0x04 15.--16. " DPID ,Data PID (host or device)" "DATA0,DATA1,DATA2,MDATA"
|
|
hexmask.long.word 0x04 4.--14. 1. " BCNT ,Byte Count (host or device)"
|
|
textline " "
|
|
bitfld.long 0x04 0.--3. " CHEPNUM ,Channel Number (host only)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,?..."
|
|
endif
|
|
group.long 0x3C024++0x3
|
|
line.long 0x00 "USB_GRXFSIZ,Receive FIFO Size Register"
|
|
hexmask.long.word 0x00 0.--9. 1. " RXFDEP ,RxFIFO Depth"
|
|
if (((d.l(ad:0x400C4000+0x3C014))&0x1)==0x0)
|
|
group.long 0x3C028++0x3
|
|
line.long 0x00 "USB_GNPTXFSIZ,Non-periodic Transmit FIFO Size Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " NPTXFINEPTXF0DEP ,IN Endpoint TxFIFO 0 Depth (device only)"
|
|
else
|
|
group.long 0x3C028++0x3
|
|
line.long 0x00 "USB_GNPTXFSIZ,Non-periodic Transmit FIFO Size Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " NPTXFINEPTXF0DEP ,Non-periodic TxFIFO Depth (host only)"
|
|
hexmask.long.word 0x00 0.--9. 1. " NPTXFSTADDR ,Non-periodic Transmit RAM Start Address (host only)"
|
|
endif
|
|
rgroup.long 0x3C02C++0x3
|
|
line.long 0x00 "USB_GNPTXSTS,Non-periodic Transmit FIFO/Queue Status Register"
|
|
bitfld.long 0x00 27.--30. " NPTXQTOP[6:3] ,Top of the Non-periodic Transmit Request Queue (Channel/endpoint number)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 25.--26. " NPTXQTOP[2:1] ,Top of the Non-periodic Transmit Request Queue (Type)" "IN/OUT token,Zero-length transmit packet,Reserved,Channel halt"
|
|
textline " "
|
|
bitfld.long 0x00 24. " NPTXQTOP[0] ,Top of the Non-periodic Transmit Request Queue (Terminate)" "0,1"
|
|
hexmask.long.byte 0x00 16.--23. 1. " NPTXQSPCAVAIL ,Non-periodic Transmit Request Queue Space Available"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " NPTXFSPCAVAIL ,Non-periodic TxFIFO Space Available"
|
|
group.long 0x3C05C++0x3
|
|
line.long 0x00 "USB_GDFIFOCFG,Global DFIFO Configuration Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " EPINFOBASEADDR ,Endpoint Info Base Address"
|
|
hexmask.long.word 0x00 0.--15. 1. " GDFIFOCFG ,DFIFO Config"
|
|
group.long 0x3C100++0x1B
|
|
line.long 0x00 "USB_HPTXFSIZ,Host Periodic Transmit FIFO Size Register"
|
|
hexmask.long.word 0x00 16.--25. 1. " PTXFSIZE ,Host Periodic TxFIFO Depth"
|
|
hexmask.long.word 0x00 0.--10. 1. " PTXFSTADDR ,Host Periodic TxFIFO Start Address"
|
|
line.long 0x4 "USB_DIEPTXF1,Device IN Endpoint Transmit FIFO 1 Size Register"
|
|
hexmask.long.word 0x4 16.--25. 1. " INEPNTXFDEP ,IN Endpoint TxFIFO Depth"
|
|
hexmask.long.word 0x4 0.--10. 1. " INEPNTXFSTADDR ,IN Endpoint FIFO 1 Transmit RAM Start Address"
|
|
line.long 0x8 "USB_DIEPTXF2,Device IN Endpoint Transmit FIFO 2 Size Register"
|
|
hexmask.long.word 0x8 16.--25. 1. " INEPNTXFDEP ,IN Endpoint TxFIFO Depth"
|
|
hexmask.long.word 0x8 0.--10. 1. " INEPNTXFSTADDR ,IN Endpoint FIFO 2 Transmit RAM Start Address"
|
|
line.long 0xC "USB_DIEPTXF3,Device IN Endpoint Transmit FIFO 3 Size Register"
|
|
hexmask.long.word 0xC 16.--25. 1. " INEPNTXFDEP ,IN Endpoint TxFIFO Depth"
|
|
hexmask.long.word 0xC 0.--11. 1. " INEPNTXFSTADDR ,IN Endpoint FIFO 3 Transmit RAM Start Address"
|
|
line.long 0x10 "USB_DIEPTXF4,Device IN Endpoint Transmit FIFO 4 Size Register"
|
|
hexmask.long.word 0x10 16.--25. 1. " INEPNTXFDEP ,IN Endpoint TxFIFO Depth"
|
|
hexmask.long.word 0x10 0.--11. 1. " INEPNTXFSTADDR ,IN Endpoint FIFO 4 Transmit RAM Start Address"
|
|
line.long 0x14 "USB_DIEPTXF5,Device IN Endpoint Transmit FIFO 5 Size Register"
|
|
hexmask.long.word 0x14 16.--25. 1. " INEPNTXFDEP ,IN Endpoint TxFIFO Depth"
|
|
hexmask.long.word 0x14 0.--11. 1. " INEPNTXFSTADDR ,IN Endpoint FIFO 5 Transmit RAM Start Address"
|
|
line.long 0x18 "USB_DIEPTXF6,Device IN Endpoint Transmit FIFO 6 Size Register"
|
|
hexmask.long.word 0x18 16.--25. 1. " INEPNTXFDEP ,IN Endpoint TxFIFO Depth"
|
|
hexmask.long.word 0x18 0.--11. 1. " INEPNTXFSTADDR ,IN Endpoint FIFO 6 Transmit RAM Start Address"
|
|
group.long 0x3C400++0x7
|
|
line.long 0x00 "USB_HCFG,Host Configuration Register"
|
|
bitfld.long 0x00 31. " MODECHTIMEN ,Mode Change Time" "200 PHY/SE0,SE0"
|
|
hexmask.long.byte 0x00 8.--15. 1. " RESVALID ,Resume Validation Period"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ENA32KHZS ,Enable 32 KHz Suspend mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " FSLSSUPP ,FS- and LS-Only Support" "HSFSLS,FSLS"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " FSLSPCLKSEL ,FS/LS PHY Clock Select" "Reserved,DIV1,DIV8,?..."
|
|
line.long 0x04 "USB_HFIR,Host Frame Interval Register"
|
|
bitfld.long 0x04 16. " HFIRRLDCTRL ,Reload Control" "STATIC,DYNAMIC"
|
|
hexmask.long.word 0x04 0.--15. 1. " FRINT ,Frame Interval"
|
|
rgroup.long 0x3C408++0x3
|
|
line.long 0x00 "USB_HFNUM,Host Frame Number/Frame Time Remaining Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " FRREM ,Frame Time Remaining"
|
|
hexmask.long.word 0x00 0.--15. 1. " FRNUM ,Frame Number"
|
|
rgroup.long 0x3C410++0x07
|
|
line.long 0x00 "USB_HPTXSTS,Host Periodic Transmit FIFO/Queue Status Register"
|
|
bitfld.long 0x00 31. " PTXQTOP ,Top of the Periodic Transmit Request Queue (Odd/Even Frame)" "Even,Odd"
|
|
bitfld.long 0x00 27.--30. " PTXQTOP ,Top of the Periodic Transmit Request Queue (Channel/endpoint number)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " PTXQTOP ,Top of the Periodic Transmit Request Queue (Type)" "IN/OUT,Zero-length packet,Reserved,Disabled"
|
|
bitfld.long 0x00 24. " PTXQTOP ,Top of the Periodic Transmit Request Queue (Terminate)" "0,1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 16.--23. 1. " PTXQSPCAVAIL ,Periodic Transmit Request Queue Space Available"
|
|
hexmask.long.word 0x00 0.--15. 1. " PTXFSPCAVAIL ,Periodic Transmit Data FIFO Space Available"
|
|
line.long 0x04 "USB_HAINT,Host All Channels Interrupt Register"
|
|
bitfld.long 0x04 13. " HAINT13 ,Channel Interrupt for channel 13" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 12. " HAINT12 ,Channel Interrupt for channel 12" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 11. " HAINT11 ,Channel Interrupt for channel 11" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 10. " HAINT10 ,Channel Interrupt for channel 10" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 9. " HAINT9 ,Channel Interrupt for channel 9" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 8. " HAINT8 ,Channel Interrupt for channel 8" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 7. " HAINT7 ,Channel Interrupt for channel 7" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 6. " HAINT6 ,Channel Interrupt for channel 6" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 5. " HAINT5 ,Channel Interrupt for channel 5" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 4. " HAINT4 ,Channel Interrupt for channel 4" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 3. " HAINT3 ,Channel Interrupt for channel 3" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " HAINT2 ,Channel Interrupt for channel 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 1. " HAINT1 ,Channel Interrupt for channel 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " HAINT0 ,Channel Interrupt for channel 0" "No interrupt,Interrupt"
|
|
group.long 0x3C418++0x03
|
|
line.long 0x00 "USB_HAINTMSK,Host All Channels Interrupt Mask Register"
|
|
bitfld.long 0x00 13. " HAINTMSK13 ,Channel Interrupt Mask for channel 13" "Masked,Not masked"
|
|
bitfld.long 0x00 12. " HAINTMSK12 ,Channel Interrupt Mask for channel 12" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " HAINTMSK11 ,Channel Interrupt Mask for channel 11" "Masked,Not masked"
|
|
bitfld.long 0x00 10. " HAINTMSK10 ,Channel Interrupt Mask for channel 10" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " HAINTMSK9 ,Channel Interrupt Mask for channel 9" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " HAINTMSK8 ,Channel Interrupt Mask for channel 8" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " HAINTMSK7 ,Channel Interrupt Mask for channel 7" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " HAINTMSK6 ,Channel Interrupt Mask for channel 6" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " HAINTMSK5 ,Channel Interrupt Mask for channel 5" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " HAINTMSK4 ,Channel Interrupt Mask for channel 4" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " HAINTMSK3 ,Channel Interrupt Mask for channel 3" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " HAINTMSK2 ,Channel Interrupt Mask for channel 2" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " HAINTMSK1 ,Channel Interrupt Mask for channel 1" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " HAINTMSK0 ,Channel Interrupt Mask for channel 0" "Masked,Not masked"
|
|
group.long 0x3C440++0x3
|
|
line.long 0x00 "USB_HPRT,Host Port Control and Status Register"
|
|
bitfld.long 0x00 17.--18. " PRTSPD ,Port Speed" "HS,FS,LS,?..."
|
|
bitfld.long 0x00 13.--16. " PRTTSTCTL ,Port Test Control" "DISABLE,J,K,SE0NAK,PACKET,FORCE,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12. " PRTPWR ,Port Power" "OFF,ON"
|
|
bitfld.long 0x00 10.--11. " PRTLNSTS ,Port Line Status (D+/D-)" "Low/Low,Low/High,High/Low,High/High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PRTRST ,Port Reset" "No reset,Reset"
|
|
bitfld.long 0x00 7. " PRTSUSP ,Port Suspend" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.long 0x00 6. " PRTRES ,Port Resume" "Not resumed,Resumed"
|
|
bitfld.long 0x00 5. " PRTOVRCURRCHNG ,Port Overcurrent Change" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PRTOVRCURRACT ,Port Overcurrent Active" "Not active,Active"
|
|
bitfld.long 0x00 3. " PRTENCHNG ,Port Enable/Disable Change" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PRTENA ,Port Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " PRTCONNDET ,Port Connect Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PRTCONNSTS ,Port Connect Status" "Not connected,Connected"
|
|
tree "USB Host Channel 0"
|
|
group.long (0x3C500+0x0)++0x13
|
|
line.long 0x00 "USB_HC0_CHAR,Host Channel 0 Characteristics Register"
|
|
bitfld.long 0x00 31. " CHENA ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CHDIS ,Channel Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ODDFRM ,Odd Frame" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device Address"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " MC ,Multi Count" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "CONTROL,ISO,BULK,INT"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LSPDDEV ,Low-Speed Device" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " EPDIR ,Endpoint Direction" "OUT,IN"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " EPNUM ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,?..."
|
|
hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum Packet Size"
|
|
group.long (0x3C508+0x0)++0xF
|
|
line.long 0x00 "USB_HC0_INT,Host Channel 0 Interrupt Register"
|
|
eventfld.long 0x00 10. " DATATGLERR ,Data Toggle Error" "No error,Error"
|
|
eventfld.long 0x00 9. " FRMOVRUN ,Frame Overrun" "No overrun,Overrun"
|
|
textline " "
|
|
eventfld.long 0x00 8. " BBLERR ,Babble Error" "No error,Error"
|
|
eventfld.long 0x00 7. " XACTERR ,Transaction Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 5. " ACK ,ACK Response Received/Transmitted Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " NAK ,NAK Response Received Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STALL ,STALL Response Received Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHHLTD ,Channel Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed" "Not completed,Completed"
|
|
line.long 0x04 "USB_HC0_INTMSK,Host Channel 0 Interrupt Mask Register"
|
|
bitfld.long 0x04 10. " DATATGLERRMSK ,Data Toggle Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 9. " FRMOVRUNMSK ,Frame Overrun Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 8. " BBLERRMSK ,Babble Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 7. " XACTERRMSK ,Transaction Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 5. " ACKMSK ,ACK Response Received/Transmitted Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 4. " NAKMSK ,NAK Response Received Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " STALLMSK ,STALL Response Received Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 2. " AHBERRMSK ,AHB Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CHHLTDMSK ,Channel Halted Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer Completed Mask" "Masked,Not masked"
|
|
line.long 0x08 "USB_HC0_TSIZ,Host Channel 0 Transfer Size Register"
|
|
bitfld.long 0x08 29.--30. " PID ,Packet ID" "DATA0,DATA2,DATA1,MDATA"
|
|
hexmask.long.word 0x08 19.--28. 1. " PKTCNT ,Packet Count"
|
|
textline " "
|
|
hexmask.long.tbyte 0x08 0.--18. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x0C "USB_HC0_DMAADDR,Host Channel 0 DMA Address Register"
|
|
tree.end
|
|
tree "USB Host Channel 1"
|
|
group.long (0x3C500+0x20)++0x13
|
|
line.long 0x00 "USB_HC1_CHAR,Host Channel 1 Characteristics Register"
|
|
bitfld.long 0x00 31. " CHENA ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CHDIS ,Channel Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ODDFRM ,Odd Frame" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device Address"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " MC ,Multi Count" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "CONTROL,ISO,BULK,INT"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LSPDDEV ,Low-Speed Device" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " EPDIR ,Endpoint Direction" "OUT,IN"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " EPNUM ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,?..."
|
|
hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum Packet Size"
|
|
group.long (0x3C508+0x20)++0xF
|
|
line.long 0x00 "USB_HC1_INT,Host Channel 1 Interrupt Register"
|
|
eventfld.long 0x00 10. " DATATGLERR ,Data Toggle Error" "No error,Error"
|
|
eventfld.long 0x00 9. " FRMOVRUN ,Frame Overrun" "No overrun,Overrun"
|
|
textline " "
|
|
eventfld.long 0x00 8. " BBLERR ,Babble Error" "No error,Error"
|
|
eventfld.long 0x00 7. " XACTERR ,Transaction Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 5. " ACK ,ACK Response Received/Transmitted Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " NAK ,NAK Response Received Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STALL ,STALL Response Received Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHHLTD ,Channel Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed" "Not completed,Completed"
|
|
line.long 0x04 "USB_HC1_INTMSK,Host Channel 1 Interrupt Mask Register"
|
|
bitfld.long 0x04 10. " DATATGLERRMSK ,Data Toggle Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 9. " FRMOVRUNMSK ,Frame Overrun Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 8. " BBLERRMSK ,Babble Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 7. " XACTERRMSK ,Transaction Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 5. " ACKMSK ,ACK Response Received/Transmitted Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 4. " NAKMSK ,NAK Response Received Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " STALLMSK ,STALL Response Received Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 2. " AHBERRMSK ,AHB Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CHHLTDMSK ,Channel Halted Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer Completed Mask" "Masked,Not masked"
|
|
line.long 0x08 "USB_HC1_TSIZ,Host Channel 1 Transfer Size Register"
|
|
bitfld.long 0x08 29.--30. " PID ,Packet ID" "DATA0,DATA2,DATA1,MDATA"
|
|
hexmask.long.word 0x08 19.--28. 1. " PKTCNT ,Packet Count"
|
|
textline " "
|
|
hexmask.long.tbyte 0x08 0.--18. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x0C "USB_HC1_DMAADDR,Host Channel 1 DMA Address Register"
|
|
tree.end
|
|
tree "USB Host Channel 2"
|
|
group.long (0x3C500+0x40)++0x13
|
|
line.long 0x00 "USB_HC2_CHAR,Host Channel 2 Characteristics Register"
|
|
bitfld.long 0x00 31. " CHENA ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CHDIS ,Channel Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ODDFRM ,Odd Frame" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device Address"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " MC ,Multi Count" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "CONTROL,ISO,BULK,INT"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LSPDDEV ,Low-Speed Device" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " EPDIR ,Endpoint Direction" "OUT,IN"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " EPNUM ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,?..."
|
|
hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum Packet Size"
|
|
group.long (0x3C508+0x40)++0xF
|
|
line.long 0x00 "USB_HC2_INT,Host Channel 2 Interrupt Register"
|
|
eventfld.long 0x00 10. " DATATGLERR ,Data Toggle Error" "No error,Error"
|
|
eventfld.long 0x00 9. " FRMOVRUN ,Frame Overrun" "No overrun,Overrun"
|
|
textline " "
|
|
eventfld.long 0x00 8. " BBLERR ,Babble Error" "No error,Error"
|
|
eventfld.long 0x00 7. " XACTERR ,Transaction Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 5. " ACK ,ACK Response Received/Transmitted Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " NAK ,NAK Response Received Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STALL ,STALL Response Received Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHHLTD ,Channel Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed" "Not completed,Completed"
|
|
line.long 0x04 "USB_HC2_INTMSK,Host Channel 2 Interrupt Mask Register"
|
|
bitfld.long 0x04 10. " DATATGLERRMSK ,Data Toggle Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 9. " FRMOVRUNMSK ,Frame Overrun Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 8. " BBLERRMSK ,Babble Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 7. " XACTERRMSK ,Transaction Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 5. " ACKMSK ,ACK Response Received/Transmitted Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 4. " NAKMSK ,NAK Response Received Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " STALLMSK ,STALL Response Received Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 2. " AHBERRMSK ,AHB Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CHHLTDMSK ,Channel Halted Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer Completed Mask" "Masked,Not masked"
|
|
line.long 0x08 "USB_HC2_TSIZ,Host Channel 2 Transfer Size Register"
|
|
bitfld.long 0x08 29.--30. " PID ,Packet ID" "DATA0,DATA2,DATA1,MDATA"
|
|
hexmask.long.word 0x08 19.--28. 1. " PKTCNT ,Packet Count"
|
|
textline " "
|
|
hexmask.long.tbyte 0x08 0.--18. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x0C "USB_HC2_DMAADDR,Host Channel 2 DMA Address Register"
|
|
tree.end
|
|
tree "USB Host Channel 3"
|
|
group.long (0x3C500+0x60)++0x13
|
|
line.long 0x00 "USB_HC3_CHAR,Host Channel 3 Characteristics Register"
|
|
bitfld.long 0x00 31. " CHENA ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CHDIS ,Channel Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ODDFRM ,Odd Frame" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device Address"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " MC ,Multi Count" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "CONTROL,ISO,BULK,INT"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LSPDDEV ,Low-Speed Device" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " EPDIR ,Endpoint Direction" "OUT,IN"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " EPNUM ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,?..."
|
|
hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum Packet Size"
|
|
group.long (0x3C508+0x60)++0xF
|
|
line.long 0x00 "USB_HC3_INT,Host Channel 3 Interrupt Register"
|
|
eventfld.long 0x00 10. " DATATGLERR ,Data Toggle Error" "No error,Error"
|
|
eventfld.long 0x00 9. " FRMOVRUN ,Frame Overrun" "No overrun,Overrun"
|
|
textline " "
|
|
eventfld.long 0x00 8. " BBLERR ,Babble Error" "No error,Error"
|
|
eventfld.long 0x00 7. " XACTERR ,Transaction Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 5. " ACK ,ACK Response Received/Transmitted Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " NAK ,NAK Response Received Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STALL ,STALL Response Received Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHHLTD ,Channel Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed" "Not completed,Completed"
|
|
line.long 0x04 "USB_HC3_INTMSK,Host Channel 3 Interrupt Mask Register"
|
|
bitfld.long 0x04 10. " DATATGLERRMSK ,Data Toggle Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 9. " FRMOVRUNMSK ,Frame Overrun Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 8. " BBLERRMSK ,Babble Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 7. " XACTERRMSK ,Transaction Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 5. " ACKMSK ,ACK Response Received/Transmitted Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 4. " NAKMSK ,NAK Response Received Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " STALLMSK ,STALL Response Received Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 2. " AHBERRMSK ,AHB Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CHHLTDMSK ,Channel Halted Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer Completed Mask" "Masked,Not masked"
|
|
line.long 0x08 "USB_HC3_TSIZ,Host Channel 3 Transfer Size Register"
|
|
bitfld.long 0x08 29.--30. " PID ,Packet ID" "DATA0,DATA2,DATA1,MDATA"
|
|
hexmask.long.word 0x08 19.--28. 1. " PKTCNT ,Packet Count"
|
|
textline " "
|
|
hexmask.long.tbyte 0x08 0.--18. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x0C "USB_HC3_DMAADDR,Host Channel 3 DMA Address Register"
|
|
tree.end
|
|
tree "USB Host Channel 4"
|
|
group.long (0x3C500+0x80)++0x13
|
|
line.long 0x00 "USB_HC4_CHAR,Host Channel 4 Characteristics Register"
|
|
bitfld.long 0x00 31. " CHENA ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CHDIS ,Channel Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ODDFRM ,Odd Frame" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device Address"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " MC ,Multi Count" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "CONTROL,ISO,BULK,INT"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LSPDDEV ,Low-Speed Device" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " EPDIR ,Endpoint Direction" "OUT,IN"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " EPNUM ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,?..."
|
|
hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum Packet Size"
|
|
group.long (0x3C508+0x80)++0xF
|
|
line.long 0x00 "USB_HC4_INT,Host Channel 4 Interrupt Register"
|
|
eventfld.long 0x00 10. " DATATGLERR ,Data Toggle Error" "No error,Error"
|
|
eventfld.long 0x00 9. " FRMOVRUN ,Frame Overrun" "No overrun,Overrun"
|
|
textline " "
|
|
eventfld.long 0x00 8. " BBLERR ,Babble Error" "No error,Error"
|
|
eventfld.long 0x00 7. " XACTERR ,Transaction Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 5. " ACK ,ACK Response Received/Transmitted Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " NAK ,NAK Response Received Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STALL ,STALL Response Received Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHHLTD ,Channel Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed" "Not completed,Completed"
|
|
line.long 0x04 "USB_HC4_INTMSK,Host Channel 4 Interrupt Mask Register"
|
|
bitfld.long 0x04 10. " DATATGLERRMSK ,Data Toggle Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 9. " FRMOVRUNMSK ,Frame Overrun Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 8. " BBLERRMSK ,Babble Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 7. " XACTERRMSK ,Transaction Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 5. " ACKMSK ,ACK Response Received/Transmitted Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 4. " NAKMSK ,NAK Response Received Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " STALLMSK ,STALL Response Received Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 2. " AHBERRMSK ,AHB Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CHHLTDMSK ,Channel Halted Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer Completed Mask" "Masked,Not masked"
|
|
line.long 0x08 "USB_HC4_TSIZ,Host Channel 4 Transfer Size Register"
|
|
bitfld.long 0x08 29.--30. " PID ,Packet ID" "DATA0,DATA2,DATA1,MDATA"
|
|
hexmask.long.word 0x08 19.--28. 1. " PKTCNT ,Packet Count"
|
|
textline " "
|
|
hexmask.long.tbyte 0x08 0.--18. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x0C "USB_HC4_DMAADDR,Host Channel 4 DMA Address Register"
|
|
tree.end
|
|
tree "USB Host Channel 5"
|
|
group.long (0x3C500+0xA0)++0x13
|
|
line.long 0x00 "USB_HC5_CHAR,Host Channel 5 Characteristics Register"
|
|
bitfld.long 0x00 31. " CHENA ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CHDIS ,Channel Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ODDFRM ,Odd Frame" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device Address"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " MC ,Multi Count" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "CONTROL,ISO,BULK,INT"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LSPDDEV ,Low-Speed Device" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " EPDIR ,Endpoint Direction" "OUT,IN"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " EPNUM ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,?..."
|
|
hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum Packet Size"
|
|
group.long (0x3C508+0xA0)++0xF
|
|
line.long 0x00 "USB_HC5_INT,Host Channel 5 Interrupt Register"
|
|
eventfld.long 0x00 10. " DATATGLERR ,Data Toggle Error" "No error,Error"
|
|
eventfld.long 0x00 9. " FRMOVRUN ,Frame Overrun" "No overrun,Overrun"
|
|
textline " "
|
|
eventfld.long 0x00 8. " BBLERR ,Babble Error" "No error,Error"
|
|
eventfld.long 0x00 7. " XACTERR ,Transaction Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 5. " ACK ,ACK Response Received/Transmitted Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " NAK ,NAK Response Received Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STALL ,STALL Response Received Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHHLTD ,Channel Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed" "Not completed,Completed"
|
|
line.long 0x04 "USB_HC5_INTMSK,Host Channel 5 Interrupt Mask Register"
|
|
bitfld.long 0x04 10. " DATATGLERRMSK ,Data Toggle Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 9. " FRMOVRUNMSK ,Frame Overrun Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 8. " BBLERRMSK ,Babble Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 7. " XACTERRMSK ,Transaction Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 5. " ACKMSK ,ACK Response Received/Transmitted Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 4. " NAKMSK ,NAK Response Received Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " STALLMSK ,STALL Response Received Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 2. " AHBERRMSK ,AHB Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CHHLTDMSK ,Channel Halted Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer Completed Mask" "Masked,Not masked"
|
|
line.long 0x08 "USB_HC5_TSIZ,Host Channel 5 Transfer Size Register"
|
|
bitfld.long 0x08 29.--30. " PID ,Packet ID" "DATA0,DATA2,DATA1,MDATA"
|
|
hexmask.long.word 0x08 19.--28. 1. " PKTCNT ,Packet Count"
|
|
textline " "
|
|
hexmask.long.tbyte 0x08 0.--18. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x0C "USB_HC5_DMAADDR,Host Channel 5 DMA Address Register"
|
|
tree.end
|
|
tree "USB Host Channel 6"
|
|
group.long (0x3C500+0xC0)++0x13
|
|
line.long 0x00 "USB_HC6_CHAR,Host Channel 6 Characteristics Register"
|
|
bitfld.long 0x00 31. " CHENA ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CHDIS ,Channel Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ODDFRM ,Odd Frame" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device Address"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " MC ,Multi Count" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "CONTROL,ISO,BULK,INT"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LSPDDEV ,Low-Speed Device" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " EPDIR ,Endpoint Direction" "OUT,IN"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " EPNUM ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,?..."
|
|
hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum Packet Size"
|
|
group.long (0x3C508+0xC0)++0xF
|
|
line.long 0x00 "USB_HC6_INT,Host Channel 6 Interrupt Register"
|
|
eventfld.long 0x00 10. " DATATGLERR ,Data Toggle Error" "No error,Error"
|
|
eventfld.long 0x00 9. " FRMOVRUN ,Frame Overrun" "No overrun,Overrun"
|
|
textline " "
|
|
eventfld.long 0x00 8. " BBLERR ,Babble Error" "No error,Error"
|
|
eventfld.long 0x00 7. " XACTERR ,Transaction Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 5. " ACK ,ACK Response Received/Transmitted Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " NAK ,NAK Response Received Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STALL ,STALL Response Received Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHHLTD ,Channel Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed" "Not completed,Completed"
|
|
line.long 0x04 "USB_HC6_INTMSK,Host Channel 6 Interrupt Mask Register"
|
|
bitfld.long 0x04 10. " DATATGLERRMSK ,Data Toggle Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 9. " FRMOVRUNMSK ,Frame Overrun Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 8. " BBLERRMSK ,Babble Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 7. " XACTERRMSK ,Transaction Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 5. " ACKMSK ,ACK Response Received/Transmitted Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 4. " NAKMSK ,NAK Response Received Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " STALLMSK ,STALL Response Received Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 2. " AHBERRMSK ,AHB Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CHHLTDMSK ,Channel Halted Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer Completed Mask" "Masked,Not masked"
|
|
line.long 0x08 "USB_HC6_TSIZ,Host Channel 6 Transfer Size Register"
|
|
bitfld.long 0x08 29.--30. " PID ,Packet ID" "DATA0,DATA2,DATA1,MDATA"
|
|
hexmask.long.word 0x08 19.--28. 1. " PKTCNT ,Packet Count"
|
|
textline " "
|
|
hexmask.long.tbyte 0x08 0.--18. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x0C "USB_HC6_DMAADDR,Host Channel 6 DMA Address Register"
|
|
tree.end
|
|
tree "USB Host Channel 7"
|
|
group.long (0x3C500+0xE0)++0x13
|
|
line.long 0x00 "USB_HC7_CHAR,Host Channel 7 Characteristics Register"
|
|
bitfld.long 0x00 31. " CHENA ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CHDIS ,Channel Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ODDFRM ,Odd Frame" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device Address"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " MC ,Multi Count" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "CONTROL,ISO,BULK,INT"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LSPDDEV ,Low-Speed Device" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " EPDIR ,Endpoint Direction" "OUT,IN"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " EPNUM ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,?..."
|
|
hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum Packet Size"
|
|
group.long (0x3C508+0xE0)++0xF
|
|
line.long 0x00 "USB_HC7_INT,Host Channel 7 Interrupt Register"
|
|
eventfld.long 0x00 10. " DATATGLERR ,Data Toggle Error" "No error,Error"
|
|
eventfld.long 0x00 9. " FRMOVRUN ,Frame Overrun" "No overrun,Overrun"
|
|
textline " "
|
|
eventfld.long 0x00 8. " BBLERR ,Babble Error" "No error,Error"
|
|
eventfld.long 0x00 7. " XACTERR ,Transaction Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 5. " ACK ,ACK Response Received/Transmitted Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " NAK ,NAK Response Received Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STALL ,STALL Response Received Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHHLTD ,Channel Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed" "Not completed,Completed"
|
|
line.long 0x04 "USB_HC7_INTMSK,Host Channel 7 Interrupt Mask Register"
|
|
bitfld.long 0x04 10. " DATATGLERRMSK ,Data Toggle Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 9. " FRMOVRUNMSK ,Frame Overrun Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 8. " BBLERRMSK ,Babble Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 7. " XACTERRMSK ,Transaction Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 5. " ACKMSK ,ACK Response Received/Transmitted Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 4. " NAKMSK ,NAK Response Received Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " STALLMSK ,STALL Response Received Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 2. " AHBERRMSK ,AHB Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CHHLTDMSK ,Channel Halted Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer Completed Mask" "Masked,Not masked"
|
|
line.long 0x08 "USB_HC7_TSIZ,Host Channel 7 Transfer Size Register"
|
|
bitfld.long 0x08 29.--30. " PID ,Packet ID" "DATA0,DATA2,DATA1,MDATA"
|
|
hexmask.long.word 0x08 19.--28. 1. " PKTCNT ,Packet Count"
|
|
textline " "
|
|
hexmask.long.tbyte 0x08 0.--18. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x0C "USB_HC7_DMAADDR,Host Channel 7 DMA Address Register"
|
|
tree.end
|
|
tree "USB Host Channel 8"
|
|
group.long (0x3C500+0x100)++0x13
|
|
line.long 0x00 "USB_HC8_CHAR,Host Channel 8 Characteristics Register"
|
|
bitfld.long 0x00 31. " CHENA ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CHDIS ,Channel Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ODDFRM ,Odd Frame" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device Address"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " MC ,Multi Count" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "CONTROL,ISO,BULK,INT"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LSPDDEV ,Low-Speed Device" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " EPDIR ,Endpoint Direction" "OUT,IN"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " EPNUM ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,?..."
|
|
hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum Packet Size"
|
|
group.long (0x3C508+0x100)++0xF
|
|
line.long 0x00 "USB_HC8_INT,Host Channel 8 Interrupt Register"
|
|
eventfld.long 0x00 10. " DATATGLERR ,Data Toggle Error" "No error,Error"
|
|
eventfld.long 0x00 9. " FRMOVRUN ,Frame Overrun" "No overrun,Overrun"
|
|
textline " "
|
|
eventfld.long 0x00 8. " BBLERR ,Babble Error" "No error,Error"
|
|
eventfld.long 0x00 7. " XACTERR ,Transaction Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 5. " ACK ,ACK Response Received/Transmitted Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " NAK ,NAK Response Received Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STALL ,STALL Response Received Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHHLTD ,Channel Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed" "Not completed,Completed"
|
|
line.long 0x04 "USB_HC8_INTMSK,Host Channel 8 Interrupt Mask Register"
|
|
bitfld.long 0x04 10. " DATATGLERRMSK ,Data Toggle Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 9. " FRMOVRUNMSK ,Frame Overrun Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 8. " BBLERRMSK ,Babble Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 7. " XACTERRMSK ,Transaction Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 5. " ACKMSK ,ACK Response Received/Transmitted Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 4. " NAKMSK ,NAK Response Received Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " STALLMSK ,STALL Response Received Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 2. " AHBERRMSK ,AHB Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CHHLTDMSK ,Channel Halted Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer Completed Mask" "Masked,Not masked"
|
|
line.long 0x08 "USB_HC8_TSIZ,Host Channel 8 Transfer Size Register"
|
|
bitfld.long 0x08 29.--30. " PID ,Packet ID" "DATA0,DATA2,DATA1,MDATA"
|
|
hexmask.long.word 0x08 19.--28. 1. " PKTCNT ,Packet Count"
|
|
textline " "
|
|
hexmask.long.tbyte 0x08 0.--18. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x0C "USB_HC8_DMAADDR,Host Channel 8 DMA Address Register"
|
|
tree.end
|
|
tree "USB Host Channel 9"
|
|
group.long (0x3C500+0x120)++0x13
|
|
line.long 0x00 "USB_HC9_CHAR,Host Channel 9 Characteristics Register"
|
|
bitfld.long 0x00 31. " CHENA ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CHDIS ,Channel Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ODDFRM ,Odd Frame" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device Address"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " MC ,Multi Count" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "CONTROL,ISO,BULK,INT"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LSPDDEV ,Low-Speed Device" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " EPDIR ,Endpoint Direction" "OUT,IN"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " EPNUM ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,?..."
|
|
hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum Packet Size"
|
|
group.long (0x3C508+0x120)++0xF
|
|
line.long 0x00 "USB_HC9_INT,Host Channel 9 Interrupt Register"
|
|
eventfld.long 0x00 10. " DATATGLERR ,Data Toggle Error" "No error,Error"
|
|
eventfld.long 0x00 9. " FRMOVRUN ,Frame Overrun" "No overrun,Overrun"
|
|
textline " "
|
|
eventfld.long 0x00 8. " BBLERR ,Babble Error" "No error,Error"
|
|
eventfld.long 0x00 7. " XACTERR ,Transaction Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 5. " ACK ,ACK Response Received/Transmitted Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " NAK ,NAK Response Received Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STALL ,STALL Response Received Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHHLTD ,Channel Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed" "Not completed,Completed"
|
|
line.long 0x04 "USB_HC9_INTMSK,Host Channel 9 Interrupt Mask Register"
|
|
bitfld.long 0x04 10. " DATATGLERRMSK ,Data Toggle Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 9. " FRMOVRUNMSK ,Frame Overrun Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 8. " BBLERRMSK ,Babble Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 7. " XACTERRMSK ,Transaction Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 5. " ACKMSK ,ACK Response Received/Transmitted Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 4. " NAKMSK ,NAK Response Received Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " STALLMSK ,STALL Response Received Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 2. " AHBERRMSK ,AHB Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CHHLTDMSK ,Channel Halted Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer Completed Mask" "Masked,Not masked"
|
|
line.long 0x08 "USB_HC9_TSIZ,Host Channel 9 Transfer Size Register"
|
|
bitfld.long 0x08 29.--30. " PID ,Packet ID" "DATA0,DATA2,DATA1,MDATA"
|
|
hexmask.long.word 0x08 19.--28. 1. " PKTCNT ,Packet Count"
|
|
textline " "
|
|
hexmask.long.tbyte 0x08 0.--18. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x0C "USB_HC9_DMAADDR,Host Channel 9 DMA Address Register"
|
|
tree.end
|
|
tree "USB Host Channel 10"
|
|
group.long (0x3C500+0x140)++0x13
|
|
line.long 0x00 "USB_HC10_CHAR,Host Channel 10 Characteristics Register"
|
|
bitfld.long 0x00 31. " CHENA ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CHDIS ,Channel Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ODDFRM ,Odd Frame" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device Address"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " MC ,Multi Count" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "CONTROL,ISO,BULK,INT"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LSPDDEV ,Low-Speed Device" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " EPDIR ,Endpoint Direction" "OUT,IN"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " EPNUM ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,?..."
|
|
hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum Packet Size"
|
|
group.long (0x3C508+0x140)++0xF
|
|
line.long 0x00 "USB_HC10_INT,Host Channel 10 Interrupt Register"
|
|
eventfld.long 0x00 10. " DATATGLERR ,Data Toggle Error" "No error,Error"
|
|
eventfld.long 0x00 9. " FRMOVRUN ,Frame Overrun" "No overrun,Overrun"
|
|
textline " "
|
|
eventfld.long 0x00 8. " BBLERR ,Babble Error" "No error,Error"
|
|
eventfld.long 0x00 7. " XACTERR ,Transaction Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 5. " ACK ,ACK Response Received/Transmitted Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " NAK ,NAK Response Received Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STALL ,STALL Response Received Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHHLTD ,Channel Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed" "Not completed,Completed"
|
|
line.long 0x04 "USB_HC10_INTMSK,Host Channel 10 Interrupt Mask Register"
|
|
bitfld.long 0x04 10. " DATATGLERRMSK ,Data Toggle Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 9. " FRMOVRUNMSK ,Frame Overrun Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 8. " BBLERRMSK ,Babble Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 7. " XACTERRMSK ,Transaction Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 5. " ACKMSK ,ACK Response Received/Transmitted Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 4. " NAKMSK ,NAK Response Received Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " STALLMSK ,STALL Response Received Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 2. " AHBERRMSK ,AHB Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CHHLTDMSK ,Channel Halted Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer Completed Mask" "Masked,Not masked"
|
|
line.long 0x08 "USB_HC10_TSIZ,Host Channel 10 Transfer Size Register"
|
|
bitfld.long 0x08 29.--30. " PID ,Packet ID" "DATA0,DATA2,DATA1,MDATA"
|
|
hexmask.long.word 0x08 19.--28. 1. " PKTCNT ,Packet Count"
|
|
textline " "
|
|
hexmask.long.tbyte 0x08 0.--18. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x0C "USB_HC10_DMAADDR,Host Channel 10 DMA Address Register"
|
|
tree.end
|
|
tree "USB Host Channel 11"
|
|
group.long (0x3C500+0x160)++0x13
|
|
line.long 0x00 "USB_HC11_CHAR,Host Channel 11 Characteristics Register"
|
|
bitfld.long 0x00 31. " CHENA ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CHDIS ,Channel Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ODDFRM ,Odd Frame" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device Address"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " MC ,Multi Count" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "CONTROL,ISO,BULK,INT"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LSPDDEV ,Low-Speed Device" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " EPDIR ,Endpoint Direction" "OUT,IN"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " EPNUM ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,?..."
|
|
hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum Packet Size"
|
|
group.long (0x3C508+0x160)++0xF
|
|
line.long 0x00 "USB_HC11_INT,Host Channel 11 Interrupt Register"
|
|
eventfld.long 0x00 10. " DATATGLERR ,Data Toggle Error" "No error,Error"
|
|
eventfld.long 0x00 9. " FRMOVRUN ,Frame Overrun" "No overrun,Overrun"
|
|
textline " "
|
|
eventfld.long 0x00 8. " BBLERR ,Babble Error" "No error,Error"
|
|
eventfld.long 0x00 7. " XACTERR ,Transaction Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 5. " ACK ,ACK Response Received/Transmitted Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " NAK ,NAK Response Received Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STALL ,STALL Response Received Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHHLTD ,Channel Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed" "Not completed,Completed"
|
|
line.long 0x04 "USB_HC11_INTMSK,Host Channel 11 Interrupt Mask Register"
|
|
bitfld.long 0x04 10. " DATATGLERRMSK ,Data Toggle Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 9. " FRMOVRUNMSK ,Frame Overrun Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 8. " BBLERRMSK ,Babble Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 7. " XACTERRMSK ,Transaction Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 5. " ACKMSK ,ACK Response Received/Transmitted Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 4. " NAKMSK ,NAK Response Received Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " STALLMSK ,STALL Response Received Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 2. " AHBERRMSK ,AHB Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CHHLTDMSK ,Channel Halted Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer Completed Mask" "Masked,Not masked"
|
|
line.long 0x08 "USB_HC11_TSIZ,Host Channel 11 Transfer Size Register"
|
|
bitfld.long 0x08 29.--30. " PID ,Packet ID" "DATA0,DATA2,DATA1,MDATA"
|
|
hexmask.long.word 0x08 19.--28. 1. " PKTCNT ,Packet Count"
|
|
textline " "
|
|
hexmask.long.tbyte 0x08 0.--18. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x0C "USB_HC11_DMAADDR,Host Channel 11 DMA Address Register"
|
|
tree.end
|
|
tree "USB Host Channel 12"
|
|
group.long (0x3C500+0x180)++0x13
|
|
line.long 0x00 "USB_HC12_CHAR,Host Channel 12 Characteristics Register"
|
|
bitfld.long 0x00 31. " CHENA ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CHDIS ,Channel Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ODDFRM ,Odd Frame" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device Address"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " MC ,Multi Count" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "CONTROL,ISO,BULK,INT"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LSPDDEV ,Low-Speed Device" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " EPDIR ,Endpoint Direction" "OUT,IN"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " EPNUM ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,?..."
|
|
hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum Packet Size"
|
|
group.long (0x3C508+0x180)++0xF
|
|
line.long 0x00 "USB_HC12_INT,Host Channel 12 Interrupt Register"
|
|
eventfld.long 0x00 10. " DATATGLERR ,Data Toggle Error" "No error,Error"
|
|
eventfld.long 0x00 9. " FRMOVRUN ,Frame Overrun" "No overrun,Overrun"
|
|
textline " "
|
|
eventfld.long 0x00 8. " BBLERR ,Babble Error" "No error,Error"
|
|
eventfld.long 0x00 7. " XACTERR ,Transaction Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 5. " ACK ,ACK Response Received/Transmitted Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " NAK ,NAK Response Received Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STALL ,STALL Response Received Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHHLTD ,Channel Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed" "Not completed,Completed"
|
|
line.long 0x04 "USB_HC12_INTMSK,Host Channel 12 Interrupt Mask Register"
|
|
bitfld.long 0x04 10. " DATATGLERRMSK ,Data Toggle Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 9. " FRMOVRUNMSK ,Frame Overrun Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 8. " BBLERRMSK ,Babble Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 7. " XACTERRMSK ,Transaction Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 5. " ACKMSK ,ACK Response Received/Transmitted Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 4. " NAKMSK ,NAK Response Received Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " STALLMSK ,STALL Response Received Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 2. " AHBERRMSK ,AHB Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CHHLTDMSK ,Channel Halted Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer Completed Mask" "Masked,Not masked"
|
|
line.long 0x08 "USB_HC12_TSIZ,Host Channel 12 Transfer Size Register"
|
|
bitfld.long 0x08 29.--30. " PID ,Packet ID" "DATA0,DATA2,DATA1,MDATA"
|
|
hexmask.long.word 0x08 19.--28. 1. " PKTCNT ,Packet Count"
|
|
textline " "
|
|
hexmask.long.tbyte 0x08 0.--18. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x0C "USB_HC12_DMAADDR,Host Channel 12 DMA Address Register"
|
|
tree.end
|
|
tree "USB Host Channel 13"
|
|
group.long (0x3C500+0x1A0)++0x13
|
|
line.long 0x00 "USB_HC13_CHAR,Host Channel 13 Characteristics Register"
|
|
bitfld.long 0x00 31. " CHENA ,Channel Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " CHDIS ,Channel Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ODDFRM ,Odd Frame" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device Address"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " MC ,Multi Count" "0,1,2,3"
|
|
bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "CONTROL,ISO,BULK,INT"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LSPDDEV ,Low-Speed Device" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " EPDIR ,Endpoint Direction" "OUT,IN"
|
|
textline " "
|
|
bitfld.long 0x00 11.--14. " EPNUM ,Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,?..."
|
|
hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum Packet Size"
|
|
group.long (0x3C508+0x1A0)++0xF
|
|
line.long 0x00 "USB_HC13_INT,Host Channel 13 Interrupt Register"
|
|
eventfld.long 0x00 10. " DATATGLERR ,Data Toggle Error" "No error,Error"
|
|
eventfld.long 0x00 9. " FRMOVRUN ,Frame Overrun" "No overrun,Overrun"
|
|
textline " "
|
|
eventfld.long 0x00 8. " BBLERR ,Babble Error" "No error,Error"
|
|
eventfld.long 0x00 7. " XACTERR ,Transaction Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 5. " ACK ,ACK Response Received/Transmitted Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " NAK ,NAK Response Received Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " STALL ,STALL Response Received Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHHLTD ,Channel Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed" "Not completed,Completed"
|
|
line.long 0x04 "USB_HC13_INTMSK,Host Channel 13 Interrupt Mask Register"
|
|
bitfld.long 0x04 10. " DATATGLERRMSK ,Data Toggle Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 9. " FRMOVRUNMSK ,Frame Overrun Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 8. " BBLERRMSK ,Babble Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 7. " XACTERRMSK ,Transaction Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 5. " ACKMSK ,ACK Response Received/Transmitted Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 4. " NAKMSK ,NAK Response Received Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " STALLMSK ,STALL Response Received Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 2. " AHBERRMSK ,AHB Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CHHLTDMSK ,Channel Halted Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer Completed Mask" "Masked,Not masked"
|
|
line.long 0x08 "USB_HC13_TSIZ,Host Channel 13 Transfer Size Register"
|
|
bitfld.long 0x08 29.--30. " PID ,Packet ID" "DATA0,DATA2,DATA1,MDATA"
|
|
hexmask.long.word 0x08 19.--28. 1. " PKTCNT ,Packet Count"
|
|
textline " "
|
|
hexmask.long.tbyte 0x08 0.--18. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x0C "USB_HC13_DMAADDR,Host Channel 13 DMA Address Register"
|
|
tree.end
|
|
textline " "
|
|
group.long 0x3C800++0x03
|
|
line.long 0x00 "USB_DCFG,Device Configuration Register"
|
|
bitfld.long 0x00 26.--31. " RESVALID ,Resume Validation Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 11.--12. " PERFRINT ,Periodic Frame Interval" "80PCNT,85PCNT,90PCNT,95PCNT"
|
|
textline " "
|
|
hexmask.long.byte 0x00 4.--10. 0x10 " DEVADDR ,Device Address"
|
|
bitfld.long 0x00 3. " ENA32KHZSUSP ,Enable 32 KHz Suspend mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " NZSTSOUTHSHK ,Non-Zero-Length Status OUT Handshake" "NAK and STALL,STALL"
|
|
bitfld.long 0x00 0.--1. " DEVSPD ,Device Speed" "Reserved,Reserved,LS,FS"
|
|
wgroup.long 0x3C804++0x03
|
|
line.long 0x00 "USB_DCTL,Device Control Register"
|
|
bitfld.long 0x00 16. " NAKONBBLE ,NAK on Babble Error" "No NAK,NAK"
|
|
bitfld.long 0x00 15. " IGNRFRMNUM ,Ignore Frame number For Isochronous End points" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PWRONPRGDONE ,Power-On Programming Done" "Not completed,Completed"
|
|
bitfld.long 0x00 10. " CGOUTNAK ,Clear Global OUT NAK" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SGOUTNAK ,Set Global OUT NAK" "No effect,Set"
|
|
bitfld.long 0x00 8. " CGNPINNAK ,Clear Global Non-periodic IN NAK" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SGNPINNAK ,Set Global Non-periodic IN NAK" "No effect,Set"
|
|
bitfld.long 0x00 4.--6. " TSTCTL ,Test Control" "DISABLE,J,K,SE0NAK,PACKET,FORCE,?..."
|
|
textline " "
|
|
rbitfld.long 0x00 3. " GOUTNAKSTS ,Global OUT NAK Status" "FIFO NAK and STALL,NAK"
|
|
rbitfld.long 0x00 2. " GNPINNAKSTS ,Global Non-periodic IN NAK Status" "FIFO,NAK"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SFTDISCON ,Soft Disconnect" "Connected,Disconnected"
|
|
bitfld.long 0x00 0. " RMTWKUPSIG ,Remote Wakeup Signaling" "Suspend,Wake up"
|
|
rgroup.long 0x3C808++0x3
|
|
line.long 0x00 "USB_DSTS,Device Status Register"
|
|
hexmask.long.word 0x00 8.--21. 1. " SOFFN ,Frame Number of the Received SOF"
|
|
bitfld.long 0x00 3. " ERRTICERR ,Erratic Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " ENUMSPD ,Enumerated Speed" "Reserved,Reserved,LS,FS"
|
|
bitfld.long 0x00 0. " SUSPSTS ,Suspend Status" "Not suspended,Suspended"
|
|
group.long 0x3C810++0x7
|
|
line.long 0x00 "USB_DIEPMSK,Device IN Endpoint Common Interrupt Mask Register"
|
|
bitfld.long 0x00 13. " NAKMSK ,NAK interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " TXFIFOUNDRNMSK ,Fifo Underrun Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INEPNAKEFFMSK ,IN Endpoint NAK Effective Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " INTKNTXFEMPMSK ,IN Token Received When TxFIFO Empty Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TIMEOUTMSK ,Timeout Condition Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " AHBERRMSK ,AHB Error Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EPDISBLDMSK ,Endpoint Disabled Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " XFERCOMPLMSK ,Transfer Completed Interrupt Mask" "Masked,Not masked"
|
|
line.long 0x04 "USB_DOEPMSK,Device OUT Endpoint Common Interrupt Mask Register"
|
|
bitfld.long 0x04 13. " NAKMSK ,NAK interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 12. " BBLEERRMSK ,Babble Error interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 8. " OUTPKTERRMSK ,OUT Packet Error Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 6. " BACK2BACKSETUP ,Back-to-Back SETUP Packets Received Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 4. " OUTTKNEPDISMSK ,OUT Token Received when Endpoint Disabled Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 3. " SETUPMSK ,SETUP Phase Done Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 2. " AHBERRMSK ,AHB Error" "Masked,Not masked"
|
|
bitfld.long 0x04 1. " EPDISBLDMSK ,Endpoint Disabled Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer Completed Interrupt Mask" "Masked,Not masked"
|
|
rgroup.long 0x3C818++0x3
|
|
line.long 0x00 "USB_DAINT,Device All Endpoints Interrupt Register"
|
|
bitfld.long 0x00 22. " OUTEPINT6 ,OUT Endpoint 6 Interrupt Bit" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 21. " OUTEPINT5 ,OUT Endpoint 5 Interrupt Bit" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 20. " OUTEPINT4 ,OUT Endpoint 4 Interrupt Bit" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 19. " OUTEPINT3 ,OUT Endpoint 3 Interrupt Bit" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 18. " OUTEPINT2 ,OUT Endpoint 2 Interrupt Bit" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " OUTEPINT1 ,OUT Endpoint 1 Interrupt Bit" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 16. " OUTEPINT0 ,OUT Endpoint 0 Interrupt Bit" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " INEPINT6 ,IN Endpoint 6 Interrupt Bit" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 5. " INEPINT5 ,IN Endpoint 5 Interrupt Bit" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " INEPINT4 ,IN Endpoint 4 Interrupt Bit" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INEPINT3 ,IN Endpoint 3 Interrupt Bit" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " INEPINT2 ,IN Endpoint 2 Interrupt Bit" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " INEPINT1 ,IN Endpoint 1 Interrupt Bit" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " INEPINT0 ,IN Endpoint 0 Interrupt Bit" "No interrupt,Interrupt"
|
|
group.long 0x3C81C++0x3
|
|
line.long 0x00 "USB_DAINTMSK,Device All Endpoints Interrupt Mask Register"
|
|
bitfld.long 0x00 22. " OUTEPMSK6 ,OUT Endpoint 6 Interrupt mask Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 21. " OUTEPMSK5 ,OUT Endpoint 5 Interrupt mask Bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " OUTEPMSK4 ,OUT Endpoint 4 Interrupt mask Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 19. " OUTEPMSK3 ,OUT Endpoint 3 Interrupt mask Bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " OUTEPMSK2 ,OUT Endpoint 2 Interrupt mask Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 17. " OUTEPMSK1 ,OUT Endpoint 1 Interrupt mask Bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " OUTEPMSK0 ,OUT Endpoint 0 Interrupt mask Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " INEPMSK6 ,IN Endpoint 6 Interrupt mask Bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " INEPMSK5 ,IN Endpoint 5 Interrupt mask Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " INEPMSK4 ,IN Endpoint 4 Interrupt mask Bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INEPMSK3 ,IN Endpoint 3 Interrupt mask Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " INEPMSK2 ,IN Endpoint 2 Interrupt mask Bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " INEPMSK1 ,IN Endpoint 1 Interrupt mask Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " INEPMSK0 ,IN Endpoint 0 Interrupt mask Bit" "Masked,Not masked"
|
|
group.long 0x3C828++0x7
|
|
line.long 0x00 "USB_DVBUSDIS,Device VBUS Discharge Time Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DVBUSDIS ,Device VBUS Discharge Time"
|
|
line.long 0x04 "USB_DVBUSPULSE,Device VBUS Pulsing Time Register"
|
|
hexmask.long.word 0x04 0.--11. 1. " DVBUSPULSE ,Device VBUS Pulsing Time"
|
|
sif (!cpuis("EFM32GG*")&&!cpuis("EFM32WG*"))
|
|
group.long 0x3C830++0x3
|
|
line.long 0x00 "USB_DTHRCTL,Device Threshold Control Register"
|
|
bitfld.long 0x00 27. " ARBPRKEN ,Arbiter Parking Enable" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 17.--25. 1. " RXTHRLEN ,Receive Threshold Length"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RXTHREN ,Receive Threshold Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11.--12. " AHBTHRRATIO ,AHB Threshold Ratio" "DIV1,DIV2,DIV4,DIV8"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--10. 1. " TXTHRLEN ,Transmit Threshold Length"
|
|
bitfld.long 0x00 1. " ISOTHREN ,ISO IN Endpoints Threshold Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " NONISOTHREN ,Non-ISO IN Endpoints Threshold Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x3C834++0x3
|
|
line.long 0x00 "USB_DIEPEMPMSK,Device IN Endpoint FIFO Empty Interrupt Mask Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DIEPEMPMSK ,IN EP Tx FIFO Empty Interrupt Mask Bits"
|
|
tree "Device IN Endpoint 0"
|
|
wgroup.long 0x3C900++0x3
|
|
line.long 0x00 "USB_DIEP0CTL,Device IN Endpoint 0 Control Register"
|
|
bitfld.long 0x00 31. " EPENA ,Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " EPDIS ,Endpoint Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 27. " SNAK ,Set NAK" "No effect,Set"
|
|
bitfld.long 0x00 26. " CNAK ,Clear NAK" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 22.--25. " TXFNUM ,TxFIFO Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 21. " STALL ,Handshake" "No handshake,Handshake"
|
|
textline " "
|
|
rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "Control,?..."
|
|
rbitfld.long 0x00 17. " NAKSTS ,NAK Status" "Non-NAK,NAK"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " USBACTEP ,USB Active Endpoint" "Reserved,Active"
|
|
bitfld.long 0x00 0.--1. " MPS ,Maximum Packet Size" "64B,32B,16B,8B"
|
|
group.long 0x3C908++0x3
|
|
line.long 0x00 "USB_DIEP0INT,Device IN Endpoint 0 Interrupt Register"
|
|
bitfld.long 0x00 13. " NAKINTRPT ,NAK Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " BBLEERR ,NAK Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PKTDRPSTS ,Packet Drop Status" "Not dropped,Dropped"
|
|
rbitfld.long 0x00 7. " TXFEMP ,Transmit FIFO Empty" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INEPNAKEFF ,IN Endpoint NAK Effective" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " INTKNTXFEMP ,IN Token Received When TxFIFO is Empty" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TIMEOUT ,Timeout Condition" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EPDISBLD ,Endpoint Disabled Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed Interrupt" "No interrupt,Interrupt"
|
|
group.long 0x3C910++0x7
|
|
line.long 0x00 "USB_DIEP0TSIZ,Device IN Endpoint 0 Transfer Size Register"
|
|
bitfld.long 0x00 19.--20. " PKTCNT ,Packet Count" "0,1,2,3"
|
|
hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x04 "USB_DIEP0DMAADDR,Device IN Endpoint 0 DMA Address Register"
|
|
rgroup.long 0x3C918++0x3
|
|
line.long 0x00 "USB_DIEP0TXFSTS,Device IN Endpoint 0 Transmit FIFO Status Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " SPCAVAIL ,TxFIFO Space Available"
|
|
tree.end
|
|
tree "Device IN Endpoint 1"
|
|
wgroup.long (0x3C920+0x0)++0x3
|
|
line.long 0x00 "USB_DIEP0_CTL,Device IN Endpoint 1 Control Register"
|
|
bitfld.long 0x00 31. " EPENA ,Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " EPDIS ,Endpoint Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 29. " SETD1PIDOF ,Set DATA1 PID / Odd Frame" "No effect,Set"
|
|
bitfld.long 0x00 28. " SETD0PIDEF ,Set DATA0 PID / Even Frame" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 27. " SNAK ,Set NAK" "No effect,Set"
|
|
bitfld.long 0x00 26. " CNAK ,Clear NAK" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 22.--25. " TXFNUM ,TxFIFO Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 21. " STALL ,Handshake" "No handshake,Handshake"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "CONTROL,ISO,BULK,INT"
|
|
rbitfld.long 0x00 17. " NAKSTS ,NAK Status" "Non-NAK,NAK"
|
|
textline " "
|
|
rbitfld.long 0x00 16. " DPIDEOF ,Endpoint Data PID / Even or Odd Frame" "DATA0EVEN,DATA1ODD"
|
|
bitfld.long 0x00 15. " USBACTEP ,USB Active Endpoint" "Not active,Active"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum Packet Size"
|
|
group.long (0x3C928+0x0)++0x3
|
|
line.long 0x00 "USB_DIEP0_INT,Device IN Endpoint 1 Interrupt Register"
|
|
bitfld.long 0x00 13. " NAKINTRPT ,NAK Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " BBLEERR ,NAK Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PKTDRPSTS ,Packet Drop Status" "Not dropped,Dropped"
|
|
rbitfld.long 0x00 7. " TXFEMP ,Transmit FIFO Empty" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INEPNAKEFF ,IN Endpoint NAK Effective" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " INTKNTXFEMP ,IN Token Received When TxFIFO is Empty" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TIMEOUT ,Timeout Condition" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EPDISBLD ,Endpoint Disabled Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed Interrupt" "No interrupt,Interrupt"
|
|
group.long (0x3C930+0x0)++0x7
|
|
line.long 0x00 "USB_DIEP0_TSIZ,Device IN Endpoint 1 Transfer Size Register"
|
|
bitfld.long 0x00 29.--30. " MC ,Multi Count" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet Count"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x04 "USB_DIEP0_DMAADDR,Device IN Endpoint 1 DMA Address Register"
|
|
rgroup.long (0x3C938+0x0)++0x3
|
|
line.long 0x00 "USB_DIEP0_TXFSTS,Device IN Endpoint 1 Transmit FIFO Status Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " SPCAVAIL ,TxFIFO Space Available"
|
|
tree.end
|
|
tree "Device IN Endpoint 2"
|
|
wgroup.long (0x3C920+0x20)++0x3
|
|
line.long 0x00 "USB_DIEP1_CTL,Device IN Endpoint 2 Control Register"
|
|
bitfld.long 0x00 31. " EPENA ,Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " EPDIS ,Endpoint Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 29. " SETD1PIDOF ,Set DATA1 PID / Odd Frame" "No effect,Set"
|
|
bitfld.long 0x00 28. " SETD0PIDEF ,Set DATA0 PID / Even Frame" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 27. " SNAK ,Set NAK" "No effect,Set"
|
|
bitfld.long 0x00 26. " CNAK ,Clear NAK" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 22.--25. " TXFNUM ,TxFIFO Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 21. " STALL ,Handshake" "No handshake,Handshake"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "CONTROL,ISO,BULK,INT"
|
|
rbitfld.long 0x00 17. " NAKSTS ,NAK Status" "Non-NAK,NAK"
|
|
textline " "
|
|
rbitfld.long 0x00 16. " DPIDEOF ,Endpoint Data PID / Even or Odd Frame" "DATA0EVEN,DATA1ODD"
|
|
bitfld.long 0x00 15. " USBACTEP ,USB Active Endpoint" "Not active,Active"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum Packet Size"
|
|
group.long (0x3C928+0x20)++0x3
|
|
line.long 0x00 "USB_DIEP1_INT,Device IN Endpoint 2 Interrupt Register"
|
|
bitfld.long 0x00 13. " NAKINTRPT ,NAK Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " BBLEERR ,NAK Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PKTDRPSTS ,Packet Drop Status" "Not dropped,Dropped"
|
|
rbitfld.long 0x00 7. " TXFEMP ,Transmit FIFO Empty" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INEPNAKEFF ,IN Endpoint NAK Effective" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " INTKNTXFEMP ,IN Token Received When TxFIFO is Empty" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TIMEOUT ,Timeout Condition" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EPDISBLD ,Endpoint Disabled Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed Interrupt" "No interrupt,Interrupt"
|
|
group.long (0x3C930+0x20)++0x7
|
|
line.long 0x00 "USB_DIEP1_TSIZ,Device IN Endpoint 2 Transfer Size Register"
|
|
bitfld.long 0x00 29.--30. " MC ,Multi Count" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet Count"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x04 "USB_DIEP1_DMAADDR,Device IN Endpoint 2 DMA Address Register"
|
|
rgroup.long (0x3C938+0x20)++0x3
|
|
line.long 0x00 "USB_DIEP1_TXFSTS,Device IN Endpoint 2 Transmit FIFO Status Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " SPCAVAIL ,TxFIFO Space Available"
|
|
tree.end
|
|
tree "Device IN Endpoint 3"
|
|
wgroup.long (0x3C920+0x40)++0x3
|
|
line.long 0x00 "USB_DIEP2_CTL,Device IN Endpoint 3 Control Register"
|
|
bitfld.long 0x00 31. " EPENA ,Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " EPDIS ,Endpoint Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 29. " SETD1PIDOF ,Set DATA1 PID / Odd Frame" "No effect,Set"
|
|
bitfld.long 0x00 28. " SETD0PIDEF ,Set DATA0 PID / Even Frame" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 27. " SNAK ,Set NAK" "No effect,Set"
|
|
bitfld.long 0x00 26. " CNAK ,Clear NAK" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 22.--25. " TXFNUM ,TxFIFO Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 21. " STALL ,Handshake" "No handshake,Handshake"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "CONTROL,ISO,BULK,INT"
|
|
rbitfld.long 0x00 17. " NAKSTS ,NAK Status" "Non-NAK,NAK"
|
|
textline " "
|
|
rbitfld.long 0x00 16. " DPIDEOF ,Endpoint Data PID / Even or Odd Frame" "DATA0EVEN,DATA1ODD"
|
|
bitfld.long 0x00 15. " USBACTEP ,USB Active Endpoint" "Not active,Active"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum Packet Size"
|
|
group.long (0x3C928+0x40)++0x3
|
|
line.long 0x00 "USB_DIEP2_INT,Device IN Endpoint 3 Interrupt Register"
|
|
bitfld.long 0x00 13. " NAKINTRPT ,NAK Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " BBLEERR ,NAK Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PKTDRPSTS ,Packet Drop Status" "Not dropped,Dropped"
|
|
rbitfld.long 0x00 7. " TXFEMP ,Transmit FIFO Empty" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INEPNAKEFF ,IN Endpoint NAK Effective" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " INTKNTXFEMP ,IN Token Received When TxFIFO is Empty" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TIMEOUT ,Timeout Condition" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EPDISBLD ,Endpoint Disabled Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed Interrupt" "No interrupt,Interrupt"
|
|
group.long (0x3C930+0x40)++0x7
|
|
line.long 0x00 "USB_DIEP2_TSIZ,Device IN Endpoint 3 Transfer Size Register"
|
|
bitfld.long 0x00 29.--30. " MC ,Multi Count" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet Count"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x04 "USB_DIEP2_DMAADDR,Device IN Endpoint 3 DMA Address Register"
|
|
rgroup.long (0x3C938+0x40)++0x3
|
|
line.long 0x00 "USB_DIEP2_TXFSTS,Device IN Endpoint 3 Transmit FIFO Status Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " SPCAVAIL ,TxFIFO Space Available"
|
|
tree.end
|
|
tree "Device IN Endpoint 4"
|
|
wgroup.long (0x3C920+0x60)++0x3
|
|
line.long 0x00 "USB_DIEP3_CTL,Device IN Endpoint 4 Control Register"
|
|
bitfld.long 0x00 31. " EPENA ,Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " EPDIS ,Endpoint Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 29. " SETD1PIDOF ,Set DATA1 PID / Odd Frame" "No effect,Set"
|
|
bitfld.long 0x00 28. " SETD0PIDEF ,Set DATA0 PID / Even Frame" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 27. " SNAK ,Set NAK" "No effect,Set"
|
|
bitfld.long 0x00 26. " CNAK ,Clear NAK" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 22.--25. " TXFNUM ,TxFIFO Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 21. " STALL ,Handshake" "No handshake,Handshake"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "CONTROL,ISO,BULK,INT"
|
|
rbitfld.long 0x00 17. " NAKSTS ,NAK Status" "Non-NAK,NAK"
|
|
textline " "
|
|
rbitfld.long 0x00 16. " DPIDEOF ,Endpoint Data PID / Even or Odd Frame" "DATA0EVEN,DATA1ODD"
|
|
bitfld.long 0x00 15. " USBACTEP ,USB Active Endpoint" "Not active,Active"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum Packet Size"
|
|
group.long (0x3C928+0x60)++0x3
|
|
line.long 0x00 "USB_DIEP3_INT,Device IN Endpoint 4 Interrupt Register"
|
|
bitfld.long 0x00 13. " NAKINTRPT ,NAK Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " BBLEERR ,NAK Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PKTDRPSTS ,Packet Drop Status" "Not dropped,Dropped"
|
|
rbitfld.long 0x00 7. " TXFEMP ,Transmit FIFO Empty" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INEPNAKEFF ,IN Endpoint NAK Effective" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " INTKNTXFEMP ,IN Token Received When TxFIFO is Empty" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TIMEOUT ,Timeout Condition" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EPDISBLD ,Endpoint Disabled Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed Interrupt" "No interrupt,Interrupt"
|
|
group.long (0x3C930+0x60)++0x7
|
|
line.long 0x00 "USB_DIEP3_TSIZ,Device IN Endpoint 4 Transfer Size Register"
|
|
bitfld.long 0x00 29.--30. " MC ,Multi Count" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet Count"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x04 "USB_DIEP3_DMAADDR,Device IN Endpoint 4 DMA Address Register"
|
|
rgroup.long (0x3C938+0x60)++0x3
|
|
line.long 0x00 "USB_DIEP3_TXFSTS,Device IN Endpoint 4 Transmit FIFO Status Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " SPCAVAIL ,TxFIFO Space Available"
|
|
tree.end
|
|
tree "Device IN Endpoint 5"
|
|
wgroup.long (0x3C920+0x80)++0x3
|
|
line.long 0x00 "USB_DIEP4_CTL,Device IN Endpoint 5 Control Register"
|
|
bitfld.long 0x00 31. " EPENA ,Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " EPDIS ,Endpoint Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 29. " SETD1PIDOF ,Set DATA1 PID / Odd Frame" "No effect,Set"
|
|
bitfld.long 0x00 28. " SETD0PIDEF ,Set DATA0 PID / Even Frame" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 27. " SNAK ,Set NAK" "No effect,Set"
|
|
bitfld.long 0x00 26. " CNAK ,Clear NAK" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 22.--25. " TXFNUM ,TxFIFO Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 21. " STALL ,Handshake" "No handshake,Handshake"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "CONTROL,ISO,BULK,INT"
|
|
rbitfld.long 0x00 17. " NAKSTS ,NAK Status" "Non-NAK,NAK"
|
|
textline " "
|
|
rbitfld.long 0x00 16. " DPIDEOF ,Endpoint Data PID / Even or Odd Frame" "DATA0EVEN,DATA1ODD"
|
|
bitfld.long 0x00 15. " USBACTEP ,USB Active Endpoint" "Not active,Active"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum Packet Size"
|
|
group.long (0x3C928+0x80)++0x3
|
|
line.long 0x00 "USB_DIEP4_INT,Device IN Endpoint 5 Interrupt Register"
|
|
bitfld.long 0x00 13. " NAKINTRPT ,NAK Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " BBLEERR ,NAK Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PKTDRPSTS ,Packet Drop Status" "Not dropped,Dropped"
|
|
rbitfld.long 0x00 7. " TXFEMP ,Transmit FIFO Empty" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INEPNAKEFF ,IN Endpoint NAK Effective" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " INTKNTXFEMP ,IN Token Received When TxFIFO is Empty" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TIMEOUT ,Timeout Condition" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EPDISBLD ,Endpoint Disabled Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed Interrupt" "No interrupt,Interrupt"
|
|
group.long (0x3C930+0x80)++0x7
|
|
line.long 0x00 "USB_DIEP4_TSIZ,Device IN Endpoint 5 Transfer Size Register"
|
|
bitfld.long 0x00 29.--30. " MC ,Multi Count" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet Count"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x04 "USB_DIEP4_DMAADDR,Device IN Endpoint 5 DMA Address Register"
|
|
rgroup.long (0x3C938+0x80)++0x3
|
|
line.long 0x00 "USB_DIEP4_TXFSTS,Device IN Endpoint 5 Transmit FIFO Status Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " SPCAVAIL ,TxFIFO Space Available"
|
|
tree.end
|
|
tree "Device IN Endpoint 6"
|
|
wgroup.long (0x3C920+0xA0)++0x3
|
|
line.long 0x00 "USB_DIEP5_CTL,Device IN Endpoint 6 Control Register"
|
|
bitfld.long 0x00 31. " EPENA ,Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " EPDIS ,Endpoint Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 29. " SETD1PIDOF ,Set DATA1 PID / Odd Frame" "No effect,Set"
|
|
bitfld.long 0x00 28. " SETD0PIDEF ,Set DATA0 PID / Even Frame" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 27. " SNAK ,Set NAK" "No effect,Set"
|
|
bitfld.long 0x00 26. " CNAK ,Clear NAK" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 22.--25. " TXFNUM ,TxFIFO Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 21. " STALL ,Handshake" "No handshake,Handshake"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "CONTROL,ISO,BULK,INT"
|
|
rbitfld.long 0x00 17. " NAKSTS ,NAK Status" "Non-NAK,NAK"
|
|
textline " "
|
|
rbitfld.long 0x00 16. " DPIDEOF ,Endpoint Data PID / Even or Odd Frame" "DATA0EVEN,DATA1ODD"
|
|
bitfld.long 0x00 15. " USBACTEP ,USB Active Endpoint" "Not active,Active"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum Packet Size"
|
|
group.long (0x3C928+0xA0)++0x3
|
|
line.long 0x00 "USB_DIEP5_INT,Device IN Endpoint 6 Interrupt Register"
|
|
bitfld.long 0x00 13. " NAKINTRPT ,NAK Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " BBLEERR ,NAK Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PKTDRPSTS ,Packet Drop Status" "Not dropped,Dropped"
|
|
rbitfld.long 0x00 7. " TXFEMP ,Transmit FIFO Empty" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INEPNAKEFF ,IN Endpoint NAK Effective" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " INTKNTXFEMP ,IN Token Received When TxFIFO is Empty" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TIMEOUT ,Timeout Condition" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EPDISBLD ,Endpoint Disabled Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed Interrupt" "No interrupt,Interrupt"
|
|
group.long (0x3C930+0xA0)++0x7
|
|
line.long 0x00 "USB_DIEP5_TSIZ,Device IN Endpoint 6 Transfer Size Register"
|
|
bitfld.long 0x00 29.--30. " MC ,Multi Count" "0,1,2,3"
|
|
hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet Count"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x04 "USB_DIEP5_DMAADDR,Device IN Endpoint 6 DMA Address Register"
|
|
rgroup.long (0x3C938+0xA0)++0x3
|
|
line.long 0x00 "USB_DIEP5_TXFSTS,Device IN Endpoint 6 Transmit FIFO Status Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " SPCAVAIL ,TxFIFO Space Available"
|
|
tree.end
|
|
tree "Device OUT Endpoint 0"
|
|
wgroup.long 0x3CB00++0x3
|
|
line.long 0x00 "USB_DOEP0CTL,Device OUT Endpoint 0 Control Register"
|
|
bitfld.long 0x00 31. " EPENA ,Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " EPDIS ,Endpoint Disable" "No,?..."
|
|
textline " "
|
|
bitfld.long 0x00 27. " SNAK ,Set NAK" "No effect,Set"
|
|
bitfld.long 0x00 26. " CNAK ,Clear NAK" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 21. " STALL ,Handshake" "No handshake,Handshake"
|
|
bitfld.long 0x00 20. " SNP ,Snoop Mode" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "Control,?..."
|
|
rbitfld.long 0x00 17. " NAKSTS ,NAK Status" "Non-NAK,NAK"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " USBACTEP ,USB Active Endpoint" "Reserved,Active"
|
|
rbitfld.long 0x00 0.--1. " MPS ,Maximum Packet Size" "64B,32B,16B,8B"
|
|
group.long 0x3CB08++0x3
|
|
line.long 0x00 "USB_DOEP0INT,Device OUT Endpoint 0 Interrupt Register"
|
|
bitfld.long 0x00 13. " NAKINTRPT ,NAK Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " BBLEERR ,NAK Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PKTDRPSTS ,Packet Drop Status" "Not dropped,Dropped"
|
|
bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-Back SETUP Packets Received" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT Token Received When Endpoint Disabled" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " SETUP ,Setup Phase Done" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
bitfld.long 0x00 1. " EPDISBLD ,Endpoint Disabled Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed Interrupt" "No interrupt,Interrupt"
|
|
group.long 0x3CB10++0x7
|
|
line.long 0x00 "USB_DOEP0TSIZ,Device OUT Endpoint 0 Transfer Size Register"
|
|
bitfld.long 0x00 29.--30. " SUPCNT ,SETUP Packet Count" "0,1,2,3"
|
|
bitfld.long 0x00 19. " PKTCNT ,Packet Count" "0,1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x04 "USB_DOEP0DMAADDR,Device OUT Endpoint 0 DMA Address Register"
|
|
tree.end
|
|
tree "Device OUT Endpoint 1"
|
|
wgroup.long (0x3CB20+0x0)++0x3
|
|
line.long 0x00 "USB_DOEP0_CTL,Device OUT Endpoint 1 Control Register"
|
|
bitfld.long 0x00 31. " EPENA ,Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " EPDIS ,Endpoint Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 29. " SETD1PIDOF ,Set DATA1 PID / Odd Frame" "No effect,Set"
|
|
bitfld.long 0x00 28. " SETD0PIDEF ,Set DATA0 PID / Even Frame" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 27. " SNAK ,Set NAK" "No effect,Set"
|
|
bitfld.long 0x00 26. " CNAK ,Clear NAK" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 21. " STALL ,STALL Handshake" "No handshake,Handshake"
|
|
bitfld.long 0x00 20. " SNP ,Snoop Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "CONTROL,ISO,BULK,INT"
|
|
rbitfld.long 0x00 17. " NAKSTS ,NAK Status" "Non-NAK,NAK"
|
|
textline " "
|
|
rbitfld.long 0x00 16. " DPIDEOF ,Endpoint Data PID / Even-odd Frame" "DATA0EVEN,DATA1ODD"
|
|
bitfld.long 0x00 15. " USBACTEP ,USB Active Endpoint" "Not active,Active"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum Packet Size"
|
|
group.long (0x3CB28+0x0)++0x3
|
|
line.long 0x00 "USB_DOEP0_INT,Device OUT Endpoint 1 Interrupt Register"
|
|
bitfld.long 0x00 13. " NAKINTRPT ,NAK Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " BBLEERR ,Babble Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PKTDRPSTS ,Packet Drop Status" "Not dropped,Dropped"
|
|
bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-Back SETUP Packets Received" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT Token Received When Endpoint Disabled" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " SETUP ,Setup Phase Done" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
bitfld.long 0x00 1. " EPDISBLD ,Endpoint Disabled Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed Interrupt" "No interrupt,Interrupt"
|
|
group.long (0x3CB30+0x0)++0x7
|
|
line.long 0x00 "USB_DOEP0_TSIZ,Device OUT Endpoint 1 Transfer Size Register"
|
|
rbitfld.long 0x00 29.--30. " RXDPIDSUPCNT ,Receive Data PID / SETUP Packet Count" "DATA0,DATA2,DATA1,MDATA"
|
|
hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet Count"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x04 "USB_DOEP0_DMAADDR,Device OUT Endpoint 1 DMA Address Register"
|
|
tree.end
|
|
tree "Device OUT Endpoint 2"
|
|
wgroup.long (0x3CB20+0x20)++0x3
|
|
line.long 0x00 "USB_DOEP1_CTL,Device OUT Endpoint 2 Control Register"
|
|
bitfld.long 0x00 31. " EPENA ,Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " EPDIS ,Endpoint Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 29. " SETD1PIDOF ,Set DATA1 PID / Odd Frame" "No effect,Set"
|
|
bitfld.long 0x00 28. " SETD0PIDEF ,Set DATA0 PID / Even Frame" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 27. " SNAK ,Set NAK" "No effect,Set"
|
|
bitfld.long 0x00 26. " CNAK ,Clear NAK" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 21. " STALL ,STALL Handshake" "No handshake,Handshake"
|
|
bitfld.long 0x00 20. " SNP ,Snoop Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "CONTROL,ISO,BULK,INT"
|
|
rbitfld.long 0x00 17. " NAKSTS ,NAK Status" "Non-NAK,NAK"
|
|
textline " "
|
|
rbitfld.long 0x00 16. " DPIDEOF ,Endpoint Data PID / Even-odd Frame" "DATA0EVEN,DATA1ODD"
|
|
bitfld.long 0x00 15. " USBACTEP ,USB Active Endpoint" "Not active,Active"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum Packet Size"
|
|
group.long (0x3CB28+0x20)++0x3
|
|
line.long 0x00 "USB_DOEP1_INT,Device OUT Endpoint 2 Interrupt Register"
|
|
bitfld.long 0x00 13. " NAKINTRPT ,NAK Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " BBLEERR ,Babble Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PKTDRPSTS ,Packet Drop Status" "Not dropped,Dropped"
|
|
bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-Back SETUP Packets Received" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT Token Received When Endpoint Disabled" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " SETUP ,Setup Phase Done" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
bitfld.long 0x00 1. " EPDISBLD ,Endpoint Disabled Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed Interrupt" "No interrupt,Interrupt"
|
|
group.long (0x3CB30+0x20)++0x7
|
|
line.long 0x00 "USB_DOEP1_TSIZ,Device OUT Endpoint 2 Transfer Size Register"
|
|
rbitfld.long 0x00 29.--30. " RXDPIDSUPCNT ,Receive Data PID / SETUP Packet Count" "DATA0,DATA2,DATA1,MDATA"
|
|
hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet Count"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x04 "USB_DOEP1_DMAADDR,Device OUT Endpoint 2 DMA Address Register"
|
|
tree.end
|
|
tree "Device OUT Endpoint 3"
|
|
wgroup.long (0x3CB20+0x40)++0x3
|
|
line.long 0x00 "USB_DOEP2_CTL,Device OUT Endpoint 3 Control Register"
|
|
bitfld.long 0x00 31. " EPENA ,Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " EPDIS ,Endpoint Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 29. " SETD1PIDOF ,Set DATA1 PID / Odd Frame" "No effect,Set"
|
|
bitfld.long 0x00 28. " SETD0PIDEF ,Set DATA0 PID / Even Frame" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 27. " SNAK ,Set NAK" "No effect,Set"
|
|
bitfld.long 0x00 26. " CNAK ,Clear NAK" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 21. " STALL ,STALL Handshake" "No handshake,Handshake"
|
|
bitfld.long 0x00 20. " SNP ,Snoop Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "CONTROL,ISO,BULK,INT"
|
|
rbitfld.long 0x00 17. " NAKSTS ,NAK Status" "Non-NAK,NAK"
|
|
textline " "
|
|
rbitfld.long 0x00 16. " DPIDEOF ,Endpoint Data PID / Even-odd Frame" "DATA0EVEN,DATA1ODD"
|
|
bitfld.long 0x00 15. " USBACTEP ,USB Active Endpoint" "Not active,Active"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum Packet Size"
|
|
group.long (0x3CB28+0x40)++0x3
|
|
line.long 0x00 "USB_DOEP2_INT,Device OUT Endpoint 3 Interrupt Register"
|
|
bitfld.long 0x00 13. " NAKINTRPT ,NAK Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " BBLEERR ,Babble Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PKTDRPSTS ,Packet Drop Status" "Not dropped,Dropped"
|
|
bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-Back SETUP Packets Received" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT Token Received When Endpoint Disabled" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " SETUP ,Setup Phase Done" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
bitfld.long 0x00 1. " EPDISBLD ,Endpoint Disabled Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed Interrupt" "No interrupt,Interrupt"
|
|
group.long (0x3CB30+0x40)++0x7
|
|
line.long 0x00 "USB_DOEP2_TSIZ,Device OUT Endpoint 3 Transfer Size Register"
|
|
rbitfld.long 0x00 29.--30. " RXDPIDSUPCNT ,Receive Data PID / SETUP Packet Count" "DATA0,DATA2,DATA1,MDATA"
|
|
hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet Count"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x04 "USB_DOEP2_DMAADDR,Device OUT Endpoint 3 DMA Address Register"
|
|
tree.end
|
|
tree "Device OUT Endpoint 4"
|
|
wgroup.long (0x3CB20+0x60)++0x3
|
|
line.long 0x00 "USB_DOEP3_CTL,Device OUT Endpoint 4 Control Register"
|
|
bitfld.long 0x00 31. " EPENA ,Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " EPDIS ,Endpoint Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 29. " SETD1PIDOF ,Set DATA1 PID / Odd Frame" "No effect,Set"
|
|
bitfld.long 0x00 28. " SETD0PIDEF ,Set DATA0 PID / Even Frame" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 27. " SNAK ,Set NAK" "No effect,Set"
|
|
bitfld.long 0x00 26. " CNAK ,Clear NAK" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 21. " STALL ,STALL Handshake" "No handshake,Handshake"
|
|
bitfld.long 0x00 20. " SNP ,Snoop Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "CONTROL,ISO,BULK,INT"
|
|
rbitfld.long 0x00 17. " NAKSTS ,NAK Status" "Non-NAK,NAK"
|
|
textline " "
|
|
rbitfld.long 0x00 16. " DPIDEOF ,Endpoint Data PID / Even-odd Frame" "DATA0EVEN,DATA1ODD"
|
|
bitfld.long 0x00 15. " USBACTEP ,USB Active Endpoint" "Not active,Active"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum Packet Size"
|
|
group.long (0x3CB28+0x60)++0x3
|
|
line.long 0x00 "USB_DOEP3_INT,Device OUT Endpoint 4 Interrupt Register"
|
|
bitfld.long 0x00 13. " NAKINTRPT ,NAK Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " BBLEERR ,Babble Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PKTDRPSTS ,Packet Drop Status" "Not dropped,Dropped"
|
|
bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-Back SETUP Packets Received" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT Token Received When Endpoint Disabled" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " SETUP ,Setup Phase Done" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
bitfld.long 0x00 1. " EPDISBLD ,Endpoint Disabled Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed Interrupt" "No interrupt,Interrupt"
|
|
group.long (0x3CB30+0x60)++0x7
|
|
line.long 0x00 "USB_DOEP3_TSIZ,Device OUT Endpoint 4 Transfer Size Register"
|
|
rbitfld.long 0x00 29.--30. " RXDPIDSUPCNT ,Receive Data PID / SETUP Packet Count" "DATA0,DATA2,DATA1,MDATA"
|
|
hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet Count"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x04 "USB_DOEP3_DMAADDR,Device OUT Endpoint 4 DMA Address Register"
|
|
tree.end
|
|
tree "Device OUT Endpoint 5"
|
|
wgroup.long (0x3CB20+0x80)++0x3
|
|
line.long 0x00 "USB_DOEP4_CTL,Device OUT Endpoint 5 Control Register"
|
|
bitfld.long 0x00 31. " EPENA ,Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " EPDIS ,Endpoint Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 29. " SETD1PIDOF ,Set DATA1 PID / Odd Frame" "No effect,Set"
|
|
bitfld.long 0x00 28. " SETD0PIDEF ,Set DATA0 PID / Even Frame" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 27. " SNAK ,Set NAK" "No effect,Set"
|
|
bitfld.long 0x00 26. " CNAK ,Clear NAK" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 21. " STALL ,STALL Handshake" "No handshake,Handshake"
|
|
bitfld.long 0x00 20. " SNP ,Snoop Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "CONTROL,ISO,BULK,INT"
|
|
rbitfld.long 0x00 17. " NAKSTS ,NAK Status" "Non-NAK,NAK"
|
|
textline " "
|
|
rbitfld.long 0x00 16. " DPIDEOF ,Endpoint Data PID / Even-odd Frame" "DATA0EVEN,DATA1ODD"
|
|
bitfld.long 0x00 15. " USBACTEP ,USB Active Endpoint" "Not active,Active"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum Packet Size"
|
|
group.long (0x3CB28+0x80)++0x3
|
|
line.long 0x00 "USB_DOEP4_INT,Device OUT Endpoint 5 Interrupt Register"
|
|
bitfld.long 0x00 13. " NAKINTRPT ,NAK Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " BBLEERR ,Babble Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PKTDRPSTS ,Packet Drop Status" "Not dropped,Dropped"
|
|
bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-Back SETUP Packets Received" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT Token Received When Endpoint Disabled" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " SETUP ,Setup Phase Done" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
bitfld.long 0x00 1. " EPDISBLD ,Endpoint Disabled Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed Interrupt" "No interrupt,Interrupt"
|
|
group.long (0x3CB30+0x80)++0x7
|
|
line.long 0x00 "USB_DOEP4_TSIZ,Device OUT Endpoint 5 Transfer Size Register"
|
|
rbitfld.long 0x00 29.--30. " RXDPIDSUPCNT ,Receive Data PID / SETUP Packet Count" "DATA0,DATA2,DATA1,MDATA"
|
|
hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet Count"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x04 "USB_DOEP4_DMAADDR,Device OUT Endpoint 5 DMA Address Register"
|
|
tree.end
|
|
tree "Device OUT Endpoint 6"
|
|
wgroup.long (0x3CB20+0xA0)++0x3
|
|
line.long 0x00 "USB_DOEP5_CTL,Device OUT Endpoint 6 Control Register"
|
|
bitfld.long 0x00 31. " EPENA ,Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " EPDIS ,Endpoint Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 29. " SETD1PIDOF ,Set DATA1 PID / Odd Frame" "No effect,Set"
|
|
bitfld.long 0x00 28. " SETD0PIDEF ,Set DATA0 PID / Even Frame" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 27. " SNAK ,Set NAK" "No effect,Set"
|
|
bitfld.long 0x00 26. " CNAK ,Clear NAK" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 21. " STALL ,STALL Handshake" "No handshake,Handshake"
|
|
bitfld.long 0x00 20. " SNP ,Snoop Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint Type" "CONTROL,ISO,BULK,INT"
|
|
rbitfld.long 0x00 17. " NAKSTS ,NAK Status" "Non-NAK,NAK"
|
|
textline " "
|
|
rbitfld.long 0x00 16. " DPIDEOF ,Endpoint Data PID / Even-odd Frame" "DATA0EVEN,DATA1ODD"
|
|
bitfld.long 0x00 15. " USBACTEP ,USB Active Endpoint" "Not active,Active"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum Packet Size"
|
|
group.long (0x3CB28+0xA0)++0x3
|
|
line.long 0x00 "USB_DOEP5_INT,Device OUT Endpoint 6 Interrupt Register"
|
|
bitfld.long 0x00 13. " NAKINTRPT ,NAK Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " BBLEERR ,Babble Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PKTDRPSTS ,Packet Drop Status" "Not dropped,Dropped"
|
|
bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-Back SETUP Packets Received" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT Token Received When Endpoint Disabled" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " SETUP ,Setup Phase Done" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AHBERR ,AHB Error" "No error,Error"
|
|
bitfld.long 0x00 1. " EPDISBLD ,Endpoint Disabled Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XFERCOMPL ,Transfer Completed Interrupt" "No interrupt,Interrupt"
|
|
group.long (0x3CB30+0xA0)++0x7
|
|
line.long 0x00 "USB_DOEP5_TSIZ,Device OUT Endpoint 6 Transfer Size Register"
|
|
rbitfld.long 0x00 29.--30. " RXDPIDSUPCNT ,Receive Data PID / SETUP Packet Count" "DATA0,DATA2,DATA1,MDATA"
|
|
hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet Count"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer Size"
|
|
line.long 0x04 "USB_DOEP5_DMAADDR,Device OUT Endpoint 6 DMA Address Register"
|
|
tree.end
|
|
textline " "
|
|
group.long 0x3CE00++0x3
|
|
line.long 0x00 "USB_PCGCCTL,Power and Clock Gating Control Register"
|
|
rbitfld.long 0x00 8. " RESETAFTERSUSP ,Reset after suspend" "No reset,Reset"
|
|
rbitfld.long 0x00 6. " PHYSLEEP ,PHY In Sleep" "No sleep,Sleep"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RSTPDWNMODULE ,Reset Power-Down Modules" "No reset,Reset"
|
|
bitfld.long 0x00 2. " PWRCLMP ,Power Clamp" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GATEHCLK ,Gate HCLK" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " STOPPCLK ,Stop PHY clock" "Started,Stopped"
|
|
tree "Memory"
|
|
width 14.
|
|
base ad:0x40100000
|
|
sif (cpuis("EFM32WG*"))
|
|
group.long 0x1000++0x3
|
|
line.long 0x00 "USB_FIFO0,Device EP 0/Host Channel 0 FIFO"
|
|
button "USB_FIFO0" "d ad:(0x40100000+0x1000)--ad:(0x40100000+0x17FF) /long"
|
|
else
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "USB_FIFO0,Device EP 0/Host Channel 0 FIFO"
|
|
button "USB_FIFO0" "d ad:(0x40100000+0x1000)--ad:(0x40100000+0x17FF) /long"
|
|
endif
|
|
group.long 0x2000++0x3
|
|
line.long 0x00 "USB_FIFO1,Device EP 1/Host Channel 1 FIFO"
|
|
button "USB_FIFO1" "d ad:(0x40100000+0x2000)--ad:(0x40100000+0x27FF) /long"
|
|
group.long 0x3000++0x3
|
|
line.long 0x00 "USB_FIFO2,Device EP 2/Host Channel 2 FIFO"
|
|
button "USB_FIFO2" "d ad:(0x40100000+0x3000)--ad:(0x40100000+0x37FF) /long"
|
|
group.long 0x4000++0x3
|
|
line.long 0x00 "USB_FIFO3,Device EP 3/Host Channel 3 FIFO"
|
|
button "USB_FIFO3" "d ad:(0x40100000+0x4000)--ad:(0x40100000+0x47FF) /long"
|
|
group.long 0x5000++0x3
|
|
line.long 0x00 "USB_FIFO4,Device EP 4/Host Channel 4 FIFO"
|
|
button "USB_FIFO4" "d ad:(0x40100000+0x5000)--ad:(0x40100000+0x57FF) /long"
|
|
group.long 0x6000++0x3
|
|
line.long 0x00 "USB_FIFO5,Device EP 5/Host Channel 5 FIFO"
|
|
button "USB_FIFO5" "d ad:(0x40100000+0x6000)--ad:(0x40100000+0x67FF) /long"
|
|
group.long 0x7000++0x3
|
|
line.long 0x00 "USB_FIFO6,Device EP 6/Host Channel 6 FIFO"
|
|
button "USB_FIFO6" "d ad:(0x40100000+0x7000)--ad:(0x40100000+0x77FF) /long"
|
|
group.long 0x8000++0x3
|
|
line.long 0x00 "USB_FIFO7,Host Channel 7 FIFO"
|
|
button "USB_FIFO7" "d ad:(0x40100000+0x8000)--ad:(0x40100000+0x87FF) /long"
|
|
group.long 0x9000++0x3
|
|
line.long 0x00 "USB_FIFO8,Host Channel 8 FIFO"
|
|
button "USB_FIFO8" "d ad:(0x40100000+0x9000)--ad:(0x40100000+0x97FF) /long"
|
|
group.long 0xA000++0x3
|
|
line.long 0x00 "USB_FIFO9,Host Channel 9 FIFO"
|
|
button "USB_FIFO9" "d ad:(0x40100000+0xA000)--ad:(0x40100000+0xA7FF) /long"
|
|
group.long 0xB000++0x3
|
|
line.long 0x00 "USB_FIFO10,Host Channel 10 FIFO"
|
|
button "USB_FIFO10" "d ad:(0x40100000+0xB000)--ad:(0x40100000+0xB7FF) /long"
|
|
group.long 0xC000++0x3
|
|
line.long 0x00 "USB_FIFO11,Host Channel 11 FIFO"
|
|
button "USB_FIFO11" "d ad:(0x40100000+0xC000)--ad:(0x40100000+0xC7FF) /long"
|
|
group.long 0xD000++0x3
|
|
line.long 0x00 "USB_FIFO12,Host Channel 12 FIFO"
|
|
button "USB_FIFO12" "d ad:(0x40100000+0xD000)--ad:(0x40100000+0xD7FF) /long"
|
|
group.long 0xE000++0x3
|
|
line.long 0x00 "USB_FIFO13,Host Channel 13 FIFO"
|
|
button "USB_FIFO13" "d ad:(0x40100000+0xE000)--ad:(0x40100000+0xE7FF) /long"
|
|
group.long 0x120000++0x3
|
|
line.long 0x00 "USB_FIFORAM0,Direct Access to Data FIFO RAM for Debugging (2 KB)"
|
|
button "USB_FIFORAM0" "d ad:(0x40100000+0x20000)--ad:(0x40100000+0x207Ff) /long"
|
|
tree.end
|
|
width 0xB
|
|
tree.end
|
|
endif
|
|
tree "I2C (Inter-Integrated Circuit Interface)"
|
|
base ad:0x4000A000
|
|
width 16.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "I2C0_CTRL,Control Register"
|
|
bitfld.long 0x00 16.--18. " CLTO ,Clock Low Timeout" "OFF,40PCC,80PCC,160PCC,320PPC,1024PPC,?..."
|
|
bitfld.long 0x00 15. " GIBITO ,Go Idle on Bus Idle Timeout" "No effect,Idle"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " BITO ,Bus Idle Timeout" "OFF,40PCC,80PCC,160PCC"
|
|
bitfld.long 0x00 8.--9. " CLHR ,Clock Low High Ratio" "STANDARD,ASYMMETRIC,FAST,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6. " GCAMEN ,General Call Address Match Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ARBDIS ,Arbitration Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 4. " AUTOSN ,Automatic STOP on NACK" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " AUTOSE ,Automatic STOP when Empty" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AUTOACK ,Automatic Acknowledge" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SLAVE ,Addressable as Slave" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,I2C Enable" "Disabled,Enabled"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "I2C0_CMD,Command Register"
|
|
bitfld.long 0x00 7. " CLEARPC ,Clear Pending Commands" "No effect,Clear"
|
|
bitfld.long 0x00 6. " CLEARTX ,Clear Transmit Buffer" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 5. " ABORT ,Abort transmission" "No effect,Abort"
|
|
bitfld.long 0x00 4. " CONT ,Continue transmission" "No effect,Continue"
|
|
textline " "
|
|
bitfld.long 0x00 3. " NACK ,Send NACK" "No effect,NACK"
|
|
bitfld.long 0x00 2. " ACK ,Send ACK" "No effect,ACK"
|
|
textline " "
|
|
bitfld.long 0x00 1. " STOP ,Send stop condition" "No effect,STOP"
|
|
bitfld.long 0x00 0. " START ,Send start condition" "No effect,START"
|
|
rgroup.long 0x08++0x07
|
|
line.long 0x00 "I2C0_STATE,State Register"
|
|
bitfld.long 0x00 5.--7. " STATE ,Transmission State" "IDLE,WAIT,START,ADDR,ADDRACK,DATA,DATAACK,?..."
|
|
bitfld.long 0x00 4. " BUSHOLD ,Bus Held" "Not held,Held"
|
|
textline " "
|
|
bitfld.long 0x00 3. " NACKED ,Nack Received" "Not received,Received"
|
|
bitfld.long 0x00 2. " TRANSMITTER ,Transmitter" "Received,Transmitter"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MASTER ,Transmitter" "Slave,Master"
|
|
bitfld.long 0x00 0. " BUSY ,Bus Busy" "Not busy,Busy"
|
|
line.long 0x04 "I2C0_STATUS,Status Register"
|
|
bitfld.long 0x04 8. " RXDATAV ,RX Data Valid" "Not valid,Valid"
|
|
bitfld.long 0x04 7. " TXBL ,TX Buffer Level" "Full,Empty"
|
|
textline " "
|
|
bitfld.long 0x04 6. " TXC ,TX Complete" "Not completed,Completed"
|
|
bitfld.long 0x04 5. " PABORT ,Pending Abort" "Not Pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 4. " PCONT ,Pending continue" "Not Pending,Pending"
|
|
bitfld.long 0x04 3. " PNACK ,Pending NACK" "Not Pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 2. " PACK ,Pending ACK" "Not Pending,Pending"
|
|
bitfld.long 0x04 1. " PSTOP ,Pending STOP" "Not Pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 0. " PSTART ,Pending START" "Not Pending,Pending"
|
|
group.long 0x10++0x0b
|
|
line.long 0x00 "I2C0_CLKDIV,Clock Division Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " DIV ,Clock Divider"
|
|
line.long 0x04 "I2C0_SADDR,Slave Adress Register"
|
|
hexmask.long.byte 0x04 1.--7. 2. " ADDR ,Slave Adress"
|
|
line.long 0x08 "I2C0_SADDRMASK,Slave Address Mask Register"
|
|
hexmask.long.byte 0x08 1.--7. 2. " MASK ,Slave Adress Mask"
|
|
hgroup.long 0x1c++0x03
|
|
hide.long 0x00 "I2C0_RXDATA,Receive Buffer Data Register"
|
|
in
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "I2C0_RXDATAP,Receive Buffer Data Peek Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXDATAP ,Rx Data Peek"
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "I2C0_TXDATA,Transmit Buffer Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXDATA ,Tx Data"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "I2C0_IF,Interrupt Flag Register"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " SSTOP_set/clr ,Slave STOP condition Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " CLTO_set/clr ,Clock Low Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " BITO_set/clr ,Bus Idle Timeout Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " RXUF_set/clr ,Receive Buffer Underflow Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " TXOF_set/clr ,Transmit Buffer Overflow Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " BUSHOLD_set/clr ,Bus Held Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " BUSERR_set/clr ,Bus Error " "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " ARBLOST_set/clr ,Arbitration Lost Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " MSTOP_set/clr ,Master STOP Condition Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " NACK_set/clr ,Not Acknowledge Received Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " ACK_set/clr ,Acknowledge Received Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " RXDATAV_set/clr ,Receive Data Valid Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TXBL_set/clr ,Transmit Buffer Level Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " TXC_set/clr ,Transfer Completed Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " ADDR_set/clr ,Address Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " RSTART_set/clr ,Repeated START condition Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " START_set/clr ,START condition Interrupt Flag" "No interrupt,Interrupt"
|
|
group.long 0x34++0x07
|
|
line.long 0x00 "I2C0_IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 16. " SSTOP ,Slave STOP condition Interrupt Flag" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " CLTO ,Clock Low Interrupt Flag" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " BITO ,Bus Idle Timeout Interrupt Flag" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " RXUF ,Receive Buffer Underflow Interrupt Flag" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TXOF ,Transmit Buffer Overflow Interrupt Flag" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " BUSHOLD ,Bus Held Interrupt Flag" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " BUSERR ,Bus Error Interrupt Flag" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " ARBLOST ,Arbitration Lost Interrupt Flag" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " MSTOP ,Master STOP Condition Interrupt Flag" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " NACK ,Not Acknowledge Received Interrupt Flag" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ACK ,Acknowledge Received Interrupt Flag" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RXDATAV ,Receive Data Valid Interrupt Flag" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TXBL ,Transmit Buffer Level Interrupt Flag" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TXC ,Transfer Completed Interrupt Flag" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ADDR ,Address Interrupt Flag" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RSTART ,Repeated START condition Interrupt Flag" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " START ,START condition Interrupt Flag" "Disabled,Enabled"
|
|
line.long 0x04 "I2C0_ROUTE,I/O Routing Register"
|
|
sif (cpuis("EFM32LG*")||cpuis("EFM32GG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
bitfld.long 0x04 8.--10. " LOCATION ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,?..."
|
|
elif (cpuis("EFM32TG*"))
|
|
bitfld.long 0x04 8.--10. " LOCATION ,I/O Location" "LOC0,LOC1,LOC2,LOC3,?..."
|
|
else
|
|
bitfld.long 0x04 8.--9. " LOCATION ,I/O Location" "LOC0,LOC1,LOC2,LOC3"
|
|
endif
|
|
bitfld.long 0x04 1. " SCLPEN ,SCL Pin Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " SDAPEN ,SDA Pin Enable" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree.open "USART (Universal Synchronous Asynchronous Receiver/Transmitter)"
|
|
tree "USART 0"
|
|
base ad:0x4000C000
|
|
width 19.
|
|
group.long 0x00++0x0b
|
|
line.long 0x00 "USART0_CTRL,Control Register"
|
|
sif (cpuis("EFM32WG*"))
|
|
bitfld.long 0x00 31. " SMSDELAY ,Synchronous Master Sample Delay" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*"))
|
|
bitfld.long 0x00 30. " MVDIS ,Majority Vote Disable" "No,Yes"
|
|
bitfld.long 0x00 29. " AUTOTX ,Always Transmit When RX Not Full" "Disabled,Enabled"
|
|
textline " "
|
|
elif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 29. " AUTOTX ,Always Transmit When RX Not Full" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 28. " BYTESWAP ,Byteswap In Double Accesses" "Normal,Swapped"
|
|
bitfld.long 0x00 26.--27. " TXDELAY ,TX Delay Transmission" "NONE,SINGLE,DOUBLE,TRIPLE"
|
|
textline " "
|
|
sif (cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 25. " SSSEARLY ,Synchronous Slave Setup Early" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 24. " ERRSTX ,Disable TX On Error" "No effect,Disabled"
|
|
bitfld.long 0x00 23. " ERRSRX ,Disable RX On Error" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ERRSDMA ,Halt DMA On Error" "No effect,Disabled"
|
|
bitfld.long 0x00 21. " BIT8DV ,Bit 8 Default Value" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SKIPPERRF ,Skip Parity Error Frames" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SCRETRANS ,SmartCard Retransmit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " SCMODE ,SmartCard Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " AUTOTRI ,Automatic TX Tristate" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " AUTOCS ,Automatic Chip Select" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " CSINV ,Chip Select Invert" "Active low,Active high"
|
|
textline " "
|
|
bitfld.long 0x00 14. " TXINV ,Transmitter output Invert" "Not inverted,Inverted"
|
|
bitfld.long 0x00 13. " RXINV ,Receiver Input Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TXBIL ,TX Buffer Interrupt Level" "EMPTY,HALFFULL"
|
|
bitfld.long 0x00 11. " CSMA ,Action On Slave-Select In Master Mode" "NOACTION,GOTOSLAVEMODE"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MSBF ,Most Significant Bit First" "Least,Most"
|
|
bitfld.long 0x00 9. " CLKPHA ,Clock Edge For Setup/Sample" "SAMPLELEADING,SAMPLETRAILING"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CLKPOL ,Clock Polarity" "IDLELOW,IDLEHIGH"
|
|
bitfld.long 0x00 5.--6. " OVS ,Oversampling" "X16,X8,X6,X4"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MPAB ,Multi-Processor Address-Bit" "0,1"
|
|
bitfld.long 0x00 3. " MPM ,Multi-Processor Mode" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CCEN ,Collision Check Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " LOOPBK ,Loopback Enable" "RX connected,TX connected"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SYNC ,USART Synchronous Mode" "Asynchronous,Synchronous"
|
|
line.long 0x04 "USART0_FRAME,USART Frame Format Register"
|
|
bitfld.long 0x04 12.--13. " STOPBITS ,Stop-Bit Mode" "0.5,1,1.5,2"
|
|
bitfld.long 0x04 8.--9. " PARITY ,Parity-Bit Mode" "NONE,Reserved,EVEN,ODD"
|
|
textline " "
|
|
bitfld.long 0x04 0.--3. " DATABITS ,Data-Bit Mode" "Reserved,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
|
|
line.long 0x08 "USART0_TRIGCTRL,USART Trigger Control Register"
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
bitfld.long 0x08 6. " AUTOTXTEN ,AUTOTX Trigger Enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x08 5. " TXTEN ,Transmit Trigger Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " RXTEN ,Receive Trigger Enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpuis("EFM32WG*"))
|
|
bitfld.long 0x08 0.--3. " TSEL ,Trigger PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,?..."
|
|
elif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x08 0.--1. " TSEL ,Trigger PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3"
|
|
else
|
|
bitfld.long 0x08 0.--2. " TSEL ,Trigger PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7"
|
|
endif
|
|
wgroup.long 0x0c++0x03
|
|
line.long 0x00 "USART0_CMD,Command Register"
|
|
bitfld.long 0x00 11. " CLEARRX ,Clear RX" "No effect,Clear"
|
|
bitfld.long 0x00 10. " CLEARTX ,Clear TX" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TXTRIDIS ,Transmitter Tristate Disable" "No effect,Yes"
|
|
bitfld.long 0x00 8. " TXTRIEN ,Transmitter Tristate Enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RXBLOCKDIS ,Receiver Block Disable" "No effect,Yes"
|
|
bitfld.long 0x00 6. " RXBLOCKEN ,Receiver Block Enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 5. " MASTERDIS ,Master Disable" "No effect,Yes"
|
|
bitfld.long 0x00 4. " MASTEREN ,Master Enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TXDIS ,Transmitter Disable" "No effect,Yes"
|
|
bitfld.long 0x00 2. " TXEN ,Transmitter Enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RXDIS ,Receiver Disable" "No effect,Yes"
|
|
bitfld.long 0x00 0. " RXEN ,Receiver Enable" "No effect,Enable"
|
|
if (((d.l((ad:0x4000C000+0x5C)))&0x1)==0x1)
|
|
;I2S Mode
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "USART0_STATUS,USART Status Register"
|
|
bitfld.long 0x00 8. " RXFULL ,RX FIFO Full" "Not full,Full"
|
|
bitfld.long 0x00 7. " RXDATAV ,RX Data Valid" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TXBL ,TX Buffer Level" "Low level,High level"
|
|
bitfld.long 0x00 5. " TXC ,TX Complete" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TXTRI ,Transmitter Tristated" "Output,Tri-State"
|
|
bitfld.long 0x00 3. " RXBLOCK ,Block Incoming Data" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MASTER ,SPI Master Mode" "Slave,Master"
|
|
bitfld.long 0x00 1. " TXENS ,Transmitter Enable Status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXENS ,Receiver Enable Status" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "USART0_STATUS,USART Status Register"
|
|
bitfld.long 0x00 8. " RXFULL ,RX FIFO Full" "Not full,Full"
|
|
bitfld.long 0x00 7. " RXDATAV ,RX Data Valid" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TXBL ,TX Buffer Level" "Low level,High level"
|
|
bitfld.long 0x00 5. " TXC ,TX Complete" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TXTRI ,Transmitter Tristated" "Output,Tri-State"
|
|
bitfld.long 0x00 3. " RXBLOCK ,Block Incoming Data" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MASTER ,SPI Master Mode" "Slave,Master"
|
|
bitfld.long 0x00 1. " TXENS ,Transmitter Enable Status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXENS ,Receiver Enable Status" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "USART0_CLKDIV,Clock Control Register"
|
|
hexmask.long.word 0x00 6.--20. 1. " DIV ,Fractional Clock Divider"
|
|
hgroup.long 0x18++0x07
|
|
hide.long 0x00 "USART0_RXDATAX,RX Buffer Data Extended Register"
|
|
in
|
|
hide.long 0x04 "USART0_RXDATA,RX Buffer Data Register"
|
|
in
|
|
rgroup.long 0x20++0x0f
|
|
line.long 0x00 "USART0_RXDOUBLEX,RX Buffer Double Data Extended Register"
|
|
bitfld.long 0x00 31. " FERR1 ,Data Framing Error 1" "No error,Error"
|
|
bitfld.long 0x00 30. " PERR1 ,Data Parity Error 1" "No error,Error"
|
|
textline " "
|
|
hexmask.long.word 0x00 16.--24. 1. " RXDATA1 ,Rx Data 1"
|
|
bitfld.long 0x00 15. " FERR0 ,Data Framing Error 0" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 14. " PERR0 ,Data Parity Error 0" "No error,Error"
|
|
hexmask.long.word 0x00 0.--8. 1. " RXDATA0 ,Rx Data 0"
|
|
line.long 0x04 "USART0_RXDOUBLE,RX FIFO Double Data Register"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RXDATA1 ,Rx Data 1"
|
|
hexmask.long.byte 0x04 0.--7. 1. " RXDATA0 ,Rx Data 0"
|
|
line.long 0x08 "USART0_RXDATAXP,RX Buffer Data Extended Peek Register"
|
|
bitfld.long 0x08 15. " FERRP ,Data Framing Error Peek" "No error,Error"
|
|
bitfld.long 0x08 14. " PERRP ,Data Parity Error Peek" "No error,Error"
|
|
textline " "
|
|
hexmask.long.word 0x08 0.--8. 1. " RXDATAP ,Rx Data Peek"
|
|
line.long 0x0c "USART0_RXDOUBLEXP,RX Buffer Double Data Extended Peek Register"
|
|
bitfld.long 0x0c 31. " FERRP1 ,Data Framing Error 1 Peek" "No error,Error"
|
|
bitfld.long 0x0c 30. " PERRP1 ,Data Parity Error 1 Peek" "No error,Error"
|
|
textline " "
|
|
hexmask.long.word 0x0c 16.--24. 1. " RXDATAP1 ,Rx Data 1 Peek"
|
|
bitfld.long 0x0c 15. " FERRP0 ,Data Framing Error 0 Peek" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0c 14. " PERRP0 ,Data Parity Error 0 Peek" "No error,Error"
|
|
hexmask.long.word 0x0c 0.--8. 1. " RXDATAP0 ,Rx Data 0 Peek"
|
|
wgroup.long 0x30++0xf
|
|
line.long 0x00 "USART0_TXDATAX,TX Buffer Data Extended Register"
|
|
bitfld.long 0x00 15. " RXENAT ,Enable RX After Transmission" "No effect,Enable"
|
|
bitfld.long 0x00 14. " TXDISAT ,Clear TXEN After Transmission" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TXBREAK ,Transmit Data As Break" "No effect,Transmit"
|
|
bitfld.long 0x00 12. " TXTRIAT ,Set TXTRI After Transmission" "No effect,Tri-State"
|
|
textline " "
|
|
bitfld.long 0x00 11. " UBRXAT ,Unblock RX After Transmission" "No effect,Unblock"
|
|
hexmask.long.word 0x00 0.--8. 1. " TXDATAX ,Tx Data"
|
|
line.long 0x04 "USART0_TXDATA,TX Buffer Data Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TXDATAX ,Tx Data"
|
|
line.long 0x08 "USART0_TXDOUBLEX,TX Buffer Double Data Extended Register"
|
|
bitfld.long 0x08 31. " RXENAT1 ,Enable RX After Transmission" "No effect,Enable"
|
|
bitfld.long 0x08 30. " TXDISAT1 ,Clear TXEN After Transmission" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x08 29. " TXBREAK1 ,Transmit Data As Break" "No effect,Transmit"
|
|
bitfld.long 0x08 28. " TXTRIAT1 ,Set TXTRI After Transmission" "No effect,Tri-State"
|
|
textline " "
|
|
bitfld.long 0x08 27. " UBRXAT1 ,Unblock RX After Transmission" "No effect,Unblock"
|
|
hexmask.long.word 0x08 16.--24. 1. " TXDATA1 ,Tx Data"
|
|
textline " "
|
|
bitfld.long 0x08 15. " RXENAT0 ,Enable RX After Transmission" "No effect,Enable"
|
|
bitfld.long 0x08 14. " TXDISAT0 ,Clear TXEN After Transmission" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x08 13. " TXBREAK0 ,Transmit Data As Break" "No effect,Transmit"
|
|
bitfld.long 0x08 12. " TXTRIAT0 ,Set TXTRI After Transmission" "No effect,Tri-State"
|
|
textline " "
|
|
bitfld.long 0x08 11. " UBRXAT0 ,Unblock RX After Transmission" "No effect,Unblock"
|
|
hexmask.long.word 0x08 0.--8. 1. " TXDATA0 ,Tx Data"
|
|
line.long 0x0c "USART0_TXDOUBLE,TX Buffer Double Data Register"
|
|
hexmask.long.byte 0x0c 8.--15. 1. " TXDATA1 ,Tx Data"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " TXDATA0 ,Tx Data"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "USART0_IF,Interrupt Flag Register"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " CCF_set/clr ,Collision Check Fail Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " SSM_set/clr ,Slave-Select In Master Mode Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " MPAF_set/clr ,Multi-Processor Address Frame Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " FERR_set/clr ,Framing Error Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " PERR_set/clr ,Parity Error Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TXUF_set/clr ,TX Underflow Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " TXOF_set/clr ,TX Overflow Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " RXUF_set/clr ,RX Underflow Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " RXOF_set/clr ,RX Overflow Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " RXFULL_set/clr ,RX Buffer Full Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RXDATAV ,RX Data Valid Interrupt Flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " TXBL ,TX Buffer Level Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TXC_set/clr ,TX Complete Interrupt Flag" "No interrupt,Interrupt"
|
|
group.long 0x4c++0x03
|
|
line.long 0x00 "USART0_IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 12. " CCF ,Collision Check Fail Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " SSM ,Slave-Select In Master Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MPAF ,Multi-Processor Address Frame Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " FERR ,Framing Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PERR ,Parity Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TXUF ,TX Underflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TXOF ,TX Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RXUF ,RX Underflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXOF ,RX Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " RXFULL ,RX Buffer Full Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RXDATAV ,RX Data Valid Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TXBL ,TX Buffer Level Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TXC ,TX Complete Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "USART0_IRCTRL,IrDA Control Register"
|
|
bitfld.long 0x00 7. " IRPRSEN ,IrDA PRS Channel Enable" "Disabled,Enabled"
|
|
sif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 4.--5. " IRPRSSEL ,IrDA PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3"
|
|
else
|
|
bitfld.long 0x00 4.--6. " IRPRSSEL ,IrDA PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 3. " IRFILT ,IrDA RX Filter" "Disabled,Enabled"
|
|
bitfld.long 0x00 1.--2. " IRPW ,IrDA TX Pulse Width" "ONE,TWO,THREE,FOUR"
|
|
textline " "
|
|
bitfld.long 0x00 0. " IREN ,Enable IrDA Module" "Disabled,Enabled"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "USART0_ROUTE,I/O Routing Register"
|
|
sif (cpuis("EFM32TG*")||cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 8.--10. " LOCATION ,I/O Location" "LOC0,LOC1,LOC2,LOC3,?..."
|
|
bitfld.long 0x00 3. " CLKPEN ,CLK Pin Enable" "Disabled,Enabled"
|
|
elif (cpuis("EFM32GG*"))
|
|
bitfld.long 0x00 8.--10. " LOCATION ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,?..."
|
|
bitfld.long 0x00 3. " CLKPEN ,CLK Pin Enable" "Disabled,Enabled"
|
|
elif (cpuis("EFM32LG*")||cpuis("EFM32WG*"))
|
|
bitfld.long 0x00 8.--10. " LOCATION ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,?..."
|
|
bitfld.long 0x00 3. " CLKPEN ,CLK Pin Enable" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x00 8.--9. " LOCATION ,I/O Location" "LOC0,LOC1,LOC2,LOC3"
|
|
bitfld.long 0x00 3. " CLKPEN ,CLK Pin Enable" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 2. " CSPEN ,CS Pin Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TXPEN ,TX Pin Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXPEN ,RX Pin Enable" "Disabled,Enabled"
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "USART0_INPUT,USART Input Register"
|
|
bitfld.long 0x00 4. " RXPRS ,PRS RX Enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*"))
|
|
bitfld.long 0x00 0.--3. " RXPRSSEL ,RX PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,?..."
|
|
elif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 0.--1. " RXPRSSEL ,RX PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3"
|
|
else
|
|
bitfld.long 0x00 0.--2. " RXPRSSEL ,RX PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7"
|
|
endif
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree "USART 1"
|
|
base ad:0x4000C400
|
|
width 19.
|
|
group.long 0x00++0x0b
|
|
line.long 0x00 "USART1_CTRL,Control Register"
|
|
sif (cpuis("EFM32WG*"))
|
|
bitfld.long 0x00 31. " SMSDELAY ,Synchronous Master Sample Delay" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*"))
|
|
bitfld.long 0x00 30. " MVDIS ,Majority Vote Disable" "No,Yes"
|
|
bitfld.long 0x00 29. " AUTOTX ,Always Transmit When RX Not Full" "Disabled,Enabled"
|
|
textline " "
|
|
elif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 29. " AUTOTX ,Always Transmit When RX Not Full" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 28. " BYTESWAP ,Byteswap In Double Accesses" "Normal,Swapped"
|
|
bitfld.long 0x00 26.--27. " TXDELAY ,TX Delay Transmission" "NONE,SINGLE,DOUBLE,TRIPLE"
|
|
textline " "
|
|
sif (cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 25. " SSSEARLY ,Synchronous Slave Setup Early" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 24. " ERRSTX ,Disable TX On Error" "No effect,Disabled"
|
|
bitfld.long 0x00 23. " ERRSRX ,Disable RX On Error" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ERRSDMA ,Halt DMA On Error" "No effect,Disabled"
|
|
bitfld.long 0x00 21. " BIT8DV ,Bit 8 Default Value" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SKIPPERRF ,Skip Parity Error Frames" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SCRETRANS ,SmartCard Retransmit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " SCMODE ,SmartCard Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " AUTOTRI ,Automatic TX Tristate" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " AUTOCS ,Automatic Chip Select" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " CSINV ,Chip Select Invert" "Active low,Active high"
|
|
textline " "
|
|
bitfld.long 0x00 14. " TXINV ,Transmitter output Invert" "Not inverted,Inverted"
|
|
bitfld.long 0x00 13. " RXINV ,Receiver Input Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TXBIL ,TX Buffer Interrupt Level" "EMPTY,HALFFULL"
|
|
bitfld.long 0x00 11. " CSMA ,Action On Slave-Select In Master Mode" "NOACTION,GOTOSLAVEMODE"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MSBF ,Most Significant Bit First" "Least,Most"
|
|
bitfld.long 0x00 9. " CLKPHA ,Clock Edge For Setup/Sample" "SAMPLELEADING,SAMPLETRAILING"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CLKPOL ,Clock Polarity" "IDLELOW,IDLEHIGH"
|
|
bitfld.long 0x00 5.--6. " OVS ,Oversampling" "X16,X8,X6,X4"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MPAB ,Multi-Processor Address-Bit" "0,1"
|
|
bitfld.long 0x00 3. " MPM ,Multi-Processor Mode" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CCEN ,Collision Check Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " LOOPBK ,Loopback Enable" "RX connected,TX connected"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SYNC ,USART Synchronous Mode" "Asynchronous,Synchronous"
|
|
line.long 0x04 "USART1_FRAME,USART Frame Format Register"
|
|
bitfld.long 0x04 12.--13. " STOPBITS ,Stop-Bit Mode" "0.5,1,1.5,2"
|
|
bitfld.long 0x04 8.--9. " PARITY ,Parity-Bit Mode" "NONE,Reserved,EVEN,ODD"
|
|
textline " "
|
|
bitfld.long 0x04 0.--3. " DATABITS ,Data-Bit Mode" "Reserved,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
|
|
line.long 0x08 "USART1_TRIGCTRL,USART Trigger Control Register"
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
bitfld.long 0x08 6. " AUTOTXTEN ,AUTOTX Trigger Enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x08 5. " TXTEN ,Transmit Trigger Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " RXTEN ,Receive Trigger Enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpuis("EFM32WG*"))
|
|
bitfld.long 0x08 0.--3. " TSEL ,Trigger PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,?..."
|
|
elif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x08 0.--1. " TSEL ,Trigger PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3"
|
|
else
|
|
bitfld.long 0x08 0.--2. " TSEL ,Trigger PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7"
|
|
endif
|
|
wgroup.long 0x0c++0x03
|
|
line.long 0x00 "USART1_CMD,Command Register"
|
|
bitfld.long 0x00 11. " CLEARRX ,Clear RX" "No effect,Clear"
|
|
bitfld.long 0x00 10. " CLEARTX ,Clear TX" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TXTRIDIS ,Transmitter Tristate Disable" "No effect,Yes"
|
|
bitfld.long 0x00 8. " TXTRIEN ,Transmitter Tristate Enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RXBLOCKDIS ,Receiver Block Disable" "No effect,Yes"
|
|
bitfld.long 0x00 6. " RXBLOCKEN ,Receiver Block Enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 5. " MASTERDIS ,Master Disable" "No effect,Yes"
|
|
bitfld.long 0x00 4. " MASTEREN ,Master Enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TXDIS ,Transmitter Disable" "No effect,Yes"
|
|
bitfld.long 0x00 2. " TXEN ,Transmitter Enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RXDIS ,Receiver Disable" "No effect,Yes"
|
|
bitfld.long 0x00 0. " RXEN ,Receiver Enable" "No effect,Enable"
|
|
if (((d.l((ad:0x4000C400+0x5C)))&0x1)==0x1)
|
|
;I2S Mode
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "USART1_STATUS,USART Status Register"
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 12. " RXFULLRIGHT ,RX Full of Right Data" "Not full,Full"
|
|
bitfld.long 0x00 11. " RXDATAVRIGHT ,RX Data Right" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TXBSRIGHT ,TX Buffer Expects Single Right Data" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TXBDRIGHT ,TX Buffer Expects Double Right Data" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 8. " RXFULL ,RX FIFO Full" "Not full,Full"
|
|
bitfld.long 0x00 7. " RXDATAV ,RX Data Valid" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TXBL ,TX Buffer Level" "Low level,High level"
|
|
bitfld.long 0x00 5. " TXC ,TX Complete" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TXTRI ,Transmitter Tristated" "Output,Tri-State"
|
|
bitfld.long 0x00 3. " RXBLOCK ,Block Incoming Data" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MASTER ,SPI Master Mode" "Slave,Master"
|
|
bitfld.long 0x00 1. " TXENS ,Transmitter Enable Status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXENS ,Receiver Enable Status" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "USART1_STATUS,USART Status Register"
|
|
bitfld.long 0x00 8. " RXFULL ,RX FIFO Full" "Not full,Full"
|
|
bitfld.long 0x00 7. " RXDATAV ,RX Data Valid" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TXBL ,TX Buffer Level" "Low level,High level"
|
|
bitfld.long 0x00 5. " TXC ,TX Complete" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TXTRI ,Transmitter Tristated" "Output,Tri-State"
|
|
bitfld.long 0x00 3. " RXBLOCK ,Block Incoming Data" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MASTER ,SPI Master Mode" "Slave,Master"
|
|
bitfld.long 0x00 1. " TXENS ,Transmitter Enable Status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXENS ,Receiver Enable Status" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "USART1_CLKDIV,Clock Control Register"
|
|
hexmask.long.word 0x00 6.--20. 1. " DIV ,Fractional Clock Divider"
|
|
hgroup.long 0x18++0x07
|
|
hide.long 0x00 "USART1_RXDATAX,RX Buffer Data Extended Register"
|
|
in
|
|
hide.long 0x04 "USART1_RXDATA,RX Buffer Data Register"
|
|
in
|
|
rgroup.long 0x20++0x0f
|
|
line.long 0x00 "USART1_RXDOUBLEX,RX Buffer Double Data Extended Register"
|
|
bitfld.long 0x00 31. " FERR1 ,Data Framing Error 1" "No error,Error"
|
|
bitfld.long 0x00 30. " PERR1 ,Data Parity Error 1" "No error,Error"
|
|
textline " "
|
|
hexmask.long.word 0x00 16.--24. 1. " RXDATA1 ,Rx Data 1"
|
|
bitfld.long 0x00 15. " FERR0 ,Data Framing Error 0" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 14. " PERR0 ,Data Parity Error 0" "No error,Error"
|
|
hexmask.long.word 0x00 0.--8. 1. " RXDATA0 ,Rx Data 0"
|
|
line.long 0x04 "USART1_RXDOUBLE,RX FIFO Double Data Register"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RXDATA1 ,Rx Data 1"
|
|
hexmask.long.byte 0x04 0.--7. 1. " RXDATA0 ,Rx Data 0"
|
|
line.long 0x08 "USART1_RXDATAXP,RX Buffer Data Extended Peek Register"
|
|
bitfld.long 0x08 15. " FERRP ,Data Framing Error Peek" "No error,Error"
|
|
bitfld.long 0x08 14. " PERRP ,Data Parity Error Peek" "No error,Error"
|
|
textline " "
|
|
hexmask.long.word 0x08 0.--8. 1. " RXDATAP ,Rx Data Peek"
|
|
line.long 0x0c "USART1_RXDOUBLEXP,RX Buffer Double Data Extended Peek Register"
|
|
bitfld.long 0x0c 31. " FERRP1 ,Data Framing Error 1 Peek" "No error,Error"
|
|
bitfld.long 0x0c 30. " PERRP1 ,Data Parity Error 1 Peek" "No error,Error"
|
|
textline " "
|
|
hexmask.long.word 0x0c 16.--24. 1. " RXDATAP1 ,Rx Data 1 Peek"
|
|
bitfld.long 0x0c 15. " FERRP0 ,Data Framing Error 0 Peek" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0c 14. " PERRP0 ,Data Parity Error 0 Peek" "No error,Error"
|
|
hexmask.long.word 0x0c 0.--8. 1. " RXDATAP0 ,Rx Data 0 Peek"
|
|
wgroup.long 0x30++0xf
|
|
line.long 0x00 "USART1_TXDATAX,TX Buffer Data Extended Register"
|
|
bitfld.long 0x00 15. " RXENAT ,Enable RX After Transmission" "No effect,Enable"
|
|
bitfld.long 0x00 14. " TXDISAT ,Clear TXEN After Transmission" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TXBREAK ,Transmit Data As Break" "No effect,Transmit"
|
|
bitfld.long 0x00 12. " TXTRIAT ,Set TXTRI After Transmission" "No effect,Tri-State"
|
|
textline " "
|
|
bitfld.long 0x00 11. " UBRXAT ,Unblock RX After Transmission" "No effect,Unblock"
|
|
hexmask.long.word 0x00 0.--8. 1. " TXDATAX ,Tx Data"
|
|
line.long 0x04 "USART1_TXDATA,TX Buffer Data Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TXDATAX ,Tx Data"
|
|
line.long 0x08 "USART1_TXDOUBLEX,TX Buffer Double Data Extended Register"
|
|
bitfld.long 0x08 31. " RXENAT1 ,Enable RX After Transmission" "No effect,Enable"
|
|
bitfld.long 0x08 30. " TXDISAT1 ,Clear TXEN After Transmission" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x08 29. " TXBREAK1 ,Transmit Data As Break" "No effect,Transmit"
|
|
bitfld.long 0x08 28. " TXTRIAT1 ,Set TXTRI After Transmission" "No effect,Tri-State"
|
|
textline " "
|
|
bitfld.long 0x08 27. " UBRXAT1 ,Unblock RX After Transmission" "No effect,Unblock"
|
|
hexmask.long.word 0x08 16.--24. 1. " TXDATA1 ,Tx Data"
|
|
textline " "
|
|
bitfld.long 0x08 15. " RXENAT0 ,Enable RX After Transmission" "No effect,Enable"
|
|
bitfld.long 0x08 14. " TXDISAT0 ,Clear TXEN After Transmission" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x08 13. " TXBREAK0 ,Transmit Data As Break" "No effect,Transmit"
|
|
bitfld.long 0x08 12. " TXTRIAT0 ,Set TXTRI After Transmission" "No effect,Tri-State"
|
|
textline " "
|
|
bitfld.long 0x08 11. " UBRXAT0 ,Unblock RX After Transmission" "No effect,Unblock"
|
|
hexmask.long.word 0x08 0.--8. 1. " TXDATA0 ,Tx Data"
|
|
line.long 0x0c "USART1_TXDOUBLE,TX Buffer Double Data Register"
|
|
hexmask.long.byte 0x0c 8.--15. 1. " TXDATA1 ,Tx Data"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " TXDATA0 ,Tx Data"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "USART1_IF,Interrupt Flag Register"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " CCF_set/clr ,Collision Check Fail Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " SSM_set/clr ,Slave-Select In Master Mode Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " MPAF_set/clr ,Multi-Processor Address Frame Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " FERR_set/clr ,Framing Error Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " PERR_set/clr ,Parity Error Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TXUF_set/clr ,TX Underflow Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " TXOF_set/clr ,TX Overflow Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " RXUF_set/clr ,RX Underflow Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " RXOF_set/clr ,RX Overflow Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " RXFULL_set/clr ,RX Buffer Full Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RXDATAV ,RX Data Valid Interrupt Flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " TXBL ,TX Buffer Level Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TXC_set/clr ,TX Complete Interrupt Flag" "No interrupt,Interrupt"
|
|
group.long 0x4c++0x03
|
|
line.long 0x00 "USART1_IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 12. " CCF ,Collision Check Fail Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " SSM ,Slave-Select In Master Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MPAF ,Multi-Processor Address Frame Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " FERR ,Framing Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PERR ,Parity Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TXUF ,TX Underflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TXOF ,TX Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RXUF ,RX Underflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXOF ,RX Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " RXFULL ,RX Buffer Full Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RXDATAV ,RX Data Valid Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TXBL ,TX Buffer Level Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TXC ,TX Complete Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "USART1_ROUTE,I/O Routing Register"
|
|
sif (cpuis("EFM32TG*")||cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 8.--10. " LOCATION ,I/O Location" "LOC0,LOC1,LOC2,LOC3,?..."
|
|
bitfld.long 0x00 3. " CLKPEN ,CLK Pin Enable" "Disabled,Enabled"
|
|
elif (cpuis("EFM32GG*"))
|
|
bitfld.long 0x00 8.--10. " LOCATION ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,?..."
|
|
bitfld.long 0x00 3. " CLKPEN ,CLK Pin Enable" "Disabled,Enabled"
|
|
elif (cpuis("EFM32LG*")||cpuis("EFM32WG*"))
|
|
bitfld.long 0x00 8.--10. " LOCATION ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,?..."
|
|
bitfld.long 0x00 3. " CLKPEN ,CLK Pin Enable" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x00 8.--9. " LOCATION ,I/O Location" "LOC0,LOC1,LOC2,LOC3"
|
|
bitfld.long 0x00 3. " CLKPEN ,CLK Pin Enable" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 2. " CSPEN ,CS Pin Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TXPEN ,TX Pin Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXPEN ,RX Pin Enable" "Disabled,Enabled"
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "USART1_INPUT,USART Input Register"
|
|
bitfld.long 0x00 4. " RXPRS ,PRS RX Enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*"))
|
|
bitfld.long 0x00 0.--3. " RXPRSSEL ,RX PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,?..."
|
|
elif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 0.--1. " RXPRSSEL ,RX PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3"
|
|
else
|
|
bitfld.long 0x00 0.--2. " RXPRSSEL ,RX PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7"
|
|
endif
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "USART1_I2SCTRL,I2S Control Register"
|
|
bitfld.long 0x00 8.--10. " FORMAT ,I2S Word Format" "W32D32,W32D24M,W32D24,W32D16,W32D8,W16D16,W16D8,W8D8"
|
|
bitfld.long 0x00 4. " DELAY ,Delay on I2S data" "No delay,Delay"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DMASPLIT ,Separate DMA Request For Left/Right Data" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " JUSTIFY ,Justification of I2S Data" "Left,Right"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MONO ,Stereo or Mono" "Stereo,Mono"
|
|
bitfld.long 0x00 0. " EN ,Enable I2S Mode" "Disabled,Enabled"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "LEUART (Low Energy Universal Asynchronous Receiver/Transmitter)"
|
|
base ad:0x40084000
|
|
width 12.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 14.--15. " TXDELAY ,TX delay transmission" "None,Single,Double,Triple"
|
|
bitfld.long 0x00 13. " TXDMAWU ,TX DMA wakeup" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " RXDMAWU ,RX DMA wakeup" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " BIT8DV ,Bit 8 default value" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. " MPAB ,Multi-processor address-bit" "0,1"
|
|
bitfld.long 0x00 9. " MPM ,Multi-processor mode" "Mode 0,Mode 1"
|
|
bitfld.long 0x00 8. " SFUBRX ,Start-frame unblock RX" "No effect,Cleared"
|
|
bitfld.long 0x00 7. " LOOPBK ,Loopback enable" "RX connected,TX connected"
|
|
newline
|
|
bitfld.long 0x00 6. " ERRSDMA ,Clear RX DMA on error" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " INV ,Invert input and output" "Not inverted,Inverted"
|
|
bitfld.long 0x00 4. " STOPBITS ,Stop-bit mode" "1 bit,2 bits"
|
|
newline
|
|
bitfld.long 0x00 2.--3. " PARITY ,Parity-bit mode" "None,,Even,Odd"
|
|
bitfld.long 0x00 1. " DATABITS ,Data-bit mode" "8 bits,9 bits"
|
|
bitfld.long 0x00 0. " AUTOTRI ,Automatic transmitter tristate" "Disabled,Enabled"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 7. " CLEARRX ,Clear RX" "No effect,Clear"
|
|
bitfld.long 0x00 6. " CLEARTX ,Clear TX" "No effect,Clear"
|
|
bitfld.long 0x00 5. " RXBLOCKDIS ,Receiver block disable" "No,Yes"
|
|
bitfld.long 0x00 4. " RXBLOCKEN ,Receiver block enable" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 3. " TXDIS ,Transmitter disable" "No,Yes"
|
|
bitfld.long 0x00 2. " TXEN ,Transmitter enable" "Disable,Enable"
|
|
bitfld.long 0x00 1. " RXDIS ,Receiver disable" "No,Yes"
|
|
bitfld.long 0x00 0. " RXEN ,Receiver enable" "Disable,Enable"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
sif cpuis("EFM32GG11B*")
|
|
bitfld.long 0x00 6. " TXIDLE ,TX idle" "Busy,Idle"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 5. " RXDATAV ,RX data valid" "Not valid,Valid"
|
|
bitfld.long 0x00 4. " TXBL ,TX buffer level" "Full,Empty"
|
|
bitfld.long 0x00 3. " TXC ,TX complete" "Not completed,Completed"
|
|
newline
|
|
bitfld.long 0x00 2. " RXBLOCK ,Block incoming data" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TXENS ,Transmitter enable status" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RXENS ,Receiver enable status" "Disabled,Enabled"
|
|
group.long 0x0C++0x0B
|
|
line.long 0x00 "CLKDIV,Clock Control Register"
|
|
sif cpuis("EFM32GG11B*")
|
|
hexmask.long.word 0x00 3.--16. 1. " DIV ,Fractional clock divider"
|
|
else
|
|
hexmask.long.word 0x00 3.--14. 1. " DIV ,Fractional clock divider"
|
|
endif
|
|
line.long 0x04 "STARTFRAME,Start Frame Register"
|
|
hexmask.long.word 0x04 0.--8. 1. " STARTFRAME ,Start frame"
|
|
line.long 0x08 "SIGFRAME,Signal Frame Register"
|
|
hexmask.long.word 0x08 0.--8. 1. " SIGFRAME ,Signal frame"
|
|
hgroup.long 0x18++0x03
|
|
hide.long 0x00 "RXDATAX,Receive Buffer Data Extended Register"
|
|
in
|
|
hgroup.long 0x1C++0x03
|
|
hide.long 0x00 "RXDATA,Receive Buffer Data Register"
|
|
in
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "RXDATAXP,Receive Buffer Data Extended Peek Register"
|
|
bitfld.long 0x00 15. " FERRP ,Receive data framing error peek" "No error,Error"
|
|
bitfld.long 0x00 14. " PERRP ,Receive data parity error peek" "No error,Error"
|
|
hexmask.long.word 0x00 0.--8. 1. " RXDATAP ,Rx data peek"
|
|
wgroup.long 0x24++0x07
|
|
line.long 0x00 "TXDATAX,Transmit Buffer Data Extended Register"
|
|
bitfld.long 0x00 15. " RXENAT ,Enable RX after transmission" "Disable,Enable"
|
|
bitfld.long 0x00 14. " TXDISAT ,Disable TX after transmission" "No,Yes"
|
|
bitfld.long 0x00 13. " TXBREAK ,Transmit data as break" "No effect,Transmit"
|
|
hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Tx data"
|
|
line.long 0x04 "TXDATA,Transmit Buffer Data Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TXDATA ,Tx data"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " SIGF_SET/CLR ,Signal frame interrupt flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " STARTF_SET/CLR ,Start frame interrupt flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " MPAF_SET/CLR ,Multi-processor address frame interrupt flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " FERR_SET/CLR ,Framing error interrupt flag" "No interrupt,Interrupt"
|
|
newline
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " PERR_SET/CLR ,Parity error interrupt flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " TXOF_SET/CLR ,TX overflow interrupt flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " RXUF_SET/CLR ,RX underflow interrupt flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " RXOF_SET/CLR ,RX overflow interrupt flag" "No interrupt,Interrupt"
|
|
newline
|
|
rbitfld.long 0x00 2. " RXDATAV ,RX data valid interrupt flag" "No interrupt,Interrupt"
|
|
rbitfld.long 0x00 1. " TXBL ,TX buffer level interrupt flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TXC_SET/CLR ,TX complete interrupt flag" "No interrupt,Interrupt"
|
|
group.long 0x38++0x0B
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 10. " SIGF ,Signal frame interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " STARTF ,Start frame interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " MPAF ,Multi-processor address frame interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " FERR ,Framing error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " PERR ,Parity error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " TXOF ,TX overflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " RXUF ,RX underflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " RXOF ,RX overflow interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " RXDATAV ,RX data valid interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TXBL ,TX buffer level interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXC ,TX complete interrupt enable" "Disabled,Enabled"
|
|
line.long 0x04 "PULSECTRL,Pulse Control Register"
|
|
bitfld.long 0x04 5. " PULSEFILT ,Pulse filter" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " PULSEEN ,Pulse generator/extender enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--3. " PULSEW ,Pulse width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "FREEZE,Freeze Register"
|
|
bitfld.long 0x08 0. " REGFREEZE ,Register update freeze" "Updated,Freeze"
|
|
rgroup.long 0x44++0x03
|
|
line.long 0x00 "SYNBUSY,Synchronization Busy Register"
|
|
bitfld.long 0x00 7. " PULSECTRL ,PULSECTRL register busy" "Not busy,Busy"
|
|
bitfld.long 0x00 6. " TXDATA ,TXDATA register busy" "Not busy,Busy"
|
|
bitfld.long 0x00 5. " TXDATAX ,TXDATAX register busy" "Not busy,Busy"
|
|
bitfld.long 0x00 4. " SIGFRAME ,SIGFRAME register busy" "Not busy,Busy"
|
|
newline
|
|
bitfld.long 0x00 3. " STARTFRAME ,STARTFRAME register busy" "Not busy,Busy"
|
|
bitfld.long 0x00 2. " CLKDIV ,CLKDIV register busy" "Not busy,Busy"
|
|
bitfld.long 0x00 1. " CMD ,CMD register busy" "Not busy,Busy"
|
|
bitfld.long 0x00 0. " CTRL ,CTRL register busy" "Not busy,Busy"
|
|
sif cpuis("EFM32GG11B*")
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "ROUTEPEN,I/O Routing Pin Enable Register"
|
|
bitfld.long 0x00 1. " TXPEN ,TX pin enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RXPEN ,RX pin enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "ROUTE,I/O Routing Register"
|
|
sif (cpuis("EFM32TG*"))
|
|
bitfld.long 0x00 8.--10. " LOCATION ,I/O location" "LOC0,LOC1,LOC2,LOC3,?..."
|
|
elif (cpuis("EFM32LG*")||cpuis("EFM32GG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 8.--10. " LOCATION ,I/O location" "LOC0,LOC1,LOC2,LOC3,LOC4,?..."
|
|
elif (cpuis("EFM32HG*"))
|
|
bitfld.long 0x00 8.--10. " LOCATION ,I/O location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,?..."
|
|
else
|
|
bitfld.long 0x00 8.--9. " LOCATION ,I/O location" "LOC0,LOC1,LOC2,LOC3"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 1. " TXPEN ,TX pin enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RXPEN ,RX pin enable" "Disabled,Enabled"
|
|
endif
|
|
sif cpuis("EFM32GG11B*")
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
|
|
bitfld.long 0x00 8.--13. " TXLOC ,USART TX pin location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,?..."
|
|
bitfld.long 0x00 0.--5. " RXLOC ,USART RX pin location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,?..."
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "INPUT,LEUART Input Register"
|
|
bitfld.long 0x00 5. " RXPRS ,PRS RX enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " RXPRSSEL ,RX PRS channel select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,PRSCH12,PRSCH13,PRSCH14,PRSCH15,PRSCH16,PRSCH17,PRSCH18,PRSCH19,PRSCH20,PRSCH21,PRSCH22,PRSCH23,?..."
|
|
endif
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))||(cpuis("EFM32HG"))
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "INPUT,LEUART Input Register"
|
|
bitfld.long 0x00 4. " RXPRS ,PRS RX enable" "Disabled,Enabled"
|
|
newline
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*"))
|
|
bitfld.long 0x00 0.--3. " RXPRSSEL ,RX PRS channel select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,?..."
|
|
elif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 0.--1. " RXPRSSEL ,RX PRS channel select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3"
|
|
elif (cpuis("EFM32HG*"))
|
|
bitfld.long 0x00 0.--2. " RXPRSSEL ,RX PRS channel select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,?..."
|
|
else
|
|
bitfld.long 0x00 0.--2. " RXPRSSEL ,RX PRS channel select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree.open "TIMER (Timer/Counter)"
|
|
tree "TIMER0"
|
|
base ad:0x40010000
|
|
width 17.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "TIMER0_CTRL,Control Register"
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 29. " RSSCOIST ,Reload-Start Sets Compare Ouptut initial State" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " ATI ,Always Track Inputs" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 24.--27. " PRESC ,Prescaler Setting" "DIV1,DIV2,DIV4,DIV8,DIV16,DIV32,DIV64,DIV128,DIV256,DIV512,DIV1024,?..."
|
|
bitfld.long 0x00 16.--17. " CLKSEL ,Clock Source Select" "PRESCHFPERCLK,CC1,TIMEROUF,?..."
|
|
textline " "
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 13. " X2CNT ,2x Count Mode" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 10.--11. " FALLA ,Timer Falling Input Edge Action" "NONE,START,STOP,RELOADSTART"
|
|
bitfld.long 0x00 8.--9. " RISEA ,Timer Rising Input Edge Action" "NONE,START,STOP,RELOADSTART"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DMACLRACT ,DMA Request Clear on Active" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " DEBUGRUN ,Debug Mode Run Enable" "Frozen,Running"
|
|
textline " "
|
|
bitfld.long 0x00 5. " QDM ,Quadrature Decoder Mode Selection" "X2,X4"
|
|
bitfld.long 0x00 4. " OSMEN ,One-shot Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SYNC ,Timer Start/Stop/Reload Synchronization" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " MODE ,Timer Mode" "UP,DOWN,UPDOWN,QDEC"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "TIMER0_CMD,Command Register"
|
|
bitfld.long 0x00 1. " STOP ,Stop Timer" "No effect,Stop"
|
|
bitfld.long 0x00 0. " START ,Start Timer" "No effect,Start"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "TIMER0_STATUS,Status Register"
|
|
bitfld.long 0x00 26. " CCPOL2 ,CC2 Polarity" "LOWRISE,HIGHFALL"
|
|
bitfld.long 0x00 25. " CCPOL1 ,CC1 Polarity" "LOWRISE,HIGHFALL"
|
|
textline " "
|
|
bitfld.long 0x00 24. " CCPOL0 ,CC0 Polarity" "LOWRISE,HIGHFALL"
|
|
bitfld.long 0x00 18. " ICV2 ,CC2 Input Capture Valid" "Not Valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 17. " ICV1 ,CC1 Input Capture Valid" "Not Valid,Valid"
|
|
bitfld.long 0x00 16. " ICV0 ,CC0 Input Capture Valid" "Not Valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CCVBV2 ,CC2 CCVB Valid" "Not Valid,Valid"
|
|
bitfld.long 0x00 9. " CCVBV1 ,CC1 CCVB Valid" "Not Valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CCVBV0 ,CC0 CCVB Valid" "Not Valid,Valid"
|
|
bitfld.long 0x00 2. " TOPBV ,TOPB Valid" "Not Valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DIR ,Direction" "UP,DOWN"
|
|
bitfld.long 0x00 0. " RUNNING ,Running" "Not running,Running"
|
|
group.long 0x0c++0x07
|
|
line.long 0x00 "TIMER0_IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 10. " ICBOF2 ,CC Channel 2 Input Capture Buffer Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " ICBOF1 ,CC Channel 1 Input Capture Buffer Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ICBOF0 ,CC Channel 0 Input Capture Buffer Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " CC2 ,CC Channel 2 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CC1 ,CC Channel 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CC0 ,CC Channel 0 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " UF ,Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " OF ,Overflow Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x04 "TIMER0_IF,Interrupt Flag Register"
|
|
setclrfld.long 0x04 10. 0x08 10. 0x0c 10. " ICBOF2_set/clr ,CC Channel 2 Input Capture Buffer Overflow Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 9. 0x08 9. 0x0c 9. " ICBOF1_set/clr ,CC Channel 1 Input Capture Buffer Overflow Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 8. 0x08 8. 0x0c 8. " ICBOF0_set/clr ,CC Channel 0 Input Capture Buffer Overflow Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 6. 0x08 6. 0x0c 6. " CC2_set/clr ,CC Channel 2 Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 5. 0x08 5. 0x0c 5. " CC1_set/clr ,CC Channel 1 Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 4. 0x08 4. 0x0c 4. " CC0_set/clr ,CC Channel 0 Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x08 1. 0x0c 1. " UF_set/clr ,Underflow Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 0. 0x08 0. 0x0c 0. " OF_set/clr ,Overflow Interrupt Flag" "No interrupt,Interrupt"
|
|
group.long 0x1c++0x0f
|
|
line.long 0x00 "TIMER0_TOP,Counter Top Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TOP ,Counter Top Value"
|
|
line.long 0x04 "TIMER0_TOPB,Counter Top Value Buffer Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " TOPB ,Counter Top Value Buffer"
|
|
line.long 0x08 "TIMER0_CNT,Counter Value Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " CNT ,Counter Value"
|
|
line.long 0x0c "TIMER0_ROUTE,I/O Routing Register"
|
|
sif (cpuis("EFM32LG*")||cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
bitfld.long 0x0C 16.--18. " LOCATION ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,?..."
|
|
else
|
|
bitfld.long 0x0C 16.--17. " LOCATION ,I/O Location" "LOC0,LOC1,LOC2,LOC3"
|
|
endif
|
|
sif (!cpuis("EFM32TG*"))
|
|
textline " "
|
|
bitfld.long 0x0c 10. " CDTIPEN2 ,CC Channel 2 Complementary Dead-Time Insertion Pin Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 9. " CDTIPEN1 ,CC Channel 1 Complementary Dead-Time Insertion Pin Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 8. " CDTIPEN0 ,CC Channel 0 Complementary Dead-Time Insertion Pin Enable" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x0c 2. " CCPEN2 ,CC Channel 2 Pin Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 1. " CCPEN1 ,CC Channel 1 Pin Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 0. " CCPEN0 ,CC Channel 0 Pin Enable" "Disabled,Enabled"
|
|
tree "Compare/Capture Channel Registers"
|
|
tree "Channel 0"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "TIMER0_CC0_CTRL,CC Channel Control Register"
|
|
sif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 28. " PRSCONF ,PRS Configuration" "PULSE,LEVEL"
|
|
endif
|
|
bitfld.long 0x00 26.--27. " ICEVCTRL ,Input Capture Event Control" "EVERYEDGE,EVERYSECONDEDGE,RISING,FALLING"
|
|
bitfld.long 0x00 24.--25. " ICEDGE ,Input Capture Edge Select" "RISING,FALLING,BOTH,NONE"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FILT ,Digital Filter" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " INSEL ,Input Selection" "PIN,PRS"
|
|
textline " "
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*"))
|
|
bitfld.long 0x00 16.--19. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,?..."
|
|
elif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 16.--17. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3"
|
|
else
|
|
bitfld.long 0x00 16.--18. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CUFOA ,Counter Underflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 10.--11. " COFOA ,Counter Overflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " CMOA ,Compare Match Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 4. " COIST ,Compare Output Initial State" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " OUTINV ,Output Invert" "Not inverted,Inverted"
|
|
bitfld.long 0x00 0.--1. " MODE ,CC Channel Mode" "OFF,INPUTCAPTURE,OUTPUTCOMPARE,PWM"
|
|
hgroup.long (0x30+0x04)++0x03
|
|
hide.long 0x00 "TIMER0_CC0_CCV,CC Channel Value Register"
|
|
in
|
|
sif (cpuis("EFM32WG*"))
|
|
rgroup.long (0x30+0x08)++0x03
|
|
line.long 0x00 "TIMER0_CC0_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CCVP ,CC Channel Value Peek"
|
|
group.long (0x30+0x0c)++0x03
|
|
line.long 0x00 "TIMER0_CC0_CCVB,CC Channel Buffer Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CCVB ,CC Channel Value Buffer"
|
|
else
|
|
rgroup.long (0x30+0x08)++0x07
|
|
line.long 0x00 "TIMER0_CC0_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CCVP ,CC Channel Value Peek"
|
|
line.long 0x04 "TIMER0_CC0_CCVB,CC Channel Buffer Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " CCVB ,CC Channel Value Buffer"
|
|
endif
|
|
tree.end
|
|
tree "Channel 1"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "TIMER0_CC1_CTRL,CC Channel Control Register"
|
|
sif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 28. " PRSCONF ,PRS Configuration" "PULSE,LEVEL"
|
|
endif
|
|
bitfld.long 0x00 26.--27. " ICEVCTRL ,Input Capture Event Control" "EVERYEDGE,EVERYSECONDEDGE,RISING,FALLING"
|
|
bitfld.long 0x00 24.--25. " ICEDGE ,Input Capture Edge Select" "RISING,FALLING,BOTH,NONE"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FILT ,Digital Filter" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " INSEL ,Input Selection" "PIN,PRS"
|
|
textline " "
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*"))
|
|
bitfld.long 0x00 16.--19. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,?..."
|
|
elif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 16.--17. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3"
|
|
else
|
|
bitfld.long 0x00 16.--18. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CUFOA ,Counter Underflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 10.--11. " COFOA ,Counter Overflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " CMOA ,Compare Match Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 4. " COIST ,Compare Output Initial State" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " OUTINV ,Output Invert" "Not inverted,Inverted"
|
|
bitfld.long 0x00 0.--1. " MODE ,CC Channel Mode" "OFF,INPUTCAPTURE,OUTPUTCOMPARE,PWM"
|
|
hgroup.long (0x40+0x04)++0x03
|
|
hide.long 0x00 "TIMER0_CC1_CCV,CC Channel Value Register"
|
|
in
|
|
sif (cpuis("EFM32WG*"))
|
|
rgroup.long (0x40+0x08)++0x03
|
|
line.long 0x00 "TIMER0_CC1_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CCVP ,CC Channel Value Peek"
|
|
group.long (0x40+0x0c)++0x03
|
|
line.long 0x00 "TIMER0_CC1_CCVB,CC Channel Buffer Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CCVB ,CC Channel Value Buffer"
|
|
else
|
|
rgroup.long (0x40+0x08)++0x07
|
|
line.long 0x00 "TIMER0_CC1_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CCVP ,CC Channel Value Peek"
|
|
line.long 0x04 "TIMER0_CC1_CCVB,CC Channel Buffer Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " CCVB ,CC Channel Value Buffer"
|
|
endif
|
|
tree.end
|
|
tree "Channel 2"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "TIMER0_CC2_CTRL,CC Channel Control Register"
|
|
sif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 28. " PRSCONF ,PRS Configuration" "PULSE,LEVEL"
|
|
endif
|
|
bitfld.long 0x00 26.--27. " ICEVCTRL ,Input Capture Event Control" "EVERYEDGE,EVERYSECONDEDGE,RISING,FALLING"
|
|
bitfld.long 0x00 24.--25. " ICEDGE ,Input Capture Edge Select" "RISING,FALLING,BOTH,NONE"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FILT ,Digital Filter" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " INSEL ,Input Selection" "PIN,PRS"
|
|
textline " "
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*"))
|
|
bitfld.long 0x00 16.--19. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,?..."
|
|
elif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 16.--17. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3"
|
|
else
|
|
bitfld.long 0x00 16.--18. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CUFOA ,Counter Underflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 10.--11. " COFOA ,Counter Overflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " CMOA ,Compare Match Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 4. " COIST ,Compare Output Initial State" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " OUTINV ,Output Invert" "Not inverted,Inverted"
|
|
bitfld.long 0x00 0.--1. " MODE ,CC Channel Mode" "OFF,INPUTCAPTURE,OUTPUTCOMPARE,PWM"
|
|
hgroup.long (0x50+0x04)++0x03
|
|
hide.long 0x00 "TIMER0_CC2_CCV,CC Channel Value Register"
|
|
in
|
|
sif (cpuis("EFM32WG*"))
|
|
rgroup.long (0x50+0x08)++0x03
|
|
line.long 0x00 "TIMER0_CC2_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CCVP ,CC Channel Value Peek"
|
|
group.long (0x50+0x0c)++0x03
|
|
line.long 0x00 "TIMER0_CC2_CCVB,CC Channel Buffer Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CCVB ,CC Channel Value Buffer"
|
|
else
|
|
rgroup.long (0x50+0x08)++0x07
|
|
line.long 0x00 "TIMER0_CC2_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CCVP ,CC Channel Value Peek"
|
|
line.long 0x04 "TIMER0_CC2_CCVB,CC Channel Buffer Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " CCVB ,CC Channel Value Buffer"
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
sif (!cpuis("EFM32TG*")&&!cpuis("EFM32ZG*"))
|
|
tree "DTI Registers"
|
|
group.long 0x70++0x1b
|
|
line.long 0x00 "TIMER0_DTCTRL,DTI Control Register"
|
|
bitfld.long 0x00 24. " DTPRSEN ,DTI PRS Source Enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*"))
|
|
bitfld.long 0x00 4.--7. " DTPRSSEL ,DTI PRS Source Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,?..."
|
|
else
|
|
bitfld.long 0x00 4.--6. " DTPRSSEL ,DTI PRS Source Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 3. " DTCINV ,DTI Complementary Output Invert" "Not inverted,Inverted"
|
|
bitfld.long 0x00 2. " DTIPOL ,DTI Inactive Polarity" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DTDAS ,DTI Automatic Start-up Functionality" "NORESTART,RESTART"
|
|
bitfld.long 0x00 0. " DTEN ,DTI Enable" "Disabled,Enabled"
|
|
line.long 0x04 "TIMER0DTTIME,DTI Time Control Register"
|
|
bitfld.long 0x04 16.--21. " DTFALLT ,DTI Fall-time" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
|
|
bitfld.long 0x04 8.--13. " DTRISET ,DTI Rise-time" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
|
|
textline " "
|
|
bitfld.long 0x04 0.--3. " DTPRESC ,DTI Prescaler Setting" "DIV1,DIV2,DIV4,DIV8,DIV16,DIV32,DIV64,DIV128,DIV256,DIV512,DIV1024,?..."
|
|
line.long 0x08 "TIMER0_DTFC,DTI Fault Configuration Register"
|
|
bitfld.long 0x08 27. " DTLOCKUPFEN ,DTI Lockup Fault Enable" "Disabled,LOCKUP"
|
|
bitfld.long 0x08 26. " DTDBGFEN ,DTI Debugger Fault Enable" "Disabled,DEBUG"
|
|
textline " "
|
|
sif (cpuis("EFM32WG*"))
|
|
bitfld.long 0x08 25. " DTPRS1FEN ,DTI PRS 1 Fault Enable" "Disabled,PRS1"
|
|
bitfld.long 0x08 24. " DTPRS0FEN ,DTI PRS 0 Fault Enable" "Disabled,PRS0"
|
|
else
|
|
bitfld.long 0x08 25. " DTFSEN1 , DTI Fault Source Enable" "Disabled,PRS1"
|
|
bitfld.long 0x08 24. " DTFSEN0 ,DTI Fault Source Enable" "Disabled,PRS0"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x08 16.--17. " DTFA ,DTI Fault Action" "NONE,INACTIVE,CLEAR,TRISTATE"
|
|
bitfld.long 0x08 8.--10. " DTPRSFSEL1 ,DTI PRS Fault Source 1 Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7"
|
|
textline " "
|
|
bitfld.long 0x08 0.--2. " DTPRSFSEL0 ,DTI PRS Fault Source 0 Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7"
|
|
line.long 0x0c "TIMER0_DTOGEN,DTI Output Generation Enable Register"
|
|
bitfld.long 0x0C 5. " DTOGCDTI2EN ,DTI CDTI2 Output Generation Enable" "Disabled,CDTI2"
|
|
bitfld.long 0x0C 4. " DTOGCDTI1EN ,DTI CDTI1 Output Generation Enable" "Disabled,CDTI1"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " DTOGCDTI0EN ,DTI CDTI0 Output Generation Enable" "Disabled,CDTI0"
|
|
sif (cpuis("EFM32WG*"))
|
|
bitfld.long 0x0C 2. " DTOGCC2EN ,DTI CC2 Output Generation Enable" "Disabled,CC2"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " DTOGCC1EN ,DTI CC1 Output Generation Enable" "Disabled,CC1"
|
|
bitfld.long 0x0C 0. " DTOGCC0EN ,DTI CC0 Output Generation Enable" "Disabled,CC0"
|
|
else
|
|
bitfld.long 0x0C 2. " DTOGEN2 ,DTI Output Generation Enable" "Disabled,CC2"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " DTOGEN1 ,DTI Output Generation Enable" "Disabled,CC1"
|
|
bitfld.long 0x0C 0. " DTOGEN0 ,DTI Output Generation Enable" "Disabled,CC0"
|
|
endif
|
|
sif (cpuis("EFM32WG*"))
|
|
rgroup.long 0x80++0x03
|
|
line.long 0x00 "TIMER0_DTFAULT,DTI Fault Register"
|
|
bitfld.long 0x00 3. " DTLOCKUPF ,DTI Lockup Fault" "Not occurred,LOCKUP"
|
|
bitfld.long 0x00 2. " DTDBGF ,DTI Debugger Fault" "Not occurred,DEBUG"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DTPRS1F ,DTI PRS 1 Fault" "Not occurred,PRS1"
|
|
bitfld.long 0x00 0. " DTPRS0F ,DTI PRS 1 Fault" "Not occurred,PRS0"
|
|
wgroup.long 0x84++0x03
|
|
line.long 0x00 "TIMER0_DTFAULTC,DTI Fault Clear Register"
|
|
bitfld.long 0x00 3. " TLOCKUPFC ,DTI Lockup Fault Clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " DTDBGFC ,DTI Debugger Fault Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DTPRS1FC ,DTI PRS1 Fault Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " DTPRS0FC ,DTI PRS0 Fault Clear" "No effect,Clear"
|
|
else
|
|
group.long 0x80++0x07
|
|
line.long 0x00 "TIMER0_DTFAULT,DTI Fault Register"
|
|
bitfld.long 0x00 3. " DTLOCKUPF ,DTI Lockup Fault" "Not occurred,LOCKUP"
|
|
bitfld.long 0x00 2. " DTDBGF ,DTI Debugger Fault" "Not occurred,DEBUG"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DTFS1 ,DTI Fault Source" "Not occurred,PRS1"
|
|
bitfld.long 0x00 0. " DTFS0 ,DTI Fault Source" "Not occurred,PRS0"
|
|
line.long 0x04 "TIMER0_DTFAULTC,DTI Fault Clear Register"
|
|
bitfld.long 0x04 3. " TLOCKUPFC ,DTI Lockup Fault Clear" "No effect,Clear"
|
|
bitfld.long 0x04 2. " DTDBGFC ,DTI Debugger Fault Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 1. " DTFSC1 ,DTI Fault Source Clear" "No effect,Clear"
|
|
bitfld.long 0x04 0. " DTFSC0 ,DTI Fault Source Clear" "No effect,Clear"
|
|
endif
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "TIMER0_DTLOCK,DTI Configuration Lock Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " LOCKKEY ,DTI Lock Key"
|
|
tree.end
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree "TIMER1"
|
|
base ad:0x40010400
|
|
width 17.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "TIMER1_CTRL,Control Register"
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 29. " RSSCOIST ,Reload-Start Sets Compare Ouptut initial State" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " ATI ,Always Track Inputs" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 24.--27. " PRESC ,Prescaler Setting" "DIV1,DIV2,DIV4,DIV8,DIV16,DIV32,DIV64,DIV128,DIV256,DIV512,DIV1024,?..."
|
|
bitfld.long 0x00 16.--17. " CLKSEL ,Clock Source Select" "PRESCHFPERCLK,CC1,TIMEROUF,?..."
|
|
textline " "
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 13. " X2CNT ,2x Count Mode" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 10.--11. " FALLA ,Timer Falling Input Edge Action" "NONE,START,STOP,RELOADSTART"
|
|
bitfld.long 0x00 8.--9. " RISEA ,Timer Rising Input Edge Action" "NONE,START,STOP,RELOADSTART"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DMACLRACT ,DMA Request Clear on Active" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " DEBUGRUN ,Debug Mode Run Enable" "Frozen,Running"
|
|
textline " "
|
|
bitfld.long 0x00 5. " QDM ,Quadrature Decoder Mode Selection" "X2,X4"
|
|
bitfld.long 0x00 4. " OSMEN ,One-shot Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SYNC ,Timer Start/Stop/Reload Synchronization" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " MODE ,Timer Mode" "UP,DOWN,UPDOWN,QDEC"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "TIMER1_CMD,Command Register"
|
|
bitfld.long 0x00 1. " STOP ,Stop Timer" "No effect,Stop"
|
|
bitfld.long 0x00 0. " START ,Start Timer" "No effect,Start"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "TIMER1_STATUS,Status Register"
|
|
bitfld.long 0x00 26. " CCPOL2 ,CC2 Polarity" "LOWRISE,HIGHFALL"
|
|
bitfld.long 0x00 25. " CCPOL1 ,CC1 Polarity" "LOWRISE,HIGHFALL"
|
|
textline " "
|
|
bitfld.long 0x00 24. " CCPOL0 ,CC0 Polarity" "LOWRISE,HIGHFALL"
|
|
bitfld.long 0x00 18. " ICV2 ,CC2 Input Capture Valid" "Not Valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 17. " ICV1 ,CC1 Input Capture Valid" "Not Valid,Valid"
|
|
bitfld.long 0x00 16. " ICV0 ,CC0 Input Capture Valid" "Not Valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CCVBV2 ,CC2 CCVB Valid" "Not Valid,Valid"
|
|
bitfld.long 0x00 9. " CCVBV1 ,CC1 CCVB Valid" "Not Valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CCVBV0 ,CC0 CCVB Valid" "Not Valid,Valid"
|
|
bitfld.long 0x00 2. " TOPBV ,TOPB Valid" "Not Valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DIR ,Direction" "UP,DOWN"
|
|
bitfld.long 0x00 0. " RUNNING ,Running" "Not running,Running"
|
|
group.long 0x0c++0x07
|
|
line.long 0x00 "TIMER1_IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 10. " ICBOF2 ,CC Channel 2 Input Capture Buffer Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " ICBOF1 ,CC Channel 1 Input Capture Buffer Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ICBOF0 ,CC Channel 0 Input Capture Buffer Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " CC2 ,CC Channel 2 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CC1 ,CC Channel 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CC0 ,CC Channel 0 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " UF ,Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " OF ,Overflow Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x04 "TIMER1_IF,Interrupt Flag Register"
|
|
setclrfld.long 0x04 10. 0x08 10. 0x0c 10. " ICBOF2_set/clr ,CC Channel 2 Input Capture Buffer Overflow Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 9. 0x08 9. 0x0c 9. " ICBOF1_set/clr ,CC Channel 1 Input Capture Buffer Overflow Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 8. 0x08 8. 0x0c 8. " ICBOF0_set/clr ,CC Channel 0 Input Capture Buffer Overflow Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 6. 0x08 6. 0x0c 6. " CC2_set/clr ,CC Channel 2 Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 5. 0x08 5. 0x0c 5. " CC1_set/clr ,CC Channel 1 Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 4. 0x08 4. 0x0c 4. " CC0_set/clr ,CC Channel 0 Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x08 1. 0x0c 1. " UF_set/clr ,Underflow Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 0. 0x08 0. 0x0c 0. " OF_set/clr ,Overflow Interrupt Flag" "No interrupt,Interrupt"
|
|
group.long 0x1c++0x0f
|
|
line.long 0x00 "TIMER1_TOP,Counter Top Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TOP ,Counter Top Value"
|
|
line.long 0x04 "TIMER1_TOPB,Counter Top Value Buffer Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " TOPB ,Counter Top Value Buffer"
|
|
line.long 0x08 "TIMER1_CNT,Counter Value Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " CNT ,Counter Value"
|
|
line.long 0x0c "TIMER1_ROUTE,I/O Routing Register"
|
|
sif (cpuis("EFM32LG*")||cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
bitfld.long 0x0C 16.--18. " LOCATION ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,?..."
|
|
else
|
|
bitfld.long 0x0C 16.--17. " LOCATION ,I/O Location" "LOC0,LOC1,LOC2,LOC3"
|
|
endif
|
|
sif (!cpuis("EFM32TG*"))
|
|
textline " "
|
|
bitfld.long 0x0c 10. " CDTIPEN2 ,CC Channel 2 Complementary Dead-Time Insertion Pin Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 9. " CDTIPEN1 ,CC Channel 1 Complementary Dead-Time Insertion Pin Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 8. " CDTIPEN0 ,CC Channel 0 Complementary Dead-Time Insertion Pin Enable" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x0c 2. " CCPEN2 ,CC Channel 2 Pin Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 1. " CCPEN1 ,CC Channel 1 Pin Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 0. " CCPEN0 ,CC Channel 0 Pin Enable" "Disabled,Enabled"
|
|
tree "Compare/Capture Channel Registers"
|
|
tree "Channel 0"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "TIMER1_CC0_CTRL,CC Channel Control Register"
|
|
sif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 28. " PRSCONF ,PRS Configuration" "PULSE,LEVEL"
|
|
endif
|
|
bitfld.long 0x00 26.--27. " ICEVCTRL ,Input Capture Event Control" "EVERYEDGE,EVERYSECONDEDGE,RISING,FALLING"
|
|
bitfld.long 0x00 24.--25. " ICEDGE ,Input Capture Edge Select" "RISING,FALLING,BOTH,NONE"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FILT ,Digital Filter" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " INSEL ,Input Selection" "PIN,PRS"
|
|
textline " "
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*"))
|
|
bitfld.long 0x00 16.--19. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,?..."
|
|
elif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 16.--17. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3"
|
|
else
|
|
bitfld.long 0x00 16.--18. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CUFOA ,Counter Underflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 10.--11. " COFOA ,Counter Overflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " CMOA ,Compare Match Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 4. " COIST ,Compare Output Initial State" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " OUTINV ,Output Invert" "Not inverted,Inverted"
|
|
bitfld.long 0x00 0.--1. " MODE ,CC Channel Mode" "OFF,INPUTCAPTURE,OUTPUTCOMPARE,PWM"
|
|
hgroup.long (0x30+0x04)++0x03
|
|
hide.long 0x00 "TIMER1_CC0_CCV,CC Channel Value Register"
|
|
in
|
|
sif (cpuis("EFM32WG*"))
|
|
rgroup.long (0x30+0x08)++0x03
|
|
line.long 0x00 "TIMER1_CC0_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CCVP ,CC Channel Value Peek"
|
|
group.long (0x30+0x0c)++0x03
|
|
line.long 0x00 "TIMER1_CC0_CCVB,CC Channel Buffer Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CCVB ,CC Channel Value Buffer"
|
|
else
|
|
rgroup.long (0x30+0x08)++0x07
|
|
line.long 0x00 "TIMER1_CC0_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CCVP ,CC Channel Value Peek"
|
|
line.long 0x04 "TIMER1_CC0_CCVB,CC Channel Buffer Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " CCVB ,CC Channel Value Buffer"
|
|
endif
|
|
tree.end
|
|
tree "Channel 1"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "TIMER1_CC1_CTRL,CC Channel Control Register"
|
|
sif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 28. " PRSCONF ,PRS Configuration" "PULSE,LEVEL"
|
|
endif
|
|
bitfld.long 0x00 26.--27. " ICEVCTRL ,Input Capture Event Control" "EVERYEDGE,EVERYSECONDEDGE,RISING,FALLING"
|
|
bitfld.long 0x00 24.--25. " ICEDGE ,Input Capture Edge Select" "RISING,FALLING,BOTH,NONE"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FILT ,Digital Filter" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " INSEL ,Input Selection" "PIN,PRS"
|
|
textline " "
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*"))
|
|
bitfld.long 0x00 16.--19. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,?..."
|
|
elif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 16.--17. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3"
|
|
else
|
|
bitfld.long 0x00 16.--18. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CUFOA ,Counter Underflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 10.--11. " COFOA ,Counter Overflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " CMOA ,Compare Match Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 4. " COIST ,Compare Output Initial State" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " OUTINV ,Output Invert" "Not inverted,Inverted"
|
|
bitfld.long 0x00 0.--1. " MODE ,CC Channel Mode" "OFF,INPUTCAPTURE,OUTPUTCOMPARE,PWM"
|
|
hgroup.long (0x40+0x04)++0x03
|
|
hide.long 0x00 "TIMER1_CC1_CCV,CC Channel Value Register"
|
|
in
|
|
sif (cpuis("EFM32WG*"))
|
|
rgroup.long (0x40+0x08)++0x03
|
|
line.long 0x00 "TIMER1_CC1_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CCVP ,CC Channel Value Peek"
|
|
group.long (0x40+0x0c)++0x03
|
|
line.long 0x00 "TIMER1_CC1_CCVB,CC Channel Buffer Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CCVB ,CC Channel Value Buffer"
|
|
else
|
|
rgroup.long (0x40+0x08)++0x07
|
|
line.long 0x00 "TIMER1_CC1_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CCVP ,CC Channel Value Peek"
|
|
line.long 0x04 "TIMER1_CC1_CCVB,CC Channel Buffer Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " CCVB ,CC Channel Value Buffer"
|
|
endif
|
|
tree.end
|
|
tree "Channel 2"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "TIMER1_CC2_CTRL,CC Channel Control Register"
|
|
sif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 28. " PRSCONF ,PRS Configuration" "PULSE,LEVEL"
|
|
endif
|
|
bitfld.long 0x00 26.--27. " ICEVCTRL ,Input Capture Event Control" "EVERYEDGE,EVERYSECONDEDGE,RISING,FALLING"
|
|
bitfld.long 0x00 24.--25. " ICEDGE ,Input Capture Edge Select" "RISING,FALLING,BOTH,NONE"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FILT ,Digital Filter" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " INSEL ,Input Selection" "PIN,PRS"
|
|
textline " "
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*"))
|
|
bitfld.long 0x00 16.--19. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,?..."
|
|
elif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 16.--17. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3"
|
|
else
|
|
bitfld.long 0x00 16.--18. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CUFOA ,Counter Underflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 10.--11. " COFOA ,Counter Overflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " CMOA ,Compare Match Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 4. " COIST ,Compare Output Initial State" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " OUTINV ,Output Invert" "Not inverted,Inverted"
|
|
bitfld.long 0x00 0.--1. " MODE ,CC Channel Mode" "OFF,INPUTCAPTURE,OUTPUTCOMPARE,PWM"
|
|
hgroup.long (0x50+0x04)++0x03
|
|
hide.long 0x00 "TIMER1_CC2_CCV,CC Channel Value Register"
|
|
in
|
|
sif (cpuis("EFM32WG*"))
|
|
rgroup.long (0x50+0x08)++0x03
|
|
line.long 0x00 "TIMER1_CC2_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CCVP ,CC Channel Value Peek"
|
|
group.long (0x50+0x0c)++0x03
|
|
line.long 0x00 "TIMER1_CC2_CCVB,CC Channel Buffer Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CCVB ,CC Channel Value Buffer"
|
|
else
|
|
rgroup.long (0x50+0x08)++0x07
|
|
line.long 0x00 "TIMER1_CC2_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CCVP ,CC Channel Value Peek"
|
|
line.long 0x04 "TIMER1_CC2_CCVB,CC Channel Buffer Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " CCVB ,CC Channel Value Buffer"
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree "TIMER2"
|
|
base ad:0x40010800
|
|
width 17.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "TIMER2_CTRL,Control Register"
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 29. " RSSCOIST ,Reload-Start Sets Compare Ouptut initial State" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " ATI ,Always Track Inputs" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 24.--27. " PRESC ,Prescaler Setting" "DIV1,DIV2,DIV4,DIV8,DIV16,DIV32,DIV64,DIV128,DIV256,DIV512,DIV1024,?..."
|
|
bitfld.long 0x00 16.--17. " CLKSEL ,Clock Source Select" "PRESCHFPERCLK,CC1,TIMEROUF,?..."
|
|
textline " "
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 13. " X2CNT ,2x Count Mode" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 10.--11. " FALLA ,Timer Falling Input Edge Action" "NONE,START,STOP,RELOADSTART"
|
|
bitfld.long 0x00 8.--9. " RISEA ,Timer Rising Input Edge Action" "NONE,START,STOP,RELOADSTART"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DMACLRACT ,DMA Request Clear on Active" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " DEBUGRUN ,Debug Mode Run Enable" "Frozen,Running"
|
|
textline " "
|
|
bitfld.long 0x00 5. " QDM ,Quadrature Decoder Mode Selection" "X2,X4"
|
|
bitfld.long 0x00 4. " OSMEN ,One-shot Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SYNC ,Timer Start/Stop/Reload Synchronization" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " MODE ,Timer Mode" "UP,DOWN,UPDOWN,QDEC"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "TIMER2_CMD,Command Register"
|
|
bitfld.long 0x00 1. " STOP ,Stop Timer" "No effect,Stop"
|
|
bitfld.long 0x00 0. " START ,Start Timer" "No effect,Start"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "TIMER2_STATUS,Status Register"
|
|
bitfld.long 0x00 26. " CCPOL2 ,CC2 Polarity" "LOWRISE,HIGHFALL"
|
|
bitfld.long 0x00 25. " CCPOL1 ,CC1 Polarity" "LOWRISE,HIGHFALL"
|
|
textline " "
|
|
bitfld.long 0x00 24. " CCPOL0 ,CC0 Polarity" "LOWRISE,HIGHFALL"
|
|
bitfld.long 0x00 18. " ICV2 ,CC2 Input Capture Valid" "Not Valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 17. " ICV1 ,CC1 Input Capture Valid" "Not Valid,Valid"
|
|
bitfld.long 0x00 16. " ICV0 ,CC0 Input Capture Valid" "Not Valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CCVBV2 ,CC2 CCVB Valid" "Not Valid,Valid"
|
|
bitfld.long 0x00 9. " CCVBV1 ,CC1 CCVB Valid" "Not Valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CCVBV0 ,CC0 CCVB Valid" "Not Valid,Valid"
|
|
bitfld.long 0x00 2. " TOPBV ,TOPB Valid" "Not Valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DIR ,Direction" "UP,DOWN"
|
|
bitfld.long 0x00 0. " RUNNING ,Running" "Not running,Running"
|
|
group.long 0x0c++0x07
|
|
line.long 0x00 "TIMER2_IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 10. " ICBOF2 ,CC Channel 2 Input Capture Buffer Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " ICBOF1 ,CC Channel 1 Input Capture Buffer Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ICBOF0 ,CC Channel 0 Input Capture Buffer Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " CC2 ,CC Channel 2 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CC1 ,CC Channel 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CC0 ,CC Channel 0 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " UF ,Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " OF ,Overflow Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x04 "TIMER2_IF,Interrupt Flag Register"
|
|
setclrfld.long 0x04 10. 0x08 10. 0x0c 10. " ICBOF2_set/clr ,CC Channel 2 Input Capture Buffer Overflow Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 9. 0x08 9. 0x0c 9. " ICBOF1_set/clr ,CC Channel 1 Input Capture Buffer Overflow Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 8. 0x08 8. 0x0c 8. " ICBOF0_set/clr ,CC Channel 0 Input Capture Buffer Overflow Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 6. 0x08 6. 0x0c 6. " CC2_set/clr ,CC Channel 2 Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 5. 0x08 5. 0x0c 5. " CC1_set/clr ,CC Channel 1 Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 4. 0x08 4. 0x0c 4. " CC0_set/clr ,CC Channel 0 Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x08 1. 0x0c 1. " UF_set/clr ,Underflow Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 0. 0x08 0. 0x0c 0. " OF_set/clr ,Overflow Interrupt Flag" "No interrupt,Interrupt"
|
|
group.long 0x1c++0x0f
|
|
line.long 0x00 "TIMER2_TOP,Counter Top Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TOP ,Counter Top Value"
|
|
line.long 0x04 "TIMER2_TOPB,Counter Top Value Buffer Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " TOPB ,Counter Top Value Buffer"
|
|
line.long 0x08 "TIMER2_CNT,Counter Value Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " CNT ,Counter Value"
|
|
line.long 0x0c "TIMER2_ROUTE,I/O Routing Register"
|
|
sif (cpuis("EFM32LG*")||cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
bitfld.long 0x0C 16.--18. " LOCATION ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,?..."
|
|
else
|
|
bitfld.long 0x0C 16.--17. " LOCATION ,I/O Location" "LOC0,LOC1,LOC2,LOC3"
|
|
endif
|
|
sif (!cpuis("EFM32TG*"))
|
|
textline " "
|
|
bitfld.long 0x0c 10. " CDTIPEN2 ,CC Channel 2 Complementary Dead-Time Insertion Pin Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 9. " CDTIPEN1 ,CC Channel 1 Complementary Dead-Time Insertion Pin Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 8. " CDTIPEN0 ,CC Channel 0 Complementary Dead-Time Insertion Pin Enable" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x0c 2. " CCPEN2 ,CC Channel 2 Pin Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 1. " CCPEN1 ,CC Channel 1 Pin Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 0. " CCPEN0 ,CC Channel 0 Pin Enable" "Disabled,Enabled"
|
|
tree "Compare/Capture Channel Registers"
|
|
tree "Channel 0"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "TIMER2_CC0_CTRL,CC Channel Control Register"
|
|
sif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 28. " PRSCONF ,PRS Configuration" "PULSE,LEVEL"
|
|
endif
|
|
bitfld.long 0x00 26.--27. " ICEVCTRL ,Input Capture Event Control" "EVERYEDGE,EVERYSECONDEDGE,RISING,FALLING"
|
|
bitfld.long 0x00 24.--25. " ICEDGE ,Input Capture Edge Select" "RISING,FALLING,BOTH,NONE"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FILT ,Digital Filter" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " INSEL ,Input Selection" "PIN,PRS"
|
|
textline " "
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*"))
|
|
bitfld.long 0x00 16.--19. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,?..."
|
|
elif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 16.--17. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3"
|
|
else
|
|
bitfld.long 0x00 16.--18. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CUFOA ,Counter Underflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 10.--11. " COFOA ,Counter Overflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " CMOA ,Compare Match Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 4. " COIST ,Compare Output Initial State" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " OUTINV ,Output Invert" "Not inverted,Inverted"
|
|
bitfld.long 0x00 0.--1. " MODE ,CC Channel Mode" "OFF,INPUTCAPTURE,OUTPUTCOMPARE,PWM"
|
|
hgroup.long (0x30+0x04)++0x03
|
|
hide.long 0x00 "TIMER2_CC0_CCV,CC Channel Value Register"
|
|
in
|
|
sif (cpuis("EFM32WG*"))
|
|
rgroup.long (0x30+0x08)++0x03
|
|
line.long 0x00 "TIMER2_CC0_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CCVP ,CC Channel Value Peek"
|
|
group.long (0x30+0x0c)++0x03
|
|
line.long 0x00 "TIMER2_CC0_CCVB,CC Channel Buffer Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CCVB ,CC Channel Value Buffer"
|
|
else
|
|
rgroup.long (0x30+0x08)++0x07
|
|
line.long 0x00 "TIMER2_CC0_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CCVP ,CC Channel Value Peek"
|
|
line.long 0x04 "TIMER2_CC0_CCVB,CC Channel Buffer Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " CCVB ,CC Channel Value Buffer"
|
|
endif
|
|
tree.end
|
|
tree "Channel 1"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "TIMER2_CC1_CTRL,CC Channel Control Register"
|
|
sif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 28. " PRSCONF ,PRS Configuration" "PULSE,LEVEL"
|
|
endif
|
|
bitfld.long 0x00 26.--27. " ICEVCTRL ,Input Capture Event Control" "EVERYEDGE,EVERYSECONDEDGE,RISING,FALLING"
|
|
bitfld.long 0x00 24.--25. " ICEDGE ,Input Capture Edge Select" "RISING,FALLING,BOTH,NONE"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FILT ,Digital Filter" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " INSEL ,Input Selection" "PIN,PRS"
|
|
textline " "
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*"))
|
|
bitfld.long 0x00 16.--19. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,?..."
|
|
elif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 16.--17. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3"
|
|
else
|
|
bitfld.long 0x00 16.--18. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CUFOA ,Counter Underflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 10.--11. " COFOA ,Counter Overflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " CMOA ,Compare Match Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 4. " COIST ,Compare Output Initial State" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " OUTINV ,Output Invert" "Not inverted,Inverted"
|
|
bitfld.long 0x00 0.--1. " MODE ,CC Channel Mode" "OFF,INPUTCAPTURE,OUTPUTCOMPARE,PWM"
|
|
hgroup.long (0x40+0x04)++0x03
|
|
hide.long 0x00 "TIMER2_CC1_CCV,CC Channel Value Register"
|
|
in
|
|
sif (cpuis("EFM32WG*"))
|
|
rgroup.long (0x40+0x08)++0x03
|
|
line.long 0x00 "TIMER2_CC1_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CCVP ,CC Channel Value Peek"
|
|
group.long (0x40+0x0c)++0x03
|
|
line.long 0x00 "TIMER2_CC1_CCVB,CC Channel Buffer Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CCVB ,CC Channel Value Buffer"
|
|
else
|
|
rgroup.long (0x40+0x08)++0x07
|
|
line.long 0x00 "TIMER2_CC1_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CCVP ,CC Channel Value Peek"
|
|
line.long 0x04 "TIMER2_CC1_CCVB,CC Channel Buffer Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " CCVB ,CC Channel Value Buffer"
|
|
endif
|
|
tree.end
|
|
tree "Channel 2"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "TIMER2_CC2_CTRL,CC Channel Control Register"
|
|
sif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 28. " PRSCONF ,PRS Configuration" "PULSE,LEVEL"
|
|
endif
|
|
bitfld.long 0x00 26.--27. " ICEVCTRL ,Input Capture Event Control" "EVERYEDGE,EVERYSECONDEDGE,RISING,FALLING"
|
|
bitfld.long 0x00 24.--25. " ICEDGE ,Input Capture Edge Select" "RISING,FALLING,BOTH,NONE"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FILT ,Digital Filter" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " INSEL ,Input Selection" "PIN,PRS"
|
|
textline " "
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*"))
|
|
bitfld.long 0x00 16.--19. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,?..."
|
|
elif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 16.--17. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3"
|
|
else
|
|
bitfld.long 0x00 16.--18. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CUFOA ,Counter Underflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 10.--11. " COFOA ,Counter Overflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " CMOA ,Compare Match Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 4. " COIST ,Compare Output Initial State" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " OUTINV ,Output Invert" "Not inverted,Inverted"
|
|
bitfld.long 0x00 0.--1. " MODE ,CC Channel Mode" "OFF,INPUTCAPTURE,OUTPUTCOMPARE,PWM"
|
|
hgroup.long (0x50+0x04)++0x03
|
|
hide.long 0x00 "TIMER2_CC2_CCV,CC Channel Value Register"
|
|
in
|
|
sif (cpuis("EFM32WG*"))
|
|
rgroup.long (0x50+0x08)++0x03
|
|
line.long 0x00 "TIMER2_CC2_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CCVP ,CC Channel Value Peek"
|
|
group.long (0x50+0x0c)++0x03
|
|
line.long 0x00 "TIMER2_CC2_CCVB,CC Channel Buffer Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CCVB ,CC Channel Value Buffer"
|
|
else
|
|
rgroup.long (0x50+0x08)++0x07
|
|
line.long 0x00 "TIMER2_CC2_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CCVP ,CC Channel Value Peek"
|
|
line.long 0x04 "TIMER2_CC2_CCVB,CC Channel Buffer Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " CCVB ,CC Channel Value Buffer"
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "RTC (Real Time Counter)"
|
|
base ad:0x40080000
|
|
width 14.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "RTC_CTRL,Control Register"
|
|
bitfld.long 0x00 2. " COMP0TOP ,Compare Channel 0 is Top Value" "DISABLE,ENABLE"
|
|
bitfld.long 0x00 1. " DEBUGRUN ,Debug Mode Run Enable" "Frozen,Running"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,RTC Enable" "Disabled,Enabled"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "RTC_CNT,Counter Value Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CNT ,Counter Value"
|
|
group.long 0x08++0x0b
|
|
line.long 0x00 "RTC_COMP0,Compare Value Register 0"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " COMP0 ,Compare Value 0"
|
|
line.long 0x04 "RTC_COMP1,Compare Value Register 1"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " COMP1 ,Compare Value 1"
|
|
line.long 0x08 "RTC_IF,Interrupt Flag Register"
|
|
setclrfld.long 0x08 2. 0x0c 2. 0x10 2. " COMP1_set/clr ,Compare Match 1 Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x08 1. 0x0c 1. 0x10 1. " COMP0_set/clr ,Compare Match 0 Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x08 0. 0x0c 0. 0x10 0. " OF_set/clr ,Overflow Interrupt Flag" "No interrupt,Interrupt"
|
|
group.long 0x1c++07
|
|
line.long 0x00 "RTC_IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 2. " COMP1 ,Clear Compare Match 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " COMP0 ,Clear Compare Match 0 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " OF ,Clear Overflow Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x04 "RTC_FREEZE,Freeze Register"
|
|
bitfld.long 0x04 0. " REGFREEZE ,Register Update Freeze" "UPDATE,FREEZE"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "RTC_SYNCBUSY,Synchronization Busy Register"
|
|
bitfld.long 0x00 2. " COMP1 ,RTC_COMP1 Register Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 1. " COMP0 ,RTC_COMP0 Register Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTRL ,RTC_CTRL Register Busy" "Not busy,Busy"
|
|
width 0xb
|
|
tree.end
|
|
tree "PCNT (Pulse Counter)"
|
|
base ad:0x40086000
|
|
width 16.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PCNT0_CTRL,Control Register"
|
|
sif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 29.--30. " TCCPRSSEL ,TCC PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3"
|
|
bitfld.long 0x00 28. " TCCPRSPOL ,TCC PRS polarity select" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PRSGATEEN ,PRS gate enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25.--26. " TCCCOMP ,Triggered compare and clear compare mode" "LTOE,GTOE,RANGE,?..."
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " TCCPRESC ,Set the LFA prescaler for triggered compare and clear" "DIV1,DIV2,DIV4,DIV8"
|
|
bitfld.long 0x00 18.--19. " TCCMODE ,Sets the mode for triggered compare and clear" "Disabled,LFA,PRS,?..."
|
|
textline " "
|
|
endif
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 14.--15. " AUXCNTEV ,Controls when the auxillary counter counts" "NONE,UP,DOWN,BOTH"
|
|
bitfld.long 0x00 10.--11. " CNTEV ,Controls when the counter counts" "BOTH,UP,DOWN,NONE"
|
|
textline " "
|
|
bitfld.long 0x00 9. " S1CDIR ,Count direction determined by S1" "Opposite,CNTDIR"
|
|
bitfld.long 0x00 8. " HYST ,Enable Hysteresis" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 6. " AUXCNTRSTEN ,Enable AUXCNT Reset" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 5. " RSTEN ,Enable PCNT Clock Domain Reset" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " FILT ,Enable Digital Pulse Width Filter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EDGE ,Edge Select" "POS,NEG"
|
|
bitfld.long 0x00 2. " CNTDIR ,Non-Quadrature Mode Counter Direction Control" "UP,DOWN"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode Select" "DISABLE,OVSSINGLE,EXTCLKSINGLE,EXTCLKQUAD"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "PCNT0_CMD,Command Register"
|
|
bitfld.long 0x00 1. " LTOPBIM ,Load TOPB Immediately" "No effect,Load"
|
|
bitfld.long 0x00 0. " LCNTIM ,Load CNT Immediately" "No effect,Load"
|
|
rgroup.long 0x08++0x0b
|
|
line.long 0x00 "PCNT0_STATUS,Status Register"
|
|
bitfld.long 0x00 0. " DIR ,Current Counter Direction" "UP,DOWN"
|
|
line.long 0x04 "PCNT0_CNT,Counter Value Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " CNT ,Counter Value"
|
|
line.long 0x08 "PCNT0_TOP,Top Value Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " TOP ,Counter Top Value"
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "PCNT0_TOPB,Top Value Buffer Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TOPB ,Counter Top Buffer"
|
|
line.long 0x04 "PCNT0_IF,Interrupt Flag Register"
|
|
sif (cpuis("EFM32ZG*"))
|
|
setclrfld.long 0x04 4. 0x08 4. 0x0c 4. " TCC_set/clr ,Triggered Compare Interrupt Read Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
endif
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
setclrfld.long 0x04 3. 0x08 3. 0x0c 3. " AUXOF_set/clr ,Direction Change Detect Interrupt Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x04 2. 0x08 2. 0x0c 2. " DIRCNG_set/clr ,Overflow Interrupt Read Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 1. 0x08 1. 0x0c 1. " OF_set/clr ,Overflow Interrupt Read Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 0. 0x08 0. 0x0c 0. " UF_set/clr ,Underflow Interrupt Read Flag" "No interrupt,Interrupt"
|
|
group.long 0x24++0x0b
|
|
line.long 0x00 "PCNT0_IEN,Interrupt Enable Register"
|
|
sif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 4. " TCC ,Triggered compare Interrupt Read Flag" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 3. " AUXOF ,Auxillary Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 2. " DIRCNG ,Direction Change Detect Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " OF ,Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " UF ,Underflow Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x04 "PCNT0_ROUTE,I/O Routing Register"
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
bitfld.long 0x04 8.--10. " LOCATION ,I/O Location" "LOC0,LOC1,LOC2,LOC3,?..."
|
|
else
|
|
bitfld.long 0x04 8.--9. " LOCATION ,I/O Location" "LOC0,LOC1,LOC2,?..."
|
|
endif
|
|
line.long 0x08 "PCNT0_FREEZE,Freeze Register"
|
|
bitfld.long 0x08 0. " REGFREEZE ,Register Update Freeze" "UPDATE,FREEZE"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "PCNT0_SYNCBUSY,Synchronization Busy Register"
|
|
bitfld.long 0x00 2. " TOPB ,TOPB Register Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 1. " CMD ,CMD Register Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTRL ,CTRL Register Busy" "Not busy,Busy"
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
group.long 0x38++0x07
|
|
line.long 0x00 "PCNT0_AUXCNT,Auxillary Counter Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " AUXCNT ,Auxillary Counter Value"
|
|
line.long 0x04 "PCNT0_INPUT,PCNT Input Register"
|
|
bitfld.long 0x04 10. " S1PRSEN ,S1IN PRS Enable" "Disabled,Enabled"
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*"))
|
|
bitfld.long 0x04 6.--9. " S1PRSSEL ,S1IN PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,?..."
|
|
textline " "
|
|
elif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x04 6.--7. " S1PRSSEL ,S1IN PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x04 6.--8. " S1PRSSEL ,S1IN PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x04 4. " S0PRSEN ,S0IN PRS Enable" "Disabled,Enabled"
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*"))
|
|
bitfld.long 0x04 0.--3. " S0PRSSEL ,S0IN PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,?..."
|
|
textline " "
|
|
elif (cpuis("EFM32ZG*"))
|
|
bitfld.long 0x04 0.--1. " S0PRSSEL ,S0IN PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x04 0.--2. " S0PRSSEL ,S0IN PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7"
|
|
textline " "
|
|
endif
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree "ACMP (Analog Comparator)"
|
|
base ad:0x40001000
|
|
width 17.
|
|
if (((per.l(ad:0x40001000))&0xC0000000)==0xC0000000)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " FULLBIAS ,Full bias current" "Not full,Full"
|
|
bitfld.long 0x00 30. " HALFBIAS ,Half bias current" "Not half,Half"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BIASPROG ,Bias configuration" "3.3,6.5,13,20,26,33,39,46,65,72,78,85,91,98,104,111"
|
|
bitfld.long 0x00 17. " IFALL ,Falling edge interrupt sense" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRISE ,Rising edge interrupt sense" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--10. " WARMTIME ,Warm-up time" "4CYCLES,8CYCLES,16CYCLES,32CYCLES,64CYCLES,128CYCLES,256CYCLES,512CYCLES"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " HYSTSEL ,Hysteresis select" "HYST0,HYST1,HYST2,HYST3,HYST4,HYST5,HYST6,HYST7"
|
|
bitfld.long 0x00 3. " GPIOINV ,Comparator GPIO output invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 2. " INACTVAL ,Inactive value" "LOW,HIGH"
|
|
bitfld.long 0x00 1. " MUXEN ,Input mux enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Analog comparator enable" "Disabled,Enabled"
|
|
elif (((per.l(ad:0x40001000))&0xC0000000)==0x80000000)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " FULLBIAS ,Full bias current" "Not full,Full"
|
|
bitfld.long 0x00 30. " HALFBIAS ,Half bias current" "Not half,Half"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BIASPROG ,Bias configuration" "6.5,13,26,39,52,65,78,91,130,143,156,169,182,195,208,221"
|
|
bitfld.long 0x00 17. " IFALL ,Falling edge interrupt sense" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRISE ,Rising edge interrupt sense" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--10. " WARMTIME ,Warm-up time" "4CYCLES,8CYCLES,16CYCLES,32CYCLES,64CYCLES,128CYCLES,256CYCLES,512CYCLES"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " HYSTSEL ,Hysteresis select" "HYST0,HYST1,HYST2,HYST3,HYST4,HYST5,HYST6,HYST7"
|
|
bitfld.long 0x00 3. " GPIOINV ,Comparator GPIO output invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 2. " INACTVAL ,Inactive value" "Low,High"
|
|
bitfld.long 0x00 1. " MUXEN ,Input mux enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Analog comparator enable" "Disabled,Enabled"
|
|
elif (((per.l(ad:0x40001000))&0xC0000000)==0x40000000)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " FULLBIAS ,Full bias current" "Not full,Full"
|
|
bitfld.long 0x00 30. " HALFBIAS ,Half bias current" "Not half,Half"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BIASPROG ,Bias configuration" "0.05,0.1,0.2,0.3,0.4,0.5,0.6,0.7,1.0,1.1,1.2,1.3,1.4,1.5,1.6,1.7"
|
|
bitfld.long 0x00 17. " IFALL ,Falling edge interrupt sense" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRISE ,Rising edge interrupt sense" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--10. " WARMTIME ,Warm-up time" "4CYCLES,8CYCLES,16CYCLES,32CYCLES,64CYCLES,128CYCLES,256CYCLES,512CYCLES"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " HYSTSEL ,Hysteresis select" "HYST0,HYST1,HYST2,HYST3,HYST4,HYST5,HYST6,HYST7"
|
|
bitfld.long 0x00 3. " GPIOINV ,Comparator GPIO output invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 2. " INACTVAL ,Inactive value" "LOW,HIGH"
|
|
bitfld.long 0x00 1. " MUXEN ,Input mux enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Analog comparator enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " FULLBIAS ,Full bias current" "Not full,Full"
|
|
bitfld.long 0x00 30. " HALFBIAS ,Half bias current" "Not half,Half"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " BIASPROG ,Bias configuration" "0.1,0.2,0.4,0.6,0.8,1.0,1.2,1.4,2.0,2.2,2.4,2.6,2.8,3.0,3.2,3.4"
|
|
bitfld.long 0x00 17. " IFALL ,Falling edge interrupt sense" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRISE ,Rising edge interrupt sense" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--10. " WARMTIME ,Warm-up time" "4CYCLES,8CYCLES,16CYCLES,32CYCLES,64CYCLES,128CYCLES,256CYCLES,512CYCLES"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " HYSTSEL ,Hysteresis select" "HYST0,HYST1,HYST2,HYST3,HYST4,HYST5,HYST6,HYST7"
|
|
bitfld.long 0x00 3. " GPIOINV ,Comparator GPIO output invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 2. " INACTVAL ,Inactive value" "Low,High"
|
|
bitfld.long 0x00 1. " MUXEN ,Input mux enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Analog comparator enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "INPUTSEL,Input Selection Register"
|
|
bitfld.long 0x00 28.--29. " CSRESSEL ,Capacitive sense mode internal resistor select" "RES0,RES1,RES2,RES3"
|
|
bitfld.long 0x00 24. " CSRESEN ,Capacitive sense mode internal resistor enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " LPREF ,Low power reference mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--13. " VDDLEVEL ,VDD reference level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
sif (cpuis("EFM32HG222F")||cpuis("EFM32HG321F"))
|
|
bitfld.long 0x00 4.--7. " NEGSEL ,Negative input select" "NEGPIN0,NEGPIN1,NEGPIN2,NEGPIN3,NEGPIN4,,,,NEG1V25,NEG2V5,NEGVDD,CAPSENSE,?..."
|
|
bitfld.long 0x00 0.--2. " POSSEL ,Positive input select" "POSPIN0,POSPIN1,POSPIN2,POSPIN3,POSPIN4,?..."
|
|
elif (cpuis("EFM32HG110F")||cpuis("EFM32HG310F")||cpuis("EFM32HG350F"))
|
|
bitfld.long 0x00 4.--7. " NEGSEL ,Negative input select" "NEGPIN0,NEGPIN1,,,,NEGPIN5,NEGPIN6,NEGPIN7,NEG1V25,NEG2V5,NEGVDD,CAPSENSE,?..."
|
|
bitfld.long 0x00 0.--2. " POSSEL ,Positive input select" "POSPIN0,POSPIN1,,,,POSPIN5,POSPIN6,POSPIN7"
|
|
elif (cpuis("EFM32HG210F"))
|
|
bitfld.long 0x00 4.--7. " NEGSEL ,Negative input select" "NEGPIN0,NEGPIN1,,,,NEGPIN5,NEGPIN6,NEGPIN7,NEG1V25,NEG2V5,NEGVDD,CAPSENSE,?..."
|
|
bitfld.long 0x00 0.--2. " POSSEL ,Positive input select" "POSPIN0,POSPIN1,,,,POSPIN5,POSPIN6,POSPIN7"
|
|
elif (cpuis("EFM32HG308F")||cpuis("EFM32HG309F")||cpuis("EFM32HG108F"))
|
|
bitfld.long 0x00 4.--7. " NEGSEL ,Negative input select" "NEGPIN0,NEGPIN1,,,,,,,NEG1V25,NEG2V5,NEGVDD,CAPSENSE,?..."
|
|
bitfld.long 0x00 0.--2. " POSSEL ,Positive input select" "POSPIN0,POSPIN1,?..."
|
|
endif
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 1. " ACMPOUT ,Analog comparator output" "0,1"
|
|
bitfld.long 0x00 0. " ACMPACT ,Analog comparator active" "Inactive,Active"
|
|
group.long 0x0C++0x07
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 1. " WARMUP ,Warm-up interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EDGE ,Edge trigger interrupt enable" "Disabled,Enabled"
|
|
line.long 0x04 "IF,Interrupt Flag Register"
|
|
setclrfld.long 0x04 1. 0x08 1. 0x0C 1. " WARMUP_SET/CLR ,Warm-up interrupt flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 0. 0x08 0. 0x0C 0. " EDGE_SET/CLR ,Edge triggered interrupt flag" "No interrupt,Interrupt"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "ROUTE,I/O Routing Register"
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 8.--9. " LOCATION ,I/O location" "LOC0,LOC1,LOC2,?..."
|
|
else
|
|
bitfld.long 0x00 8.--9. " LOCATION ,I/O location" "LOC0,LOC1,LOC2,LOC3"
|
|
endif
|
|
bitfld.long 0x00 0. " ACMPPEN ,ACMP output pin enable" "Disabled,Enabled"
|
|
width 0x0B
|
|
tree.end
|
|
tree "VCMP (Voltage Comparator)"
|
|
base ad:0x40000000
|
|
width 15.
|
|
if (((d.l(ad:0x40000000))&0x40000000)==0x40000000)
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "VCMP_CTRL,Control Register"
|
|
bitfld.long 0x00 30. " HALFBIAS ,Half Bias Current" "0,1"
|
|
bitfld.long 0x00 24.--27. " BIASPROG ,VCMP Bias Programming Value" "0.05,0.1,0.2,0.3,0.4,0.5,0.6,0.7,1.0,1.1,1.2,1.3,1.4,1.5,1.6,1.7"
|
|
textline " "
|
|
bitfld.long 0x00 17. " IFALL ,Falling Edge Interrupt Sense" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " IRISE ,Rising Edge Interrupt Sense" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " WARMTIME ,Warm-Up Time" "4CYCLES,8CYCLES,16CYCLES,32CYCLES,64CYCLES,128CYCLES,256CYCLES,512CYCLES"
|
|
bitfld.long 0x00 4. " HYSTEN ,Hysteresis Enable" "Disabled,+-20mV"
|
|
textline " "
|
|
bitfld.long 0x00 2. " INACTVAL ,Inactive Value" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EN ,Voltage Supply Comparator Enable" "Disabled,Enabled"
|
|
sif (cpuis("EFM32G*")||cpuis("EFM32TG*")||cpuis("EFM32GG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
line.long 0x04 "VCMP_INPUTSEL,Input Selection Register"
|
|
bitfld.long 0x04 8. " LPREF ,Low Power Reference" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--5. " TRIGLEVEL ,Select VDD trigger level" "1.667,1.701,1.735,1.769,1.803,1.837,1.871,1.905,1.939,1.973,2.007,2.041,2.075,2.109,2.143,2.177,2.211,2.245,2.279,2.313,2.347,2.381,2.415,2.449,2.483,2.517,2.551,2.585,2.619,2.653,2.687,2.721,2.755,2.789,2.823,2.857,2.891,2.925,2.959,2.993,3.027,3.061,3.095,3.129,3.163,3.197,3.231,3.265,3.299,3.333,3.367,3.401,3.435,3.469,3.503,3.537,3.571,3.605,3.639,3.673,3.707,3.741,3.775,?..."
|
|
else
|
|
line.long 0x04 "VCMP_INPUTSEL,Input Selection Register"
|
|
bitfld.long 0x04 8. " LPREF ,Low Power Reference" "Disabled,Enabled"
|
|
hexmask.long.byte 0x04 0.--5. 1. " TRIGLEVEL ,Trigger Level"
|
|
endif
|
|
else
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "VCMP_CTRL,Control Register"
|
|
bitfld.long 0x00 30. " HALFBIAS ,Half Bias Current" "0,1"
|
|
bitfld.long 0x00 24.--27. " BIASPROG ,VCMP Bias Programming Value" "0.1,0.2,0.4,0.6,0.8,1.0,1.2,1.4,2.0,2.2,2.4,2.6,2.8,3.0,3.2,3.4"
|
|
textline " "
|
|
bitfld.long 0x00 17. " IFALL ,Falling Edge Interrupt Sense" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " IRISE ,Rising Edge Interrupt Sense" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " WARMTIME ,Warm-Up Time" "4CYCLES,8CYCLES,16CYCLES,32CYCLES,64CYCLES,128CYCLES,256CYCLES,512CYCLES"
|
|
bitfld.long 0x00 4. " HYSTEN ,Hysteresis Enable" "Disabled,+-20mV"
|
|
textline " "
|
|
bitfld.long 0x00 2. " INACTVAL ,Inactive Value" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EN ,Voltage Supply Comparator Enable" "Disabled,Enabled"
|
|
sif (cpuis("EFM32G*")||cpuis("EFM32TG*")||cpuis("EFM32GG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
line.long 0x04 "VCMP_INPUTSEL,Input Selection Register"
|
|
bitfld.long 0x04 8. " LPREF ,Low Power Reference" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--5. " TRIGLEVEL ,Select VDD trigger level" "1.667,1.701,1.735,1.769,1.803,1.837,1.871,1.905,1.939,1.973,2.007,2.041,2.075,2.109,2.143,2.177,2.211,2.245,2.279,2.313,2.347,2.381,2.415,2.449,2.483,2.517,2.551,2.585,2.619,2.653,2.687,2.721,2.755,2.789,2.823,2.857,2.891,2.925,2.959,2.993,3.027,3.061,3.095,3.129,3.163,3.197,3.231,3.265,3.299,3.333,3.367,3.401,3.435,3.469,3.503,3.537,3.571,3.605,3.639,3.673,3.707,3.741,3.775,?..."
|
|
else
|
|
line.long 0x04 "VCMP_INPUTSEL,Input Selection Register"
|
|
bitfld.long 0x04 8. " LPREF ,Low Power Reference" "Disabled,Enabled"
|
|
hexmask.long.byte 0x04 0.--5. 1. " TRIGLEVEL ,Trigger Level"
|
|
endif
|
|
endif
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "VCMP_STATUS,Status Register"
|
|
bitfld.long 0x00 1. " VCMPOUT ,Voltage Supply Comparator Output" "0,1"
|
|
bitfld.long 0x00 0. " VCMPACT ,Voltage Supply Comparator Active" "Not active,Active"
|
|
group.long 0x0c++0x07
|
|
line.long 0x00 "VCMP_IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 1. " WARMUP ,Warm-up Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EDGE ,Edge Triggered Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x04 "VCMP_IF,Interrupt Flag Register"
|
|
setclrfld.long 0x04 1. 0x08 1. 0x0c 1. " WARMUP_set/clr ,Warm-up Interrupt Flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 0. 0x08 0. 0x0c 0. " EDGE_set/clr ,Edge Triggered Interrupt Flag" "No interrupt,Interrupt"
|
|
width 0xb
|
|
tree.end
|
|
tree "ADC (Analog to Digital Converter)"
|
|
base ad:0x40002000
|
|
width 18.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 28. " CHCONIDLE ,Input channel connected when ADC is IDLE" "Disconnect,KEEPCON"
|
|
bitfld.long 0x00 24.--27. " OVSRSEL ,Oversample ratio select" "X2,X4,X8,X16,X32,X64,X128,X256,X512,X1024,X2048,X4096,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x00 16.--22. 1. " TIMEBASE ,Time base"
|
|
hexmask.long.byte 0x00 8.--14. 1. " PRESC ,Prescaler setting"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " LPFMODE ,Low pass filter mode" "BYPASS,DECAP,RCFILT,?..."
|
|
bitfld.long 0x00 3. " TAILGATE ,Conversion tailgating" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " WARMUPMODE ,Select Warm-up mode for ADC" "Normal,FASTBG,KEEPSCANREFWARM,KEEPADCWARM"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 3. " SCANSTOP ,Scan sequence stop" "No effect,Stop"
|
|
bitfld.long 0x00 2. " SCANSTART ,Scan sequence start" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SINGLESTOP ,Single conversion stop" "No effect,Stop"
|
|
bitfld.long 0x00 0. " SINGLESTART ,Single conversion start" "No effect,Start"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 24.--26. " SCANDATASRC ,Scan data source" "?..."
|
|
textline " "
|
|
bitfld.long 0x00 17. " SCANDV ,Scan data valid" "Not valid,Valid"
|
|
bitfld.long 0x00 16. " SINGLEDV ,Single sample data valid" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 12. " WARM ,ADC warmed up" "Not warmed,Warmed"
|
|
bitfld.long 0x00 9. " SCANREFWARM ,Scan reference warmed up" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SINGLEREFWARM ,Single reference warmed up" "Not warmed,Warmed"
|
|
bitfld.long 0x00 1. " SCANACT ,Scan conversion active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SINGLEACT ,Single conversion active" "Not active,Active"
|
|
if (((per.l(ad:0x40002000+0x00C))&0x02)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "SINGLECTRL,Single Sample Control Register"
|
|
bitfld.long 0x00 28.--30. " PRSSEL ,Single sample PRS trigger select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24. " PRSEN ,Single sample PRS trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20.--23. " AT ,Single sample acquisition time" "1CYCLE,2CYCLES,4CYCLES,8CYCLES,16CYCLES,32CYCLES,64CYCLES,128CYCLES,256CYCLES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " REF ,Single sample reference selection" "1V25,2V5,VDD,5VDIFF,EXTSINGLE,2XEXTDIFF,2XVDD,?..."
|
|
sif (CPU()=="EFM32HG108F"||CPU()=="EFM32HG308F")
|
|
bitfld.long 0x00 8.--11. " INPUTSEL ,Single sample input selection" ",,,,,,,,TEMP,VDDDIV3,VDD,VSS,VREFDIV2,DAC0OUT0,DAC0OUT1,?..."
|
|
elif (CPU()=="EFM32HG309F")
|
|
bitfld.long 0x00 8.--11. " INPUTSEL ,Single sample input selection" "CH0,CH1,,,,,,,TEMP,VDDDIV3,VDD,VSS,VREFDIV2,DAC0OUT0,DAC0OUT1,?..."
|
|
elif (CPU()=="EFM32HG110F")
|
|
bitfld.long 0x00 8.--11. " INPUTSEL ,Single sample input selection" "CH0,CH1,,,,,CH6,CH7,TEMP,VDDDIV3,VDD,VSS,VREFDIV2,DAC0OUT0,DAC0OUT1,?..."
|
|
elif (CPU()=="EFM32HG310F"||CPU()=="EFM32HG350F")
|
|
bitfld.long 0x00 8.--11. " INPUTSEL ,Single sample input selection" "CH0,CH1,,,,CH5,CH6,CH7,TEMP,VDDDIV3,VDD,VSS,VREFDIV2,DAC0OUT0,DAC0OUT1,?..."
|
|
elif (CPU()=="EFM32HG210F"||CPU()=="EFM32HG222F"||CPU()=="EFM32HG321F"||CPU()=="EFM32HG322F")
|
|
bitfld.long 0x00 8.--11. " INPUTSEL ,Single sample input selection" "CH0,CH1,,,CH4,CH5,CH6,CH7,TEMP,VDDDIV3,VDD,VSS,VREFDIV2,DAC0OUT0,DAC0OUT1,?..."
|
|
else
|
|
bitfld.long 0x00 8.--11. " INPUTSEL ,Single sample input selection" "CH0,CH1,CH2,CH3,CH4,CH5,CH6,CH7,TEMP,VDDDIV3,VDD,VSS,VREFDIV2,DAC0OUT0,DAC0OUT1,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " RES ,Single sample resolution select" "12BIT,8BIT,6BIT,OVS"
|
|
bitfld.long 0x00 2. " ADJ ,Single sample result adjustment" "Right,Left"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DIFF ,Single sample differential mode" "Single ended,Differential"
|
|
bitfld.long 0x00 0. " REP ,Single sample repetitive mode" "Disabled,Enabled"
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "SINGLECTRL,Single Sample Control Register"
|
|
bitfld.long 0x00 28.--30. " PRSSEL ,Single sample PRS trigger select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24. " PRSEN ,Single sample PRS trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20.--23. " AT ,Single sample acquisition time" "1CYCLE,2CYCLES,4CYCLES,8CYCLES,16CYCLES,32CYCLES,64CYCLES,128CYCLES,256CYCLES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " REF ,Single sample reference selection" "1V25,2V5,VDD,5VDIFF,EXTSINGLE,2XEXTDIFF,2XVDD,?..."
|
|
sif (CPU()=="EFM32HG108F"||CPU()=="EFM32HG308F")
|
|
bitfld.long 0x00 8.--11. " INPUTSEL ,Single sample input selection" ",,,,,DIFF0,?..."
|
|
elif (CPU()=="EFM32HG309F")
|
|
bitfld.long 0x00 8.--11. " INPUTSEL ,Single sample input selection" "CH0CH1,,,,DIFF0,?..."
|
|
elif (CPU()=="EFM32HG110F")
|
|
bitfld.long 0x00 8.--11. " INPUTSEL ,Single sample input selection" "CH0CH1,,,CH6CH7,,DIFF0,?..."
|
|
elif (CPU()=="EFM32HG310F"||CPU()=="EFM32HG350F")
|
|
bitfld.long 0x00 8.--11. " INPUTSEL ,Single sample input selection" "CH0CH1,,CH4CH5,CH6CH7,DIFF0,?..."
|
|
elif (CPU()=="EFM32HG210F"||CPU()=="EFM32HG222F"||CPU()=="EFM32HG321F"||CPU()=="EFM32HG322F")
|
|
bitfld.long 0x00 8.--11. " INPUTSEL ,Single sample input selection" "CH0CH1,,CH4CH5,CH6CH7,DIFF0,?..."
|
|
else
|
|
bitfld.long 0x00 8.--11. " INPUTSEL ,Single sample input selection" "CH0CH1,CH2CH3,CH4CH5,CH6CH7,DIFF0,?..."
|
|
endif
|
|
bitfld.long 0x00 4.--5. " RES ,Single sample resolution select" "12BIT,8BIT,6BIT,OVS"
|
|
bitfld.long 0x00 2. " ADJ ,Single sample result adjustment" "Right,Left"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DIFF ,Single sample differential mode" "Single ended,Differential"
|
|
bitfld.long 0x00 0. " REP ,Single sample repetitive mode" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x10++0x0B
|
|
line.long 0x00 "SCANCTRL,Scan Control Register"
|
|
bitfld.long 0x00 28.--30. " PRSSEL ,Scan sequence PRS trigger select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24. " PRSEN ,Scan sequence PRS trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20.--23. " AT ,Scan sample acquisition time" "1CYCLE,2CYCLES,4CYCLES,8CYCLES,16CYCLES,32CYCLES,64CYCLES,128CYCLES,256CYCLES,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " REF ,Scan sequence reference selection" "1V25,2V5,VDD,5VDIFF,EXTSINGLE,2XEXTDIFF,2XVDD,?..."
|
|
textline " "
|
|
bitfld.long 0x00 15. " INPUTMASK[7:0] ,Scan sequence input mask bit 7" "0,1"
|
|
bitfld.long 0x00 14. ",Scan sequence input mask bit 6" "0,1"
|
|
bitfld.long 0x00 13. ",Scan sequence input mask bit 5" "0,1"
|
|
bitfld.long 0x00 12. ",Scan sequence input mask bit 4" "0,1"
|
|
bitfld.long 0x00 11. ",Scan sequence input mask bit 3" "0,1"
|
|
bitfld.long 0x00 10. ",Scan sequence input mask bit 2" "0,1"
|
|
bitfld.long 0x00 9. ",Scan sequence input mask bit 1" "0,1"
|
|
bitfld.long 0x00 8. ",Scan sequence input mask bit 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " RES ,Scan sequence resolution select" "12BIT,8BIT,6BIT,OVS"
|
|
bitfld.long 0x00 2. " ADJ ,Scan sequence result adjustment" "Right,Left"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DIFF ,Scan sequence differential mode" "Single ended,Differential"
|
|
bitfld.long 0x00 0. " REP ,Scan sequence repetitive mode" "Disabled,Enabled"
|
|
line.long 0x04 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x04 9. " SCANOF ,Scan result overflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " SINGLEOF ,Single result overflow interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SCAN ,Scan conversion complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " SINGLE ,Single conversion complete interrupt enable" "Disabled,Enabled"
|
|
line.long 0x08 "IF,Interrupt Flag Register"
|
|
setclrfld.long 0x08 9. 0x0C 9. 0x10 9. " SCANOF_SET/CLR ,Scan result overflow interrupt flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x08 8. 0x0C 8. 0x10 8. " SINGLEOF_SET/CLR ,Single result overflow interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x0C 1. 0x10 1. " SCAN_SET/CLR ,Scan conversion complete interrupt flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x08 0. 0x0C 0. 0x10 0. " SINGLE_SET/CLR ,Single conversion complete interrupt flag" "No interrupt,Interrupt"
|
|
hgroup.long 0x24++0x07
|
|
hide.long 0x00 "SINGLEDATA,Single Conversion Result Data"
|
|
in
|
|
hide.long 0x04 "SCANDATA,Scan Conversion Result Data"
|
|
in
|
|
rgroup.long 0x2C++0x07
|
|
line.long 0x00 "SINGLEDATAP,Scan Conversion Result Data Peek Register"
|
|
line.long 0x04 "SCANDATAP,Scan Sequence Result Data Peek Register"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CAL,Calibration Register"
|
|
hexmask.long.byte 0x00 24.--30. 1. " SCANGAIN ,Scan mode gain calibration value"
|
|
hexmask.long.byte 0x00 16.--22. 1. " SCANOFFSET ,Scan mode offset calibration value"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--14. 1. " SINGLEGAIN ,Single mode gain calibration value"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SINGLEOFFSET ,Single mode offset calibration value"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "BIASPROG,Bias Programming Register"
|
|
bitfld.long 0x00 8.--11. " COMPBIAS ,Comparator bias value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 6. " HALFBIAS ,Half bias current" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " BIASPROG ,Bias programming value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
width 0x0B
|
|
tree.end
|
|
tree "IDAC (Current Digital to Analog Converter)"
|
|
base ad:0x40004000
|
|
width 16.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "IDAC_CTRL,Control Register"
|
|
bitfld.long 0x00 20.--21. " PRSSEL ,IDAC Output PRS channnel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3"
|
|
bitfld.long 0x00 18. " OUTENPRS ,PRS Controlled Output Enable" "IDAC_OUTEN,IDAC_PRSSEL"
|
|
bitfld.long 0x00 4. " OUTMODE ,Output Modes" "PIN,ADC"
|
|
textline " "
|
|
bitfld.long 0x00 3. " OUTEN ,Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " MINOUTTRANS ,Minimum Output Transition Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " CURSINK ,Current Sink Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Current DAC Enable" "Disabled,Enabled"
|
|
if (((d.l(ad:0x40004000+0x04))&0xF)==0x00)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "IDAC_CURPROG,Current Programming Register"
|
|
bitfld.long 0x00 8.--12. " STEPSEL ,Current Step Size Select" "0.05,0.10,0.15,0.20,0.25,0.30,0.35,0.40,0.45,0.50,0.55,0.60,0.65,0.70,0.75,0.80,0.85,0.90,0.95,1.0,1.05,1.10,1.15,1.20,1.25,1.30,1.35,1.40,1.45,1.50,1.55,1.6"
|
|
bitfld.long 0x00 0.--1. " RANGESEL ,Current Range Select" "RANGE0,RANGE1,RANGE2,RANGE3"
|
|
elif (((d.l(ad:0x40004000+0x04))&0xF)==0x1)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "IDAC_CURPROG,Current Programming Register"
|
|
bitfld.long 0x00 8.--12. " STEPSEL ,Current Step Size Select" "1.6,1.7,1.8,1.9,2.0,2.1,2.2,2.3,2.4,2.5,2.6,2.7,2.8,2.9,3.0,3.1,3.2,3.3,3.4,3.5,3.6,3.7,3.8,3.9,4.0,4.1,4.2,4.3,4.4,4.5,4.6,4.7"
|
|
bitfld.long 0x00 0.--1. " RANGESEL ,Current Range Select" "RANGE0,RANGE1,RANGE2,RANGE3"
|
|
elif (((d.l(ad:0x40004000+0x04))&0xF)==0x2)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "IDAC_CURPROG,Current Programming Register"
|
|
bitfld.long 0x00 8.--12. " STEPSEL ,Current Step Size Select" "0.5,1.0,1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5,6.0,6.5,7.0,7.5,8.0,8.5,9.0,9.5,10.0,10.5,11.0,11.5,12.0,12.5,13.0,13.5,14.0,14.5,15.0,15.5,16.0"
|
|
bitfld.long 0x00 0.--1. " RANGESEL ,Current Range Select" "RANGE0,RANGE1,RANGE2,RANGE3"
|
|
elif (((d.l(ad:0x40004000+0x04))&0xF)==0x3)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "IDAC_CURPROG,Current Programming Register"
|
|
bitfld.long 0x00 8.--12. " STEPSEL ,Current Step Size Select" "2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32,34,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64"
|
|
bitfld.long 0x00 0.--1. " RANGESEL ,Current Range Select" "RANGE0,RANGE1,RANGE2,RANGE3"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "IDAC_CURPROG,Current Programming Register"
|
|
bitfld.long 0x00 8.--12. " STEPSEL ,Current Step Size Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--1. " RANGESEL ,Current Range Select" "RANGE0,RANGE1,RANGE2,RANGE3"
|
|
endif
|
|
group.long 0x08++0x07
|
|
line.long 0x00 "IDAC_CAL,Calibration Register"
|
|
hexmask.long.byte 0x00 0.--6. 1. " TUNING ,Tune the current to given accuracy"
|
|
line.long 0x04 "DAC_DUTYCONFIG,Duty Cycle Configauration Register"
|
|
bitfld.long 0x04 1. " EM2DUTYCYCLEDIS ,EM2/EM3 Duty Cycle Disable" "Enabled,Disabled"
|
|
bitfld.long 0x04 0. " DUTYCYCLEEN ,Duty Cycle Enable" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "AES (Advanced Encryption Standard)"
|
|
base ad:0x400E0000
|
|
width 13.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "AES_CTRL,Control Register"
|
|
sif (cpuis("EFM32GG*")||cpuis("EFM32TG*")||cpuis("EFM32LG*")||cpuis("EFM32WG*")||cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 6. " BYTEORDER ,Configure byte order in data and key registers" "Not swapped,Swapped"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 5. " XORSTART ,AES_XORDATA Write Start" "Not started,Started"
|
|
bitfld.long 0x00 4. " DATASTART ,AES_DATA Write Start" "Not started,Started"
|
|
textline " "
|
|
sif (!cpuis("EFM32ZG*"))
|
|
bitfld.long 0x00 2. " KEYBUFEN ,Key Buffer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " AES256 ,AES-256 Mode" "128 mode,256 mode"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 0. " DECRYPT ,Decryption/Encryption Mode" "Encryption,Decryption"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "AES_CMD,Command Register"
|
|
bitfld.long 0x00 1. " STOP ,Encryption/Decryption Stop" "No effect,Stopped"
|
|
bitfld.long 0x00 0. " START ,Encryption/Decryption Start" "No effect,Started"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "AES_STATUS,Status Register"
|
|
bitfld.long 0x00 0. " RUNNING ,AES Running" "Not running,Running"
|
|
group.long 0x0c++0x07
|
|
line.long 0x00 "AES_IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " DONE ,Encryption/Decryption Done Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x04 "AES_IF,Interrupt Flag Register"
|
|
setclrfld.long 0x04 0. 0x08 0. 0x0c 0. " DONE_set/clr ,Encryption/Decryption Done Interrupt Flag" "No interrupt,Interrupt"
|
|
group.long 0x1c++0x07
|
|
line.long 0x00 "AES_DATA,Data Register"
|
|
line.long 0x04 "AES_XORDATA,XORDATA Register"
|
|
group.long 0x30++0x1f
|
|
line.long 0x00 "AES_KEYLA,Key Low Register"
|
|
line.long 0x04 "AES_KEYLB,Key Low Register"
|
|
line.long 0x08 "AES_KEYLC,Key Low Register"
|
|
line.long 0x0c "AES_KEYLD,Key Low Register"
|
|
sif (!cpuis("EFM32ZG*"))
|
|
line.long 0x10 "AES_KEYHA,Key High Register"
|
|
line.long 0x14 "AES_KEYHB,Key High Register"
|
|
line.long 0x18 "AES_KEYHC,Key High Register"
|
|
line.long 0x1c "AES_KEYHD,Key High Register"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree.open "GPIO (General Purpose Input/Output)"
|
|
tree "PORT A"
|
|
base ad:0x40006000
|
|
width 17.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "CTRL,Port Control Register"
|
|
bitfld.long 0x00 0.--1. " DRIVEMODE ,Drive mode select" "Standard,Lowest,High,Low"
|
|
line.long 0x04 "MODEL,Port Pin Mode Low Register"
|
|
sif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG310")||(cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")||(cpu()=="EFM32HG222")||(cpu()=="EFM32HG210")
|
|
bitfld.long 0x04 8.--11. " MODE2 ,Pin 2 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
bitfld.long 0x04 4.--7. " MODE1 ,Pin 1 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x04 0.--3. " MODE0 ,Pin 0 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
sif (cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")||(cpu()=="EFM32HG222")
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "MODEH,Port Pin Mode High Register"
|
|
bitfld.long 0x00 8.--11. " MODE10 ,Pin 10 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
bitfld.long 0x00 4.--7. " MODE9 ,Pin 9 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " MODE8 ,Pin 8 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
endif
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DOUTSET_SET/CLR,Port Data Out Set/Clear Register"
|
|
sif (cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")||(cpu()=="EFM32HG222")
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " DOUT[10] ,Data out pin 10" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " DOUT[9] ,Data out pin 9" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " DOUT[8] ,Data out pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG310")||(cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")||(cpu()=="EFM32HG222")||(cpu()=="EFM32HG210")
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " DOUT[2] ,Data out pin 2" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " DOUT[1] ,Data out pin 1" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DOUT[0] ,Data out pin 0" "Disabled,Enabled"
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "DOUTTGL,Port Data Out Toggle Register"
|
|
sif (cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")||(cpu()=="EFM32HG222")
|
|
bitfld.long 0x00 10. " DOUTTGL[10] ,Data out toggle pin 10" "No effect,Toggle"
|
|
bitfld.long 0x00 9. " DOUTTGL[9] ,Data out toggle pin 9" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DOUTTGL[8] ,Data out toggle pin 8" "No effect,Toggle"
|
|
textline " "
|
|
endif
|
|
sif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG310")||(cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")||(cpu()=="EFM32HG222")||(cpu()=="EFM32HG210")
|
|
bitfld.long 0x00 2. " DOUTTGL[2] ,Data out toggle pin 2" "No effect,Toggle"
|
|
bitfld.long 0x00 1. " DOUTTGL[1] ,Data out toggle pin 1" "No effect,Toggle"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 0. " DOUTTGL[0] ,Data out toggle pin 0" "No effect,Toggle"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DIN,Port Data In Register"
|
|
sif (cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")||(cpu()=="EFM32HG222")
|
|
bitfld.long 0x00 10. " DIN[10] ,Data in pin 10" "No effect,Toggle"
|
|
bitfld.long 0x00 9. " DIN[9] ,Data in pin 9" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DIN[8] ,Data in pin 8" "No effect,Toggle"
|
|
textline " "
|
|
endif
|
|
sif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG310")||(cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")||(cpu()=="EFM32HG222")||(cpu()=="EFM32HG210")
|
|
bitfld.long 0x00 2. " DIN[2] ,Data in pin 2" "No effect,Toggle"
|
|
bitfld.long 0x00 1. " DIN[1] ,Data in pin 1" "No effect,Toggle"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 0. " DIN[0] ,Data in pin 0" "No effect,Toggle"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PINLOCKN,Port Unlocked Pins Register"
|
|
sif (cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")||(cpu()=="EFM32HG222")
|
|
bitfld.long 0x00 10. " PINLOCKN[10] ,Pin 10 unlocked" "Locked,Unlocked"
|
|
bitfld.long 0x00 9. " PINLOCKN[9] ,Pin 9 unlocked" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PINLOCKN[8] ,Pin 8 unlocked" "Locked,Unlocked"
|
|
textline " "
|
|
endif
|
|
sif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG310")||(cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")||(cpu()=="EFM32HG222")||(cpu()=="EFM32HG210")
|
|
bitfld.long 0x00 2. " PINLOCKN[2] ,Pin 2 unlocked" "Locked,Unlocked"
|
|
bitfld.long 0x00 1. " PINLOCKN[1] ,Pin 1 unlocked" "Locked,Unlocked"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 0. " PINLOCKN[0] ,Pin 0 unlocked" "Locked,Unlocked"
|
|
width 0x0B
|
|
tree.end
|
|
tree "PORT B"
|
|
base ad:0x40006024
|
|
width 17.
|
|
group.long 0x00++0x0B
|
|
line.long 0x00 "CTRL,Port Control Register"
|
|
bitfld.long 0x00 0.--1. " DRIVEMODE ,Drive mode select" "Standard,Lowest,High,Low"
|
|
line.long 0x04 "MODEL,Port Pin Mode Low Register"
|
|
bitfld.long 0x04 28.--31. " MODE7 ,Pin 7 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
line.long 0x08 "MODEH,Port Pin Mode High Register"
|
|
bitfld.long 0x08 24.--27. " MODE14 ,Pin 14 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
bitfld.long 0x08 20.--23. " MODE13 ,Pin 13 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
textline " "
|
|
bitfld.long 0x08 12.--15. " MODE11 ,Pin 11 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
bitfld.long 0x08 0.--3. " MODE8 ,Pin 8 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DOUTSET_SET/CLR,Port Data Out Set/Clear Register"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " DOUT[14] ,Data out pin 14" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " DOUT[13] ,Data out pin 13" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " DOUT[11] ,Data out pin 11" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " DOUT[8] ,Data out pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " DOUT[7] ,Data out pin 7" "Disabled,Enabled"
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "DOUTTGL,Port Data Out Toggle Register"
|
|
bitfld.long 0x00 14. " DOUTTGL[14] ,Data out toggle pin 14" "No effect,Toggle"
|
|
bitfld.long 0x00 13. " DOUTTGL[13] ,Data out toggle pin 13" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DOUTTGL[11] ,Data out toggle pin 11" "No effect,Toggle"
|
|
bitfld.long 0x00 8. " DOUTTGL[8] ,Data out toggle pin 8" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DOUTTGL[7] ,Data out toggle pin 7" "No effect,Toggle"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DIN,Port Data In Register"
|
|
bitfld.long 0x00 14. " DIN[14] ,Data in pin 14" "No effect,Toggle"
|
|
bitfld.long 0x00 13. " DIN[13] ,Data in pin 13" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DIN[11] ,Data in pin 11" "No effect,Toggle"
|
|
bitfld.long 0x00 8. " DIN[8] ,Data in pin 8" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DIN[7] ,Data in pin 7" "No effect,Toggle"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PINLOCKN,Port Unlocked Pins Register"
|
|
bitfld.long 0x00 14. " PINLOCKN[14] ,Pin 14 unlocked" "Locked,Unlocked"
|
|
bitfld.long 0x00 13. " PINLOCKN[13] ,Pin 13 unlocked" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PINLOCKN[11] ,Pin 11 unlocked" "Locked,Unlocked"
|
|
bitfld.long 0x00 8. " PINLOCKN[8] ,Pin 8 unlocked" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PINLOCKN[7] ,Pin 7 unlocked" "Locked,Unlocked"
|
|
width 0x0B
|
|
tree.end
|
|
tree "PORT C"
|
|
base ad:0x40006048
|
|
width 17.
|
|
group.long 0x00++0x0B
|
|
line.long 0x00 "CTRL,Port Control Register"
|
|
bitfld.long 0x00 0.--1. " DRIVEMODE ,Drive mode select" "Standard,Lowest,High,Low"
|
|
line.long 0x04 "MODEL,Port Pin Mode Low Register"
|
|
sif (cpu()=="EFM32HG222")||(cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")
|
|
bitfld.long 0x04 16.--19. " MODE4 ,Pin 4 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
bitfld.long 0x04 12.--15. " MODE3 ,Pin 3 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
textline " "
|
|
bitfld.long 0x04 8.--11. " MODE2 ,Pin 2 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
bitfld.long 0x04 4.--7. " MODE1 ,Pin 1 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
textline " "
|
|
bitfld.long 0x04 0.--3. " MODE0 ,Pin 0 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
elif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG308")||(cpu()=="EFM32HG309")||(cpu()=="EFM32HG110")||(cpu()=="EFM32HG310")||(cpu()=="EFM32HG108")||(cpu()=="EFM32HG210")
|
|
bitfld.long 0x04 4.--7. " MODE1 ,Pin 1 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
bitfld.long 0x04 0.--3. " MODE0 ,Pin 0 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
endif
|
|
line.long 0x08 "MODEH,Port Pin Mode High Register"
|
|
sif (cpu()=="EFM32HG222")||(cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")
|
|
bitfld.long 0x08 28.--31. " MODE15 ,Pin 15 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
bitfld.long 0x08 24.--27. " MODE14 ,Pin 14 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
textline " "
|
|
bitfld.long 0x08 20.--23. " MODE13 ,Pin 13 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
bitfld.long 0x08 12.--15. " MODE11 ,Pin 11 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
textline " "
|
|
bitfld.long 0x08 8.--11. " MODE10 ,Pin 10 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
bitfld.long 0x08 4.--7. " MODE9 ,Pin 9 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
textline " "
|
|
bitfld.long 0x08 0.--3. " MODE8 ,Pin 8 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
elif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG308")||(cpu()=="EFM32HG309")||(cpu()=="EFM32HG110")||(cpu()=="EFM32HG310")||(cpu()=="EFM32HG108")
|
|
bitfld.long 0x08 28.--31. " MODE15 ,Pin 15 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
bitfld.long 0x08 24.--27. " MODE14 ,Pin 14 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
elif (cpu()=="EFM32HG210")
|
|
bitfld.long 0x08 28.--31. " MODE15 ,Pin 15 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
bitfld.long 0x08 24.--27. " MODE14 ,Pin 14 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
textline " "
|
|
bitfld.long 0x08 20.--23. " MODE13 ,Pin 13 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
endif
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DOUTSET_SET/CLR,Port Data Out Set/Clear Register"
|
|
sif (cpu()=="EFM32HG222")||(cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " DOUT[15] ,Data out pin 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " DOUT[14] ,Data out pin 14" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " DOUT[13] ,Data out pin 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " DOUT[11] ,Data out pin 11" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " DOUT[10] ,Data out pin 10" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " DOUT[9] ,Data out pin 9" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " DOUT[8] ,Data out pin 8" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " DOUT[4] ,Data out pin 4" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " DOUT[3] ,Data out pin 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " DOUT[2] ,Data out pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " DOUT[1] ,Data out pin 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DOUT[0] ,Data out pin 0" "Disabled,Enabled"
|
|
elif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG308")||(cpu()=="EFM32HG309")||(cpu()=="EFM32HG110")||(cpu()=="EFM32HG310")||(cpu()=="EFM32HG108")
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " DOUT[15] ,Data out pin 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " DOUT[14] ,Data out pin 14" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " DOUT[1] ,Data out pin 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DOUT[0] ,Data out pin 0" "Disabled,Enabled"
|
|
elif (cpu()=="EFM32HG210")
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " DOUT[15] ,Data out pin 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " DOUT[14] ,Data out pin 14" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " DOUT[13] ,Data out pin 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " DOUT[1] ,Data out pin 1" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DOUT[0] ,Data out pin 0" "Disabled,Enabled"
|
|
endif
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "DOUTTGL,Port Data Out Toggle Register"
|
|
sif (cpu()=="EFM32HG222")||(cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")
|
|
bitfld.long 0x00 15. " DOUTTGL[15] ,Data out toggle pin 15" "No effect,Toggle"
|
|
bitfld.long 0x00 14. " DOUTTGL[14] ,Data out toggle pin 14" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DOUTTGL[13] ,Data out toggle pin 13" "No effect,Toggle"
|
|
bitfld.long 0x00 11. " DOUTTGL[11] ,Data out toggle pin 11" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DOUTTGL[10] ,Data out toggle pin 10" "No effect,Toggle"
|
|
bitfld.long 0x00 9. " DOUTTGL[9] ,Data out toggle pin 9" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DOUTTGL[8] ,Data out toggle pin 8" "No effect,Toggle"
|
|
bitfld.long 0x00 4. " DOUTTGL[4] ,Data out toggle pin 4" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DOUTTGL[3] ,Data out toggle pin 3" "No effect,Toggle"
|
|
bitfld.long 0x00 2. " DOUTTGL[2] ,Data out toggle pin 2" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DOUTTGL[1] ,Data out toggle pin 1" "No effect,Toggle"
|
|
bitfld.long 0x00 0. " DOUTTGL[0] ,Data out toggle pin 0" "No effect,Toggle"
|
|
elif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG308")||(cpu()=="EFM32HG309")||(cpu()=="EFM32HG110")||(cpu()=="EFM32HG310")||(cpu()=="EFM32HG108")
|
|
bitfld.long 0x00 15. " DOUTTGL[15] ,Data out toggle pin 15" "No effect,Toggle"
|
|
bitfld.long 0x00 14. " DOUTTGL[14] ,Data out toggle pin 14" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DOUTTGL[1] ,Data out toggle pin 1" "No effect,Toggle"
|
|
bitfld.long 0x00 0. " DOUTTGL[0] ,Data out toggle pin 0" "No effect,Toggle"
|
|
elif (cpu()=="EFM32HG210")
|
|
bitfld.long 0x00 15. " DOUTTGL[15] ,Data out toggle pin 15" "No effect,Toggle"
|
|
bitfld.long 0x00 14. " DOUTTGL[14] ,Data out toggle pin 14" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DOUTTGL[13] ,Data out toggle pin 13" "No effect,Toggle"
|
|
bitfld.long 0x00 1. " DOUTTGL[1] ,Data out toggle pin 1" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DOUTTGL[0] ,Data out toggle pin 0" "No effect,Toggle"
|
|
endif
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DIN,Port Data In Register"
|
|
sif (cpu()=="EFM32HG222")||(cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")
|
|
bitfld.long 0x00 15. " DIN[15] ,Data in pin 15" "No effect,Toggle"
|
|
bitfld.long 0x00 14. " DIN[14] ,Data in pin 14" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DIN[13] ,Data in pin 13" "No effect,Toggle"
|
|
bitfld.long 0x00 11. " DIN[11] ,Data in pin 11" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DIN[10] ,Data in pin 10" "No effect,Toggle"
|
|
bitfld.long 0x00 9. " DIN[9] ,Data in pin 9" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DIN[8] ,Data in pin 8" "No effect,Toggle"
|
|
bitfld.long 0x00 4. " DIN[4] ,Data in pin 4" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DIN[3] ,Data in pin 3" "No effect,Toggle"
|
|
bitfld.long 0x00 2. " DIN[2] ,Data in pin 2" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DIN[1] ,Data in pin 1" "No effect,Toggle"
|
|
bitfld.long 0x00 0. " DIN[0] ,Data in pin 0" "No effect,Toggle"
|
|
elif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG308")||(cpu()=="EFM32HG309")||(cpu()=="EFM32HG110")||(cpu()=="EFM32HG310")||(cpu()=="EFM32HG108")
|
|
bitfld.long 0x00 15. " DIN[15] ,Data in pin 15" "No effect,Toggle"
|
|
bitfld.long 0x00 14. " DIN[14] ,Data in pin 14" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DIN[1] ,Data in pin 1" "No effect,Toggle"
|
|
bitfld.long 0x00 0. " DIN[0] ,Data in pin 0" "No effect,Toggle"
|
|
elif (cpu()=="EFM32HG210")
|
|
bitfld.long 0x00 15. " DIN[15] ,Data in pin 15" "No effect,Toggle"
|
|
bitfld.long 0x00 14. " DIN[14] ,Data in pin 14" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DIN[13] ,Data in pin 13" "No effect,Toggle"
|
|
bitfld.long 0x00 1. " DIN[1] ,Data in pin 1" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DIN[0] ,Data in pin 0" "No effect,Toggle"
|
|
endif
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PINLOCKN,Port Unlocked Pins Register"
|
|
sif (cpu()=="EFM32HG222")||(cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")
|
|
bitfld.long 0x00 15. " PINLOCKN[15] ,Pin 15 Unlocked" "Locked,Unlocked"
|
|
bitfld.long 0x00 14. " PINLOCKN[14] ,Pin 14 Unlocked" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PINLOCKN[13] ,Pin 13 Unlocked" "Locked,Unlocked"
|
|
bitfld.long 0x00 11. " PINLOCKN[11] ,Pin 11 Unlocked" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PINLOCKN[10] ,Pin 10 Unlocked" "Locked,Unlocked"
|
|
bitfld.long 0x00 9. " PINLOCKN[9] ,Pin 9 Unlocked" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PINLOCKN[8] ,Pin 8 Unlocked" "Locked,Unlocked"
|
|
bitfld.long 0x00 4. " PINLOCKN[4] ,Pin 4 Unlocked" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PINLOCKN[3] ,Pin 3 Unlocked" "Locked,Unlocked"
|
|
bitfld.long 0x00 2. " PINLOCKN[2] ,Pin 2 Unlocked" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PINLOCKN[1] ,Pin 1 Unlocked" "Locked,Unlocked"
|
|
bitfld.long 0x00 0. " PINLOCKN[0] ,Pin 0 Unlocked" "Locked,Unlocked"
|
|
elif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG308")||(cpu()=="EFM32HG309")||(cpu()=="EFM32HG110")||(cpu()=="EFM32HG310")||(cpu()=="EFM32HG108")
|
|
bitfld.long 0x00 15. " PINLOCKN[15] ,Pin 15 Unlocked" "Locked,Unlocked"
|
|
bitfld.long 0x00 14. " PINLOCKN[14] ,Pin 14 Unlocked" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PINLOCKN[1] ,Pin 1 Unlocked" "Locked,Unlocked"
|
|
bitfld.long 0x00 0. " PINLOCKN[0] ,Pin 0 Unlocked" "Locked,Unlocked"
|
|
elif (cpu()=="EFM32HG210")
|
|
bitfld.long 0x00 15. " PINLOCKN[15] ,Pin 15 Unlocked" "Locked,Unlocked"
|
|
bitfld.long 0x00 14. " PINLOCKN[14] ,Pin 14 Unlocked" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PINLOCKN[13] ,Pin 13 Unlocked" "Locked,Unlocked"
|
|
bitfld.long 0x00 1. " PINLOCKN[1] ,Pin 1 Unlocked" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PINLOCKN[0] ,Pin 0 Unlocked" "Locked,Unlocked"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "PORT D"
|
|
base ad:0x4000606C
|
|
width 17.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "CTRL,Port Control Register"
|
|
bitfld.long 0x00 0.--1. " DRIVEMODE ,Drive mode select" "Standard,Lowest,High,Low"
|
|
line.long 0x04 "MODEL,Port Pin Mode Low Register"
|
|
sif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG310")
|
|
bitfld.long 0x04 28.--31. " MODE7 ,Pin 7 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
bitfld.long 0x04 24.--27. " MODE6 ,Pin 6 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
textline " "
|
|
bitfld.long 0x04 20.--23. " MODE5 ,Pin 5 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
elif (cpu()=="EFM32HG222")||(cpu()=="EFM32HG210")||(cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")
|
|
bitfld.long 0x04 28.--31. " MODE7 ,Pin 7 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
bitfld.long 0x04 24.--27. " MODE6 ,Pin 6 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
textline " "
|
|
bitfld.long 0x04 20.--23. " MODE5 ,Pin 5 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
bitfld.long 0x04 16.--19. " MODE4 ,Pin 4 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
elif (cpu()=="EFM32HG108")||(cpu()=="EFM32HG110")
|
|
bitfld.long 0x04 28.--31. " MODE7 ,Pin 7 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
bitfld.long 0x04 24.--27. " MODE6 ,Pin 6 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
endif
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DOUTSET_SET/CLR,Port Data Out Set/Clear Register"
|
|
sif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG310")
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " DOUT[7] ,Data out pin 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " DOUT[6] ,Data out pin 6" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " DOUT[5] ,Data out pin 5" "Disabled,Enabled"
|
|
elif (cpu()=="EFM32HG222")||(cpu()=="EFM32HG210")||(cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " DOUT[7] ,Data out pin 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " DOUT[6] ,Data out pin 6" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " DOUT[5] ,Data out pin 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " DOUT[4] ,Data out pin 4" "Disabled,Enabled"
|
|
elif (cpu()=="EFM32HG108")||(cpu()=="EFM32HG110")
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " DOUT[7] ,Data out pin 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " DOUT[6] ,Data out pin 6" "Disabled,Enabled"
|
|
endif
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "DOUTTGL,Port Data Out Toggle Register"
|
|
sif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG310")
|
|
bitfld.long 0x00 7. " DOUTTGL[7] ,Data out toggle pin 7" "No effect,Toggle"
|
|
bitfld.long 0x00 6. " DOUTTGL[6] ,Data out toggle pin 6" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DOUTTGL[5] ,Data out toggle pin 5" "No effect,Toggle"
|
|
elif (cpu()=="EFM32HG222")||(cpu()=="EFM32HG210")||(cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")
|
|
bitfld.long 0x00 7. " DOUTTGL[7] ,Data out toggle pin 7" "No effect,Toggle"
|
|
bitfld.long 0x00 6. " DOUTTGL[6] ,Data out toggle pin 6" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DOUTTGL[5] ,Data out toggle pin 5" "No effect,Toggle"
|
|
bitfld.long 0x00 4. " DOUTTGL[4] ,Data out toggle pin 4" "No effect,Toggle"
|
|
elif (cpu()=="EFM32HG108")||(cpu()=="EFM32HG110")
|
|
bitfld.long 0x00 7. " DOUTTGL[7] ,Data out toggle pin 7" "No effect,Toggle"
|
|
bitfld.long 0x00 6. " DOUTTGL[6] ,Data out toggle pin 6" "No effect,Toggle"
|
|
endif
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DIN,Port Data In Register"
|
|
sif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG310")
|
|
bitfld.long 0x00 7. " DIN[7] ,Data in pin 7" "No effect,Toggle"
|
|
bitfld.long 0x00 6. " DIN[6] ,Data in pin 6" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DIN[5] ,Data in pin 5" "No effect,Toggle"
|
|
elif (cpu()=="EFM32HG222")||(cpu()=="EFM32HG210")||(cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")
|
|
bitfld.long 0x00 7. " DIN[7] ,Data in pin 7" "No effect,Toggle"
|
|
bitfld.long 0x00 6. " DIN[6] ,Data in pin 6" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DIN[5] ,Data in pin 5" "No effect,Toggle"
|
|
bitfld.long 0x00 4. " DIN[4] ,Data in pin 4" "No effect,Toggle"
|
|
elif (cpu()=="EFM32HG108")||(cpu()=="EFM32HG110")
|
|
bitfld.long 0x00 7. " DOUTTGL[7] ,Data out toggle pin 7" "No effect,Toggle"
|
|
bitfld.long 0x00 6. " DOUTTGL[6] ,Data out toggle pin 6" "No effect,Toggle"
|
|
endif
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PINLOCKN,Port Unlocked Pins Register"
|
|
sif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG310")
|
|
bitfld.long 0x00 7. " PINLOCKN[7] ,Pin 7 Unlocked" "Locked,Unlocked"
|
|
bitfld.long 0x00 6. " PINLOCKN[6] ,Pin 6 Unlocked" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PINLOCKN[5] ,Pin 5 Unlocked" "Locked,Unlocked"
|
|
elif (cpu()=="EFM32HG222")||(cpu()=="EFM32HG210")||(cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")
|
|
bitfld.long 0x00 7. " PINLOCKN[7] ,Pin 7 Unlocked" "Locked,Unlocked"
|
|
bitfld.long 0x00 6. " PINLOCKN[6] ,Pin 6 Unlocked" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PINLOCKN[5] ,Pin 5 Unlocked" "Locked,Unlocked"
|
|
bitfld.long 0x00 4. " PINLOCKN[4] ,Pin 4 Unlocked" "Locked,Unlocked"
|
|
elif (cpu()=="EFM32HG108")||(cpu()=="EFM32HG110")
|
|
bitfld.long 0x00 7. " PINLOCKN[7] ,Pin 7 Unlocked" "Locked,Unlocked"
|
|
bitfld.long 0x00 6. " PINLOCKN[6] ,Pin 6 Unlocked" "Locked,Unlocked"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "PORT E"
|
|
base ad:0x40006090
|
|
width 17.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Port Control Register"
|
|
bitfld.long 0x00 0.--1. " DRIVEMODE ,Drive mode select" "Standard,Lowest,High,Low"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "MODEH,Port Pin Mode High Register"
|
|
sif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG222")||(cpu()=="EFM32HG210")||(cpu()=="EFM32HG310")||(cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")
|
|
bitfld.long 0x00 20.--23. " MODE13 ,Pin 13 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
bitfld.long 0x00 16.--19. " MODE12 ,Pin 12 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE11 ,Pin 11 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
bitfld.long 0x00 8.--11. " MODE10 ,Pin 10 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
else
|
|
bitfld.long 0x00 20.--23. " MODE13 ,Pin 13 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
bitfld.long 0x00 16.--19. " MODE12 ,Pin 12 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
endif
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DOUTSET_SET/CLR,Port Data Out Set/Clear Register"
|
|
sif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG222")||(cpu()=="EFM32HG210")||(cpu()=="EFM32HG310")||(cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " DOUT[13] ,Data out pin 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " DOUT[12] ,Data out pin 12" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " DOUT[11] ,Data out pin 11" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " DOUT[10] ,Data out pin 10" "Disabled,Enabled"
|
|
else
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " DOUT[13] ,Data out pin 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " DOUT[12] ,Data out pin 12" "Disabled,Enabled"
|
|
endif
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "DOUTTGL,Port Data Out Toggle Register"
|
|
sif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG222")||(cpu()=="EFM32HG210")||(cpu()=="EFM32HG310")||(cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")
|
|
bitfld.long 0x00 13. " DOUTTGL[13] ,Data out toggle pin 13" "No effect,Toggle"
|
|
bitfld.long 0x00 12. " DOUTTGL[12] ,Data out toggle pin 12" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DOUTTGL[11] ,Data out toggle pin 11" "No effect,Toggle"
|
|
bitfld.long 0x00 10. " DOUTTGL[10] ,Data out toggle pin 10" "No effect,Toggle"
|
|
else
|
|
bitfld.long 0x00 13. " DOUTTGL[13] ,Data out toggle pin 13" "No effect,Toggle"
|
|
bitfld.long 0x00 12. " DOUTTGL[12] ,Data out toggle pin 12" "No effect,Toggle"
|
|
endif
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DIN,Port Data In Register"
|
|
sif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG222")||(cpu()=="EFM32HG210")||(cpu()=="EFM32HG310")||(cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")
|
|
bitfld.long 0x00 13. " DIN[13] ,Data in pin 13" "No effect,Toggle"
|
|
bitfld.long 0x00 12. " DIN[12] ,Data in pin 12" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DIN[11] ,Data in pin 11" "No effect,Toggle"
|
|
bitfld.long 0x00 10. " DIN[10] ,Data in pin 10" "No effect,Toggle"
|
|
else
|
|
bitfld.long 0x00 13. " DIN[13] ,Data in pin 13" "No effect,Toggle"
|
|
bitfld.long 0x00 12. " DIN[12] ,Data in pin 12" "No effect,Toggle"
|
|
endif
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PINLOCKN,Port Unlocked Pins Register"
|
|
sif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG222")||(cpu()=="EFM32HG210")||(cpu()=="EFM32HG310")||(cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")
|
|
bitfld.long 0x00 14. " PINLOCKN[14] ,Pin 14 unlocked" "Locked,Unlocked"
|
|
bitfld.long 0x00 13. " PINLOCKN[13] ,Pin 13 unlocked" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PINLOCKN[11] ,Pin 11 unlocked" "Locked,Unlocked"
|
|
bitfld.long 0x00 10. " PINLOCKN[10] ,Pin 10 unlocked" "Locked,Unlocked"
|
|
else
|
|
bitfld.long 0x00 14. " PINLOCKN[14] ,Pin 14 unlocked" "Locked,Unlocked"
|
|
bitfld.long 0x00 13. " PINLOCKN[13] ,Pin 13 unlocked" "Locked,Unlocked"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "PORT F"
|
|
base ad:0x400060B4
|
|
width 17.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "CTRL,Port Control Register"
|
|
bitfld.long 0x00 0.--1. " DRIVEMODE ,Drive mode select" "Standard,Lowest,High,Low"
|
|
line.long 0x04 "MODEL,Port Pin Mode Low Register"
|
|
sif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG308")||(cpu()=="EFM32HG309")||(cpu()=="EFM32HG108")||(cpu()=="EFM32HG110")||(cpu()=="EFM32HG210")||(cpu()=="EFM32HG310")
|
|
bitfld.long 0x04 8.--11. " MODE2 ,Pin 2 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
bitfld.long 0x04 4.--7. " MODE1 ,Pin 1 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
textline " "
|
|
bitfld.long 0x04 0.--3. " MODE0 ,Pin 0 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
else
|
|
bitfld.long 0x04 20.--23. " MODE5 ,Pin 5 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
bitfld.long 0x04 16.--19. " MODE4 ,Pin 4 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " MODE3 ,Pin 3 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
bitfld.long 0x04 8.--11. " MODE2 ,Pin 2 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " MODE1 ,Pin 1 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
bitfld.long 0x04 0.--3. " MODE0 ,Pin 0 mode" "Disabled,Input,Input pull,Input pull filter,Push pull,Push pull drive,Wired or,Wired or pull down,Wired and,Wired and filter,Wired and pullup,Wired and pullup filter,Wired and drive,Wired and drive filter,Wired and drive pullup,Wired and drive pullup filter"
|
|
endif
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DOUTSET_SET/CLR,Port Data Out Set/Clear Register"
|
|
sif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG308")||(cpu()=="EFM32HG309")||(cpu()=="EFM32HG108")||(cpu()=="EFM32HG110")||(cpu()=="EFM32HG210")||(cpu()=="EFM32HG310")
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " DOUT[2] ,Data out pin 2" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " DOUT[1] ,Data out pin 1" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DOUT[0] ,Data out pin 0" "Disabled,Enabled"
|
|
else
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " DOUT[5] ,Data out pin 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " DOUT[4] ,Data out pin 4" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " DOUT[3] ,Data out pin 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " DOUT[2] ,Data out pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " DOUT[1] ,Data out pin 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DOUT[0] ,Data out pin 0" "Disabled,Enabled"
|
|
endif
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "DOUTTGL,Port Data Out Toggle Register"
|
|
sif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG308")||(cpu()=="EFM32HG309")||(cpu()=="EFM32HG108")||(cpu()=="EFM32HG110")||(cpu()=="EFM32HG210")||(cpu()=="EFM32HG310")
|
|
bitfld.long 0x00 2. " DOUTTGL[2] ,Data out toggle pin 2" "No effect,Toggle"
|
|
bitfld.long 0x00 1. " DOUTTGL[1] ,Data out toggle pin 1" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DOUTTGL[0] ,Data out toggle pin 0" "No effect,Toggle"
|
|
else
|
|
bitfld.long 0x00 5. " DOUTTGL[5] ,Data out toggle pin 5" "No effect,Toggle"
|
|
bitfld.long 0x00 4. " DOUTTGL[4] ,Data out toggle pin 4" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DOUTTGL[3] ,Data out toggle pin 3" "No effect,Toggle"
|
|
bitfld.long 0x00 2. " DOUTTGL[2] ,Data out toggle pin 2" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DOUTTGL[1] ,Data out toggle pin 1" "No effect,Toggle"
|
|
bitfld.long 0x00 0. " DOUTTGL[0] ,Data out toggle pin 0" "No effect,Toggle"
|
|
endif
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DIN,Port Data In Register"
|
|
sif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG308")||(cpu()=="EFM32HG309")||(cpu()=="EFM32HG108")||(cpu()=="EFM32HG110")||(cpu()=="EFM32HG210")||(cpu()=="EFM32HG310")
|
|
bitfld.long 0x00 2. " DIN[2] ,Data in pin 2" "No effect,Toggle"
|
|
bitfld.long 0x00 1. " DIN[1] ,Data in pin 1" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DIN[0] ,Data in pin 0" "No effect,Toggle"
|
|
else
|
|
bitfld.long 0x00 5. " DIN[5] ,Data in pin 5" "No effect,Toggle"
|
|
bitfld.long 0x00 4. " DIN[4] ,Data in pin 4" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DIN[3] ,Data in pin 3" "No effect,Toggle"
|
|
bitfld.long 0x00 2. " DIN[2] ,Data in pin 2" "No effect,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DIN[1] ,Data in pin 1" "No effect,Toggle"
|
|
bitfld.long 0x00 0. " DIN[0] ,Data in pin 0" "No effect,Toggle"
|
|
endif
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PINLOCKN,Port Unlocked Pins Register"
|
|
sif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG308")||(cpu()=="EFM32HG309")||(cpu()=="EFM32HG108")||(cpu()=="EFM32HG110")||(cpu()=="EFM32HG210")||(cpu()=="EFM32HG310")
|
|
bitfld.long 0x00 2. " PINLOCKN[2] ,Pin 2 unlocked" "Locked,Unlocked"
|
|
bitfld.long 0x00 1. " PINLOCKN[1] ,Pin 1 unlocked" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PINLOCKN[0] ,Pin 0 unlocked" "Locked,Unlocked"
|
|
else
|
|
bitfld.long 0x00 5. " PINLOCKN[5] ,Pin 5 unlocked" "Locked,Unlocked"
|
|
bitfld.long 0x00 4. " PINLOCKN[4] ,Pin 4 unlocked" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PINLOCKN[3] ,Pin 3 unlocked" "Locked,Unlocked"
|
|
bitfld.long 0x00 2. " PINLOCKN[2] ,Pin 2 unlocked" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PINLOCKN[1] ,Pin 1 unlocked" "Locked,Unlocked"
|
|
bitfld.long 0x00 0. " PINLOCKN[0] ,Pin 0 unlocked" "Locked,Unlocked"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "Common Registers"
|
|
base ad:0x40006100
|
|
width 12.
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "EXTIPSELL,External Interrupt Port Select Low Register"
|
|
sif (cpu()=="EFM32HG108")||(cpu()=="EFM32HG110")
|
|
bitfld.long 0x00 28.--30. " EXTIPSEL7 ,External interrupt 7 port select" ",PORTB,,PORTD,?..."
|
|
bitfld.long 0x00 24.--26. " EXTIPSEL6 ,External interrupt 6 port select" ",,,PORTD,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " EXTIPSEL2 ,External interrupt 2 port select" ",,,,,PORTF,?..."
|
|
bitfld.long 0x00 4.--6. " EXTIPSEL1 ,External interrupt 1 port select" ",,PORTC,,,PORTF,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " EXTIPSEL0 ,External interrupt 0 port select" "PORTA,,PORTC,,,PORTF,?..."
|
|
elif (cpu()=="EFM32HG308")||(cpu()=="EFM32HG309")
|
|
bitfld.long 0x00 28.--30. " EXTIPSEL7 ,External interrupt 7 port select" ",PORTB,?..."
|
|
bitfld.long 0x00 8.--10. " EXTIPSEL2 ,External interrupt 2 port select" ",,,,,PORTF,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " EXTIPSEL1 ,External interrupt 1 port select" ",,PORTC,,,PORTF,?..."
|
|
bitfld.long 0x00 0.--2. " EXTIPSEL0 ,External interrupt 0 port select" "PORTA,,PORTC,,,PORTF,?..."
|
|
elif (cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")||(cpu()=="EFM32HG222")
|
|
bitfld.long 0x00 28.--30. " EXTIPSEL7 ,External interrupt 7 port select" ",PORTB,,PORTD,?..."
|
|
bitfld.long 0x00 24.--26. " EXTIPSEL6 ,External interrupt 6 port select" ",,,PORTD,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--22. " EXTIPSEL5 ,External interrupt 5 port select" ",,,PORTD,,PORTF,?..."
|
|
bitfld.long 0x00 16.--18. " EXTIPSEL4 ,External interrupt 4 port select" ",,PORTC,PORTD,,PORTF,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " EXTIPSEL3 ,External interrupt 3 port select" ",,PORTC,,,PORTF,?..."
|
|
bitfld.long 0x00 8.--10. " EXTIPSEL2 ,External interrupt 2 port select" "PORTA,,PORTC,,,PORTF,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " EXTIPSEL1 ,External interrupt 1 port select" "PORTA,,PORTC,,,PORTF,?..."
|
|
bitfld.long 0x00 0.--2. " EXTIPSEL0 ,External interrupt 0 port select" "PORTA,,PORTC,,,PORTF,?..."
|
|
elif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG210")||(cpu()=="EFM32HG310")
|
|
bitfld.long 0x00 28.--30. " EXTIPSEL7 ,External interrupt 7 port select" ",PORTB,,PORTD,?..."
|
|
bitfld.long 0x00 24.--26. " EXTIPSEL6 ,External interrupt 6 port select" ",,,PORTD,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--22. " EXTIPSEL5 ,External interrupt 5 port select" ",,,PORTD,?..."
|
|
textline " "
|
|
sif (cpu()=="EFM32HG210")
|
|
bitfld.long 0x00 16.--18. " EXTIPSEL4 ,External interrupt 4 port select" ",,,PORTD,?..."
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 8.--10. " EXTIPSEL2 ,External interrupt 2 port select" "PORTA,,,,,PORTF,?..."
|
|
bitfld.long 0x00 4.--6. " EXTIPSEL1 ,External interrupt 1 port select" "PORTA,,PORTC,,,PORTF,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " EXTIPSEL0 ,External interrupt 0 port select" "PORTA,,PORTC,,,PORTF,?..."
|
|
endif
|
|
line.long 0x04 "EXTIPSELH,External Interrupt Port Select High Register"
|
|
sif (cpu()=="EFM32HG108")||(cpu()=="EFM32HG110")
|
|
bitfld.long 0x04 28.--30. " EXTIPSEL15 ,External interrupt 15 port select" ",,PORTC,?..."
|
|
bitfld.long 0x04 24.--26. " EXTIPSEL14 ,External interrupt 14 port select" ",PORTB,PORTC,?..."
|
|
textline " "
|
|
bitfld.long 0x04 20.--22. " EXTIPSEL13 ,External interrupt 13 port select" ",PORTB,,,PORTE,?..."
|
|
bitfld.long 0x04 16.--18. " EXTIPSEL12 ,External interrupt 12 port select" ",,,,PORTE,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--14. " EXTIPSEL11 ,External interrupt 11 port select" ",PORTB,?..."
|
|
bitfld.long 0x04 0.--2. " EXTIPSEL8 ,External interrupt 8 port select" ",PORTB,?..."
|
|
elif (cpu()=="EFM32HG308")||(cpu()=="EFM32HG309")
|
|
bitfld.long 0x04 28.--30. " EXTIPSEL15 ,External interrupt 15 port select" ",,PORTC,?..."
|
|
bitfld.long 0x04 24.--26. " EXTIPSEL14 ,External interrupt 14 port select" ",PORTB,PORTC,?..."
|
|
textline " "
|
|
bitfld.long 0x04 20.--22. " EXTIPSEL13 ,External interrupt 13 port select" ",PORTB,,,PORTE,?..."
|
|
bitfld.long 0x04 16.--18. " EXTIPSEL12 ,External interrupt 12 port select" ",,,,PORTE,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--14. " EXTIPSEL11 ,External interrupt 11 port select" ",PORTB,?..."
|
|
bitfld.long 0x04 0.--2. " EXTIPSEL8 ,External interrupt 8 port select" ",PORTB,?..."
|
|
elif (cpu()=="EFM32HG321")||(cpu()=="EFM32HG322")||(cpu()=="EFM32HG222")
|
|
bitfld.long 0x04 28.--30. " EXTIPSEL15 ,External interrupt 15 port select" ",,PORTC,?..."
|
|
bitfld.long 0x04 24.--26. " EXTIPSEL14 ,External interrupt 14 port select" ",PORTB,PORTC,?..."
|
|
textline " "
|
|
sif (cpu()=="EFM32HG322")
|
|
bitfld.long 0x04 20.--22. " EXTIPSEL13 ,External interrupt 13 port select" ",PORTB,PORTC,,PORTE,?..."
|
|
textline " "
|
|
else
|
|
bitfld.long 0x04 20.--22. " EXTIPSEL13 ,External interrupt 13 port select" ",PORTB,,,PORTE,?..."
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x04 16.--18. " EXTIPSEL12 ,External interrupt 12 port select" ",,,,PORTE,?..."
|
|
textline " "
|
|
sif (cpu()=="EFM32HG322")
|
|
bitfld.long 0x04 12.--14. " EXTIPSEL11 ,External interrupt 11 port select" ",PORTB,PORTC,,PORTE,?..."
|
|
textline " "
|
|
else
|
|
bitfld.long 0x04 12.--14. " EXTIPSEL11 ,External interrupt 11 port select" ",PORTB,,,PORTE,?..."
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x04 8.--10. " EXTIPSEL10 ,External interrupt 10 port select" "PORTA,,PORTC,,PORTE,?..."
|
|
bitfld.long 0x04 4.--6. " EXTIPSEL9 ,External interrupt 9 port select" "PORTA,,PORTC,?..."
|
|
textline " "
|
|
bitfld.long 0x04 0.--2. " EXTIPSEL8 ,External interrupt 8 port select" "PORTA,PORTB,PORTC,?..."
|
|
elif (cpu()=="EFM32HG350")||(cpu()=="EFM32HG210")||(cpu()=="EFM32HG310")
|
|
bitfld.long 0x04 28.--30. " EXTIPSEL15 ,External interrupt 15 port select" ",,PORTC,?..."
|
|
bitfld.long 0x04 24.--26. " EXTIPSEL14 ,External interrupt 14 port select" ",PORTB,PORTC,?..."
|
|
textline " "
|
|
sif (cpu()=="EFM32HG210")
|
|
bitfld.long 0x04 20.--22. " EXTIPSEL13 ,External interrupt 13 port select" ",PORTB,PORTC,,PORTE,?..."
|
|
textline " "
|
|
else
|
|
bitfld.long 0x04 20.--22. " EXTIPSEL13 ,External interrupt 13 port select" ",PORTB,,,PORTE,?..."
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x04 16.--18. " EXTIPSEL12 ,External interrupt 12 port select" ",,,,PORTE,?..."
|
|
bitfld.long 0x04 12.--14. " EXTIPSEL11 ,External interrupt 11 port select" ",PORTB,,,PORTE,?..."
|
|
textline " "
|
|
bitfld.long 0x04 8.--10. " EXTIPSEL10 ,External interrupt 10 port select" ",,,,PORTE,?..."
|
|
bitfld.long 0x04 0.--2. " EXTIPSEL8 ,External interrupt 8 port select" ",PORTB,?..."
|
|
endif
|
|
line.long 0x08 "EXTIRISE,External Interrupt Rising Edge Trigger Register"
|
|
bitfld.long 0x08 15. " EXTIRISE15 ,External interrupt 15 rising edge trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " EXTIRISE14 ,External interrupt 14 rising edge trigger enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " EXTIRISE13 ,External interrupt 13 rising edge trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " EXTIRISE12 ,External interrupt 12 rising edge trigger enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 11. " EXTIRISE11 ,External interrupt 11 rising edge trigger enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()!="EFM32HG308")&&(cpu()!="EFM32HG309")&&(cpu()!="EFM32HG108")&&(cpu()!="EFM32HG110")
|
|
bitfld.long 0x08 10. " EXTIRISE10 ,External interrupt 10 rising edge trigger enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (cpu()!="EFM32HG308")&&(cpu()!="EFM32HG309")&&(cpu()!="EFM32HG108")&&(cpu()!="EFM32HG110")&&(cpu()!="EFM32HG350")&&(cpu()!="EFM32HG210")&&(cpu()!="EFM32HG310")
|
|
bitfld.long 0x08 9. " EXTIRISE9 ,External interrupt 9 rising edge trigger enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x08 8. " EXTIRISE8 ,External interrupt 8 rising edge trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 7. " EXTIRISE7 ,External interrupt 7 rising edge trigger enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()!="EFM32HG308")&&(cpu()!="EFM32HG309")
|
|
bitfld.long 0x08 6. " EXTIRISE6 ,External interrupt 6 rising edge trigger enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (cpu()!="EFM32HG308")&&(cpu()!="EFM32HG309")&&(cpu()!="EFM32HG108")&&(cpu()!="EFM32HG110")
|
|
bitfld.long 0x08 5. " EXTIRISE5 ,External interrupt 5 rising edge trigger enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (cpu()!="EFM32HG350")&&(cpu()!="EFM32HG308")&&(cpu()!="EFM32HG309")&&(cpu()!="EFM32HG310")&&(cpu()!="EFM32HG108")&&(cpu()!="EFM32HG110")
|
|
bitfld.long 0x08 4. " EXTIRISE4 ,External interrupt 4 rising edge trigger enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()!="EFM32HG210")
|
|
bitfld.long 0x08 3. " EXTIRISE3 ,External interrupt 3 rising edge trigger enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
endif
|
|
bitfld.long 0x08 2. " EXTIRISE2 ,External interrupt 2 rising edge trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " EXTIRISE1 ,External interrupt 1 rising edge trigger enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 0. " EXTIRISE0 ,External interrupt 0 rising edge trigger enable" "Disabled,Enabled"
|
|
line.long 0x0C "EXTIFALL,External Interrupt Falling Edge Trigger Register"
|
|
bitfld.long 0x0C 15. " EXTIFALL15 ,External interrupt 15 falling edge trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 14. " EXTIFALL14 ,External interrupt 14 falling edge trigger enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " EXTIFALL13 ,External interrupt 13 falling edge trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 12. " EXTIFALL12 ,External interrupt 12 falling edge trigger enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " EXTIFALL11 ,External interrupt 11 falling edge trigger enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()!="EFM32HG308")&&(cpu()!="EFM32HG309")&&(cpu()!="EFM32HG108")&&(cpu()!="EFM32HG110")
|
|
bitfld.long 0x0C 10. " EXTIFALL10 ,External interrupt 10 falling edge trigger enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (cpu()!="EFM32HG308")&&(cpu()!="EFM32HG309")&&(cpu()!="EFM32HG108")&&(cpu()!="EFM32HG110")&&(cpu()!="EFM32HG350")&&(cpu()!="EFM32HG210")&&(cpu()!="EFM32HG310")
|
|
bitfld.long 0x0C 9. " EXTIFALL9 ,External interrupt 9 falling edge trigger enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x0C 8. " EXTIFALL8 ,External interrupt 8 falling edge trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 7. " EXTIFALL7 ,External interrupt 7 falling edge trigger enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()!="EFM32HG308")&&(cpu()!="EFM32HG309")
|
|
bitfld.long 0x0C 6. " EXTIFALL6 ,External interrupt 6 falling edge trigger enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (cpu()!="EFM32HG308")&&(cpu()!="EFM32HG309")&&(cpu()!="EFM32HG108")&&(cpu()!="EFM32HG110")
|
|
bitfld.long 0x0C 5. " EXTIFALL5 ,External interrupt 5 falling edge trigger enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (cpu()!="EFM32HG350")&&(cpu()!="EFM32HG308")&&(cpu()!="EFM32HG309")&&(cpu()!="EFM32HG310")&&(cpu()!="EFM32HG108")&&(cpu()!="EFM32HG110")
|
|
bitfld.long 0x0C 4. " EXTIFALL4 ,External interrupt 4 falling edge trigger enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()!="EFM32HG210")
|
|
bitfld.long 0x0C 3. " EXTIFALL3 ,External interrupt 3 falling edge trigger enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
endif
|
|
bitfld.long 0x0C 2. " EXTIFALL2 ,External interrupt 2 falling edge trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 1. " EXTIFALL1 ,External interrupt 1 falling edge trigger enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 0. " EXTIFALL0 ,External interrupt 0 falling edge trigger enable" "Disabled,Enabled"
|
|
line.long 0x10 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x10 15. " EXT15 ,External interrupt 15 enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 14. " EXT14 ,External interrupt 14 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 13. " EXT13 ,External interrupt 13 enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 12. " EXT12 ,External interrupt 12 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 11. " EXT11 ,External interrupt 11 enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()!="EFM32HG308")&&(cpu()!="EFM32HG309")&&(cpu()!="EFM32HG108")&&(cpu()!="EFM32HG110")
|
|
bitfld.long 0x10 10. " EXT10 ,External interrupt 10 enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (cpu()!="EFM32HG308")&&(cpu()!="EFM32HG309")&&(cpu()!="EFM32HG108")&&(cpu()!="EFM32HG110")&&(cpu()!="EFM32HG350")&&(cpu()!="EFM32HG210")&&(cpu()!="EFM32HG310")
|
|
bitfld.long 0x10 9. " EXT9 ,External interrupt 9 enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x10 8. " EXT8 ,External interrupt 8 enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 7. " EXT7 ,External interrupt 7 enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()!="EFM32HG308")&&(cpu()!="EFM32HG309")
|
|
bitfld.long 0x10 6. " EXT6 ,External interrupt 6 enable" "Disabled,Enabled"
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textline " "
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endif
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|
sif (cpu()!="EFM32HG308")&&(cpu()!="EFM32HG309")&&(cpu()!="EFM32HG108")&&(cpu()!="EFM32HG110")
|
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bitfld.long 0x10 5. " EXT5 ,External interrupt 5 enable" "Disabled,Enabled"
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|
textline " "
|
|
endif
|
|
sif (cpu()!="EFM32HG350")&&(cpu()!="EFM32HG308")&&(cpu()!="EFM32HG309")&&(cpu()!="EFM32HG310")&&(cpu()!="EFM32HG108")&&(cpu()!="EFM32HG110")
|
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bitfld.long 0x10 4. " EXT4 ,External interrupt 4 enable" "Disabled,Enabled"
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|
textline " "
|
|
sif (cpu()!="EFM32HG210")
|
|
bitfld.long 0x10 3. " EXT3 ,External interrupt 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
endif
|
|
bitfld.long 0x10 2. " EXT2 ,External interrupt 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " EXT1 ,External interrupt 1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 0. " EXT0 ,External interrupt 0 enable" "Disabled,Enabled"
|
|
line.long 0x14 "IF_SET/CLR,Interrupt Flag Set/Clear Register"
|
|
setclrfld.long 0x14 15. 0x18 15. 0x1C 15. " EXT15 ,External interrupt flag 15" "No interrupt,interrupt"
|
|
setclrfld.long 0x14 14. 0x18 14. 0x1C 14. " EXT14 ,External interrupt flag 14" "No interrupt,interrupt"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x18 13. 0x1C 13. " EXT13 ,External interrupt flag 13" "No interrupt,interrupt"
|
|
setclrfld.long 0x14 12. 0x18 12. 0x1C 12. " EXT12 ,External interrupt flag 12" "No interrupt,interrupt"
|
|
textline " "
|
|
setclrfld.long 0x14 11. 0x18 11. 0x1C 11. " EXT11 ,External interrupt flag 11" "No interrupt,interrupt"
|
|
textline " "
|
|
sif (cpu()!="EFM32HG308")&&(cpu()!="EFM32HG309")&&(cpu()!="EFM32HG108")&&(cpu()!="EFM32HG110")
|
|
setclrfld.long 0x14 10. 0x18 10. 0x1C 10. " EXT10 ,External interrupt flag 10" "No interrupt,interrupt"
|
|
textline " "
|
|
endif
|
|
sif (cpu()!="EFM32HG308")&&(cpu()!="EFM32HG309")&&(cpu()!="EFM32HG108")&&(cpu()!="EFM32HG110")&&(cpu()!="EFM32HG350")&&(cpu()!="EFM32HG210")&&(cpu()!="EFM32HG310")
|
|
setclrfld.long 0x14 9. 0x18 9. 0x1C 9. " EXT9 ,External interrupt flag 9" "No interrupt,interrupt"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x14 8. 0x18 8. 0x1C 8. " EXT8 ,External interrupt flag 8" "No interrupt,interrupt"
|
|
setclrfld.long 0x14 7. 0x18 7. 0x1C 7. " EXT7 ,External interrupt flag 7" "No interrupt,interrupt"
|
|
textline " "
|
|
sif (cpu()!="EFM32HG308")&&(cpu()!="EFM32HG309")
|
|
setclrfld.long 0x14 6. 0x18 6. 0x1C 6. " EXT6 ,External interrupt flag 6" "No interrupt,interrupt"
|
|
textline " "
|
|
endif
|
|
sif (cpu()!="EFM32HG308")&&(cpu()!="EFM32HG309")&&(cpu()!="EFM32HG108")&&(cpu()!="EFM32HG110")
|
|
setclrfld.long 0x14 5. 0x18 5. 0x1C 5. " EXT5 ,External interrupt flag 5" "No interrupt,interrupt"
|
|
textline " "
|
|
endif
|
|
sif (cpu()!="EFM32HG350")&&(cpu()!="EFM32HG308")&&(cpu()!="EFM32HG309")&&(cpu()!="EFM32HG310")&&(cpu()!="EFM32HG108")&&(cpu()!="EFM32HG110")
|
|
setclrfld.long 0x14 4. 0x18 4. 0x1C 4. " EXT4 ,External interrupt flag 4" "No interrupt,interrupt"
|
|
textline " "
|
|
sif (cpu()!="EFM32HG210")
|
|
setclrfld.long 0x14 3. 0x18 3. 0x1C 3. " EXT3 ,External interrupt flag 3" "No interrupt,interrupt"
|
|
textline " "
|
|
endif
|
|
endif
|
|
setclrfld.long 0x14 2. 0x18 2. 0x1C 2. " EXT2 ,External interrupt flag 2" "No interrupt,interrupt"
|
|
setclrfld.long 0x14 1. 0x18 1. 0x1C 1. " EXT1 ,External interrupt flag 1" "No interrupt,interrupt"
|
|
textline " "
|
|
setclrfld.long 0x14 0. 0x18 0. 0x1C 0. " EXT0 ,External interrupt flag 0" "No interrupt,interrupt"
|
|
group.long 0x120++0x0F
|
|
line.long 0x00 "ROUTE,I/O Routing Register"
|
|
bitfld.long 0x00 1. " SWDIOPEN ,Serial wire data pin enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SWCLKPEN ,Serial wire clock pin enable" "Disabled,Enabled"
|
|
line.long 0x04 "INSENSE,Input Sense Register"
|
|
bitfld.long 0x04 1. " PRS ,PRS sense enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " INT ,Interrupt sense enable" "Disabled,Enabled"
|
|
line.long 0x08 "LOCK,Configuration Lock Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " LOCKKEY ,Configuration lock key"
|
|
line.long 0x0C "CTRL,GPIO Control Register"
|
|
bitfld.long 0x0C 0. " EM4RET ,Enable EM4 retention" "Disabled,Enabled"
|
|
wgroup.long 0x130++0x03
|
|
line.long 0x00 "CMD,EM4 Wake-up Clear Register"
|
|
bitfld.long 0x00 0. " EM4WUCLR ,EM4 wake-up clear" "No effect,Clear"
|
|
group.long 0x134++0x07
|
|
line.long 0x00 "EM4WUEN,EM4 Wake-up Enable Register"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EM4WUEN ,EM4 wake-up enable"
|
|
line.long 0x04 "EM4WUPOL,EM4 Wake-up Polarity Register"
|
|
hexmask.long.byte 0x04 0.--6. 1. " EM4WUPOL ,EM4 wake-up polarity"
|
|
rgroup.long 0x13C++0x07
|
|
line.long 0x04 "EM4WUCAUSE,EM4 Wake-up Cause Register"
|
|
hexmask.long.byte 0x04 0.--6. 1. " EM4WUCAUSE ,EM4 wake-Up cause"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
textline ""
|