woody/Gen4_R-Car_Trace32
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
27bce98882c2bc04593a1c1b54504631662dad37
Gen4_R-Car_Trace32/2_Trunk/pera740t.per
woody d411edd9b4 add Trace32 File
2025-10-14 09:52:32 +09:00

181 lines
10 KiB
Plaintext
Raw Blame History

; --------------------------------------------------------------------------------
; @Title: ARM740T on chip peripherals
; @Props:
; @Author: -
; @Changelog:
; @Manufacturer:
; @Doc:
; @Core:
; @Chiplist: ARM740TD
; @Copyright: (C) 1989-2014 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: pera740t.per 16305 2023-06-28 11:47:37Z pegold $
config 16. 8.
width 8.
ASSERT VERSION.BUILD.BASE()>=80109.
sif PER.isNOTIFICATION()
base AVM:0x00000000
wgroup AVM:0x00++0
textline " Peripheral File Notification - "
button "show missing files" "DIALOG.MESSAGE ""Please check your installation for the possibly missing files:""+CONV.CHAR(0xa)+PER.NOTIFICATION.MISSINGFILES()"
textline " ---------------------------------------------------------------"
textline " The peripheral file for this SoC cannot be displayed. "
textline " Possible reasons are: "
textline " - it is missing in the local installation or under development "
textline " - it is confidential "
textline " "
textline " As fallback only the core registers are shown. "
textline " Please check www.lauterbach.com/scripts.html "
textline " or contact support@lauterbach.com . "
textline " "
endif
;begin include file arm/mmu740.ph
;parameters:
group c15:0x0--0x0 "CP15"
line.long 0x0 "ID,ID Register"
group c15:0x1--0x1
line.long 0x0 "CR,Control Register"
bitfld.long 0x0 28.--29. " BANK ,Cache Bank Select Register" "0,1,2,3"
bitfld.long 0x0 27. " F ,Load Mode" "off,on"
bitfld.long 0x0 25.--26. " LOCK ,Lock Cache Lockdown Control Register" "0,1,2,3"
bitfld.long 0x0 24. " S ,Split Instruction Data Mode" "off,on"
bitfld.long 0x0 0x7 " B ,Endianism" "little,big"
bitfld.long 0x0 0x3 " W ,Write Buffer" "dis,ena"
bitfld.long 0x0 0x2 " C ,Cache" "dis,ena"
bitfld.long 0x0 0x0 " M ,Protection Unit" "dis,ena"
group c15:0x2--0x2
line.long 0x0 "CACHE,Cacheable Register"
bitfld.long 0x0 0x7 " No.7 ,Memory Area No.7 cacheable" "no,yes"
bitfld.long 0x0 0x6 " No.6 ,Memory Area No.6 cacheable" "no,yes"
bitfld.long 0x0 0x5 " No.5 ,Memory Area No.5 cacheable" "no,yes"
bitfld.long 0x0 0x4 " No.4 ,Memory Area No.4 cacheable" "no,yes"
bitfld.long 0x0 0x3 " No.3 ,Memory Area No.3 cacheable" "no,yes"
bitfld.long 0x0 0x2 " No.2 ,Memory Area No.2 cacheable" "no,yes"
bitfld.long 0x0 0x1 " No.1 ,Memory Area No.1 cacheable" "no,yes"
bitfld.long 0x0 0x0 " No.0 ,Memory Area No.0 cacheable" "no,yes"
group c15:0x3--0x3
line.long 0x0 "BUFFER,Write Buffer Control"
bitfld.long 0x0 0x7 " No.7 ,Memory Area No.7 bufferable" "no,yes"
bitfld.long 0x0 0x6 " No.6 ,Memory Area No.6 bufferable" "no,yes"
bitfld.long 0x0 0x5 " No.5 ,Memory Area No.5 bufferable" "no,yes"
bitfld.long 0x0 0x4 " No.4 ,Memory Area No.4 bufferable" "no,yes"
bitfld.long 0x0 0x3 " No.3 ,Memory Area No.3 bufferable" "no,yes"
bitfld.long 0x0 0x2 " No.2 ,Memory Area No.2 bufferable" "no,yes"
bitfld.long 0x0 0x1 " No.1 ,Memory Area No.1 bufferable" "no,yes"
bitfld.long 0x0 0x0 " No.0 ,Memory Area No.0 bufferable" "no,yes"
group c15:0x5--0x5
line.long 0x0 "ACCESS,Protection Register"
bitfld.long 0x0 14.--15. " No.7 ,Memory Area No.7 Access Permission" "S:no U:no ,S:r/w U:no ,S:r/w U:r ,S:r/w U:r/w"
bitfld.long 0x0 12.--13. " No.6 ,Memory Area No.6 Access Permission" "S:no U:no ,S:r/w U:no ,S:r/w U:r ,S:r/w U:r/w"
bitfld.long 0x0 10.--11. " No.5 ,Memory Area No.5 Access Permission" "S:no U:no ,S:r/w U:no ,S:r/w U:r ,S:r/w U:r/w"
bitfld.long 0x0 0x8--0x9 " No.4 ,Memory Area No.4 Access Permission" "S:no U:no ,S:r/w U:no ,S:r/w U:r ,S:r/w U:r/w"
textline " "
bitfld.long 0x0 0x6--0x7 "No.3 ,Memory Area No.3 Access Permission" "S:no U:no ,S:r/w U:no ,S:r/w U:r ,S:r/w U:r/w"
bitfld.long 0x0 0x4--0x5 " No.2 ,Memory Area No.2 Access Permission" "S:no U:no ,S:r/w U:no ,S:r/w U:r ,S:r/w U:r/w"
bitfld.long 0x0 0x2--0x3 " No.1 ,Memory Area No.1 Access Permission" "S:no U:no ,S:r/w U:no ,S:r/w U:r ,S:r/w U:r/w"
bitfld.long 0x0 0x0--0x1 " No.0 ,Memory Area No.0 Access Permission" "S:no U:no ,S:r/w U:no ,S:r/w U:r ,S:r/w U:r/w"
group c15:0x6--0x6
line.long 0x0 "AREA0,Memory Area No.0 Definition"
hexmask.long 0x0 12.--31. 0x1000 "BASE ,Area No.0 Base Address"
bitfld.long 0x0 0x1--0x5 " SIZE ,Size of the Area No.0" "res,res,res,res,res,res,res,res,res,res,res,4kB,8kB,16kB,32kB,64kB,128kB,256kB,512kB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x0 0x0 " ENABLE ,Enable Bit of Area No.0" "dis,ena"
group c15:0x16--0x16
line.long 0x0 "AREA1,Memory Area No.1 Definition"
hexmask.long 0x0 12.--31. 0x1000 "BASE ,Area No.1 Base Address"
bitfld.long 0x0 0x1--0x5 " SIZE ,Size of the Area No.1" "res,res,res,res,res,res,res,res,res,res,res,4kB,8kB,16kB,32kB,64kB,128kB,256kB,512kB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x0 0x0 " ENABLE ,Enable Bit of Area No.1" "dis,ena"
group c15:0x26--0x26
line.long 0x0 "AREA2,Memory Area No.2 Definition"
hexmask.long 0x0 12.--31. 0x1000 "BASE ,Area No.2 Base Address"
bitfld.long 0x0 0x1--0x5 " SIZE ,Size of the Area No.2" "res,res,res,res,res,res,res,res,res,res,res,4kB,8kB,16kB,32kB,64kB,128kB,256kB,512kB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x0 0x0 " ENABLE ,Enable Bit of Area No.2" "dis,ena"
group c15:0x36--0x36
line.long 0x0 "AREA3,Memory Area No.3 Definition"
hexmask.long 0x0 12.--31. 0x1000 "BASE ,Area No.3 Base Address"
bitfld.long 0x0 0x1--0x5 " SIZE ,Size of the Area No.3" "res,res,res,res,res,res,res,res,res,res,res,4kB,8kB,16kB,32kB,64kB,128kB,256kB,512kB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x0 0x0 " ENABLE ,Enable Bit of Area No.3" "dis,ena"
group c15:0x46--0x46
line.long 0x0 "AREA4,Memory Area No.4 Definition"
hexmask.long 0x0 12.--31. 0x1000 "BASE ,Area No.4 Base Address"
bitfld.long 0x0 0x1--0x5 " SIZE ,Size of the Area No.4" "res,res,res,res,res,res,res,res,res,res,res,4kB,8kB,16kB,32kB,64kB,128kB,256kB,512kB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x0 0x0 " ENABLE ,Enable Bit of Area No.4" "dis,ena"
group c15:0x56--0x56
line.long 0x0 "AREA5,Memory Area No.5 Definition"
hexmask.long 0x0 12.--31. 0x1000 "BASE ,Area No.5 Base Address"
bitfld.long 0x0 0x1--0x5 " SIZE ,Size of the Area No.5" "res,res,res,res,res,res,res,res,res,res,res,4kB,8kB,16kB,32kB,64kB,128kB,256kB,512kB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x0 0x0 " ENABLE ,Enable Bit of Area No.5" "dis,ena"
group c15:0x66--0x66
line.long 0x0 "AREA6,Memory Area No.6 Definition"
hexmask.long 0x0 12.--31. 0x1000 "BASE ,Area No.6 Base Address"
bitfld.long 0x0 0x1--0x5 " SIZE ,Size of the Area No.6" "res,res,res,res,res,res,res,res,res,res,res,4kB,8kB,16kB,32kB,64kB,128kB,256kB,512kB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x0 0x0 " ENABLE ,Enable Bit of Area No.6" "dis,ena"
group c15:0x76--0x76
line.long 0x0 "AREA7,Memory Area No.7 Definition"
hexmask.long 0x0 12.--31. 0x1000 "BASE ,Area No.7 Base Address"
bitfld.long 0x0 0x1--0x5 " SIZE ,Size of the Area No.7" "res,res,res,res,res,res,res,res,res,res,res,4kB,8kB,16kB,32kB,64kB,128kB,256kB,512kB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x0 0x0 " ENABLE ,Enable Bit of Area No.7" "dis,ena"
group c15:0x7--0x7
hide.long 0x0 "FLUSH,Flush unlocked Cache banks"
;end include file arm/mmu740.ph
;begin include file arm/icebreaker.ph
;parameters:
tree "ICEBreaker"
group ice:0x8--0x8 "Watchpoint 0"
line.long 0x0 "AV,Address Value"
group ice:0x9--0x9
line.long 0x0 "AM,Address Mask"
group ice:0x0a--0x0a
line.long 0x0 "DV,Data Value"
group ice:0x0b--0x0b
line.long 0x0 "DM,Data Mask"
group ice:0x0c--0x0c
line.long 0x0 "CV,Control Value"
bitfld.long 0x0 0x8 "ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
bitfld.long 0x0 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
bitfld.long 0x0 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
bitfld.long 0x0 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
bitfld.long 0x0 0x4 " nTRANS ,CPU Mode" "User,notU"
bitfld.long 0x0 0x3 " nOPC ,Op Fetch" "Inst,Data"
bitfld.long 0x0 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
bitfld.long 0x0 0x0 " nRW ,Read/Write" "R ,W"
group ice:0x0d--0x0d
line.long 0x0 "CM,Control Mask"
bitfld.long 0x0 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
bitfld.long 0x0 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
bitfld.long 0x0 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
bitfld.long 0x0 0x4 " nTRANS ,CPU Mode" "ENA ,DIS"
bitfld.long 0x0 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
bitfld.long 0x0 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
bitfld.long 0x0 0x0 " nRW ,Read/Write" "ENA,DIS"
group ice:0x10--0x10 "Watchpoint 1"
line.long 0x0 "AV,Address Value"
group ice:0x11--0x11
line.long 0x0 "AM,Address Mask"
group ice:0x12--0x12
line.long 0x0 "DV,Data Value"
group ice:0x13--0x13
line.long 0x0 "DM,Data Mask"
group ice:0x14--0x14
line.long 0x0 "CV,Control Value"
bitfld.long 0x0 0x8 "ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
bitfld.long 0x0 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
bitfld.long 0x0 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
bitfld.long 0x0 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
bitfld.long 0x0 0x4 " nTRANS ,CPU Mode" "User,notU"
bitfld.long 0x0 0x3 " nOPC ,Op Fetch" "Inst,Data"
bitfld.long 0x0 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
bitfld.long 0x0 0x0 " nRW ,Read/Write" "R ,W"
group ice:0x15--0x15
line.long 0x0 "CM,Control Mask"
bitfld.long 0x0 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
bitfld.long 0x0 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
bitfld.long 0x0 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
bitfld.long 0x0 0x4 " nTRANS ,CPU Mode" "ENA ,DIS"
bitfld.long 0x0 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
bitfld.long 0x0 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
bitfld.long 0x0 0x0 " nRW ,Read/Write" "ENA,DIS"
tree.end
;end include file arm/icebreaker.ph
Reference in New Issue View Git Blame Copy Permalink