507 lines
25 KiB
Plaintext
507 lines
25 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: TegraX1 Specific Menu
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; @Props: Released
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; @Author: KOB, SIK
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; @Changelog: 2017-09-08 KOB
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; 2018-05-29 SIK
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; @Manufacturer: NVIDIA - NVIDIA Corporation
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; @Core: Cortex-A57, CortexA53
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; @Chip: TEGRAX1
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; @Copyright: (C) 1989-2018 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: mentegrax1.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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if CORENAME()=="CORTEXA57"
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(
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popup "[:chip]Core Registers (Cortex-A57)"
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(
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menuitem "[:chip]ID Registers[AArch64]" "per , ""Core Registers (Cortex-A57),AArch64,ID Registers"""
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menuitem "[:chip]System Control and Configuration[AArch64]" "per , ""Core Registers (Cortex-A57),AArch64,System Control and Configuration"""
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menuitem "[:chip]Memory Management Unit[AArch64]" "per , ""Core Registers (Cortex-A57),AArch64,Memory Management Unit"""
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menuitem "[:chip]Virtualization Extensions[AArch64]" "per , ""Core Registers (Cortex-A57),AArch64,Virtualization Extensions"""
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menuitem "[:chip]Cache Control and Configuration[AArch64]" "per , ""Core Registers (Cortex-A57),AArch64,Cache Control and Configuration"""
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menuitem "[:chip]System Performance Monitor[AArch64]" "per , ""Core Registers (Cortex-A57),AArch64,System Performance Monitor"""
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menuitem "[:chip]System Timer Registers[AArch64]" "per , ""Core Registers (Cortex-A57),AArch64,System Timer Registers"""
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menuitem "[:chip]Generic Interrupt Controller CPU Interface[AArch64]" "per , ""Core Registers (Cortex-A57),AArch64,Generic Interrupt Controller CPU Interface"""
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separator
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menuitem "[:chip]Debug Registers[AArch64]" "per , ""Core Registers (Cortex-A57),AArch64,Debug Registers"""
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separator
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menuitem "[:chip]Breakpoint Registers[AArch64]" "per , ""Core Registers (Cortex-A57),AArch64,Breakpoint Registers"""
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menuitem "[:chip]Watchpoint Control Registers[AArch64]" "per , ""Core Registers (Cortex-A57),AArch64,Watchpoint Control Registers"""
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separator
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menuitem "[:chip]ID Registers[AArch32]" "per , ""Core Registers (Cortex-A57),AArch32,ID Registers"""
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menuitem "[:chip]System Control and Configuration[AArch32]" "per , ""Core Registers (Cortex-A57),AArch32,System Control and Configuration"""
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menuitem "[:chip]Memory Management Unit[AArch32]" "per , ""Core Registers (Cortex-A57),AArch32,Memory Management Unit"""
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menuitem "[:chip]Virtualization Extensions[AArch32]" "per , ""Core Registers (Cortex-A57),AArch32,Virtualization Extensions"""
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menuitem "[:chip]Cache Control and Configuration[AArch32]" "per , ""Core Registers (Cortex-A57),AArch32,Cache Control and Configuration"""
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menuitem "[:chip]System Performance Monitor[AArch32]" "per , ""Core Registers (Cortex-A57),AArch32,System Performance Monitor"""
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menuitem "[:chip]System Timer Registers[AArch32]" "per , ""Core Registers (Cortex-A57),AArch32,System Timer Registers"""
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menuitem "[:chip]Generic Interrupt Controller CPU Interface[AArch32]" "per , ""Core Registers (Cortex-A57),AArch32,Generic Interrupt Controller CPU Interface"""
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separator
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menuitem "[:chip]Debug Registers[AArch32]" "per , ""Core Registers (Cortex-A57),AArch32,Debug Registers"""
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separator
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menuitem "[:chip]Breakpoint Registers[AArch32]" "per , ""Core Registers (Cortex-A57),AArch32,Breakpoint Registers"""
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menuitem "[:chip]Watchpoint Control Registers[AArch32]" "per , ""Core Registers (Cortex-A57),AArch32,Watchpoint Control Registers"""
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separator
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menuitem "[:chip]Interrupt Controller (GIC-400)" "per , ""Core Registers (Cortex-A57),Interrupt Controller (GIC-400)"""
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)
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)
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if CORENAME()=="CORTEXA53"
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(
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popup "[:chip]Core Registers (Cortex-A53)"
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(
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menuitem "[:chip]ID Registers[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,ID Registers"""
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menuitem "[:chip]System Control and Configuration[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,System Control and Configuration"""
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menuitem "[:chip]Memory Management Unit[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Memory Management Unit"""
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menuitem "[:chip]Virtualization Extensions[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Virtualization Extensions"""
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menuitem "[:chip]Cache Control and Configuration[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Cache Control and Configuration"""
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menuitem "[:chip]System Performance Monitor[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,System Performance Monitor"""
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menuitem "[:chip]System Timer Registers[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,System Timer Registers"""
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menuitem "[:chip]Generic Interrupt Controller CPU Interface[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Generic Interrupt Controller CPU Interface"""
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separator
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menuitem "[:chip]Debug Registers[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Debug Registers"""
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separator
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menuitem "[:chip]Breakpoint Registers[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Breakpoint Registers"""
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menuitem "[:chip]Watchpoint Control Registers[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Watchpoint Control Registers"""
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separator
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menuitem "[:chip]ID Registers[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,ID Registers"""
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menuitem "[:chip]System Control and Configuration[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,System Control and Configuration"""
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menuitem "[:chip]Memory Management Unit[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Memory Management Unit"""
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menuitem "[:chip]Virtualization Extensions[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Virtualization Extensions"""
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menuitem "[:chip]Cache Control and Configuration[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Cache Control and Configuration"""
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menuitem "[:chip]System Performance Monitor[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,System Performance Monitor"""
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menuitem "[:chip]System Timer Registers[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,System Timer Registers"""
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menuitem "[:chip]Generic Interrupt Controller CPU Interface[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Generic Interrupt Controller CPU Interface"""
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separator
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menuitem "[:chip]Debug Registers[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Debug Registers"""
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separator
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menuitem "[:chip]Breakpoint Registers[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Breakpoint Registers"""
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menuitem "[:chip]Watchpoint Control Registers[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Watchpoint Control Registers"""
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separator
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menuitem "[:chip]Interrupt Controller (GIC-400)" "per , ""Core Registers (Cortex-A53),Interrupt Controller (GIC-400)"""
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)
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)
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separator
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menuitem "Interrupt Controller" "per , ""Interrupt Controller"""
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popup "Semaphores"
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(
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menuitem "Arbitration Semaphores" "per , ""Semaphores,Arbitration Semaphores"""
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menuitem "Resource Semaphores" "per , ""Semaphores,Resource Semaphores"""
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)
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menuitem "Clock And Reset Controller" "per , ""Clock And Reset Controller"""
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menuitem "Closed-Loop Dynamic Voltage and Frequency Scaling" "per , ""Closed-Loop Dynamic Voltage and Frequency Scaling"""
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menuitem "Atomics" "per , ""Atomics"""
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popup "Timers"
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(
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menuitem "NVIDIA Timers" "per , ""Timers,NVIDIA Timers"""
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menuitem "Fixed Time Base Registers" "per , ""Timers,Fixed Time Base Registers"""
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menuitem "Watchdog Timers" "per , ""Timers,Watchdog Timers"""
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menuitem "Timer Shared Interrupt Status" "per , ""Timers,Timer Shared Interrupt Status"""
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)
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popup "GPIO Controller/Pin MUX"
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(
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menuitem "GPIO 1" "per , ""GPIO Controller/Pin MUX,GPIO 1"""
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menuitem "GPIO 2" "per , ""GPIO Controller/Pin MUX,GPIO 2"""
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menuitem "GPIO 3" "per , ""GPIO Controller/Pin MUX,GPIO 3"""
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menuitem "GPIO 4" "per , ""GPIO Controller/Pin MUX,GPIO 4"""
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menuitem "GPIO 5" "per , ""GPIO Controller/Pin MUX,GPIO 5"""
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menuitem "GPIO 6" "per , ""GPIO Controller/Pin MUX,GPIO 6"""
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menuitem "GPIO 7" "per , ""GPIO Controller/Pin MUX,GPIO 7"""
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menuitem "GPIO 8" "per , ""GPIO Controller/Pin MUX,GPIO 8"""
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menuitem "VGPIO Registers" "per , ""GPIO Controller/Pin MUX,VGPIO Registers"""
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menuitem "Pinmux Registers" "per , ""GPIO Controller/Pin MUX,Pinmux Registers"""
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)
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menuitem "Activity Monitor" "per , ""Activity Monitor"""
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menuitem "Real-Time Clock" "per , ""Real-Time Clock"""
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popup "Power Management Controller"
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(
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menuitem "PMC Registers" "per , ""Power Management Controller,PMC Registers"""
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menuitem "PMC Counter 0" "per , ""Power Management Controller,PMC Counter 0"""
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menuitem "PMC Counter 1" "per , ""Power Management Controller,PMC Counter 1"""
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menuitem "Secure Boot Control" "per , ""Power Management Controller,Secure Boot Control"""
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menuitem "Exception Vector Pointers" "per , ""Power Management Controller,Exception Vector Pointers"""
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)
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popup "Host Subsystem"
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(
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menuitem "Channel 0" "per , ""Host Subsystem,Channel 0"""
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menuitem "Channel 1" "per , ""Host Subsystem,Channel 1"""
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menuitem "Channel 2" "per , ""Host Subsystem,Channel 2"""
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menuitem "Channel 3" "per , ""Host Subsystem,Channel 3"""
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menuitem "Channel 4" "per , ""Host Subsystem,Channel 4"""
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menuitem "Channel 5" "per , ""Host Subsystem,Channel 5"""
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menuitem "Channel 6" "per , ""Host Subsystem,Channel 6"""
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menuitem "Channel 7" "per , ""Host Subsystem,Channel 7"""
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menuitem "Channel 8" "per , ""Host Subsystem,Channel 8"""
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menuitem "Channel 9" "per , ""Host Subsystem,Channel 9"""
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menuitem "Channel 10" "per , ""Host Subsystem,Channel 10"""
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menuitem "Channel 11" "per , ""Host Subsystem,Channel 11"""
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)
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menuitem "Video Image Compositor" "per , ""Video Image Compositor"""
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menuitem "CPU Complex" "per , ""CPU Complex"""
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menuitem "Flow Controller" "per , ""Flow Controller"""
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popup "Memory Controller"
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(
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menuitem "MC0" "per , ""Memory Controller,MC0"""
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menuitem "EMC0" "per , ""Memory Controller,EMC0"""
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menuitem "MC1" "per , ""Memory Controller,MC1"""
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menuitem "EMC1" "per , ""Memory Controller,EMC1"""
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)
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menuitem "AHB Controller" "per , ""AHB Controller"""
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popup "APB"
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(
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menuitem "APB Control" "per , ""APB,APB Control"""
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menuitem "SATA Aux" "per , ""APB,SATA Aux"""
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menuitem "DAC/DAP" "per , ""APB,DAC/DAP"""
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menuitem "AP Control" "per , ""APB,AP Control"""
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menuitem "APB DMA Controller" "per , ""APB,APB DMA Controller"""
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)
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popup "USB"
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(
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menuitem "USB 1" "per , ""USB,USB 1"""
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menuitem "USB 2" "per , ""USB,USB 2"""
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menuitem "XUSB" "per , ""USB,XUSB"""
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)
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popup "Audio Processing Engine"
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(
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menuitem "AXBAR" "per , ""Audio Processing Engine,AXBAR"""
|
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menuitem "SFC" "per , ""Audio Processing Engine,SFC"""
|
|
menuitem "I2S" "per , ""Audio Processing Engine,I2S"""
|
|
menuitem "SPDIF" "per , ""Audio Processing Engine,SPDIF"""
|
|
menuitem "AMX" "per , ""Audio Processing Engine,AMX"""
|
|
menuitem "ADX" "per , ""Audio Processing Engine,ADX"""
|
|
menuitem "Audio Bridge" "per , ""Audio Processing Engine,Audio Bridge"""
|
|
menuitem "OPE" "per , ""Audio Processing Engine,OPE"""
|
|
menuitem "PEQ" "per , ""Audio Processing Engine,PEQ"""
|
|
menuitem "DMIC" "per , ""Audio Processing Engine,DMIC"""
|
|
menuitem "AHC" "per , ""Audio Processing Engine,AHC"""
|
|
menuitem "AMC" "per , ""Audio Processing Engine,AMC"""
|
|
menuitem "AFC" "per , ""Audio Processing Engine,AFC"""
|
|
menuitem "MVC" "per , ""Audio Processing Engine,MVC"""
|
|
menuitem "ADMA" "per , ""Audio Processing Engine,ADMA"""
|
|
menuitem "ADMAIF" "per , ""Audio Processing Engine,ADMAIF"""
|
|
menuitem "AGIC" "per , ""Audio Processing Engine,AGIC"""
|
|
menuitem "MIXER" "per , ""Audio Processing Engine,MIXER"""
|
|
menuitem "MBDRC" "per , ""Audio Processing Engine,MBDRC"""
|
|
menuitem "ADSP Peripheral" "per , ""Audio Processing Engine,ADSP Peripheral"""
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|
menuitem "Audio Miscellaneous" "per , ""Audio Processing Engine,Audio Miscellaneous"""
|
|
)
|
|
popup "Display Controller"
|
|
(
|
|
menuitem "Display Controller Registers" "per , ""Display Controller,Display Controller Registers"""
|
|
menuitem "Display A" "per , ""Display Controller,Display A"""
|
|
menuitem "Display B" "per , ""Display Controller,Display B"""
|
|
menuitem "WIN" "per , ""Display Controller,WIN"""
|
|
menuitem "WINBUF" "per , ""Display Controller,WINBUF"""
|
|
)
|
|
menuitem "Display Interfaces: MIPI-DSI" "per , ""Display Interfaces: MIPI-DSI"""
|
|
popup "HDMI Display Port"
|
|
(
|
|
menuitem "SOR0" "per , ""HDMI Display Port,SOR0"""
|
|
menuitem "SOR1" "per , ""HDMI Display Port,SOR1"""
|
|
menuitem "DCP KFUSE Control Registers" "per , ""HDMI Display Port,DCP KFUSE Control Registers"""
|
|
menuitem "HDA Registers" "per , ""HDMI Display Port,HDA Registers"""
|
|
menuitem "DPAUX0 Registers" "per , ""HDMI Display Port,DPAUX0 Registers"""
|
|
menuitem "DPAUX1 Registers" "per , ""HDMI Display Port,DPAUX1 Registers"""
|
|
)
|
|
menuitem "HDMI CEC" "per , ""HDMI CEC"""
|
|
menuitem "MIPI-CSI Camera serial interface" "per , ""MIPI-CSI Camera serial interface"""
|
|
menuitem "MIPI D-PHY CALIBRATION" "per , ""MIPI D-PHY CALIBRATION"""
|
|
popup "Video Input"
|
|
(
|
|
menuitem "VI Registers" "per , ""Video Input,VI Registers"""
|
|
menuitem "VI I2C Registers" "per , ""Video Input,VI I2C Registers"""
|
|
)
|
|
popup "SD/MMC Controller"
|
|
(
|
|
menuitem "SDMMC-1" "per , ""SD/MMC Controller,SDMMC-1"""
|
|
menuitem "SDMMC-2" "per , ""SD/MMC Controller,SDMMC-2"""
|
|
menuitem "SDMMC-3" "per , ""SD/MMC Controller,SDMMC-3"""
|
|
menuitem "SDMMC-4" "per , ""SD/MMC Controller,SDMMC-4"""
|
|
)
|
|
popup "SATA Controller"
|
|
(
|
|
menuitem "IPFS registers" "per , ""SATA Controller,IPFS registers"""
|
|
menuitem "SATA Configuration space" "per , ""SATA Controller,SATA Configuration space"""
|
|
menuitem "DMA Control Registers" "per , ""SATA Controller,DMA Control Registers"""
|
|
menuitem "AUX Registers" "per , ""SATA Controller,AUX Registers"""
|
|
)
|
|
popup "PCIe"
|
|
(
|
|
menuitem "PCIE_A1 Registers" "per , ""PCIe,PCIE_A1 Registers"""
|
|
menuitem "PCIE_A2 Registers" "per , ""PCIe,PCIE_A2 Registers"""
|
|
menuitem "PCIE_A3 Registers" "per , ""PCIe,PCIE_A3 Registers"""
|
|
)
|
|
popup "I2C Controller"
|
|
(
|
|
menuitem "I2C" "per , ""I2C Controller,I2C"""
|
|
menuitem "I2C2" "per , ""I2C Controller,I2C2"""
|
|
menuitem "I2C3" "per , ""I2C Controller,I2C3"""
|
|
menuitem "I2C4" "per , ""I2C Controller,I2C4"""
|
|
menuitem "I2C5" "per , ""I2C Controller,I2C5"""
|
|
menuitem "I2C6" "per , ""I2C Controller,I2C6"""
|
|
)
|
|
popup "UART Controller"
|
|
(
|
|
menuitem "UART-A" "per , ""UART Controller,UART-A"""
|
|
menuitem "UART-B" "per , ""UART Controller,UART-B"""
|
|
menuitem "UART-C" "per , ""UART Controller,UART-C"""
|
|
menuitem "UART-D" "per , ""UART Controller,UART-D"""
|
|
)
|
|
popup "SPI Controller"
|
|
(
|
|
menuitem "2B-1" "per , ""SPI Controller,2B-1"""
|
|
menuitem "2B-2" "per , ""SPI Controller,2B-2"""
|
|
menuitem "2B-3" "per , ""SPI Controller,2B-3"""
|
|
menuitem "2B-4" "per , ""SPI Controller,2B-4"""
|
|
)
|
|
menuitem "Quad SPI" "per , ""Quad SPI"""
|
|
menuitem "PWM Controller" "per , ""PWM Controller"""
|
|
popup "THERMAL SENSOR AND THERMAL THROTTLING CONTROLLER"
|
|
(
|
|
menuitem "SOC_THERM" "per , ""THERMAL SENSOR AND THERMAL THROTTLING CONTROLLER,SOC_THERM"""
|
|
menuitem "FUSE_THERM" "per , ""THERMAL SENSOR AND THERMAL THROTTLING CONTROLLER,FUSE_THERM"""
|
|
)
|
|
menuitem "Boot and Power Management Processor Lite" "per , ""Boot and Power Management Processor Lite"""
|
|
)
|
|
)
|