328 lines
11 KiB
Plaintext
328 lines
11 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: iMX53 Specific Menu
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; @Props: Released
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; @Author: ART, CIN, KAR, SOL
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; @Changelog:
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; 2011-03-16
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; 2012-02-06
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; @Manufacturer: NXP
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; @Core: Cortex-A8
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; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menmcimx53.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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popup "[:chip]Core Registers (Cortex-A8)"
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(
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menuitem "[:chip]ID Registers" "per , ""Core Registers (Cortex-A8),ID Registers"""
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menuitem "[:chip]System Control and Configuration" "per , ""Core Registers (Cortex-A8),System Control and Configuration"""
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menuitem "[:chip]Memory Management Unit" "per , ""Core Registers (Cortex-A8),Memory Management Unit"""
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menuitem "[:chip]Cache Control and Configuration" "per , ""Core Registers (Cortex-A8),Cache Control and Configuration"""
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menuitem "[:chip]L2 Cache Control and Configuration" "per , ""Core Registers (Cortex-A8),L2 Cache Control and Configuration"""
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menuitem "[:chip]System Performance Monitor" "per , ""Core Registers (Cortex-A8),System Performance Monitor"""
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menuitem "[:chip]Debug Registers" "per , ""Core Registers (Cortex-A8),Debug Registers"""
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menuitem "[:chip]Breakpoint Registers" "per , ""Core Registers (Cortex-A8),Breakpoint Registers"""
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menuitem "[:chip]Watchpoint Control Registers" "per , ""Core Registers (Cortex-A8),Watchpoint Control Registers"""
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)
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separator
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menuitem "ARM CORTEX Platform Control" "per , ""ARM CORTEX Platform Control"""
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menuitem "AHBMAX" "per , ""AHBMAX (Multi-Layer AHB Crossbar Switch)"""
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menuitem "AUDMUX" "per , ""AUDMUX (Digital Audio Mux)"""
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menuitem "ASRC" "per , ""ASRC (Asynchronous Sample Rate Converter)"""
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menuitem "CCM" "per , ""CCM (Clock Controller Module)"""
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menuitem "CSPI" "per , ""CSPI (Configurable Serial Peripheral Interface)"""
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menuitem "DPLL-IP" "per , ""DPLL-IP (Digital Phase Lock Loop Interface)"""
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menuitem "DVFSC" "per , ""DVFSC (Dynamic Voltage Frequency Scaling)"""
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menuitem "DVFSP" "per , ""DVFSP (Dynamic Voltage Frequency Scaling for Peripherals)"""
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menuitem "eCSPI" "per , ""ECSPI (Configurable Serial Peripheral Interface)"""
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menuitem "EIM" "per , ""EIM (External Interface Module)"""
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menuitem "EPIT" "per , ""EPIT (Enhanced Periodic Interrupt Timer)"""
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menuitem "ESAI" "per , ""ESAI (Enhanced Serial Audio Interface)"""
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menuitem "ESDCTL" "per , ""ESDCTL (Enhanced SDRAM Controller)"""
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menuitem "eSDHC" "per , ""eSDHC (Enhanced Secured Digital Host Controller)"""
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menuitem "EXTMC" "per , ""EXTMC (External Memory Controller)"""
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menuitem "FEC" "per , ""FEC (Fast Ethernet Controller)"""
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menuitem "FIRI" "per , ""FIRI (Fast Infrared Interface)"""
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if (cpu()!="iMX535")
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(
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menuitem "FlexCAN" "per , ""FlexCAN (Controller Area Network)"""
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)
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menuitem "GPC" "per , ""GPC (Global Power Controller)"""
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menuitem "GPIO" "per , ""GPIO (General Purpose Input/Output)"""
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menuitem "GPT" "per , ""GPT (General Purpose Timer)"""
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menuitem "I2C" "per , ""I2C (Inter IC)"""
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menuitem "IIM" "per , ""IIM (IC Identification)"""
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menuitem "IOMUXC" "per , ""IOMUXC (IOMUX Controller)"""
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menuitem "IPTP" "per , ""IPTP (IEEE 1588 Precision Time Protocol Assist)"""
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menuitem "IPU" "per , ""IPU (Image Processing Unit)"""
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menuitem "KPP" "per , ""KPP (Keypad Port)"""
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menuitem "M4IF" "per , ""M4IF (Multi Master Multi Memory Interface)"""
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menuitem "MLB" "per , ""MLB (Media Local Bus)"""
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menuitem "NFC" "per , ""NFC (NAND Flash Controller)"""
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menuitem "OWIRE" "per , ""OWIRE (1-Wire Block)"""
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menuitem "PATA" "per , ""PATA (Parallel Advanced Technology Attachment)"""
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menuitem "PLARB1" "per , ""PLARB1 (PL301 4x1 AXI Arbiter)"""
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menuitem "PLARB2" "per , ""PLARB2 (PL301 2x2 Arbiter)"""
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menuitem "PWM" "per , ""PWM (Pulse-Width Modulator)"""
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menuitem "ROMC" "per , ""ROMC (ROM Controller With Patch)"""
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if (cpu()!="iMX538")
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(
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menuitem "SATA" "per , ""SATA (Serial Advanced Technology Attachment Controller)"""
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)
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menuitem "SDMA" "per , ""SDMA (Smart Direct Memory Access Controller)"""
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menuitem "SPDIF" "per , ""SPDIF (Sony/Philips Digital Interface)"""
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menuitem "SRC" "per , ""SRC (System Reset Controller)"""
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menuitem "SRPGC" "per , ""SRPGC (State Ratention Gating Controller)"""
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menuitem "SRTC" "per , ""SRTC (Secure Real Time Clock)"""
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menuitem "SSI" "per , ""SSI (Synchronous Serial Interface)"""
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menuitem "TVEv2" "per , ""TVEv2 (Television Encoder)"""
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menuitem "TZIC" "per , ""TZIC (TrustZone Interrupt Controller)"""
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menuitem "UART" "per , ""UART (Universal Asynchronous Receiver/Transmitter)"""
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menuitem "USB" "per , ""USB (Universal Serial Bus Controller)"""
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if (cpu()!="iMX534")
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(
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menuitem "VPU" "per , ""VPU (Video Processing Unit)"""
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)
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menuitem "WDOG" "per , ""WDOG (Watchdog Timer)"""
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)
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)
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