304 lines
8.5 KiB
Plaintext
304 lines
8.5 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: iMX28 Specific Menu
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; @Props: Released
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; @Author: HUB, SLA, SOL
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; @Changelog: 2012-02-21
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; @Manufacturer: NXP
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; @Core: ARM926EJ-S
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; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menmcimx28.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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menuitem "[:chip]ID Registers" "per , ""ARM Core Registers,ID Registers"""
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menuitem "[:chip]MMU Control and Configuration" "per , ""ARM Core Registers,MMU Control and Configuration"""
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menuitem "[:chip]Cache Control and Configuration" "per , ""ARM Core Registers,Cache Control and Configuration"""
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menuitem "[:chip]TCM Control and Configuration" "per , ""ARM Core Registers,TCM Control and Configuration"""
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menuitem "[:chip]Test and Debug" "per , ""ARM Core Registers,Test and Debug"""
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menuitem "[:chip]ICEbreaker" "per , ""ARM Core Registers,ICEbreaker"""
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separator
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menuitem "ICOLL" "per , ""ICOLL (Interrupt Collector)"""
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menuitem "APBHDMA" "per , ""APBHDMA (AHB-to-APBH Bridge with DMA)"""
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menuitem "APBXDMA" "per , ""APBXDMA (AHB-to-APBX Bridge with DMA)"""
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menuitem "GPIO" "per , ""GPIO (Pin Control and GPIO)"""
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menuitem "CLKCTL" "per , ""CLKCTL (Clock Controller)"""
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menuitem "Power Supply" "per , ""Power Supply"""
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menuitem "DCP" "per , ""DCP (Data Co-Processor)"""
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menuitem "EMI" "per , ""EMI (External Memory Interface)"""
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menuitem "GPMI" "per , ""GPMI (General-Purpose Media Interface)"""
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menuitem "BCH" "per , ""BCH (20-Bit Correcting ECC Accelerator)"""
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menuitem "SSP" "per , ""SSP (Synchronous Serial Ports)"""
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menuitem "DIGCTL" "per , ""DIGCTL (Digital Control and On-Chip RAM)"""
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menuitem "OCOTP" "per , ""OCOTP (On-Chip OTP Controller)"""
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menuitem "PERFMON" "per , ""PERFMON (Performance Monitor)"""
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menuitem "RTC" "per , ""RTC (Real Time Clock)"""
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menuitem "TIMROT" "per , ""TIMROT (Timers and Rotary Decoder)"""
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menuitem "DUART" "per , ""DUART (Debug Universal Asynchronous Receiver and Transmitter)"""
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if (cpu()!="iMX283")
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(
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menuitem "FlexCAN" "per , ""FlexCAN (Controller Area Network)"""
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)
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menuitem "ENET" "per , ""ENET (Ethernet Controller)"""
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menuitem "I2C" "per , ""I2C (Inter-Intergrated Circuit)"""
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menuitem "PWM" "per , ""PWM (Pulse-Width Modulator)"""
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if (cpu()=="iMX287")
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(
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menuitem "SWITCH" "per , ""SWITCH (Programmable 3-Port Ethernet Switch with QOS)"""
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)
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menuitem "UARTAPP" "per , ""UARTAPP (Application Universal Asynchronous Receiver and Transmitter)"""
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menuitem "USB" "per , ""USB (USB High-Speed On-the-Go Host)"""
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menuitem "USBPHY" "per , ""USBPHY (USB Physical Interface)"""
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if (cpu()!="iMX281")
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(
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menuitem "LCDIF" "per , ""LCDIF (LCD Interface)"""
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)
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menuitem "PXP" "per , ""PXP (Pixel Pipeline)"""
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menuitem "SAIF" "per , ""SAIF (Serial Audio Interface)"""
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if (cpu()!="iMX283")
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(
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menuitem "SPDIF" "per , ""SPDIF (Sony/Philips Digital Interface)"""
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)
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menuitem "HSADC" "per , ""HSADC (High-Speed ADC)"""
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menuitem "LRADC" "per , ""LRADC (Low-Resolution ADC and Touch-Screen Interface)"""
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)
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)
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