352 lines
9.9 KiB
Plaintext
352 lines
9.9 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: IMXRT1010 Specific Menu
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; @Props: Released
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; @Author: KOL, KRZ
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; @Changelog: 2019-12-19 KOL
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; @Changelog: 2022-02-28 KRZ
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; @Manufacturer: NXP - NXP Semiconductors
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; @Core: Cortex-M7F
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; @Chip: IMXRT1011
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menimxrt1010.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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popup "[:chip]Core Registers (Cortex-M7F)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M7F),System Control"""
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menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M7F),Memory Protection Unit (MPU)"""
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menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M7F),Nested Vectored Interrupt Controller (NVIC)"""
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menuitem "[:chip]FPU;Floating-point Unit" "per , ""Core Registers (Cortex-M7F),Floating-point Unit (FPU)"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M7F),Debug,Core Debug"""
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menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M7F),Debug,Flash Patch and Breakpoint Unit (FPB)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M7F),Debug,Data Watchpoint and Trace Unit (DWT)"""
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)
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)
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separator
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popup "AIPSTZ (AHB to IP Bridge Trust Zone)"
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(
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menuitem "AIPSTZ1" "per , ""AIPSTZ (AHB to IP Bridge Trust Zone),AIPSTZ1"""
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menuitem "AIPSTZ2" "per , ""AIPSTZ (AHB to IP Bridge Trust Zone),AIPSTZ2"""
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)
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menuitem "DCDC" "per , ""DCDC"""
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menuitem "PIT" "per , ""PIT"""
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menuitem "ADC_ETC" "per , ""ADC_ETC"""
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menuitem "AOI" "per , ""AOI (AND/OR/INVERT module)"""
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menuitem "XBARA" "per , ""XBARA (Crossbar Switch)"""
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menuitem "FLEXSPI" "per , ""FLEXSPI (FlexSPI)"""
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menuitem "OTFAD" "per , ""OTFAD"""
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menuitem "IOMUXC_SNVS_GPR" "per , ""IOMUXC_SNVS_GPR (IOMUXC)"""
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menuitem "IOMUXC_SNVS" "per , ""IOMUXC_SNVS"""
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menuitem "IOMUXC_GPR" "per , ""IOMUXC_GPR (IOMUX Controller General Purpose Registers)"""
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menuitem "FLEXRAM" "per , ""FLEXRAM"""
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menuitem "EWM" "per , ""EWM"""
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popup "WDOG (Watchdog Timer Unit)"
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(
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menuitem "WDOG1" "per , ""WDOG (Watchdog Timer Unit),WDOG1"""
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menuitem "WDOG2" "per , ""WDOG (Watchdog Timer Unit),WDOG2"""
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)
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menuitem "RTWDOG" "per , ""RTWDOG"""
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menuitem "ADC1" "per , ""ADC (Analog-to-Digital Converter)"""
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menuitem "TRNG" "per , ""TRNG"""
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menuitem "SNVS" "per , ""SVNS (Secure Non-Volatile Storage)"""
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menuitem "CCM_ANALOG" "per , ""CCM_ANALOG"""
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menuitem "PMU" "per , ""PMU (Program Memory Unit)"""
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menuitem "TEMPMON" "per , ""TEMPMON (Temperature Monitor)"""
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menuitem "USB_ANALOG" "per , ""USB_ANALOG (USB Analog)"""
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menuitem "XTALOSC24M" "per , ""XTALOSC24M"""
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menuitem "USBPHY" "per , ""USBPHY (USBPHY Register Reference Index)"""
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menuitem "CSU" "per , ""CSU (CSU registers)"""
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menuitem "USB" "per , ""USB (Universal Serial Bus)"""
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menuitem "USBNC" "per , ""USBNC"""
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menuitem "DMA0" "per , ""DMA"""
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menuitem "DMAMUX" "per , ""DMAMUX"""
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menuitem "DCP" "per , ""DCP (DCP register reference index)"""
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menuitem "GPC" "per , ""GPC"""
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menuitem "PGC" "per , ""PGC"""
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menuitem "SRC" "per , ""SRC (System Reset Controller)"""
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menuitem "CCM" "per , ""CCM (Clock Controller Module)"""
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menuitem "ROMC" "per , ""ROMC"""
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popup "LPUART"
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(
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menuitem "LPUART1" "per , ""LPUART,LPUART1"""
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menuitem "LPUART2" "per , ""LPUART,LPUART2"""
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menuitem "LPUART3" "per , ""LPUART,LPUART3"""
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menuitem "LPUART4" "per , ""LPUART,LPUART4"""
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)
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popup "LPSPI"
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(
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menuitem "LPSPI1" "per , ""LPSPI,LPSPI1"""
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menuitem "LPSPI2" "per , ""LPSPI,LPSPI2"""
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)
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popup "LPI2C"
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(
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menuitem "LPI2C1" "per , ""LPI2C,LPI2C1"""
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menuitem "LPI2C2" "per , ""LPI2C,LPI2C2"""
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)
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menuitem "FLEXIO1" "per , ""FLEXIO"""
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popup "GPIO (General Purpose I/O Ports And Peripheral I/O Lines)"
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(
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menuitem "GPIO1" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIO1"""
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menuitem "GPIO5" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIO5"""
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menuitem "GPIO2" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIO2"""
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)
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menuitem "PWM1" "per , ""PWM (Pulse-Width Modulator)"""
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menuitem "SPDIF" "per , ""SPDIF (Sony/Philips Digital Interface)"""
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popup "I2S (Inter-Integrated Sound Bus Controller)"
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(
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menuitem "SAI1" "per , ""I2S (Inter-Integrated Sound Bus Controller),SAI1"""
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menuitem "SAI3" "per , ""I2S (Inter-Integrated Sound Bus Controller),SAI3"""
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)
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popup "GPT (General Purpose Timer)"
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(
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menuitem "GPT1" "per , ""GPT (General Purpose Timer),GPT1"""
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menuitem "GPT2" "per , ""GPT (General Purpose Timer),GPT2"""
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)
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menuitem "OCOTP" "per , ""OCOTP"""
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menuitem "IOMUXC" "per , ""IOMUXC (IOMUX Controller)"""
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menuitem "KPP" "per , ""KPP (KPP Registers)"""
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)
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)
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