494 lines
21 KiB
Plaintext
494 lines
21 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: IMX7 Specific Menu
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; @Props: Released
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; @Author: TER, JRK, WMA, KST, PAK
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; @Changelog: 2015-11-16 TER
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; 2016-06-03 JRK
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; 2017-03-30 KST
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; 2020-05-26 PAK
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; @Manufacturer: NXP - NXP Semiconductors
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; @Core: Cortex-A7MPCore, Cortex-M4F
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; @Chip: IMX7SOLO-CM4, IMX7SOLO-CA7, IMX7DUAL-CM4, IMX7DUAL-CA7
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; @Copyright: (C) 1989-2020 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menimx7.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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if ((CORENAME()=="CORTEXA7")||(CORENAME()=="CORTEXA7MPCORE"))
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(
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popup "[:chip]Core Registers (Cortex-A7MPCore)"
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(
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menuitem "[:chip]ID Registers" "per , ""Core Registers (Cortex-A7MPCore),ID Registers"""
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menuitem "[:chip]System Control and Configuration" "per , ""Core Registers (Cortex-A7MPCore),System Control and Configuration"""
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menuitem "[:chip]Memory Management Unit" "per , ""Core Registers (Cortex-A7MPCore),Memory Management Unit"""
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menuitem "[:chip]Virtualization Extensions" "per , ""Core Registers (Cortex-A7MPCore),Virtualization Extensions"""
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menuitem "[:chip]Cache Control and Configuration" "per , ""Core Registers (Cortex-A7MPCore),Cache Control and Configuration"""
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menuitem "[:chip]System Performance Monitor" "per , ""Core Registers (Cortex-A7MPCore),System Performance Monitor"""
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menuitem "[:chip]System Timer Register" "per , ""Core Registers (Cortex-A7MPCore),System Timer Register"""
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separator
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menuitem "[:chip]Debug Registers" "per , ""Core Registers (Cortex-A7MPCore),Debug Registers"""
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menuitem "[:chip]Breakpoint Registers" "per , ""Core Registers (Cortex-A7MPCore),Breakpoint Registers"""
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menuitem "[:chip]Watchpoint Control Registers" "per , ""Core Registers (Cortex-A7MPCore),Watchpoint Control Registers"""
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separator
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menuitem "[:chip]Interrupt Controller" "per , ""Core Registers (Cortex-A7MPCore),Interrupt Controller"""
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)
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)
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else
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(
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popup "[:chip]Core Registers (Cortex-M4F)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M4F),System Control"""
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menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M4F),Memory Protection Unit"""
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menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M4F),Nested Vectored Interrupt Controller"""
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menuitem "[:chip]FPU;Floating-point Unit" "per , ""Core Registers (Cortex-M4F),Floating-point Unit"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M4F),Debug,Core Debug"""
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menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M4F),Debug,Flash Patch and Breakpoint Unit (FPB)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M4F),Debug,Data Watchpoint and Trace Unit (DWT)"""
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)
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)
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)
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separator
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popup "RDC;(Resource Domain Control)"
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(
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menuitem "RDC;(Resource Domain Control)" "per , ""RDC (Resource Domain Control),RDC Common Registers"""
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popup "RDC SEMA42;(Resource Domain Control Semaphore)"
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(
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menuitem "Semaphore 1" "per , ""RDC (Resource Domain Control),RDC SEMA42 (Resource Domain Control Semaphore),Semaphore 1"""
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menuitem "Semaphore 2" "per , ""RDC (Resource Domain Control),RDC SEMA42 (Resource Domain Control Semaphore),Semaphore 2"""
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)
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)
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menuitem "LMEM;(Local Memory Controller)" "per , ""LMEM (Local Memory Controller)"""
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menuitem "MCM;(Miscellaneous Control Module)" "per , ""MCM (Miscellaneous Control Module)"""
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popup "MU;(Messaging Unit)"
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(
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menuitem "MUA;(MU Processor A-side)" "per , ""MU (Messaging Unit),MUA (MU Processor A-side)"""
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menuitem "MUB;(MU Processor B-side)" "per , ""MU (Messaging Unit),MUB (MU Processor B-side)"""
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)
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menuitem "SEMA4;(Semaphore)" "per , ""SEMA4 (Semaphore)"""
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popup "AIPSTZ;(AHB to IP Bridge)"
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(
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menuitem "AIPSTZ 1" "per , ""AIPSTZ (AHB to IP Bridge),AIPSTZ 1"""
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menuitem "AIPSTZ 2" "per , ""AIPSTZ (AHB to IP Bridge),AIPSTZ 2"""
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menuitem "AIPSTZ 3" "per , ""AIPSTZ (AHB to IP Bridge),AIPSTZ 3"""
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)
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menuitem "SPBA;(Shared Peripheral Bus Arbiter)" "per , ""SPBA (Shared Peripheral Bus Arbiter)"""
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menuitem "ROMCP;(ROM Controller with Patch)" "per , ""ROMCP (ROM Controller with Patch)"""
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popup "CCM;(Clock Control Module)"
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(
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menuitem "CCM" "per , ""CCM (Clock Control Module),CCM"""
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menuitem "CCM_ANALOG;(CCM Analog)" "per , ""CCM (Clock Control Module),CCM_ANALOG (CCM Analog)"""
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)
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menuitem "XTALOSC;(Crystal Oscillator)" "per , ""XTALOSC (Crystal Oscillator)"""
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menuitem "PMU;(Power Management Unit)" "per , ""PMU (Power Management Unit)"""
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popup "GPC;(General Power Controller)"
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(
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menuitem "GPC" "per , ""GPC (General Power Controller),GPC"""
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menuitem "GPC_PGC" "per , ""GPC (General Power Controller),GPC_PGC"""
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)
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menuitem "SNVS;(Secure Non-Volatile Storage)" "per , ""SNVS (Secure Non-Volatile Storage)"""
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menuitem "SRC;(System Reset Controller)" "per , ""SRC (System Reset Controller)"""
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menuitem "OCOTP_CTRL;(On-Chip OTP Controller)" "per , ""OCOTP_CTRL (On-Chip OTP Controller)"""
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menuitem "WDOG;(Watchdog Timer)" "per , ""WDOG (Watchdog Timer)"""
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menuitem "SDMA;(Smart Direct Memory Access Controller)" "per , ""SDMA (Smart Direct Memory Access Controller)"""
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popup "IOMUXC;(IOMUX Controller)"
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(
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menuitem "IOMUXC_GPR" "per , ""IOMUXC (IOMUX Controller),IOMUXC_GPR"""
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menuitem "IOMUXC_LPSR" "per , ""IOMUXC (IOMUX Controller),IOMUXC_LPSR"""
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menuitem "IOMUXC_LPSR_GPR" "per , ""IOMUXC (IOMUX Controller),IOMUXC_LPSR_GPR"""
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menuitem "IOMUXC" "per , ""IOMUXC (IOMUX Controller),IOMUXC"""
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)
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popup "GPIO;(General Purpose Input/Output)"
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(
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menuitem "GPIO1" "per , ""GPIO (General Purpose Input/Output),GPIO1"""
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menuitem "GPIO2" "per , ""GPIO (General Purpose Input/Output),GPIO2"""
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menuitem "GPIO3" "per , ""GPIO (General Purpose Input/Output),GPIO3"""
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menuitem "GPIO4" "per , ""GPIO (General Purpose Input/Output),GPIO4"""
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menuitem "GPIO5" "per , ""GPIO (General Purpose Input/Output),GPIO5"""
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menuitem "GPIO6" "per , ""GPIO (General Purpose Input/Output),GPIO6"""
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menuitem "GPIO7" "per , ""GPIO (General Purpose Input/Output),GPIO7"""
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)
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popup "DDRC;(DDR Controller)"
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(
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menuitem "DDRC" "per , ""DDRC (DDR Controller),DDRC"""
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menuitem "DDRC_MP;(DDRMC Multi Port)" "per , ""DDRC (DDR Controller),DDRC_MP (DDRMC Multi Port)"""
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)
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menuitem "DDRP;(DDR PHY)" "per , ""DDRP (DDR PHY)"""
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menuitem "APBH-Bridge-DMA;(AHB-to-APBH Bridge with DMA)" "per , ""APBH-Bridge-DMA (AHB-to-APBH Bridge with DMA)"""
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menuitem "BCH;(62BIT Correcting ECC Accelerator)" "per , ""BCH (62BIT Correcting ECC Accelerator)"""
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menuitem "GPMI;(General Purpose Media Interface)" "per , ""GPMI (General Purpose Media Interface)"""
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menuitem "EIM;(External Interface Module)" "per , ""EIM (External Interface Module)"""
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popup "ECSPI;(Enhanced Configurable Serial Peripheral Interface)"
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(
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menuitem "ECSPI_1" "per , ""ECSPI (Enhanced Configurable Serial Peripheral Interface),ECSPI_1"""
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menuitem "ECSPI_2" "per , ""ECSPI (Enhanced Configurable Serial Peripheral Interface),ECSPI_2"""
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menuitem "ECSPI_3" "per , ""ECSPI (Enhanced Configurable Serial Peripheral Interface),ECSPI_3"""
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menuitem "ECSPI_4" "per , ""ECSPI (Enhanced Configurable Serial Peripheral Interface),ECSPI_4"""
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)
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popup "QuadSPI;(Quad Serial Peripheral Interface)"
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(
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menuitem "AHB;(AHB RX Data Buffer)" "per , ""QuadSPI (Quad Serial Peripheral Interface),AHB (AHB RX Data Buffer)"""
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menuitem "QuadSPI_1" "per , ""QuadSPI (Quad Serial Peripheral Interface),QuadSPI_1"""
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menuitem "QuadSPI_2" "per , ""QuadSPI (Quad Serial Peripheral Interface),QuadSPI_2"""
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)
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popup "uSDHC;(Ultra Secured Digital Host Controller)"
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(
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menuitem "uSDHC_1" "per , ""uSDHC (Ultra Secured Digital Host Controller),uSDHC_1"""
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menuitem "uSDHC_2" "per , ""uSDHC (Ultra Secured Digital Host Controller),uSDHC_2"""
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menuitem "uSDHC_3" "per , ""uSDHC (Ultra Secured Digital Host Controller),uSDHC_3"""
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)
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popup "ENET;(Ethernet MAC)"
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(
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menuitem "ENET_1" "per , ""ENET (Ethernet MAC),ENET_1"""
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if (!(CPUIS("IMX7SOLO-CM4")||CPUIS("IMX7SOLO-CA7")))
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(
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menuitem "ENET_2" "per , ""ENET (Ethernet MAC),ENET_2"""
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)
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)
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popup "SIM;(Subscriber Identification Module)"
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(
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menuitem "SIM_1" "per , ""SIM (Subscriber Identification Module),SIM_1"""
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menuitem "SIM_2" "per , ""SIM (Subscriber Identification Module),SIM_2"""
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)
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if (CPUIS("IMX7DUAL-CM4")||CPUIS("IMX7DUAL-CA7"))
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(
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menuitem "PCIe;(PCI Express Controller)" "per , ""PCIe (PCI Express Controller)"""
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)
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if (!(CPUIS("IMX7SOLO-CM4")||CPUIS("IMX7SOLO-CA7")))
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(
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popup "PCIe_PHY;(PCI Express PHY)"
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(
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menuitem "PCIE_PHY_CMN;(PHY Register for CMN Block)" "per , ""PCIe_PHY (PCI Express PHY),PCIE_PHY_CMN (PHY Register for CMN Block)"""
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menuitem "PCIE_PHY_TRSV;(PHY Register for Transceiver Block)" "per , ""PCIe_PHY (PCI Express PHY),PCIE_PHY_TRSV (PHY Register for Transceiver Block)"""
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)
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)
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popup "USB;(Universal Serial Bus Controller)"
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(
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menuitem "USBNC;(USB Non-Core)" "per , ""USB (Universal Serial Bus Controller),USBNC (USB Non-Core)"""
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popup "USB;(USB Core)"
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(
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menuitem "USB_OTG1;(USB_OTG1)" "per , ""USB (Universal Serial Bus Controller),USB (USB Core),USB_OTG1 (USB_OTG1)"""
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if (!(CPUIS("IMX7SOLO-CM4")||CPUIS("IMX7SOLO-CA7")))
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(
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menuitem "USB_OTG2;(USB_OTG2)" "per , ""USB (Universal Serial Bus Controller),USB (USB Core),USB_OTG2 (USB_OTG2)"""
|
|
)
|
|
menuitem "USB_HSIC;(USB_HSIC)" "per , ""USB (Universal Serial Bus Controller),USB (USB Core),USB_HSIC (USB_HSIC)"""
|
|
)
|
|
)
|
|
popup "GPT;(General Purpose Timer)"
|
|
(
|
|
menuitem "GPT1" "per , ""GPT (General Purpose Timer),GPT1"""
|
|
menuitem "GPT2" "per , ""GPT (General Purpose Timer),GPT2"""
|
|
menuitem "GPT3" "per , ""GPT (General Purpose Timer),GPT3"""
|
|
menuitem "GPT4" "per , ""GPT (General Purpose Timer),GPT4"""
|
|
)
|
|
popup "FTM;(Flextimer)"
|
|
(
|
|
menuitem "FTM1" "per , ""FTM (Flextimer),FTM1"""
|
|
menuitem "FTM2" "per , ""FTM (Flextimer),FTM2"""
|
|
)
|
|
popup "PWM;(Pulse Width Modulation)"
|
|
(
|
|
menuitem "PWM1" "per , ""PWM (Pulse Width Modulation),PWM1"""
|
|
menuitem "PWM2" "per , ""PWM (Pulse Width Modulation),PWM2"""
|
|
menuitem "PWM3" "per , ""PWM (Pulse Width Modulation),PWM3"""
|
|
menuitem "PWM4" "per , ""PWM (Pulse Width Modulation),PWM4"""
|
|
)
|
|
popup "eLCDIF;(Enhanced LCD Interface)"
|
|
(
|
|
menuitem "eLCDIF1" "per , ""eLCDIF (Enhanced LCD Interface),eLCDIF1"""
|
|
menuitem "eLCDIF2" "per , ""eLCDIF (Enhanced LCD Interface),eLCDIF2"""
|
|
)
|
|
popup "CSI;(CMOS Sensor Interface)"
|
|
(
|
|
menuitem "CSI1" "per , ""CSI (CMOS Sensor Interface),CSI1"""
|
|
if (!(CPUIS("IMX7SOLO-CM4")||CPUIS("IMX7SOLO-CA7")))
|
|
(
|
|
menuitem "CSI2" "per , ""CSI (CMOS Sensor Interface),CSI2"""
|
|
)
|
|
)
|
|
menuitem "MIPI_DSI;(MIPI DSI Host Controller)" "per , ""MIPI_DSI (MIPI DSI Host Controller)"""
|
|
menuitem "MIPI_CSI2;(MIPI CSI2 Host Controller)" "per , ""MIPI_CSI2 (MIPI CSI2 Host Controller)"""
|
|
if (!(CPUIS("IMX7SOLO-CM4")||CPUIS("IMX7SOLO-CA7")))
|
|
(
|
|
menuitem "EPDC;(Electrophoretic Display Controller)" "per , ""EPDC (Electrophoretic Display Controller)"""
|
|
)
|
|
menuitem "PXP;(Pixel Pipeline)" "per , ""PXP (Pixel Pipeline)"""
|
|
popup "SAI;(Synchronous Audio Interface)"
|
|
(
|
|
menuitem "I2S1" "per , ""SAI (Synchronous Audio Interface),I2S1"""
|
|
menuitem "I2S2" "per , ""SAI (Synchronous Audio Interface),I2S2"""
|
|
menuitem "I2S3" "per , ""SAI (Synchronous Audio Interface),I2S3"""
|
|
)
|
|
popup "ADC;(Analog-to-Digital Converter)"
|
|
(
|
|
menuitem "ADC1" "per , ""ADC (Analog-to-Digital Converter),ADC1"""
|
|
menuitem "ADC2" "per , ""ADC (Analog-to-Digital Converter),ADC2"""
|
|
)
|
|
menuitem "TEMPMON;(Temperature Monitor)" "per , ""TEMPMON (Temperature Monitor)"""
|
|
popup "FLEXCAN;(Flexible Controller Area Network)"
|
|
(
|
|
menuitem "FLEXCAN1" "per , ""FLEXCAN (Flexible Controller Area Network),FLEXCAN1"""
|
|
menuitem "FLEXCAN2" "per , ""FLEXCAN (Flexible Controller Area Network),FLEXCAN2"""
|
|
)
|
|
popup "I2C;(I2C Controller)"
|
|
(
|
|
menuitem "I2C1" "per , ""I2C (I2C Controller),I2C1"""
|
|
menuitem "I2C2" "per , ""I2C (I2C Controller),I2C2"""
|
|
menuitem "I2C3" "per , ""I2C (I2C Controller),I2C3"""
|
|
menuitem "I2C4" "per , ""I2C (I2C Controller),I2C4"""
|
|
)
|
|
popup "UART;(Universal Asynchronous Receiver/Transmitter)"
|
|
(
|
|
menuitem "UART1" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART1"""
|
|
menuitem "UART2" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART2"""
|
|
menuitem "UART3" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART3"""
|
|
menuitem "UART4" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART4"""
|
|
menuitem "UART5" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART5"""
|
|
menuitem "UART6" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART6"""
|
|
menuitem "UART7" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART7"""
|
|
)
|
|
menuitem "KPP;(Keypad Port)" "per , ""KPP (Keypad Port)"""
|
|
)
|
|
)
|