341 lines
9.5 KiB
Plaintext
341 lines
9.5 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: IMC300 Specific Menu
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; @Props: Released
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; @Author: JON
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; @Changelog: 2022-05-12 JON
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; @Manufacturer: INFINEON - Infineon Technologies AG
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; @Doc: SVD generated (SVD2PER 1.8.0), based on: IMC300A.svd (Ver. 1.0)
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; @Core: Cortex-M0
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; @Chip: IMC301A, IMC302A
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menimc300.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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popup "[:chip]Core Registers (Cortex-M0)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M0),System Control"""
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menuitem "[:chip]Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M0),Nested Vectored Interrupt Controller (NVIC)"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M0),Debug,Core Debug"""
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menuitem "[:chip]BPU;Breakpoint Unit" "per , ""Core Registers (Cortex-M0),Debug,Breakpoint Unit (BPU)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M0),Debug,Data Watchpoint and Trace Unit (DWT)"""
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)
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)
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separator
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menuitem "ADC" "per , ""ADC (Analog to Digital Converter)"""
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popup "CAN (Controller Area Networks)"
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(
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menuitem "CAN" "per , ""CAN (Controller Area Networks),CAN"""
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menuitem "CAN_MO" "per , ""CAN (Controller Area Networks),CAN_MO"""
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menuitem "CAN_NODE0" "per , ""CAN (Controller Area Networks),CAN_NODE0"""
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menuitem "CAN_NODE1" "per , ""CAN (Controller Area Networks),CAN_NODE1"""
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)
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popup "CCU4 (Capture Compare Unit 4 - Unit 0)"
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(
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menuitem "CCU40" "per , ""CCU4 (Capture Compare Unit 4 - Unit 0),CCU40"""
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menuitem "CCU40_CC40" "per , ""CCU4 (Capture Compare Unit 4 - Unit 0),CCU40_CC40"""
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menuitem "CCU40_CC41" "per , ""CCU4 (Capture Compare Unit 4 - Unit 0),CCU40_CC41"""
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menuitem "CCU40_CC42" "per , ""CCU4 (Capture Compare Unit 4 - Unit 0),CCU40_CC42"""
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menuitem "CCU40_CC43" "per , ""CCU4 (Capture Compare Unit 4 - Unit 0),CCU40_CC43"""
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menuitem "CCU41" "per , ""CCU4 (Capture Compare Unit 4 - Unit 0),CCU41"""
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menuitem "CCU41_CC40" "per , ""CCU4 (Capture Compare Unit 4 - Unit 0),CCU41_CC40"""
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menuitem "CCU41_CC41" "per , ""CCU4 (Capture Compare Unit 4 - Unit 0),CCU41_CC41"""
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menuitem "CCU41_CC42" "per , ""CCU4 (Capture Compare Unit 4 - Unit 0),CCU41_CC42"""
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menuitem "CCU41_CC43" "per , ""CCU4 (Capture Compare Unit 4 - Unit 0),CCU41_CC43"""
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)
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popup "DAC (SD-DAC)"
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(
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menuitem "DAC" "per , ""DAC (SD-DAC),DAC"""
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menuitem "DAC_CH0" "per , ""DAC (SD-DAC),DAC_CH0"""
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menuitem "DAC_CH1" "per , ""DAC (SD-DAC),DAC_CH1"""
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menuitem "DAC_CH2" "per , ""DAC (SD-DAC),DAC_CH2"""
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menuitem "DAC_CH3" "per , ""DAC (SD-DAC),DAC_CH3"""
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menuitem "DAC_CH4" "per , ""DAC (SD-DAC),DAC_CH4"""
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menuitem "DAC_CH5" "per , ""DAC (SD-DAC),DAC_CH5"""
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menuitem "DAC_CH6" "per , ""DAC (SD-DAC),DAC_CH6"""
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menuitem "DAC_CH7" "per , ""DAC (SD-DAC),DAC_CH7"""
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menuitem "DAC_CH8" "per , ""DAC (SD-DAC),DAC_CH8"""
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)
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popup "ERU (Event Request Unit 0)"
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(
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menuitem "ERU0" "per , ""ERU (Event Request Unit 0),ERU0"""
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menuitem "ERU1" "per , ""ERU (Event Request Unit 0),ERU1"""
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)
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menuitem "MATH" "per , ""MATH (Math Coprocessor)"""
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menuitem "NVM" "per , ""NVM (Non Volatile Memory)"""
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menuitem "PAU" "per , ""PAU (PAU Unit)"""
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popup "PORTS"
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(
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menuitem "PORT0" "per , ""PORTS,PORT0"""
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menuitem "PORT1" "per , ""PORTS,PORT1"""
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menuitem "PORT2" "per , ""PORTS,PORT2"""
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menuitem "PORT4" "per , ""PORTS,PORT4"""
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)
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menuitem "POSIF1" "per , ""POSIF (Position Interface 1)"""
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menuitem "PPB" "per , ""PPB (Cortex-M0 Private Peripheral Block)"""
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menuitem "PRNG" "per , ""PRNG (PRNG Unit)"""
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menuitem "RTC" "per , ""RTC (Real-time Counter)"""
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popup "SCU (System Control Unit)"
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(
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menuitem "COMPARATOR" "per , ""SCU (System Control Unit),COMPARATOR"""
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menuitem "SCU_ANALOG" "per , ""SCU (System Control Unit),SCU_ANALOG"""
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)
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menuitem "SCU_CLK" "per , ""SCU_CLK (System Control Unit)"""
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menuitem "SCU_GENERAL" "per , ""SCU_GENERAL (System Control Unit)"""
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menuitem "SCU_INTERRUPT" "per , ""SCU_INTERRUPT (System Control Unit)"""
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menuitem "SCU_POWER" "per , ""SCU_POWER (System Control Unit)"""
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menuitem "SCU_RESET" "per , ""SCU_RESET (System Control Unit)"""
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menuitem "SHS" "per , ""SHS (Sample and Hold ADC Sequencer)"""
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popup "USIC (Universal Serial Interface Controller 0)"
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(
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menuitem "USIC0" "per , ""USIC (Universal Serial Interface Controller 0),USIC0"""
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menuitem "USIC0_CH0" "per , ""USIC (Universal Serial Interface Controller 0),USIC0_CH0"""
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menuitem "USIC0_CH1" "per , ""USIC (Universal Serial Interface Controller 0),USIC0_CH1"""
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menuitem "USIC1" "per , ""USIC (Universal Serial Interface Controller 0),USIC1"""
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menuitem "USIC1_CH0" "per , ""USIC (Universal Serial Interface Controller 0),USIC1_CH0"""
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)
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menuitem "WDT" "per , ""WDT (Watchdog Timer Unit)"""
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)
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)
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