337 lines
11 KiB
Plaintext
337 lines
11 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: Faraday-CA5 Specific Menu
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; @Props: Released
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; @Author: LEM, MKR, SOL, ZAK, MAJ, MKK
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; @Changelog:
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; 2012-02-10
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; 2013-01-08
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; 2014-10-24 MAJ
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; 2014-12-30 MKK
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; 2015-03-23 MKK
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; @Manufacturer: NXP - NXP Semiconductors
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; @Keywords: Vybrid
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; @Chip: VF1*, VF3*, VF4*, VF5*, VF6*, VF7*
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; @Core: Faraday-CA5
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; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menfaradayca5.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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popup "[:chip]Core Registers (Cortex-A5)"
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(
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menuitem "[:chip]ID Registers" "per , ""Core Registers (Cortex-A5),ID Registers"""
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menuitem "[:chip]System Control and Configuration" "per , ""Core Registers (Cortex-A5),System Control and Configuration"""
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menuitem "[:chip]Memory Management Unit" "per , ""Core Registers (Cortex-A5),Memory Management Unit"""
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menuitem "[:chip]Cache Control and Configuration" "per , ""Core Registers (Cortex-A5),Cache Control and Configuration"""
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menuitem "[:chip]L2 Preload Engine" "per , ""Core Registers (Cortex-A5),L2 Preload Engine"""
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menuitem "[:chip]System Performance Monitor" "per , ""Core Registers (Cortex-A5),System Performance Monitor"""
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menuitem "[:chip]Debug" "per , ""Core Registers (Cortex-A5),Debug"""
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separator
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menuitem "[:chip]Interrupt Controller (PL-390)" "per , ""Core Registers (Cortex-A5),Interrupt Controller (PL-390)"""
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)
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separator
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menuitem "IOMUXC" "per , ""IOMUXC (Input/Output Multiplexer Controller)"""
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menuitem "PORT" "per , ""PORT (Port control and interrupts)"""
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menuitem "GPIO" "per , ""GPIO (General-Purpose Input/Output)"""
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menuitem "CCM" "per , ""CCM (Clock Controller Module)"""
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menuitem "ANADIG" "per , ""ANADIG (Anadig Registers)"""
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menuitem "SCSC" "per , ""SCSC (Slow Clock Source Controller Module)"""
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menuitem "CMU" "per , ""CMU (Clock Monitor Unit)"""
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menuitem "GPC" "per , ""GPC (Global Power Controller)"""
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menuitem "VREG" "per , ""VREG (Voltage Regulator)"""
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menuitem "SRC" "per , ""SRC (System Reset Controller)"""
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menuitem "eDMA" "per , ""eDMA (Direct Memory Access Controller)"""
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menuitem "DMAMUX" "per , ""DMAMUX (Direct Memory Access Multiplexer)"""
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menuitem "SEMA4" "per , ""SEMA4 (IPS_Semaphores)"""
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menuitem "EWM" "per , ""EWM (External Watchdog Monitor)"""
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menuitem "WDOG-1" "per , ""WDOG-1 (Watchdog Timer)"""
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menuitem "LMEM" "per , ""LMEM (Local Memory Controller)"""
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// menuitem "GIC" "per , ""GIC (Generic Interrupt Controller)"""
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menuitem "QuadSPI" "per , ""QuadSPI (Quad Serial Peripheral Interface QuadSPI)"""
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menuitem "NFC" "per , ""NFC (NAND Flash Controller)"""
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menuitem "FlexBus" "per , ""FlexBus (External Bus Interface)"""
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menuitem "CRC" "per , ""CRC (Cyclic Redundancy Check)"""
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menuitem "DDRMC" "per , ""DDRMC (LPDDR2/DDR3 SDRAM Memory Controller)"""
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menuitem "CSU" "per , ""CSU (Central Security Unit)"""
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menuitem "OCOTP_CTRL" "per , ""OCOTP_CTRL (On-Chip OTP Controller)"""
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menuitem "DAC" "per , ""DAC (12-bit Digital-to-Analog Converter)"""
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menuitem "ADC" "per , ""ADC-Digital-12b-1MSPS-SAR"""
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menuitem "PDB" "per , ""PDB (Programmable Delay Block)"""
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menuitem "FTM" "per , ""FTM (FlexTimer Registers)"""
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menuitem "PIT" "per , ""PIT (Periodic Interrupt Timer)"""
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menuitem "LPTMR" "per , ""LPTMR (Low-Power Timer)"""
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menuitem "ENET" "per , ""ENET (10/100-Mbps Ethernet MAC)"""
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menuitem "ESW" "per , ""ESW (Ethernet Switch)"""
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menuitem "USB" "per , ""USB (Universal Serial Bus Controller)"""
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menuitem "USBPHY" "per , ""USBPHY (Universal Serial Bus 2.0 Integrated PHY)"""
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menuitem "MediaLB" "per , ""MediaLB (Media Local Bus)"""
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menuitem "FlexCAN" "per , ""FlexCAN"""
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menuitem "SPI" "per , ""SPI (Serial Peripheral Interface)"""
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menuitem "I2C" "per , ""I2C (Inter-Integrated Circuit)"""
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menuitem "UART" "per , ""UART (Universal Asynchronous Receiver/Transmitter)"""
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menuitem "SDHC" "per , ""SDHC (Secured digital host controller)"""
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menuitem "I2S/SAI" "per , ""I2S/SAI (Integrated Interchip Sound/Synchronous Audio Interface)"""
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menuitem "ESAI" "per , ""ESAI (Enhanced Serial Audio Interface)"""
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menuitem "ASRC" "per , ""ASRC (Asynchronous Sample Rate Converter)"""
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menuitem "SPDIF" "per , ""SPDIF (Sony/Philips Digital Interface)"""
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menuitem "DCU4" "per , ""DCU4 (Display Control Unit)"""
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menuitem "LCD64F6B" "per , ""LCD64F6B (LCD Driver)"""
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menuitem "VIU3" "per , ""VIU3 (Video-In)"""
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menuitem "TCON" "per , ""TCON (Timing Controller)"""
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menuitem "RLE_DEC" "per , ""RLE_DEC (Run Length Encoding Decoder)"""
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menuitem "GPU2D" "per , ""GPU2D (2D Graphics Processing Unit)"""
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menuitem "Video subsystem" "per , ""Video subsystem"""
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menuitem "MCM" "per , ""MCM (Miscellaneous Control Module)"""
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menuitem "SNVS" "per , ""SNVS (Secure Non-Volatile Storage)"""
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menuitem "DWPU" "per , ""DWPU (Buddy Device Data Write Processing Unit)"""
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menuitem "CAAM" "per , ""CAAM (Cryptographic Acceleration and Assurance Module)"""
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menuitem "MSCM" "per , ""MSCM (Miscellaneous System Control Module)"""
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popup "AHB-TZASC"
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(
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menuitem "FlexBus" "per , ""AHB_TZASC (AHB-TrustZone Address Space Controller),FlexBus"""
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menuitem "CM4 TCM Backdoor" "per , ""AHB_TZASC (AHB-TrustZone Address Space Controller),CM4's Tightly-Coupled Memory Backdoor Port"""
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menuitem "QuadSPI0" "per , ""AHB_TZASC (AHB-TrustZone Address Space Controller),QuadSPI0"""
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menuitem "QuadSPI1" "per , ""AHB_TZASC (AHB-TrustZone Address Space Controller),QuadSPI1"""
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)
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)
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)
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