34950 lines
2.4 MiB
34950 lines
2.4 MiB
; --------------------------------------------------------------------------------
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; @Title: Zynq7000 On-Chip Peripherals
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; @Props: Released
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; @Author: SOL
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; @Changelog: 2011-04-15 SOL
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; @Manufacturer: XILINX - XILINX
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; @Doc: ug585_zynq-7000_trm.pdf
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; @Core: Cortex-A9
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; @Chip: ZYNQ-7000
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; @Copyright: (C) 1989-2014 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perzynq7000.per 12762 2021-01-18 10:40:58Z pegold $
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config 16. 8.
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width 0xb
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tree "Core Registers (Cortex-A9MPCore)"
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width 0x8
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; --------------------------------------------------------------------------------
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; Identification registers
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; --------------------------------------------------------------------------------
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tree "ID Registers"
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rgroup.long c15:0x0++0x0
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line.long 0x0 "MIDR,Main ID Register"
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hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code"
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bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 16.--19. " ARCH , Architecture" "Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,ARMv7"
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textline " "
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hexmask.long.word 0x0 4.--15. 0x1 " PART ,Primary Part Number"
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bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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rgroup.long c15:0x100++0x0
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line.long 0x0 "CTR,Cache Type Register"
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bitfld.long 0x0 29.--31. " FORMAT ,Format" "Not ARMv7,Not ARMv7,Not ARMv7,Not ARMv7,ARMv7,Not ARMv7,Not ARMv7,Not ARMv7"
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bitfld.long 0x0 24.--27. " CWG ,Cache Writeback Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x0 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 16.--19. " DMINLINE ,D-Cache Minimum Line Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words"
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textline " "
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bitfld.long 0x0 14.--15. " L1POLICY ,L1 Instruction cache policy" "Reserved,ASID,Virtual,Physical"
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bitfld.long 0x0 0.--3. " IMINLINE ,I-Cache Minimum Line Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words"
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rgroup.long c15:0x200++0x0
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line.long 0x0 "TCMTR,Tighly-Coupled Memory Type Register"
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rgroup.long c15:0x300++0x0
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line.long 0x0 "TLBTR,TLB Type Register"
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hexmask.long.byte 0x0 16.--23. 0x1 " ILSIZE ,Specifies the number of instruction TLB lockable entries"
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hexmask.long.byte 0x0 8.--15. 0x1 " DLSIZE ,Specifies the number of unified or data TLB lockable entries"
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bitfld.long 0x0 1. " TLB_size ,TLB Size" "64,128"
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textline " "
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bitfld.long 0x0 0. " nU ,Unified or Separate TLBs" "Unified,Separate"
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rgroup.long c15:0x500++0x0
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line.long 0x0 "MPIDR,Multiprocessor Affinity Register"
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bitfld.long 0x00 30. " U ,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,Uniprocessor"
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bitfld.long 0x00 8.--11. " ClusterID ,Value read in CLUSTERID configuration pins" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--1. " CPUID ,Value depends on the number of configured CPUs" "0,1,2,3"
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rgroup.long c15:0x0410++0x00
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line.long 0x00 "MMFR0,Memory Model Feature Register 0"
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bitfld.long 0x00 28.--31. " ISB ,Innermost shareability bits" "Non-cacheable,Hardware coherency,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Ignored"
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bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Not supported,Supported,?..."
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bitfld.long 0x00 20.--23. " ARS ,Auxiliary Registers Support" "Not supported,Control only,Fault status and Control,?..."
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textline " "
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bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,IMPLEMENTATION DEFINED,?..."
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bitfld.long 0x00 12.--15. " SLS ,Shareability levels Support" "One level,Two levels,?..."
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bitfld.long 0x00 8.--11. " OSS ,Outermost shareability Support" "Non-cacheable,Supported,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Ignored"
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textline " "
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bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,IMPLEMENTATION DEFINED,PMSAv6,PMSAv7,?..."
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bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Not supported,IMPLEMENTATION DEFINED,VMSAv6,VMSAv7,?..."
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rgroup.long c15:0x0510++0x00
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line.long 0x00 "MMFR1,Memory Model Feature Register 1"
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bitfld.long 0x00 28.--31. " BTB ,Branch Predictor" "Disabled,Required,Required,Required,Not required,?..."
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bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
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bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
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bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
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bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..."
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bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..."
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rgroup.long c15:0x0610++0x00
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line.long 0x00 "MMFR2,Memory Model Feature Register 2"
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bitfld.long 0x00 28.--31. " HAF ,Hardware Access Flag Support" "Not supported,Supported,?..."
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bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt Stalling Support" "Not supported,Supported,?..."
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bitfld.long 0x00 20.--23. " MBF ,Memory Barrier Operations Support" "Not supported,Supported,Supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " UTLBMO ,TLB Maintenance Operations/Unified Architecture Support" "Not supported,Supported,Supported,Supported,?..."
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bitfld.long 0x00 12.--15. " HTLBMO ,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,Supported,Supported,?..."
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bitfld.long 0x00 8.--11. " HL1CMRO ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,Supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " HL1BPCRO ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,Supported,?..."
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bitfld.long 0x00 0.--3. " HL1FPCRO ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,Supported,?..."
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rgroup.long c15:0x0710++0x00
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line.long 0x00 "MMFR3,Memory Model Feature Register 3"
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bitfld.long 0x00 28.--31. " SS ,Supersection support" "Supported,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not supported"
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bitfld.long 0x00 20.--23. " CW ,Coherent walk" "Supported,?..."
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bitfld.long 0x00 12.--15. " MB ,Invalidate broadcast Support" "Reserved,Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 8.--11. " BPM ,Invalidate Branch predictor Support" "Not supported,Supported,?..."
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bitfld.long 0x00 4.--7. " HCMOSW ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Not supported,Supported,?..."
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bitfld.long 0x00 0.--3. " HCMOMVA ,Invalidate Cache MVA Support" "Not supported,Supported,?..."
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rgroup.long c15:0x0020++0x00
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line.long 0x00 "ISAR0,Instruction Set Attribute Register 0"
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bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Not supported,Supported,?..."
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bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Not supported,Supported,?..."
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bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..."
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textline " "
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bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Not supported,Supported,?..."
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bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Not supported,Supported,?..."
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bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Not supported,Supported,?..."
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textline " "
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bitfld.long 0x00 0.--3. " SI ,Swap Instructions Support" "Not supported,Supported,?..."
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rgroup.long c15:0x0120++0x00
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line.long 0x00 "ISAR1,Instruction Set Attribute Register 1"
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bitfld.long 0x00 28.--31. " JI ,Jazelle Instructions Support" "Not supported,Supported,?..."
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bitfld.long 0x00 24.--27. " INTI ,Interwork Instructions Support" "Not supported,Supported,Supported,Supported,?..."
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bitfld.long 0x00 20.--23. " IMMI ,Immediate Instructions Support" "Not supported,Supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " ITEI ,If Then Instructions Support" "Not supported,Supported,Supported,?..."
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bitfld.long 0x00 12.--15. " EXTI ,Extend Instructions Support" "Not supported,Supported,Supported,?..."
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bitfld.long 0x00 8.--11. " E2I ,Exception 2 Instructions Support" "Not supported,Supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " E1I ,Exception 1 Instructions Support" "Not supported,Supported,?..."
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bitfld.long 0x00 0.--3. " ENDI ,Endian Instructions Support" "Not supported,Supported,?..."
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rgroup.long c15:0x0220++0x00
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line.long 0x00 "ISAR2,Instruction Set Attribute Register 2"
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bitfld.long 0x00 28.--31. " RI ,Reversal Instructions Support" "Not supported,Supported,Supported,?..."
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bitfld.long 0x00 24.--27. " PSRI ,PSR Instructions Support" "Not supported,Supported,?..."
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bitfld.long 0x00 20.--23. " UMI ,Advanced Unsigned Multiply Instructions Support" "Not supported,Supported,Supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " SMI ,Advanced Signed Multiply Instructions Support" "Not supported,Supported,Supported,Supported,?..."
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bitfld.long 0x00 12.--15. " MI ,Multiply Instructions Support" "Not supported,Supported,Supported,?..."
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bitfld.long 0x00 8.--11. " II ,Multi-Access Interruptible Instructions Support" "Not supported,Supported,Supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " MHI ,Memory Hint Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..."
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bitfld.long 0x00 0.--3. " LSI ,Load and Store Instructions Support" "Not supported,Supported,?..."
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rgroup.long c15:0x0320++0x00
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line.long 0x00 "ISAR3,Instruction Set Attribute Register 3"
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bitfld.long 0x00 28.--31. " T2E ,Thumb-2 Extensions Support" "Not supported,Supported,?..."
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bitfld.long 0x00 24.--27. " NOPI ,True NOP Instructions Support" "Not supported,Supported,?..."
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bitfld.long 0x00 20.--23. " TCI ,Thumb Copy Instructions Support" "Not supported,Supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " TBI ,Table Branch Instructions Support" "Not supported,Supported,?..."
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bitfld.long 0x00 12.--15. " SPI ,Synchronization Primitive Instructions Support" "Not supported,Supported,Supported,Supported,?..."
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bitfld.long 0x00 8.--11. " SVCI ,SVC Instructions Support" "Not supported,Supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " SIMDI ,Single Instruction Multiple Data (SIMD) Instructions Support" "Not supported,Supported,Supported,Supported,?..."
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bitfld.long 0x00 0.--3. " SI ,Saturate Instructions Support" "Not supported,Supported,?..."
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rgroup.long c15:0x0420++0x00
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line.long 0x00 "ISAR4,Instruction Set Attribute Register 4"
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bitfld.long 0x00 28.--31. " SWP_frac ,SWAP_frac" "Not supported,Supported,?..."
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bitfld.long 0x00 24.--27. " PSR_M_I ,PSR_M Instructions Support" "Not supported,Supported,?..."
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bitfld.long 0x00 20.--23. " SPRI ,Synchronization Primitive instructions" "Not supported,Reserved,Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " BI ,Barrier Instructions Support" "Not supported,Supported,?..."
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bitfld.long 0x00 12.--15. " SMCI ,SMC Instructions Support" "Not supported,Supported,?..."
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bitfld.long 0x00 8.--11. " WBI ,Write-Back Instructions Support" "Not supported,Supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " WSI ,With-Shift Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..."
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bitfld.long 0x00 0.--3. " UI ,Unprivileged Instructions Support" "Not supported,Supported,Supported,?..."
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rgroup.long c15:0x0010++0x00
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line.long 0x00 "PFR0,Processor Feature Register 0"
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bitfld.long 0x00 12.--15. " State3 ,Thumb-2 Execution Environment (Thumb-2EE) Support" "Not supported,Supported,?..."
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bitfld.long 0x00 8.--11. " State2 ,Java Extension Interface Support" "Not supported,Supported,Supported,?..."
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bitfld.long 0x00 4.--7. " State1 ,Thumb Encoding Supported by the Processor Type" "Not supported,Supported,Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 0.--3. " State0 ,ARM Instruction Set Support" "Not supported,Supported,?..."
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rgroup.long c15:0x0110++0x00
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line.long 0x00 "PFR1,Processor Feature Register 1"
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bitfld.long 0x00 8.--11. " MPM ,Microcontroller Programmer's Model Support" "Not supported,Reserved,Supported,?..."
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bitfld.long 0x00 4.--7. " SE ,Security Extensions Architecture v1 Support" "Not supported,Supported,Supported,?..."
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bitfld.long 0x00 0.--3. " PM ,Standard ARMv4 Programmer's Model Support" "Not supported,Supported,?..."
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rgroup.long c15:0x0210++0x00
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line.long 0x00 "DFR0,Debug Feature Register 0"
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bitfld.long 0x00 20.--23. " MDM_MM ,Microcontroller Debug Model Support" "Not supported,Supported,?..."
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bitfld.long 0x00 16.--19. " TDM_MM ,Trace Debug Model (Memory-Mapped) Support" "Not supported,Supported,?..."
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bitfld.long 0x00 12.--15. " TDM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,Supported,?..."
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textline " "
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bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Not supported,Reserved,Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 4.--7. " SDM_CB ,Secure Debug Model (Coprocessor) Support" "Not supported,Reserved,Reserved,v6.1,v7,?..."
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bitfld.long 0x00 0.--3. " CDM_CB ,Coprocessor Debug Model Support" "Not supported,Reserved,v6,v6.1,v7,?..."
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tree.end
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width 0x8
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tree "System Control and Configuration"
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group.long c15:0x1++0x0
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line.long 0x0 "SCTLR,Control Register"
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bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb"
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bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled"
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bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x0 27. " NMFI ,Nonmaskable Fast Interrupt enable" "Disabled,Enabled"
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bitfld.long 0x0 25. " EE ,Exception endianess" "Little,Big"
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bitfld.long 0x0 14. " RR ,Replacement strategy for caches, BTAC, and micro TLBs" "Random,Round robin"
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textline " "
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bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
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bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled"
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bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x0 10. " SW ,SWP/SWPB Enable" "Disabled,Enabled"
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bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled"
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bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled"
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textline " "
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bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disabled,Enabled"
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group.long c15:0x101++0x0
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line.long 0x0 "ACTLR,Auxiliary Control Register"
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bitfld.long 0x00 9. " PARON ,Parity On" "Disabled,Enabled"
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bitfld.long 0x00 8. " ALIOW ,Enable allocation in one cache way only" "Disabled,Enabled"
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bitfld.long 0x00 7. " EXCL ,Exclusive cache Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 6. " SMP ,Signals if the Cortex-A9 processor is taking part in coherency or not" "0,1"
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bitfld.long 0x00 3. " FOZ ,Full Of Zero mode Enable" "Disabled,Enabled"
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bitfld.long 0x00 2. " DP1 ,L1 Dside prefetch Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 1. " PH2 ,L2 prefetch hint Enable" "Disabled,Enabled"
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bitfld.long 0x00 0. " FW ,Cache and TLB maintenance broadcast" "Disabled,Enabled"
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group.long c15:0x201++0x0
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line.long 0x0 "CPACR,Coprocessor Access Control Register"
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bitfld.long 0x0 31. " ASEDIS ,Disable Advanced SIMD Extension functionality" "No,Yes"
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bitfld.long 0x0 30. " D32DIS ,Disable use of D16-D31 of the VFP register file" "No,Yes"
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bitfld.long 0x0 22.--23. " CP11 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
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textline " "
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bitfld.long 0x0 20.--21. " CP10 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
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textline " "
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group.long c15:0x11++0x0
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line.long 0x0 "SCR,Secure Configuration Register"
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bitfld.long 0x00 6. " nET ,Not early termination" "Not early,Early"
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bitfld.long 0x00 5. " AW ,Controls whether the Non-secure world can modify the A-bit in the CPSR" "Not allowed,Allowed"
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bitfld.long 0x00 4. " FW ,FW-bit controls whether the Non-secure world can modify the F-bit in the CPSR" "Not allowed,Allowed"
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textline " "
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bitfld.long 0x00 3. " EA ,External Abort exceptions handled in Abort mode or Monitor mode" "Abort,Monitor"
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bitfld.long 0x00 2. " FIQ ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor"
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bitfld.long 0x00 1. " IRQ ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor"
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textline " "
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bitfld.long 0x00 0. " NS ,Secure mode " "Secure,Non-secure"
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group.long c15:0x111++0x0
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line.long 0x0 "SDER,Secure Debug Enable Register"
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bitfld.long 0x00 1. " SUNIDEN ,Non-Invasive Secure User Debug Enable bit" "Denied,Permitted"
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bitfld.long 0x00 0. " SUIDEN ,Invasive Secure User Debug Enable bit" "Denied,Permitted"
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group.long c15:0x0211++0x00
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line.long 0x00 "NSACR,Non-Secure Access Control Register"
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bitfld.long 0x00 18. " NS_SMP ,Determines if the SMP bit of the Auxiliary Control Register is writable in Non-secure state" "Disabled,Enabled"
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bitfld.long 0x00 17. " TL ,Lockable Page Table Entries Allocation in Nonsecure World" "Denied,Permitted"
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bitfld.long 0x00 16. " PLE ,NS accesses to the Preload Engine resources control" "Secure,Non-secure"
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textline " "
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bitfld.long 0x00 15. " NSASEDIS ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes"
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bitfld.long 0x00 14. " NSD32DIS ,Disable the Non-secure use of D16-D31 of the VFP register" "No,Yes"
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bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Nonsecure World Access Permission" "Denied,Permitted"
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textline " "
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bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Nonsecure World Access Permission" "Denied,Permitted"
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group.long c15:0x0311++0x00
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line.long 0x00 "VCR,Virtualization Control Register"
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|
bitfld.long 0x00 8. " AMO ,Abort Mask Override" "0,1"
|
|
bitfld.long 0x00 7. " IMO ,IRQ Mask Override" "0,1"
|
|
bitfld.long 0x00 6. " IFO ,FIQ Mask Override" "0,1"
|
|
group.long c15:0xf++0x0
|
|
line.long 0x00 "PCR,Power Control Register"
|
|
bitfld.long 0x00 8.--10. " MCL ,Max Clock Latency" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EDCG ,Enable Dynamic Clock Gating" "Disabled,Enabled"
|
|
textline " "
|
|
group.long c15:0x000c++0x00
|
|
line.long 0x00 "VBAR,Secure or Nonsecure Vector Base Address Register"
|
|
hexmask.long 0x00 5.--31. 0x20 " VBA ,Base Address"
|
|
group.long c15:0x10c++0x00
|
|
line.long 0x0 "MVBAR,Monitor Vector Base Address Register"
|
|
hexmask.long 0x00 5.--31. 0x20 " MVBA , Monitor Vector Base Address"
|
|
rgroup.long c15:0x1C++0x0
|
|
line.long 0x0 "ISR,Interrupt status Register"
|
|
bitfld.long 0x0 8. " A ,Pending External Abort" "Not pending,Pending"
|
|
bitfld.long 0x0 7. " I ,Pending IRQ" "Not pending,Pending"
|
|
bitfld.long 0x0 6. " F ,Pending FIQ" "Not pending,Pending"
|
|
group.long c15:0x11c++0x0
|
|
line.long 0x00 "VIR,Virtualization Interrupt Register"
|
|
bitfld.long 0x00 8. " VA ,Virtual Abort" "0,1"
|
|
bitfld.long 0x00 7. " VI ,Virtual IRQ" "0,1"
|
|
bitfld.long 0x00 6. " VF ,Virtual FIQ" "0,1"
|
|
tree.end
|
|
width 0x0d
|
|
tree "Memory Management Unit"
|
|
group.long c15:0x1++0x0
|
|
line.long 0x0 "SCTLR,Control Register"
|
|
bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb"
|
|
bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 27. " NMFI ,DNonmaskable Fast Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 25. " EE ,Exception endianess" "Little,Big"
|
|
bitfld.long 0x0 14. " RR ,Replacement strategy for caches, BTAC, and micro TLBs" "Random,Round robin"
|
|
textline " "
|
|
bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
|
|
bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 10. " SW ,SWP/SWPB Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disabled,Enabled"
|
|
textline " "
|
|
group.long c15:0x0002++0x00
|
|
line.long 0x00 "TTBR0,Translation Table Base Register 0"
|
|
hexmask.long 0x00 14.--31. 0x4000 " TTB0 ,Translation Table Base Address"
|
|
bitfld.long 0x00 0. 6. " IRGN[1:0] ,Indicates inner cacheability" "Noncacheable,Back/allocated,Through,Back/not allocated"
|
|
bitfld.long 0x00 5. " NOS ,Not Outer Shareable" "Outer,Inner"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " RGN ,Outer Cacheable Attributes for Page Table Walking" "Noncacheable,Back/allocated,Through,Back/not allocated"
|
|
bitfld.long 0x00 2. " IMP ,Implementation Defined" "0,1"
|
|
bitfld.long 0x00 1. " S ,Page Table Walk to Shared Memory" "Nonshared,Shared"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C ,Cacheable" "Non-cacheable,Cacheable"
|
|
group.long c15:0x0102++0x00
|
|
line.long 0x00 "TTBR1,Translation Table Base Register 1"
|
|
hexmask.long 0x00 14.--31. 0x4000 " TTB1 ,Translation Table Base Address"
|
|
bitfld.long 0x00 0. 6. " IRGN[1:0] ,Indicates inner cacheability" "Noncacheable,Back/allocated,Through,Back/not allocated"
|
|
bitfld.long 0x00 5. " NOS ,Not Outer Shareable" "Outer,Inner"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " RGN ,Outer Cacheable Attributes for Page Table Walking" "Noncacheable,Back/allocated,Through,Back/not allocated"
|
|
bitfld.long 0x00 2. " IMP ,Implementation Defined" "0,1"
|
|
bitfld.long 0x00 1. " S ,Page Table Walk to Shared Memory" "Nonshared,Shared"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C ,Cacheable" "Non-cacheable,Cacheable"
|
|
group.long c15:0x0202++0x00
|
|
line.long 0x00 "TTBCR,Translation Table Base Control Register"
|
|
bitfld.long 0x00 5. " PD1 ,Page Table Walk on a TLB Miss When Using Translation Table Base Register 1" "Enable,Disable"
|
|
bitfld.long 0x00 4. " PD0 ,Page Table Walk on a TLB Miss When Using Translation Table Base Register 0" "Enable,Disable"
|
|
bitfld.long 0x0 0.--2. " N ,Translation Table Base Register 0 page table boundary size" "Off,0x80000000,0x40000000,0x20000000,0x10000000,0x08000000,0x04000000,0x02000000"
|
|
textline " "
|
|
group.long c15:0x3--0x3
|
|
line.long 0x0 "DACR,Domain Access Control Register"
|
|
bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
group.long c15:0x0005++0x00
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR"
|
|
bitfld.long 0x00 11. " RW ,Access Caused an Abort Type" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15"
|
|
bitfld.long 0x00 0.--3. 10. " STATUS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Nontranslation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..."
|
|
group.long c15:0x0006++0x00
|
|
line.long 0x00 "DFAR,Data Fault Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " DFA ,Data Fault Address"
|
|
group.long c15:0x0105++0x00
|
|
line.long 0x00 "IFSR,Instruction Fault Status Register"
|
|
bitfld.long 0x00 12. " SD ,External Abort Qualifier" "DECERR,SLVERR"
|
|
bitfld.long 0x00 0.--3. 10. " STATUS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Nontranslation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..."
|
|
group.long c15:0x0206++0x00
|
|
line.long 0x00 "IFAR,Instruction Fault Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " IFA ,Instruction Fault Address"
|
|
group.long c15:0x0015++0x00
|
|
line.long 0x00 "ADFSR,Auxiliary Data Fault Status Register"
|
|
hexmask.long 0x00 0.--31. 1. " DAFS ,Data Auxiliary Fault Status"
|
|
group.long c15:0x0115++0x00
|
|
line.long 0x00 "AIFSR,AuxiliaryInstruction Fault Status Register"
|
|
hexmask.long 0x00 0.--31. 1. " IAFS ,Instruction Auxiliary Fault Status"
|
|
textline " "
|
|
group.long c15:0xa++0x0
|
|
line.long 0x0 "TLBLR,TLB Lockdown Register"
|
|
bitfld.long 0x0 28.--29. " VICTIM ,Victim Value Increments after Each Tabel Walk" "0,1,2,3"
|
|
bitfld.long 0x0 0. " P ,Lockdown by Victim or Set Associative Region of TLB" "Associative,Lockdown"
|
|
group.long c15:0x0047++0x00
|
|
line.long 0x00 "PAR,PA Register"
|
|
hexmask.long 0x00 12.--31. 0x1000 " PA ,Physical Adress"
|
|
bitfld.long 0x00 10. " NOS ,Not Outer Shareable attribute" "Outer shareable,Not outer shareable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " NS ,Non-secure" "Not secured,Secured"
|
|
bitfld.long 0x00 7. " SH ,Shareable attribute" "Non-shareable,Shareable"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " Inner ,Signals region inner attributes" "Noncacheable,Strongly-ordered,Reserved,Device,Reserved,Write-back allocate,Write-through,Write-back"
|
|
bitfld.long 0x00 2.--3. " Outer ,Signals region outer attributes for normal memory type" "Noncacheable,Write-back allocate,Write-through,Write-back"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SS ,Supersection Enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " F ,Translation Successful" "Successful,No successful"
|
|
textline " "
|
|
group.long c15:0x002A++0x0
|
|
line.long 0x00 "PRRR,Primary Region Remap Register"
|
|
bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attribute 7" "Outer,Inner"
|
|
bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attribute 6" "Outer,Inner"
|
|
textline " "
|
|
bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attribute 5" "Outer,Inner"
|
|
bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attribute 4" "Outer,Inner"
|
|
textline " "
|
|
bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attribute 3" "Outer,Inner"
|
|
bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attribute 2" "Outer,Inner"
|
|
textline " "
|
|
bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attribute 1" "Outer,Inner"
|
|
bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attribute 0" "Outer,Inner"
|
|
textline " "
|
|
bitfld.long 0x00 19. " NS1 ,Shareable Attribute Remap when S=1 for Normal Regions" "Remapped,Not remapped"
|
|
bitfld.long 0x00 18. " NS0 ,Shareable Attribute Remap when S=0 for Normal Regions" "Not remapped,Remapped"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DS1 ,Shareable Attribute Remap when S=1 for Device regions" "Remapped,Not remapped"
|
|
bitfld.long 0x00 16. " DS0 ,Shareable Attribute Remap when S=0 for Device regions" "Not remapped,Remapped"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " TR7 ,{TEX[0] C B} = b111 Remap" "Strongly ordered,Device,Normal,?..."
|
|
bitfld.long 0x00 12.--13. " TR6 ,{TEX[0] C B} = b110 Remap" "Strongly ordered,Device,Normal,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " TR5 ,{TEX[0] C B} = b101 Remap" "Strongly ordered,Device,Normal,?..."
|
|
bitfld.long 0x00 8.--9. " TR4 ,{TEX[0] C B} = b100 Remap" "Strongly ordered,Device,Normal,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " TR3 ,{TEX[0] C B} = b011 Remap" "Strongly ordered,Device,Normal,?..."
|
|
bitfld.long 0x00 4.--5. " TR2 ,{TEX[0] C B} = b010 Remap" "Strongly ordered,Device,Normal,?..."
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " TR1 ,{TEX[0] C B} = b001 Remap" "Strongly ordered,Device,Normal,?..."
|
|
bitfld.long 0x00 0.--1. " TR0 ,{TEX[0] C B} = b000 Remap" "Strongly ordered,Device,Normal,?..."
|
|
group.long c15:0x012A++0x0
|
|
line.long 0x00 "NMRR,Normal Memory Remap Register"
|
|
bitfld.long 0x00 30.--31. " OR7 ,Outer Attribute for {TEX[0] C B} = b111 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 28.--29. " OR6 ,Outer Attribute for {TEX[0] C B} = b110 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " OR5 ,Outer Attribute for {TEX[0] C B} = b101 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 24.--25. " OR4 ,Outer Attribute for {TEX[0] C B} = b100 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " OR3 ,Outer Attribute for {TEX[0] C B} = b011 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 20.--21. " OR2 ,Outer Attribute for {TEX[0] C B} = b010 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " OR1 ,Outer Attribute for {TEX[0] C B} = b001 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 16.--17. " OR0 ,Outer Attribute for {TEX[0] C B} = b000 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " IR7 ,Inner attribute for {TEX[0] C B} = b111 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 12.--13. " IR6 ,Inner attribute for {TEX[0] C B} = b110 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " IR5 ,Inner attribute for {TEX[0] C B} = b101 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 8.--9. " IR4 ,Inner attribute for {TEX[0] C B} = b100 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " IR3 ,Inner attribute for {TEX[0] C B} = b011 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 4.--5. " IR2 ,Inner attribute for {TEX[0] C B} = b010 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " IR1 ,Inner attribute for {TEX[0] C B} = b001 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 0.--1. " IR0 ,Inner attribute for {TEX[0] C B} = b000 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
group.long c15:0x400f++0x0
|
|
line.long 0x00 "CBAR,Configuration Base Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " CBA ,Configuration Base Address"
|
|
textline " "
|
|
rgroup.long c15:0x000d++0x00
|
|
line.long 0x00 "FCSEIDR,FCSE PID Register"
|
|
hexmask.long.byte 0x00 25.--31. 0x02 " PID ,Process for Fast Context Switch Identification and Specification"
|
|
group.long c15:0x10d++0x0
|
|
line.long 0x0 "CONTEXTIDR,Context ID Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. " PROCID ,Process ID"
|
|
hexmask.long.byte 0x0 0.--7. 1. " ASID ,Application Space ID"
|
|
group.long c15:0x020d++0x00
|
|
line.long 0x00 "TPIDRURW,User Read/Write Thread ID Register"
|
|
hexmask.long 0x00 0.--31. 1. " TPIDRURW ,User Read/Write Thread ID"
|
|
group.long c15:0x030d++0x00
|
|
line.long 0x00 "TPIDRURO,User Read-only Thread ID Register"
|
|
hexmask.long 0x00 0.--31. 1. " TPIDRURO ,User Read-only Thread ID"
|
|
group.long c15:0x040d++0x00
|
|
line.long 0x00 "TPIDRPRW,Privileged Only Thread ID Register"
|
|
hexmask.long 0x00 0.--31. 1. " TPIDRPRW ,Privileged Only Thread ID"
|
|
tree.end
|
|
width 0xC
|
|
tree "Cache Control and Configuration"
|
|
rgroup.long c15:0x1100++0x0
|
|
line.long 0x0 "CLIDR,Cache Level ID Register"
|
|
bitfld.long 0x00 27.--29. " LOU ,Level of Unification" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8"
|
|
bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8"
|
|
textline " "
|
|
bitfld.long 0x00 21.--23. " LOUIS ,Level of Unification Inner Shareable" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8"
|
|
bitfld.long 0x00 18.--20. " CType7 ,Cache type for levels 7" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
textline " "
|
|
bitfld.long 0x00 15.--17. " CType6 ,Cache type for levels 6" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
bitfld.long 0x00 12.--14. " CType5 ,Cache type for levels 5" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " CType4 ,Cache type for levels 4" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
bitfld.long 0x00 6.--8. " CType3 ,Cache type for levels 3" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " CType2 ,Cache type for levels 2" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
bitfld.long 0x00 0.--2. " CType1 ,Cache type for levels 1" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
rgroup.long c15:0x1000++0x0
|
|
line.long 0x0 "CCSIDR,Current Cache Size ID Register"
|
|
bitfld.long 0x00 31. " WT ,Write-Through" "Not Supported,Supported"
|
|
bitfld.long 0x00 30. " WB ,Write-Back" "Not Supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RA ,Read-Allocate" "Not Supported,Supported"
|
|
bitfld.long 0x00 28. " WA ,Write-Allocate" "Not Supported,Supported"
|
|
textline " "
|
|
hexmask.long.word 0x00 13.--27. 1. " SETS ,Number of Sets"
|
|
hexmask.long.word 0x00 3.--12. 1. " ASSOC ,Associativity"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " LSIZE ,Line Size" "4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words"
|
|
group.long c15:0x2000++0x0
|
|
line.long 0x0 "CSSELR,Cache Size Selection Register"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Level" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8"
|
|
bitfld.long 0x00 0. " IND ,Instruction/Not Data" "Data,Instruction"
|
|
tree.end
|
|
width 12.
|
|
tree "System Performance Monitor"
|
|
group.long c15:0xC9++0x0
|
|
line.long 0x0 "PMCR,Performance Monitor Control Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " IMP ,Implementer code"
|
|
hexmask.long.byte 0x00 16.--23. 1. " IDCODE ,Identification code"
|
|
bitfld.long 0x00 11.--15. " N ,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5. " DP ,Disable CCNT when prohibited" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " X ,Export Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " D ,Clock Divider" "Every cycle,64th cycle"
|
|
bitfld.long 0x00 2. " C ,Clock Counter Reset" "No action,Reset"
|
|
bitfld.long 0x00 1. " P ,Performance Counter Reset" "No action,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " E ,Counters Enable" "Disabled,Enabled"
|
|
group.long c15:0x1C9++0x0
|
|
line.long 0x0 "PMCNTENSET,Count Enable Set Register"
|
|
bitfld.long 0x00 31. " C ,CCNT Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,PMN5 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,PMN5 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " P3 ,PMN3 Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P2 ,PMN2 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,PMN1 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,PMN0 Enabled" "Disabled,Enabled"
|
|
group.long c15:0x2C9++0x0
|
|
line.long 0x0 "PMCNTENCLR,Count Enable Clear Register"
|
|
bitfld.long 0x00 31. " C ,CCNT Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,PMN5 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,PMN5 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " P3 ,PMN3 Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P2 ,PMN2 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,PMN1 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,PMN0 Enabled" "Disabled,Enabled"
|
|
group.long c15:0x3C9++0x0
|
|
line.long 0x0 "PMOVSR,Overflow Flag Status Register"
|
|
eventfld.long 0x00 31. " C ,CCNT overflowed" "No overflow,Overflow"
|
|
eventfld.long 0x00 5. " P5 ,PMN5 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 4. " P4 ,PMN5 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 3. " P3 ,PMN3 overflow" "No overflow,Overflow"
|
|
textline " "
|
|
eventfld.long 0x00 2. " P2 ,PMN2 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 1. " P1 ,PMN1 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 0. " P0 ,PMN0 overflow" "No overflow,Overflow"
|
|
group.long c15:0x4C9++0x0
|
|
line.long 0x0 "PMSWINC,Software Increment Register"
|
|
eventfld.long 0x00 5. " P5 ,Increment PMN2" "No action,Increment"
|
|
eventfld.long 0x00 4. " P4 ,Increment PMN1" "No action,Increment"
|
|
eventfld.long 0x00 3. " P3 ,Increment PMN3" "No action,Increment"
|
|
eventfld.long 0x00 2. " P2 ,Increment PMN2" "No action,Increment"
|
|
textline " "
|
|
eventfld.long 0x00 1. " P1 ,Increment PMN1" "No action,Increment"
|
|
eventfld.long 0x00 0. " P0 ,Increment PMN0" "No action,Increment"
|
|
group.long c15:0x5C9++0x0
|
|
line.long 0x0 "PMSELR,Performance Counter Selection Register"
|
|
bitfld.long 0x00 0.--5. " SEL ,Selection value" "CNT0,CNT1,CNT2,CNT3,CNT4,CNT5,?..."
|
|
group.long c15:0xD9++0x0
|
|
line.long 0x00 "PMCCNTR,Cycle Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCNT ,Cycle Count"
|
|
group.long c15:0x01d9++0x00
|
|
line.long 0x00 "PMXEVTYPER,Event Type Select Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " EVCNT ,Event to count"
|
|
group.long c15:0x02d9++0x00
|
|
line.long 0x00 "PMXEVCNTR,Event Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " PMNX ,Event Count"
|
|
group.long c15:0xE9++0x0
|
|
line.long 0x0 "PMUSERENR,User Enable Register"
|
|
bitfld.long 0x00 0. " EN ,User Mode Enable" "Disabled,Enabled"
|
|
group.long c15:0x1E9++0x0
|
|
line.long 0x0 "PMINTENSET,Interrupt Enable Set Register"
|
|
bitfld.long 0x00 31. " C ,CCNT Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " P3 ,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P2 ,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
group.long c15:0x2E9++0x0
|
|
line.long 0x0 "PMINTENCLR,Interrupt Enable Clear Register"
|
|
eventfld.long 0x00 31. " C ,CCNT Overflow Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 5. " P5 ,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 4. " P4 ,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " P3 ,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " P2 ,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 1. " P1 ,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " P0 ,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 8.
|
|
tree "Preload Engine"
|
|
rgroup.long c15:0x000b++0x00
|
|
line.long 0x00 "PLEIDR,PLE ID Register"
|
|
bitfld.long 0x00 16.--20. " FIFOS ,PLE FIFO size" "Not present,Reserved,Reserved,Reserved,4,Reserved,Reserved,Reserved,8,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16,?..."
|
|
bitfld.long 0x00 0. " PEP ,Preload Engine presence" "Not present,Present"
|
|
rgroup.long c15:0x020b++0x00
|
|
line.long 0x00 "PLEASR,PLE Activity Status Register"
|
|
bitfld.long 0x00 0. " R ,PLE Channel running" "Not running,Running"
|
|
rgroup.long c15:0x040b++0x00
|
|
line.long 0x00 "PLEFSR,PLE FIFO Status Register"
|
|
bitfld.long 0x00 0.--4. " AE ,Number of available entries in the PLE FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long c15:0x001b++0x00
|
|
line.long 0x00 "PLEUAR,Preload Engine User Accessibility Register"
|
|
bitfld.long 0x00 0. " U ,User accessibility" "Not permited,Permited"
|
|
group.long c15:0x011b++0x00
|
|
line.long 0x00 "PLEPCR,Preload Engine Parameters Control Register"
|
|
hexmask.long.word 0x00 16.--29. 1. " BSM ,Block size mask"
|
|
hexmask.long.byte 0x00 8.--15. 1. " BNM ,Block number mask"
|
|
hexmask.long.byte 0x00 0.--7. 1. " WS ,PLE wait states"
|
|
tree.end
|
|
tree "NEON"
|
|
rgroup.long c15:0x000f++0x00
|
|
line.long 0x00 "NEON,NEON busy Register"
|
|
bitfld.long 0x00 0. " Busy ,NEON busy" "Not busy,Busy"
|
|
tree.end
|
|
width 0xb
|
|
width 9.
|
|
tree "Debug Registers"
|
|
tree "Jazelle Register"
|
|
group.long c14:0x7000++0x0
|
|
line.long 0x00 "JIDR,Jazelle ID Register"
|
|
bitfld.long 0x00 28.--31. " ARCH ,Architecture code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 20.--27. 1. " DESIGN ,Implementor code of the designer of the subarchitecture"
|
|
textline " "
|
|
hexmask.long.byte 0x00 12.--19. 1. " SAMAJ ,The subarchitecture code"
|
|
bitfld.long 0x00 8.--11. " SAMIN ,The subarchitecture minor code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TRTBFR ,Format of the Jazelle Configurable Opcode Translation Table Register" "0,1"
|
|
bitfld.long 0x00 0.--5. " TRTBSZ ,Size of the Jazelle Configurable Opcode Translation Table Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long c14:0x7001++0x0
|
|
line.long 0x00 "JOSCR,Jazelle OS Control Register"
|
|
bitfld.long 0x00 1. " CV ,Configuration Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 0. " CD ,Configuration Disabled" "No,Yes"
|
|
group.long c14:0x7002++0x0
|
|
line.long 0x00 "JMCR,Jazelle Main Configuration Register"
|
|
bitfld.long 0x00 31. " nAR ,Not Array Operations" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " FP ,Floating-point opcodes handler" "VM implementation,VFP instructions"
|
|
bitfld.long 0x00 29. " AP ,Array Pointer" "Handler,Pointer"
|
|
textline " "
|
|
bitfld.long 0x00 28. " OP ,Object Pointer" "Handler,Pointer"
|
|
bitfld.long 0x00 27. " IS ,Index Size" "8 bits,16 bits"
|
|
bitfld.long 0x00 26. " SP ,Static Pointer" "Handler,Pointer"
|
|
textline " "
|
|
bitfld.long 0x00 0. " JE ,Jazelle Enable" "Disabled,Enabled"
|
|
group.long c14:0x7003++0x0
|
|
line.long 0x00 "JPR,Jazelle Parameters Register"
|
|
bitfld.long 0x00 17.--21. " BSH ,Bounds SHift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 12.--16. " sADO ,Signed Array Descriptor Offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 8.--11. " ARO ,Array Reference Offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " STO ,STatic Offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " ODO ,Object Descriptor Offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long c14:0x7004++0x0
|
|
line.long 0x00 "JCOTTRR,Jazelle Configurable Opcode Translation Table Register"
|
|
bitfld.long 0x00 10.--15. " OPCODE ,Bottom bits of the configurable opcode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--3. " OPERATION ,Code for the operation" "0,1,2,3,4,5,6,7,8,9,?..."
|
|
tree.end
|
|
width 11.
|
|
tree "Processor Identifier Registers"
|
|
rgroup c14:0x340--0x340
|
|
line.long 0x00 "CPUID,Main ID Register"
|
|
hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code"
|
|
hexmask.long.byte 0x0 20.--23. 0x1 " SPECREV ,Variant number"
|
|
textline " "
|
|
hexmask.long.byte 0x0 16.--19. 0x1 " ARCH , Architecture"
|
|
hexmask.long.word 0x0 4.--15. 0x1 " PARTNUM ,Part Number"
|
|
textline " "
|
|
hexmask.long.byte 0x0 0.--3. 0x1 " REV ,Layout Revision"
|
|
rgroup c14:0x341--0x341
|
|
line.long 0x00 "CACHETYPE,Cache Type Register"
|
|
bitfld.long 0x0 29.--31. " FORMAT ,Format" "Not ARMv7,Not ARMv7,Not ARMv7,Not ARMv7,ARMv7,Not ARMv7,Not ARMv7,Not ARMv7"
|
|
bitfld.long 0x0 24.--27. " CWG ,Cache Writeback Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x0 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. " DMinLine ,Words of Smallest Line Length in L1 or L2 Data Cache Number" "Reserved,Reserved,Reserved,Reserved,16x32-bit words,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " L1_Ipolicy ,VIPT Instruction Cache Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " IMinLine ,Words of Smallest Line Length in L1 or L2 Instruction Cache Number" "Reserved,Reserved,Reserved,Reserved,16x32-bit words,?..."
|
|
rgroup c14:0x343--0x343
|
|
line.long 0x00 "TLBTYPE,TLB Type Register"
|
|
hexmask.long.byte 0x0 16.--23. 0x1 " ILsize ,Specifies the number of instruction TLB lockable entries"
|
|
hexmask.long.byte 0x0 8.--15. 0x1 " DLsize ,Specifies the number of unified or data TLB lockable entries"
|
|
textline " "
|
|
bitfld.long 0x0 1. " TLB_size ,TLB Size" "64,128"
|
|
bitfld.long 0x0 0. " U ,Unified or separate instruction TLBs" "Unified,Separate"
|
|
rgroup c14:0x348--0x348
|
|
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
|
|
bitfld.long 0x00 12.--15. " State3 ,Thumb-2 Execution Environment (Thumb-2EE) Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " State2 ,Java Extension Interface Support" "Not supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " State1 ,Thumb Encoding Supported by the Processor Type" "Not supported,Supported,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " State0 ,ARM Instruction Set Support" "Not supported,Supported,?..."
|
|
rgroup c14:0x349--0x349
|
|
line.long 0x00 "ID_PFR1,Processor Feature Register 1"
|
|
bitfld.long 0x00 8.--11. " MPM ,Microcontroller Programmer's Model Support" "Not supported,Reserved,Supported,?..."
|
|
bitfld.long 0x00 4.--7. " SE ,Security Extensions Architecture v1 Support" "Not supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " PM ,Standard ARMv4 Programmer's Model Support" "Not supported,Supported,?..."
|
|
rgroup c14:0x34a--0x34a
|
|
line.long 0x00 "ID_DFR0,Debug Feature Register 0"
|
|
bitfld.long 0x00 20.--23. " MDM_MM ,Microcontroller Debug Model Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " TDM_MM ,Trace Debug Model (Memory-Mapped) Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " TDM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Not supported,Reserved,Reserved,Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SDM_CB ,Secure Debug Model (Coprocessor) Support" "Not supported,Reserved,Reserved,v6.1,v7,?..."
|
|
bitfld.long 0x00 0.--3. " CDM_CB ,Coprocessor Debug Model Support" "Not supported,Reserved,v6,v6.1,v7,?..."
|
|
rgroup c14:0x34c--0x34c
|
|
line.long 0x00 "ID_MMFR0,Processor Feature Register 0"
|
|
bitfld.long 0x00 28.--31. " ISB ,Innermost shareability bits" "Non-cacheable,Hardware coherency,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Ignored"
|
|
bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " ARS ,Auxiliary Registers Support" "Not supported,Control only,Fault status and Control,?..."
|
|
bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,IMPLEMENTATION DEFINED,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " SLS ,Shareability levels Support" "One level,Two levels,?..."
|
|
bitfld.long 0x00 8.--11. " OSS ,Outermost shareability Support" "Non-cacheable,Supported,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Ignored"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,IMPLEMENTATION DEFINED,PMSAv6,PMSAv7,?..."
|
|
bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Not supported,IMPLEMENTATION DEFINED,VMSAv6,VMSAv7,?..."
|
|
rgroup c14:0x34d--0x34d
|
|
line.long 0x00 "ID_MMFR1,Processor Feature Register 1"
|
|
bitfld.long 0x00 28.--31. " BTB ,Branch Predictor" "Disabled,Required,Required,Required,Not required,?..."
|
|
bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..."
|
|
rgroup c14:0x34e--0x34e
|
|
line.long 0x00 "ID_MMFR2,Processor Feature Register 2"
|
|
bitfld.long 0x00 28.--31. " HAF ,Hardware Access Flag Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt Stalling Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " MBF ,Memory Barrier Operations Support" "Not supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " UTLBMO ,TLB Maintenance Operations/Unified Architecture Support" "Not supported,Supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " HTLBMO ,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " HL1CMRO ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " HL1BPCRO ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " HL1FPCRO ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,Supported,?..."
|
|
rgroup c14:0x34f--0x34f
|
|
line.long 0x00 "ID_MMFR3,Processor Feature Register 3"
|
|
bitfld.long 0x00 28.--31. " SS ,Supersection support" "Supported,?..."
|
|
bitfld.long 0x00 20.--23. " CW ,Coherent walk" "Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MB ,Invalidate broadcast Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " BPM ,Invalidate Branch predictor Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " HCMOSW ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " HCMOMVA ,Invalidate Cache MVA Support" "Reserved,Supported,?..."
|
|
rgroup c14:0x350--0x350
|
|
line.long 0x00 "ID_ISAR0,ISA Feature Register 0"
|
|
bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SI ,Swap Instructions Support" "Not supported,Supported,?..."
|
|
rgroup c14:0x351--0x351
|
|
line.long 0x00 "ID_ISAR1,ISA Feature Register 1"
|
|
bitfld.long 0x00 28.--31. " JI ,Jazelle Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " INTI ,Interwork Instructions Support" "Not supported,Supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " IMMI ,Immediate Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " ITEI ,If Then Instructions Support" "Not supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " EXTI ,Extend Instructions Support" "Not supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " E2I ,Exception 2 Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " E1I ,Exception 1 Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " ENDI ,Endian Instructions Support" "Not supported,Supported,?..."
|
|
rgroup c14:0x352--0x352
|
|
line.long 0x00 "ID_ISAR2,ISA Feature Register 2"
|
|
bitfld.long 0x00 28.--31. " RI ,Reversal Instructions Support" "Not supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " PSRI ,PSR Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " UMI ,Advanced Unsigned Multiply Instructions Support" "Not supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " SMI ,Advanced Signed Multiply Instructions Support" "Not supported,Supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MI ,Multiply Instructions Support" "Not supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " II ,Multi-Access Interruptible Instructions Support" "Not supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MHI ,Memory Hint Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " LSI ,Load and Store Instructions Support" "Not supported,Supported,?..."
|
|
rgroup c14:0x353--0x353
|
|
line.long 0x00 "ID_ISAR3,ISA Feature Register 3"
|
|
bitfld.long 0x00 28.--31. " T2E ,Thumb-2 Extensions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " NOPI ,True NOP Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " TCI ,Thumb Copy Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " TBI ,Table Branch Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " SPI ,Synchronization Primitive Instructions Support" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " SVCI ,SVC Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SIMDI ,Single Instruction Multiple Data (SIMD) Instructions Support" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " SI ,Saturate Instructions Support" "Not supported,Supported,?..."
|
|
rgroup c14:0x354--0x354
|
|
line.long 0x00 "ID_ISAR4,ISA Feature Register 4"
|
|
bitfld.long 0x00 28.--31. " SWP_frac ,SWAP_frac" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " PSR_M_I ,PSR_M Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " SPRI ,Synchronization Primitive instructions" "Not supported,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " BI ,Barrier Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " SMCI ,SMC Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " WBI ,Write-Back Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " WSI ,With-Shift Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " UI ,Unprivileged Instructions Support" "Not supported,Supported,Supported,?..."
|
|
tree.end
|
|
tree "Coresight Management Registers"
|
|
width 0xC
|
|
textline " "
|
|
group c14:0x3c0--0x3c0
|
|
line.long 0x0 "ITCTRL,Integration Mode Control Register"
|
|
bitfld.long 0x0 0. " IME ,Integration Mode Enable" "Disabled,Enabled"
|
|
group c14:0x3e8--0x3e8
|
|
line.long 0x0 "CLAIMSET,Claim Tag Set Register"
|
|
bitfld.long 0x0 7. " CT7 ,Claim Tag 7" "No Effect,Set"
|
|
bitfld.long 0x0 6. " CT6 ,Claim Tag 6" "No Effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 5. " CT5 ,Claim Tag 5" "No Effect,Set"
|
|
bitfld.long 0x0 4. " CT4 ,Claim Tag 4" "No Effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 3. " CT3 ,Claim Tag 3" "No Effect,Set"
|
|
bitfld.long 0x0 2. " CT2 ,Claim Tag 2" "No Effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 1. " CT1 ,Claim Tag 1" "No Effect,Set"
|
|
bitfld.long 0x0 0. " CT0 ,Claim Tag 0" "No Effect,Set"
|
|
group c14:0x3e9--0x3e9
|
|
line.long 0x0 "CLAIMCLR,Claim Tag Clear Register"
|
|
bitfld.long 0x0 7. " CT7 ,Claim Tag 7" "No Effect,Cleared"
|
|
bitfld.long 0x0 6. " CT6 ,Claim Tag 6" "No Effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 5. " CT5 ,Claim Tag 5" "No Effect,Cleared"
|
|
bitfld.long 0x0 4. " CT4 ,Claim Tag 4" "No Effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 3. " CT3 ,Claim Tag 3" "No Effect,Cleared"
|
|
bitfld.long 0x0 2. " CT2 ,Claim Tag 2" "No Effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 1. " CT1 ,Claim Tag 1" "No Effect,Cleared"
|
|
bitfld.long 0x0 0. " CT0 ,Claim Tag 0" "No Effect,Cleared"
|
|
wgroup c14:0x3ec--0x3ec
|
|
line.long 0x0 "LAR,Lock Access Register"
|
|
hexmask.long.long 0x0 0.--31. 1. " LACK ,Lock Access Control Key"
|
|
rgroup c14:0x3ed--0x3ed
|
|
line.long 0x0 "LSR,Lock Status Register"
|
|
bitfld.long 0x0 2. " 32ACND ,32-bit Access Needed" "Needed,Not needed"
|
|
bitfld.long 0x0 1. " WLCK ,Writes Lock" "Permitted,Ignored"
|
|
textline " "
|
|
bitfld.long 0x0 0. " LI ,Lock Implementation" "Lock ignored,Unlock required"
|
|
width 0xc
|
|
rgroup c14:0x3ee--0x3ee
|
|
line.long 0x0 "AUTHSTATUS,Authentication Status Register"
|
|
bitfld.long 0x0 7. " SNIDFI ,Secure Non-invasive Debug Features Implemented" "Not Implemented,Implemented"
|
|
bitfld.long 0x0 6. " SNIDE ,Secure Non-invasive Debug Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 5. " SIDFI ,Secure Invasive Debug Feauter Implemented" "Not Implemented,Implemented"
|
|
bitfld.long 0x0 4. " SIDE ,Secure Invasive Debug Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 3. " NSNIDFI ,Non-secure Non-invasive Debug Feature Implemented" "Not Implemented,Implemented"
|
|
bitfld.long 0x0 2. " NSNIDE ,Non-secure Non-invasive Debug Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 1. " NSIDFI ,Non-secure Invasive Debug Implemented" "Not Implemented,Implemented"
|
|
bitfld.long 0x0 0. " NSIDE ,Non-secure Invasive Debug Enable" "Disabled,Enabled"
|
|
width 0xc
|
|
rgroup c14:0x3f2--0x3f2
|
|
line.long 0x0 "DEVID,Device Identifier"
|
|
bitfld.long 0x00 0.--3. " PCSAMPLE ,Level of Program Counter sampling support (DBGPCSR and DBGCIDSR)" "Not implemented,DBGPCSR,Both,?..."
|
|
rgroup c14:0x3f3--0x3f3
|
|
line.long 0x0 "DEVTYPE,Device Type"
|
|
hexmask.long.byte 0x0 4.--7. 1. " STPC ,Sub Type: Processor Core"
|
|
hexmask.long.byte 0x0 0.--3. 1. " MCDL ,Main Class: Debug Logic"
|
|
rgroup c14:0x3f8--0x3f8
|
|
line.long 0x0 "PID0,Peripherial ID0"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PN ,Part Number [7:0]"
|
|
rgroup c14:0x3f9--0x3f9
|
|
line.long 0x0 "PID1,Peripherial ID1"
|
|
hexmask.long.byte 0x0 4.--7. 1. " JEP106 ,JEP106 Identity Code [3:0]"
|
|
hexmask.long.byte 0x0 0.--3. 1. " PN ,Part Number [11:8]"
|
|
rgroup c14:0x3fa--0x3fa
|
|
line.long 0x0 "PID2,Peripherial ID2"
|
|
hexmask.long.byte 0x0 4.--7. 1. " REV ,Revision"
|
|
bitfld.long 0x00 3. " JEPCD ,JEP 106 ID code" "Not used,Used"
|
|
textline " "
|
|
hexmask.long.byte 0x0 0.--2. 1. " JEP106 ,JEP106 Identity Code [6:4]"
|
|
rgroup c14:0x3fb--0x3fb
|
|
line.long 0x0 "PID3,Peripherial ID3"
|
|
hexmask.long.byte 0x0 4.--7. 1. " REVA ,RevAnd"
|
|
hexmask.long.byte 0x0 0.--3. 1. " CMOD ,Customer Modified"
|
|
rgroup c14:0x3f4--0x3f4
|
|
line.long 0x0 "PID4,Peripherial ID4"
|
|
bitfld.long 0x0 4.--7. " 4KBC ,Number of 4KB Blocks Occupied" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
bitfld.long 0x0 0.--3. " JEP106 ,JEP106 Continuation Code" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
rgroup c14:0x3fc--0x3fc
|
|
line.long 0x0 "COMPONENTID0,Component ID0"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRBL ,Preamble"
|
|
rgroup c14:0x3fd--0x3fd
|
|
line.long 0x0 "COMPONENTID1,Component ID1"
|
|
hexmask.long.byte 0x0 4.--7. 1. " CCLASS ,Component Class (CoreSight Component)"
|
|
hexmask.long.byte 0x0 0.--3. 1. " PRBL ,Preamble"
|
|
rgroup c14:0x3fe--0x3fe
|
|
line.long 0x0 "COMPONENTID2,Component ID2"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRBL ,Preamble"
|
|
rgroup c14:0x3ff--0x3ff
|
|
line.long 0x0 "COMPONENTID3,Component ID3"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRBL ,Preamble"
|
|
tree.end
|
|
textline " "
|
|
width 0x7
|
|
rgroup c14:0x000--0x000
|
|
line.long 0x0 "DIDR,Debug ID Register"
|
|
bitfld.long 0x0 28.--31. " WRP ,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x0 24.--27. " BRP ,Number of Breakpoint Register Pairs" "Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x0 20.--23. " CTX_CMP ,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " Version ,Debug Architecture Version" "Reserved,ARMv6,ARMv6.1,ARMv7,ARMv7 no ext.,?..."
|
|
textline " "
|
|
bitfld.long 0x0 15. " DEVID_IMP ,Debug Device ID Register DBGDEVID implemented" "Not implemented,Implemented"
|
|
bitfld.long 0x0 14. " NSUHD_IMP ,Secure User halting debug implemented" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x0 13. " PCSR_IMP ,Program Counter Sampling Register implemented" "Not implemented,Implemented"
|
|
bitfld.long 0x0 12. " SE_IMP ,Security Extensions implemented" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x0 4.--7. " Variant ,Implementation-defined Variant Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0 0.--3. " Revision ,Implementation-defined Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
width 0x7
|
|
group c14:0x22--0x22
|
|
line.long 0x0 "DSCR,Debug Status and Control Register"
|
|
bitfld.long 0x0 30. " DTRRXfull ,The DTRRX Full Flag" "Empty,Full"
|
|
bitfld.long 0x0 29. " DTRTXfull ,The DTRTX Full Flag" "Empty,Full"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DTRRXfull_l ,The DTRRX Full Flag 1" "Empty,Full"
|
|
bitfld.long 0x00 26. " DTRTXfull_l ,The DTRTX Full Flag 1" "Empty,Full"
|
|
textline " "
|
|
bitfld.long 0x0 25. " PIPEADV ,Sticky Pipeline Advance" "No effect,Instruction retired"
|
|
bitfld.long 0x0 24. " INSTRCOMPL_L ,Latched Instruction Complete" "Executing,Not executing"
|
|
textline " "
|
|
bitfld.long 0x0 20.--21. " EXTDCCMODE ,External DCC access mode" "Non-blocking,Stall,Fast,?..."
|
|
bitfld.long 0x0 19. " ADADISCARD ,Asynchronous Data Aborts Discarded" "Not discarded,Discarded"
|
|
textline " "
|
|
bitfld.long 0x0 18. " NS ,Non-secure World Status" "Secured,Not secured"
|
|
bitfld.long 0x0 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disabled" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x0 16. " SPIDDIS ,Secure Privileged Invasive Debug Disabled" "No,Yes"
|
|
bitfld.long 0x0 15. " MDBGEN ,Monitor Debug-mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 14. " HDEn ,Halting Debug-mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 12. " UDCCDIS ,User mode access to Comms Channel disable" "No,Yes"
|
|
bitfld.long 0x0 11. " IntDis ,Disable Interrupts" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x0 10. " DbgAck ,Force Debug Acknowledge" "Not forced,Forced"
|
|
bitfld.long 0x0 8. " UND_l ,Sticky Undefined Instruction" "No exception,Exception"
|
|
textline " "
|
|
bitfld.long 0x0 7. " ADABORT_l ,Sticky Asynchronous Data Abort" "Not aborted,Aborted"
|
|
bitfld.long 0x0 6. " SDABORT_l ,Sticky Synchronous Data Abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x0 2.--5. " MOE ,Method of Debug Entry" "Halt request,Breakpoint,Asynchronous Watchpoint,BKPT instruction,External debug,Vector catch,Reserved,Reserved,OS Unlock,Reserved,Synchronous Watchpoint,?..."
|
|
bitfld.long 0x0 1. " RESTARTED ,Core Restarted" "Debug not exited,Debug exited"
|
|
textline " "
|
|
bitfld.long 0x0 0. " HALTED ,Core Halted" "Normal state,Debug state"
|
|
width 0x7
|
|
if (((data.long(c14:0x00))&0x01000)==0x00000)
|
|
group c14:0x007--0x007
|
|
line.long 0x0 "VCR,Vector Catch Register"
|
|
bitfld.long 0x0 7. " FIQ ,Vector Catch Enable FIQ" "Disabled,Enabled"
|
|
bitfld.long 0x0 6. " IRQ ,Vector Catch Enable IRQ" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 4. " DABORT ,Vector Catch Enable Data Abort" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " PABORT ,Vector Catch Enable Prefetch Abort" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 2. " SWI ,Vector Catch Enable SWI" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " UNDEF ,Vector Catch Enable Undefined Instruction" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " RESET ,Vector Catch Enable Reset" "Disabled,Enabled"
|
|
else
|
|
group c14:0x007--0x007
|
|
line.long 0x0 "VCR,Vector Catch Register"
|
|
bitfld.long 0x0 31. " FIQN ,Vector Catch Enable FIQ (Non-secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 30. " IRQN ,Vector Catch Enable IRQ (Non-secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 28. " DABORTN ,Vector Catch Enable Data Abort (Non-secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 27. " PABORTN ,Vector Catch Enable Prefetch abort (Non-secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 26. " SWIN ,Vector Catch Enable SWI (Non-secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 25. " UNDEFS ,Vector Catch Enable Undefined (Non-secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 15. " FIQS ,Vector Catch Enable FIQ (Secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 14. " IRQS ,Vector Catch Enable IRQ (Secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 12. " DABORTS ,Vector Catch Enable Data Abort (Secure)" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " PABORTS ,Vector Catch Enable Prefetch abort (Secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 10. " SMI ,Vector Catch Enable SMI (Secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 7. " FIQ ,Vector Catch Enable FIQ" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 6. " IRQ ,Vector Catch Enable IRQ" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " DABORT0 ,Vector Catch Enable Data Abort" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 3. " PABORT ,Vector Catch Enable Prefetch Abort" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " SWI ,Vector Catch Enable SWI" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 1. " UNDEF ,Vector Catch Enable Undefined Instruction" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " RESET ,Vector Catch Enable Reset" "Disabled,Enabled"
|
|
endif
|
|
;rgroup c14:0x1++0x1
|
|
; line.long 0x0 "DRAR,Debug ROM Address Register"
|
|
; hexmask.long 0x0 12.--31. 0x1000 " DBROMPA ,Debug bus ROM physical address"
|
|
; bitfld.long 0x0 0.--1. " VB ,Valid bits" "Not valid,Reserved,Reserved,Valid"
|
|
; line.long 0x4 "DSAR,Debug Self Address Offset Register"
|
|
; hexmask.long 0x4 12.--31. 0x1000 " DBSAOV ,Debug bus self-address offset value"
|
|
; bitfld.long 0x4 0.--1. " VB ,Valid bits" "Not valid,Reserved,Reserved,Valid"
|
|
;hgroup c14:0x50++0x0
|
|
; hide.long 0x0 "DTR,Data Transfer Register"
|
|
; in
|
|
width 0x7
|
|
hgroup c14:0x020--0x020
|
|
hide.long 0x0 "DTRRX,Target -> Host Data Transfer Register"
|
|
in
|
|
group c14:0x023--0x023
|
|
line.long 0x0 "DTRTX,Host -> Target Data Transfer Register"
|
|
hexmask.long 0x00 0.--31. 1. " HTD ,Host -> target data"
|
|
wgroup c14:0x21++0x00
|
|
line.long 0x00 "ITR,Instruction Transfer Register"
|
|
hexmask.long 0x00 0.--31. 1. " Data ,ARM Instruction for the Processor in Debug State Execute"
|
|
wgroup c14:0x24++0x00
|
|
line.long 0x00 "DRCR,Debug Run Control Register"
|
|
bitfld.long 0x00 4. " CBIUR , Cancel Bus Interface Unit Requests" "Not canceled,Canceled"
|
|
bitfld.long 0x00 3. " CSPA ,Clear Sticky Pipeline Advance" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CSE ,Clear Sticky Exceptions" "Not cleared,Cleared"
|
|
bitfld.long 0x00 1. " RR ,Restart Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " HR ,Halt Request" "Not requested,Requested"
|
|
rgroup c14:0xc4++0x00
|
|
line.long 0x00 "PRCR,Device Power-Down and Reset Control Register"
|
|
bitfld.long 0x00 2. " HNDLR ,Hold non-debug logic reset" "No reset,Reset"
|
|
bitfld.long 0x00 1. " WRR ,Warm reset request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " NPD ,No Power-Down" "DBGNOPWRDWN low,DBGNOPWRDWN high"
|
|
hgroup c14:0xc5++0x00
|
|
hide.long 0x00 "PRSR,Device Power-Down and Reset Status Register"
|
|
in
|
|
tree.end
|
|
width 6.
|
|
tree "Breakpoint Registers"
|
|
group c14:0x40++0x00
|
|
line.long 0x00 "BVR0,Breakpoint Value Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " BV0 ,Breakpoint Value 0"
|
|
group c14:0x50++0x00
|
|
line.long 0x00 "BCR0,Breakpoint Control Register 0"
|
|
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x41++0x00
|
|
line.long 0x00 "BVR1,Breakpoint Value Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " BV1 ,Breakpoint Value 1"
|
|
group c14:0x51++0x00
|
|
line.long 0x00 "BCR1,Breakpoint Control Register 1"
|
|
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x42++0x00
|
|
line.long 0x00 "BVR2,Breakpoint Value Register 2"
|
|
hexmask.long 0x00 0.--31. 1. " BV2 ,Breakpoint Value 2"
|
|
group c14:0x52++0x00
|
|
line.long 0x00 "BCR2,Breakpoint Control Register 2"
|
|
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x43++0x00
|
|
line.long 0x00 "BVR3,Breakpoint Value Register 3"
|
|
hexmask.long 0x00 0.--31. 1. " BV3 ,Breakpoint Value 3"
|
|
group c14:0x53++0x00
|
|
line.long 0x00 "BCR3,Breakpoint Control Register 3"
|
|
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x44++0x00
|
|
line.long 0x00 "BVR4,Breakpoint Value Register 4"
|
|
hexmask.long 0x00 0.--31. 1. " BV4 ,Breakpoint Value 4"
|
|
group c14:0x54++0x00
|
|
line.long 0x00 "BCR4,Breakpoint Control Register 4"
|
|
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x45++0x00
|
|
line.long 0x00 "BVR5,Breakpoint Value Register 5"
|
|
hexmask.long 0x00 0.--31. 1. " BV5 ,Breakpoint Value 5"
|
|
group c14:0x55++0x00
|
|
line.long 0x00 "BCR5,Breakpoint Control Register 5"
|
|
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 6.
|
|
tree "Watchpoint Control Registers"
|
|
group c14:0x60++0x00
|
|
line.long 0x00 "WVR0,Watchpoint Value Register 0"
|
|
hexmask.long 0x00 2.--31. 0x04 " WA0 ,Watchpoint Address 0"
|
|
group c14:0x70--0x70
|
|
line.long 0x0 "WCR0,Watchpoint Control Register 0"
|
|
bitfld.long 0x0 24.--28. " BAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " L/S ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
group c14:0x61++0x00
|
|
line.long 0x00 "WVR1,Watchpoint Value Register 1"
|
|
hexmask.long 0x00 2.--31. 0x04 " WA1 ,Watchpoint Address 1"
|
|
group c14:0x71--0x71
|
|
line.long 0x0 "WCR1,Watchpoint Control Register 1"
|
|
bitfld.long 0x0 24.--28. " BAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " L/S ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
group c14:0x62++0x00
|
|
line.long 0x00 "WVR2,Watchpoint Value Register 2"
|
|
hexmask.long 0x00 2.--31. 0x04 " WA2 ,Watchpoint Address 2"
|
|
group c14:0x72--0x72
|
|
line.long 0x0 "WCR2,Watchpoint Control Register 2"
|
|
bitfld.long 0x0 24.--28. " BAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " L/S ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
group c14:0x63++0x00
|
|
line.long 0x00 "WVR3,Watchpoint Value Register 3"
|
|
hexmask.long 0x00 2.--31. 0x04 " WA3 ,Watchpoint Address 3"
|
|
group c14:0x73--0x73
|
|
line.long 0x0 "WCR3,Watchpoint Control Register 3"
|
|
bitfld.long 0x0 24.--28. " BAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " L/S ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
group c14:0x006--0x006
|
|
line.long 0x0 "WFAR,Watchpoint Fault Address Register"
|
|
hexmask.long 0x00 1.--31. 0x02 " WFAR ,Address of the watchpointed instruction"
|
|
tree.end
|
|
width 0xb
|
|
width 9.
|
|
base ad:(d.l(c15:0x400f))
|
|
tree "Snoop Control Unit (SCU)"
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SCUCR,SCU Control Register"
|
|
bitfld.long 0x00 6. " ICSE ,IC standby enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SCUSE ,SCU standby enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " FADTP0E ,Force all Device to port0 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SCUSLE ,SCU Speculative linefills enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SCURPE ,SCU RAMs Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " AFE ,Address filtering enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SCUE ,SCU enable" "Disabled,Enabled"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "SCUCON,SCU Configuration Register"
|
|
bitfld.long 0x00 14.--15. " RAM3 ,Cortex-A9 CPU3 Tag RAM Size" "16KB,32KB,64KB,?..."
|
|
bitfld.long 0x00 12.--13. " RAM2 ,Cortex-A9 CPU2 Tag RAM Size" "16KB,32KB,64KB,?..."
|
|
bitfld.long 0x00 10.--11. " RAM1 ,Cortex-A9 CPU1 Tag RAM Size" "16KB,32KB,64KB,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " RAM0 ,Cortex-A9 CPU0 Tag RAM Size" "16KB,32KB,64KB,?..."
|
|
bitfld.long 0x00 7. " MOD3 ,CPU3 Mode" "AMP,SMP"
|
|
bitfld.long 0x00 6. " MOD2 ,CPU2 Mode" "AMP,SMP"
|
|
textline " "
|
|
bitfld.long 0x00 5. " MOD1 ,CPU1 Mode" "AMP,SMP"
|
|
bitfld.long 0x00 4. " MOD0 ,CPU0 Mode" "AMP,SMP"
|
|
bitfld.long 0x00 0.--1. " NUM ,CPU Number" "CPU0,CPU0-CPU1,CPU0-CPU2,CPU0-CPU3"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SCUSTAT,SCU CPU Power Status Register"
|
|
bitfld.long 0x00 24.--25. " STAT3 ,CPU3 Status" "Normal,Reserved,Dormant,Powered-off"
|
|
bitfld.long 0x00 16.--17. " STAT2 ,CPU2 Status" "Normal,Reserved,Dormant,Powered-off"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " STAT1 ,CPU1 Status" "Normal,Reserved,Dormant,Powered-off"
|
|
bitfld.long 0x00 0.--1. " STAT0 ,CPU0 Status" "Normal,Reserved,Dormant,Powered-off"
|
|
wgroup.long 0x0c++0x03
|
|
line.long 0x00 "INV,SCU Invalidate All Register"
|
|
bitfld.long 0x00 12.--15. " WAY3 ,Cortex-A9 CPU3 Invalidated Ways" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " WAY2 ,Cortex-A9 CPU2 Invalidated Ways" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " WAY1 ,Cortex-A9 CPU1 Invalidated Ways" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " WAY0 ,Cortex-A9 CPU0 Invalidated Ways" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "FSAR,Filtering Start Address Register"
|
|
hexmask.long.word 0x00 20.--31. 0x10 " FSA ,Filtering start address"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "FEAR,Filtering End Address Register"
|
|
hexmask.long.word 0x00 20.--31. 0x10 " FEA ,Filtering end address"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "SAC,SCU Access Control Register"
|
|
bitfld.long 0x00 3. " CPU3 ,CPU3 Access the SAC" "No access,Access"
|
|
bitfld.long 0x00 2. " CPU2 ,CPU2 Access the SAC" "No access,Access"
|
|
bitfld.long 0x00 1. " CPU1 ,CPU1 Access the SAC" "No access,Access"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CPU0 ,CPU0 Access the SAC" "No access,Access"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "SSAC,SCU Secure Access Control Register"
|
|
bitfld.long 0x00 11. " GCPU3 ,Global timer for CPU3" "Secure only,Secure/Non-secure"
|
|
bitfld.long 0x00 10. " GCPU2 ,Global timer for CPU2" "Secure only,Secure/Non-secure"
|
|
bitfld.long 0x00 9. " GCPU1 ,Global timer for CPU1" "Secure only,Secure/Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 8. " GCPU0 ,Global timer for CPU0" "Secure only,Secure/Non-secure"
|
|
bitfld.long 0x00 7. " TCPU3 ,Private timer for CPU3 Access" "Secure only,Secure/Non-secure"
|
|
bitfld.long 0x00 6. " TCPU2 ,Private timer for CPU2 Access" "Secure only,Secure/Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TCPU1 ,Private timer for CPU1 Access" "Secure only,Secure/Non-secure"
|
|
bitfld.long 0x00 4. " TCPU0 ,Private timer for CPU0 Access" "Secure only,Secure/Non-secure"
|
|
bitfld.long 0x00 3. " CPU3 ,CPU3 Access the SAC" "No access,Access"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CPU2 ,CPU2 Access the SAC" "No access,Access"
|
|
bitfld.long 0x00 1. " CPU1 ,CPU1 Access the SAC" "No access,Access"
|
|
bitfld.long 0x00 0. " CPU0 ,CPU0 Access the SAC" "No access,Access"
|
|
tree.end
|
|
width 0xb
|
|
width 8.
|
|
tree "Timer and Watchdog Blocks"
|
|
base ad:(d.l(c15:0x400f))+0x600
|
|
group.long 0x00++0xb "Timer"
|
|
line.long 0x00 "TLR,Timer Load Register"
|
|
line.long 0x04 "TCR,Timer Counter Register"
|
|
line.long 0x08 "TCONR,Timer Control Register"
|
|
hexmask.long.byte 0x08 8.--15. 1. " PRES ,Prescaler"
|
|
bitfld.long 0x08 2. " IRQEN ,IRQ Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " AREL ,Auto reload" "Single shot,Auto-reload"
|
|
bitfld.long 0x08 0. " TEN ,Global Timer Enable" "Disabled,Enabled"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "TISR,Timer Interrupt Status Register"
|
|
eventfld.long 0x00 0. " EFLAG ,Event Flag" "0,1"
|
|
group.long 0x20++0x13 "Watchdog"
|
|
line.long 0x00 "WLR,Watchdog Load Register"
|
|
line.long 0x04 "WCR,Watchdog Counter Register"
|
|
line.long 0x08 "WCONR,Watchdog Control Register"
|
|
hexmask.long.byte 0x08 8.--15. 1. " PRES ,Prescaler"
|
|
bitfld.long 0x08 3. " WDM ,WD Mode" "Timer,Watchdog"
|
|
bitfld.long 0x08 2. " ITEN ,IT Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " AREL ,Auto-Reload" "Single shot,Auto-reload"
|
|
textline " "
|
|
bitfld.long 0x08 0. " WEN ,Watchdog Enable" "Disabled,Enabled"
|
|
line.long 0x0c "WISR,Watchdog Interrupt Status Register"
|
|
eventfld.long 0x0C 0. " EFLAG ,Event Flag" "0,1"
|
|
line.long 0x10 "WRSR,Watchdog Reset Sent Register"
|
|
eventfld.long 0x10 0. " RFLAG ,Reset Flag" "No effect,Reset"
|
|
wgroup.long 0x34++0x3
|
|
line.long 0x00 "WDR,Watchdog Disable Register"
|
|
base ad:(d.l(c15:0x400f))+0x200
|
|
group.long 0x00++0xb "Global Timer"
|
|
line.long 0x00 "GTLCR,Lower 32-bit Timer Counter Register"
|
|
line.long 0x04 "GTUCR,Upper 32-bit Timer Counter Register"
|
|
line.long 0x08 "GTCONR,Timer Control Register"
|
|
hexmask.long.byte 0x08 8.--15. 1. " PRES ,Prescaler"
|
|
bitfld.long 0x08 3. " AINC ,Auto Increment" "Single shot,Auto increment"
|
|
bitfld.long 0x08 2. " IRQEN ,IRQ Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " COMPEN ,Comp Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 0. " TEN ,Global Timer Enable" "Disabled,Enabled"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "GTSR,Timer Status Register"
|
|
eventfld.long 0x00 0. " EFLAG ,Event Flag" "0,1"
|
|
group.long 0x10++0xb
|
|
line.long 0x00 "GTLCOMR,Lower 32-bit Comparator Register"
|
|
line.long 0x04 "GTUCOMR,Upper 32-bit Comparator Register"
|
|
line.long 0x08 "GTINCR,Auto-increment Register for Comparator"
|
|
tree.end
|
|
width 11.
|
|
tree.open "Interrupt Controller (PL-390)"
|
|
width 17.
|
|
base AD:0xF8F01000
|
|
tree "Distributor Interface"
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x400)==0x400)
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICD_CTLR,Distributor Control Register (Secure access)"
|
|
bitfld.long 0x00 1. " ENABLEGRP1 ,Global Interrupt Enable Group 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ENABLEGRP0 ,Global Interrupt Enable Group 1" "Disabled,Enabled"
|
|
else
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICD_CTLR,Distributor Control Register"
|
|
bitfld.long 0x00 0. " ENABLE ,Global enable for forwarding pending interrupts from the Distributor to the CPU interfaces" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x400)==0x400)
|
|
rgroup.long 0x0004++0x03
|
|
line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 11.--15. " LSPI ,Locable Shared Peripheral Interrupts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 10. " SECURITYEXTN ,Indicate whether interrupt controller implements the security extensions" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..."
|
|
bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020"
|
|
else
|
|
rgroup.long 0x0004++0x03
|
|
line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 10. " SECURITYEXTN ,Indicates whether interrupt controller implements the security extensions" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..."
|
|
bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020"
|
|
endif
|
|
rgroup.long 0x0008++0x03
|
|
line.long 0x00 "GICD_IIDR,Distributor Implementer Identification Register"
|
|
bitfld.long 0x00 24.--31. " PRODID ,Indicates the product ID" "PL390,PL390,GIC400,GIC400,?..."
|
|
hexmask.long.word 0x00 12.--23. 1. " REV_NUM ,Returns the revision number of the GIC"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer"
|
|
sif CPU.FEATURE(hypervisor)||CPU.FEATURE(secure)
|
|
width 17.
|
|
tree "Group/Security Registers"
|
|
group.long 0x0080++0x03
|
|
line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB31 ,Group Status Bit 31" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB30 ,Group Status Bit 30" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB29 ,Group Status Bit 29" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB28 ,Group Status Bit 28" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB27 ,Group Status Bit 27" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB26 ,Group Status Bit 26" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB25 ,Group Status Bit 25" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB24 ,Group Status Bit 24" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB23 ,Group Status Bit 23" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB22 ,Group Status Bit 22" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB21 ,Group Status Bit 21" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB20 ,Group Status Bit 20" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB19 ,Group Status Bit 19" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB18 ,Group Status Bit 18" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB17 ,Group Status Bit 17" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB16 ,Group Status Bit 16" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB15 ,Group Status Bit 15" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB14 ,Group Status Bit 14" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB13 ,Group Status Bit 13" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB12 ,Group Status Bit 12" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB11 ,Group Status Bit 11" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB10 ,Group Status Bit 10" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB9 ,Group Status Bit 9" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB8 ,Group Status Bit 8" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB7 ,Group Status Bit 7" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB6 ,Group Status Bit 6" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB5 ,Group Status Bit 5" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB4 ,Group Status Bit 4" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB3 ,Group Status Bit 3" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB2 ,Group Status Bit 2" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB1 ,Group Status Bit 1" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB0 ,Group Status Bit 0" "Group 0,Group 1"
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x01)
|
|
group.long 0x0084++0x03
|
|
line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB63 ,Group Status Bit 63" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB62 ,Group Status Bit 62" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB61 ,Group Status Bit 61" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB60 ,Group Status Bit 60" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB59 ,Group Status Bit 59" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB58 ,Group Status Bit 58" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB57 ,Group Status Bit 57" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB56 ,Group Status Bit 56" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB55 ,Group Status Bit 55" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB54 ,Group Status Bit 54" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB53 ,Group Status Bit 53" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB52 ,Group Status Bit 52" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB51 ,Group Status Bit 51" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB50 ,Group Status Bit 50" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB49 ,Group Status Bit 49" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB48 ,Group Status Bit 48" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB47 ,Group Status Bit 47" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB46 ,Group Status Bit 46" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB45 ,Group Status Bit 45" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB44 ,Group Status Bit 44" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB43 ,Group Status Bit 43" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB42 ,Group Status Bit 42" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB41 ,Group Status Bit 41" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB40 ,Group Status Bit 40" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB39 ,Group Status Bit 39" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB38 ,Group Status Bit 38" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB37 ,Group Status Bit 37" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB36 ,Group Status Bit 36" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB35 ,Group Status Bit 35" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB34 ,Group Status Bit 34" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB33 ,Group Status Bit 33" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB32 ,Group Status Bit 32" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x0084++0x03
|
|
hide.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x02)
|
|
group.long 0x0088++0x03
|
|
line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB95 ,Group Status Bit 95" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB94 ,Group Status Bit 94" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB93 ,Group Status Bit 93" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB92 ,Group Status Bit 92" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB91 ,Group Status Bit 91" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB90 ,Group Status Bit 90" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB89 ,Group Status Bit 89" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB88 ,Group Status Bit 88" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB87 ,Group Status Bit 87" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB86 ,Group Status Bit 86" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB85 ,Group Status Bit 85" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB84 ,Group Status Bit 84" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB83 ,Group Status Bit 83" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB82 ,Group Status Bit 82" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB81 ,Group Status Bit 81" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB80 ,Group Status Bit 80" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB79 ,Group Status Bit 79" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB78 ,Group Status Bit 78" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB77 ,Group Status Bit 77" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB76 ,Group Status Bit 76" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB75 ,Group Status Bit 75" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB74 ,Group Status Bit 74" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB73 ,Group Status Bit 73" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB72 ,Group Status Bit 72" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB71 ,Group Status Bit 71" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB70 ,Group Status Bit 70" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB69 ,Group Status Bit 69" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB68 ,Group Status Bit 68" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB67 ,Group Status Bit 67" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB66 ,Group Status Bit 66" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB65 ,Group Status Bit 65" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB64 ,Group Status Bit 64" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x0088++0x03
|
|
hide.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x03)
|
|
group.long 0x008C++0x03
|
|
line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB126 ,Group Status Bit 126" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB125 ,Group Status Bit 125" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB123 ,Group Status Bit 123" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB122 ,Group Status Bit 122" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB120 ,Group Status Bit 120" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB119 ,Group Status Bit 119" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB117 ,Group Status Bit 117" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB116 ,Group Status Bit 116" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB114 ,Group Status Bit 114" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB113 ,Group Status Bit 113" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB111 ,Group Status Bit 111" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB110 ,Group Status Bit 110" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB108 ,Group Status Bit 108" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB107 ,Group Status Bit 107" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB105 ,Group Status Bit 105" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB104 ,Group Status Bit 104" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB102 ,Group Status Bit 102" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB101 ,Group Status Bit 101" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB99 ,Group Status Bit 99" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB98 ,Group Status Bit 98" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB97 ,Group Status Bit 97" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB96 ,Group Status Bit 96" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x008C++0x03
|
|
hide.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x04)
|
|
group.long 0x0090++0x03
|
|
line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB158 ,Group Status Bit 158" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB157 ,Group Status Bit 157" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB155 ,Group Status Bit 155" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB154 ,Group Status Bit 154" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB152 ,Group Status Bit 152" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB151 ,Group Status Bit 151" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB149 ,Group Status Bit 149" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB148 ,Group Status Bit 148" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB146 ,Group Status Bit 146" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB145 ,Group Status Bit 145" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB143 ,Group Status Bit 143" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB142 ,Group Status Bit 142" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB140 ,Group Status Bit 140" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB139 ,Group Status Bit 139" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB137 ,Group Status Bit 137" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB136 ,Group Status Bit 136" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB134 ,Group Status Bit 134" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB133 ,Group Status Bit 133" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB131 ,Group Status Bit 131" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB130 ,Group Status Bit 130" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB128 ,Group Status Bit 128" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x0090++0x03
|
|
hide.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x05)
|
|
group.long 0x0094++0x03
|
|
line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB190 ,Group Status Bit 190" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB189 ,Group Status Bit 189" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB187 ,Group Status Bit 187" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB186 ,Group Status Bit 186" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB184 ,Group Status Bit 184" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB183 ,Group Status Bit 183" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB181 ,Group Status Bit 181" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB180 ,Group Status Bit 180" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB178 ,Group Status Bit 178" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB177 ,Group Status Bit 177" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB175 ,Group Status Bit 175" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB174 ,Group Status Bit 174" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB172 ,Group Status Bit 172" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB171 ,Group Status Bit 171" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB169 ,Group Status Bit 169" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB168 ,Group Status Bit 168" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB166 ,Group Status Bit 166" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB165 ,Group Status Bit 165" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB163 ,Group Status Bit 163" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB162 ,Group Status Bit 162" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB160 ,Group Status Bit 160" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x0094++0x03
|
|
hide.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x06)
|
|
group.long 0x0098++0x03
|
|
line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB222 ,Group Status Bit 222" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB221 ,Group Status Bit 221" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB219 ,Group Status Bit 219" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB218 ,Group Status Bit 218" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB216 ,Group Status Bit 216" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB215 ,Group Status Bit 215" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB213 ,Group Status Bit 213" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB212 ,Group Status Bit 212" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB210 ,Group Status Bit 210" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB209 ,Group Status Bit 209" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB207 ,Group Status Bit 207" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB206 ,Group Status Bit 206" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB204 ,Group Status Bit 204" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB203 ,Group Status Bit 203" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB201 ,Group Status Bit 201" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB200 ,Group Status Bit 200" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB198 ,Group Status Bit 198" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB197 ,Group Status Bit 197" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB195 ,Group Status Bit 195" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB194 ,Group Status Bit 194" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB192 ,Group Status Bit 192" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x0098++0x03
|
|
hide.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x07)
|
|
group.long 0x009C++0x03
|
|
line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB254 ,Group Status Bit 254" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB253 ,Group Status Bit 253" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB251 ,Group Status Bit 251" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB250 ,Group Status Bit 250" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB248 ,Group Status Bit 248" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB247 ,Group Status Bit 247" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB245 ,Group Status Bit 245" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB244 ,Group Status Bit 244" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB242 ,Group Status Bit 242" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB241 ,Group Status Bit 241" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB239 ,Group Status Bit 239" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB238 ,Group Status Bit 238" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB236 ,Group Status Bit 236" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB235 ,Group Status Bit 235" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB233 ,Group Status Bit 233" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB232 ,Group Status Bit 232" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB230 ,Group Status Bit 230" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB229 ,Group Status Bit 229" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB227 ,Group Status Bit 227" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB226 ,Group Status Bit 226" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB224 ,Group Status Bit 224" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x009C++0x03
|
|
hide.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x08)
|
|
group.long 0x00A0++0x03
|
|
line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB286 ,Group Status Bit 286" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB285 ,Group Status Bit 285" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB283 ,Group Status Bit 283" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB282 ,Group Status Bit 282" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB280 ,Group Status Bit 280" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB279 ,Group Status Bit 279" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB277 ,Group Status Bit 277" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB276 ,Group Status Bit 276" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB274 ,Group Status Bit 274" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB273 ,Group Status Bit 273" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB271 ,Group Status Bit 271" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB270 ,Group Status Bit 270" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB268 ,Group Status Bit 268" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB267 ,Group Status Bit 267" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB265 ,Group Status Bit 265" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB264 ,Group Status Bit 264" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB262 ,Group Status Bit 262" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB261 ,Group Status Bit 261" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB259 ,Group Status Bit 259" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB258 ,Group Status Bit 258" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB256 ,Group Status Bit 256" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00A0++0x03
|
|
hide.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x09)
|
|
group.long 0x00A4++0x03
|
|
line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB318 ,Group Status Bit 318" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB317 ,Group Status Bit 317" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB315 ,Group Status Bit 315" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB314 ,Group Status Bit 314" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB312 ,Group Status Bit 312" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB311 ,Group Status Bit 311" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB309 ,Group Status Bit 309" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB308 ,Group Status Bit 308" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB306 ,Group Status Bit 306" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB305 ,Group Status Bit 305" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB303 ,Group Status Bit 303" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB302 ,Group Status Bit 302" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB300 ,Group Status Bit 300" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB299 ,Group Status Bit 299" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB297 ,Group Status Bit 297" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB296 ,Group Status Bit 296" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB294 ,Group Status Bit 294" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB293 ,Group Status Bit 293" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB291 ,Group Status Bit 291" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB290 ,Group Status Bit 290" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB288 ,Group Status Bit 288" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00A4++0x03
|
|
hide.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0A)
|
|
group.long 0x00A8++0x03
|
|
line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB350 ,Group Status Bit 350" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB349 ,Group Status Bit 349" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB347 ,Group Status Bit 347" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB346 ,Group Status Bit 346" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB344 ,Group Status Bit 344" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB343 ,Group Status Bit 343" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB341 ,Group Status Bit 341" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB340 ,Group Status Bit 340" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB338 ,Group Status Bit 338" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB337 ,Group Status Bit 337" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB335 ,Group Status Bit 335" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB334 ,Group Status Bit 334" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB332 ,Group Status Bit 332" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB331 ,Group Status Bit 331" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB329 ,Group Status Bit 329" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB328 ,Group Status Bit 328" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB326 ,Group Status Bit 326" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB325 ,Group Status Bit 325" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB323 ,Group Status Bit 323" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB322 ,Group Status Bit 322" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB320 ,Group Status Bit 320" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00A8++0x03
|
|
hide.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0B)
|
|
group.long 0x00AC++0x03
|
|
line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB382 ,Group Status Bit 382" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB381 ,Group Status Bit 381" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB379 ,Group Status Bit 379" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB378 ,Group Status Bit 378" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB376 ,Group Status Bit 376" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB375 ,Group Status Bit 375" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB373 ,Group Status Bit 373" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB372 ,Group Status Bit 372" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB370 ,Group Status Bit 370" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB369 ,Group Status Bit 369" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB367 ,Group Status Bit 367" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB366 ,Group Status Bit 366" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB364 ,Group Status Bit 364" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB363 ,Group Status Bit 363" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB361 ,Group Status Bit 361" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB360 ,Group Status Bit 360" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB358 ,Group Status Bit 358" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB357 ,Group Status Bit 357" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB355 ,Group Status Bit 355" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB354 ,Group Status Bit 354" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB352 ,Group Status Bit 352" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00AC++0x03
|
|
hide.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0C)
|
|
group.long 0x00B0++0x03
|
|
line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB414 ,Group Status Bit 414" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB413 ,Group Status Bit 413" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB411 ,Group Status Bit 411" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB410 ,Group Status Bit 410" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB408 ,Group Status Bit 408" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB407 ,Group Status Bit 407" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB405 ,Group Status Bit 405" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB404 ,Group Status Bit 404" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB402 ,Group Status Bit 402" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB401 ,Group Status Bit 401" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB399 ,Group Status Bit 399" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB398 ,Group Status Bit 398" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB396 ,Group Status Bit 396" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB395 ,Group Status Bit 395" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB393 ,Group Status Bit 393" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB392 ,Group Status Bit 392" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB390 ,Group Status Bit 390" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB389 ,Group Status Bit 389" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB387 ,Group Status Bit 387" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB386 ,Group Status Bit 386" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB384 ,Group Status Bit 384" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00B0++0x03
|
|
hide.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0D)
|
|
group.long 0x00B4++0x03
|
|
line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB446 ,Group Status Bit 446" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB445 ,Group Status Bit 445" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB443 ,Group Status Bit 443" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB442 ,Group Status Bit 442" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB440 ,Group Status Bit 440" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB439 ,Group Status Bit 439" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB437 ,Group Status Bit 437" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB436 ,Group Status Bit 436" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB434 ,Group Status Bit 434" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB433 ,Group Status Bit 433" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB431 ,Group Status Bit 431" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB430 ,Group Status Bit 430" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB428 ,Group Status Bit 428" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB427 ,Group Status Bit 427" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB425 ,Group Status Bit 425" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB424 ,Group Status Bit 424" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB422 ,Group Status Bit 422" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB421 ,Group Status Bit 421" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB419 ,Group Status Bit 419" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB418 ,Group Status Bit 418" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB416 ,Group Status Bit 416" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00B4++0x03
|
|
hide.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0E)
|
|
group.long 0x00B8++0x03
|
|
line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB478 ,Group Status Bit 478" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB477 ,Group Status Bit 477" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB475 ,Group Status Bit 475" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB474 ,Group Status Bit 474" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB472 ,Group Status Bit 472" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB471 ,Group Status Bit 471" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB469 ,Group Status Bit 469" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB468 ,Group Status Bit 468" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB466 ,Group Status Bit 466" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB465 ,Group Status Bit 465" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB463 ,Group Status Bit 463" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB462 ,Group Status Bit 462" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB460 ,Group Status Bit 460" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB459 ,Group Status Bit 459" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB457 ,Group Status Bit 457" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB456 ,Group Status Bit 456" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB454 ,Group Status Bit 454" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB453 ,Group Status Bit 453" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB451 ,Group Status Bit 451" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB450 ,Group Status Bit 450" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB448 ,Group Status Bit 448" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00B8++0x03
|
|
hide.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0F)
|
|
group.long 0x00BC++0x03
|
|
line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB510 ,Group Status Bit 510" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB509 ,Group Status Bit 509" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB507 ,Group Status Bit 507" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB506 ,Group Status Bit 506" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB504 ,Group Status Bit 504" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB503 ,Group Status Bit 503" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB501 ,Group Status Bit 501" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB500 ,Group Status Bit 500" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB498 ,Group Status Bit 498" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB497 ,Group Status Bit 497" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB495 ,Group Status Bit 495" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB494 ,Group Status Bit 494" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB492 ,Group Status Bit 492" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB491 ,Group Status Bit 491" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB489 ,Group Status Bit 489" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB488 ,Group Status Bit 488" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB486 ,Group Status Bit 486" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB485 ,Group Status Bit 485" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB483 ,Group Status Bit 483" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB482 ,Group Status Bit 482" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB480 ,Group Status Bit 480" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00BC++0x03
|
|
hide.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0x00C0++0x03
|
|
line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB542 ,Group Status Bit 542" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB541 ,Group Status Bit 541" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB539 ,Group Status Bit 539" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB538 ,Group Status Bit 538" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB536 ,Group Status Bit 536" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB535 ,Group Status Bit 535" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB533 ,Group Status Bit 533" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB532 ,Group Status Bit 532" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB530 ,Group Status Bit 530" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB529 ,Group Status Bit 529" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB527 ,Group Status Bit 527" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB526 ,Group Status Bit 526" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB524 ,Group Status Bit 524" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB523 ,Group Status Bit 523" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB521 ,Group Status Bit 521" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB520 ,Group Status Bit 520" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB518 ,Group Status Bit 518" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB517 ,Group Status Bit 517" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB515 ,Group Status Bit 515" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB514 ,Group Status Bit 514" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB512 ,Group Status Bit 512" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00C0++0x03
|
|
hide.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0x00C4++0x03
|
|
line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB574 ,Group Status Bit 574" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB573 ,Group Status Bit 573" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB571 ,Group Status Bit 571" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB570 ,Group Status Bit 570" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB568 ,Group Status Bit 568" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB567 ,Group Status Bit 567" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB565 ,Group Status Bit 565" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB564 ,Group Status Bit 564" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB562 ,Group Status Bit 562" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB561 ,Group Status Bit 561" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB559 ,Group Status Bit 559" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB558 ,Group Status Bit 558" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB556 ,Group Status Bit 556" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB555 ,Group Status Bit 555" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB553 ,Group Status Bit 553" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB552 ,Group Status Bit 552" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB550 ,Group Status Bit 550" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB549 ,Group Status Bit 549" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB547 ,Group Status Bit 547" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB546 ,Group Status Bit 546" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB544 ,Group Status Bit 544" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00C4++0x03
|
|
hide.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0x00C8++0x03
|
|
line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB606 ,Group Status Bit 606" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB605 ,Group Status Bit 605" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB603 ,Group Status Bit 603" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB602 ,Group Status Bit 602" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB600 ,Group Status Bit 600" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB599 ,Group Status Bit 599" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB597 ,Group Status Bit 597" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB596 ,Group Status Bit 596" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB594 ,Group Status Bit 594" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB593 ,Group Status Bit 593" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB591 ,Group Status Bit 591" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB590 ,Group Status Bit 590" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB588 ,Group Status Bit 588" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB587 ,Group Status Bit 587" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB585 ,Group Status Bit 585" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB584 ,Group Status Bit 584" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB582 ,Group Status Bit 582" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB581 ,Group Status Bit 581" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB579 ,Group Status Bit 579" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB578 ,Group Status Bit 578" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB576 ,Group Status Bit 576" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00C8++0x03
|
|
hide.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0x00CC++0x03
|
|
line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB638 ,Group Status Bit 638" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB637 ,Group Status Bit 637" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB635 ,Group Status Bit 635" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB634 ,Group Status Bit 634" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB632 ,Group Status Bit 632" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB631 ,Group Status Bit 631" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB629 ,Group Status Bit 629" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB628 ,Group Status Bit 628" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB626 ,Group Status Bit 626" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB625 ,Group Status Bit 625" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB623 ,Group Status Bit 623" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB622 ,Group Status Bit 622" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB620 ,Group Status Bit 620" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB619 ,Group Status Bit 619" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB617 ,Group Status Bit 617" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB616 ,Group Status Bit 616" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB614 ,Group Status Bit 614" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB613 ,Group Status Bit 613" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB611 ,Group Status Bit 611" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB610 ,Group Status Bit 610" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB608 ,Group Status Bit 608" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00CC++0x03
|
|
hide.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0x00D0++0x03
|
|
line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB670 ,Group Status Bit 670" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB669 ,Group Status Bit 669" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB667 ,Group Status Bit 667" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB666 ,Group Status Bit 666" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB664 ,Group Status Bit 664" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB663 ,Group Status Bit 663" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB661 ,Group Status Bit 661" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB660 ,Group Status Bit 660" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB658 ,Group Status Bit 658" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB657 ,Group Status Bit 657" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB655 ,Group Status Bit 655" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB654 ,Group Status Bit 654" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB652 ,Group Status Bit 652" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB651 ,Group Status Bit 651" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB649 ,Group Status Bit 649" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB648 ,Group Status Bit 648" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB646 ,Group Status Bit 646" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB645 ,Group Status Bit 645" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB643 ,Group Status Bit 643" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB642 ,Group Status Bit 642" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB640 ,Group Status Bit 640" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00D0++0x03
|
|
hide.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0x00D4++0x03
|
|
line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB702 ,Group Status Bit 702" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB701 ,Group Status Bit 701" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB699 ,Group Status Bit 699" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB698 ,Group Status Bit 698" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB696 ,Group Status Bit 696" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB695 ,Group Status Bit 695" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB693 ,Group Status Bit 693" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB692 ,Group Status Bit 692" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB690 ,Group Status Bit 690" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB689 ,Group Status Bit 689" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB687 ,Group Status Bit 687" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB686 ,Group Status Bit 686" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB684 ,Group Status Bit 684" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB683 ,Group Status Bit 683" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB681 ,Group Status Bit 681" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB680 ,Group Status Bit 680" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB678 ,Group Status Bit 678" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB677 ,Group Status Bit 677" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB675 ,Group Status Bit 675" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB674 ,Group Status Bit 674" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB672 ,Group Status Bit 672" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00D4++0x03
|
|
hide.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0x00D8++0x03
|
|
line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB734 ,Group Status Bit 734" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB733 ,Group Status Bit 733" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB731 ,Group Status Bit 731" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB730 ,Group Status Bit 730" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB728 ,Group Status Bit 728" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB727 ,Group Status Bit 727" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB725 ,Group Status Bit 725" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB724 ,Group Status Bit 724" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB722 ,Group Status Bit 722" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB721 ,Group Status Bit 721" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB719 ,Group Status Bit 719" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB718 ,Group Status Bit 718" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB716 ,Group Status Bit 716" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB715 ,Group Status Bit 715" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB713 ,Group Status Bit 713" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB712 ,Group Status Bit 712" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB710 ,Group Status Bit 710" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB709 ,Group Status Bit 709" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB707 ,Group Status Bit 707" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB706 ,Group Status Bit 706" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB704 ,Group Status Bit 704" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00D8++0x03
|
|
hide.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0x00DC++0x03
|
|
line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB766 ,Group Status Bit 766" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB765 ,Group Status Bit 765" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB763 ,Group Status Bit 763" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB762 ,Group Status Bit 762" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB760 ,Group Status Bit 760" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB759 ,Group Status Bit 759" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB757 ,Group Status Bit 757" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB756 ,Group Status Bit 756" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB754 ,Group Status Bit 754" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB753 ,Group Status Bit 753" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB751 ,Group Status Bit 751" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB750 ,Group Status Bit 750" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB748 ,Group Status Bit 748" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB747 ,Group Status Bit 747" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB745 ,Group Status Bit 745" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB744 ,Group Status Bit 744" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB742 ,Group Status Bit 742" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB741 ,Group Status Bit 741" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB739 ,Group Status Bit 739" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB738 ,Group Status Bit 738" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB736 ,Group Status Bit 736" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00DC++0x03
|
|
hide.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0x00E0++0x03
|
|
line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB798 ,Group Status Bit 798" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB797 ,Group Status Bit 797" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB795 ,Group Status Bit 795" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB794 ,Group Status Bit 794" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB792 ,Group Status Bit 792" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB791 ,Group Status Bit 791" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB789 ,Group Status Bit 789" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB788 ,Group Status Bit 788" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB786 ,Group Status Bit 786" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB785 ,Group Status Bit 785" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB783 ,Group Status Bit 783" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB782 ,Group Status Bit 782" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB780 ,Group Status Bit 780" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB779 ,Group Status Bit 779" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB777 ,Group Status Bit 777" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB776 ,Group Status Bit 776" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB774 ,Group Status Bit 774" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB773 ,Group Status Bit 773" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB771 ,Group Status Bit 771" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB770 ,Group Status Bit 770" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB768 ,Group Status Bit 768" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x0E0++0x03
|
|
hide.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0x00E4++0x03
|
|
line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB830 ,Group Status Bit 830" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB829 ,Group Status Bit 829" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB827 ,Group Status Bit 827" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB826 ,Group Status Bit 826" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB824 ,Group Status Bit 824" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB823 ,Group Status Bit 823" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB821 ,Group Status Bit 821" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB820 ,Group Status Bit 820" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB818 ,Group Status Bit 818" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB817 ,Group Status Bit 817" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB815 ,Group Status Bit 815" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB814 ,Group Status Bit 814" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB812 ,Group Status Bit 812" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB811 ,Group Status Bit 811" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB809 ,Group Status Bit 809" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB808 ,Group Status Bit 808" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB806 ,Group Status Bit 806" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB805 ,Group Status Bit 805" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB803 ,Group Status Bit 803" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB802 ,Group Status Bit 802" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB800 ,Group Status Bit 800" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00E4++0x03
|
|
hide.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0x00E8++0x03
|
|
line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB862 ,Group Status Bit 862" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB861 ,Group Status Bit 861" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB859 ,Group Status Bit 859" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB858 ,Group Status Bit 858" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB856 ,Group Status Bit 856" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB855 ,Group Status Bit 855" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB853 ,Group Status Bit 853" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB852 ,Group Status Bit 852" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB850 ,Group Status Bit 850" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB849 ,Group Status Bit 849" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB847 ,Group Status Bit 847" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB846 ,Group Status Bit 846" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB844 ,Group Status Bit 844" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB843 ,Group Status Bit 843" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB841 ,Group Status Bit 841" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB840 ,Group Status Bit 840" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB838 ,Group Status Bit 838" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB837 ,Group Status Bit 837" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB835 ,Group Status Bit 835" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB834 ,Group Status Bit 834" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB832 ,Group Status Bit 832" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00E8++0x03
|
|
hide.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0x00EC++0x03
|
|
line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Non-Secure access)"
|
|
bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB894 ,Group Status Bit 894" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB893 ,Group Status Bit 893" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB891 ,Group Status Bit 891" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB890 ,Group Status Bit 890" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB888 ,Group Status Bit 888" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB887 ,Group Status Bit 887" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB885 ,Group Status Bit 885" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB884 ,Group Status Bit 884" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB882 ,Group Status Bit 882" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB881 ,Group Status Bit 881" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB879 ,Group Status Bit 879" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB878 ,Group Status Bit 878" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB876 ,Group Status Bit 876" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB875 ,Group Status Bit 875" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB873 ,Group Status Bit 873" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB872 ,Group Status Bit 872" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB870 ,Group Status Bit 870" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB869 ,Group Status Bit 869" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB867 ,Group Status Bit 867" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB866 ,Group Status Bit 866" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB864 ,Group Status Bit 864" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00EC++0x03
|
|
hide.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0x00F0++0x03
|
|
line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB926 ,Group Status Bit 926" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB925 ,Group Status Bit 925" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB923 ,Group Status Bit 923" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB922 ,Group Status Bit 922" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB920 ,Group Status Bit 920" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB919 ,Group Status Bit 919" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB917 ,Group Status Bit 917" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB916 ,Group Status Bit 916" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB914 ,Group Status Bit 914" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB913 ,Group Status Bit 913" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB911 ,Group Status Bit 911" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB910 ,Group Status Bit 910" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB908 ,Group Status Bit 908" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB907 ,Group Status Bit 907" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB905 ,Group Status Bit 905" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB904 ,Group Status Bit 904" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB902 ,Group Status Bit 902" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB901 ,Group Status Bit 901" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB899 ,Group Status Bit 899" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB898 ,Group Status Bit 898" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB896 ,Group Status Bit 896" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x0F0++0x03
|
|
hide.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0x00F4++0x03
|
|
line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB958 ,Group Status Bit 958" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB957 ,Group Status Bit 957" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB955 ,Group Status Bit 955" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB954 ,Group Status Bit 954" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB952 ,Group Status Bit 952" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB951 ,Group Status Bit 951" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB949 ,Group Status Bit 949" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB948 ,Group Status Bit 948" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB946 ,Group Status Bit 946" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB945 ,Group Status Bit 945" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB943 ,Group Status Bit 943" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB942 ,Group Status Bit 942" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB940 ,Group Status Bit 940" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB939 ,Group Status Bit 939" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB937 ,Group Status Bit 937" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB936 ,Group Status Bit 936" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB934 ,Group Status Bit 934" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB933 ,Group Status Bit 933" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB931 ,Group Status Bit 931" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB930 ,Group Status Bit 930" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB928 ,Group Status Bit 928" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00F4++0x03
|
|
hide.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0x00F8++0x03
|
|
line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB990 ,Group Status Bit 990" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB989 ,Group Status Bit 989" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB987 ,Group Status Bit 987" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB986 ,Group Status Bit 986" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB984 ,Group Status Bit 984" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB983 ,Group Status Bit 983" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB981 ,Group Status Bit 981" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB980 ,Group Status Bit 980" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB978 ,Group Status Bit 978" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB977 ,Group Status Bit 977" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB975 ,Group Status Bit 975" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB974 ,Group Status Bit 974" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB972 ,Group Status Bit 972" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB971 ,Group Status Bit 971" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB969 ,Group Status Bit 969" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB968 ,Group Status Bit 968" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB966 ,Group Status Bit 966" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB965 ,Group Status Bit 965" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB963 ,Group Status Bit 963" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB962 ,Group Status Bit 962" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB960 ,Group Status Bit 960" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00F8++0x03
|
|
hide.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)==0x1F)
|
|
group.long 0x00FC++0x03
|
|
line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31 (Non-secure access)"
|
|
bitfld.long 0x00 27. " GSB1019 ,Group Status Bit 1019" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB1018 ,Group Status Bit 1018" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB1017 ,Group Status Bit 1017" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB1016 ,Group Status Bit 1016" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB1015 ,Group Status Bit 1015" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB1014 ,Group Status Bit 1014" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB1013 ,Group Status Bit 1013" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB1012 ,Group Status Bit 1012" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB1011 ,Group Status Bit 1011" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB1010 ,Group Status Bit 1010" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB1009 ,Group Status Bit 1009" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB1008 ,Group Status Bit 1008" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB1007 ,Group Status Bit 1007" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB1006 ,Group Status Bit 1006" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB1005 ,Group Status Bit 1005" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB1004 ,Group Status Bit 1004" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB1003 ,Group Status Bit 1003" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB1002 ,Group Status Bit 1002" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB1001 ,Group Status Bit 1001" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB1000 ,Group Status Bit 1000" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB999 ,Group Status Bit 999" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB998 ,Group Status Bit 998" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB997 ,Group Status Bit 997" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB996 ,Group Status Bit 996" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB995 ,Group Status Bit 995" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB994 ,Group Status Bit 994" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB993 ,Group Status Bit 993" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB992 ,Group Status Bit 992" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00FC++0x03
|
|
hide.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
endif
|
|
width 24.
|
|
tree "Set/Clear Enable Registers"
|
|
group.long 0x0100++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB31 ,Set/Clear Enable Bit 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB30 ,Set/Clear Enable Bit 30" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB29 ,Set/Clear Enable Bit 29" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB28 ,Set/Clear Enable Bit 28" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB27 ,Set/Clear Enable Bit 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB26 ,Set/Clear Enable Bit 26" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB25 ,Set/Clear Enable Bit 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB24 ,Set/Clear Enable Bit 24" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB23 ,Set/Clear Enable Bit 23" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB22 ,Set/Clear Enable Bit 22" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB21 ,Set/Clear Enable Bit 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB20 ,Set/Clear Enable Bit 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB19 ,Set/Clear Enable Bit 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB18 ,Set/Clear Enable Bit 18" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB17 ,Set/Clear Enable Bit 17" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB16 ,Set/Clear Enable Bit 16" "Disabled,Enabled"
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x01)
|
|
group.long 0x0104++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB63 ,Set/Clear Enable Bit 63" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB62 ,Set/Clear Enable Bit 62" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB61 ,Set/Clear Enable Bit 61" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB60 ,Set/Clear Enable Bit 60" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB59 ,Set/Clear Enable Bit 59" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB58 ,Set/Clear Enable Bit 58" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB57 ,Set/Clear Enable Bit 57" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB56 ,Set/Clear Enable Bit 56" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB55 ,Set/Clear Enable Bit 55" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB54 ,Set/Clear Enable Bit 54" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB53 ,Set/Clear Enable Bit 53" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB52 ,Set/Clear Enable Bit 52" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB51 ,Set/Clear Enable Bit 51" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB50 ,Set/Clear Enable Bit 50" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB49 ,Set/Clear Enable Bit 49" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB48 ,Set/Clear Enable Bit 48" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB47 ,Set/Clear Enable Bit 47" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB46 ,Set/Clear Enable Bit 46" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB45 ,Set/Clear Enable Bit 45" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB44 ,Set/Clear Enable Bit 44" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB43 ,Set/Clear Enable Bit 43" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB42 ,Set/Clear Enable Bit 42" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB41 ,Set/Clear Enable Bit 41" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB40 ,Set/Clear Enable Bit 40" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB39 ,Set/Clear Enable Bit 39" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB38 ,Set/Clear Enable Bit 38" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB37 ,Set/Clear Enable Bit 37" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB36 ,Set/Clear Enable Bit 36" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB35 ,Set/Clear Enable Bit 35" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB34 ,Set/Clear Enable Bit 34" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB33 ,Set/Clear Enable Bit 33" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB32 ,Set/Clear Enable Bit 32" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0104++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x02)
|
|
group.long 0x0108++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB95 ,Set/Clear Enable Bit 95" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB94 ,Set/Clear Enable Bit 94" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB93 ,Set/Clear Enable Bit 93" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB92 ,Set/Clear Enable Bit 92" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB91 ,Set/Clear Enable Bit 91" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB90 ,Set/Clear Enable Bit 90" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB89 ,Set/Clear Enable Bit 89" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB88 ,Set/Clear Enable Bit 88" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB87 ,Set/Clear Enable Bit 87" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB86 ,Set/Clear Enable Bit 86" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB85 ,Set/Clear Enable Bit 85" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB84 ,Set/Clear Enable Bit 84" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB83 ,Set/Clear Enable Bit 83" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB82 ,Set/Clear Enable Bit 82" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB81 ,Set/Clear Enable Bit 81" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB80 ,Set/Clear Enable Bit 80" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB79 ,Set/Clear Enable Bit 79" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB78 ,Set/Clear Enable Bit 78" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB77 ,Set/Clear Enable Bit 77" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB76 ,Set/Clear Enable Bit 76" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB75 ,Set/Clear Enable Bit 75" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB74 ,Set/Clear Enable Bit 74" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB73 ,Set/Clear Enable Bit 73" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB72 ,Set/Clear Enable Bit 72" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB71 ,Set/Clear Enable Bit 71" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB70 ,Set/Clear Enable Bit 70" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB69 ,Set/Clear Enable Bit 69" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB68 ,Set/Clear Enable Bit 68" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB67 ,Set/Clear Enable Bit 67" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB66 ,Set/Clear Enable Bit 66" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB65 ,Set/Clear Enable Bit 65" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB64 ,Set/Clear Enable Bit 64" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0108++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x03)
|
|
group.long 0x010C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB127 ,Set/Clear Enable Bit 127" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB126 ,Set/Clear Enable Bit 126" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB125 ,Set/Clear Enable Bit 125" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB124 ,Set/Clear Enable Bit 124" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB123 ,Set/Clear Enable Bit 123" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB122 ,Set/Clear Enable Bit 122" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB121 ,Set/Clear Enable Bit 121" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB120 ,Set/Clear Enable Bit 120" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB119 ,Set/Clear Enable Bit 119" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB118 ,Set/Clear Enable Bit 118" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB117 ,Set/Clear Enable Bit 117" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB116 ,Set/Clear Enable Bit 116" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB115 ,Set/Clear Enable Bit 115" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB114 ,Set/Clear Enable Bit 114" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB113 ,Set/Clear Enable Bit 113" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB112 ,Set/Clear Enable Bit 112" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB111 ,Set/Clear Enable Bit 111" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB110 ,Set/Clear Enable Bit 110" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB109 ,Set/Clear Enable Bit 109" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB108 ,Set/Clear Enable Bit 108" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB107 ,Set/Clear Enable Bit 107" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB106 ,Set/Clear Enable Bit 106" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB105 ,Set/Clear Enable Bit 105" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB104 ,Set/Clear Enable Bit 104" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB103 ,Set/Clear Enable Bit 103" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB102 ,Set/Clear Enable Bit 102" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB101 ,Set/Clear Enable Bit 101" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB100 ,Set/Clear Enable Bit 100" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB99 ,Set/Clear Enable Bit 99" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB98 ,Set/Clear Enable Bit 98" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB97 ,Set/Clear Enable Bit 97" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB96 ,Set/Clear Enable Bit 96" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x010C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x04)
|
|
group.long 0x0110++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB159 ,Set/Clear Enable Bit 159" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB158 ,Set/Clear Enable Bit 158" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB157 ,Set/Clear Enable Bit 157" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB156 ,Set/Clear Enable Bit 156" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB155 ,Set/Clear Enable Bit 155" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB154 ,Set/Clear Enable Bit 154" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB153 ,Set/Clear Enable Bit 153" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB152 ,Set/Clear Enable Bit 152" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB151 ,Set/Clear Enable Bit 151" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB150 ,Set/Clear Enable Bit 150" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB149 ,Set/Clear Enable Bit 149" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB148 ,Set/Clear Enable Bit 148" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB147 ,Set/Clear Enable Bit 147" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB146 ,Set/Clear Enable Bit 146" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB145 ,Set/Clear Enable Bit 145" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB144 ,Set/Clear Enable Bit 144" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB143 ,Set/Clear Enable Bit 143" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB142 ,Set/Clear Enable Bit 142" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB141 ,Set/Clear Enable Bit 141" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB140 ,Set/Clear Enable Bit 140" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB139 ,Set/Clear Enable Bit 139" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB138 ,Set/Clear Enable Bit 138" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB137 ,Set/Clear Enable Bit 137" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB136 ,Set/Clear Enable Bit 136" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB135 ,Set/Clear Enable Bit 135" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB134 ,Set/Clear Enable Bit 134" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB133 ,Set/Clear Enable Bit 133" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB132 ,Set/Clear Enable Bit 132" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB131 ,Set/Clear Enable Bit 131" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB130 ,Set/Clear Enable Bit 130" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB129 ,Set/Clear Enable Bit 129" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB128 ,Set/Clear Enable Bit 128" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0110++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x05)
|
|
group.long 0x0114++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB191 ,Set/Clear Enable Bit 191" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB190 ,Set/Clear Enable Bit 190" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB189 ,Set/Clear Enable Bit 189" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB188 ,Set/Clear Enable Bit 188" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB187 ,Set/Clear Enable Bit 187" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB186 ,Set/Clear Enable Bit 186" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB185 ,Set/Clear Enable Bit 185" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB184 ,Set/Clear Enable Bit 184" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB183 ,Set/Clear Enable Bit 183" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB182 ,Set/Clear Enable Bit 182" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB181 ,Set/Clear Enable Bit 181" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB180 ,Set/Clear Enable Bit 180" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB179 ,Set/Clear Enable Bit 179" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB178 ,Set/Clear Enable Bit 178" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB177 ,Set/Clear Enable Bit 177" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB176 ,Set/Clear Enable Bit 176" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB175 ,Set/Clear Enable Bit 175" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB174 ,Set/Clear Enable Bit 174" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB173 ,Set/Clear Enable Bit 173" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB172 ,Set/Clear Enable Bit 172" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB171 ,Set/Clear Enable Bit 171" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB170 ,Set/Clear Enable Bit 170" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB169 ,Set/Clear Enable Bit 169" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB168 ,Set/Clear Enable Bit 168" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB167 ,Set/Clear Enable Bit 167" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB166 ,Set/Clear Enable Bit 166" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB165 ,Set/Clear Enable Bit 165" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB164 ,Set/Clear Enable Bit 164" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB163 ,Set/Clear Enable Bit 163" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB162 ,Set/Clear Enable Bit 162" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB161 ,Set/Clear Enable Bit 161" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB160 ,Set/Clear Enable Bit 160" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0114++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x06)
|
|
group.long 0x0118++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB223 ,Set/Clear Enable Bit 223" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB222 ,Set/Clear Enable Bit 222" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB221 ,Set/Clear Enable Bit 221" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB220 ,Set/Clear Enable Bit 220" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB219 ,Set/Clear Enable Bit 219" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB218 ,Set/Clear Enable Bit 218" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB217 ,Set/Clear Enable Bit 217" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB216 ,Set/Clear Enable Bit 216" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB215 ,Set/Clear Enable Bit 215" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB214 ,Set/Clear Enable Bit 214" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB213 ,Set/Clear Enable Bit 213" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB212 ,Set/Clear Enable Bit 212" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB211 ,Set/Clear Enable Bit 211" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB210 ,Set/Clear Enable Bit 210" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB209 ,Set/Clear Enable Bit 209" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB208 ,Set/Clear Enable Bit 208" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB207 ,Set/Clear Enable Bit 207" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB206 ,Set/Clear Enable Bit 206" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB205 ,Set/Clear Enable Bit 205" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB204 ,Set/Clear Enable Bit 204" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB203 ,Set/Clear Enable Bit 203" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB202 ,Set/Clear Enable Bit 202" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB201 ,Set/Clear Enable Bit 201" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB200 ,Set/Clear Enable Bit 200" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB199 ,Set/Clear Enable Bit 199" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB198 ,Set/Clear Enable Bit 198" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB197 ,Set/Clear Enable Bit 197" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB196 ,Set/Clear Enable Bit 196" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB195 ,Set/Clear Enable Bit 195" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB194 ,Set/Clear Enable Bit 194" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB193 ,Set/Clear Enable Bit 193" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB192 ,Set/Clear Enable Bit 192" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0118++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x07)
|
|
group.long 0x011C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB255 ,Set/Clear Enable Bit 255" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB254 ,Set/Clear Enable Bit 254" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB253 ,Set/Clear Enable Bit 253" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB252 ,Set/Clear Enable Bit 252" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB251 ,Set/Clear Enable Bit 251" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB250 ,Set/Clear Enable Bit 250" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB249 ,Set/Clear Enable Bit 249" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB248 ,Set/Clear Enable Bit 248" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB247 ,Set/Clear Enable Bit 247" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB246 ,Set/Clear Enable Bit 246" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB245 ,Set/Clear Enable Bit 245" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB244 ,Set/Clear Enable Bit 244" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB243 ,Set/Clear Enable Bit 243" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB242 ,Set/Clear Enable Bit 242" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB241 ,Set/Clear Enable Bit 241" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB240 ,Set/Clear Enable Bit 240" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB239 ,Set/Clear Enable Bit 239" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB238 ,Set/Clear Enable Bit 238" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB237 ,Set/Clear Enable Bit 237" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB236 ,Set/Clear Enable Bit 236" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB235 ,Set/Clear Enable Bit 235" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB234 ,Set/Clear Enable Bit 234" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB233 ,Set/Clear Enable Bit 233" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB232 ,Set/Clear Enable Bit 232" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB231 ,Set/Clear Enable Bit 231" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB230 ,Set/Clear Enable Bit 230" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB229 ,Set/Clear Enable Bit 229" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB228 ,Set/Clear Enable Bit 228" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB227 ,Set/Clear Enable Bit 227" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB226 ,Set/Clear Enable Bit 226" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB225 ,Set/Clear Enable Bit 225" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB224 ,Set/Clear Enable Bit 224" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x011C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x08)
|
|
group.long 0x0120++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB287 ,Set/Clear Enable Bit 287" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB286 ,Set/Clear Enable Bit 286" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB285 ,Set/Clear Enable Bit 285" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB284 ,Set/Clear Enable Bit 284" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB283 ,Set/Clear Enable Bit 283" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB282 ,Set/Clear Enable Bit 282" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB281 ,Set/Clear Enable Bit 281" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB280 ,Set/Clear Enable Bit 280" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB279 ,Set/Clear Enable Bit 279" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB278 ,Set/Clear Enable Bit 278" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB277 ,Set/Clear Enable Bit 277" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB276 ,Set/Clear Enable Bit 276" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB275 ,Set/Clear Enable Bit 275" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB274 ,Set/Clear Enable Bit 274" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB273 ,Set/Clear Enable Bit 273" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB272 ,Set/Clear Enable Bit 272" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB271 ,Set/Clear Enable Bit 271" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB270 ,Set/Clear Enable Bit 270" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB269 ,Set/Clear Enable Bit 269" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB268 ,Set/Clear Enable Bit 268" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB267 ,Set/Clear Enable Bit 267" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB266 ,Set/Clear Enable Bit 266" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB265 ,Set/Clear Enable Bit 265" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB264 ,Set/Clear Enable Bit 264" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB263 ,Set/Clear Enable Bit 263" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB262 ,Set/Clear Enable Bit 262" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB261 ,Set/Clear Enable Bit 261" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB260 ,Set/Clear Enable Bit 260" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB259 ,Set/Clear Enable Bit 259" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB258 ,Set/Clear Enable Bit 258" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB257 ,Set/Clear Enable Bit 257" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB256 ,Set/Clear Enable Bit 256" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0120++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x09)
|
|
group.long 0x0124++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB319 ,Set/Clear Enable Bit 319" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB318 ,Set/Clear Enable Bit 318" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB317 ,Set/Clear Enable Bit 317" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB316 ,Set/Clear Enable Bit 316" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB315 ,Set/Clear Enable Bit 315" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB314 ,Set/Clear Enable Bit 314" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB313 ,Set/Clear Enable Bit 313" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB312 ,Set/Clear Enable Bit 312" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB311 ,Set/Clear Enable Bit 311" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB310 ,Set/Clear Enable Bit 310" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB309 ,Set/Clear Enable Bit 309" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB308 ,Set/Clear Enable Bit 308" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB307 ,Set/Clear Enable Bit 307" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB306 ,Set/Clear Enable Bit 306" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB305 ,Set/Clear Enable Bit 305" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB304 ,Set/Clear Enable Bit 304" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB303 ,Set/Clear Enable Bit 303" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB302 ,Set/Clear Enable Bit 302" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB301 ,Set/Clear Enable Bit 301" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB300 ,Set/Clear Enable Bit 300" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB299 ,Set/Clear Enable Bit 299" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB298 ,Set/Clear Enable Bit 298" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB297 ,Set/Clear Enable Bit 297" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB296 ,Set/Clear Enable Bit 296" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB295 ,Set/Clear Enable Bit 295" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB294 ,Set/Clear Enable Bit 294" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB293 ,Set/Clear Enable Bit 293" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB292 ,Set/Clear Enable Bit 292" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB291 ,Set/Clear Enable Bit 291" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB290 ,Set/Clear Enable Bit 290" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB289 ,Set/Clear Enable Bit 289" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB288 ,Set/Clear Enable Bit 288" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0124++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0A)
|
|
group.long 0x0128++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB351 ,Set/Clear Enable Bit 351" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB350 ,Set/Clear Enable Bit 350" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB349 ,Set/Clear Enable Bit 349" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB348 ,Set/Clear Enable Bit 348" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB347 ,Set/Clear Enable Bit 347" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB346 ,Set/Clear Enable Bit 346" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB345 ,Set/Clear Enable Bit 345" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB344 ,Set/Clear Enable Bit 344" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB343 ,Set/Clear Enable Bit 343" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB342 ,Set/Clear Enable Bit 342" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB341 ,Set/Clear Enable Bit 341" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB340 ,Set/Clear Enable Bit 340" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB339 ,Set/Clear Enable Bit 339" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB338 ,Set/Clear Enable Bit 338" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB337 ,Set/Clear Enable Bit 337" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB336 ,Set/Clear Enable Bit 336" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB335 ,Set/Clear Enable Bit 335" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB334 ,Set/Clear Enable Bit 334" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB333 ,Set/Clear Enable Bit 333" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB332 ,Set/Clear Enable Bit 332" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB331 ,Set/Clear Enable Bit 331" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB330 ,Set/Clear Enable Bit 330" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB329 ,Set/Clear Enable Bit 329" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB328 ,Set/Clear Enable Bit 328" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB327 ,Set/Clear Enable Bit 327" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB326 ,Set/Clear Enable Bit 326" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB325 ,Set/Clear Enable Bit 325" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB324 ,Set/Clear Enable Bit 324" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB323 ,Set/Clear Enable Bit 323" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB322 ,Set/Clear Enable Bit 322" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB321 ,Set/Clear Enable Bit 321" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB320 ,Set/Clear Enable Bit 320" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0128++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0B)
|
|
group.long 0x012C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB383 ,Set/Clear Enable Bit 383" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB382 ,Set/Clear Enable Bit 382" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB381 ,Set/Clear Enable Bit 381" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB380 ,Set/Clear Enable Bit 380" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB379 ,Set/Clear Enable Bit 379" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB378 ,Set/Clear Enable Bit 378" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB377 ,Set/Clear Enable Bit 377" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB376 ,Set/Clear Enable Bit 376" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB375 ,Set/Clear Enable Bit 375" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB374 ,Set/Clear Enable Bit 374" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB373 ,Set/Clear Enable Bit 373" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB372 ,Set/Clear Enable Bit 372" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB371 ,Set/Clear Enable Bit 371" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB370 ,Set/Clear Enable Bit 370" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB369 ,Set/Clear Enable Bit 369" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB368 ,Set/Clear Enable Bit 368" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB367 ,Set/Clear Enable Bit 367" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB366 ,Set/Clear Enable Bit 366" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB365 ,Set/Clear Enable Bit 365" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB364 ,Set/Clear Enable Bit 364" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB363 ,Set/Clear Enable Bit 363" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB362 ,Set/Clear Enable Bit 362" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB361 ,Set/Clear Enable Bit 361" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB360 ,Set/Clear Enable Bit 360" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB359 ,Set/Clear Enable Bit 359" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB358 ,Set/Clear Enable Bit 358" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB357 ,Set/Clear Enable Bit 357" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB356 ,Set/Clear Enable Bit 356" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB355 ,Set/Clear Enable Bit 355" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB354 ,Set/Clear Enable Bit 354" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB353 ,Set/Clear Enable Bit 353" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB352 ,Set/Clear Enable Bit 352" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x012C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0C)
|
|
group.long 0x0130++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB415 ,Set/Clear Enable Bit 415" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB414 ,Set/Clear Enable Bit 414" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB413 ,Set/Clear Enable Bit 413" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB412 ,Set/Clear Enable Bit 412" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB411 ,Set/Clear Enable Bit 411" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB410 ,Set/Clear Enable Bit 410" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB409 ,Set/Clear Enable Bit 409" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB408 ,Set/Clear Enable Bit 408" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB407 ,Set/Clear Enable Bit 407" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB406 ,Set/Clear Enable Bit 406" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB405 ,Set/Clear Enable Bit 405" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB404 ,Set/Clear Enable Bit 404" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB403 ,Set/Clear Enable Bit 403" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB402 ,Set/Clear Enable Bit 402" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB401 ,Set/Clear Enable Bit 401" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB400 ,Set/Clear Enable Bit 400" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB399 ,Set/Clear Enable Bit 399" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB398 ,Set/Clear Enable Bit 398" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB397 ,Set/Clear Enable Bit 397" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB396 ,Set/Clear Enable Bit 396" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB395 ,Set/Clear Enable Bit 395" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB394 ,Set/Clear Enable Bit 394" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB393 ,Set/Clear Enable Bit 393" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB392 ,Set/Clear Enable Bit 392" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB391 ,Set/Clear Enable Bit 391" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB390 ,Set/Clear Enable Bit 390" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB389 ,Set/Clear Enable Bit 389" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB388 ,Set/Clear Enable Bit 388" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB387 ,Set/Clear Enable Bit 387" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB386 ,Set/Clear Enable Bit 386" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB385 ,Set/Clear Enable Bit 385" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB384 ,Set/Clear Enable Bit 384" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0130++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0D)
|
|
group.long 0x0134++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB447 ,Set/Clear Enable Bit 447" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB446 ,Set/Clear Enable Bit 446" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB445 ,Set/Clear Enable Bit 445" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB444 ,Set/Clear Enable Bit 444" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB443 ,Set/Clear Enable Bit 443" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB442 ,Set/Clear Enable Bit 442" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB441 ,Set/Clear Enable Bit 441" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB440 ,Set/Clear Enable Bit 440" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB439 ,Set/Clear Enable Bit 439" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB438 ,Set/Clear Enable Bit 438" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB437 ,Set/Clear Enable Bit 437" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB436 ,Set/Clear Enable Bit 436" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB435 ,Set/Clear Enable Bit 435" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB434 ,Set/Clear Enable Bit 434" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB433 ,Set/Clear Enable Bit 433" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB432 ,Set/Clear Enable Bit 432" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB431 ,Set/Clear Enable Bit 431" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB430 ,Set/Clear Enable Bit 430" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB429 ,Set/Clear Enable Bit 429" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB428 ,Set/Clear Enable Bit 428" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB427 ,Set/Clear Enable Bit 427" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB426 ,Set/Clear Enable Bit 426" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB425 ,Set/Clear Enable Bit 425" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB424 ,Set/Clear Enable Bit 424" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB423 ,Set/Clear Enable Bit 423" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB422 ,Set/Clear Enable Bit 422" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB421 ,Set/Clear Enable Bit 421" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB420 ,Set/Clear Enable Bit 420" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB419 ,Set/Clear Enable Bit 419" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB418 ,Set/Clear Enable Bit 418" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB417 ,Set/Clear Enable Bit 417" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB416 ,Set/Clear Enable Bit 416" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0134++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0E)
|
|
group.long 0x0138++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB479 ,Set/Clear Enable Bit 479" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB478 ,Set/Clear Enable Bit 478" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB477 ,Set/Clear Enable Bit 477" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB476 ,Set/Clear Enable Bit 476" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB475 ,Set/Clear Enable Bit 475" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB474 ,Set/Clear Enable Bit 474" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB473 ,Set/Clear Enable Bit 473" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB472 ,Set/Clear Enable Bit 472" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB471 ,Set/Clear Enable Bit 471" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB470 ,Set/Clear Enable Bit 470" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB469 ,Set/Clear Enable Bit 469" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB468 ,Set/Clear Enable Bit 468" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB467 ,Set/Clear Enable Bit 467" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB466 ,Set/Clear Enable Bit 466" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB465 ,Set/Clear Enable Bit 465" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB464 ,Set/Clear Enable Bit 464" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB463 ,Set/Clear Enable Bit 463" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB462 ,Set/Clear Enable Bit 462" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB461 ,Set/Clear Enable Bit 461" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB460 ,Set/Clear Enable Bit 460" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB459 ,Set/Clear Enable Bit 459" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB458 ,Set/Clear Enable Bit 458" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB457 ,Set/Clear Enable Bit 457" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB456 ,Set/Clear Enable Bit 456" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB455 ,Set/Clear Enable Bit 455" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB454 ,Set/Clear Enable Bit 454" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB453 ,Set/Clear Enable Bit 453" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB452 ,Set/Clear Enable Bit 452" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB451 ,Set/Clear Enable Bit 451" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB450 ,Set/Clear Enable Bit 450" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB449 ,Set/Clear Enable Bit 449" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB448 ,Set/Clear Enable Bit 448" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0138++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0F)
|
|
group.long 0x013C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB511 ,Set/Clear Enable Bit 511" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB510 ,Set/Clear Enable Bit 510" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB509 ,Set/Clear Enable Bit 509" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB508 ,Set/Clear Enable Bit 508" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB507 ,Set/Clear Enable Bit 507" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB506 ,Set/Clear Enable Bit 506" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB505 ,Set/Clear Enable Bit 505" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB504 ,Set/Clear Enable Bit 504" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB503 ,Set/Clear Enable Bit 503" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB502 ,Set/Clear Enable Bit 502" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB501 ,Set/Clear Enable Bit 501" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB500 ,Set/Clear Enable Bit 500" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB499 ,Set/Clear Enable Bit 499" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB498 ,Set/Clear Enable Bit 498" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB497 ,Set/Clear Enable Bit 497" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB496 ,Set/Clear Enable Bit 496" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB495 ,Set/Clear Enable Bit 495" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB494 ,Set/Clear Enable Bit 494" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB493 ,Set/Clear Enable Bit 493" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB492 ,Set/Clear Enable Bit 492" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB491 ,Set/Clear Enable Bit 491" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB490 ,Set/Clear Enable Bit 490" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB489 ,Set/Clear Enable Bit 489" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB488 ,Set/Clear Enable Bit 488" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB487 ,Set/Clear Enable Bit 487" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB486 ,Set/Clear Enable Bit 486" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB485 ,Set/Clear Enable Bit 485" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB484 ,Set/Clear Enable Bit 484" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB483 ,Set/Clear Enable Bit 483" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB482 ,Set/Clear Enable Bit 482" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB481 ,Set/Clear Enable Bit 481" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB480 ,Set/Clear Enable Bit 480" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x013C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0x0140++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB543 ,Set/Clear Enable Bit 543" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB542 ,Set/Clear Enable Bit 542" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB541 ,Set/Clear Enable Bit 541" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB540 ,Set/Clear Enable Bit 540" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB539 ,Set/Clear Enable Bit 539" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB538 ,Set/Clear Enable Bit 538" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB537 ,Set/Clear Enable Bit 537" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB536 ,Set/Clear Enable Bit 536" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB535 ,Set/Clear Enable Bit 535" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB534 ,Set/Clear Enable Bit 534" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB533 ,Set/Clear Enable Bit 533" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB532 ,Set/Clear Enable Bit 532" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB531 ,Set/Clear Enable Bit 531" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB530 ,Set/Clear Enable Bit 530" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB529 ,Set/Clear Enable Bit 529" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB528 ,Set/Clear Enable Bit 528" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB527 ,Set/Clear Enable Bit 527" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB526 ,Set/Clear Enable Bit 526" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB525 ,Set/Clear Enable Bit 525" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB524 ,Set/Clear Enable Bit 524" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB523 ,Set/Clear Enable Bit 523" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB522 ,Set/Clear Enable Bit 522" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB521 ,Set/Clear Enable Bit 521" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB520 ,Set/Clear Enable Bit 520" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB519 ,Set/Clear Enable Bit 519" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB518 ,Set/Clear Enable Bit 518" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB517 ,Set/Clear Enable Bit 517" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB516 ,Set/Clear Enable Bit 516" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB515 ,Set/Clear Enable Bit 515" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB514 ,Set/Clear Enable Bit 514" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB513 ,Set/Clear Enable Bit 513" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB512 ,Set/Clear Enable Bit 512" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0140++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0x0144++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB575 ,Set/Clear Enable Bit 575" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB574 ,Set/Clear Enable Bit 574" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB573 ,Set/Clear Enable Bit 573" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB572 ,Set/Clear Enable Bit 572" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB571 ,Set/Clear Enable Bit 571" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB570 ,Set/Clear Enable Bit 570" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB569 ,Set/Clear Enable Bit 569" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB568 ,Set/Clear Enable Bit 568" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB567 ,Set/Clear Enable Bit 567" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB566 ,Set/Clear Enable Bit 566" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB565 ,Set/Clear Enable Bit 565" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB564 ,Set/Clear Enable Bit 564" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB563 ,Set/Clear Enable Bit 563" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB562 ,Set/Clear Enable Bit 562" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB561 ,Set/Clear Enable Bit 561" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB560 ,Set/Clear Enable Bit 560" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB559 ,Set/Clear Enable Bit 559" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB558 ,Set/Clear Enable Bit 558" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB557 ,Set/Clear Enable Bit 557" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB556 ,Set/Clear Enable Bit 556" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB555 ,Set/Clear Enable Bit 555" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB554 ,Set/Clear Enable Bit 554" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB553 ,Set/Clear Enable Bit 553" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB552 ,Set/Clear Enable Bit 552" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB551 ,Set/Clear Enable Bit 551" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB550 ,Set/Clear Enable Bit 550" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB549 ,Set/Clear Enable Bit 549" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB548 ,Set/Clear Enable Bit 548" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB547 ,Set/Clear Enable Bit 547" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB546 ,Set/Clear Enable Bit 546" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB545 ,Set/Clear Enable Bit 545" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB544 ,Set/Clear Enable Bit 544" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0144++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0x0148++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB607 ,Set/Clear Enable Bit 607" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB606 ,Set/Clear Enable Bit 606" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB605 ,Set/Clear Enable Bit 605" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB604 ,Set/Clear Enable Bit 604" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB603 ,Set/Clear Enable Bit 603" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB602 ,Set/Clear Enable Bit 602" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB601 ,Set/Clear Enable Bit 601" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB600 ,Set/Clear Enable Bit 600" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB599 ,Set/Clear Enable Bit 599" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB598 ,Set/Clear Enable Bit 598" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB597 ,Set/Clear Enable Bit 597" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB596 ,Set/Clear Enable Bit 596" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB595 ,Set/Clear Enable Bit 595" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB594 ,Set/Clear Enable Bit 594" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB593 ,Set/Clear Enable Bit 593" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB592 ,Set/Clear Enable Bit 592" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB591 ,Set/Clear Enable Bit 591" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB590 ,Set/Clear Enable Bit 590" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB589 ,Set/Clear Enable Bit 589" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB588 ,Set/Clear Enable Bit 588" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB587 ,Set/Clear Enable Bit 587" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB586 ,Set/Clear Enable Bit 586" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB585 ,Set/Clear Enable Bit 585" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB584 ,Set/Clear Enable Bit 584" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB583 ,Set/Clear Enable Bit 583" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB582 ,Set/Clear Enable Bit 582" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB581 ,Set/Clear Enable Bit 581" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB580 ,Set/Clear Enable Bit 580" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB579 ,Set/Clear Enable Bit 579" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB578 ,Set/Clear Enable Bit 578" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB577 ,Set/Clear Enable Bit 577" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB576 ,Set/Clear Enable Bit 576" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0148++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0x014C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB639 ,Set/Clear Enable Bit 639" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB638 ,Set/Clear Enable Bit 638" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB637 ,Set/Clear Enable Bit 637" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB636 ,Set/Clear Enable Bit 636" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB635 ,Set/Clear Enable Bit 635" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB634 ,Set/Clear Enable Bit 634" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB633 ,Set/Clear Enable Bit 633" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB632 ,Set/Clear Enable Bit 632" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB631 ,Set/Clear Enable Bit 631" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB630 ,Set/Clear Enable Bit 630" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB629 ,Set/Clear Enable Bit 629" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB628 ,Set/Clear Enable Bit 628" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB627 ,Set/Clear Enable Bit 627" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB626 ,Set/Clear Enable Bit 626" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB625 ,Set/Clear Enable Bit 625" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB624 ,Set/Clear Enable Bit 624" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB623 ,Set/Clear Enable Bit 623" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB622 ,Set/Clear Enable Bit 622" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB621 ,Set/Clear Enable Bit 621" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB620 ,Set/Clear Enable Bit 620" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB619 ,Set/Clear Enable Bit 619" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB618 ,Set/Clear Enable Bit 618" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB617 ,Set/Clear Enable Bit 617" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB616 ,Set/Clear Enable Bit 616" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB615 ,Set/Clear Enable Bit 615" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB614 ,Set/Clear Enable Bit 614" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB613 ,Set/Clear Enable Bit 613" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB612 ,Set/Clear Enable Bit 612" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB611 ,Set/Clear Enable Bit 611" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB610 ,Set/Clear Enable Bit 610" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB609 ,Set/Clear Enable Bit 609" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB608 ,Set/Clear Enable Bit 608" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x014C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0x0150++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB671 ,Set/Clear Enable Bit 671" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB670 ,Set/Clear Enable Bit 670" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB669 ,Set/Clear Enable Bit 669" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB668 ,Set/Clear Enable Bit 668" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB667 ,Set/Clear Enable Bit 667" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB666 ,Set/Clear Enable Bit 666" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB665 ,Set/Clear Enable Bit 665" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB664 ,Set/Clear Enable Bit 664" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB663 ,Set/Clear Enable Bit 663" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB662 ,Set/Clear Enable Bit 662" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB661 ,Set/Clear Enable Bit 661" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB660 ,Set/Clear Enable Bit 660" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB659 ,Set/Clear Enable Bit 659" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB658 ,Set/Clear Enable Bit 658" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB657 ,Set/Clear Enable Bit 657" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB656 ,Set/Clear Enable Bit 656" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB655 ,Set/Clear Enable Bit 655" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB654 ,Set/Clear Enable Bit 654" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB653 ,Set/Clear Enable Bit 653" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB652 ,Set/Clear Enable Bit 652" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB651 ,Set/Clear Enable Bit 651" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB650 ,Set/Clear Enable Bit 650" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB649 ,Set/Clear Enable Bit 649" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB648 ,Set/Clear Enable Bit 648" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB647 ,Set/Clear Enable Bit 647" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB646 ,Set/Clear Enable Bit 646" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB645 ,Set/Clear Enable Bit 645" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB644 ,Set/Clear Enable Bit 644" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB643 ,Set/Clear Enable Bit 643" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB642 ,Set/Clear Enable Bit 642" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB641 ,Set/Clear Enable Bit 641" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB640 ,Set/Clear Enable Bit 640" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0150++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0x0154++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB703 ,Set/Clear Enable Bit 703" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB702 ,Set/Clear Enable Bit 702" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB701 ,Set/Clear Enable Bit 701" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB700 ,Set/Clear Enable Bit 700" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB699 ,Set/Clear Enable Bit 699" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB698 ,Set/Clear Enable Bit 698" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB697 ,Set/Clear Enable Bit 697" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB696 ,Set/Clear Enable Bit 696" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB695 ,Set/Clear Enable Bit 695" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB694 ,Set/Clear Enable Bit 694" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB693 ,Set/Clear Enable Bit 693" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB692 ,Set/Clear Enable Bit 692" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB691 ,Set/Clear Enable Bit 691" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB690 ,Set/Clear Enable Bit 690" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB689 ,Set/Clear Enable Bit 689" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB688 ,Set/Clear Enable Bit 688" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB687 ,Set/Clear Enable Bit 687" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB686 ,Set/Clear Enable Bit 686" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB685 ,Set/Clear Enable Bit 685" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB684 ,Set/Clear Enable Bit 684" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB683 ,Set/Clear Enable Bit 683" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB682 ,Set/Clear Enable Bit 682" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB681 ,Set/Clear Enable Bit 681" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB680 ,Set/Clear Enable Bit 680" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB679 ,Set/Clear Enable Bit 679" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB678 ,Set/Clear Enable Bit 678" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB677 ,Set/Clear Enable Bit 677" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB676 ,Set/Clear Enable Bit 676" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB675 ,Set/Clear Enable Bit 675" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB674 ,Set/Clear Enable Bit 674" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB673 ,Set/Clear Enable Bit 673" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB672 ,Set/Clear Enable Bit 672" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0154++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0x0158++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB735 ,Set/Clear Enable Bit 735" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB734 ,Set/Clear Enable Bit 734" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB733 ,Set/Clear Enable Bit 733" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB732 ,Set/Clear Enable Bit 732" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB731 ,Set/Clear Enable Bit 731" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB730 ,Set/Clear Enable Bit 730" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB729 ,Set/Clear Enable Bit 729" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB728 ,Set/Clear Enable Bit 728" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB727 ,Set/Clear Enable Bit 727" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB726 ,Set/Clear Enable Bit 726" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB725 ,Set/Clear Enable Bit 725" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB724 ,Set/Clear Enable Bit 724" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB723 ,Set/Clear Enable Bit 723" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB722 ,Set/Clear Enable Bit 722" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB721 ,Set/Clear Enable Bit 721" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB720 ,Set/Clear Enable Bit 720" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB719 ,Set/Clear Enable Bit 719" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB718 ,Set/Clear Enable Bit 718" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB717 ,Set/Clear Enable Bit 717" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB716 ,Set/Clear Enable Bit 716" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB715 ,Set/Clear Enable Bit 715" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB714 ,Set/Clear Enable Bit 714" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB713 ,Set/Clear Enable Bit 713" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB712 ,Set/Clear Enable Bit 712" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB711 ,Set/Clear Enable Bit 711" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB710 ,Set/Clear Enable Bit 710" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB709 ,Set/Clear Enable Bit 709" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB708 ,Set/Clear Enable Bit 708" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB707 ,Set/Clear Enable Bit 707" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB706 ,Set/Clear Enable Bit 706" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB705 ,Set/Clear Enable Bit 705" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB704 ,Set/Clear Enable Bit 704" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0158++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0x015C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB767 ,Set/Clear Enable Bit 767" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB766 ,Set/Clear Enable Bit 766" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB765 ,Set/Clear Enable Bit 765" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB764 ,Set/Clear Enable Bit 764" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB763 ,Set/Clear Enable Bit 763" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB762 ,Set/Clear Enable Bit 762" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB761 ,Set/Clear Enable Bit 761" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB760 ,Set/Clear Enable Bit 760" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB759 ,Set/Clear Enable Bit 759" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB758 ,Set/Clear Enable Bit 758" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB757 ,Set/Clear Enable Bit 757" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB756 ,Set/Clear Enable Bit 756" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB755 ,Set/Clear Enable Bit 755" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB754 ,Set/Clear Enable Bit 754" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB753 ,Set/Clear Enable Bit 753" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB752 ,Set/Clear Enable Bit 752" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB751 ,Set/Clear Enable Bit 751" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB750 ,Set/Clear Enable Bit 750" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB749 ,Set/Clear Enable Bit 749" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB748 ,Set/Clear Enable Bit 748" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB747 ,Set/Clear Enable Bit 747" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB746 ,Set/Clear Enable Bit 746" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB745 ,Set/Clear Enable Bit 745" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB744 ,Set/Clear Enable Bit 744" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB743 ,Set/Clear Enable Bit 743" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB742 ,Set/Clear Enable Bit 742" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB741 ,Set/Clear Enable Bit 741" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB740 ,Set/Clear Enable Bit 740" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB739 ,Set/Clear Enable Bit 739" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB738 ,Set/Clear Enable Bit 738" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB737 ,Set/Clear Enable Bit 737" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB736 ,Set/Clear Enable Bit 736" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x015C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0x0160++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB799 ,Set/Clear Enable Bit 799" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB798 ,Set/Clear Enable Bit 798" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB797 ,Set/Clear Enable Bit 797" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB796 ,Set/Clear Enable Bit 796" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB795 ,Set/Clear Enable Bit 795" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB794 ,Set/Clear Enable Bit 794" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB793 ,Set/Clear Enable Bit 793" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB792 ,Set/Clear Enable Bit 792" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB791 ,Set/Clear Enable Bit 791" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB790 ,Set/Clear Enable Bit 790" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB789 ,Set/Clear Enable Bit 789" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB788 ,Set/Clear Enable Bit 788" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB787 ,Set/Clear Enable Bit 787" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB786 ,Set/Clear Enable Bit 786" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB785 ,Set/Clear Enable Bit 785" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB784 ,Set/Clear Enable Bit 784" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB783 ,Set/Clear Enable Bit 783" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB782 ,Set/Clear Enable Bit 782" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB781 ,Set/Clear Enable Bit 781" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB780 ,Set/Clear Enable Bit 780" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB779 ,Set/Clear Enable Bit 779" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB778 ,Set/Clear Enable Bit 778" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB777 ,Set/Clear Enable Bit 777" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB776 ,Set/Clear Enable Bit 776" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB775 ,Set/Clear Enable Bit 775" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB774 ,Set/Clear Enable Bit 774" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB773 ,Set/Clear Enable Bit 773" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB772 ,Set/Clear Enable Bit 772" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB771 ,Set/Clear Enable Bit 771" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB770 ,Set/Clear Enable Bit 770" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB769 ,Set/Clear Enable Bit 769" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB768 ,Set/Clear Enable Bit 768" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0160++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0x0164++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB831 ,Set/Clear Enable Bit 831" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB830 ,Set/Clear Enable Bit 830" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB829 ,Set/Clear Enable Bit 829" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB828 ,Set/Clear Enable Bit 828" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB827 ,Set/Clear Enable Bit 827" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB826 ,Set/Clear Enable Bit 826" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB825 ,Set/Clear Enable Bit 825" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB824 ,Set/Clear Enable Bit 824" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB823 ,Set/Clear Enable Bit 823" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB822 ,Set/Clear Enable Bit 822" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB821 ,Set/Clear Enable Bit 821" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB820 ,Set/Clear Enable Bit 820" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB819 ,Set/Clear Enable Bit 819" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB818 ,Set/Clear Enable Bit 818" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB817 ,Set/Clear Enable Bit 817" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB816 ,Set/Clear Enable Bit 816" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB815 ,Set/Clear Enable Bit 815" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB814 ,Set/Clear Enable Bit 814" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB813 ,Set/Clear Enable Bit 813" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB812 ,Set/Clear Enable Bit 812" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB811 ,Set/Clear Enable Bit 811" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB810 ,Set/Clear Enable Bit 810" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB809 ,Set/Clear Enable Bit 809" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB808 ,Set/Clear Enable Bit 808" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB807 ,Set/Clear Enable Bit 807" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB806 ,Set/Clear Enable Bit 806" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB805 ,Set/Clear Enable Bit 805" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB804 ,Set/Clear Enable Bit 804" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB803 ,Set/Clear Enable Bit 803" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB802 ,Set/Clear Enable Bit 802" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB801 ,Set/Clear Enable Bit 801" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB800 ,Set/Clear Enable Bit 800" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0164++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0x0168++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB863 ,Set/Clear Enable Bit 863" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB862 ,Set/Clear Enable Bit 862" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB861 ,Set/Clear Enable Bit 861" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB860 ,Set/Clear Enable Bit 860" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB859 ,Set/Clear Enable Bit 859" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB858 ,Set/Clear Enable Bit 858" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB857 ,Set/Clear Enable Bit 857" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB856 ,Set/Clear Enable Bit 856" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB855 ,Set/Clear Enable Bit 855" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB854 ,Set/Clear Enable Bit 854" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB853 ,Set/Clear Enable Bit 853" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB852 ,Set/Clear Enable Bit 852" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB851 ,Set/Clear Enable Bit 851" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB850 ,Set/Clear Enable Bit 850" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB849 ,Set/Clear Enable Bit 849" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB848 ,Set/Clear Enable Bit 848" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB847 ,Set/Clear Enable Bit 847" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB846 ,Set/Clear Enable Bit 846" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB845 ,Set/Clear Enable Bit 845" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB844 ,Set/Clear Enable Bit 844" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB843 ,Set/Clear Enable Bit 843" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB842 ,Set/Clear Enable Bit 842" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB841 ,Set/Clear Enable Bit 841" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB840 ,Set/Clear Enable Bit 840" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB839 ,Set/Clear Enable Bit 839" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB838 ,Set/Clear Enable Bit 838" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB837 ,Set/Clear Enable Bit 837" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB836 ,Set/Clear Enable Bit 836" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB835 ,Set/Clear Enable Bit 835" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB834 ,Set/Clear Enable Bit 834" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB833 ,Set/Clear Enable Bit 833" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB832 ,Set/Clear Enable Bit 832" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0168++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0x016C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB895 ,Set/Clear Enable Bit 895" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB894 ,Set/Clear Enable Bit 894" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB893 ,Set/Clear Enable Bit 893" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB892 ,Set/Clear Enable Bit 892" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB891 ,Set/Clear Enable Bit 891" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB890 ,Set/Clear Enable Bit 890" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB889 ,Set/Clear Enable Bit 889" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB888 ,Set/Clear Enable Bit 888" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB887 ,Set/Clear Enable Bit 887" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB886 ,Set/Clear Enable Bit 886" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB885 ,Set/Clear Enable Bit 885" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB884 ,Set/Clear Enable Bit 884" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB883 ,Set/Clear Enable Bit 883" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB882 ,Set/Clear Enable Bit 882" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB881 ,Set/Clear Enable Bit 881" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB880 ,Set/Clear Enable Bit 880" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB879 ,Set/Clear Enable Bit 879" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB878 ,Set/Clear Enable Bit 878" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB877 ,Set/Clear Enable Bit 877" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB876 ,Set/Clear Enable Bit 876" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB875 ,Set/Clear Enable Bit 875" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB874 ,Set/Clear Enable Bit 874" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB873 ,Set/Clear Enable Bit 873" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB872 ,Set/Clear Enable Bit 872" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB871 ,Set/Clear Enable Bit 871" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB870 ,Set/Clear Enable Bit 870" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB869 ,Set/Clear Enable Bit 869" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB868 ,Set/Clear Enable Bit 868" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB867 ,Set/Clear Enable Bit 867" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB866 ,Set/Clear Enable Bit 866" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB865 ,Set/Clear Enable Bit 865" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB864 ,Set/Clear Enable Bit 864" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x016C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0x0170++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB927 ,Set/Clear Enable Bit 927" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB926 ,Set/Clear Enable Bit 926" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB925 ,Set/Clear Enable Bit 925" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB924 ,Set/Clear Enable Bit 924" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB923 ,Set/Clear Enable Bit 923" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB922 ,Set/Clear Enable Bit 922" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB921 ,Set/Clear Enable Bit 921" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB920 ,Set/Clear Enable Bit 920" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB919 ,Set/Clear Enable Bit 919" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB918 ,Set/Clear Enable Bit 918" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB917 ,Set/Clear Enable Bit 917" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB916 ,Set/Clear Enable Bit 916" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB915 ,Set/Clear Enable Bit 915" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB914 ,Set/Clear Enable Bit 914" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB913 ,Set/Clear Enable Bit 913" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB912 ,Set/Clear Enable Bit 912" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB911 ,Set/Clear Enable Bit 911" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB910 ,Set/Clear Enable Bit 910" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB909 ,Set/Clear Enable Bit 909" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB908 ,Set/Clear Enable Bit 908" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB907 ,Set/Clear Enable Bit 907" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB906 ,Set/Clear Enable Bit 906" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB905 ,Set/Clear Enable Bit 905" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB904 ,Set/Clear Enable Bit 904" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB903 ,Set/Clear Enable Bit 903" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB902 ,Set/Clear Enable Bit 902" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB901 ,Set/Clear Enable Bit 901" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB900 ,Set/Clear Enable Bit 900" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB899 ,Set/Clear Enable Bit 899" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB898 ,Set/Clear Enable Bit 898" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB897 ,Set/Clear Enable Bit 897" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB896 ,Set/Clear Enable Bit 896" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0170++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0x0174++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB959 ,Set/Clear Enable Bit 959" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB958 ,Set/Clear Enable Bit 958" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB957 ,Set/Clear Enable Bit 957" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB956 ,Set/Clear Enable Bit 956" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB955 ,Set/Clear Enable Bit 955" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB954 ,Set/Clear Enable Bit 954" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB953 ,Set/Clear Enable Bit 953" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB952 ,Set/Clear Enable Bit 952" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB951 ,Set/Clear Enable Bit 951" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB950 ,Set/Clear Enable Bit 950" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB949 ,Set/Clear Enable Bit 949" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB948 ,Set/Clear Enable Bit 948" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB947 ,Set/Clear Enable Bit 947" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB946 ,Set/Clear Enable Bit 946" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB945 ,Set/Clear Enable Bit 945" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB944 ,Set/Clear Enable Bit 944" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB943 ,Set/Clear Enable Bit 943" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB942 ,Set/Clear Enable Bit 942" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB941 ,Set/Clear Enable Bit 941" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB940 ,Set/Clear Enable Bit 940" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB939 ,Set/Clear Enable Bit 939" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB938 ,Set/Clear Enable Bit 938" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB937 ,Set/Clear Enable Bit 937" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB936 ,Set/Clear Enable Bit 936" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB935 ,Set/Clear Enable Bit 935" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB934 ,Set/Clear Enable Bit 934" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB933 ,Set/Clear Enable Bit 933" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB932 ,Set/Clear Enable Bit 932" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB931 ,Set/Clear Enable Bit 931" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB930 ,Set/Clear Enable Bit 930" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB929 ,Set/Clear Enable Bit 929" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB928 ,Set/Clear Enable Bit 928" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0174++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0x0178++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB991 ,Set/Clear Enable Bit 991" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB990 ,Set/Clear Enable Bit 990" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB989 ,Set/Clear Enable Bit 989" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB988 ,Set/Clear Enable Bit 988" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB987 ,Set/Clear Enable Bit 987" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB986 ,Set/Clear Enable Bit 986" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB985 ,Set/Clear Enable Bit 985" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB984 ,Set/Clear Enable Bit 984" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB983 ,Set/Clear Enable Bit 983" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB982 ,Set/Clear Enable Bit 982" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB981 ,Set/Clear Enable Bit 981" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB980 ,Set/Clear Enable Bit 980" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB979 ,Set/Clear Enable Bit 979" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB978 ,Set/Clear Enable Bit 978" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB977 ,Set/Clear Enable Bit 977" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB976 ,Set/Clear Enable Bit 976" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB975 ,Set/Clear Enable Bit 975" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB974 ,Set/Clear Enable Bit 974" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB973 ,Set/Clear Enable Bit 973" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB972 ,Set/Clear Enable Bit 972" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB971 ,Set/Clear Enable Bit 971" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB970 ,Set/Clear Enable Bit 970" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB969 ,Set/Clear Enable Bit 969" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB968 ,Set/Clear Enable Bit 968" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB967 ,Set/Clear Enable Bit 967" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB966 ,Set/Clear Enable Bit 966" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB965 ,Set/Clear Enable Bit 965" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB964 ,Set/Clear Enable Bit 964" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB963 ,Set/Clear Enable Bit 963" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB962 ,Set/Clear Enable Bit 962" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB961 ,Set/Clear Enable Bit 961" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB960 ,Set/Clear Enable Bit 960" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0178++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)==0x1F)
|
|
group.long 0x017C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB1019 ,Set/Clear Enable Bit 1019" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB1018 ,Set/Clear Enable Bit 1018" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB1017 ,Set/Clear Enable Bit 1017" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB1016 ,Set/Clear Enable Bit 1016" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB1015 ,Set/Clear Enable Bit 1015" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB1014 ,Set/Clear Enable Bit 1014" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB1013 ,Set/Clear Enable Bit 1013" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB1012 ,Set/Clear Enable Bit 1012" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB1011 ,Set/Clear Enable Bit 1011" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB1010 ,Set/Clear Enable Bit 1010" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB1009 ,Set/Clear Enable Bit 1009" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB1008 ,Set/Clear Enable Bit 1008" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB1007 ,Set/Clear Enable Bit 1007" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB1006 ,Set/Clear Enable Bit 1006" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB1005 ,Set/Clear Enable Bit 1005" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB1004 ,Set/Clear Enable Bit 1004" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB1003 ,Set/Clear Enable Bit 1003" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB1002 ,Set/Clear Enable Bit 1002" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB1001 ,Set/Clear Enable Bit 1001" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB1000 ,Set/Clear Enable Bit 1000" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB999 ,Set/Clear Enable Bit 999" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB998 ,Set/Clear Enable Bit 998" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB997 ,Set/Clear Enable Bit 997" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB996 ,Set/Clear Enable Bit 996" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB995 ,Set/Clear Enable Bit 995" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB994 ,Set/Clear Enable Bit 994" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB993 ,Set/Clear Enable Bit 993" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB992 ,Set/Clear Enable Bit 992" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x017C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 22.
|
|
tree "Set/Clear Pending Registers"
|
|
group.long 0x0200++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND31 ,Set/Clear Pending Bit 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND30 ,Set/Clear Pending Bit 30" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND29 ,Set/Clear Pending Bit 29" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND28 ,Set/Clear Pending Bit 28" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND27 ,Set/Clear Pending Bit 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND26 ,Set/Clear Pending Bit 26" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND25 ,Set/Clear Pending Bit 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND24 ,Set/Clear Pending Bit 24" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND23 ,Set/Clear Pending Bit 23" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND22 ,Set/Clear Pending Bit 22" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND21 ,Set/Clear Pending Bit 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND20 ,Set/Clear Pending Bit 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND19 ,Set/Clear Pending Bit 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND18 ,Set/Clear Pending Bit 18" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND17 ,Set/Clear Pending Bit 17" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND16 ,Set/Clear Pending Bit 16" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND15 ,Set/Clear Pending Bit 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND14 ,Set/Clear Pending Bit 14" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND13 ,Set/Clear Pending Bit 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND12 ,Set/Clear Pending Bit 12" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND11 ,Set/Clear Pending Bit 11" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND10 ,Set/Clear Pending Bit 10" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND9 ,Set/Clear Pending Bit 9" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND8 ,Set/Clear Pending Bit 8" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND7 ,Set/Clear Pending Bit 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND6 ,Set/Clear Pending Bit 6" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND5 ,Set/Clear Pending Bit 5" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND4 ,Set/Clear Pending Bit 4" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND3 ,Set/Clear Pending Bit 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND2 ,Set/Clear Pending Bit 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND1 ,Set/Clear Pending Bit 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND0 ,Set/Clear Pending Bit 0" "Disabled,Enabled"
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x01)
|
|
group.long 0x0204++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND63 ,Set/Clear Pending Bit 63" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND62 ,Set/Clear Pending Bit 62" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND61 ,Set/Clear Pending Bit 61" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND60 ,Set/Clear Pending Bit 60" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND59 ,Set/Clear Pending Bit 59" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND58 ,Set/Clear Pending Bit 58" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND57 ,Set/Clear Pending Bit 57" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND56 ,Set/Clear Pending Bit 56" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND55 ,Set/Clear Pending Bit 55" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND54 ,Set/Clear Pending Bit 54" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND53 ,Set/Clear Pending Bit 53" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND52 ,Set/Clear Pending Bit 52" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND51 ,Set/Clear Pending Bit 51" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND50 ,Set/Clear Pending Bit 50" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND49 ,Set/Clear Pending Bit 49" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND48 ,Set/Clear Pending Bit 48" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND47 ,Set/Clear Pending Bit 47" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND46 ,Set/Clear Pending Bit 46" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND45 ,Set/Clear Pending Bit 45" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND44 ,Set/Clear Pending Bit 44" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND43 ,Set/Clear Pending Bit 43" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND42 ,Set/Clear Pending Bit 42" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND41 ,Set/Clear Pending Bit 41" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND40 ,Set/Clear Pending Bit 40" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND39 ,Set/Clear Pending Bit 39" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND38 ,Set/Clear Pending Bit 38" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND37 ,Set/Clear Pending Bit 37" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND36 ,Set/Clear Pending Bit 36" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND35 ,Set/Clear Pending Bit 35" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND34 ,Set/Clear Pending Bit 34" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND33 ,Set/Clear Pending Bit 33" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND32 ,Set/Clear Pending Bit 32" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0204++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x02)
|
|
group.long 0x0208++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND95 ,Set/Clear Pending Bit 95" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND94 ,Set/Clear Pending Bit 94" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND93 ,Set/Clear Pending Bit 93" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND92 ,Set/Clear Pending Bit 92" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND91 ,Set/Clear Pending Bit 91" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND90 ,Set/Clear Pending Bit 90" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND89 ,Set/Clear Pending Bit 89" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND88 ,Set/Clear Pending Bit 88" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND87 ,Set/Clear Pending Bit 87" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND86 ,Set/Clear Pending Bit 86" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND85 ,Set/Clear Pending Bit 85" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND84 ,Set/Clear Pending Bit 84" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND83 ,Set/Clear Pending Bit 83" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND82 ,Set/Clear Pending Bit 82" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND81 ,Set/Clear Pending Bit 81" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND80 ,Set/Clear Pending Bit 80" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND79 ,Set/Clear Pending Bit 79" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND78 ,Set/Clear Pending Bit 78" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND77 ,Set/Clear Pending Bit 77" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND76 ,Set/Clear Pending Bit 76" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND75 ,Set/Clear Pending Bit 75" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND74 ,Set/Clear Pending Bit 74" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND73 ,Set/Clear Pending Bit 73" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND72 ,Set/Clear Pending Bit 72" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND71 ,Set/Clear Pending Bit 71" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND70 ,Set/Clear Pending Bit 70" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND69 ,Set/Clear Pending Bit 69" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND68 ,Set/Clear Pending Bit 68" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND67 ,Set/Clear Pending Bit 67" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND66 ,Set/Clear Pending Bit 66" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND65 ,Set/Clear Pending Bit 65" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND64 ,Set/Clear Pending Bit 64" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0208++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x03)
|
|
group.long 0x020C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND127 ,Set/Clear Pending Bit 127" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND126 ,Set/Clear Pending Bit 126" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND125 ,Set/Clear Pending Bit 125" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND124 ,Set/Clear Pending Bit 124" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND123 ,Set/Clear Pending Bit 123" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND122 ,Set/Clear Pending Bit 122" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND121 ,Set/Clear Pending Bit 121" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND120 ,Set/Clear Pending Bit 120" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND119 ,Set/Clear Pending Bit 119" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND118 ,Set/Clear Pending Bit 118" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND117 ,Set/Clear Pending Bit 117" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND116 ,Set/Clear Pending Bit 116" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND115 ,Set/Clear Pending Bit 115" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND114 ,Set/Clear Pending Bit 114" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND113 ,Set/Clear Pending Bit 113" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND112 ,Set/Clear Pending Bit 112" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND111 ,Set/Clear Pending Bit 111" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND110 ,Set/Clear Pending Bit 110" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND109 ,Set/Clear Pending Bit 109" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND108 ,Set/Clear Pending Bit 108" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND107 ,Set/Clear Pending Bit 107" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND106 ,Set/Clear Pending Bit 106" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND105 ,Set/Clear Pending Bit 105" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND104 ,Set/Clear Pending Bit 104" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND103 ,Set/Clear Pending Bit 103" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND102 ,Set/Clear Pending Bit 102" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND101 ,Set/Clear Pending Bit 101" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND100 ,Set/Clear Pending Bit 100" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND99 ,Set/Clear Pending Bit 99" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND98 ,Set/Clear Pending Bit 98" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND97 ,Set/Clear Pending Bit 97" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND96 ,Set/Clear Pending Bit 96" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x020C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x04)
|
|
group.long 0x0210++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND159 ,Set/Clear Pending Bit 159" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND158 ,Set/Clear Pending Bit 158" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND157 ,Set/Clear Pending Bit 157" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND156 ,Set/Clear Pending Bit 156" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND155 ,Set/Clear Pending Bit 155" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND154 ,Set/Clear Pending Bit 154" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND153 ,Set/Clear Pending Bit 153" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND152 ,Set/Clear Pending Bit 152" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND151 ,Set/Clear Pending Bit 151" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND150 ,Set/Clear Pending Bit 150" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND149 ,Set/Clear Pending Bit 149" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND148 ,Set/Clear Pending Bit 148" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND147 ,Set/Clear Pending Bit 147" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND146 ,Set/Clear Pending Bit 146" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND145 ,Set/Clear Pending Bit 145" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND144 ,Set/Clear Pending Bit 144" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND143 ,Set/Clear Pending Bit 143" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND142 ,Set/Clear Pending Bit 142" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND141 ,Set/Clear Pending Bit 141" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND140 ,Set/Clear Pending Bit 140" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND139 ,Set/Clear Pending Bit 139" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND138 ,Set/Clear Pending Bit 138" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND137 ,Set/Clear Pending Bit 137" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND136 ,Set/Clear Pending Bit 136" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND135 ,Set/Clear Pending Bit 135" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND134 ,Set/Clear Pending Bit 134" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND133 ,Set/Clear Pending Bit 133" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND132 ,Set/Clear Pending Bit 132" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND131 ,Set/Clear Pending Bit 131" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND130 ,Set/Clear Pending Bit 130" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND129 ,Set/Clear Pending Bit 129" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND128 ,Set/Clear Pending Bit 128" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0210++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x05)
|
|
group.long 0x0214++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND191 ,Set/Clear Pending Bit 191" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND190 ,Set/Clear Pending Bit 190" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND189 ,Set/Clear Pending Bit 189" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND188 ,Set/Clear Pending Bit 188" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND187 ,Set/Clear Pending Bit 187" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND186 ,Set/Clear Pending Bit 186" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND185 ,Set/Clear Pending Bit 185" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND184 ,Set/Clear Pending Bit 184" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND183 ,Set/Clear Pending Bit 183" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND182 ,Set/Clear Pending Bit 182" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND181 ,Set/Clear Pending Bit 181" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND180 ,Set/Clear Pending Bit 180" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND179 ,Set/Clear Pending Bit 179" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND178 ,Set/Clear Pending Bit 178" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND177 ,Set/Clear Pending Bit 177" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND176 ,Set/Clear Pending Bit 176" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND175 ,Set/Clear Pending Bit 175" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND174 ,Set/Clear Pending Bit 174" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND173 ,Set/Clear Pending Bit 173" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND172 ,Set/Clear Pending Bit 172" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND171 ,Set/Clear Pending Bit 171" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND170 ,Set/Clear Pending Bit 170" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND169 ,Set/Clear Pending Bit 169" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND168 ,Set/Clear Pending Bit 168" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND167 ,Set/Clear Pending Bit 167" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND166 ,Set/Clear Pending Bit 166" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND165 ,Set/Clear Pending Bit 165" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND164 ,Set/Clear Pending Bit 164" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND163 ,Set/Clear Pending Bit 163" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND162 ,Set/Clear Pending Bit 162" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND161 ,Set/Clear Pending Bit 161" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND160 ,Set/Clear Pending Bit 160" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0214++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x06)
|
|
group.long 0x0218++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND223 ,Set/Clear Pending Bit 223" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND222 ,Set/Clear Pending Bit 222" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND221 ,Set/Clear Pending Bit 221" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND220 ,Set/Clear Pending Bit 220" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND219 ,Set/Clear Pending Bit 219" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND218 ,Set/Clear Pending Bit 218" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND217 ,Set/Clear Pending Bit 217" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND216 ,Set/Clear Pending Bit 216" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND215 ,Set/Clear Pending Bit 215" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND214 ,Set/Clear Pending Bit 214" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND213 ,Set/Clear Pending Bit 213" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND212 ,Set/Clear Pending Bit 212" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND211 ,Set/Clear Pending Bit 211" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND210 ,Set/Clear Pending Bit 210" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND209 ,Set/Clear Pending Bit 209" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND208 ,Set/Clear Pending Bit 208" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND207 ,Set/Clear Pending Bit 207" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND206 ,Set/Clear Pending Bit 206" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND205 ,Set/Clear Pending Bit 205" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND204 ,Set/Clear Pending Bit 204" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND203 ,Set/Clear Pending Bit 203" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND202 ,Set/Clear Pending Bit 202" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND201 ,Set/Clear Pending Bit 201" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND200 ,Set/Clear Pending Bit 200" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND199 ,Set/Clear Pending Bit 199" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND198 ,Set/Clear Pending Bit 198" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND197 ,Set/Clear Pending Bit 197" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND196 ,Set/Clear Pending Bit 196" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND195 ,Set/Clear Pending Bit 195" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND194 ,Set/Clear Pending Bit 194" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND193 ,Set/Clear Pending Bit 193" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND192 ,Set/Clear Pending Bit 192" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0218++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x07)
|
|
group.long 0x021C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND255 ,Set/Clear Pending Bit 255" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND254 ,Set/Clear Pending Bit 254" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND253 ,Set/Clear Pending Bit 253" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND252 ,Set/Clear Pending Bit 252" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND251 ,Set/Clear Pending Bit 251" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND250 ,Set/Clear Pending Bit 250" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND249 ,Set/Clear Pending Bit 249" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND248 ,Set/Clear Pending Bit 248" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND247 ,Set/Clear Pending Bit 247" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND246 ,Set/Clear Pending Bit 246" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND245 ,Set/Clear Pending Bit 245" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND244 ,Set/Clear Pending Bit 244" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND243 ,Set/Clear Pending Bit 243" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND242 ,Set/Clear Pending Bit 242" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND241 ,Set/Clear Pending Bit 241" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND240 ,Set/Clear Pending Bit 240" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND239 ,Set/Clear Pending Bit 239" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND238 ,Set/Clear Pending Bit 238" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND237 ,Set/Clear Pending Bit 237" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND236 ,Set/Clear Pending Bit 236" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND235 ,Set/Clear Pending Bit 235" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND234 ,Set/Clear Pending Bit 234" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND233 ,Set/Clear Pending Bit 233" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND232 ,Set/Clear Pending Bit 232" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND231 ,Set/Clear Pending Bit 231" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND230 ,Set/Clear Pending Bit 230" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND229 ,Set/Clear Pending Bit 229" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND228 ,Set/Clear Pending Bit 228" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND227 ,Set/Clear Pending Bit 227" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND226 ,Set/Clear Pending Bit 226" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND225 ,Set/Clear Pending Bit 225" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND224 ,Set/Clear Pending Bit 224" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x021C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x08)
|
|
group.long 0x0220++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND287 ,Set/Clear Pending Bit 287" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND286 ,Set/Clear Pending Bit 286" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND285 ,Set/Clear Pending Bit 285" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND284 ,Set/Clear Pending Bit 284" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND283 ,Set/Clear Pending Bit 283" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND282 ,Set/Clear Pending Bit 282" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND281 ,Set/Clear Pending Bit 281" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND280 ,Set/Clear Pending Bit 280" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND279 ,Set/Clear Pending Bit 279" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND278 ,Set/Clear Pending Bit 278" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND277 ,Set/Clear Pending Bit 277" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND276 ,Set/Clear Pending Bit 276" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND275 ,Set/Clear Pending Bit 275" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND274 ,Set/Clear Pending Bit 274" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND273 ,Set/Clear Pending Bit 273" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND272 ,Set/Clear Pending Bit 272" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND271 ,Set/Clear Pending Bit 271" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND270 ,Set/Clear Pending Bit 270" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND269 ,Set/Clear Pending Bit 269" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND268 ,Set/Clear Pending Bit 268" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND267 ,Set/Clear Pending Bit 267" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND266 ,Set/Clear Pending Bit 266" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND265 ,Set/Clear Pending Bit 265" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND264 ,Set/Clear Pending Bit 264" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND263 ,Set/Clear Pending Bit 263" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND262 ,Set/Clear Pending Bit 262" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND261 ,Set/Clear Pending Bit 261" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND260 ,Set/Clear Pending Bit 260" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND259 ,Set/Clear Pending Bit 259" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND258 ,Set/Clear Pending Bit 258" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND257 ,Set/Clear Pending Bit 257" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND256 ,Set/Clear Pending Bit 256" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0220++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x09)
|
|
group.long 0x0224++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND319 ,Set/Clear Pending Bit 319" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND318 ,Set/Clear Pending Bit 318" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND317 ,Set/Clear Pending Bit 317" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND316 ,Set/Clear Pending Bit 316" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND315 ,Set/Clear Pending Bit 315" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND314 ,Set/Clear Pending Bit 314" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND313 ,Set/Clear Pending Bit 313" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND312 ,Set/Clear Pending Bit 312" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND311 ,Set/Clear Pending Bit 311" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND310 ,Set/Clear Pending Bit 310" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND309 ,Set/Clear Pending Bit 309" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND308 ,Set/Clear Pending Bit 308" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND307 ,Set/Clear Pending Bit 307" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND306 ,Set/Clear Pending Bit 306" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND305 ,Set/Clear Pending Bit 305" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND304 ,Set/Clear Pending Bit 304" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND303 ,Set/Clear Pending Bit 303" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND302 ,Set/Clear Pending Bit 302" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND301 ,Set/Clear Pending Bit 301" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND300 ,Set/Clear Pending Bit 300" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND299 ,Set/Clear Pending Bit 299" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND298 ,Set/Clear Pending Bit 298" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND297 ,Set/Clear Pending Bit 297" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND296 ,Set/Clear Pending Bit 296" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND295 ,Set/Clear Pending Bit 295" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND294 ,Set/Clear Pending Bit 294" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND293 ,Set/Clear Pending Bit 293" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND292 ,Set/Clear Pending Bit 292" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND291 ,Set/Clear Pending Bit 291" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND290 ,Set/Clear Pending Bit 290" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND289 ,Set/Clear Pending Bit 289" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND288 ,Set/Clear Pending Bit 288" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0224++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0A)
|
|
group.long 0x0228++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND351 ,Set/Clear Pending Bit 351" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND350 ,Set/Clear Pending Bit 350" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND349 ,Set/Clear Pending Bit 349" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND348 ,Set/Clear Pending Bit 348" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND347 ,Set/Clear Pending Bit 347" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND346 ,Set/Clear Pending Bit 346" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND345 ,Set/Clear Pending Bit 345" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND344 ,Set/Clear Pending Bit 344" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND343 ,Set/Clear Pending Bit 343" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND342 ,Set/Clear Pending Bit 342" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND341 ,Set/Clear Pending Bit 341" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND340 ,Set/Clear Pending Bit 340" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND339 ,Set/Clear Pending Bit 339" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND338 ,Set/Clear Pending Bit 338" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND337 ,Set/Clear Pending Bit 337" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND336 ,Set/Clear Pending Bit 336" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND335 ,Set/Clear Pending Bit 335" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND334 ,Set/Clear Pending Bit 334" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND333 ,Set/Clear Pending Bit 333" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND332 ,Set/Clear Pending Bit 332" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND331 ,Set/Clear Pending Bit 331" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND330 ,Set/Clear Pending Bit 330" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND329 ,Set/Clear Pending Bit 329" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND328 ,Set/Clear Pending Bit 328" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND327 ,Set/Clear Pending Bit 327" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND326 ,Set/Clear Pending Bit 326" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND325 ,Set/Clear Pending Bit 325" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND324 ,Set/Clear Pending Bit 324" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND323 ,Set/Clear Pending Bit 323" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND322 ,Set/Clear Pending Bit 322" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND321 ,Set/Clear Pending Bit 321" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND320 ,Set/Clear Pending Bit 320" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0228++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0B)
|
|
group.long 0x022C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND383 ,Set/Clear Pending Bit 383" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND382 ,Set/Clear Pending Bit 382" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND381 ,Set/Clear Pending Bit 381" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND380 ,Set/Clear Pending Bit 380" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND379 ,Set/Clear Pending Bit 379" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND378 ,Set/Clear Pending Bit 378" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND377 ,Set/Clear Pending Bit 377" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND376 ,Set/Clear Pending Bit 376" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND375 ,Set/Clear Pending Bit 375" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND374 ,Set/Clear Pending Bit 374" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND373 ,Set/Clear Pending Bit 373" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND372 ,Set/Clear Pending Bit 372" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND371 ,Set/Clear Pending Bit 371" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND370 ,Set/Clear Pending Bit 370" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND369 ,Set/Clear Pending Bit 369" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND368 ,Set/Clear Pending Bit 368" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND367 ,Set/Clear Pending Bit 367" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND366 ,Set/Clear Pending Bit 366" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND365 ,Set/Clear Pending Bit 365" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND364 ,Set/Clear Pending Bit 364" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND363 ,Set/Clear Pending Bit 363" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND362 ,Set/Clear Pending Bit 362" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND361 ,Set/Clear Pending Bit 361" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND360 ,Set/Clear Pending Bit 360" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND359 ,Set/Clear Pending Bit 359" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND358 ,Set/Clear Pending Bit 358" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND357 ,Set/Clear Pending Bit 357" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND356 ,Set/Clear Pending Bit 356" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND355 ,Set/Clear Pending Bit 355" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND354 ,Set/Clear Pending Bit 354" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND353 ,Set/Clear Pending Bit 353" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND352 ,Set/Clear Pending Bit 352" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x022C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0C)
|
|
group.long 0x0230++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND415 ,Set/Clear Pending Bit 415" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND414 ,Set/Clear Pending Bit 414" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND413 ,Set/Clear Pending Bit 413" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND412 ,Set/Clear Pending Bit 412" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND411 ,Set/Clear Pending Bit 411" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND410 ,Set/Clear Pending Bit 410" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND409 ,Set/Clear Pending Bit 409" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND408 ,Set/Clear Pending Bit 408" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND407 ,Set/Clear Pending Bit 407" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND406 ,Set/Clear Pending Bit 406" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND405 ,Set/Clear Pending Bit 405" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND404 ,Set/Clear Pending Bit 404" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND403 ,Set/Clear Pending Bit 403" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND402 ,Set/Clear Pending Bit 402" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND401 ,Set/Clear Pending Bit 401" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND400 ,Set/Clear Pending Bit 400" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND399 ,Set/Clear Pending Bit 399" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND398 ,Set/Clear Pending Bit 398" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND397 ,Set/Clear Pending Bit 397" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND396 ,Set/Clear Pending Bit 396" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND395 ,Set/Clear Pending Bit 395" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND394 ,Set/Clear Pending Bit 394" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND393 ,Set/Clear Pending Bit 393" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND392 ,Set/Clear Pending Bit 392" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND391 ,Set/Clear Pending Bit 391" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND390 ,Set/Clear Pending Bit 390" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND389 ,Set/Clear Pending Bit 389" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND388 ,Set/Clear Pending Bit 388" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND387 ,Set/Clear Pending Bit 387" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND386 ,Set/Clear Pending Bit 386" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND385 ,Set/Clear Pending Bit 385" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND384 ,Set/Clear Pending Bit 384" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0230++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0D)
|
|
group.long 0x0234++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND447 ,Set/Clear Pending Bit 447" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND446 ,Set/Clear Pending Bit 446" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND445 ,Set/Clear Pending Bit 445" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND444 ,Set/Clear Pending Bit 444" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND443 ,Set/Clear Pending Bit 443" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND442 ,Set/Clear Pending Bit 442" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND441 ,Set/Clear Pending Bit 441" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND440 ,Set/Clear Pending Bit 440" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND439 ,Set/Clear Pending Bit 439" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND438 ,Set/Clear Pending Bit 438" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND437 ,Set/Clear Pending Bit 437" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND436 ,Set/Clear Pending Bit 436" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND435 ,Set/Clear Pending Bit 435" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND434 ,Set/Clear Pending Bit 434" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND433 ,Set/Clear Pending Bit 433" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND432 ,Set/Clear Pending Bit 432" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND431 ,Set/Clear Pending Bit 431" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND430 ,Set/Clear Pending Bit 430" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND429 ,Set/Clear Pending Bit 429" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND428 ,Set/Clear Pending Bit 428" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND427 ,Set/Clear Pending Bit 427" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND426 ,Set/Clear Pending Bit 426" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND425 ,Set/Clear Pending Bit 425" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND424 ,Set/Clear Pending Bit 424" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND423 ,Set/Clear Pending Bit 423" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND422 ,Set/Clear Pending Bit 422" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND421 ,Set/Clear Pending Bit 421" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND420 ,Set/Clear Pending Bit 420" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND419 ,Set/Clear Pending Bit 419" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND418 ,Set/Clear Pending Bit 418" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND417 ,Set/Clear Pending Bit 417" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND416 ,Set/Clear Pending Bit 416" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0234++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0E)
|
|
group.long 0x0238++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND479 ,Set/Clear Pending Bit 479" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND478 ,Set/Clear Pending Bit 478" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND477 ,Set/Clear Pending Bit 477" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND476 ,Set/Clear Pending Bit 476" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND475 ,Set/Clear Pending Bit 475" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND474 ,Set/Clear Pending Bit 474" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND473 ,Set/Clear Pending Bit 473" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND472 ,Set/Clear Pending Bit 472" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND471 ,Set/Clear Pending Bit 471" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND470 ,Set/Clear Pending Bit 470" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND469 ,Set/Clear Pending Bit 469" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND468 ,Set/Clear Pending Bit 468" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND467 ,Set/Clear Pending Bit 467" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND466 ,Set/Clear Pending Bit 466" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND465 ,Set/Clear Pending Bit 465" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND464 ,Set/Clear Pending Bit 464" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND463 ,Set/Clear Pending Bit 463" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND462 ,Set/Clear Pending Bit 462" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND461 ,Set/Clear Pending Bit 461" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND460 ,Set/Clear Pending Bit 460" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND459 ,Set/Clear Pending Bit 459" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND458 ,Set/Clear Pending Bit 458" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND457 ,Set/Clear Pending Bit 457" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND456 ,Set/Clear Pending Bit 456" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND455 ,Set/Clear Pending Bit 455" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND454 ,Set/Clear Pending Bit 454" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND453 ,Set/Clear Pending Bit 453" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND452 ,Set/Clear Pending Bit 452" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND451 ,Set/Clear Pending Bit 451" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND450 ,Set/Clear Pending Bit 450" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND449 ,Set/Clear Pending Bit 449" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND448 ,Set/Clear Pending Bit 448" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0238++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0F)
|
|
group.long 0x023C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND511 ,Set/Clear Pending Bit 511" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND510 ,Set/Clear Pending Bit 510" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND509 ,Set/Clear Pending Bit 509" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND508 ,Set/Clear Pending Bit 508" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND507 ,Set/Clear Pending Bit 507" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND506 ,Set/Clear Pending Bit 506" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND505 ,Set/Clear Pending Bit 505" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND504 ,Set/Clear Pending Bit 504" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND503 ,Set/Clear Pending Bit 503" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND502 ,Set/Clear Pending Bit 502" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND501 ,Set/Clear Pending Bit 501" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND500 ,Set/Clear Pending Bit 500" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND499 ,Set/Clear Pending Bit 499" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND498 ,Set/Clear Pending Bit 498" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND497 ,Set/Clear Pending Bit 497" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND496 ,Set/Clear Pending Bit 496" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND495 ,Set/Clear Pending Bit 495" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND494 ,Set/Clear Pending Bit 494" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND493 ,Set/Clear Pending Bit 493" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND492 ,Set/Clear Pending Bit 492" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND491 ,Set/Clear Pending Bit 491" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND490 ,Set/Clear Pending Bit 490" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND489 ,Set/Clear Pending Bit 489" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND488 ,Set/Clear Pending Bit 488" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND487 ,Set/Clear Pending Bit 487" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND486 ,Set/Clear Pending Bit 486" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND485 ,Set/Clear Pending Bit 485" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND484 ,Set/Clear Pending Bit 484" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND483 ,Set/Clear Pending Bit 483" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND482 ,Set/Clear Pending Bit 482" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND481 ,Set/Clear Pending Bit 481" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND480 ,Set/Clear Pending Bit 480" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x023C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0x0240++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND543 ,Set/Clear Pending Bit 543" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND542 ,Set/Clear Pending Bit 542" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND541 ,Set/Clear Pending Bit 541" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND540 ,Set/Clear Pending Bit 540" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND539 ,Set/Clear Pending Bit 539" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND538 ,Set/Clear Pending Bit 538" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND537 ,Set/Clear Pending Bit 537" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND536 ,Set/Clear Pending Bit 536" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND535 ,Set/Clear Pending Bit 535" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND534 ,Set/Clear Pending Bit 534" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND533 ,Set/Clear Pending Bit 533" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND532 ,Set/Clear Pending Bit 532" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND531 ,Set/Clear Pending Bit 531" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND530 ,Set/Clear Pending Bit 530" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND529 ,Set/Clear Pending Bit 529" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND528 ,Set/Clear Pending Bit 528" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND527 ,Set/Clear Pending Bit 527" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND526 ,Set/Clear Pending Bit 526" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND525 ,Set/Clear Pending Bit 525" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND524 ,Set/Clear Pending Bit 524" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND523 ,Set/Clear Pending Bit 523" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND522 ,Set/Clear Pending Bit 522" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND521 ,Set/Clear Pending Bit 521" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND520 ,Set/Clear Pending Bit 520" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND519 ,Set/Clear Pending Bit 519" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND518 ,Set/Clear Pending Bit 518" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND517 ,Set/Clear Pending Bit 517" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND516 ,Set/Clear Pending Bit 516" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND515 ,Set/Clear Pending Bit 515" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND514 ,Set/Clear Pending Bit 514" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND513 ,Set/Clear Pending Bit 513" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND512 ,Set/Clear Pending Bit 512" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0240++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0x0244++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND575 ,Set/Clear Pending Bit 575" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND574 ,Set/Clear Pending Bit 574" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND573 ,Set/Clear Pending Bit 573" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND572 ,Set/Clear Pending Bit 572" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND571 ,Set/Clear Pending Bit 571" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND570 ,Set/Clear Pending Bit 570" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND569 ,Set/Clear Pending Bit 569" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND568 ,Set/Clear Pending Bit 568" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND567 ,Set/Clear Pending Bit 567" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND566 ,Set/Clear Pending Bit 566" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND565 ,Set/Clear Pending Bit 565" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND564 ,Set/Clear Pending Bit 564" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND563 ,Set/Clear Pending Bit 563" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND562 ,Set/Clear Pending Bit 562" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND561 ,Set/Clear Pending Bit 561" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND560 ,Set/Clear Pending Bit 560" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND559 ,Set/Clear Pending Bit 559" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND558 ,Set/Clear Pending Bit 558" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND557 ,Set/Clear Pending Bit 557" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND556 ,Set/Clear Pending Bit 556" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND555 ,Set/Clear Pending Bit 555" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND554 ,Set/Clear Pending Bit 554" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND553 ,Set/Clear Pending Bit 553" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND552 ,Set/Clear Pending Bit 552" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND551 ,Set/Clear Pending Bit 551" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND550 ,Set/Clear Pending Bit 550" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND549 ,Set/Clear Pending Bit 549" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND548 ,Set/Clear Pending Bit 548" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND547 ,Set/Clear Pending Bit 547" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND546 ,Set/Clear Pending Bit 546" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND545 ,Set/Clear Pending Bit 545" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND544 ,Set/Clear Pending Bit 544" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0244++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0x0248++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND607 ,Set/Clear Pending Bit 607" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND606 ,Set/Clear Pending Bit 606" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND605 ,Set/Clear Pending Bit 605" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND604 ,Set/Clear Pending Bit 604" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND603 ,Set/Clear Pending Bit 603" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND602 ,Set/Clear Pending Bit 602" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND601 ,Set/Clear Pending Bit 601" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND600 ,Set/Clear Pending Bit 600" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND599 ,Set/Clear Pending Bit 599" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND598 ,Set/Clear Pending Bit 598" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND597 ,Set/Clear Pending Bit 597" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND596 ,Set/Clear Pending Bit 596" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND595 ,Set/Clear Pending Bit 595" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND594 ,Set/Clear Pending Bit 594" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND593 ,Set/Clear Pending Bit 593" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND592 ,Set/Clear Pending Bit 592" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND591 ,Set/Clear Pending Bit 591" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND590 ,Set/Clear Pending Bit 590" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND589 ,Set/Clear Pending Bit 589" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND588 ,Set/Clear Pending Bit 588" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND587 ,Set/Clear Pending Bit 587" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND586 ,Set/Clear Pending Bit 586" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND585 ,Set/Clear Pending Bit 585" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND584 ,Set/Clear Pending Bit 584" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND583 ,Set/Clear Pending Bit 583" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND582 ,Set/Clear Pending Bit 582" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND581 ,Set/Clear Pending Bit 581" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND580 ,Set/Clear Pending Bit 580" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND579 ,Set/Clear Pending Bit 579" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND578 ,Set/Clear Pending Bit 578" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND577 ,Set/Clear Pending Bit 577" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND576 ,Set/Clear Pending Bit 576" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0248++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0x024C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND639 ,Set/Clear Pending Bit 639" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND638 ,Set/Clear Pending Bit 638" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND637 ,Set/Clear Pending Bit 637" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND636 ,Set/Clear Pending Bit 636" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND635 ,Set/Clear Pending Bit 635" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND634 ,Set/Clear Pending Bit 634" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND633 ,Set/Clear Pending Bit 633" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND632 ,Set/Clear Pending Bit 632" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND631 ,Set/Clear Pending Bit 631" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND630 ,Set/Clear Pending Bit 630" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND629 ,Set/Clear Pending Bit 629" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND628 ,Set/Clear Pending Bit 628" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND627 ,Set/Clear Pending Bit 627" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND626 ,Set/Clear Pending Bit 626" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND625 ,Set/Clear Pending Bit 625" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND624 ,Set/Clear Pending Bit 624" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND623 ,Set/Clear Pending Bit 623" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND622 ,Set/Clear Pending Bit 622" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND621 ,Set/Clear Pending Bit 621" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND620 ,Set/Clear Pending Bit 620" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND619 ,Set/Clear Pending Bit 619" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND618 ,Set/Clear Pending Bit 618" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND617 ,Set/Clear Pending Bit 617" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND616 ,Set/Clear Pending Bit 616" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND615 ,Set/Clear Pending Bit 615" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND614 ,Set/Clear Pending Bit 614" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND613 ,Set/Clear Pending Bit 613" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND612 ,Set/Clear Pending Bit 612" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND611 ,Set/Clear Pending Bit 611" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND610 ,Set/Clear Pending Bit 610" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND609 ,Set/Clear Pending Bit 609" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND608 ,Set/Clear Pending Bit 608" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x024C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0x0250++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND671 ,Set/Clear Pending Bit 671" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND670 ,Set/Clear Pending Bit 670" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND669 ,Set/Clear Pending Bit 669" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND668 ,Set/Clear Pending Bit 668" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND667 ,Set/Clear Pending Bit 667" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND666 ,Set/Clear Pending Bit 666" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND665 ,Set/Clear Pending Bit 665" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND664 ,Set/Clear Pending Bit 664" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND663 ,Set/Clear Pending Bit 663" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND662 ,Set/Clear Pending Bit 662" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND661 ,Set/Clear Pending Bit 661" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND660 ,Set/Clear Pending Bit 660" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND659 ,Set/Clear Pending Bit 659" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND658 ,Set/Clear Pending Bit 658" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND657 ,Set/Clear Pending Bit 657" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND656 ,Set/Clear Pending Bit 656" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND655 ,Set/Clear Pending Bit 655" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND654 ,Set/Clear Pending Bit 654" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND653 ,Set/Clear Pending Bit 653" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND652 ,Set/Clear Pending Bit 652" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND651 ,Set/Clear Pending Bit 651" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND650 ,Set/Clear Pending Bit 650" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND649 ,Set/Clear Pending Bit 649" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND648 ,Set/Clear Pending Bit 648" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND647 ,Set/Clear Pending Bit 647" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND646 ,Set/Clear Pending Bit 646" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND645 ,Set/Clear Pending Bit 645" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND644 ,Set/Clear Pending Bit 644" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND643 ,Set/Clear Pending Bit 643" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND642 ,Set/Clear Pending Bit 642" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND641 ,Set/Clear Pending Bit 641" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND640 ,Set/Clear Pending Bit 640" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0250++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0x0254++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND703 ,Set/Clear Pending Bit 703" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND702 ,Set/Clear Pending Bit 702" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND701 ,Set/Clear Pending Bit 701" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND700 ,Set/Clear Pending Bit 700" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND699 ,Set/Clear Pending Bit 699" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND698 ,Set/Clear Pending Bit 698" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND697 ,Set/Clear Pending Bit 697" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND696 ,Set/Clear Pending Bit 696" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND695 ,Set/Clear Pending Bit 695" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND694 ,Set/Clear Pending Bit 694" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND693 ,Set/Clear Pending Bit 693" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND692 ,Set/Clear Pending Bit 692" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND691 ,Set/Clear Pending Bit 691" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND690 ,Set/Clear Pending Bit 690" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND689 ,Set/Clear Pending Bit 689" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND688 ,Set/Clear Pending Bit 688" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND687 ,Set/Clear Pending Bit 687" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND686 ,Set/Clear Pending Bit 686" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND685 ,Set/Clear Pending Bit 685" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND684 ,Set/Clear Pending Bit 684" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND683 ,Set/Clear Pending Bit 683" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND682 ,Set/Clear Pending Bit 682" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND681 ,Set/Clear Pending Bit 681" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND680 ,Set/Clear Pending Bit 680" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND679 ,Set/Clear Pending Bit 679" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND678 ,Set/Clear Pending Bit 678" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND677 ,Set/Clear Pending Bit 677" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND676 ,Set/Clear Pending Bit 676" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND675 ,Set/Clear Pending Bit 675" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND674 ,Set/Clear Pending Bit 674" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND673 ,Set/Clear Pending Bit 673" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND672 ,Set/Clear Pending Bit 672" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0254++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0x0258++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND735 ,Set/Clear Pending Bit 735" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND734 ,Set/Clear Pending Bit 734" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND733 ,Set/Clear Pending Bit 733" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND732 ,Set/Clear Pending Bit 732" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND731 ,Set/Clear Pending Bit 731" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND730 ,Set/Clear Pending Bit 730" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND729 ,Set/Clear Pending Bit 729" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND728 ,Set/Clear Pending Bit 728" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND727 ,Set/Clear Pending Bit 727" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND726 ,Set/Clear Pending Bit 726" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND725 ,Set/Clear Pending Bit 725" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND724 ,Set/Clear Pending Bit 724" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND723 ,Set/Clear Pending Bit 723" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND722 ,Set/Clear Pending Bit 722" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND721 ,Set/Clear Pending Bit 721" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND720 ,Set/Clear Pending Bit 720" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND719 ,Set/Clear Pending Bit 719" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND718 ,Set/Clear Pending Bit 718" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND717 ,Set/Clear Pending Bit 717" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND716 ,Set/Clear Pending Bit 716" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND715 ,Set/Clear Pending Bit 715" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND714 ,Set/Clear Pending Bit 714" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND713 ,Set/Clear Pending Bit 713" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND712 ,Set/Clear Pending Bit 712" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND711 ,Set/Clear Pending Bit 711" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND710 ,Set/Clear Pending Bit 710" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND709 ,Set/Clear Pending Bit 709" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND708 ,Set/Clear Pending Bit 708" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND707 ,Set/Clear Pending Bit 707" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND706 ,Set/Clear Pending Bit 706" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND705 ,Set/Clear Pending Bit 705" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND704 ,Set/Clear Pending Bit 704" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0258++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0x025C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND767 ,Set/Clear Pending Bit 767" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND766 ,Set/Clear Pending Bit 766" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND765 ,Set/Clear Pending Bit 765" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND764 ,Set/Clear Pending Bit 764" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND763 ,Set/Clear Pending Bit 763" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND762 ,Set/Clear Pending Bit 762" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND761 ,Set/Clear Pending Bit 761" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND760 ,Set/Clear Pending Bit 760" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND759 ,Set/Clear Pending Bit 759" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND758 ,Set/Clear Pending Bit 758" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND757 ,Set/Clear Pending Bit 757" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND756 ,Set/Clear Pending Bit 756" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND755 ,Set/Clear Pending Bit 755" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND754 ,Set/Clear Pending Bit 754" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND753 ,Set/Clear Pending Bit 753" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND752 ,Set/Clear Pending Bit 752" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND751 ,Set/Clear Pending Bit 751" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND750 ,Set/Clear Pending Bit 750" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND749 ,Set/Clear Pending Bit 749" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND748 ,Set/Clear Pending Bit 748" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND747 ,Set/Clear Pending Bit 747" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND746 ,Set/Clear Pending Bit 746" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND745 ,Set/Clear Pending Bit 745" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND744 ,Set/Clear Pending Bit 744" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND743 ,Set/Clear Pending Bit 743" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND742 ,Set/Clear Pending Bit 742" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND741 ,Set/Clear Pending Bit 741" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND740 ,Set/Clear Pending Bit 740" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND739 ,Set/Clear Pending Bit 739" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND738 ,Set/Clear Pending Bit 738" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND737 ,Set/Clear Pending Bit 737" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND736 ,Set/Clear Pending Bit 736" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x025C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0x0260++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND799 ,Set/Clear Pending Bit 799" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND798 ,Set/Clear Pending Bit 798" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND797 ,Set/Clear Pending Bit 797" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND796 ,Set/Clear Pending Bit 796" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND795 ,Set/Clear Pending Bit 795" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND794 ,Set/Clear Pending Bit 794" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND793 ,Set/Clear Pending Bit 793" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND792 ,Set/Clear Pending Bit 792" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND791 ,Set/Clear Pending Bit 791" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND790 ,Set/Clear Pending Bit 790" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND789 ,Set/Clear Pending Bit 789" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND788 ,Set/Clear Pending Bit 788" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND787 ,Set/Clear Pending Bit 787" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND786 ,Set/Clear Pending Bit 786" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND785 ,Set/Clear Pending Bit 785" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND784 ,Set/Clear Pending Bit 784" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND783 ,Set/Clear Pending Bit 783" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND782 ,Set/Clear Pending Bit 782" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND781 ,Set/Clear Pending Bit 781" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND780 ,Set/Clear Pending Bit 780" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND779 ,Set/Clear Pending Bit 779" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND778 ,Set/Clear Pending Bit 778" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND777 ,Set/Clear Pending Bit 777" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND776 ,Set/Clear Pending Bit 776" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND775 ,Set/Clear Pending Bit 775" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND774 ,Set/Clear Pending Bit 774" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND773 ,Set/Clear Pending Bit 773" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND772 ,Set/Clear Pending Bit 772" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND771 ,Set/Clear Pending Bit 771" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND770 ,Set/Clear Pending Bit 770" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND769 ,Set/Clear Pending Bit 769" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND768 ,Set/Clear Pending Bit 768" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0260++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0x0264++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND831 ,Set/Clear Pending Bit 831" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND830 ,Set/Clear Pending Bit 830" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND829 ,Set/Clear Pending Bit 829" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND828 ,Set/Clear Pending Bit 828" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND827 ,Set/Clear Pending Bit 827" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND826 ,Set/Clear Pending Bit 826" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND825 ,Set/Clear Pending Bit 825" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND824 ,Set/Clear Pending Bit 824" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND823 ,Set/Clear Pending Bit 823" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND822 ,Set/Clear Pending Bit 822" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND821 ,Set/Clear Pending Bit 821" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND820 ,Set/Clear Pending Bit 820" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND819 ,Set/Clear Pending Bit 819" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND818 ,Set/Clear Pending Bit 818" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND817 ,Set/Clear Pending Bit 817" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND816 ,Set/Clear Pending Bit 816" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND815 ,Set/Clear Pending Bit 815" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND814 ,Set/Clear Pending Bit 814" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND813 ,Set/Clear Pending Bit 813" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND812 ,Set/Clear Pending Bit 812" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND811 ,Set/Clear Pending Bit 811" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND810 ,Set/Clear Pending Bit 810" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND809 ,Set/Clear Pending Bit 809" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND808 ,Set/Clear Pending Bit 808" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND807 ,Set/Clear Pending Bit 807" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND806 ,Set/Clear Pending Bit 806" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND805 ,Set/Clear Pending Bit 805" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND804 ,Set/Clear Pending Bit 804" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND803 ,Set/Clear Pending Bit 803" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND802 ,Set/Clear Pending Bit 802" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND801 ,Set/Clear Pending Bit 801" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND800 ,Set/Clear Pending Bit 800" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0264++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0x0268++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND863 ,Set/Clear Pending Bit 863" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND862 ,Set/Clear Pending Bit 862" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND861 ,Set/Clear Pending Bit 861" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND860 ,Set/Clear Pending Bit 860" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND859 ,Set/Clear Pending Bit 859" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND858 ,Set/Clear Pending Bit 858" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND857 ,Set/Clear Pending Bit 857" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND856 ,Set/Clear Pending Bit 856" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND855 ,Set/Clear Pending Bit 855" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND854 ,Set/Clear Pending Bit 854" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND853 ,Set/Clear Pending Bit 853" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND852 ,Set/Clear Pending Bit 852" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND851 ,Set/Clear Pending Bit 851" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND850 ,Set/Clear Pending Bit 850" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND849 ,Set/Clear Pending Bit 849" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND848 ,Set/Clear Pending Bit 848" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND847 ,Set/Clear Pending Bit 847" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND846 ,Set/Clear Pending Bit 846" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND845 ,Set/Clear Pending Bit 845" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND844 ,Set/Clear Pending Bit 844" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND843 ,Set/Clear Pending Bit 843" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND842 ,Set/Clear Pending Bit 842" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND841 ,Set/Clear Pending Bit 841" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND840 ,Set/Clear Pending Bit 840" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND839 ,Set/Clear Pending Bit 839" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND838 ,Set/Clear Pending Bit 838" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND837 ,Set/Clear Pending Bit 837" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND836 ,Set/Clear Pending Bit 836" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND835 ,Set/Clear Pending Bit 835" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND834 ,Set/Clear Pending Bit 834" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND833 ,Set/Clear Pending Bit 833" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND832 ,Set/Clear Pending Bit 832" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0268++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0x026C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND895 ,Set/Clear Pending Bit 895" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND894 ,Set/Clear Pending Bit 894" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND893 ,Set/Clear Pending Bit 893" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND892 ,Set/Clear Pending Bit 892" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND891 ,Set/Clear Pending Bit 891" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND890 ,Set/Clear Pending Bit 890" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND889 ,Set/Clear Pending Bit 889" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND888 ,Set/Clear Pending Bit 888" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND887 ,Set/Clear Pending Bit 887" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND886 ,Set/Clear Pending Bit 886" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND885 ,Set/Clear Pending Bit 885" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND884 ,Set/Clear Pending Bit 884" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND883 ,Set/Clear Pending Bit 883" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND882 ,Set/Clear Pending Bit 882" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND881 ,Set/Clear Pending Bit 881" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND880 ,Set/Clear Pending Bit 880" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND879 ,Set/Clear Pending Bit 879" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND878 ,Set/Clear Pending Bit 878" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND877 ,Set/Clear Pending Bit 877" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND876 ,Set/Clear Pending Bit 876" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND875 ,Set/Clear Pending Bit 875" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND874 ,Set/Clear Pending Bit 874" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND873 ,Set/Clear Pending Bit 873" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND872 ,Set/Clear Pending Bit 872" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND871 ,Set/Clear Pending Bit 871" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND870 ,Set/Clear Pending Bit 870" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND869 ,Set/Clear Pending Bit 869" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND868 ,Set/Clear Pending Bit 868" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND867 ,Set/Clear Pending Bit 867" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND866 ,Set/Clear Pending Bit 866" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND865 ,Set/Clear Pending Bit 865" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND864 ,Set/Clear Pending Bit 864" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x026C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0x0270++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND927 ,Set/Clear Pending Bit 927" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND926 ,Set/Clear Pending Bit 926" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND925 ,Set/Clear Pending Bit 925" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND924 ,Set/Clear Pending Bit 924" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND923 ,Set/Clear Pending Bit 923" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND922 ,Set/Clear Pending Bit 922" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND921 ,Set/Clear Pending Bit 921" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND920 ,Set/Clear Pending Bit 920" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND919 ,Set/Clear Pending Bit 919" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND918 ,Set/Clear Pending Bit 918" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND917 ,Set/Clear Pending Bit 917" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND916 ,Set/Clear Pending Bit 916" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND915 ,Set/Clear Pending Bit 915" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND914 ,Set/Clear Pending Bit 914" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND913 ,Set/Clear Pending Bit 913" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND912 ,Set/Clear Pending Bit 912" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND911 ,Set/Clear Pending Bit 911" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND910 ,Set/Clear Pending Bit 910" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND909 ,Set/Clear Pending Bit 909" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND908 ,Set/Clear Pending Bit 908" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND907 ,Set/Clear Pending Bit 907" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND906 ,Set/Clear Pending Bit 906" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND905 ,Set/Clear Pending Bit 905" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND904 ,Set/Clear Pending Bit 904" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND903 ,Set/Clear Pending Bit 903" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND902 ,Set/Clear Pending Bit 902" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND901 ,Set/Clear Pending Bit 901" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND900 ,Set/Clear Pending Bit 900" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND899 ,Set/Clear Pending Bit 899" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND898 ,Set/Clear Pending Bit 898" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND897 ,Set/Clear Pending Bit 897" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND896 ,Set/Clear Pending Bit 896" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0270++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0x0274++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND959 ,Set/Clear Pending Bit 959" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND958 ,Set/Clear Pending Bit 958" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND957 ,Set/Clear Pending Bit 957" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND956 ,Set/Clear Pending Bit 956" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND955 ,Set/Clear Pending Bit 955" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND954 ,Set/Clear Pending Bit 954" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND953 ,Set/Clear Pending Bit 953" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND952 ,Set/Clear Pending Bit 952" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND951 ,Set/Clear Pending Bit 951" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND950 ,Set/Clear Pending Bit 950" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND949 ,Set/Clear Pending Bit 949" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND948 ,Set/Clear Pending Bit 948" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND947 ,Set/Clear Pending Bit 947" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND946 ,Set/Clear Pending Bit 946" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND945 ,Set/Clear Pending Bit 945" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND944 ,Set/Clear Pending Bit 944" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND943 ,Set/Clear Pending Bit 943" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND942 ,Set/Clear Pending Bit 942" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND941 ,Set/Clear Pending Bit 941" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND940 ,Set/Clear Pending Bit 940" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND939 ,Set/Clear Pending Bit 939" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND938 ,Set/Clear Pending Bit 938" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND937 ,Set/Clear Pending Bit 937" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND936 ,Set/Clear Pending Bit 936" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND935 ,Set/Clear Pending Bit 935" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND934 ,Set/Clear Pending Bit 934" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND933 ,Set/Clear Pending Bit 933" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND932 ,Set/Clear Pending Bit 932" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND931 ,Set/Clear Pending Bit 931" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND930 ,Set/Clear Pending Bit 930" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND929 ,Set/Clear Pending Bit 929" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND928 ,Set/Clear Pending Bit 928" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0274++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0x0278++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND991 ,Set/Clear Pending Bit 991" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND990 ,Set/Clear Pending Bit 990" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND989 ,Set/Clear Pending Bit 989" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND988 ,Set/Clear Pending Bit 988" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND987 ,Set/Clear Pending Bit 987" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND986 ,Set/Clear Pending Bit 986" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND985 ,Set/Clear Pending Bit 985" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND984 ,Set/Clear Pending Bit 984" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND983 ,Set/Clear Pending Bit 983" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND982 ,Set/Clear Pending Bit 982" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND981 ,Set/Clear Pending Bit 981" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND980 ,Set/Clear Pending Bit 980" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND979 ,Set/Clear Pending Bit 979" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND978 ,Set/Clear Pending Bit 978" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND977 ,Set/Clear Pending Bit 977" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND976 ,Set/Clear Pending Bit 976" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND975 ,Set/Clear Pending Bit 975" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND974 ,Set/Clear Pending Bit 974" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND973 ,Set/Clear Pending Bit 973" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND972 ,Set/Clear Pending Bit 972" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND971 ,Set/Clear Pending Bit 971" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND970 ,Set/Clear Pending Bit 970" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND969 ,Set/Clear Pending Bit 969" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND968 ,Set/Clear Pending Bit 968" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND967 ,Set/Clear Pending Bit 967" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND966 ,Set/Clear Pending Bit 966" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND965 ,Set/Clear Pending Bit 965" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND964 ,Set/Clear Pending Bit 964" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND963 ,Set/Clear Pending Bit 963" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND962 ,Set/Clear Pending Bit 962" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND961 ,Set/Clear Pending Bit 961" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND960 ,Set/Clear Pending Bit 960" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0278++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)==0x1F)
|
|
group.long 0x027C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND1019 ,Set/Clear Pending Bit 1019" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND1018 ,Set/Clear Pending Bit 1018" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND1017 ,Set/Clear Pending Bit 1017" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND1016 ,Set/Clear Pending Bit 1016" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND1015 ,Set/Clear Pending Bit 1015" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND1014 ,Set/Clear Pending Bit 1014" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND1013 ,Set/Clear Pending Bit 1013" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND1012 ,Set/Clear Pending Bit 1012" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND1011 ,Set/Clear Pending Bit 1011" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND1010 ,Set/Clear Pending Bit 1010" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND1009 ,Set/Clear Pending Bit 1009" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND1008 ,Set/Clear Pending Bit 1008" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND1007 ,Set/Clear Pending Bit 1007" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND1006 ,Set/Clear Pending Bit 1006" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND1005 ,Set/Clear Pending Bit 1005" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND1004 ,Set/Clear Pending Bit 1004" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND1003 ,Set/Clear Pending Bit 1003" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND1002 ,Set/Clear Pending Bit 1002" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND1001 ,Set/Clear Pending Bit 1001" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND1000 ,Set/Clear Pending Bit 1000" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND999 ,Set/Clear Pending Bit 999" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND998 ,Set/Clear Pending Bit 998" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND997 ,Set/Clear Pending Bit 997" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND996 ,Set/Clear Pending Bit 996" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND995 ,Set/Clear Pending Bit 995" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND994 ,Set/Clear Pending Bit 994" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND993 ,Set/Clear Pending Bit 993" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND992 ,Set/Clear Pending Bit 992" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x027C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 24.
|
|
tree "Set/Clear Active Registers"
|
|
rgroup.long 0x0300++0x03
|
|
line.long 0x0 "GICD_ICDABR0,Active Status Register 0"
|
|
bitfld.long 0x00 31. " ASB31 ,Active Status Bit 31" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB30 ,Active Status Bit 30" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB29 ,Active Status Bit 29" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB28 ,Active Status Bit 28" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB27 ,Active Status Bit 27" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB26 ,Active Status Bit 26" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB25 ,Active Status Bit 25" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB24 ,Active Status Bit 24" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB23 ,Active Status Bit 23" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB22 ,Active Status Bit 22" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB21 ,Active Status Bit 21" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB20 ,Active Status Bit 20" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB19 ,Active Status Bit 19" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB18 ,Active Status Bit 18" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB17 ,Active Status Bit 17" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB16 ,Active Status Bit 16" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB15 ,Active Status Bit 15" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB14 ,Active Status Bit 14" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB13 ,Active Status Bit 13" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB12 ,Active Status Bit 12" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB11 ,Active Status Bit 11" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB10 ,Active Status Bit 10" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB9 ,Active Status Bit 9" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB8 ,Active Status Bit 8" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB7 ,Active Status Bit 7" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB6 ,Active Status Bit 6" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB5 ,Active Status Bit 5" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB4 ,Active Status Bit 4" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB3 ,Active Status Bit 3" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB2 ,Active Status Bit 2" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB1 ,Active Status Bit 1" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB0 ,Active Status Bit 0" "Not active,Active"
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x01)
|
|
rgroup.long 0x0304++0x03
|
|
line.long 0x0 "GICD_ICDABR1,Active Status Register 1"
|
|
bitfld.long 0x00 31. " ASB63 ,Active Status Bit 63" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB62 ,Active Status Bit 62" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB61 ,Active Status Bit 61" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB60 ,Active Status Bit 60" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB59 ,Active Status Bit 59" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB58 ,Active Status Bit 58" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB57 ,Active Status Bit 57" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB56 ,Active Status Bit 56" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB55 ,Active Status Bit 55" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB54 ,Active Status Bit 54" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB53 ,Active Status Bit 53" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB52 ,Active Status Bit 52" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB51 ,Active Status Bit 51" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB50 ,Active Status Bit 50" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB49 ,Active Status Bit 49" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB48 ,Active Status Bit 48" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB47 ,Active Status Bit 47" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB46 ,Active Status Bit 46" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB45 ,Active Status Bit 45" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB44 ,Active Status Bit 44" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB43 ,Active Status Bit 43" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB42 ,Active Status Bit 42" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB41 ,Active Status Bit 41" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB40 ,Active Status Bit 40" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB39 ,Active Status Bit 39" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB38 ,Active Status Bit 38" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB37 ,Active Status Bit 37" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB36 ,Active Status Bit 36" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB35 ,Active Status Bit 35" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB34 ,Active Status Bit 34" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB33 ,Active Status Bit 33" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB32 ,Active Status Bit 32" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0304++0x03
|
|
hide.long 0x0 "GICD_ICDABR1,Active Status Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x02)
|
|
rgroup.long 0x0308++0x03
|
|
line.long 0x0 "GICD_ICDABR2,Active Status Register 2"
|
|
bitfld.long 0x00 31. " ASB95 ,Active Status Bit 95" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB94 ,Active Status Bit 94" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB93 ,Active Status Bit 93" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB92 ,Active Status Bit 92" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB91 ,Active Status Bit 91" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB90 ,Active Status Bit 90" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB89 ,Active Status Bit 89" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB88 ,Active Status Bit 88" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB87 ,Active Status Bit 87" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB86 ,Active Status Bit 86" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB85 ,Active Status Bit 85" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB84 ,Active Status Bit 84" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB83 ,Active Status Bit 83" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB82 ,Active Status Bit 82" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB81 ,Active Status Bit 81" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB80 ,Active Status Bit 80" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB79 ,Active Status Bit 79" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB78 ,Active Status Bit 78" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB77 ,Active Status Bit 77" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB76 ,Active Status Bit 76" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB75 ,Active Status Bit 75" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB74 ,Active Status Bit 74" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB73 ,Active Status Bit 73" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB72 ,Active Status Bit 72" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB71 ,Active Status Bit 71" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB70 ,Active Status Bit 70" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB69 ,Active Status Bit 69" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB68 ,Active Status Bit 68" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB67 ,Active Status Bit 67" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB66 ,Active Status Bit 66" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB65 ,Active Status Bit 65" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB64 ,Active Status Bit 64" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0308++0x03
|
|
hide.long 0x0 "GICD_ICDABR2,Active Status Register 2"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x03)
|
|
rgroup.long 0x030C++0x03
|
|
line.long 0x0 "GICD_ICDABR3,Active Status Register 3"
|
|
bitfld.long 0x00 31. " ASB127 ,Active Status Bit 127" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB126 ,Active Status Bit 126" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB125 ,Active Status Bit 125" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB124 ,Active Status Bit 124" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB123 ,Active Status Bit 123" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB122 ,Active Status Bit 122" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB121 ,Active Status Bit 121" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB120 ,Active Status Bit 120" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB119 ,Active Status Bit 119" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB118 ,Active Status Bit 118" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB117 ,Active Status Bit 117" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB116 ,Active Status Bit 116" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB115 ,Active Status Bit 115" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB114 ,Active Status Bit 114" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB113 ,Active Status Bit 113" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB112 ,Active Status Bit 112" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB111 ,Active Status Bit 111" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB110 ,Active Status Bit 110" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB109 ,Active Status Bit 109" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB108 ,Active Status Bit 108" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB107 ,Active Status Bit 107" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB106 ,Active Status Bit 106" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB105 ,Active Status Bit 105" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB104 ,Active Status Bit 104" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB103 ,Active Status Bit 103" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB102 ,Active Status Bit 102" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB101 ,Active Status Bit 101" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB100 ,Active Status Bit 100" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB99 ,Active Status Bit 99" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB98 ,Active Status Bit 98" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB97 ,Active Status Bit 97" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB96 ,Active Status Bit 96" "Not active,Active"
|
|
else
|
|
hgroup.long 0x030C++0x03
|
|
hide.long 0x0 "GICD_ICDABR3,Active Status Register 3"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x04)
|
|
rgroup.long 0x0310++0x03
|
|
line.long 0x0 "GICD_ICDABR4,Active Status Register 4"
|
|
bitfld.long 0x00 31. " ASB159 ,Active Status Bit 159" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB158 ,Active Status Bit 158" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB157 ,Active Status Bit 157" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB156 ,Active Status Bit 156" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB155 ,Active Status Bit 155" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB154 ,Active Status Bit 154" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB153 ,Active Status Bit 153" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB152 ,Active Status Bit 152" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB151 ,Active Status Bit 151" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB150 ,Active Status Bit 150" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB149 ,Active Status Bit 149" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB148 ,Active Status Bit 148" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB147 ,Active Status Bit 147" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB146 ,Active Status Bit 146" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB145 ,Active Status Bit 145" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB144 ,Active Status Bit 144" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB143 ,Active Status Bit 143" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB142 ,Active Status Bit 142" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB141 ,Active Status Bit 141" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB140 ,Active Status Bit 140" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB139 ,Active Status Bit 139" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB138 ,Active Status Bit 138" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB137 ,Active Status Bit 137" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB136 ,Active Status Bit 136" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB135 ,Active Status Bit 135" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB134 ,Active Status Bit 134" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB133 ,Active Status Bit 133" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB132 ,Active Status Bit 132" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB131 ,Active Status Bit 131" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB130 ,Active Status Bit 130" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB129 ,Active Status Bit 129" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB128 ,Active Status Bit 128" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0310++0x03
|
|
hide.long 0x0 "GICD_ICDABR4,Active Status Register 4"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x05)
|
|
rgroup.long 0x0314++0x03
|
|
line.long 0x0 "GICD_ICDABR5,Active Status Register 5"
|
|
bitfld.long 0x00 31. " ASB191 ,Active Status Bit 191" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB190 ,Active Status Bit 190" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB189 ,Active Status Bit 189" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB188 ,Active Status Bit 188" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB187 ,Active Status Bit 187" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB186 ,Active Status Bit 186" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB185 ,Active Status Bit 185" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB184 ,Active Status Bit 184" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB183 ,Active Status Bit 183" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB182 ,Active Status Bit 182" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB181 ,Active Status Bit 181" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB180 ,Active Status Bit 180" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB179 ,Active Status Bit 179" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB178 ,Active Status Bit 178" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB177 ,Active Status Bit 177" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB176 ,Active Status Bit 176" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB175 ,Active Status Bit 175" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB174 ,Active Status Bit 174" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB173 ,Active Status Bit 173" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB172 ,Active Status Bit 172" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB171 ,Active Status Bit 171" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB170 ,Active Status Bit 170" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB169 ,Active Status Bit 169" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB168 ,Active Status Bit 168" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB167 ,Active Status Bit 167" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB166 ,Active Status Bit 166" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB165 ,Active Status Bit 165" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB164 ,Active Status Bit 164" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB163 ,Active Status Bit 163" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB162 ,Active Status Bit 162" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB161 ,Active Status Bit 161" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB160 ,Active Status Bit 160" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0314++0x03
|
|
hide.long 0x0 "GICD_ICDABR5,Active Status Register 5"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x06)
|
|
rgroup.long 0x0318++0x03
|
|
line.long 0x0 "GICD_ICDABR6,Active Status Register 6"
|
|
bitfld.long 0x00 31. " ASB223 ,Active Status Bit 223" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB222 ,Active Status Bit 222" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB221 ,Active Status Bit 221" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB220 ,Active Status Bit 220" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB219 ,Active Status Bit 219" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB218 ,Active Status Bit 218" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB217 ,Active Status Bit 217" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB216 ,Active Status Bit 216" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB215 ,Active Status Bit 215" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB214 ,Active Status Bit 214" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB213 ,Active Status Bit 213" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB212 ,Active Status Bit 212" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB211 ,Active Status Bit 211" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB210 ,Active Status Bit 210" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB209 ,Active Status Bit 209" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB208 ,Active Status Bit 208" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB207 ,Active Status Bit 207" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB206 ,Active Status Bit 206" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB205 ,Active Status Bit 205" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB204 ,Active Status Bit 204" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB203 ,Active Status Bit 203" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB202 ,Active Status Bit 202" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB201 ,Active Status Bit 201" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB200 ,Active Status Bit 200" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB199 ,Active Status Bit 199" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB198 ,Active Status Bit 198" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB197 ,Active Status Bit 197" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB196 ,Active Status Bit 196" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB195 ,Active Status Bit 195" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB194 ,Active Status Bit 194" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB193 ,Active Status Bit 193" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB192 ,Active Status Bit 192" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0318++0x03
|
|
hide.long 0x0 "GICD_ICDABR6,Active Status Register 6"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x07)
|
|
rgroup.long 0x031C++0x03
|
|
line.long 0x0 "GICD_ICDABR7,Active Status Register 7"
|
|
bitfld.long 0x00 31. " ASB255 ,Active Status Bit 255" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB254 ,Active Status Bit 254" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB253 ,Active Status Bit 253" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB252 ,Active Status Bit 252" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB251 ,Active Status Bit 251" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB250 ,Active Status Bit 250" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB249 ,Active Status Bit 249" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB248 ,Active Status Bit 248" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB247 ,Active Status Bit 247" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB246 ,Active Status Bit 246" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB245 ,Active Status Bit 245" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB244 ,Active Status Bit 244" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB243 ,Active Status Bit 243" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB242 ,Active Status Bit 242" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB241 ,Active Status Bit 241" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB240 ,Active Status Bit 240" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB239 ,Active Status Bit 239" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB238 ,Active Status Bit 238" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB237 ,Active Status Bit 237" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB236 ,Active Status Bit 236" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB235 ,Active Status Bit 235" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB234 ,Active Status Bit 234" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB233 ,Active Status Bit 233" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB232 ,Active Status Bit 232" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB231 ,Active Status Bit 231" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB230 ,Active Status Bit 230" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB229 ,Active Status Bit 229" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB228 ,Active Status Bit 228" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB227 ,Active Status Bit 227" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB226 ,Active Status Bit 226" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB225 ,Active Status Bit 225" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB224 ,Active Status Bit 224" "Not active,Active"
|
|
else
|
|
hgroup.long 0x031C++0x03
|
|
hide.long 0x0 "GICD_ICDABR7,Active Status Register 7"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x08)
|
|
rgroup.long 0x0320++0x03
|
|
line.long 0x0 "GICD_ICDABR8,Active Status Register 8"
|
|
bitfld.long 0x00 31. " ASB287 ,Active Status Bit 287" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB286 ,Active Status Bit 286" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB285 ,Active Status Bit 285" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB284 ,Active Status Bit 284" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB283 ,Active Status Bit 283" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB282 ,Active Status Bit 282" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB281 ,Active Status Bit 281" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB280 ,Active Status Bit 280" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB279 ,Active Status Bit 279" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB278 ,Active Status Bit 278" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB277 ,Active Status Bit 277" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB276 ,Active Status Bit 276" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB275 ,Active Status Bit 275" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB274 ,Active Status Bit 274" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB273 ,Active Status Bit 273" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB272 ,Active Status Bit 272" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB271 ,Active Status Bit 271" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB270 ,Active Status Bit 270" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB269 ,Active Status Bit 269" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB268 ,Active Status Bit 268" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB267 ,Active Status Bit 267" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB266 ,Active Status Bit 266" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB265 ,Active Status Bit 265" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB264 ,Active Status Bit 264" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB263 ,Active Status Bit 263" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB262 ,Active Status Bit 262" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB261 ,Active Status Bit 261" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB260 ,Active Status Bit 260" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB259 ,Active Status Bit 259" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB258 ,Active Status Bit 258" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB257 ,Active Status Bit 257" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB256 ,Active Status Bit 256" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0320++0x03
|
|
hide.long 0x0 "GICD_ICDABR8,Active Status Register 8"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x09)
|
|
rgroup.long 0x0324++0x03
|
|
line.long 0x0 "GICD_ICDABR9,Active Status Register 9"
|
|
bitfld.long 0x00 31. " ASB319 ,Active Status Bit 319" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB318 ,Active Status Bit 318" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB317 ,Active Status Bit 317" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB316 ,Active Status Bit 316" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB315 ,Active Status Bit 315" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB314 ,Active Status Bit 314" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB313 ,Active Status Bit 313" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB312 ,Active Status Bit 312" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB311 ,Active Status Bit 311" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB310 ,Active Status Bit 310" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB309 ,Active Status Bit 309" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB308 ,Active Status Bit 308" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB307 ,Active Status Bit 307" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB306 ,Active Status Bit 306" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB305 ,Active Status Bit 305" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB304 ,Active Status Bit 304" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB303 ,Active Status Bit 303" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB302 ,Active Status Bit 302" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB301 ,Active Status Bit 301" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB300 ,Active Status Bit 300" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB299 ,Active Status Bit 299" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB298 ,Active Status Bit 298" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB297 ,Active Status Bit 297" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB296 ,Active Status Bit 296" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB295 ,Active Status Bit 295" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB294 ,Active Status Bit 294" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB293 ,Active Status Bit 293" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB292 ,Active Status Bit 292" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB291 ,Active Status Bit 291" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB290 ,Active Status Bit 290" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB289 ,Active Status Bit 289" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB288 ,Active Status Bit 288" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0324++0x03
|
|
hide.long 0x0 "GICD_ICDABR9,Active Status Register 9"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0A)
|
|
rgroup.long 0x0328++0x03
|
|
line.long 0x0 "GICD_ICDABR10,Active Status Register 10"
|
|
bitfld.long 0x00 31. " ASB351 ,Active Status Bit 351" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB350 ,Active Status Bit 350" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB349 ,Active Status Bit 349" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB348 ,Active Status Bit 348" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB347 ,Active Status Bit 347" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB346 ,Active Status Bit 346" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB345 ,Active Status Bit 345" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB344 ,Active Status Bit 344" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB343 ,Active Status Bit 343" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB342 ,Active Status Bit 342" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB341 ,Active Status Bit 341" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB340 ,Active Status Bit 340" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB339 ,Active Status Bit 339" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB338 ,Active Status Bit 338" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB337 ,Active Status Bit 337" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB336 ,Active Status Bit 336" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB335 ,Active Status Bit 335" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB334 ,Active Status Bit 334" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB333 ,Active Status Bit 333" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB332 ,Active Status Bit 332" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB331 ,Active Status Bit 331" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB330 ,Active Status Bit 330" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB329 ,Active Status Bit 329" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB328 ,Active Status Bit 328" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB327 ,Active Status Bit 327" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB326 ,Active Status Bit 326" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB325 ,Active Status Bit 325" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB324 ,Active Status Bit 324" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB323 ,Active Status Bit 323" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB322 ,Active Status Bit 322" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB321 ,Active Status Bit 321" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB320 ,Active Status Bit 320" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0328++0x03
|
|
hide.long 0x0 "GICD_ICDABR10,Active Status Register 10"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0B)
|
|
rgroup.long 0x032C++0x03
|
|
line.long 0x0 "GICD_ICDABR11,Active Status Register 11"
|
|
bitfld.long 0x00 31. " ASB383 ,Active Status Bit 383" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB382 ,Active Status Bit 382" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB381 ,Active Status Bit 381" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB380 ,Active Status Bit 380" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB379 ,Active Status Bit 379" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB378 ,Active Status Bit 378" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB377 ,Active Status Bit 377" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB376 ,Active Status Bit 376" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB375 ,Active Status Bit 375" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB374 ,Active Status Bit 374" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB373 ,Active Status Bit 373" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB372 ,Active Status Bit 372" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB371 ,Active Status Bit 371" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB370 ,Active Status Bit 370" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB369 ,Active Status Bit 369" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB368 ,Active Status Bit 368" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB367 ,Active Status Bit 367" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB366 ,Active Status Bit 366" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB365 ,Active Status Bit 365" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB364 ,Active Status Bit 364" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB363 ,Active Status Bit 363" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB362 ,Active Status Bit 362" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB361 ,Active Status Bit 361" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB360 ,Active Status Bit 360" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB359 ,Active Status Bit 359" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB358 ,Active Status Bit 358" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB357 ,Active Status Bit 357" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB356 ,Active Status Bit 356" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB355 ,Active Status Bit 355" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB354 ,Active Status Bit 354" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB353 ,Active Status Bit 353" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB352 ,Active Status Bit 352" "Not active,Active"
|
|
else
|
|
hgroup.long 0x032C++0x03
|
|
hide.long 0x0 "GICD_ICDABR11,Active Status Register 11"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0C)
|
|
rgroup.long 0x0330++0x03
|
|
line.long 0x0 "GICD_ICDABR12,Active Status Register 12"
|
|
bitfld.long 0x00 31. " ASB415 ,Active Status Bit 415" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB414 ,Active Status Bit 414" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB413 ,Active Status Bit 413" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB412 ,Active Status Bit 412" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB411 ,Active Status Bit 411" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB410 ,Active Status Bit 410" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB409 ,Active Status Bit 409" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB408 ,Active Status Bit 408" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB407 ,Active Status Bit 407" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB406 ,Active Status Bit 406" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB405 ,Active Status Bit 405" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB404 ,Active Status Bit 404" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB403 ,Active Status Bit 403" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB402 ,Active Status Bit 402" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB401 ,Active Status Bit 401" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB400 ,Active Status Bit 400" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB399 ,Active Status Bit 399" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB398 ,Active Status Bit 398" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB397 ,Active Status Bit 397" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB396 ,Active Status Bit 396" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB395 ,Active Status Bit 395" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB394 ,Active Status Bit 394" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB393 ,Active Status Bit 393" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB392 ,Active Status Bit 392" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB391 ,Active Status Bit 391" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB390 ,Active Status Bit 390" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB389 ,Active Status Bit 389" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB388 ,Active Status Bit 388" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB387 ,Active Status Bit 387" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB386 ,Active Status Bit 386" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB385 ,Active Status Bit 385" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB384 ,Active Status Bit 384" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0330++0x03
|
|
hide.long 0x0 "GICD_ICDABR12,Active Status Register 12"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0D)
|
|
rgroup.long 0x0334++0x03
|
|
line.long 0x0 "GICD_ICDABR13,Active Status Register 13"
|
|
bitfld.long 0x00 31. " ASB447 ,Active Status Bit 447" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB446 ,Active Status Bit 446" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB445 ,Active Status Bit 445" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB444 ,Active Status Bit 444" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB443 ,Active Status Bit 443" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB442 ,Active Status Bit 442" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB441 ,Active Status Bit 441" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB440 ,Active Status Bit 440" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB439 ,Active Status Bit 439" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB438 ,Active Status Bit 438" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB437 ,Active Status Bit 437" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB436 ,Active Status Bit 436" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB435 ,Active Status Bit 435" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB434 ,Active Status Bit 434" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB433 ,Active Status Bit 433" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB432 ,Active Status Bit 432" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB431 ,Active Status Bit 431" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB430 ,Active Status Bit 430" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB429 ,Active Status Bit 429" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB428 ,Active Status Bit 428" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB427 ,Active Status Bit 427" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB426 ,Active Status Bit 426" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB425 ,Active Status Bit 425" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB424 ,Active Status Bit 424" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB423 ,Active Status Bit 423" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB422 ,Active Status Bit 422" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB421 ,Active Status Bit 421" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB420 ,Active Status Bit 420" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB419 ,Active Status Bit 419" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB418 ,Active Status Bit 418" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB417 ,Active Status Bit 417" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB416 ,Active Status Bit 416" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0334++0x03
|
|
hide.long 0x0 "GICD_ICDABR13,Active Status Register 13"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0E)
|
|
rgroup.long 0x0338++0x03
|
|
line.long 0x0 "GICD_ICDABR14,Active Status Register 14"
|
|
bitfld.long 0x00 31. " ASB479 ,Active Status Bit 479" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB478 ,Active Status Bit 478" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB477 ,Active Status Bit 477" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB476 ,Active Status Bit 476" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB475 ,Active Status Bit 475" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB474 ,Active Status Bit 474" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB473 ,Active Status Bit 473" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB472 ,Active Status Bit 472" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB471 ,Active Status Bit 471" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB470 ,Active Status Bit 470" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB469 ,Active Status Bit 469" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB468 ,Active Status Bit 468" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB467 ,Active Status Bit 467" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB466 ,Active Status Bit 466" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB465 ,Active Status Bit 465" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB464 ,Active Status Bit 464" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB463 ,Active Status Bit 463" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB462 ,Active Status Bit 462" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB461 ,Active Status Bit 461" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB460 ,Active Status Bit 460" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB459 ,Active Status Bit 459" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB458 ,Active Status Bit 458" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB457 ,Active Status Bit 457" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB456 ,Active Status Bit 456" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB455 ,Active Status Bit 455" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB454 ,Active Status Bit 454" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB453 ,Active Status Bit 453" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB452 ,Active Status Bit 452" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB451 ,Active Status Bit 451" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB450 ,Active Status Bit 450" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB449 ,Active Status Bit 449" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB448 ,Active Status Bit 448" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0338++0x03
|
|
hide.long 0x0 "GICD_ICDABR14,Active Status Register 14"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0F)
|
|
rgroup.long 0x033C++0x03
|
|
line.long 0x0 "GICD_ICDABR15,Active Status Register 15"
|
|
bitfld.long 0x00 31. " ASB511 ,Active Status Bit 511" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB510 ,Active Status Bit 510" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB509 ,Active Status Bit 509" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB508 ,Active Status Bit 508" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB507 ,Active Status Bit 507" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB506 ,Active Status Bit 506" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB505 ,Active Status Bit 505" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB504 ,Active Status Bit 504" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB503 ,Active Status Bit 503" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB502 ,Active Status Bit 502" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB501 ,Active Status Bit 501" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB500 ,Active Status Bit 500" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB499 ,Active Status Bit 499" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB498 ,Active Status Bit 498" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB497 ,Active Status Bit 497" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB496 ,Active Status Bit 496" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB495 ,Active Status Bit 495" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB494 ,Active Status Bit 494" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB493 ,Active Status Bit 493" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB492 ,Active Status Bit 492" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB491 ,Active Status Bit 491" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB490 ,Active Status Bit 490" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB489 ,Active Status Bit 489" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB488 ,Active Status Bit 488" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB487 ,Active Status Bit 487" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB486 ,Active Status Bit 486" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB485 ,Active Status Bit 485" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB484 ,Active Status Bit 484" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB483 ,Active Status Bit 483" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB482 ,Active Status Bit 482" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB481 ,Active Status Bit 481" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB480 ,Active Status Bit 480" "Not active,Active"
|
|
else
|
|
hgroup.long 0x033C++0x03
|
|
hide.long 0x0 "GICD_ICDABR15,Active Status Register 15"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x10)
|
|
rgroup.long 0x0340++0x03
|
|
line.long 0x0 "GICD_ICDABR16,Active Status Register 16"
|
|
bitfld.long 0x00 31. " ASB543 ,Active Status Bit 543" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB542 ,Active Status Bit 542" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB541 ,Active Status Bit 541" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB540 ,Active Status Bit 540" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB539 ,Active Status Bit 539" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB538 ,Active Status Bit 538" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB537 ,Active Status Bit 537" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB536 ,Active Status Bit 536" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB535 ,Active Status Bit 535" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB534 ,Active Status Bit 534" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB533 ,Active Status Bit 533" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB532 ,Active Status Bit 532" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB531 ,Active Status Bit 531" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB530 ,Active Status Bit 530" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB529 ,Active Status Bit 529" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB528 ,Active Status Bit 528" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB527 ,Active Status Bit 527" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB526 ,Active Status Bit 526" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB525 ,Active Status Bit 525" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB524 ,Active Status Bit 524" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB523 ,Active Status Bit 523" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB522 ,Active Status Bit 522" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB521 ,Active Status Bit 521" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB520 ,Active Status Bit 520" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB519 ,Active Status Bit 519" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB518 ,Active Status Bit 518" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB517 ,Active Status Bit 517" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB516 ,Active Status Bit 516" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB515 ,Active Status Bit 515" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB514 ,Active Status Bit 514" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB513 ,Active Status Bit 513" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB512 ,Active Status Bit 512" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0340++0x03
|
|
hide.long 0x0 "GICD_ICDABR16,Active Status Register 16"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x11)
|
|
rgroup.long 0x0344++0x03
|
|
line.long 0x0 "GICD_ICDABR17,Active Status Register 17"
|
|
bitfld.long 0x00 31. " ASB575 ,Active Status Bit 575" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB574 ,Active Status Bit 574" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB573 ,Active Status Bit 573" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB572 ,Active Status Bit 572" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB571 ,Active Status Bit 571" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB570 ,Active Status Bit 570" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB569 ,Active Status Bit 569" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB568 ,Active Status Bit 568" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB567 ,Active Status Bit 567" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB566 ,Active Status Bit 566" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB565 ,Active Status Bit 565" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB564 ,Active Status Bit 564" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB563 ,Active Status Bit 563" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB562 ,Active Status Bit 562" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB561 ,Active Status Bit 561" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB560 ,Active Status Bit 560" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB559 ,Active Status Bit 559" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB558 ,Active Status Bit 558" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB557 ,Active Status Bit 557" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB556 ,Active Status Bit 556" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB555 ,Active Status Bit 555" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB554 ,Active Status Bit 554" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB553 ,Active Status Bit 553" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB552 ,Active Status Bit 552" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB551 ,Active Status Bit 551" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB550 ,Active Status Bit 550" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB549 ,Active Status Bit 549" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB548 ,Active Status Bit 548" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB547 ,Active Status Bit 547" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB546 ,Active Status Bit 546" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB545 ,Active Status Bit 545" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB544 ,Active Status Bit 544" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0344++0x03
|
|
hide.long 0x0 "GICD_ICDABR17,Active Status Register 17"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x12)
|
|
rgroup.long 0x0348++0x03
|
|
line.long 0x0 "GICD_ICDABR18,Active Status Register 18"
|
|
bitfld.long 0x00 31. " ASB607 ,Active Status Bit 607" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB606 ,Active Status Bit 606" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB605 ,Active Status Bit 605" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB604 ,Active Status Bit 604" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB603 ,Active Status Bit 603" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB602 ,Active Status Bit 602" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB601 ,Active Status Bit 601" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB600 ,Active Status Bit 600" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB599 ,Active Status Bit 599" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB598 ,Active Status Bit 598" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB597 ,Active Status Bit 597" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB596 ,Active Status Bit 596" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB595 ,Active Status Bit 595" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB594 ,Active Status Bit 594" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB593 ,Active Status Bit 593" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB592 ,Active Status Bit 592" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB591 ,Active Status Bit 591" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB590 ,Active Status Bit 590" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB589 ,Active Status Bit 589" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB588 ,Active Status Bit 588" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB587 ,Active Status Bit 587" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB586 ,Active Status Bit 586" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB585 ,Active Status Bit 585" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB584 ,Active Status Bit 584" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB583 ,Active Status Bit 583" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB582 ,Active Status Bit 582" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB581 ,Active Status Bit 581" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB580 ,Active Status Bit 580" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB579 ,Active Status Bit 579" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB578 ,Active Status Bit 578" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB577 ,Active Status Bit 577" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB576 ,Active Status Bit 576" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0348++0x03
|
|
hide.long 0x0 "GICD_ICDABR18,Active Status Register 18"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x13)
|
|
rgroup.long 0x034C++0x03
|
|
line.long 0x0 "GICD_ICDABR19,Active Status Register 19"
|
|
bitfld.long 0x00 31. " ASB639 ,Active Status Bit 639" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB638 ,Active Status Bit 638" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB637 ,Active Status Bit 637" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB636 ,Active Status Bit 636" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB635 ,Active Status Bit 635" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB634 ,Active Status Bit 634" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB633 ,Active Status Bit 633" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB632 ,Active Status Bit 632" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB631 ,Active Status Bit 631" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB630 ,Active Status Bit 630" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB629 ,Active Status Bit 629" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB628 ,Active Status Bit 628" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB627 ,Active Status Bit 627" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB626 ,Active Status Bit 626" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB625 ,Active Status Bit 625" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB624 ,Active Status Bit 624" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB623 ,Active Status Bit 623" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB622 ,Active Status Bit 622" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB621 ,Active Status Bit 621" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB620 ,Active Status Bit 620" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB619 ,Active Status Bit 619" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB618 ,Active Status Bit 618" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB617 ,Active Status Bit 617" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB616 ,Active Status Bit 616" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB615 ,Active Status Bit 615" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB614 ,Active Status Bit 614" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB613 ,Active Status Bit 613" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB612 ,Active Status Bit 612" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB611 ,Active Status Bit 611" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB610 ,Active Status Bit 610" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB609 ,Active Status Bit 609" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB608 ,Active Status Bit 608" "Not active,Active"
|
|
else
|
|
hgroup.long 0x034C++0x03
|
|
hide.long 0x0 "GICD_ICDABR19,Active Status Register 19"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x14)
|
|
rgroup.long 0x0350++0x03
|
|
line.long 0x0 "GICD_ICDABR20,Active Status Register 20"
|
|
bitfld.long 0x00 31. " ASB671 ,Active Status Bit 671" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB670 ,Active Status Bit 670" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB669 ,Active Status Bit 669" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB668 ,Active Status Bit 668" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB667 ,Active Status Bit 667" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB666 ,Active Status Bit 666" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB665 ,Active Status Bit 665" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB664 ,Active Status Bit 664" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB663 ,Active Status Bit 663" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB662 ,Active Status Bit 662" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB661 ,Active Status Bit 661" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB660 ,Active Status Bit 660" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB659 ,Active Status Bit 659" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB658 ,Active Status Bit 658" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB657 ,Active Status Bit 657" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB656 ,Active Status Bit 656" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB655 ,Active Status Bit 655" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB654 ,Active Status Bit 654" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB653 ,Active Status Bit 653" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB652 ,Active Status Bit 652" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB651 ,Active Status Bit 651" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB650 ,Active Status Bit 650" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB649 ,Active Status Bit 649" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB648 ,Active Status Bit 648" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB647 ,Active Status Bit 647" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB646 ,Active Status Bit 646" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB645 ,Active Status Bit 645" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB644 ,Active Status Bit 644" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB643 ,Active Status Bit 643" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB642 ,Active Status Bit 642" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB641 ,Active Status Bit 641" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB640 ,Active Status Bit 640" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0350++0x03
|
|
hide.long 0x0 "GICD_ICDABR20,Active Status Register 20"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x15)
|
|
rgroup.long 0x0354++0x03
|
|
line.long 0x0 "GICD_ICDABR21,Active Status Register 21"
|
|
bitfld.long 0x00 31. " ASB703 ,Active Status Bit 703" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB702 ,Active Status Bit 702" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB701 ,Active Status Bit 701" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB700 ,Active Status Bit 700" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB699 ,Active Status Bit 699" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB698 ,Active Status Bit 698" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB697 ,Active Status Bit 697" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB696 ,Active Status Bit 696" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB695 ,Active Status Bit 695" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB694 ,Active Status Bit 694" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB693 ,Active Status Bit 693" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB692 ,Active Status Bit 692" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB691 ,Active Status Bit 691" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB690 ,Active Status Bit 690" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB689 ,Active Status Bit 689" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB688 ,Active Status Bit 688" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB687 ,Active Status Bit 687" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB686 ,Active Status Bit 686" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB685 ,Active Status Bit 685" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB684 ,Active Status Bit 684" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB683 ,Active Status Bit 683" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB682 ,Active Status Bit 682" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB681 ,Active Status Bit 681" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB680 ,Active Status Bit 680" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB679 ,Active Status Bit 679" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB678 ,Active Status Bit 678" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB677 ,Active Status Bit 677" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB676 ,Active Status Bit 676" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB675 ,Active Status Bit 675" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB674 ,Active Status Bit 674" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB673 ,Active Status Bit 673" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB672 ,Active Status Bit 672" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0354++0x03
|
|
hide.long 0x0 "GICD_ICDABR21,Active Status Register 21"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x16)
|
|
rgroup.long 0x0358++0x03
|
|
line.long 0x0 "GICD_ICDABR22,Active Status Register 22"
|
|
bitfld.long 0x00 31. " ASB735 ,Active Status Bit 735" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB734 ,Active Status Bit 734" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB733 ,Active Status Bit 733" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB732 ,Active Status Bit 732" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB731 ,Active Status Bit 731" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB730 ,Active Status Bit 730" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB729 ,Active Status Bit 729" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB728 ,Active Status Bit 728" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB727 ,Active Status Bit 727" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB726 ,Active Status Bit 726" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB725 ,Active Status Bit 725" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB724 ,Active Status Bit 724" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB723 ,Active Status Bit 723" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB722 ,Active Status Bit 722" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB721 ,Active Status Bit 721" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB720 ,Active Status Bit 720" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB719 ,Active Status Bit 719" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB718 ,Active Status Bit 718" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB717 ,Active Status Bit 717" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB716 ,Active Status Bit 716" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB715 ,Active Status Bit 715" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB714 ,Active Status Bit 714" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB713 ,Active Status Bit 713" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB712 ,Active Status Bit 712" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB711 ,Active Status Bit 711" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB710 ,Active Status Bit 710" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB709 ,Active Status Bit 709" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB708 ,Active Status Bit 708" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB707 ,Active Status Bit 707" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB706 ,Active Status Bit 706" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB705 ,Active Status Bit 705" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB704 ,Active Status Bit 704" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0358++0x03
|
|
hide.long 0x0 "GICD_ICDABR22,Active Status Register 22"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x17)
|
|
rgroup.long 0x035C++0x03
|
|
line.long 0x0 "GICD_ICDABR23,Active Status Register 23"
|
|
bitfld.long 0x00 31. " ASB767 ,Active Status Bit 767" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB766 ,Active Status Bit 766" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB765 ,Active Status Bit 765" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB764 ,Active Status Bit 764" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB763 ,Active Status Bit 763" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB762 ,Active Status Bit 762" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB761 ,Active Status Bit 761" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB760 ,Active Status Bit 760" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB759 ,Active Status Bit 759" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB758 ,Active Status Bit 758" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB757 ,Active Status Bit 757" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB756 ,Active Status Bit 756" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB755 ,Active Status Bit 755" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB754 ,Active Status Bit 754" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB753 ,Active Status Bit 753" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB752 ,Active Status Bit 752" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB751 ,Active Status Bit 751" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB750 ,Active Status Bit 750" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB749 ,Active Status Bit 749" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB748 ,Active Status Bit 748" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB747 ,Active Status Bit 747" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB746 ,Active Status Bit 746" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB745 ,Active Status Bit 745" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB744 ,Active Status Bit 744" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB743 ,Active Status Bit 743" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB742 ,Active Status Bit 742" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB741 ,Active Status Bit 741" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB740 ,Active Status Bit 740" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB739 ,Active Status Bit 739" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB738 ,Active Status Bit 738" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB737 ,Active Status Bit 737" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB736 ,Active Status Bit 736" "Not active,Active"
|
|
else
|
|
hgroup.long 0x035C++0x03
|
|
hide.long 0x0 "GICD_ICDABR23,Active Status Register 23"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x18)
|
|
rgroup.long 0x0360++0x03
|
|
line.long 0x0 "GICD_ICDABR24,Active Status Register 24"
|
|
bitfld.long 0x00 31. " ASB799 ,Active Status Bit 799" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB798 ,Active Status Bit 798" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB797 ,Active Status Bit 797" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB796 ,Active Status Bit 796" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB795 ,Active Status Bit 795" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB794 ,Active Status Bit 794" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB793 ,Active Status Bit 793" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB792 ,Active Status Bit 792" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB791 ,Active Status Bit 791" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB790 ,Active Status Bit 790" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB789 ,Active Status Bit 789" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB788 ,Active Status Bit 788" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB787 ,Active Status Bit 787" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB786 ,Active Status Bit 786" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB785 ,Active Status Bit 785" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB784 ,Active Status Bit 784" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB783 ,Active Status Bit 783" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB782 ,Active Status Bit 782" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB781 ,Active Status Bit 781" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB780 ,Active Status Bit 780" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB779 ,Active Status Bit 779" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB778 ,Active Status Bit 778" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB777 ,Active Status Bit 777" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB776 ,Active Status Bit 776" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB775 ,Active Status Bit 775" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB774 ,Active Status Bit 774" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB773 ,Active Status Bit 773" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB772 ,Active Status Bit 772" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB771 ,Active Status Bit 771" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB770 ,Active Status Bit 770" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB769 ,Active Status Bit 769" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB768 ,Active Status Bit 768" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0360++0x03
|
|
hide.long 0x0 "GICD_ICDABR24,Active Status Register 24"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x19)
|
|
rgroup.long 0x0364++0x03
|
|
line.long 0x0 "GICD_ICDABR25,Active Status Register 25"
|
|
bitfld.long 0x00 31. " ASB831 ,Active Status Bit 831" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB830 ,Active Status Bit 830" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB829 ,Active Status Bit 829" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB828 ,Active Status Bit 828" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB827 ,Active Status Bit 827" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB826 ,Active Status Bit 826" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB825 ,Active Status Bit 825" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB824 ,Active Status Bit 824" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB823 ,Active Status Bit 823" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB822 ,Active Status Bit 822" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB821 ,Active Status Bit 821" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB820 ,Active Status Bit 820" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB819 ,Active Status Bit 819" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB818 ,Active Status Bit 818" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB817 ,Active Status Bit 817" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB816 ,Active Status Bit 816" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB815 ,Active Status Bit 815" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB814 ,Active Status Bit 814" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB813 ,Active Status Bit 813" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB812 ,Active Status Bit 812" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB811 ,Active Status Bit 811" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB810 ,Active Status Bit 810" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB809 ,Active Status Bit 809" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB808 ,Active Status Bit 808" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB807 ,Active Status Bit 807" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB806 ,Active Status Bit 806" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB805 ,Active Status Bit 805" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB804 ,Active Status Bit 804" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB803 ,Active Status Bit 803" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB802 ,Active Status Bit 802" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB801 ,Active Status Bit 801" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB800 ,Active Status Bit 800" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0364++0x03
|
|
hide.long 0x0 "GICD_ICDABR25,Active Status Register 25"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1A)
|
|
rgroup.long 0x0368++0x03
|
|
line.long 0x0 "GICD_ICDABR26,Active Status Register 26"
|
|
bitfld.long 0x00 31. " ASB863 ,Active Status Bit 863" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB862 ,Active Status Bit 862" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB861 ,Active Status Bit 861" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB860 ,Active Status Bit 860" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB859 ,Active Status Bit 859" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB858 ,Active Status Bit 858" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB857 ,Active Status Bit 857" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB856 ,Active Status Bit 856" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB855 ,Active Status Bit 855" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB854 ,Active Status Bit 854" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB853 ,Active Status Bit 853" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB852 ,Active Status Bit 852" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB851 ,Active Status Bit 851" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB850 ,Active Status Bit 850" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB849 ,Active Status Bit 849" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB848 ,Active Status Bit 848" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB847 ,Active Status Bit 847" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB846 ,Active Status Bit 846" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB845 ,Active Status Bit 845" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB844 ,Active Status Bit 844" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB843 ,Active Status Bit 843" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB842 ,Active Status Bit 842" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB841 ,Active Status Bit 841" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB840 ,Active Status Bit 840" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB839 ,Active Status Bit 839" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB838 ,Active Status Bit 838" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB837 ,Active Status Bit 837" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB836 ,Active Status Bit 836" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB835 ,Active Status Bit 835" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB834 ,Active Status Bit 834" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB833 ,Active Status Bit 833" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB832 ,Active Status Bit 832" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0368++0x03
|
|
hide.long 0x0 "GICD_ICDABR26,Active Status Register 26"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1B)
|
|
rgroup.long 0x036C++0x03
|
|
line.long 0x0 "GICD_ICDABR27,Active Status Register 27"
|
|
bitfld.long 0x00 31. " ASB895 ,Active Status Bit 895" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB894 ,Active Status Bit 894" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB893 ,Active Status Bit 893" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB892 ,Active Status Bit 892" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB891 ,Active Status Bit 891" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB890 ,Active Status Bit 890" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB889 ,Active Status Bit 889" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB888 ,Active Status Bit 888" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB887 ,Active Status Bit 887" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB886 ,Active Status Bit 886" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB885 ,Active Status Bit 885" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB884 ,Active Status Bit 884" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB883 ,Active Status Bit 883" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB882 ,Active Status Bit 882" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB881 ,Active Status Bit 881" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB880 ,Active Status Bit 880" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB879 ,Active Status Bit 879" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB878 ,Active Status Bit 878" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB877 ,Active Status Bit 877" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB876 ,Active Status Bit 876" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB875 ,Active Status Bit 875" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB874 ,Active Status Bit 874" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB873 ,Active Status Bit 873" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB872 ,Active Status Bit 872" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB871 ,Active Status Bit 871" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB870 ,Active Status Bit 870" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB869 ,Active Status Bit 869" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB868 ,Active Status Bit 868" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB867 ,Active Status Bit 867" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB866 ,Active Status Bit 866" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB865 ,Active Status Bit 865" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB864 ,Active Status Bit 864" "Not active,Active"
|
|
else
|
|
hgroup.long 0x036C++0x03
|
|
hide.long 0x0 "GICD_ICDABR27,Active Status Register 27"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1C)
|
|
rgroup.long 0x0370++0x03
|
|
line.long 0x0 "GICD_ICDABR28,Active Status Register 28"
|
|
bitfld.long 0x00 31. " ASB927 ,Active Status Bit 927" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB926 ,Active Status Bit 926" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB925 ,Active Status Bit 925" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB924 ,Active Status Bit 924" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB923 ,Active Status Bit 923" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB922 ,Active Status Bit 922" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB921 ,Active Status Bit 921" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB920 ,Active Status Bit 920" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB919 ,Active Status Bit 919" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB918 ,Active Status Bit 918" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB917 ,Active Status Bit 917" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB916 ,Active Status Bit 916" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB915 ,Active Status Bit 915" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB914 ,Active Status Bit 914" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB913 ,Active Status Bit 913" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB912 ,Active Status Bit 912" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB911 ,Active Status Bit 911" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB910 ,Active Status Bit 910" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB909 ,Active Status Bit 909" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB908 ,Active Status Bit 908" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB907 ,Active Status Bit 907" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB906 ,Active Status Bit 906" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB905 ,Active Status Bit 905" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB904 ,Active Status Bit 904" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB903 ,Active Status Bit 903" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB902 ,Active Status Bit 902" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB901 ,Active Status Bit 901" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB900 ,Active Status Bit 900" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB899 ,Active Status Bit 899" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB898 ,Active Status Bit 898" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB897 ,Active Status Bit 897" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB896 ,Active Status Bit 896" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0370++0x03
|
|
hide.long 0x0 "GICD_ICDABR28,Active Status Register 28"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1D)
|
|
rgroup.long 0x0374++0x03
|
|
line.long 0x0 "GICD_ICDABR29,Active Status Register 29"
|
|
bitfld.long 0x00 31. " ASB959 ,Active Status Bit 959" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB958 ,Active Status Bit 958" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB957 ,Active Status Bit 957" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB956 ,Active Status Bit 956" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB955 ,Active Status Bit 955" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB954 ,Active Status Bit 954" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB953 ,Active Status Bit 953" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB952 ,Active Status Bit 952" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB951 ,Active Status Bit 951" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB950 ,Active Status Bit 950" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB949 ,Active Status Bit 949" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB948 ,Active Status Bit 948" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB947 ,Active Status Bit 947" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB946 ,Active Status Bit 946" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB945 ,Active Status Bit 945" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB944 ,Active Status Bit 944" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB943 ,Active Status Bit 943" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB942 ,Active Status Bit 942" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB941 ,Active Status Bit 941" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB940 ,Active Status Bit 940" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB939 ,Active Status Bit 939" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB938 ,Active Status Bit 938" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB937 ,Active Status Bit 937" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB936 ,Active Status Bit 936" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB935 ,Active Status Bit 935" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB934 ,Active Status Bit 934" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB933 ,Active Status Bit 933" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB932 ,Active Status Bit 932" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB931 ,Active Status Bit 931" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB930 ,Active Status Bit 930" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB929 ,Active Status Bit 929" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB928 ,Active Status Bit 928" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0374++0x03
|
|
hide.long 0x0 "GICD_ICDABR29,Active Status Register 29"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1E)
|
|
rgroup.long 0x0378++0x03
|
|
line.long 0x0 "GICD_ICDABR30,Active Status Register 30"
|
|
bitfld.long 0x00 31. " ASB991 ,Active Status Bit 991" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB990 ,Active Status Bit 990" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB989 ,Active Status Bit 989" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB988 ,Active Status Bit 988" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB987 ,Active Status Bit 987" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB986 ,Active Status Bit 986" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB985 ,Active Status Bit 985" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB984 ,Active Status Bit 984" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB983 ,Active Status Bit 983" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB982 ,Active Status Bit 982" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB981 ,Active Status Bit 981" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB980 ,Active Status Bit 980" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB979 ,Active Status Bit 979" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB978 ,Active Status Bit 978" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB977 ,Active Status Bit 977" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB976 ,Active Status Bit 976" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB975 ,Active Status Bit 975" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB974 ,Active Status Bit 974" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB973 ,Active Status Bit 973" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB972 ,Active Status Bit 972" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB971 ,Active Status Bit 971" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB970 ,Active Status Bit 970" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB969 ,Active Status Bit 969" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB968 ,Active Status Bit 968" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB967 ,Active Status Bit 967" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB966 ,Active Status Bit 966" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB965 ,Active Status Bit 965" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB964 ,Active Status Bit 964" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB963 ,Active Status Bit 963" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB962 ,Active Status Bit 962" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB961 ,Active Status Bit 961" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB960 ,Active Status Bit 960" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0378++0x03
|
|
hide.long 0x0 "GICD_ICDABR30,Active Status Register 30"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)==0x1F)
|
|
rgroup.long 0x037C++0x03
|
|
line.long 0x0 "GICD_ICDABR31,Active Status Register 31"
|
|
bitfld.long 0x00 27. " ASB1019 ,Active Status Bit 1019" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB1018 ,Active Status Bit 1018" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB1017 ,Active Status Bit 1017" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB1016 ,Active Status Bit 1016" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB1015 ,Active Status Bit 1015" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB1014 ,Active Status Bit 1014" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB1013 ,Active Status Bit 1013" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB1012 ,Active Status Bit 1012" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB1011 ,Active Status Bit 1011" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB1010 ,Active Status Bit 1010" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB1009 ,Active Status Bit 1009" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB1008 ,Active Status Bit 1008" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB1007 ,Active Status Bit 1007" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB1006 ,Active Status Bit 1006" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB1005 ,Active Status Bit 1005" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB1004 ,Active Status Bit 1004" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB1003 ,Active Status Bit 1003" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB1002 ,Active Status Bit 1002" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB1001 ,Active Status Bit 1001" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB1000 ,Active Status Bit 1000" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB999 ,Active Status Bit 999" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB998 ,Active Status Bit 998" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB997 ,Active Status Bit 997" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB996 ,Active Status Bit 996" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB995 ,Active Status Bit 995" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB994 ,Active Status Bit 994" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB993 ,Active Status Bit 993" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB992 ,Active Status Bit 992" "Not active,Active"
|
|
else
|
|
hgroup.long 0x037C++0x03
|
|
hide.long 0x0 "GICD_ICDABR31,Active Status Register 31"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 20.
|
|
tree "Priority Registers"
|
|
group.long 0x400++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR0,Interrupt Priority Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID3 ,Interrupt ID3 Priority/Priority Byte Offset 3 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID2 ,Interrupt ID2 Priority/Priority Byte Offset 2 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1 ,Interrupt ID1 Priority/Priority Byte Offset 1 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID0 ,Interrupt ID0 Priority/Priority Byte Offset 0 "
|
|
group.long 0x404++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR1,Interrupt Priority Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID7 ,Interrupt ID7 Priority/Priority Byte Offset 7 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID6 ,Interrupt ID6 Priority/Priority Byte Offset 6 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID5 ,Interrupt ID5 Priority/Priority Byte Offset 5 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID4 ,Interrupt ID4 Priority/Priority Byte Offset 4 "
|
|
group.long 0x408++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR2,Interrupt Priority Register 2"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID11 ,Interrupt ID11 Priority/Priority Byte Offset 11 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID10 ,Interrupt ID10 Priority/Priority Byte Offset 10 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID9 ,Interrupt ID9 Priority/Priority Byte Offset 9 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID8 ,Interrupt ID8 Priority/Priority Byte Offset 8 "
|
|
group.long 0x40C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR3,Interrupt Priority Register 3"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID15 ,Interrupt ID15 Priority/Priority Byte Offset 15 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID14 ,Interrupt ID14 Priority/Priority Byte Offset 14 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID13 ,Interrupt ID13 Priority/Priority Byte Offset 13 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID12 ,Interrupt ID12 Priority/Priority Byte Offset 12 "
|
|
group.long 0x410++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR4,Interrupt Priority Register 4"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID19 ,Interrupt ID19 Priority/Priority Byte Offset 19 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID18 ,Interrupt ID18 Priority/Priority Byte Offset 18 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID17 ,Interrupt ID17 Priority/Priority Byte Offset 17 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID16 ,Interrupt ID16 Priority/Priority Byte Offset 16 "
|
|
group.long 0x414++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR5,Interrupt Priority Register 5"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID23 ,Interrupt ID23 Priority/Priority Byte Offset 23 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID22 ,Interrupt ID22 Priority/Priority Byte Offset 22 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID21 ,Interrupt ID21 Priority/Priority Byte Offset 21 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID20 ,Interrupt ID20 Priority/Priority Byte Offset 20 "
|
|
group.long 0x418++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR6,Interrupt Priority Register 6"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID27 ,Interrupt ID27 Priority/Priority Byte Offset 27 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID26 ,Interrupt ID26 Priority/Priority Byte Offset 26 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID25 ,Interrupt ID25 Priority/Priority Byte Offset 25 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID24 ,Interrupt ID24 Priority/Priority Byte Offset 24 "
|
|
group.long 0x41C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR7,Interrupt Priority Register 7"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID31 ,Interrupt ID31 Priority/Priority Byte Offset 31 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID30 ,Interrupt ID30 Priority/Priority Byte Offset 30 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID29 ,Interrupt ID29 Priority/Priority Byte Offset 29 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID28 ,Interrupt ID28 Priority/Priority Byte Offset 28 "
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x01)
|
|
group.long 0x420++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID35 ,Interrupt ID35 Priority/Priority Byte Offset 35 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID34 ,Interrupt ID34 Priority/Priority Byte Offset 34 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID33 ,Interrupt ID33 Priority/Priority Byte Offset 33 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID32 ,Interrupt ID32 Priority/Priority Byte Offset 32 "
|
|
group.long 0x424++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID39 ,Interrupt ID39 Priority/Priority Byte Offset 39 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID38 ,Interrupt ID38 Priority/Priority Byte Offset 38 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID37 ,Interrupt ID37 Priority/Priority Byte Offset 37 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID36 ,Interrupt ID36 Priority/Priority Byte Offset 36 "
|
|
group.long 0x428++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID43 ,Interrupt ID43 Priority/Priority Byte Offset 43 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID42 ,Interrupt ID42 Priority/Priority Byte Offset 42 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID41 ,Interrupt ID41 Priority/Priority Byte Offset 41 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID40 ,Interrupt ID40 Priority/Priority Byte Offset 40 "
|
|
group.long 0x42C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID47 ,Interrupt ID47 Priority/Priority Byte Offset 47 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID46 ,Interrupt ID46 Priority/Priority Byte Offset 46 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID45 ,Interrupt ID45 Priority/Priority Byte Offset 45 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID44 ,Interrupt ID44 Priority/Priority Byte Offset 44 "
|
|
group.long 0x430++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID51 ,Interrupt ID51 Priority/Priority Byte Offset 51 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID50 ,Interrupt ID50 Priority/Priority Byte Offset 50 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID49 ,Interrupt ID49 Priority/Priority Byte Offset 49 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID48 ,Interrupt ID48 Priority/Priority Byte Offset 48 "
|
|
group.long 0x434++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID55 ,Interrupt ID55 Priority/Priority Byte Offset 55 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID54 ,Interrupt ID54 Priority/Priority Byte Offset 54 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID53 ,Interrupt ID53 Priority/Priority Byte Offset 53 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID52 ,Interrupt ID52 Priority/Priority Byte Offset 52 "
|
|
group.long 0x438++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID59 ,Interrupt ID59 Priority/Priority Byte Offset 59 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID58 ,Interrupt ID58 Priority/Priority Byte Offset 58 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID57 ,Interrupt ID57 Priority/Priority Byte Offset 57 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID56 ,Interrupt ID56 Priority/Priority Byte Offset 56 "
|
|
group.long 0x43C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID63 ,Interrupt ID63 Priority/Priority Byte Offset 63 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID62 ,Interrupt ID62 Priority/Priority Byte Offset 62 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID61 ,Interrupt ID61 Priority/Priority Byte Offset 61 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID60 ,Interrupt ID60 Priority/Priority Byte Offset 60 "
|
|
else
|
|
hgroup.long 0x420++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8"
|
|
hgroup.long 0x424++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9"
|
|
hgroup.long 0x428++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10"
|
|
hgroup.long 0x42C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11"
|
|
hgroup.long 0x430++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12"
|
|
hgroup.long 0x434++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13"
|
|
hgroup.long 0x438++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14"
|
|
hgroup.long 0x43C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x02)
|
|
group.long 0x440++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID67 ,Interrupt ID67 Priority/Priority Byte Offset 67 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID66 ,Interrupt ID66 Priority/Priority Byte Offset 66 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID65 ,Interrupt ID65 Priority/Priority Byte Offset 65 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID64 ,Interrupt ID64 Priority/Priority Byte Offset 64 "
|
|
group.long 0x444++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID71 ,Interrupt ID71 Priority/Priority Byte Offset 71 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID70 ,Interrupt ID70 Priority/Priority Byte Offset 70 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID69 ,Interrupt ID69 Priority/Priority Byte Offset 69 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID68 ,Interrupt ID68 Priority/Priority Byte Offset 68 "
|
|
group.long 0x448++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID75 ,Interrupt ID75 Priority/Priority Byte Offset 75 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID74 ,Interrupt ID74 Priority/Priority Byte Offset 74 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID73 ,Interrupt ID73 Priority/Priority Byte Offset 73 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID72 ,Interrupt ID72 Priority/Priority Byte Offset 72 "
|
|
group.long 0x44C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID79 ,Interrupt ID79 Priority/Priority Byte Offset 79 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID78 ,Interrupt ID78 Priority/Priority Byte Offset 78 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID77 ,Interrupt ID77 Priority/Priority Byte Offset 77 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID76 ,Interrupt ID76 Priority/Priority Byte Offset 76 "
|
|
group.long 0x450++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID83 ,Interrupt ID83 Priority/Priority Byte Offset 83 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID82 ,Interrupt ID82 Priority/Priority Byte Offset 82 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID81 ,Interrupt ID81 Priority/Priority Byte Offset 81 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID80 ,Interrupt ID80 Priority/Priority Byte Offset 80 "
|
|
group.long 0x454++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID87 ,Interrupt ID87 Priority/Priority Byte Offset 87 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID86 ,Interrupt ID86 Priority/Priority Byte Offset 86 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID85 ,Interrupt ID85 Priority/Priority Byte Offset 85 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID84 ,Interrupt ID84 Priority/Priority Byte Offset 84 "
|
|
group.long 0x458++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID91 ,Interrupt ID91 Priority/Priority Byte Offset 91 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID90 ,Interrupt ID90 Priority/Priority Byte Offset 90 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID89 ,Interrupt ID89 Priority/Priority Byte Offset 89 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID88 ,Interrupt ID88 Priority/Priority Byte Offset 88 "
|
|
group.long 0x45C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID95 ,Interrupt ID95 Priority/Priority Byte Offset 95 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID94 ,Interrupt ID94 Priority/Priority Byte Offset 94 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID93 ,Interrupt ID93 Priority/Priority Byte Offset 93 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID92 ,Interrupt ID92 Priority/Priority Byte Offset 92 "
|
|
else
|
|
hgroup.long 0x440++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16"
|
|
hgroup.long 0x444++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17"
|
|
hgroup.long 0x448++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18"
|
|
hgroup.long 0x44C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19"
|
|
hgroup.long 0x450++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20"
|
|
hgroup.long 0x454++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21"
|
|
hgroup.long 0x458++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22"
|
|
hgroup.long 0x45C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x03)
|
|
group.long 0x460++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID99 ,Interrupt ID99 Priority/Priority Byte Offset 99 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID98 ,Interrupt ID98 Priority/Priority Byte Offset 98 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID97 ,Interrupt ID97 Priority/Priority Byte Offset 97 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID96 ,Interrupt ID96 Priority/Priority Byte Offset 96 "
|
|
group.long 0x464++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID103 ,Interrupt ID103 Priority/Priority Byte Offset 103 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID102 ,Interrupt ID102 Priority/Priority Byte Offset 102 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID101 ,Interrupt ID101 Priority/Priority Byte Offset 101 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID100 ,Interrupt ID100 Priority/Priority Byte Offset 100 "
|
|
group.long 0x468++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID107 ,Interrupt ID107 Priority/Priority Byte Offset 107 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID106 ,Interrupt ID106 Priority/Priority Byte Offset 106 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID105 ,Interrupt ID105 Priority/Priority Byte Offset 105 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID104 ,Interrupt ID104 Priority/Priority Byte Offset 104 "
|
|
group.long 0x46C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID111 ,Interrupt ID111 Priority/Priority Byte Offset 111 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID110 ,Interrupt ID110 Priority/Priority Byte Offset 110 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID109 ,Interrupt ID109 Priority/Priority Byte Offset 109 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID108 ,Interrupt ID108 Priority/Priority Byte Offset 108 "
|
|
group.long 0x470++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID115 ,Interrupt ID115 Priority/Priority Byte Offset 115 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID114 ,Interrupt ID114 Priority/Priority Byte Offset 114 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID113 ,Interrupt ID113 Priority/Priority Byte Offset 113 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID112 ,Interrupt ID112 Priority/Priority Byte Offset 112 "
|
|
group.long 0x474++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID119 ,Interrupt ID119 Priority/Priority Byte Offset 119 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID118 ,Interrupt ID118 Priority/Priority Byte Offset 118 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID117 ,Interrupt ID117 Priority/Priority Byte Offset 117 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID116 ,Interrupt ID116 Priority/Priority Byte Offset 116 "
|
|
group.long 0x478++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID123 ,Interrupt ID123 Priority/Priority Byte Offset 123 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID122 ,Interrupt ID122 Priority/Priority Byte Offset 122 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID121 ,Interrupt ID121 Priority/Priority Byte Offset 121 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID120 ,Interrupt ID120 Priority/Priority Byte Offset 120 "
|
|
group.long 0x47C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID127 ,Interrupt ID127 Priority/Priority Byte Offset 127 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID126 ,Interrupt ID126 Priority/Priority Byte Offset 126 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID125 ,Interrupt ID125 Priority/Priority Byte Offset 125 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID124 ,Interrupt ID124 Priority/Priority Byte Offset 124 "
|
|
else
|
|
hgroup.long 0x460++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24"
|
|
hgroup.long 0x464++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25"
|
|
hgroup.long 0x468++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26"
|
|
hgroup.long 0x46C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27"
|
|
hgroup.long 0x470++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28"
|
|
hgroup.long 0x474++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29"
|
|
hgroup.long 0x478++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30"
|
|
hgroup.long 0x47C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x04)
|
|
group.long 0x480++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID131 ,Interrupt ID131 Priority/Priority Byte Offset 131 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID130 ,Interrupt ID130 Priority/Priority Byte Offset 130 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID129 ,Interrupt ID129 Priority/Priority Byte Offset 129 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID128 ,Interrupt ID128 Priority/Priority Byte Offset 128 "
|
|
group.long 0x484++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID135 ,Interrupt ID135 Priority/Priority Byte Offset 135 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID134 ,Interrupt ID134 Priority/Priority Byte Offset 134 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID133 ,Interrupt ID133 Priority/Priority Byte Offset 133 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID132 ,Interrupt ID132 Priority/Priority Byte Offset 132 "
|
|
group.long 0x488++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID139 ,Interrupt ID139 Priority/Priority Byte Offset 139 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID138 ,Interrupt ID138 Priority/Priority Byte Offset 138 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID137 ,Interrupt ID137 Priority/Priority Byte Offset 137 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID136 ,Interrupt ID136 Priority/Priority Byte Offset 136 "
|
|
group.long 0x48C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID143 ,Interrupt ID143 Priority/Priority Byte Offset 143 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID142 ,Interrupt ID142 Priority/Priority Byte Offset 142 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID141 ,Interrupt ID141 Priority/Priority Byte Offset 141 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID140 ,Interrupt ID140 Priority/Priority Byte Offset 140 "
|
|
group.long 0x490++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID147 ,Interrupt ID147 Priority/Priority Byte Offset 147 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID146 ,Interrupt ID146 Priority/Priority Byte Offset 146 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID145 ,Interrupt ID145 Priority/Priority Byte Offset 145 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID144 ,Interrupt ID144 Priority/Priority Byte Offset 144 "
|
|
group.long 0x494++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID151 ,Interrupt ID151 Priority/Priority Byte Offset 151 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID150 ,Interrupt ID150 Priority/Priority Byte Offset 150 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID149 ,Interrupt ID149 Priority/Priority Byte Offset 149 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID148 ,Interrupt ID148 Priority/Priority Byte Offset 148 "
|
|
group.long 0x498++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID155 ,Interrupt ID155 Priority/Priority Byte Offset 155 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID154 ,Interrupt ID154 Priority/Priority Byte Offset 154 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID153 ,Interrupt ID153 Priority/Priority Byte Offset 153 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID152 ,Interrupt ID152 Priority/Priority Byte Offset 152 "
|
|
group.long 0x49C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID159 ,Interrupt ID159 Priority/Priority Byte Offset 159 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID158 ,Interrupt ID158 Priority/Priority Byte Offset 158 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID157 ,Interrupt ID157 Priority/Priority Byte Offset 157 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID156 ,Interrupt ID156 Priority/Priority Byte Offset 156 "
|
|
else
|
|
hgroup.long 0x480++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32"
|
|
hgroup.long 0x484++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33"
|
|
hgroup.long 0x488++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34"
|
|
hgroup.long 0x48C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35"
|
|
hgroup.long 0x490++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36"
|
|
hgroup.long 0x494++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37"
|
|
hgroup.long 0x498++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38"
|
|
hgroup.long 0x49C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x05)
|
|
group.long 0x4A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID163 ,Interrupt ID163 Priority/Priority Byte Offset 163 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID162 ,Interrupt ID162 Priority/Priority Byte Offset 162 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID161 ,Interrupt ID161 Priority/Priority Byte Offset 161 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID160 ,Interrupt ID160 Priority/Priority Byte Offset 160 "
|
|
group.long 0x4A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID167 ,Interrupt ID167 Priority/Priority Byte Offset 167 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID166 ,Interrupt ID166 Priority/Priority Byte Offset 166 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID165 ,Interrupt ID165 Priority/Priority Byte Offset 165 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID164 ,Interrupt ID164 Priority/Priority Byte Offset 164 "
|
|
group.long 0x4A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID171 ,Interrupt ID171 Priority/Priority Byte Offset 171 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID170 ,Interrupt ID170 Priority/Priority Byte Offset 170 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID169 ,Interrupt ID169 Priority/Priority Byte Offset 169 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID168 ,Interrupt ID168 Priority/Priority Byte Offset 168 "
|
|
group.long 0x4AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID175 ,Interrupt ID175 Priority/Priority Byte Offset 175 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID174 ,Interrupt ID174 Priority/Priority Byte Offset 174 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID173 ,Interrupt ID173 Priority/Priority Byte Offset 173 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID172 ,Interrupt ID172 Priority/Priority Byte Offset 172 "
|
|
group.long 0x4B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID179 ,Interrupt ID179 Priority/Priority Byte Offset 179 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID178 ,Interrupt ID178 Priority/Priority Byte Offset 178 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID177 ,Interrupt ID177 Priority/Priority Byte Offset 177 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID176 ,Interrupt ID176 Priority/Priority Byte Offset 176 "
|
|
group.long 0x4B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID183 ,Interrupt ID183 Priority/Priority Byte Offset 183 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID182 ,Interrupt ID182 Priority/Priority Byte Offset 182 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID181 ,Interrupt ID181 Priority/Priority Byte Offset 181 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID180 ,Interrupt ID180 Priority/Priority Byte Offset 180 "
|
|
group.long 0x4B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID187 ,Interrupt ID187 Priority/Priority Byte Offset 187 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID186 ,Interrupt ID186 Priority/Priority Byte Offset 186 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID185 ,Interrupt ID185 Priority/Priority Byte Offset 185 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID184 ,Interrupt ID184 Priority/Priority Byte Offset 184 "
|
|
group.long 0x4BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID191 ,Interrupt ID191 Priority/Priority Byte Offset 191 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID190 ,Interrupt ID190 Priority/Priority Byte Offset 190 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID189 ,Interrupt ID189 Priority/Priority Byte Offset 189 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID188 ,Interrupt ID188 Priority/Priority Byte Offset 188 "
|
|
else
|
|
hgroup.long 0x4A0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40"
|
|
hgroup.long 0x4A4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41"
|
|
hgroup.long 0x4A8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42"
|
|
hgroup.long 0x4AC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43"
|
|
hgroup.long 0x4B0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44"
|
|
hgroup.long 0x4B4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45"
|
|
hgroup.long 0x4B8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46"
|
|
hgroup.long 0x4BC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x06)
|
|
group.long 0x4C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID195 ,Interrupt ID195 Priority/Priority Byte Offset 195 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID194 ,Interrupt ID194 Priority/Priority Byte Offset 194 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID193 ,Interrupt ID193 Priority/Priority Byte Offset 193 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID192 ,Interrupt ID192 Priority/Priority Byte Offset 192 "
|
|
group.long 0x4C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID199 ,Interrupt ID199 Priority/Priority Byte Offset 199 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID198 ,Interrupt ID198 Priority/Priority Byte Offset 198 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID197 ,Interrupt ID197 Priority/Priority Byte Offset 197 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID196 ,Interrupt ID196 Priority/Priority Byte Offset 196 "
|
|
group.long 0x4C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID203 ,Interrupt ID203 Priority/Priority Byte Offset 203 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID202 ,Interrupt ID202 Priority/Priority Byte Offset 202 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID201 ,Interrupt ID201 Priority/Priority Byte Offset 201 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID200 ,Interrupt ID200 Priority/Priority Byte Offset 200 "
|
|
group.long 0x4CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID207 ,Interrupt ID207 Priority/Priority Byte Offset 207 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID206 ,Interrupt ID206 Priority/Priority Byte Offset 206 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID205 ,Interrupt ID205 Priority/Priority Byte Offset 205 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID204 ,Interrupt ID204 Priority/Priority Byte Offset 204 "
|
|
group.long 0x4D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID211 ,Interrupt ID211 Priority/Priority Byte Offset 211 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID210 ,Interrupt ID210 Priority/Priority Byte Offset 210 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID209 ,Interrupt ID209 Priority/Priority Byte Offset 209 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID208 ,Interrupt ID208 Priority/Priority Byte Offset 208 "
|
|
group.long 0x4D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID215 ,Interrupt ID215 Priority/Priority Byte Offset 215 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID214 ,Interrupt ID214 Priority/Priority Byte Offset 214 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID213 ,Interrupt ID213 Priority/Priority Byte Offset 213 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID212 ,Interrupt ID212 Priority/Priority Byte Offset 212 "
|
|
group.long 0x4D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID219 ,Interrupt ID219 Priority/Priority Byte Offset 219 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID218 ,Interrupt ID218 Priority/Priority Byte Offset 218 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID217 ,Interrupt ID217 Priority/Priority Byte Offset 217 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID216 ,Interrupt ID216 Priority/Priority Byte Offset 216 "
|
|
group.long 0x4DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID223 ,Interrupt ID223 Priority/Priority Byte Offset 223 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID222 ,Interrupt ID222 Priority/Priority Byte Offset 222 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID221 ,Interrupt ID221 Priority/Priority Byte Offset 221 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID220 ,Interrupt ID220 Priority/Priority Byte Offset 220 "
|
|
else
|
|
hgroup.long 0x4C0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48"
|
|
hgroup.long 0x4C4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49"
|
|
hgroup.long 0x4C8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50"
|
|
hgroup.long 0x4CC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51"
|
|
hgroup.long 0x4D0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52"
|
|
hgroup.long 0x4D4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53"
|
|
hgroup.long 0x4D8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54"
|
|
hgroup.long 0x4DC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x07)
|
|
group.long 0x4E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID227 ,Interrupt ID227 Priority/Priority Byte Offset 227 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID226 ,Interrupt ID226 Priority/Priority Byte Offset 226 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID225 ,Interrupt ID225 Priority/Priority Byte Offset 225 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID224 ,Interrupt ID224 Priority/Priority Byte Offset 224 "
|
|
group.long 0x4E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID231 ,Interrupt ID231 Priority/Priority Byte Offset 231 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID230 ,Interrupt ID230 Priority/Priority Byte Offset 230 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID229 ,Interrupt ID229 Priority/Priority Byte Offset 229 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID228 ,Interrupt ID228 Priority/Priority Byte Offset 228 "
|
|
group.long 0x4E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID235 ,Interrupt ID235 Priority/Priority Byte Offset 235 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID234 ,Interrupt ID234 Priority/Priority Byte Offset 234 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID233 ,Interrupt ID233 Priority/Priority Byte Offset 233 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID232 ,Interrupt ID232 Priority/Priority Byte Offset 232 "
|
|
group.long 0x4EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID239 ,Interrupt ID239 Priority/Priority Byte Offset 239 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID238 ,Interrupt ID238 Priority/Priority Byte Offset 238 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID237 ,Interrupt ID237 Priority/Priority Byte Offset 237 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID236 ,Interrupt ID236 Priority/Priority Byte Offset 236 "
|
|
group.long 0x4F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID243 ,Interrupt ID243 Priority/Priority Byte Offset 243 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID242 ,Interrupt ID242 Priority/Priority Byte Offset 242 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID241 ,Interrupt ID241 Priority/Priority Byte Offset 241 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID240 ,Interrupt ID240 Priority/Priority Byte Offset 240 "
|
|
group.long 0x4F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID247 ,Interrupt ID247 Priority/Priority Byte Offset 247 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID246 ,Interrupt ID246 Priority/Priority Byte Offset 246 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID245 ,Interrupt ID245 Priority/Priority Byte Offset 245 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID244 ,Interrupt ID244 Priority/Priority Byte Offset 244 "
|
|
group.long 0x4F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID251 ,Interrupt ID251 Priority/Priority Byte Offset 251 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID250 ,Interrupt ID250 Priority/Priority Byte Offset 250 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID249 ,Interrupt ID249 Priority/Priority Byte Offset 249 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID248 ,Interrupt ID248 Priority/Priority Byte Offset 248 "
|
|
group.long 0x4FC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID255 ,Interrupt ID255 Priority/Priority Byte Offset 255 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID254 ,Interrupt ID254 Priority/Priority Byte Offset 254 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID253 ,Interrupt ID253 Priority/Priority Byte Offset 253 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID252 ,Interrupt ID252 Priority/Priority Byte Offset 252 "
|
|
else
|
|
hgroup.long 0x4E0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56"
|
|
hgroup.long 0x4E4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57"
|
|
hgroup.long 0x4E8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58"
|
|
hgroup.long 0x4EC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59"
|
|
hgroup.long 0x4F0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60"
|
|
hgroup.long 0x4F4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61"
|
|
hgroup.long 0x4F8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62"
|
|
hgroup.long 0x4FC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x08)
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID259 ,Interrupt ID259 Priority/Priority Byte Offset 259 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID258 ,Interrupt ID258 Priority/Priority Byte Offset 258 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID257 ,Interrupt ID257 Priority/Priority Byte Offset 257 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID256 ,Interrupt ID256 Priority/Priority Byte Offset 256 "
|
|
group.long 0x504++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID263 ,Interrupt ID263 Priority/Priority Byte Offset 263 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID262 ,Interrupt ID262 Priority/Priority Byte Offset 262 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID261 ,Interrupt ID261 Priority/Priority Byte Offset 261 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID260 ,Interrupt ID260 Priority/Priority Byte Offset 260 "
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID267 ,Interrupt ID267 Priority/Priority Byte Offset 267 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID266 ,Interrupt ID266 Priority/Priority Byte Offset 266 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID265 ,Interrupt ID265 Priority/Priority Byte Offset 265 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID264 ,Interrupt ID264 Priority/Priority Byte Offset 264 "
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID271 ,Interrupt ID271 Priority/Priority Byte Offset 271 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID270 ,Interrupt ID270 Priority/Priority Byte Offset 270 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID269 ,Interrupt ID269 Priority/Priority Byte Offset 269 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID268 ,Interrupt ID268 Priority/Priority Byte Offset 268 "
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID275 ,Interrupt ID275 Priority/Priority Byte Offset 275 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID274 ,Interrupt ID274 Priority/Priority Byte Offset 274 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID273 ,Interrupt ID273 Priority/Priority Byte Offset 273 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID272 ,Interrupt ID272 Priority/Priority Byte Offset 272 "
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID279 ,Interrupt ID279 Priority/Priority Byte Offset 279 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID278 ,Interrupt ID278 Priority/Priority Byte Offset 278 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID277 ,Interrupt ID277 Priority/Priority Byte Offset 277 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID276 ,Interrupt ID276 Priority/Priority Byte Offset 276 "
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID283 ,Interrupt ID283 Priority/Priority Byte Offset 283 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID282 ,Interrupt ID282 Priority/Priority Byte Offset 282 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID281 ,Interrupt ID281 Priority/Priority Byte Offset 281 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID280 ,Interrupt ID280 Priority/Priority Byte Offset 280 "
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID287 ,Interrupt ID287 Priority/Priority Byte Offset 287 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID286 ,Interrupt ID286 Priority/Priority Byte Offset 286 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID285 ,Interrupt ID285 Priority/Priority Byte Offset 285 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID284 ,Interrupt ID284 Priority/Priority Byte Offset 284 "
|
|
else
|
|
hgroup.long 0x500++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64"
|
|
hgroup.long 0x504++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65"
|
|
hgroup.long 0x508++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66"
|
|
hgroup.long 0x50C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67"
|
|
hgroup.long 0x510++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68"
|
|
hgroup.long 0x514++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69"
|
|
hgroup.long 0x518++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70"
|
|
hgroup.long 0x51C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x09)
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID291 ,Interrupt ID291 Priority/Priority Byte Offset 291 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID290 ,Interrupt ID290 Priority/Priority Byte Offset 290 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID289 ,Interrupt ID289 Priority/Priority Byte Offset 289 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID288 ,Interrupt ID288 Priority/Priority Byte Offset 288 "
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID295 ,Interrupt ID295 Priority/Priority Byte Offset 295 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID294 ,Interrupt ID294 Priority/Priority Byte Offset 294 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID293 ,Interrupt ID293 Priority/Priority Byte Offset 293 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID292 ,Interrupt ID292 Priority/Priority Byte Offset 292 "
|
|
group.long 0x528++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID299 ,Interrupt ID299 Priority/Priority Byte Offset 299 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID298 ,Interrupt ID298 Priority/Priority Byte Offset 298 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID297 ,Interrupt ID297 Priority/Priority Byte Offset 297 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID296 ,Interrupt ID296 Priority/Priority Byte Offset 296 "
|
|
group.long 0x52C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID303 ,Interrupt ID303 Priority/Priority Byte Offset 303 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID302 ,Interrupt ID302 Priority/Priority Byte Offset 302 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID301 ,Interrupt ID301 Priority/Priority Byte Offset 301 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID300 ,Interrupt ID300 Priority/Priority Byte Offset 300 "
|
|
group.long 0x530++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID307 ,Interrupt ID307 Priority/Priority Byte Offset 307 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID306 ,Interrupt ID306 Priority/Priority Byte Offset 306 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID305 ,Interrupt ID305 Priority/Priority Byte Offset 305 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID304 ,Interrupt ID304 Priority/Priority Byte Offset 304 "
|
|
group.long 0x534++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID311 ,Interrupt ID311 Priority/Priority Byte Offset 311 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID310 ,Interrupt ID310 Priority/Priority Byte Offset 310 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID309 ,Interrupt ID309 Priority/Priority Byte Offset 309 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID308 ,Interrupt ID308 Priority/Priority Byte Offset 308 "
|
|
group.long 0x538++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID315 ,Interrupt ID315 Priority/Priority Byte Offset 315 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID314 ,Interrupt ID314 Priority/Priority Byte Offset 314 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID313 ,Interrupt ID313 Priority/Priority Byte Offset 313 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID312 ,Interrupt ID312 Priority/Priority Byte Offset 312 "
|
|
group.long 0x53C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID319 ,Interrupt ID319 Priority/Priority Byte Offset 319 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID318 ,Interrupt ID318 Priority/Priority Byte Offset 318 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID317 ,Interrupt ID317 Priority/Priority Byte Offset 317 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID316 ,Interrupt ID316 Priority/Priority Byte Offset 316 "
|
|
else
|
|
hgroup.long 0x520++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72"
|
|
hgroup.long 0x524++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73"
|
|
hgroup.long 0x528++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74"
|
|
hgroup.long 0x52C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75"
|
|
hgroup.long 0x530++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76"
|
|
hgroup.long 0x534++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77"
|
|
hgroup.long 0x538++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78"
|
|
hgroup.long 0x53C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0A)
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID323 ,Interrupt ID323 Priority/Priority Byte Offset 323 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID322 ,Interrupt ID322 Priority/Priority Byte Offset 322 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID321 ,Interrupt ID321 Priority/Priority Byte Offset 321 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID320 ,Interrupt ID320 Priority/Priority Byte Offset 320 "
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID327 ,Interrupt ID327 Priority/Priority Byte Offset 327 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID326 ,Interrupt ID326 Priority/Priority Byte Offset 326 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID325 ,Interrupt ID325 Priority/Priority Byte Offset 325 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID324 ,Interrupt ID324 Priority/Priority Byte Offset 324 "
|
|
group.long 0x548++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID331 ,Interrupt ID331 Priority/Priority Byte Offset 331 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID330 ,Interrupt ID330 Priority/Priority Byte Offset 330 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID329 ,Interrupt ID329 Priority/Priority Byte Offset 329 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID328 ,Interrupt ID328 Priority/Priority Byte Offset 328 "
|
|
group.long 0x54C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID335 ,Interrupt ID335 Priority/Priority Byte Offset 335 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID334 ,Interrupt ID334 Priority/Priority Byte Offset 334 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID333 ,Interrupt ID333 Priority/Priority Byte Offset 333 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID332 ,Interrupt ID332 Priority/Priority Byte Offset 332 "
|
|
group.long 0x550++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID339 ,Interrupt ID339 Priority/Priority Byte Offset 339 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID338 ,Interrupt ID338 Priority/Priority Byte Offset 338 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID337 ,Interrupt ID337 Priority/Priority Byte Offset 337 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID336 ,Interrupt ID336 Priority/Priority Byte Offset 336 "
|
|
group.long 0x554++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID343 ,Interrupt ID343 Priority/Priority Byte Offset 343 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID342 ,Interrupt ID342 Priority/Priority Byte Offset 342 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID341 ,Interrupt ID341 Priority/Priority Byte Offset 341 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID340 ,Interrupt ID340 Priority/Priority Byte Offset 340 "
|
|
group.long 0x558++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID347 ,Interrupt ID347 Priority/Priority Byte Offset 347 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID346 ,Interrupt ID346 Priority/Priority Byte Offset 346 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID345 ,Interrupt ID345 Priority/Priority Byte Offset 345 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID344 ,Interrupt ID344 Priority/Priority Byte Offset 344 "
|
|
group.long 0x55C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID351 ,Interrupt ID351 Priority/Priority Byte Offset 351 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID350 ,Interrupt ID350 Priority/Priority Byte Offset 350 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID349 ,Interrupt ID349 Priority/Priority Byte Offset 349 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID348 ,Interrupt ID348 Priority/Priority Byte Offset 348 "
|
|
else
|
|
hgroup.long 0x540++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80"
|
|
hgroup.long 0x544++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81"
|
|
hgroup.long 0x548++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82"
|
|
hgroup.long 0x54C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83"
|
|
hgroup.long 0x550++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84"
|
|
hgroup.long 0x554++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85"
|
|
hgroup.long 0x558++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86"
|
|
hgroup.long 0x55C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0B)
|
|
group.long 0x560++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID355 ,Interrupt ID355 Priority/Priority Byte Offset 355 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID354 ,Interrupt ID354 Priority/Priority Byte Offset 354 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID353 ,Interrupt ID353 Priority/Priority Byte Offset 353 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID352 ,Interrupt ID352 Priority/Priority Byte Offset 352 "
|
|
group.long 0x564++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID359 ,Interrupt ID359 Priority/Priority Byte Offset 359 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID358 ,Interrupt ID358 Priority/Priority Byte Offset 358 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID357 ,Interrupt ID357 Priority/Priority Byte Offset 357 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID356 ,Interrupt ID356 Priority/Priority Byte Offset 356 "
|
|
group.long 0x568++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID363 ,Interrupt ID363 Priority/Priority Byte Offset 363 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID362 ,Interrupt ID362 Priority/Priority Byte Offset 362 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID361 ,Interrupt ID361 Priority/Priority Byte Offset 361 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID360 ,Interrupt ID360 Priority/Priority Byte Offset 360 "
|
|
group.long 0x56C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID367 ,Interrupt ID367 Priority/Priority Byte Offset 367 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID366 ,Interrupt ID366 Priority/Priority Byte Offset 366 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID365 ,Interrupt ID365 Priority/Priority Byte Offset 365 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID364 ,Interrupt ID364 Priority/Priority Byte Offset 364 "
|
|
group.long 0x570++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID371 ,Interrupt ID371 Priority/Priority Byte Offset 371 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID370 ,Interrupt ID370 Priority/Priority Byte Offset 370 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID369 ,Interrupt ID369 Priority/Priority Byte Offset 369 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID368 ,Interrupt ID368 Priority/Priority Byte Offset 368 "
|
|
group.long 0x574++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID375 ,Interrupt ID375 Priority/Priority Byte Offset 375 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID374 ,Interrupt ID374 Priority/Priority Byte Offset 374 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID373 ,Interrupt ID373 Priority/Priority Byte Offset 373 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID372 ,Interrupt ID372 Priority/Priority Byte Offset 372 "
|
|
group.long 0x578++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID379 ,Interrupt ID379 Priority/Priority Byte Offset 379 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID378 ,Interrupt ID378 Priority/Priority Byte Offset 378 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID377 ,Interrupt ID377 Priority/Priority Byte Offset 377 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID376 ,Interrupt ID376 Priority/Priority Byte Offset 376 "
|
|
group.long 0x57C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID383 ,Interrupt ID383 Priority/Priority Byte Offset 383 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID382 ,Interrupt ID382 Priority/Priority Byte Offset 382 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID381 ,Interrupt ID381 Priority/Priority Byte Offset 381 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID380 ,Interrupt ID380 Priority/Priority Byte Offset 380 "
|
|
else
|
|
hgroup.long 0x560++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88"
|
|
hgroup.long 0x564++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89"
|
|
hgroup.long 0x568++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90"
|
|
hgroup.long 0x56C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91"
|
|
hgroup.long 0x570++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92"
|
|
hgroup.long 0x574++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93"
|
|
hgroup.long 0x578++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94"
|
|
hgroup.long 0x57C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0C)
|
|
group.long 0x580++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID387 ,Interrupt ID387 Priority/Priority Byte Offset 387 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID386 ,Interrupt ID386 Priority/Priority Byte Offset 386 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID385 ,Interrupt ID385 Priority/Priority Byte Offset 385 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID384 ,Interrupt ID384 Priority/Priority Byte Offset 384 "
|
|
group.long 0x584++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID391 ,Interrupt ID391 Priority/Priority Byte Offset 391 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID390 ,Interrupt ID390 Priority/Priority Byte Offset 390 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID389 ,Interrupt ID389 Priority/Priority Byte Offset 389 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID388 ,Interrupt ID388 Priority/Priority Byte Offset 388 "
|
|
group.long 0x588++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID395 ,Interrupt ID395 Priority/Priority Byte Offset 395 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID394 ,Interrupt ID394 Priority/Priority Byte Offset 394 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID393 ,Interrupt ID393 Priority/Priority Byte Offset 393 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID392 ,Interrupt ID392 Priority/Priority Byte Offset 392 "
|
|
group.long 0x58C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID399 ,Interrupt ID399 Priority/Priority Byte Offset 399 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID398 ,Interrupt ID398 Priority/Priority Byte Offset 398 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID397 ,Interrupt ID397 Priority/Priority Byte Offset 397 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID396 ,Interrupt ID396 Priority/Priority Byte Offset 396 "
|
|
group.long 0x590++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID403 ,Interrupt ID403 Priority/Priority Byte Offset 403 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID402 ,Interrupt ID402 Priority/Priority Byte Offset 402 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID401 ,Interrupt ID401 Priority/Priority Byte Offset 401 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID400 ,Interrupt ID400 Priority/Priority Byte Offset 400 "
|
|
group.long 0x594++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID407 ,Interrupt ID407 Priority/Priority Byte Offset 407 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID406 ,Interrupt ID406 Priority/Priority Byte Offset 406 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID405 ,Interrupt ID405 Priority/Priority Byte Offset 405 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID404 ,Interrupt ID404 Priority/Priority Byte Offset 404 "
|
|
group.long 0x598++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID411 ,Interrupt ID411 Priority/Priority Byte Offset 411 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID410 ,Interrupt ID410 Priority/Priority Byte Offset 410 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID409 ,Interrupt ID409 Priority/Priority Byte Offset 409 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID408 ,Interrupt ID408 Priority/Priority Byte Offset 408 "
|
|
group.long 0x59C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID415 ,Interrupt ID415 Priority/Priority Byte Offset 415 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID414 ,Interrupt ID414 Priority/Priority Byte Offset 414 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID413 ,Interrupt ID413 Priority/Priority Byte Offset 413 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID412 ,Interrupt ID412 Priority/Priority Byte Offset 412 "
|
|
else
|
|
hgroup.long 0x580++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96"
|
|
hgroup.long 0x584++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97"
|
|
hgroup.long 0x588++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98"
|
|
hgroup.long 0x58C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99"
|
|
hgroup.long 0x590++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100"
|
|
hgroup.long 0x594++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101"
|
|
hgroup.long 0x598++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102"
|
|
hgroup.long 0x59C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0D)
|
|
group.long 0x5A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID419 ,Interrupt ID419 Priority/Priority Byte Offset 419 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID418 ,Interrupt ID418 Priority/Priority Byte Offset 418 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID417 ,Interrupt ID417 Priority/Priority Byte Offset 417 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID416 ,Interrupt ID416 Priority/Priority Byte Offset 416 "
|
|
group.long 0x5A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID423 ,Interrupt ID423 Priority/Priority Byte Offset 423 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID422 ,Interrupt ID422 Priority/Priority Byte Offset 422 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID421 ,Interrupt ID421 Priority/Priority Byte Offset 421 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID420 ,Interrupt ID420 Priority/Priority Byte Offset 420 "
|
|
group.long 0x5A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID427 ,Interrupt ID427 Priority/Priority Byte Offset 427 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID426 ,Interrupt ID426 Priority/Priority Byte Offset 426 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID425 ,Interrupt ID425 Priority/Priority Byte Offset 425 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID424 ,Interrupt ID424 Priority/Priority Byte Offset 424 "
|
|
group.long 0x5AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID431 ,Interrupt ID431 Priority/Priority Byte Offset 431 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID430 ,Interrupt ID430 Priority/Priority Byte Offset 430 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID429 ,Interrupt ID429 Priority/Priority Byte Offset 429 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID428 ,Interrupt ID428 Priority/Priority Byte Offset 428 "
|
|
group.long 0x5B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID435 ,Interrupt ID435 Priority/Priority Byte Offset 435 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID434 ,Interrupt ID434 Priority/Priority Byte Offset 434 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID433 ,Interrupt ID433 Priority/Priority Byte Offset 433 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID432 ,Interrupt ID432 Priority/Priority Byte Offset 432 "
|
|
group.long 0x5B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID439 ,Interrupt ID439 Priority/Priority Byte Offset 439 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID438 ,Interrupt ID438 Priority/Priority Byte Offset 438 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID437 ,Interrupt ID437 Priority/Priority Byte Offset 437 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID436 ,Interrupt ID436 Priority/Priority Byte Offset 436 "
|
|
group.long 0x5B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID443 ,Interrupt ID443 Priority/Priority Byte Offset 443 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID442 ,Interrupt ID442 Priority/Priority Byte Offset 442 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID441 ,Interrupt ID441 Priority/Priority Byte Offset 441 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID440 ,Interrupt ID440 Priority/Priority Byte Offset 440 "
|
|
group.long 0x5BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID447 ,Interrupt ID447 Priority/Priority Byte Offset 447 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID446 ,Interrupt ID446 Priority/Priority Byte Offset 446 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID445 ,Interrupt ID445 Priority/Priority Byte Offset 445 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID444 ,Interrupt ID444 Priority/Priority Byte Offset 444 "
|
|
else
|
|
hgroup.long 0x5A0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104"
|
|
hgroup.long 0x5A4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105"
|
|
hgroup.long 0x5A8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106"
|
|
hgroup.long 0x5AC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107"
|
|
hgroup.long 0x5B0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108"
|
|
hgroup.long 0x5B4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109"
|
|
hgroup.long 0x5B8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110"
|
|
hgroup.long 0x5BC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0E)
|
|
group.long 0x5C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID451 ,Interrupt ID451 Priority/Priority Byte Offset 451 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID450 ,Interrupt ID450 Priority/Priority Byte Offset 450 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID449 ,Interrupt ID449 Priority/Priority Byte Offset 449 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID448 ,Interrupt ID448 Priority/Priority Byte Offset 448 "
|
|
group.long 0x5C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID455 ,Interrupt ID455 Priority/Priority Byte Offset 455 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID454 ,Interrupt ID454 Priority/Priority Byte Offset 454 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID453 ,Interrupt ID453 Priority/Priority Byte Offset 453 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID452 ,Interrupt ID452 Priority/Priority Byte Offset 452 "
|
|
group.long 0x5C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID459 ,Interrupt ID459 Priority/Priority Byte Offset 459 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID458 ,Interrupt ID458 Priority/Priority Byte Offset 458 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID457 ,Interrupt ID457 Priority/Priority Byte Offset 457 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID456 ,Interrupt ID456 Priority/Priority Byte Offset 456 "
|
|
group.long 0x5CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID463 ,Interrupt ID463 Priority/Priority Byte Offset 463 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID462 ,Interrupt ID462 Priority/Priority Byte Offset 462 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID461 ,Interrupt ID461 Priority/Priority Byte Offset 461 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID460 ,Interrupt ID460 Priority/Priority Byte Offset 460 "
|
|
group.long 0x5D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID467 ,Interrupt ID467 Priority/Priority Byte Offset 467 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID466 ,Interrupt ID466 Priority/Priority Byte Offset 466 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID465 ,Interrupt ID465 Priority/Priority Byte Offset 465 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID464 ,Interrupt ID464 Priority/Priority Byte Offset 464 "
|
|
group.long 0x5D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID471 ,Interrupt ID471 Priority/Priority Byte Offset 471 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID470 ,Interrupt ID470 Priority/Priority Byte Offset 470 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID469 ,Interrupt ID469 Priority/Priority Byte Offset 469 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID468 ,Interrupt ID468 Priority/Priority Byte Offset 468 "
|
|
group.long 0x5D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID475 ,Interrupt ID475 Priority/Priority Byte Offset 475 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID474 ,Interrupt ID474 Priority/Priority Byte Offset 474 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID473 ,Interrupt ID473 Priority/Priority Byte Offset 473 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID472 ,Interrupt ID472 Priority/Priority Byte Offset 472 "
|
|
group.long 0x5DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID479 ,Interrupt ID479 Priority/Priority Byte Offset 479 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID478 ,Interrupt ID478 Priority/Priority Byte Offset 478 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID477 ,Interrupt ID477 Priority/Priority Byte Offset 477 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID476 ,Interrupt ID476 Priority/Priority Byte Offset 476 "
|
|
else
|
|
hgroup.long 0x5C0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112"
|
|
hgroup.long 0x5C4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113"
|
|
hgroup.long 0x5C8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114"
|
|
hgroup.long 0x5CC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115"
|
|
hgroup.long 0x5D0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116"
|
|
hgroup.long 0x5D4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117"
|
|
hgroup.long 0x5D8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118"
|
|
hgroup.long 0x5DC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0F)
|
|
group.long 0x5E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID483 ,Interrupt ID483 Priority/Priority Byte Offset 483 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID482 ,Interrupt ID482 Priority/Priority Byte Offset 482 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID481 ,Interrupt ID481 Priority/Priority Byte Offset 481 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID480 ,Interrupt ID480 Priority/Priority Byte Offset 480 "
|
|
group.long 0x5E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID487 ,Interrupt ID487 Priority/Priority Byte Offset 487 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID486 ,Interrupt ID486 Priority/Priority Byte Offset 486 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID485 ,Interrupt ID485 Priority/Priority Byte Offset 485 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID484 ,Interrupt ID484 Priority/Priority Byte Offset 484 "
|
|
group.long 0x5E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID491 ,Interrupt ID491 Priority/Priority Byte Offset 491 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID490 ,Interrupt ID490 Priority/Priority Byte Offset 490 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID489 ,Interrupt ID489 Priority/Priority Byte Offset 489 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID488 ,Interrupt ID488 Priority/Priority Byte Offset 488 "
|
|
group.long 0x5EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID495 ,Interrupt ID495 Priority/Priority Byte Offset 495 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID494 ,Interrupt ID494 Priority/Priority Byte Offset 494 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID493 ,Interrupt ID493 Priority/Priority Byte Offset 493 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID492 ,Interrupt ID492 Priority/Priority Byte Offset 492 "
|
|
group.long 0x5F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID499 ,Interrupt ID499 Priority/Priority Byte Offset 499 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID498 ,Interrupt ID498 Priority/Priority Byte Offset 498 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID497 ,Interrupt ID497 Priority/Priority Byte Offset 497 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID496 ,Interrupt ID496 Priority/Priority Byte Offset 496 "
|
|
group.long 0x5F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID503 ,Interrupt ID503 Priority/Priority Byte Offset 503 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID502 ,Interrupt ID502 Priority/Priority Byte Offset 502 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID501 ,Interrupt ID501 Priority/Priority Byte Offset 501 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID500 ,Interrupt ID500 Priority/Priority Byte Offset 500 "
|
|
group.long 0x5F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID507 ,Interrupt ID507 Priority/Priority Byte Offset 507 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID506 ,Interrupt ID506 Priority/Priority Byte Offset 506 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID505 ,Interrupt ID505 Priority/Priority Byte Offset 505 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID504 ,Interrupt ID504 Priority/Priority Byte Offset 504 "
|
|
group.long 0x5FC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID511 ,Interrupt ID511 Priority/Priority Byte Offset 511 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID510 ,Interrupt ID510 Priority/Priority Byte Offset 510 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID509 ,Interrupt ID509 Priority/Priority Byte Offset 509 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID508 ,Interrupt ID508 Priority/Priority Byte Offset 508 "
|
|
else
|
|
hgroup.long 0x5E0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120"
|
|
hgroup.long 0x5E4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121"
|
|
hgroup.long 0x5E8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122"
|
|
hgroup.long 0x5EC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123"
|
|
hgroup.long 0x5F0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124"
|
|
hgroup.long 0x5F4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125"
|
|
hgroup.long 0x5F8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126"
|
|
hgroup.long 0x5FC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0x600++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID515 ,Interrupt ID515 Priority/Priority Byte Offset 515 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID514 ,Interrupt ID514 Priority/Priority Byte Offset 514 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID513 ,Interrupt ID513 Priority/Priority Byte Offset 513 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID512 ,Interrupt ID512 Priority/Priority Byte Offset 512 "
|
|
group.long 0x604++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID519 ,Interrupt ID519 Priority/Priority Byte Offset 519 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID518 ,Interrupt ID518 Priority/Priority Byte Offset 518 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID517 ,Interrupt ID517 Priority/Priority Byte Offset 517 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID516 ,Interrupt ID516 Priority/Priority Byte Offset 516 "
|
|
group.long 0x608++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID523 ,Interrupt ID523 Priority/Priority Byte Offset 523 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID522 ,Interrupt ID522 Priority/Priority Byte Offset 522 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID521 ,Interrupt ID521 Priority/Priority Byte Offset 521 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID520 ,Interrupt ID520 Priority/Priority Byte Offset 520 "
|
|
group.long 0x60C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID527 ,Interrupt ID527 Priority/Priority Byte Offset 527 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID526 ,Interrupt ID526 Priority/Priority Byte Offset 526 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID525 ,Interrupt ID525 Priority/Priority Byte Offset 525 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID524 ,Interrupt ID524 Priority/Priority Byte Offset 524 "
|
|
group.long 0x610++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID531 ,Interrupt ID531 Priority/Priority Byte Offset 531 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID530 ,Interrupt ID530 Priority/Priority Byte Offset 530 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID529 ,Interrupt ID529 Priority/Priority Byte Offset 529 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID528 ,Interrupt ID528 Priority/Priority Byte Offset 528 "
|
|
group.long 0x614++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID535 ,Interrupt ID535 Priority/Priority Byte Offset 535 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID534 ,Interrupt ID534 Priority/Priority Byte Offset 534 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID533 ,Interrupt ID533 Priority/Priority Byte Offset 533 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID532 ,Interrupt ID532 Priority/Priority Byte Offset 532 "
|
|
group.long 0x618++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID539 ,Interrupt ID539 Priority/Priority Byte Offset 539 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID538 ,Interrupt ID538 Priority/Priority Byte Offset 538 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID537 ,Interrupt ID537 Priority/Priority Byte Offset 537 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID536 ,Interrupt ID536 Priority/Priority Byte Offset 536 "
|
|
group.long 0x61C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID543 ,Interrupt ID543 Priority/Priority Byte Offset 543 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID542 ,Interrupt ID542 Priority/Priority Byte Offset 542 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID541 ,Interrupt ID541 Priority/Priority Byte Offset 541 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID540 ,Interrupt ID540 Priority/Priority Byte Offset 540 "
|
|
else
|
|
hgroup.long 0x600++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128"
|
|
hgroup.long 0x604++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129"
|
|
hgroup.long 0x608++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130"
|
|
hgroup.long 0x60C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131"
|
|
hgroup.long 0x610++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132"
|
|
hgroup.long 0x614++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133"
|
|
hgroup.long 0x618++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134"
|
|
hgroup.long 0x61C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0x620++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID547 ,Interrupt ID547 Priority/Priority Byte Offset 547 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID546 ,Interrupt ID546 Priority/Priority Byte Offset 546 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID545 ,Interrupt ID545 Priority/Priority Byte Offset 545 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID544 ,Interrupt ID544 Priority/Priority Byte Offset 544 "
|
|
group.long 0x624++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID551 ,Interrupt ID551 Priority/Priority Byte Offset 551 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID550 ,Interrupt ID550 Priority/Priority Byte Offset 550 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID549 ,Interrupt ID549 Priority/Priority Byte Offset 549 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID548 ,Interrupt ID548 Priority/Priority Byte Offset 548 "
|
|
group.long 0x628++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID555 ,Interrupt ID555 Priority/Priority Byte Offset 555 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID554 ,Interrupt ID554 Priority/Priority Byte Offset 554 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID553 ,Interrupt ID553 Priority/Priority Byte Offset 553 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID552 ,Interrupt ID552 Priority/Priority Byte Offset 552 "
|
|
group.long 0x62C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID559 ,Interrupt ID559 Priority/Priority Byte Offset 559 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID558 ,Interrupt ID558 Priority/Priority Byte Offset 558 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID557 ,Interrupt ID557 Priority/Priority Byte Offset 557 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID556 ,Interrupt ID556 Priority/Priority Byte Offset 556 "
|
|
group.long 0x630++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID563 ,Interrupt ID563 Priority/Priority Byte Offset 563 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID562 ,Interrupt ID562 Priority/Priority Byte Offset 562 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID561 ,Interrupt ID561 Priority/Priority Byte Offset 561 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID560 ,Interrupt ID560 Priority/Priority Byte Offset 560 "
|
|
group.long 0x634++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID567 ,Interrupt ID567 Priority/Priority Byte Offset 567 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID566 ,Interrupt ID566 Priority/Priority Byte Offset 566 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID565 ,Interrupt ID565 Priority/Priority Byte Offset 565 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID564 ,Interrupt ID564 Priority/Priority Byte Offset 564 "
|
|
group.long 0x638++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID571 ,Interrupt ID571 Priority/Priority Byte Offset 571 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID570 ,Interrupt ID570 Priority/Priority Byte Offset 570 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID569 ,Interrupt ID569 Priority/Priority Byte Offset 569 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID568 ,Interrupt ID568 Priority/Priority Byte Offset 568 "
|
|
group.long 0x63C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID575 ,Interrupt ID575 Priority/Priority Byte Offset 575 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID574 ,Interrupt ID574 Priority/Priority Byte Offset 574 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID573 ,Interrupt ID573 Priority/Priority Byte Offset 573 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID572 ,Interrupt ID572 Priority/Priority Byte Offset 572 "
|
|
else
|
|
hgroup.long 0x620++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136"
|
|
hgroup.long 0x624++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137"
|
|
hgroup.long 0x628++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138"
|
|
hgroup.long 0x62C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139"
|
|
hgroup.long 0x630++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140"
|
|
hgroup.long 0x634++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141"
|
|
hgroup.long 0x638++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142"
|
|
hgroup.long 0x63C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0x640++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID579 ,Interrupt ID579 Priority/Priority Byte Offset 579 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID578 ,Interrupt ID578 Priority/Priority Byte Offset 578 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID577 ,Interrupt ID577 Priority/Priority Byte Offset 577 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID576 ,Interrupt ID576 Priority/Priority Byte Offset 576 "
|
|
group.long 0x644++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID583 ,Interrupt ID583 Priority/Priority Byte Offset 583 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID582 ,Interrupt ID582 Priority/Priority Byte Offset 582 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID581 ,Interrupt ID581 Priority/Priority Byte Offset 581 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID580 ,Interrupt ID580 Priority/Priority Byte Offset 580 "
|
|
group.long 0x648++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID587 ,Interrupt ID587 Priority/Priority Byte Offset 587 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID586 ,Interrupt ID586 Priority/Priority Byte Offset 586 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID585 ,Interrupt ID585 Priority/Priority Byte Offset 585 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID584 ,Interrupt ID584 Priority/Priority Byte Offset 584 "
|
|
group.long 0x64C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID591 ,Interrupt ID591 Priority/Priority Byte Offset 591 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID590 ,Interrupt ID590 Priority/Priority Byte Offset 590 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID589 ,Interrupt ID589 Priority/Priority Byte Offset 589 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID588 ,Interrupt ID588 Priority/Priority Byte Offset 588 "
|
|
group.long 0x650++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID595 ,Interrupt ID595 Priority/Priority Byte Offset 595 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID594 ,Interrupt ID594 Priority/Priority Byte Offset 594 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID593 ,Interrupt ID593 Priority/Priority Byte Offset 593 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID592 ,Interrupt ID592 Priority/Priority Byte Offset 592 "
|
|
group.long 0x654++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID599 ,Interrupt ID599 Priority/Priority Byte Offset 599 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID598 ,Interrupt ID598 Priority/Priority Byte Offset 598 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID597 ,Interrupt ID597 Priority/Priority Byte Offset 597 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID596 ,Interrupt ID596 Priority/Priority Byte Offset 596 "
|
|
group.long 0x658++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID603 ,Interrupt ID603 Priority/Priority Byte Offset 603 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID602 ,Interrupt ID602 Priority/Priority Byte Offset 602 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID601 ,Interrupt ID601 Priority/Priority Byte Offset 601 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID600 ,Interrupt ID600 Priority/Priority Byte Offset 600 "
|
|
group.long 0x65C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID607 ,Interrupt ID607 Priority/Priority Byte Offset 607 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID606 ,Interrupt ID606 Priority/Priority Byte Offset 606 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID605 ,Interrupt ID605 Priority/Priority Byte Offset 605 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID604 ,Interrupt ID604 Priority/Priority Byte Offset 604 "
|
|
else
|
|
hgroup.long 0x640++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144"
|
|
hgroup.long 0x644++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145"
|
|
hgroup.long 0x648++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146"
|
|
hgroup.long 0x64C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147"
|
|
hgroup.long 0x650++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148"
|
|
hgroup.long 0x654++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149"
|
|
hgroup.long 0x658++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150"
|
|
hgroup.long 0x65C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0x660++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID611 ,Interrupt ID611 Priority/Priority Byte Offset 611 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID610 ,Interrupt ID610 Priority/Priority Byte Offset 610 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID609 ,Interrupt ID609 Priority/Priority Byte Offset 609 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID608 ,Interrupt ID608 Priority/Priority Byte Offset 608 "
|
|
group.long 0x664++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID615 ,Interrupt ID615 Priority/Priority Byte Offset 615 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID614 ,Interrupt ID614 Priority/Priority Byte Offset 614 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID613 ,Interrupt ID613 Priority/Priority Byte Offset 613 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID612 ,Interrupt ID612 Priority/Priority Byte Offset 612 "
|
|
group.long 0x668++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID619 ,Interrupt ID619 Priority/Priority Byte Offset 619 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID618 ,Interrupt ID618 Priority/Priority Byte Offset 618 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID617 ,Interrupt ID617 Priority/Priority Byte Offset 617 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID616 ,Interrupt ID616 Priority/Priority Byte Offset 616 "
|
|
group.long 0x66C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID623 ,Interrupt ID623 Priority/Priority Byte Offset 623 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID622 ,Interrupt ID622 Priority/Priority Byte Offset 622 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID621 ,Interrupt ID621 Priority/Priority Byte Offset 621 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID620 ,Interrupt ID620 Priority/Priority Byte Offset 620 "
|
|
group.long 0x670++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID627 ,Interrupt ID627 Priority/Priority Byte Offset 627 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID626 ,Interrupt ID626 Priority/Priority Byte Offset 626 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID625 ,Interrupt ID625 Priority/Priority Byte Offset 625 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID624 ,Interrupt ID624 Priority/Priority Byte Offset 624 "
|
|
group.long 0x674++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID631 ,Interrupt ID631 Priority/Priority Byte Offset 631 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID630 ,Interrupt ID630 Priority/Priority Byte Offset 630 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID629 ,Interrupt ID629 Priority/Priority Byte Offset 629 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID628 ,Interrupt ID628 Priority/Priority Byte Offset 628 "
|
|
group.long 0x678++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID635 ,Interrupt ID635 Priority/Priority Byte Offset 635 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID634 ,Interrupt ID634 Priority/Priority Byte Offset 634 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID633 ,Interrupt ID633 Priority/Priority Byte Offset 633 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID632 ,Interrupt ID632 Priority/Priority Byte Offset 632 "
|
|
group.long 0x67C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID639 ,Interrupt ID639 Priority/Priority Byte Offset 639 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID638 ,Interrupt ID638 Priority/Priority Byte Offset 638 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID637 ,Interrupt ID637 Priority/Priority Byte Offset 637 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID636 ,Interrupt ID636 Priority/Priority Byte Offset 636 "
|
|
else
|
|
hgroup.long 0x660++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152"
|
|
hgroup.long 0x664++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153"
|
|
hgroup.long 0x668++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154"
|
|
hgroup.long 0x66C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155"
|
|
hgroup.long 0x670++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156"
|
|
hgroup.long 0x674++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157"
|
|
hgroup.long 0x678++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158"
|
|
hgroup.long 0x67C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0x680++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID643 ,Interrupt ID643 Priority/Priority Byte Offset 643 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID642 ,Interrupt ID642 Priority/Priority Byte Offset 642 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID641 ,Interrupt ID641 Priority/Priority Byte Offset 641 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID640 ,Interrupt ID640 Priority/Priority Byte Offset 640 "
|
|
group.long 0x684++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID647 ,Interrupt ID647 Priority/Priority Byte Offset 647 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID646 ,Interrupt ID646 Priority/Priority Byte Offset 646 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID645 ,Interrupt ID645 Priority/Priority Byte Offset 645 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID644 ,Interrupt ID644 Priority/Priority Byte Offset 644 "
|
|
group.long 0x688++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID651 ,Interrupt ID651 Priority/Priority Byte Offset 651 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID650 ,Interrupt ID650 Priority/Priority Byte Offset 650 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID649 ,Interrupt ID649 Priority/Priority Byte Offset 649 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID648 ,Interrupt ID648 Priority/Priority Byte Offset 648 "
|
|
group.long 0x68C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID655 ,Interrupt ID655 Priority/Priority Byte Offset 655 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID654 ,Interrupt ID654 Priority/Priority Byte Offset 654 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID653 ,Interrupt ID653 Priority/Priority Byte Offset 653 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID652 ,Interrupt ID652 Priority/Priority Byte Offset 652 "
|
|
group.long 0x690++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID659 ,Interrupt ID659 Priority/Priority Byte Offset 659 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID658 ,Interrupt ID658 Priority/Priority Byte Offset 658 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID657 ,Interrupt ID657 Priority/Priority Byte Offset 657 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID656 ,Interrupt ID656 Priority/Priority Byte Offset 656 "
|
|
group.long 0x694++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID663 ,Interrupt ID663 Priority/Priority Byte Offset 663 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID662 ,Interrupt ID662 Priority/Priority Byte Offset 662 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID661 ,Interrupt ID661 Priority/Priority Byte Offset 661 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID660 ,Interrupt ID660 Priority/Priority Byte Offset 660 "
|
|
group.long 0x698++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID667 ,Interrupt ID667 Priority/Priority Byte Offset 667 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID666 ,Interrupt ID666 Priority/Priority Byte Offset 666 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID665 ,Interrupt ID665 Priority/Priority Byte Offset 665 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID664 ,Interrupt ID664 Priority/Priority Byte Offset 664 "
|
|
group.long 0x69C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID671 ,Interrupt ID671 Priority/Priority Byte Offset 671 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID670 ,Interrupt ID670 Priority/Priority Byte Offset 670 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID669 ,Interrupt ID669 Priority/Priority Byte Offset 669 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID668 ,Interrupt ID668 Priority/Priority Byte Offset 668 "
|
|
else
|
|
hgroup.long 0x680++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160"
|
|
hgroup.long 0x684++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161"
|
|
hgroup.long 0x688++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162"
|
|
hgroup.long 0x68C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163"
|
|
hgroup.long 0x690++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164"
|
|
hgroup.long 0x694++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165"
|
|
hgroup.long 0x698++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166"
|
|
hgroup.long 0x69C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0x6A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID675 ,Interrupt ID675 Priority/Priority Byte Offset 675 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID674 ,Interrupt ID674 Priority/Priority Byte Offset 674 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID673 ,Interrupt ID673 Priority/Priority Byte Offset 673 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID672 ,Interrupt ID672 Priority/Priority Byte Offset 672 "
|
|
group.long 0x6A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID679 ,Interrupt ID679 Priority/Priority Byte Offset 679 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID678 ,Interrupt ID678 Priority/Priority Byte Offset 678 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID677 ,Interrupt ID677 Priority/Priority Byte Offset 677 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID676 ,Interrupt ID676 Priority/Priority Byte Offset 676 "
|
|
group.long 0x6A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID683 ,Interrupt ID683 Priority/Priority Byte Offset 683 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID682 ,Interrupt ID682 Priority/Priority Byte Offset 682 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID681 ,Interrupt ID681 Priority/Priority Byte Offset 681 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID680 ,Interrupt ID680 Priority/Priority Byte Offset 680 "
|
|
group.long 0x6AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID687 ,Interrupt ID687 Priority/Priority Byte Offset 687 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID686 ,Interrupt ID686 Priority/Priority Byte Offset 686 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID685 ,Interrupt ID685 Priority/Priority Byte Offset 685 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID684 ,Interrupt ID684 Priority/Priority Byte Offset 684 "
|
|
group.long 0x6B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID691 ,Interrupt ID691 Priority/Priority Byte Offset 691 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID690 ,Interrupt ID690 Priority/Priority Byte Offset 690 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID689 ,Interrupt ID689 Priority/Priority Byte Offset 689 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID688 ,Interrupt ID688 Priority/Priority Byte Offset 688 "
|
|
group.long 0x6B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID695 ,Interrupt ID695 Priority/Priority Byte Offset 695 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID694 ,Interrupt ID694 Priority/Priority Byte Offset 694 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID693 ,Interrupt ID693 Priority/Priority Byte Offset 693 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID692 ,Interrupt ID692 Priority/Priority Byte Offset 692 "
|
|
group.long 0x6B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID699 ,Interrupt ID699 Priority/Priority Byte Offset 699 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID698 ,Interrupt ID698 Priority/Priority Byte Offset 698 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID697 ,Interrupt ID697 Priority/Priority Byte Offset 697 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID696 ,Interrupt ID696 Priority/Priority Byte Offset 696 "
|
|
group.long 0x6BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID703 ,Interrupt ID703 Priority/Priority Byte Offset 703 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID702 ,Interrupt ID702 Priority/Priority Byte Offset 702 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID701 ,Interrupt ID701 Priority/Priority Byte Offset 701 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID700 ,Interrupt ID700 Priority/Priority Byte Offset 700 "
|
|
else
|
|
hgroup.long 0x6A0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168"
|
|
hgroup.long 0x6A4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169"
|
|
hgroup.long 0x6A8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170"
|
|
hgroup.long 0x6AC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171"
|
|
hgroup.long 0x6B0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172"
|
|
hgroup.long 0x6B4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173"
|
|
hgroup.long 0x6B8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174"
|
|
hgroup.long 0x6BC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0x6C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID707 ,Interrupt ID707 Priority/Priority Byte Offset 707 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID706 ,Interrupt ID706 Priority/Priority Byte Offset 706 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID705 ,Interrupt ID705 Priority/Priority Byte Offset 705 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID704 ,Interrupt ID704 Priority/Priority Byte Offset 704 "
|
|
group.long 0x6C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID711 ,Interrupt ID711 Priority/Priority Byte Offset 711 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID710 ,Interrupt ID710 Priority/Priority Byte Offset 710 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID709 ,Interrupt ID709 Priority/Priority Byte Offset 709 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID708 ,Interrupt ID708 Priority/Priority Byte Offset 708 "
|
|
group.long 0x6C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID715 ,Interrupt ID715 Priority/Priority Byte Offset 715 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID714 ,Interrupt ID714 Priority/Priority Byte Offset 714 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID713 ,Interrupt ID713 Priority/Priority Byte Offset 713 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID712 ,Interrupt ID712 Priority/Priority Byte Offset 712 "
|
|
group.long 0x6CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID719 ,Interrupt ID719 Priority/Priority Byte Offset 719 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID718 ,Interrupt ID718 Priority/Priority Byte Offset 718 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID717 ,Interrupt ID717 Priority/Priority Byte Offset 717 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID716 ,Interrupt ID716 Priority/Priority Byte Offset 716 "
|
|
group.long 0x6D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID723 ,Interrupt ID723 Priority/Priority Byte Offset 723 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID722 ,Interrupt ID722 Priority/Priority Byte Offset 722 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID721 ,Interrupt ID721 Priority/Priority Byte Offset 721 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID720 ,Interrupt ID720 Priority/Priority Byte Offset 720 "
|
|
group.long 0x6D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID727 ,Interrupt ID727 Priority/Priority Byte Offset 727 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID726 ,Interrupt ID726 Priority/Priority Byte Offset 726 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID725 ,Interrupt ID725 Priority/Priority Byte Offset 725 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID724 ,Interrupt ID724 Priority/Priority Byte Offset 724 "
|
|
group.long 0x6D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID731 ,Interrupt ID731 Priority/Priority Byte Offset 731 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID730 ,Interrupt ID730 Priority/Priority Byte Offset 730 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID729 ,Interrupt ID729 Priority/Priority Byte Offset 729 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID728 ,Interrupt ID728 Priority/Priority Byte Offset 728 "
|
|
group.long 0x6DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID735 ,Interrupt ID735 Priority/Priority Byte Offset 735 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID734 ,Interrupt ID734 Priority/Priority Byte Offset 734 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID733 ,Interrupt ID733 Priority/Priority Byte Offset 733 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID732 ,Interrupt ID732 Priority/Priority Byte Offset 732 "
|
|
else
|
|
hgroup.long 0x6C0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176"
|
|
hgroup.long 0x6C4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177"
|
|
hgroup.long 0x6C8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178"
|
|
hgroup.long 0x6CC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179"
|
|
hgroup.long 0x6D0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180"
|
|
hgroup.long 0x6D4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181"
|
|
hgroup.long 0x6D8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182"
|
|
hgroup.long 0x6DC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0x6E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID739 ,Interrupt ID739 Priority/Priority Byte Offset 739 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID738 ,Interrupt ID738 Priority/Priority Byte Offset 738 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID737 ,Interrupt ID737 Priority/Priority Byte Offset 737 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID736 ,Interrupt ID736 Priority/Priority Byte Offset 736 "
|
|
group.long 0x6E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID743 ,Interrupt ID743 Priority/Priority Byte Offset 743 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID742 ,Interrupt ID742 Priority/Priority Byte Offset 742 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID741 ,Interrupt ID741 Priority/Priority Byte Offset 741 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID740 ,Interrupt ID740 Priority/Priority Byte Offset 740 "
|
|
group.long 0x6E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID747 ,Interrupt ID747 Priority/Priority Byte Offset 747 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID746 ,Interrupt ID746 Priority/Priority Byte Offset 746 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID745 ,Interrupt ID745 Priority/Priority Byte Offset 745 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID744 ,Interrupt ID744 Priority/Priority Byte Offset 744 "
|
|
group.long 0x6EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID751 ,Interrupt ID751 Priority/Priority Byte Offset 751 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID750 ,Interrupt ID750 Priority/Priority Byte Offset 750 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID749 ,Interrupt ID749 Priority/Priority Byte Offset 749 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID748 ,Interrupt ID748 Priority/Priority Byte Offset 748 "
|
|
group.long 0x6F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID755 ,Interrupt ID755 Priority/Priority Byte Offset 755 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID754 ,Interrupt ID754 Priority/Priority Byte Offset 754 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID753 ,Interrupt ID753 Priority/Priority Byte Offset 753 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID752 ,Interrupt ID752 Priority/Priority Byte Offset 752 "
|
|
group.long 0x6F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID759 ,Interrupt ID759 Priority/Priority Byte Offset 759 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID758 ,Interrupt ID758 Priority/Priority Byte Offset 758 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID757 ,Interrupt ID757 Priority/Priority Byte Offset 757 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID756 ,Interrupt ID756 Priority/Priority Byte Offset 756 "
|
|
group.long 0x6F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID763 ,Interrupt ID763 Priority/Priority Byte Offset 763 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID762 ,Interrupt ID762 Priority/Priority Byte Offset 762 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID761 ,Interrupt ID761 Priority/Priority Byte Offset 761 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID760 ,Interrupt ID760 Priority/Priority Byte Offset 760 "
|
|
group.long 0x6FC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID767 ,Interrupt ID767 Priority/Priority Byte Offset 767 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID766 ,Interrupt ID766 Priority/Priority Byte Offset 766 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID765 ,Interrupt ID765 Priority/Priority Byte Offset 765 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID764 ,Interrupt ID764 Priority/Priority Byte Offset 764 "
|
|
else
|
|
hgroup.long 0x6E0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184"
|
|
hgroup.long 0x6E4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185"
|
|
hgroup.long 0x6E8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186"
|
|
hgroup.long 0x6EC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187"
|
|
hgroup.long 0x6F0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188"
|
|
hgroup.long 0x6F4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189"
|
|
hgroup.long 0x6F8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190"
|
|
hgroup.long 0x6FC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0x700++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID771 ,Interrupt ID771 Priority/Priority Byte Offset 771 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID770 ,Interrupt ID770 Priority/Priority Byte Offset 770 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID769 ,Interrupt ID769 Priority/Priority Byte Offset 769 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID768 ,Interrupt ID768 Priority/Priority Byte Offset 768 "
|
|
group.long 0x704++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID775 ,Interrupt ID775 Priority/Priority Byte Offset 775 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID774 ,Interrupt ID774 Priority/Priority Byte Offset 774 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID773 ,Interrupt ID773 Priority/Priority Byte Offset 773 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID772 ,Interrupt ID772 Priority/Priority Byte Offset 772 "
|
|
group.long 0x708++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID779 ,Interrupt ID779 Priority/Priority Byte Offset 779 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID778 ,Interrupt ID778 Priority/Priority Byte Offset 778 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID777 ,Interrupt ID777 Priority/Priority Byte Offset 777 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID776 ,Interrupt ID776 Priority/Priority Byte Offset 776 "
|
|
group.long 0x70C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID783 ,Interrupt ID783 Priority/Priority Byte Offset 783 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID782 ,Interrupt ID782 Priority/Priority Byte Offset 782 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID781 ,Interrupt ID781 Priority/Priority Byte Offset 781 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID780 ,Interrupt ID780 Priority/Priority Byte Offset 780 "
|
|
group.long 0x710++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID787 ,Interrupt ID787 Priority/Priority Byte Offset 787 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID786 ,Interrupt ID786 Priority/Priority Byte Offset 786 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID785 ,Interrupt ID785 Priority/Priority Byte Offset 785 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID784 ,Interrupt ID784 Priority/Priority Byte Offset 784 "
|
|
group.long 0x714++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID791 ,Interrupt ID791 Priority/Priority Byte Offset 791 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID790 ,Interrupt ID790 Priority/Priority Byte Offset 790 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID789 ,Interrupt ID789 Priority/Priority Byte Offset 789 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID788 ,Interrupt ID788 Priority/Priority Byte Offset 788 "
|
|
group.long 0x718++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID795 ,Interrupt ID795 Priority/Priority Byte Offset 795 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID794 ,Interrupt ID794 Priority/Priority Byte Offset 794 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID793 ,Interrupt ID793 Priority/Priority Byte Offset 793 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID792 ,Interrupt ID792 Priority/Priority Byte Offset 792 "
|
|
group.long 0x71C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID799 ,Interrupt ID799 Priority/Priority Byte Offset 799 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID798 ,Interrupt ID798 Priority/Priority Byte Offset 798 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID797 ,Interrupt ID797 Priority/Priority Byte Offset 797 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID796 ,Interrupt ID796 Priority/Priority Byte Offset 796 "
|
|
else
|
|
hgroup.long 0x700++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192"
|
|
hgroup.long 0x704++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193"
|
|
hgroup.long 0x708++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194"
|
|
hgroup.long 0x70C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195"
|
|
hgroup.long 0x710++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196"
|
|
hgroup.long 0x714++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197"
|
|
hgroup.long 0x718++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198"
|
|
hgroup.long 0x71C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0x720++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID803 ,Interrupt ID803 Priority/Priority Byte Offset 803 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID802 ,Interrupt ID802 Priority/Priority Byte Offset 802 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID801 ,Interrupt ID801 Priority/Priority Byte Offset 801 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID800 ,Interrupt ID800 Priority/Priority Byte Offset 800 "
|
|
group.long 0x724++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID807 ,Interrupt ID807 Priority/Priority Byte Offset 807 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID806 ,Interrupt ID806 Priority/Priority Byte Offset 806 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID805 ,Interrupt ID805 Priority/Priority Byte Offset 805 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID804 ,Interrupt ID804 Priority/Priority Byte Offset 804 "
|
|
group.long 0x728++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID811 ,Interrupt ID811 Priority/Priority Byte Offset 811 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID810 ,Interrupt ID810 Priority/Priority Byte Offset 810 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID809 ,Interrupt ID809 Priority/Priority Byte Offset 809 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID808 ,Interrupt ID808 Priority/Priority Byte Offset 808 "
|
|
group.long 0x72C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID815 ,Interrupt ID815 Priority/Priority Byte Offset 815 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID814 ,Interrupt ID814 Priority/Priority Byte Offset 814 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID813 ,Interrupt ID813 Priority/Priority Byte Offset 813 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID812 ,Interrupt ID812 Priority/Priority Byte Offset 812 "
|
|
group.long 0x730++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID819 ,Interrupt ID819 Priority/Priority Byte Offset 819 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID818 ,Interrupt ID818 Priority/Priority Byte Offset 818 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID817 ,Interrupt ID817 Priority/Priority Byte Offset 817 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID816 ,Interrupt ID816 Priority/Priority Byte Offset 816 "
|
|
group.long 0x734++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID823 ,Interrupt ID823 Priority/Priority Byte Offset 823 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID822 ,Interrupt ID822 Priority/Priority Byte Offset 822 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID821 ,Interrupt ID821 Priority/Priority Byte Offset 821 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID820 ,Interrupt ID820 Priority/Priority Byte Offset 820 "
|
|
group.long 0x738++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID827 ,Interrupt ID827 Priority/Priority Byte Offset 827 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID826 ,Interrupt ID826 Priority/Priority Byte Offset 826 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID825 ,Interrupt ID825 Priority/Priority Byte Offset 825 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID824 ,Interrupt ID824 Priority/Priority Byte Offset 824 "
|
|
group.long 0x73C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID831 ,Interrupt ID831 Priority/Priority Byte Offset 831 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID830 ,Interrupt ID830 Priority/Priority Byte Offset 830 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID829 ,Interrupt ID829 Priority/Priority Byte Offset 829 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID828 ,Interrupt ID828 Priority/Priority Byte Offset 828 "
|
|
else
|
|
hgroup.long 0x720++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200"
|
|
hgroup.long 0x724++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201"
|
|
hgroup.long 0x728++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202"
|
|
hgroup.long 0x72C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203"
|
|
hgroup.long 0x730++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204"
|
|
hgroup.long 0x734++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205"
|
|
hgroup.long 0x738++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206"
|
|
hgroup.long 0x73C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0x740++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID835 ,Interrupt ID835 Priority/Priority Byte Offset 835 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID834 ,Interrupt ID834 Priority/Priority Byte Offset 834 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID833 ,Interrupt ID833 Priority/Priority Byte Offset 833 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID832 ,Interrupt ID832 Priority/Priority Byte Offset 832 "
|
|
group.long 0x744++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID839 ,Interrupt ID839 Priority/Priority Byte Offset 839 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID838 ,Interrupt ID838 Priority/Priority Byte Offset 838 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID837 ,Interrupt ID837 Priority/Priority Byte Offset 837 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID836 ,Interrupt ID836 Priority/Priority Byte Offset 836 "
|
|
group.long 0x748++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID843 ,Interrupt ID843 Priority/Priority Byte Offset 843 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID842 ,Interrupt ID842 Priority/Priority Byte Offset 842 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID841 ,Interrupt ID841 Priority/Priority Byte Offset 841 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID840 ,Interrupt ID840 Priority/Priority Byte Offset 840 "
|
|
group.long 0x74C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID847 ,Interrupt ID847 Priority/Priority Byte Offset 847 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID846 ,Interrupt ID846 Priority/Priority Byte Offset 846 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID845 ,Interrupt ID845 Priority/Priority Byte Offset 845 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID844 ,Interrupt ID844 Priority/Priority Byte Offset 844 "
|
|
group.long 0x750++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID851 ,Interrupt ID851 Priority/Priority Byte Offset 851 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID850 ,Interrupt ID850 Priority/Priority Byte Offset 850 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID849 ,Interrupt ID849 Priority/Priority Byte Offset 849 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID848 ,Interrupt ID848 Priority/Priority Byte Offset 848 "
|
|
group.long 0x754++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID855 ,Interrupt ID855 Priority/Priority Byte Offset 855 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID854 ,Interrupt ID854 Priority/Priority Byte Offset 854 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID853 ,Interrupt ID853 Priority/Priority Byte Offset 853 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID852 ,Interrupt ID852 Priority/Priority Byte Offset 852 "
|
|
group.long 0x758++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID859 ,Interrupt ID859 Priority/Priority Byte Offset 859 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID858 ,Interrupt ID858 Priority/Priority Byte Offset 858 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID857 ,Interrupt ID857 Priority/Priority Byte Offset 857 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID856 ,Interrupt ID856 Priority/Priority Byte Offset 856 "
|
|
group.long 0x75C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID863 ,Interrupt ID863 Priority/Priority Byte Offset 863 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID862 ,Interrupt ID862 Priority/Priority Byte Offset 862 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID861 ,Interrupt ID861 Priority/Priority Byte Offset 861 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID860 ,Interrupt ID860 Priority/Priority Byte Offset 860 "
|
|
else
|
|
hgroup.long 0x740++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208"
|
|
hgroup.long 0x744++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209"
|
|
hgroup.long 0x748++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210"
|
|
hgroup.long 0x74C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211"
|
|
hgroup.long 0x750++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212"
|
|
hgroup.long 0x754++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213"
|
|
hgroup.long 0x758++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214"
|
|
hgroup.long 0x75C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0x760++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID867 ,Interrupt ID867 Priority/Priority Byte Offset 867 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID866 ,Interrupt ID866 Priority/Priority Byte Offset 866 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID865 ,Interrupt ID865 Priority/Priority Byte Offset 865 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID864 ,Interrupt ID864 Priority/Priority Byte Offset 864 "
|
|
group.long 0x764++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID871 ,Interrupt ID871 Priority/Priority Byte Offset 871 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID870 ,Interrupt ID870 Priority/Priority Byte Offset 870 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID869 ,Interrupt ID869 Priority/Priority Byte Offset 869 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID868 ,Interrupt ID868 Priority/Priority Byte Offset 868 "
|
|
group.long 0x768++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID875 ,Interrupt ID875 Priority/Priority Byte Offset 875 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID874 ,Interrupt ID874 Priority/Priority Byte Offset 874 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID873 ,Interrupt ID873 Priority/Priority Byte Offset 873 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID872 ,Interrupt ID872 Priority/Priority Byte Offset 872 "
|
|
group.long 0x76C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID879 ,Interrupt ID879 Priority/Priority Byte Offset 879 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID878 ,Interrupt ID878 Priority/Priority Byte Offset 878 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID877 ,Interrupt ID877 Priority/Priority Byte Offset 877 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID876 ,Interrupt ID876 Priority/Priority Byte Offset 876 "
|
|
group.long 0x770++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID883 ,Interrupt ID883 Priority/Priority Byte Offset 883 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID882 ,Interrupt ID882 Priority/Priority Byte Offset 882 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID881 ,Interrupt ID881 Priority/Priority Byte Offset 881 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID880 ,Interrupt ID880 Priority/Priority Byte Offset 880 "
|
|
group.long 0x774++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID887 ,Interrupt ID887 Priority/Priority Byte Offset 887 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID886 ,Interrupt ID886 Priority/Priority Byte Offset 886 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID885 ,Interrupt ID885 Priority/Priority Byte Offset 885 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID884 ,Interrupt ID884 Priority/Priority Byte Offset 884 "
|
|
group.long 0x778++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID891 ,Interrupt ID891 Priority/Priority Byte Offset 891 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID890 ,Interrupt ID890 Priority/Priority Byte Offset 890 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID889 ,Interrupt ID889 Priority/Priority Byte Offset 889 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID888 ,Interrupt ID888 Priority/Priority Byte Offset 888 "
|
|
group.long 0x77C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID895 ,Interrupt ID895 Priority/Priority Byte Offset 895 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID894 ,Interrupt ID894 Priority/Priority Byte Offset 894 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID893 ,Interrupt ID893 Priority/Priority Byte Offset 893 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID892 ,Interrupt ID892 Priority/Priority Byte Offset 892 "
|
|
else
|
|
hgroup.long 0x760++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216"
|
|
hgroup.long 0x764++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217"
|
|
hgroup.long 0x768++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218"
|
|
hgroup.long 0x76C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219"
|
|
hgroup.long 0x770++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220"
|
|
hgroup.long 0x774++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221"
|
|
hgroup.long 0x778++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222"
|
|
hgroup.long 0x77C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0x780++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID899 ,Interrupt ID899 Priority/Priority Byte Offset 899 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID898 ,Interrupt ID898 Priority/Priority Byte Offset 898 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID897 ,Interrupt ID897 Priority/Priority Byte Offset 897 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID896 ,Interrupt ID896 Priority/Priority Byte Offset 896 "
|
|
group.long 0x784++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID903 ,Interrupt ID903 Priority/Priority Byte Offset 903 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID902 ,Interrupt ID902 Priority/Priority Byte Offset 902 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID901 ,Interrupt ID901 Priority/Priority Byte Offset 901 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID900 ,Interrupt ID900 Priority/Priority Byte Offset 900 "
|
|
group.long 0x788++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID907 ,Interrupt ID907 Priority/Priority Byte Offset 907 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID906 ,Interrupt ID906 Priority/Priority Byte Offset 906 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID905 ,Interrupt ID905 Priority/Priority Byte Offset 905 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID904 ,Interrupt ID904 Priority/Priority Byte Offset 904 "
|
|
group.long 0x78C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID911 ,Interrupt ID911 Priority/Priority Byte Offset 911 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID910 ,Interrupt ID910 Priority/Priority Byte Offset 910 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID909 ,Interrupt ID909 Priority/Priority Byte Offset 909 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID908 ,Interrupt ID908 Priority/Priority Byte Offset 908 "
|
|
group.long 0x790++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID915 ,Interrupt ID915 Priority/Priority Byte Offset 915 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID914 ,Interrupt ID914 Priority/Priority Byte Offset 914 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID913 ,Interrupt ID913 Priority/Priority Byte Offset 913 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID912 ,Interrupt ID912 Priority/Priority Byte Offset 912 "
|
|
group.long 0x794++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID919 ,Interrupt ID919 Priority/Priority Byte Offset 919 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID918 ,Interrupt ID918 Priority/Priority Byte Offset 918 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID917 ,Interrupt ID917 Priority/Priority Byte Offset 917 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID916 ,Interrupt ID916 Priority/Priority Byte Offset 916 "
|
|
group.long 0x798++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID923 ,Interrupt ID923 Priority/Priority Byte Offset 923 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID922 ,Interrupt ID922 Priority/Priority Byte Offset 922 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID921 ,Interrupt ID921 Priority/Priority Byte Offset 921 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID920 ,Interrupt ID920 Priority/Priority Byte Offset 920 "
|
|
group.long 0x79C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID927 ,Interrupt ID927 Priority/Priority Byte Offset 927 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID926 ,Interrupt ID926 Priority/Priority Byte Offset 926 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID925 ,Interrupt ID925 Priority/Priority Byte Offset 925 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID924 ,Interrupt ID924 Priority/Priority Byte Offset 924 "
|
|
else
|
|
hgroup.long 0x780++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224"
|
|
hgroup.long 0x784++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225"
|
|
hgroup.long 0x788++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226"
|
|
hgroup.long 0x78C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227"
|
|
hgroup.long 0x790++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228"
|
|
hgroup.long 0x794++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229"
|
|
hgroup.long 0x798++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230"
|
|
hgroup.long 0x79C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0x7A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID931 ,Interrupt ID931 Priority/Priority Byte Offset 931 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID930 ,Interrupt ID930 Priority/Priority Byte Offset 930 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID929 ,Interrupt ID929 Priority/Priority Byte Offset 929 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID928 ,Interrupt ID928 Priority/Priority Byte Offset 928 "
|
|
group.long 0x7A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID935 ,Interrupt ID935 Priority/Priority Byte Offset 935 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID934 ,Interrupt ID934 Priority/Priority Byte Offset 934 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID933 ,Interrupt ID933 Priority/Priority Byte Offset 933 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID932 ,Interrupt ID932 Priority/Priority Byte Offset 932 "
|
|
group.long 0x7A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID939 ,Interrupt ID939 Priority/Priority Byte Offset 939 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID938 ,Interrupt ID938 Priority/Priority Byte Offset 938 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID937 ,Interrupt ID937 Priority/Priority Byte Offset 937 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID936 ,Interrupt ID936 Priority/Priority Byte Offset 936 "
|
|
group.long 0x7AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID943 ,Interrupt ID943 Priority/Priority Byte Offset 943 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID942 ,Interrupt ID942 Priority/Priority Byte Offset 942 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID941 ,Interrupt ID941 Priority/Priority Byte Offset 941 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID940 ,Interrupt ID940 Priority/Priority Byte Offset 940 "
|
|
group.long 0x7B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID947 ,Interrupt ID947 Priority/Priority Byte Offset 947 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID946 ,Interrupt ID946 Priority/Priority Byte Offset 946 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID945 ,Interrupt ID945 Priority/Priority Byte Offset 945 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID944 ,Interrupt ID944 Priority/Priority Byte Offset 944 "
|
|
group.long 0x7B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID951 ,Interrupt ID951 Priority/Priority Byte Offset 951 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID950 ,Interrupt ID950 Priority/Priority Byte Offset 950 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID949 ,Interrupt ID949 Priority/Priority Byte Offset 949 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID948 ,Interrupt ID948 Priority/Priority Byte Offset 948 "
|
|
group.long 0x7B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID955 ,Interrupt ID955 Priority/Priority Byte Offset 955 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID954 ,Interrupt ID954 Priority/Priority Byte Offset 954 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID953 ,Interrupt ID953 Priority/Priority Byte Offset 953 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID952 ,Interrupt ID952 Priority/Priority Byte Offset 952 "
|
|
group.long 0x7BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID959 ,Interrupt ID959 Priority/Priority Byte Offset 959 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID958 ,Interrupt ID958 Priority/Priority Byte Offset 958 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID957 ,Interrupt ID957 Priority/Priority Byte Offset 957 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID956 ,Interrupt ID956 Priority/Priority Byte Offset 956 "
|
|
else
|
|
hgroup.long 0x7A0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232"
|
|
hgroup.long 0x7A4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233"
|
|
hgroup.long 0x7A8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234"
|
|
hgroup.long 0x7AC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235"
|
|
hgroup.long 0x7B0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236"
|
|
hgroup.long 0x7B4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237"
|
|
hgroup.long 0x7B8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238"
|
|
hgroup.long 0x7BC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0x7C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID963 ,Interrupt ID963 Priority/Priority Byte Offset 963 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID962 ,Interrupt ID962 Priority/Priority Byte Offset 962 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID961 ,Interrupt ID961 Priority/Priority Byte Offset 961 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID960 ,Interrupt ID960 Priority/Priority Byte Offset 960 "
|
|
group.long 0x7C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID967 ,Interrupt ID967 Priority/Priority Byte Offset 967 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID966 ,Interrupt ID966 Priority/Priority Byte Offset 966 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID965 ,Interrupt ID965 Priority/Priority Byte Offset 965 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID964 ,Interrupt ID964 Priority/Priority Byte Offset 964 "
|
|
group.long 0x7C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID971 ,Interrupt ID971 Priority/Priority Byte Offset 971 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID970 ,Interrupt ID970 Priority/Priority Byte Offset 970 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID969 ,Interrupt ID969 Priority/Priority Byte Offset 969 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID968 ,Interrupt ID968 Priority/Priority Byte Offset 968 "
|
|
group.long 0x7CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID975 ,Interrupt ID975 Priority/Priority Byte Offset 975 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID974 ,Interrupt ID974 Priority/Priority Byte Offset 974 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID973 ,Interrupt ID973 Priority/Priority Byte Offset 973 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID972 ,Interrupt ID972 Priority/Priority Byte Offset 972 "
|
|
group.long 0x7D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID979 ,Interrupt ID979 Priority/Priority Byte Offset 979 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID978 ,Interrupt ID978 Priority/Priority Byte Offset 978 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID977 ,Interrupt ID977 Priority/Priority Byte Offset 977 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID976 ,Interrupt ID976 Priority/Priority Byte Offset 976 "
|
|
group.long 0x7D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID983 ,Interrupt ID983 Priority/Priority Byte Offset 983 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID982 ,Interrupt ID982 Priority/Priority Byte Offset 982 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID981 ,Interrupt ID981 Priority/Priority Byte Offset 981 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID980 ,Interrupt ID980 Priority/Priority Byte Offset 980 "
|
|
group.long 0x7D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID987 ,Interrupt ID987 Priority/Priority Byte Offset 987 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID986 ,Interrupt ID986 Priority/Priority Byte Offset 986 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID985 ,Interrupt ID985 Priority/Priority Byte Offset 985 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID984 ,Interrupt ID984 Priority/Priority Byte Offset 984 "
|
|
group.long 0x7DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID991 ,Interrupt ID991 Priority/Priority Byte Offset 991 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID990 ,Interrupt ID990 Priority/Priority Byte Offset 990 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID989 ,Interrupt ID989 Priority/Priority Byte Offset 989 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID988 ,Interrupt ID988 Priority/Priority Byte Offset 988 "
|
|
else
|
|
hgroup.long 0x7C0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240"
|
|
hgroup.long 0x7C4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241"
|
|
hgroup.long 0x7C8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242"
|
|
hgroup.long 0x7CC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243"
|
|
hgroup.long 0x7D0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244"
|
|
hgroup.long 0x7D4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245"
|
|
hgroup.long 0x7D8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246"
|
|
hgroup.long 0x7DC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1F)
|
|
group.long 0x7E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID995 ,Interrupt ID995 Priority/Priority Byte Offset 995 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID994 ,Interrupt ID994 Priority/Priority Byte Offset 994 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID993 ,Interrupt ID993 Priority/Priority Byte Offset 993 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID992 ,Interrupt ID992 Priority/Priority Byte Offset 992 "
|
|
group.long 0x7E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID999 ,Interrupt ID999 Priority/Priority Byte Offset 999 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID998 ,Interrupt ID998 Priority/Priority Byte Offset 998 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID997 ,Interrupt ID997 Priority/Priority Byte Offset 997 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID996 ,Interrupt ID996 Priority/Priority Byte Offset 996 "
|
|
group.long 0x7E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID1003 ,Interrupt ID1003 Priority/Priority Byte Offset 1003"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID1002 ,Interrupt ID1002 Priority/Priority Byte Offset 1002"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1001 ,Interrupt ID1001 Priority/Priority Byte Offset 1001"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID1000 ,Interrupt ID1000 Priority/Priority Byte Offset 1000"
|
|
group.long 0x7EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID1007 ,Interrupt ID1007 Priority/Priority Byte Offset 1007"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID1006 ,Interrupt ID1006 Priority/Priority Byte Offset 1006"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1005 ,Interrupt ID1005 Priority/Priority Byte Offset 1005"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID1004 ,Interrupt ID1004 Priority/Priority Byte Offset 1004"
|
|
group.long 0x7F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID1011 ,Interrupt ID1011 Priority/Priority Byte Offset 1011"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID1010 ,Interrupt ID1010 Priority/Priority Byte Offset 1010"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1009 ,Interrupt ID1009 Priority/Priority Byte Offset 1009"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID1008 ,Interrupt ID1008 Priority/Priority Byte Offset 1008"
|
|
group.long 0x7F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID1015 ,Interrupt ID1015 Priority/Priority Byte Offset 1015"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID1014 ,Interrupt ID1014 Priority/Priority Byte Offset 1014"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1013 ,Interrupt ID1013 Priority/Priority Byte Offset 1013"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID1012 ,Interrupt ID1012 Priority/Priority Byte Offset 1012"
|
|
group.long 0x7F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID1019 ,Interrupt ID1019 Priority/Priority Byte Offset 1019"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID1018 ,Interrupt ID1018 Priority/Priority Byte Offset 1018"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1017 ,Interrupt ID1017 Priority/Priority Byte Offset 1017"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID1016 ,Interrupt ID1016 Priority/Priority Byte Offset 1016"
|
|
else
|
|
hgroup.long 0x7E0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248"
|
|
hgroup.long 0x7E4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249"
|
|
hgroup.long 0x7E8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250"
|
|
hgroup.long 0x7EC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251"
|
|
hgroup.long 0x7F0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252"
|
|
hgroup.long 0x7F4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253"
|
|
hgroup.long 0x7F8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254"
|
|
endif
|
|
tree.end
|
|
width 19.
|
|
tree "Processor Targets Registers"
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x000000E0)>0x1)
|
|
rgroup.long 0x800++0x03
|
|
line.long 0x00 "GICD_ITARGETSR0,Interrupt Processor Targets Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0 "
|
|
rgroup.long 0x804++0x03
|
|
line.long 0x00 "GICD_ITARGETSR1,Interrupt Processor Targets Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO7 ,CPU Targets Byte Offset 7 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO6 ,CPU Targets Byte Offset 6 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO5 ,CPU Targets Byte Offset 5 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO4 ,CPU Targets Byte Offset 4 "
|
|
rgroup.long 0x808++0x03
|
|
line.long 0x00 "GICD_ITARGETSR2,Interrupt Processor Targets Register 2"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO11 ,CPU Targets Byte Offset 11 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO10 ,CPU Targets Byte Offset 10 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO9 ,CPU Targets Byte Offset 9 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO8 ,CPU Targets Byte Offset 8 "
|
|
rgroup.long 0x80C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR3,Interrupt Processor Targets Register 3"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO15 ,CPU Targets Byte Offset 15 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO14 ,CPU Targets Byte Offset 14 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO13 ,CPU Targets Byte Offset 13 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO12 ,CPU Targets Byte Offset 12 "
|
|
rgroup.long 0x810++0x03
|
|
line.long 0x00 "GICD_ITARGETSR4,Interrupt Processor Targets Register 4"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO19 ,CPU Targets Byte Offset 19 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO18 ,CPU Targets Byte Offset 18 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO17 ,CPU Targets Byte Offset 17 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO16 ,CPU Targets Byte Offset 16 "
|
|
rgroup.long 0x814++0x03
|
|
line.long 0x00 "GICD_ITARGETSR5,Interrupt Processor Targets Register 5"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO23 ,CPU Targets Byte Offset 23 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO22 ,CPU Targets Byte Offset 22 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO21 ,CPU Targets Byte Offset 21 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO20 ,CPU Targets Byte Offset 20 "
|
|
rgroup.long 0x818++0x03
|
|
line.long 0x00 "GICD_ITARGETSR6,Interrupt Processor Targets Register 6"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO27 ,CPU Targets Byte Offset 27 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO26 ,CPU Targets Byte Offset 26 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO25 ,CPU Targets Byte Offset 25 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO24 ,CPU Targets Byte Offset 24 "
|
|
rgroup.long 0x81C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR7,Interrupt Processor Targets Register 7"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO31 ,CPU Targets Byte Offset 31 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO30 ,CPU Targets Byte Offset 30 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO29 ,CPU Targets Byte Offset 29 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO28 ,CPU Targets Byte Offset 28 "
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x01)
|
|
group.long 0x820++0x03
|
|
line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO35 ,CPU Targets Byte Offset 35 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO34 ,CPU Targets Byte Offset 34 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO33 ,CPU Targets Byte Offset 33 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO32 ,CPU Targets Byte Offset 32 "
|
|
group.long 0x824++0x03
|
|
line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO39 ,CPU Targets Byte Offset 39 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO38 ,CPU Targets Byte Offset 38 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO37 ,CPU Targets Byte Offset 37 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO36 ,CPU Targets Byte Offset 36 "
|
|
group.long 0x828++0x03
|
|
line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO43 ,CPU Targets Byte Offset 43 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO42 ,CPU Targets Byte Offset 42 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO41 ,CPU Targets Byte Offset 41 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO40 ,CPU Targets Byte Offset 40 "
|
|
group.long 0x82C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO47 ,CPU Targets Byte Offset 47 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO46 ,CPU Targets Byte Offset 46 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO45 ,CPU Targets Byte Offset 45 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO44 ,CPU Targets Byte Offset 44 "
|
|
group.long 0x830++0x03
|
|
line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO51 ,CPU Targets Byte Offset 51 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO50 ,CPU Targets Byte Offset 50 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO49 ,CPU Targets Byte Offset 49 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO48 ,CPU Targets Byte Offset 48 "
|
|
group.long 0x834++0x03
|
|
line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO55 ,CPU Targets Byte Offset 55 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO54 ,CPU Targets Byte Offset 54 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO53 ,CPU Targets Byte Offset 53 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO52 ,CPU Targets Byte Offset 52 "
|
|
group.long 0x838++0x03
|
|
line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO59 ,CPU Targets Byte Offset 59 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO58 ,CPU Targets Byte Offset 58 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO57 ,CPU Targets Byte Offset 57 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO56 ,CPU Targets Byte Offset 56 "
|
|
group.long 0x83C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO63 ,CPU Targets Byte Offset 63 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO62 ,CPU Targets Byte Offset 62 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO61 ,CPU Targets Byte Offset 61 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO60 ,CPU Targets Byte Offset 60 "
|
|
else
|
|
hgroup.long 0x820++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8"
|
|
hgroup.long 0x824++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9"
|
|
hgroup.long 0x828++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10"
|
|
hgroup.long 0x82C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11"
|
|
hgroup.long 0x830++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12"
|
|
hgroup.long 0x834++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13"
|
|
hgroup.long 0x838++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14"
|
|
hgroup.long 0x83C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x02)
|
|
group.long 0x840++0x03
|
|
line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO67 ,CPU Targets Byte Offset 67 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO66 ,CPU Targets Byte Offset 66 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO65 ,CPU Targets Byte Offset 65 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO64 ,CPU Targets Byte Offset 64 "
|
|
group.long 0x844++0x03
|
|
line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO71 ,CPU Targets Byte Offset 71 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO70 ,CPU Targets Byte Offset 70 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO69 ,CPU Targets Byte Offset 69 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO68 ,CPU Targets Byte Offset 68 "
|
|
group.long 0x848++0x03
|
|
line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO75 ,CPU Targets Byte Offset 75 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO74 ,CPU Targets Byte Offset 74 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO73 ,CPU Targets Byte Offset 73 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO72 ,CPU Targets Byte Offset 72 "
|
|
group.long 0x84C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO79 ,CPU Targets Byte Offset 79 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO78 ,CPU Targets Byte Offset 78 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO77 ,CPU Targets Byte Offset 77 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO76 ,CPU Targets Byte Offset 76 "
|
|
group.long 0x850++0x03
|
|
line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO83 ,CPU Targets Byte Offset 83 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO82 ,CPU Targets Byte Offset 82 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO81 ,CPU Targets Byte Offset 81 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO80 ,CPU Targets Byte Offset 80 "
|
|
group.long 0x854++0x03
|
|
line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO87 ,CPU Targets Byte Offset 87 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO86 ,CPU Targets Byte Offset 86 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO85 ,CPU Targets Byte Offset 85 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO84 ,CPU Targets Byte Offset 84 "
|
|
group.long 0x858++0x03
|
|
line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO91 ,CPU Targets Byte Offset 91 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO90 ,CPU Targets Byte Offset 90 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO89 ,CPU Targets Byte Offset 89 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO88 ,CPU Targets Byte Offset 88 "
|
|
group.long 0x85C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO95 ,CPU Targets Byte Offset 95 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO94 ,CPU Targets Byte Offset 94 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO93 ,CPU Targets Byte Offset 93 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO92 ,CPU Targets Byte Offset 92 "
|
|
else
|
|
hgroup.long 0x840++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16"
|
|
hgroup.long 0x844++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17"
|
|
hgroup.long 0x848++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18"
|
|
hgroup.long 0x84C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19"
|
|
hgroup.long 0x850++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20"
|
|
hgroup.long 0x854++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21"
|
|
hgroup.long 0x858++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22"
|
|
hgroup.long 0x85C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x03)
|
|
group.long 0x860++0x03
|
|
line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO99 ,CPU Targets Byte Offset 99 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO98 ,CPU Targets Byte Offset 98 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO97 ,CPU Targets Byte Offset 97 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO96 ,CPU Targets Byte Offset 96 "
|
|
group.long 0x864++0x03
|
|
line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO103 ,CPU Targets Byte Offset 103 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO102 ,CPU Targets Byte Offset 102 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO101 ,CPU Targets Byte Offset 101 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO100 ,CPU Targets Byte Offset 100 "
|
|
group.long 0x868++0x03
|
|
line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO107 ,CPU Targets Byte Offset 107 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO106 ,CPU Targets Byte Offset 106 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO105 ,CPU Targets Byte Offset 105 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO104 ,CPU Targets Byte Offset 104 "
|
|
group.long 0x86C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO111 ,CPU Targets Byte Offset 111 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO110 ,CPU Targets Byte Offset 110 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO109 ,CPU Targets Byte Offset 109 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO108 ,CPU Targets Byte Offset 108 "
|
|
group.long 0x870++0x03
|
|
line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO115 ,CPU Targets Byte Offset 115 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO114 ,CPU Targets Byte Offset 114 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO113 ,CPU Targets Byte Offset 113 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO112 ,CPU Targets Byte Offset 112 "
|
|
group.long 0x874++0x03
|
|
line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO119 ,CPU Targets Byte Offset 119 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO118 ,CPU Targets Byte Offset 118 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO117 ,CPU Targets Byte Offset 117 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO116 ,CPU Targets Byte Offset 116 "
|
|
group.long 0x878++0x03
|
|
line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO123 ,CPU Targets Byte Offset 123 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO122 ,CPU Targets Byte Offset 122 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO121 ,CPU Targets Byte Offset 121 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO120 ,CPU Targets Byte Offset 120 "
|
|
group.long 0x87C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO127 ,CPU Targets Byte Offset 127 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO126 ,CPU Targets Byte Offset 126 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO125 ,CPU Targets Byte Offset 125 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO124 ,CPU Targets Byte Offset 124 "
|
|
else
|
|
hgroup.long 0x860++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24"
|
|
hgroup.long 0x864++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25"
|
|
hgroup.long 0x868++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26"
|
|
hgroup.long 0x86C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27"
|
|
hgroup.long 0x870++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28"
|
|
hgroup.long 0x874++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29"
|
|
hgroup.long 0x878++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30"
|
|
hgroup.long 0x87C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x04)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO131 ,CPU Targets Byte Offset 131 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO130 ,CPU Targets Byte Offset 130 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO129 ,CPU Targets Byte Offset 129 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO128 ,CPU Targets Byte Offset 128 "
|
|
group.long 0x884++0x03
|
|
line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO135 ,CPU Targets Byte Offset 135 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO134 ,CPU Targets Byte Offset 134 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO133 ,CPU Targets Byte Offset 133 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO132 ,CPU Targets Byte Offset 132 "
|
|
group.long 0x888++0x03
|
|
line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO139 ,CPU Targets Byte Offset 139 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO138 ,CPU Targets Byte Offset 138 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO137 ,CPU Targets Byte Offset 137 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO136 ,CPU Targets Byte Offset 136 "
|
|
group.long 0x88C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO143 ,CPU Targets Byte Offset 143 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO142 ,CPU Targets Byte Offset 142 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO141 ,CPU Targets Byte Offset 141 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO140 ,CPU Targets Byte Offset 140 "
|
|
group.long 0x890++0x03
|
|
line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO147 ,CPU Targets Byte Offset 147 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO146 ,CPU Targets Byte Offset 146 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO145 ,CPU Targets Byte Offset 145 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO144 ,CPU Targets Byte Offset 144 "
|
|
group.long 0x894++0x03
|
|
line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO151 ,CPU Targets Byte Offset 151 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO150 ,CPU Targets Byte Offset 150 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO149 ,CPU Targets Byte Offset 149 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO148 ,CPU Targets Byte Offset 148 "
|
|
group.long 0x898++0x03
|
|
line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO155 ,CPU Targets Byte Offset 155 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO154 ,CPU Targets Byte Offset 154 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO153 ,CPU Targets Byte Offset 153 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO152 ,CPU Targets Byte Offset 152 "
|
|
group.long 0x89C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO159 ,CPU Targets Byte Offset 159 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO158 ,CPU Targets Byte Offset 158 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO157 ,CPU Targets Byte Offset 157 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO156 ,CPU Targets Byte Offset 156 "
|
|
else
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32"
|
|
hgroup.long 0x884++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33"
|
|
hgroup.long 0x888++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34"
|
|
hgroup.long 0x88C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35"
|
|
hgroup.long 0x890++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36"
|
|
hgroup.long 0x894++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37"
|
|
hgroup.long 0x898++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38"
|
|
hgroup.long 0x89C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x05)
|
|
group.long 0x8A0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO163 ,CPU Targets Byte Offset 163 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO162 ,CPU Targets Byte Offset 162 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO161 ,CPU Targets Byte Offset 161 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO160 ,CPU Targets Byte Offset 160 "
|
|
group.long 0x8A4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO167 ,CPU Targets Byte Offset 167 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO166 ,CPU Targets Byte Offset 166 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO165 ,CPU Targets Byte Offset 165 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO164 ,CPU Targets Byte Offset 164 "
|
|
group.long 0x8A8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO171 ,CPU Targets Byte Offset 171 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO170 ,CPU Targets Byte Offset 170 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO169 ,CPU Targets Byte Offset 169 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO168 ,CPU Targets Byte Offset 168 "
|
|
group.long 0x8AC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO175 ,CPU Targets Byte Offset 175 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO174 ,CPU Targets Byte Offset 174 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO173 ,CPU Targets Byte Offset 173 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO172 ,CPU Targets Byte Offset 172 "
|
|
group.long 0x8B0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO179 ,CPU Targets Byte Offset 179 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO178 ,CPU Targets Byte Offset 178 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO177 ,CPU Targets Byte Offset 177 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO176 ,CPU Targets Byte Offset 176 "
|
|
group.long 0x8B4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO183 ,CPU Targets Byte Offset 183 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO182 ,CPU Targets Byte Offset 182 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO181 ,CPU Targets Byte Offset 181 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO180 ,CPU Targets Byte Offset 180 "
|
|
group.long 0x8B8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO187 ,CPU Targets Byte Offset 187 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO186 ,CPU Targets Byte Offset 186 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO185 ,CPU Targets Byte Offset 185 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO184 ,CPU Targets Byte Offset 184 "
|
|
group.long 0x8BC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO191 ,CPU Targets Byte Offset 191 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO190 ,CPU Targets Byte Offset 190 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO189 ,CPU Targets Byte Offset 189 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO188 ,CPU Targets Byte Offset 188 "
|
|
else
|
|
hgroup.long 0x8A0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40"
|
|
hgroup.long 0x8A4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41"
|
|
hgroup.long 0x8A8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42"
|
|
hgroup.long 0x8AC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43"
|
|
hgroup.long 0x8B0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44"
|
|
hgroup.long 0x8B4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45"
|
|
hgroup.long 0x8B8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46"
|
|
hgroup.long 0x8BC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x06)
|
|
group.long 0x8C0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO195 ,CPU Targets Byte Offset 195 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO194 ,CPU Targets Byte Offset 194 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO193 ,CPU Targets Byte Offset 193 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO192 ,CPU Targets Byte Offset 192 "
|
|
group.long 0x8C4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO199 ,CPU Targets Byte Offset 199 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO198 ,CPU Targets Byte Offset 198 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO197 ,CPU Targets Byte Offset 197 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO196 ,CPU Targets Byte Offset 196 "
|
|
group.long 0x8C8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO203 ,CPU Targets Byte Offset 203 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO202 ,CPU Targets Byte Offset 202 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO201 ,CPU Targets Byte Offset 201 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO200 ,CPU Targets Byte Offset 200 "
|
|
group.long 0x8CC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO207 ,CPU Targets Byte Offset 207 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO206 ,CPU Targets Byte Offset 206 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO205 ,CPU Targets Byte Offset 205 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO204 ,CPU Targets Byte Offset 204 "
|
|
group.long 0x8D0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO211 ,CPU Targets Byte Offset 211 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO210 ,CPU Targets Byte Offset 210 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO209 ,CPU Targets Byte Offset 209 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO208 ,CPU Targets Byte Offset 208 "
|
|
group.long 0x8D4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO215 ,CPU Targets Byte Offset 215 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO214 ,CPU Targets Byte Offset 214 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO213 ,CPU Targets Byte Offset 213 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO212 ,CPU Targets Byte Offset 212 "
|
|
group.long 0x8D8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO219 ,CPU Targets Byte Offset 219 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO218 ,CPU Targets Byte Offset 218 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO217 ,CPU Targets Byte Offset 217 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO216 ,CPU Targets Byte Offset 216 "
|
|
group.long 0x8DC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO223 ,CPU Targets Byte Offset 223 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO222 ,CPU Targets Byte Offset 222 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO221 ,CPU Targets Byte Offset 221 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO220 ,CPU Targets Byte Offset 220 "
|
|
else
|
|
hgroup.long 0x8C0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48"
|
|
hgroup.long 0x8C4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49"
|
|
hgroup.long 0x8C8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50"
|
|
hgroup.long 0x8CC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51"
|
|
hgroup.long 0x8D0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52"
|
|
hgroup.long 0x8D4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53"
|
|
hgroup.long 0x8D8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54"
|
|
hgroup.long 0x8DC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x07)
|
|
group.long 0x8E0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO227 ,CPU Targets Byte Offset 227 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO226 ,CPU Targets Byte Offset 226 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO225 ,CPU Targets Byte Offset 225 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO224 ,CPU Targets Byte Offset 224 "
|
|
group.long 0x8E4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO231 ,CPU Targets Byte Offset 231 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO230 ,CPU Targets Byte Offset 230 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO229 ,CPU Targets Byte Offset 229 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO228 ,CPU Targets Byte Offset 228 "
|
|
group.long 0x8E8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO235 ,CPU Targets Byte Offset 235 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO234 ,CPU Targets Byte Offset 234 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO233 ,CPU Targets Byte Offset 233 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO232 ,CPU Targets Byte Offset 232 "
|
|
group.long 0x8EC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO239 ,CPU Targets Byte Offset 239 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO238 ,CPU Targets Byte Offset 238 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO237 ,CPU Targets Byte Offset 237 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO236 ,CPU Targets Byte Offset 236 "
|
|
group.long 0x8F0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO243 ,CPU Targets Byte Offset 243 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO242 ,CPU Targets Byte Offset 242 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO241 ,CPU Targets Byte Offset 241 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO240 ,CPU Targets Byte Offset 240 "
|
|
group.long 0x8F4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO247 ,CPU Targets Byte Offset 247 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO246 ,CPU Targets Byte Offset 246 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO245 ,CPU Targets Byte Offset 245 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO244 ,CPU Targets Byte Offset 244 "
|
|
group.long 0x8F8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO251 ,CPU Targets Byte Offset 251 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO250 ,CPU Targets Byte Offset 250 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO249 ,CPU Targets Byte Offset 249 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO248 ,CPU Targets Byte Offset 248 "
|
|
group.long 0x8FC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO255 ,CPU Targets Byte Offset 255 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO254 ,CPU Targets Byte Offset 254 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO253 ,CPU Targets Byte Offset 253 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO252 ,CPU Targets Byte Offset 252 "
|
|
else
|
|
hgroup.long 0x8E0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56"
|
|
hgroup.long 0x8E4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57"
|
|
hgroup.long 0x8E8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58"
|
|
hgroup.long 0x8EC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59"
|
|
hgroup.long 0x8F0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60"
|
|
hgroup.long 0x8F4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61"
|
|
hgroup.long 0x8F8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62"
|
|
hgroup.long 0x8FC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x08)
|
|
group.long 0x900++0x03
|
|
line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO259 ,CPU Targets Byte Offset 259 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO258 ,CPU Targets Byte Offset 258 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO257 ,CPU Targets Byte Offset 257 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO256 ,CPU Targets Byte Offset 256 "
|
|
group.long 0x904++0x03
|
|
line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO263 ,CPU Targets Byte Offset 263 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO262 ,CPU Targets Byte Offset 262 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO261 ,CPU Targets Byte Offset 261 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO260 ,CPU Targets Byte Offset 260 "
|
|
group.long 0x908++0x03
|
|
line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO267 ,CPU Targets Byte Offset 267 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO266 ,CPU Targets Byte Offset 266 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO265 ,CPU Targets Byte Offset 265 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO264 ,CPU Targets Byte Offset 264 "
|
|
group.long 0x90C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO271 ,CPU Targets Byte Offset 271 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO270 ,CPU Targets Byte Offset 270 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO269 ,CPU Targets Byte Offset 269 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO268 ,CPU Targets Byte Offset 268 "
|
|
group.long 0x910++0x03
|
|
line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO275 ,CPU Targets Byte Offset 275 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO274 ,CPU Targets Byte Offset 274 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO273 ,CPU Targets Byte Offset 273 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO272 ,CPU Targets Byte Offset 272 "
|
|
group.long 0x914++0x03
|
|
line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO279 ,CPU Targets Byte Offset 279 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO278 ,CPU Targets Byte Offset 278 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO277 ,CPU Targets Byte Offset 277 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO276 ,CPU Targets Byte Offset 276 "
|
|
group.long 0x918++0x03
|
|
line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO283 ,CPU Targets Byte Offset 283 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO282 ,CPU Targets Byte Offset 282 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO281 ,CPU Targets Byte Offset 281 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO280 ,CPU Targets Byte Offset 280 "
|
|
group.long 0x91C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO287 ,CPU Targets Byte Offset 287 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO286 ,CPU Targets Byte Offset 286 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO285 ,CPU Targets Byte Offset 285 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO284 ,CPU Targets Byte Offset 284 "
|
|
else
|
|
hgroup.long 0x900++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64"
|
|
hgroup.long 0x904++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65"
|
|
hgroup.long 0x908++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66"
|
|
hgroup.long 0x90C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67"
|
|
hgroup.long 0x910++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68"
|
|
hgroup.long 0x914++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69"
|
|
hgroup.long 0x918++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70"
|
|
hgroup.long 0x91C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x09)
|
|
group.long 0x920++0x03
|
|
line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO291 ,CPU Targets Byte Offset 291 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO290 ,CPU Targets Byte Offset 290 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO289 ,CPU Targets Byte Offset 289 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO288 ,CPU Targets Byte Offset 288 "
|
|
group.long 0x924++0x03
|
|
line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO295 ,CPU Targets Byte Offset 295 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO294 ,CPU Targets Byte Offset 294 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO293 ,CPU Targets Byte Offset 293 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO292 ,CPU Targets Byte Offset 292 "
|
|
group.long 0x928++0x03
|
|
line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO299 ,CPU Targets Byte Offset 299 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO298 ,CPU Targets Byte Offset 298 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO297 ,CPU Targets Byte Offset 297 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO296 ,CPU Targets Byte Offset 296 "
|
|
group.long 0x92C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO303 ,CPU Targets Byte Offset 303 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO302 ,CPU Targets Byte Offset 302 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO301 ,CPU Targets Byte Offset 301 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO300 ,CPU Targets Byte Offset 300 "
|
|
group.long 0x930++0x03
|
|
line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO307 ,CPU Targets Byte Offset 307 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO306 ,CPU Targets Byte Offset 306 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO305 ,CPU Targets Byte Offset 305 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO304 ,CPU Targets Byte Offset 304 "
|
|
group.long 0x934++0x03
|
|
line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO311 ,CPU Targets Byte Offset 311 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO310 ,CPU Targets Byte Offset 310 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO309 ,CPU Targets Byte Offset 309 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO308 ,CPU Targets Byte Offset 308 "
|
|
group.long 0x938++0x03
|
|
line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO315 ,CPU Targets Byte Offset 315 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO314 ,CPU Targets Byte Offset 314 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO313 ,CPU Targets Byte Offset 313 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO312 ,CPU Targets Byte Offset 312 "
|
|
group.long 0x93C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO319 ,CPU Targets Byte Offset 319 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO318 ,CPU Targets Byte Offset 318 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO317 ,CPU Targets Byte Offset 317 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO316 ,CPU Targets Byte Offset 316 "
|
|
else
|
|
hgroup.long 0x920++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72"
|
|
hgroup.long 0x924++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73"
|
|
hgroup.long 0x928++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74"
|
|
hgroup.long 0x92C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75"
|
|
hgroup.long 0x930++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76"
|
|
hgroup.long 0x934++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77"
|
|
hgroup.long 0x938++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78"
|
|
hgroup.long 0x93C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0A)
|
|
group.long 0x940++0x03
|
|
line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO323 ,CPU Targets Byte Offset 323 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO322 ,CPU Targets Byte Offset 322 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO321 ,CPU Targets Byte Offset 321 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO320 ,CPU Targets Byte Offset 320 "
|
|
group.long 0x944++0x03
|
|
line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO327 ,CPU Targets Byte Offset 327 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO326 ,CPU Targets Byte Offset 326 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO325 ,CPU Targets Byte Offset 325 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO324 ,CPU Targets Byte Offset 324 "
|
|
group.long 0x948++0x03
|
|
line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO331 ,CPU Targets Byte Offset 331 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO330 ,CPU Targets Byte Offset 330 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO329 ,CPU Targets Byte Offset 329 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO328 ,CPU Targets Byte Offset 328 "
|
|
group.long 0x94C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO335 ,CPU Targets Byte Offset 335 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO334 ,CPU Targets Byte Offset 334 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO333 ,CPU Targets Byte Offset 333 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO332 ,CPU Targets Byte Offset 332 "
|
|
group.long 0x950++0x03
|
|
line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO339 ,CPU Targets Byte Offset 339 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO338 ,CPU Targets Byte Offset 338 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO337 ,CPU Targets Byte Offset 337 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO336 ,CPU Targets Byte Offset 336 "
|
|
group.long 0x954++0x03
|
|
line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO343 ,CPU Targets Byte Offset 343 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO342 ,CPU Targets Byte Offset 342 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO341 ,CPU Targets Byte Offset 341 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO340 ,CPU Targets Byte Offset 340 "
|
|
group.long 0x958++0x03
|
|
line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO347 ,CPU Targets Byte Offset 347 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO346 ,CPU Targets Byte Offset 346 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO345 ,CPU Targets Byte Offset 345 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO344 ,CPU Targets Byte Offset 344 "
|
|
group.long 0x95C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO351 ,CPU Targets Byte Offset 351 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO350 ,CPU Targets Byte Offset 350 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO349 ,CPU Targets Byte Offset 349 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO348 ,CPU Targets Byte Offset 348 "
|
|
else
|
|
hgroup.long 0x940++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80"
|
|
hgroup.long 0x944++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81"
|
|
hgroup.long 0x948++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82"
|
|
hgroup.long 0x94C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83"
|
|
hgroup.long 0x950++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84"
|
|
hgroup.long 0x954++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85"
|
|
hgroup.long 0x958++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86"
|
|
hgroup.long 0x95C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0B)
|
|
group.long 0x960++0x03
|
|
line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO355 ,CPU Targets Byte Offset 355 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO354 ,CPU Targets Byte Offset 354 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO353 ,CPU Targets Byte Offset 353 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO352 ,CPU Targets Byte Offset 352 "
|
|
group.long 0x964++0x03
|
|
line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO359 ,CPU Targets Byte Offset 359 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO358 ,CPU Targets Byte Offset 358 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO357 ,CPU Targets Byte Offset 357 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO356 ,CPU Targets Byte Offset 356 "
|
|
group.long 0x968++0x03
|
|
line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO363 ,CPU Targets Byte Offset 363 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO362 ,CPU Targets Byte Offset 362 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO361 ,CPU Targets Byte Offset 361 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO360 ,CPU Targets Byte Offset 360 "
|
|
group.long 0x96C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO367 ,CPU Targets Byte Offset 367 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO366 ,CPU Targets Byte Offset 366 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO365 ,CPU Targets Byte Offset 365 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO364 ,CPU Targets Byte Offset 364 "
|
|
group.long 0x970++0x03
|
|
line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO371 ,CPU Targets Byte Offset 371 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO370 ,CPU Targets Byte Offset 370 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO369 ,CPU Targets Byte Offset 369 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO368 ,CPU Targets Byte Offset 368 "
|
|
group.long 0x974++0x03
|
|
line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO375 ,CPU Targets Byte Offset 375 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO374 ,CPU Targets Byte Offset 374 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO373 ,CPU Targets Byte Offset 373 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO372 ,CPU Targets Byte Offset 372 "
|
|
group.long 0x978++0x03
|
|
line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO379 ,CPU Targets Byte Offset 379 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO378 ,CPU Targets Byte Offset 378 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO377 ,CPU Targets Byte Offset 377 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO376 ,CPU Targets Byte Offset 376 "
|
|
group.long 0x97C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO383 ,CPU Targets Byte Offset 383 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO382 ,CPU Targets Byte Offset 382 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO381 ,CPU Targets Byte Offset 381 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO380 ,CPU Targets Byte Offset 380 "
|
|
else
|
|
hgroup.long 0x960++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88"
|
|
hgroup.long 0x964++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89"
|
|
hgroup.long 0x968++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90"
|
|
hgroup.long 0x96C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91"
|
|
hgroup.long 0x970++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92"
|
|
hgroup.long 0x974++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93"
|
|
hgroup.long 0x978++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94"
|
|
hgroup.long 0x97C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0C)
|
|
group.long 0x980++0x03
|
|
line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO387 ,CPU Targets Byte Offset 387 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO386 ,CPU Targets Byte Offset 386 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO385 ,CPU Targets Byte Offset 385 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO384 ,CPU Targets Byte Offset 384 "
|
|
group.long 0x984++0x03
|
|
line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO391 ,CPU Targets Byte Offset 391 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO390 ,CPU Targets Byte Offset 390 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO389 ,CPU Targets Byte Offset 389 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO388 ,CPU Targets Byte Offset 388 "
|
|
group.long 0x988++0x03
|
|
line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO395 ,CPU Targets Byte Offset 395 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO394 ,CPU Targets Byte Offset 394 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO393 ,CPU Targets Byte Offset 393 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO392 ,CPU Targets Byte Offset 392 "
|
|
group.long 0x98C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO399 ,CPU Targets Byte Offset 399 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO398 ,CPU Targets Byte Offset 398 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO397 ,CPU Targets Byte Offset 397 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO396 ,CPU Targets Byte Offset 396 "
|
|
group.long 0x990++0x03
|
|
line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO403 ,CPU Targets Byte Offset 403 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO402 ,CPU Targets Byte Offset 402 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO401 ,CPU Targets Byte Offset 401 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO400 ,CPU Targets Byte Offset 400 "
|
|
group.long 0x994++0x03
|
|
line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO407 ,CPU Targets Byte Offset 407 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO406 ,CPU Targets Byte Offset 406 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO405 ,CPU Targets Byte Offset 405 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO404 ,CPU Targets Byte Offset 404 "
|
|
group.long 0x998++0x03
|
|
line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO411 ,CPU Targets Byte Offset 411 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO410 ,CPU Targets Byte Offset 410 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO409 ,CPU Targets Byte Offset 409 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO408 ,CPU Targets Byte Offset 408 "
|
|
group.long 0x99C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO415 ,CPU Targets Byte Offset 415 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO414 ,CPU Targets Byte Offset 414 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO413 ,CPU Targets Byte Offset 413 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO412 ,CPU Targets Byte Offset 412 "
|
|
else
|
|
hgroup.long 0x980++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96"
|
|
hgroup.long 0x984++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97"
|
|
hgroup.long 0x988++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98"
|
|
hgroup.long 0x98C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99"
|
|
hgroup.long 0x990++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
|
|
hgroup.long 0x994++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
|
|
hgroup.long 0x998++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
|
|
hgroup.long 0x99C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0D)
|
|
group.long 0x9A0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO419 ,CPU Targets Byte Offset 419 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO418 ,CPU Targets Byte Offset 418 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO417 ,CPU Targets Byte Offset 417 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO416 ,CPU Targets Byte Offset 416 "
|
|
group.long 0x9A4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO423 ,CPU Targets Byte Offset 423 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO422 ,CPU Targets Byte Offset 422 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO421 ,CPU Targets Byte Offset 421 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO420 ,CPU Targets Byte Offset 420 "
|
|
group.long 0x9A8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO427 ,CPU Targets Byte Offset 427 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO426 ,CPU Targets Byte Offset 426 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO425 ,CPU Targets Byte Offset 425 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO424 ,CPU Targets Byte Offset 424 "
|
|
group.long 0x9AC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO431 ,CPU Targets Byte Offset 431 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO430 ,CPU Targets Byte Offset 430 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO429 ,CPU Targets Byte Offset 429 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO428 ,CPU Targets Byte Offset 428 "
|
|
group.long 0x9B0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO435 ,CPU Targets Byte Offset 435 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO434 ,CPU Targets Byte Offset 434 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO433 ,CPU Targets Byte Offset 433 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO432 ,CPU Targets Byte Offset 432 "
|
|
group.long 0x9B4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO439 ,CPU Targets Byte Offset 439 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO438 ,CPU Targets Byte Offset 438 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO437 ,CPU Targets Byte Offset 437 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO436 ,CPU Targets Byte Offset 436 "
|
|
group.long 0x9B8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO443 ,CPU Targets Byte Offset 443 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO442 ,CPU Targets Byte Offset 442 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO441 ,CPU Targets Byte Offset 441 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO440 ,CPU Targets Byte Offset 440 "
|
|
group.long 0x9BC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO447 ,CPU Targets Byte Offset 447 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO446 ,CPU Targets Byte Offset 446 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO445 ,CPU Targets Byte Offset 445 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO444 ,CPU Targets Byte Offset 444 "
|
|
else
|
|
hgroup.long 0x9A0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
|
|
hgroup.long 0x9A4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
|
|
hgroup.long 0x9A8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
|
|
hgroup.long 0x9AC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
|
|
hgroup.long 0x9B0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
|
|
hgroup.long 0x9B4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
|
|
hgroup.long 0x9B8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
|
|
hgroup.long 0x9BC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0E)
|
|
group.long 0x9C0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO451 ,CPU Targets Byte Offset 451 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO450 ,CPU Targets Byte Offset 450 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO449 ,CPU Targets Byte Offset 449 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO448 ,CPU Targets Byte Offset 448 "
|
|
group.long 0x9C4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO455 ,CPU Targets Byte Offset 455 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO454 ,CPU Targets Byte Offset 454 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO453 ,CPU Targets Byte Offset 453 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO452 ,CPU Targets Byte Offset 452 "
|
|
group.long 0x9C8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO459 ,CPU Targets Byte Offset 459 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO458 ,CPU Targets Byte Offset 458 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO457 ,CPU Targets Byte Offset 457 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO456 ,CPU Targets Byte Offset 456 "
|
|
group.long 0x9CC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO463 ,CPU Targets Byte Offset 463 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO462 ,CPU Targets Byte Offset 462 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO461 ,CPU Targets Byte Offset 461 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO460 ,CPU Targets Byte Offset 460 "
|
|
group.long 0x9D0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO467 ,CPU Targets Byte Offset 467 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO466 ,CPU Targets Byte Offset 466 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO465 ,CPU Targets Byte Offset 465 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO464 ,CPU Targets Byte Offset 464 "
|
|
group.long 0x9D4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO471 ,CPU Targets Byte Offset 471 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO470 ,CPU Targets Byte Offset 470 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO469 ,CPU Targets Byte Offset 469 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO468 ,CPU Targets Byte Offset 468 "
|
|
group.long 0x9D8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO475 ,CPU Targets Byte Offset 475 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO474 ,CPU Targets Byte Offset 474 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO473 ,CPU Targets Byte Offset 473 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO472 ,CPU Targets Byte Offset 472 "
|
|
group.long 0x9DC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO479 ,CPU Targets Byte Offset 479 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO478 ,CPU Targets Byte Offset 478 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO477 ,CPU Targets Byte Offset 477 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO476 ,CPU Targets Byte Offset 476 "
|
|
else
|
|
hgroup.long 0x9C0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
|
|
hgroup.long 0x9C4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
|
|
hgroup.long 0x9C8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
|
|
hgroup.long 0x9CC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
|
|
hgroup.long 0x9D0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
|
|
hgroup.long 0x9D4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
|
|
hgroup.long 0x9D8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
|
|
hgroup.long 0x9DC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0F)
|
|
group.long 0x9E0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO483 ,CPU Targets Byte Offset 483 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO482 ,CPU Targets Byte Offset 482 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO481 ,CPU Targets Byte Offset 481 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO480 ,CPU Targets Byte Offset 480 "
|
|
group.long 0x9E4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO487 ,CPU Targets Byte Offset 487 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO486 ,CPU Targets Byte Offset 486 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO485 ,CPU Targets Byte Offset 485 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO484 ,CPU Targets Byte Offset 484 "
|
|
group.long 0x9E8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO491 ,CPU Targets Byte Offset 491 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO490 ,CPU Targets Byte Offset 490 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO489 ,CPU Targets Byte Offset 489 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO488 ,CPU Targets Byte Offset 488 "
|
|
group.long 0x9EC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO495 ,CPU Targets Byte Offset 495 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO494 ,CPU Targets Byte Offset 494 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO493 ,CPU Targets Byte Offset 493 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO492 ,CPU Targets Byte Offset 492 "
|
|
group.long 0x9F0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO499 ,CPU Targets Byte Offset 499 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO498 ,CPU Targets Byte Offset 498 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO497 ,CPU Targets Byte Offset 497 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO496 ,CPU Targets Byte Offset 496 "
|
|
group.long 0x9F4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO503 ,CPU Targets Byte Offset 503 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO502 ,CPU Targets Byte Offset 502 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO501 ,CPU Targets Byte Offset 501 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO500 ,CPU Targets Byte Offset 500 "
|
|
group.long 0x9F8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO507 ,CPU Targets Byte Offset 507 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO506 ,CPU Targets Byte Offset 506 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO505 ,CPU Targets Byte Offset 505 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO504 ,CPU Targets Byte Offset 504 "
|
|
group.long 0x9FC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO511 ,CPU Targets Byte Offset 511 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO510 ,CPU Targets Byte Offset 510 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO509 ,CPU Targets Byte Offset 509 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO508 ,CPU Targets Byte Offset 508 "
|
|
else
|
|
hgroup.long 0x9E0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
|
|
hgroup.long 0x9E4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
|
|
hgroup.long 0x9E8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
|
|
hgroup.long 0x9EC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
|
|
hgroup.long 0x9F0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
|
|
hgroup.long 0x9F4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
|
|
hgroup.long 0x9F8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
|
|
hgroup.long 0x9FC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0xA00++0x03
|
|
line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO515 ,CPU Targets Byte Offset 515 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO514 ,CPU Targets Byte Offset 514 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO513 ,CPU Targets Byte Offset 513 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO512 ,CPU Targets Byte Offset 512 "
|
|
group.long 0xA04++0x03
|
|
line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO519 ,CPU Targets Byte Offset 519 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO518 ,CPU Targets Byte Offset 518 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO517 ,CPU Targets Byte Offset 517 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO516 ,CPU Targets Byte Offset 516 "
|
|
group.long 0xA08++0x03
|
|
line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO523 ,CPU Targets Byte Offset 523 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO522 ,CPU Targets Byte Offset 522 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO521 ,CPU Targets Byte Offset 521 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO520 ,CPU Targets Byte Offset 520 "
|
|
group.long 0xA0C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO527 ,CPU Targets Byte Offset 527 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO526 ,CPU Targets Byte Offset 526 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO525 ,CPU Targets Byte Offset 525 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO524 ,CPU Targets Byte Offset 524 "
|
|
group.long 0xA10++0x03
|
|
line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO531 ,CPU Targets Byte Offset 531 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO530 ,CPU Targets Byte Offset 530 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO529 ,CPU Targets Byte Offset 529 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO528 ,CPU Targets Byte Offset 528 "
|
|
group.long 0xA14++0x03
|
|
line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO535 ,CPU Targets Byte Offset 535 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO534 ,CPU Targets Byte Offset 534 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO533 ,CPU Targets Byte Offset 533 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO532 ,CPU Targets Byte Offset 532 "
|
|
group.long 0xA18++0x03
|
|
line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO539 ,CPU Targets Byte Offset 539 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO538 ,CPU Targets Byte Offset 538 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO537 ,CPU Targets Byte Offset 537 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO536 ,CPU Targets Byte Offset 536 "
|
|
group.long 0xA1C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO543 ,CPU Targets Byte Offset 543 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO542 ,CPU Targets Byte Offset 542 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO541 ,CPU Targets Byte Offset 541 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO540 ,CPU Targets Byte Offset 540 "
|
|
else
|
|
hgroup.long 0xA00++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
|
|
hgroup.long 0xA04++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
|
|
hgroup.long 0xA08++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
|
|
hgroup.long 0xA0C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
|
|
hgroup.long 0xA10++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
|
|
hgroup.long 0xA14++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
|
|
hgroup.long 0xA18++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
|
|
hgroup.long 0xA1C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0xA20++0x03
|
|
line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO547 ,CPU Targets Byte Offset 547 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO546 ,CPU Targets Byte Offset 546 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO545 ,CPU Targets Byte Offset 545 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO544 ,CPU Targets Byte Offset 544 "
|
|
group.long 0xA24++0x03
|
|
line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO551 ,CPU Targets Byte Offset 551 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO550 ,CPU Targets Byte Offset 550 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO549 ,CPU Targets Byte Offset 549 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO548 ,CPU Targets Byte Offset 548 "
|
|
group.long 0xA28++0x03
|
|
line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO555 ,CPU Targets Byte Offset 555 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO554 ,CPU Targets Byte Offset 554 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO553 ,CPU Targets Byte Offset 553 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO552 ,CPU Targets Byte Offset 552 "
|
|
group.long 0xA2C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO559 ,CPU Targets Byte Offset 559 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO558 ,CPU Targets Byte Offset 558 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO557 ,CPU Targets Byte Offset 557 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO556 ,CPU Targets Byte Offset 556 "
|
|
group.long 0xA30++0x03
|
|
line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO563 ,CPU Targets Byte Offset 563 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO562 ,CPU Targets Byte Offset 562 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO561 ,CPU Targets Byte Offset 561 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO560 ,CPU Targets Byte Offset 560 "
|
|
group.long 0xA34++0x03
|
|
line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO567 ,CPU Targets Byte Offset 567 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO566 ,CPU Targets Byte Offset 566 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO565 ,CPU Targets Byte Offset 565 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO564 ,CPU Targets Byte Offset 564 "
|
|
group.long 0xA38++0x03
|
|
line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO571 ,CPU Targets Byte Offset 571 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO570 ,CPU Targets Byte Offset 570 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO569 ,CPU Targets Byte Offset 569 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO568 ,CPU Targets Byte Offset 568 "
|
|
group.long 0xA3C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO575 ,CPU Targets Byte Offset 575 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO574 ,CPU Targets Byte Offset 574 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO573 ,CPU Targets Byte Offset 573 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO572 ,CPU Targets Byte Offset 572 "
|
|
else
|
|
hgroup.long 0xA20++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
|
|
hgroup.long 0xA24++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
|
|
hgroup.long 0xA28++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
|
|
hgroup.long 0xA2C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
|
|
hgroup.long 0xA30++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
|
|
hgroup.long 0xA34++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
|
|
hgroup.long 0xA38++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
|
|
hgroup.long 0xA3C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0xA40++0x03
|
|
line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO579 ,CPU Targets Byte Offset 579 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO578 ,CPU Targets Byte Offset 578 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO577 ,CPU Targets Byte Offset 577 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO576 ,CPU Targets Byte Offset 576 "
|
|
group.long 0xA44++0x03
|
|
line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO583 ,CPU Targets Byte Offset 583 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO582 ,CPU Targets Byte Offset 582 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO581 ,CPU Targets Byte Offset 581 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO580 ,CPU Targets Byte Offset 580 "
|
|
group.long 0xA48++0x03
|
|
line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO587 ,CPU Targets Byte Offset 587 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO586 ,CPU Targets Byte Offset 586 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO585 ,CPU Targets Byte Offset 585 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO584 ,CPU Targets Byte Offset 584 "
|
|
group.long 0xA4C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO591 ,CPU Targets Byte Offset 591 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO590 ,CPU Targets Byte Offset 590 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO589 ,CPU Targets Byte Offset 589 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO588 ,CPU Targets Byte Offset 588 "
|
|
group.long 0xA50++0x03
|
|
line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO595 ,CPU Targets Byte Offset 595 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO594 ,CPU Targets Byte Offset 594 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO593 ,CPU Targets Byte Offset 593 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO592 ,CPU Targets Byte Offset 592 "
|
|
group.long 0xA54++0x03
|
|
line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO599 ,CPU Targets Byte Offset 599 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO598 ,CPU Targets Byte Offset 598 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO597 ,CPU Targets Byte Offset 597 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO596 ,CPU Targets Byte Offset 596 "
|
|
group.long 0xA58++0x03
|
|
line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO603 ,CPU Targets Byte Offset 603 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO602 ,CPU Targets Byte Offset 602 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO601 ,CPU Targets Byte Offset 601 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO600 ,CPU Targets Byte Offset 600 "
|
|
group.long 0xA5C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO607 ,CPU Targets Byte Offset 607 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO606 ,CPU Targets Byte Offset 606 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO605 ,CPU Targets Byte Offset 605 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO604 ,CPU Targets Byte Offset 604 "
|
|
else
|
|
hgroup.long 0xA40++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
|
|
hgroup.long 0xA44++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
|
|
hgroup.long 0xA48++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
|
|
hgroup.long 0xA4C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
|
|
hgroup.long 0xA50++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
|
|
hgroup.long 0xA54++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
|
|
hgroup.long 0xA58++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
|
|
hgroup.long 0xA5C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0xA60++0x03
|
|
line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO611 ,CPU Targets Byte Offset 611 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO610 ,CPU Targets Byte Offset 610 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO609 ,CPU Targets Byte Offset 609 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO608 ,CPU Targets Byte Offset 608 "
|
|
group.long 0xA64++0x03
|
|
line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO615 ,CPU Targets Byte Offset 615 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO614 ,CPU Targets Byte Offset 614 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO613 ,CPU Targets Byte Offset 613 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO612 ,CPU Targets Byte Offset 612 "
|
|
group.long 0xA68++0x03
|
|
line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO619 ,CPU Targets Byte Offset 619 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO618 ,CPU Targets Byte Offset 618 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO617 ,CPU Targets Byte Offset 617 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO616 ,CPU Targets Byte Offset 616 "
|
|
group.long 0xA6C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO623 ,CPU Targets Byte Offset 623 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO622 ,CPU Targets Byte Offset 622 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO621 ,CPU Targets Byte Offset 621 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO620 ,CPU Targets Byte Offset 620 "
|
|
group.long 0xA70++0x03
|
|
line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO627 ,CPU Targets Byte Offset 627 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO626 ,CPU Targets Byte Offset 626 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO625 ,CPU Targets Byte Offset 625 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO624 ,CPU Targets Byte Offset 624 "
|
|
group.long 0xA74++0x03
|
|
line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO631 ,CPU Targets Byte Offset 631 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO630 ,CPU Targets Byte Offset 630 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO629 ,CPU Targets Byte Offset 629 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO628 ,CPU Targets Byte Offset 628 "
|
|
group.long 0xA78++0x03
|
|
line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO635 ,CPU Targets Byte Offset 635 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO634 ,CPU Targets Byte Offset 634 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO633 ,CPU Targets Byte Offset 633 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO632 ,CPU Targets Byte Offset 632 "
|
|
group.long 0xA7C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO639 ,CPU Targets Byte Offset 639 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO638 ,CPU Targets Byte Offset 638 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO637 ,CPU Targets Byte Offset 637 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO636 ,CPU Targets Byte Offset 636 "
|
|
else
|
|
hgroup.long 0xA60++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
|
|
hgroup.long 0xA64++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
|
|
hgroup.long 0xA68++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
|
|
hgroup.long 0xA6C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
|
|
hgroup.long 0xA70++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
|
|
hgroup.long 0xA74++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
|
|
hgroup.long 0xA78++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
|
|
hgroup.long 0xA7C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0xA80++0x03
|
|
line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO643 ,CPU Targets Byte Offset 643 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO642 ,CPU Targets Byte Offset 642 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO641 ,CPU Targets Byte Offset 641 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO640 ,CPU Targets Byte Offset 640 "
|
|
group.long 0xA84++0x03
|
|
line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO647 ,CPU Targets Byte Offset 647 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO646 ,CPU Targets Byte Offset 646 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO645 ,CPU Targets Byte Offset 645 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO644 ,CPU Targets Byte Offset 644 "
|
|
group.long 0xA88++0x03
|
|
line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO651 ,CPU Targets Byte Offset 651 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO650 ,CPU Targets Byte Offset 650 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO649 ,CPU Targets Byte Offset 649 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO648 ,CPU Targets Byte Offset 648 "
|
|
group.long 0xA8C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO655 ,CPU Targets Byte Offset 655 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO654 ,CPU Targets Byte Offset 654 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO653 ,CPU Targets Byte Offset 653 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO652 ,CPU Targets Byte Offset 652 "
|
|
group.long 0xA90++0x03
|
|
line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO659 ,CPU Targets Byte Offset 659 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO658 ,CPU Targets Byte Offset 658 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO657 ,CPU Targets Byte Offset 657 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO656 ,CPU Targets Byte Offset 656 "
|
|
group.long 0xA94++0x03
|
|
line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO663 ,CPU Targets Byte Offset 663 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO662 ,CPU Targets Byte Offset 662 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO661 ,CPU Targets Byte Offset 661 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO660 ,CPU Targets Byte Offset 660 "
|
|
group.long 0xA98++0x03
|
|
line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO667 ,CPU Targets Byte Offset 667 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO666 ,CPU Targets Byte Offset 666 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO665 ,CPU Targets Byte Offset 665 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO664 ,CPU Targets Byte Offset 664 "
|
|
group.long 0xA9C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO671 ,CPU Targets Byte Offset 671 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO670 ,CPU Targets Byte Offset 670 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO669 ,CPU Targets Byte Offset 669 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO668 ,CPU Targets Byte Offset 668 "
|
|
else
|
|
hgroup.long 0xA80++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
|
|
hgroup.long 0xA84++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
|
|
hgroup.long 0xA88++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
|
|
hgroup.long 0xA8C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
|
|
hgroup.long 0xA90++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
|
|
hgroup.long 0xA94++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
|
|
hgroup.long 0xA98++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
|
|
hgroup.long 0xA9C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0xAA0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO675 ,CPU Targets Byte Offset 675 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO674 ,CPU Targets Byte Offset 674 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO673 ,CPU Targets Byte Offset 673 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO672 ,CPU Targets Byte Offset 672 "
|
|
group.long 0xAA4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO679 ,CPU Targets Byte Offset 679 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO678 ,CPU Targets Byte Offset 678 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO677 ,CPU Targets Byte Offset 677 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO676 ,CPU Targets Byte Offset 676 "
|
|
group.long 0xAA8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO683 ,CPU Targets Byte Offset 683 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO682 ,CPU Targets Byte Offset 682 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO681 ,CPU Targets Byte Offset 681 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO680 ,CPU Targets Byte Offset 680 "
|
|
group.long 0xAAC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO687 ,CPU Targets Byte Offset 687 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO686 ,CPU Targets Byte Offset 686 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO685 ,CPU Targets Byte Offset 685 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO684 ,CPU Targets Byte Offset 684 "
|
|
group.long 0xAB0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO691 ,CPU Targets Byte Offset 691 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO690 ,CPU Targets Byte Offset 690 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO689 ,CPU Targets Byte Offset 689 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO688 ,CPU Targets Byte Offset 688 "
|
|
group.long 0xAB4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO695 ,CPU Targets Byte Offset 695 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO694 ,CPU Targets Byte Offset 694 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO693 ,CPU Targets Byte Offset 693 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO692 ,CPU Targets Byte Offset 692 "
|
|
group.long 0xAB8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO699 ,CPU Targets Byte Offset 699 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO698 ,CPU Targets Byte Offset 698 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO697 ,CPU Targets Byte Offset 697 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO696 ,CPU Targets Byte Offset 696 "
|
|
group.long 0xABC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO703 ,CPU Targets Byte Offset 703 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO702 ,CPU Targets Byte Offset 702 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO701 ,CPU Targets Byte Offset 701 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO700 ,CPU Targets Byte Offset 700 "
|
|
else
|
|
hgroup.long 0xAA0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
|
|
hgroup.long 0xAA4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
|
|
hgroup.long 0xAA8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
|
|
hgroup.long 0xAAC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
|
|
hgroup.long 0xAB0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
|
|
hgroup.long 0xAB4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
|
|
hgroup.long 0xAB8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
|
|
hgroup.long 0xABC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0xAC0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO707 ,CPU Targets Byte Offset 707 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO706 ,CPU Targets Byte Offset 706 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO705 ,CPU Targets Byte Offset 705 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO704 ,CPU Targets Byte Offset 704 "
|
|
group.long 0xAC4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO711 ,CPU Targets Byte Offset 711 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO710 ,CPU Targets Byte Offset 710 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO709 ,CPU Targets Byte Offset 709 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO708 ,CPU Targets Byte Offset 708 "
|
|
group.long 0xAC8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO715 ,CPU Targets Byte Offset 715 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO714 ,CPU Targets Byte Offset 714 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO713 ,CPU Targets Byte Offset 713 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO712 ,CPU Targets Byte Offset 712 "
|
|
group.long 0xACC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO719 ,CPU Targets Byte Offset 719 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO718 ,CPU Targets Byte Offset 718 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO717 ,CPU Targets Byte Offset 717 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO716 ,CPU Targets Byte Offset 716 "
|
|
group.long 0xAD0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO723 ,CPU Targets Byte Offset 723 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO722 ,CPU Targets Byte Offset 722 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO721 ,CPU Targets Byte Offset 721 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO720 ,CPU Targets Byte Offset 720 "
|
|
group.long 0xAD4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO727 ,CPU Targets Byte Offset 727 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO726 ,CPU Targets Byte Offset 726 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO725 ,CPU Targets Byte Offset 725 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO724 ,CPU Targets Byte Offset 724 "
|
|
group.long 0xAD8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO731 ,CPU Targets Byte Offset 731 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO730 ,CPU Targets Byte Offset 730 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO729 ,CPU Targets Byte Offset 729 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO728 ,CPU Targets Byte Offset 728 "
|
|
group.long 0xADC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO735 ,CPU Targets Byte Offset 735 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO734 ,CPU Targets Byte Offset 734 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO733 ,CPU Targets Byte Offset 733 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO732 ,CPU Targets Byte Offset 732 "
|
|
else
|
|
hgroup.long 0xAC0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
|
|
hgroup.long 0xAC4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
|
|
hgroup.long 0xAC8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
|
|
hgroup.long 0xACC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
|
|
hgroup.long 0xAD0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
|
|
hgroup.long 0xAD4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
|
|
hgroup.long 0xAD8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
|
|
hgroup.long 0xADC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0xAE0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO739 ,CPU Targets Byte Offset 739 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO738 ,CPU Targets Byte Offset 738 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO737 ,CPU Targets Byte Offset 737 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO736 ,CPU Targets Byte Offset 736 "
|
|
group.long 0xAE4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO743 ,CPU Targets Byte Offset 743 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO742 ,CPU Targets Byte Offset 742 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO741 ,CPU Targets Byte Offset 741 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO740 ,CPU Targets Byte Offset 740 "
|
|
group.long 0xAE8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO747 ,CPU Targets Byte Offset 747 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO746 ,CPU Targets Byte Offset 746 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO745 ,CPU Targets Byte Offset 745 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO744 ,CPU Targets Byte Offset 744 "
|
|
group.long 0xAEC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO751 ,CPU Targets Byte Offset 751 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO750 ,CPU Targets Byte Offset 750 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO749 ,CPU Targets Byte Offset 749 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO748 ,CPU Targets Byte Offset 748 "
|
|
group.long 0xAF0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO755 ,CPU Targets Byte Offset 755 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO754 ,CPU Targets Byte Offset 754 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO753 ,CPU Targets Byte Offset 753 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO752 ,CPU Targets Byte Offset 752 "
|
|
group.long 0xAF4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO759 ,CPU Targets Byte Offset 759 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO758 ,CPU Targets Byte Offset 758 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO757 ,CPU Targets Byte Offset 757 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO756 ,CPU Targets Byte Offset 756 "
|
|
group.long 0xAF8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO763 ,CPU Targets Byte Offset 763 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO762 ,CPU Targets Byte Offset 762 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO761 ,CPU Targets Byte Offset 761 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO760 ,CPU Targets Byte Offset 760 "
|
|
group.long 0xAFC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO767 ,CPU Targets Byte Offset 767 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO766 ,CPU Targets Byte Offset 766 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO765 ,CPU Targets Byte Offset 765 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO764 ,CPU Targets Byte Offset 764 "
|
|
else
|
|
hgroup.long 0xAE0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
|
|
hgroup.long 0xAE4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
|
|
hgroup.long 0xAE8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
|
|
hgroup.long 0xAEC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
|
|
hgroup.long 0xAF0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
|
|
hgroup.long 0xAF4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
|
|
hgroup.long 0xAF8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
|
|
hgroup.long 0xAFC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0xB00++0x03
|
|
line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO771 ,CPU Targets Byte Offset 771 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO770 ,CPU Targets Byte Offset 770 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO769 ,CPU Targets Byte Offset 769 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO768 ,CPU Targets Byte Offset 768 "
|
|
group.long 0xB04++0x03
|
|
line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO775 ,CPU Targets Byte Offset 775 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO774 ,CPU Targets Byte Offset 774 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO773 ,CPU Targets Byte Offset 773 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO772 ,CPU Targets Byte Offset 772 "
|
|
group.long 0xB08++0x03
|
|
line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO779 ,CPU Targets Byte Offset 779 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO778 ,CPU Targets Byte Offset 778 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO777 ,CPU Targets Byte Offset 777 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO776 ,CPU Targets Byte Offset 776 "
|
|
group.long 0xB0C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO783 ,CPU Targets Byte Offset 783 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO782 ,CPU Targets Byte Offset 782 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO781 ,CPU Targets Byte Offset 781 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO780 ,CPU Targets Byte Offset 780 "
|
|
group.long 0xB10++0x03
|
|
line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO787 ,CPU Targets Byte Offset 787 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO786 ,CPU Targets Byte Offset 786 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO785 ,CPU Targets Byte Offset 785 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO784 ,CPU Targets Byte Offset 784 "
|
|
group.long 0xB14++0x03
|
|
line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO791 ,CPU Targets Byte Offset 791 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO790 ,CPU Targets Byte Offset 790 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO789 ,CPU Targets Byte Offset 789 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO788 ,CPU Targets Byte Offset 788 "
|
|
group.long 0xB18++0x03
|
|
line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO795 ,CPU Targets Byte Offset 795 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO794 ,CPU Targets Byte Offset 794 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO793 ,CPU Targets Byte Offset 793 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO792 ,CPU Targets Byte Offset 792 "
|
|
group.long 0xB1C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO799 ,CPU Targets Byte Offset 799 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO798 ,CPU Targets Byte Offset 798 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO797 ,CPU Targets Byte Offset 797 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO796 ,CPU Targets Byte Offset 796 "
|
|
else
|
|
hgroup.long 0xB00++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
|
|
hgroup.long 0xB04++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
|
|
hgroup.long 0xB08++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
|
|
hgroup.long 0xB0C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
|
|
hgroup.long 0xB10++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
|
|
hgroup.long 0xB14++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
|
|
hgroup.long 0xB18++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
|
|
hgroup.long 0xB1C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0xB20++0x03
|
|
line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO803 ,CPU Targets Byte Offset 803 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO802 ,CPU Targets Byte Offset 802 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO801 ,CPU Targets Byte Offset 801 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO800 ,CPU Targets Byte Offset 800 "
|
|
group.long 0xB24++0x03
|
|
line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO807 ,CPU Targets Byte Offset 807 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO806 ,CPU Targets Byte Offset 806 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO805 ,CPU Targets Byte Offset 805 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO804 ,CPU Targets Byte Offset 804 "
|
|
group.long 0xB28++0x03
|
|
line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO811 ,CPU Targets Byte Offset 811 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO810 ,CPU Targets Byte Offset 810 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO809 ,CPU Targets Byte Offset 809 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO808 ,CPU Targets Byte Offset 808 "
|
|
group.long 0xB2C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO815 ,CPU Targets Byte Offset 815 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO814 ,CPU Targets Byte Offset 814 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO813 ,CPU Targets Byte Offset 813 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO812 ,CPU Targets Byte Offset 812 "
|
|
group.long 0xB30++0x03
|
|
line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO819 ,CPU Targets Byte Offset 819 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO818 ,CPU Targets Byte Offset 818 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO817 ,CPU Targets Byte Offset 817 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO816 ,CPU Targets Byte Offset 816 "
|
|
group.long 0xB34++0x03
|
|
line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO823 ,CPU Targets Byte Offset 823 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO822 ,CPU Targets Byte Offset 822 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO821 ,CPU Targets Byte Offset 821 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO820 ,CPU Targets Byte Offset 820 "
|
|
group.long 0xB38++0x03
|
|
line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO827 ,CPU Targets Byte Offset 827 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO826 ,CPU Targets Byte Offset 826 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO825 ,CPU Targets Byte Offset 825 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO824 ,CPU Targets Byte Offset 824 "
|
|
group.long 0xB3C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO831 ,CPU Targets Byte Offset 831 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO830 ,CPU Targets Byte Offset 830 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO829 ,CPU Targets Byte Offset 829 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO828 ,CPU Targets Byte Offset 828 "
|
|
else
|
|
hgroup.long 0xB20++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
|
|
hgroup.long 0xB24++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
|
|
hgroup.long 0xB28++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
|
|
hgroup.long 0xB2C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
|
|
hgroup.long 0xB30++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
|
|
hgroup.long 0xB34++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
|
|
hgroup.long 0xB38++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
|
|
hgroup.long 0xB3C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0xB40++0x03
|
|
line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO835 ,CPU Targets Byte Offset 835 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO834 ,CPU Targets Byte Offset 834 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO833 ,CPU Targets Byte Offset 833 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO832 ,CPU Targets Byte Offset 832 "
|
|
group.long 0xB44++0x03
|
|
line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO839 ,CPU Targets Byte Offset 839 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO838 ,CPU Targets Byte Offset 838 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO837 ,CPU Targets Byte Offset 837 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO836 ,CPU Targets Byte Offset 836 "
|
|
group.long 0xB48++0x03
|
|
line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO843 ,CPU Targets Byte Offset 843 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO842 ,CPU Targets Byte Offset 842 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO841 ,CPU Targets Byte Offset 841 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO840 ,CPU Targets Byte Offset 840 "
|
|
group.long 0xB4C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO847 ,CPU Targets Byte Offset 847 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO846 ,CPU Targets Byte Offset 846 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO845 ,CPU Targets Byte Offset 845 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO844 ,CPU Targets Byte Offset 844 "
|
|
group.long 0xB50++0x03
|
|
line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO851 ,CPU Targets Byte Offset 851 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO850 ,CPU Targets Byte Offset 850 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO849 ,CPU Targets Byte Offset 849 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO848 ,CPU Targets Byte Offset 848 "
|
|
group.long 0xB54++0x03
|
|
line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO855 ,CPU Targets Byte Offset 855 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO854 ,CPU Targets Byte Offset 854 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO853 ,CPU Targets Byte Offset 853 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO852 ,CPU Targets Byte Offset 852 "
|
|
group.long 0xB58++0x03
|
|
line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO859 ,CPU Targets Byte Offset 859 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO858 ,CPU Targets Byte Offset 858 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO857 ,CPU Targets Byte Offset 857 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO856 ,CPU Targets Byte Offset 856 "
|
|
group.long 0xB5C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO863 ,CPU Targets Byte Offset 863 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO862 ,CPU Targets Byte Offset 862 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO861 ,CPU Targets Byte Offset 861 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO860 ,CPU Targets Byte Offset 860 "
|
|
else
|
|
hgroup.long 0xB40++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
|
|
hgroup.long 0xB44++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
|
|
hgroup.long 0xB48++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
|
|
hgroup.long 0xB4C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
|
|
hgroup.long 0xB50++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
|
|
hgroup.long 0xB54++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
|
|
hgroup.long 0xB58++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
|
|
hgroup.long 0xB5C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0xB60++0x03
|
|
line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO867 ,CPU Targets Byte Offset 867 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO866 ,CPU Targets Byte Offset 866 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO865 ,CPU Targets Byte Offset 865 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO864 ,CPU Targets Byte Offset 864 "
|
|
group.long 0xB64++0x03
|
|
line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO871 ,CPU Targets Byte Offset 871 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO870 ,CPU Targets Byte Offset 870 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO869 ,CPU Targets Byte Offset 869 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO868 ,CPU Targets Byte Offset 868 "
|
|
group.long 0xB68++0x03
|
|
line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO875 ,CPU Targets Byte Offset 875 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO874 ,CPU Targets Byte Offset 874 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO873 ,CPU Targets Byte Offset 873 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO872 ,CPU Targets Byte Offset 872 "
|
|
group.long 0xB6C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO879 ,CPU Targets Byte Offset 879 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO878 ,CPU Targets Byte Offset 878 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO877 ,CPU Targets Byte Offset 877 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO876 ,CPU Targets Byte Offset 876 "
|
|
group.long 0xB70++0x03
|
|
line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO883 ,CPU Targets Byte Offset 883 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO882 ,CPU Targets Byte Offset 882 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO881 ,CPU Targets Byte Offset 881 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO880 ,CPU Targets Byte Offset 880 "
|
|
group.long 0xB74++0x03
|
|
line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO887 ,CPU Targets Byte Offset 887 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO886 ,CPU Targets Byte Offset 886 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO885 ,CPU Targets Byte Offset 885 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO884 ,CPU Targets Byte Offset 884 "
|
|
group.long 0xB78++0x03
|
|
line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO891 ,CPU Targets Byte Offset 891 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO890 ,CPU Targets Byte Offset 890 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO889 ,CPU Targets Byte Offset 889 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO888 ,CPU Targets Byte Offset 888 "
|
|
group.long 0xB7C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO895 ,CPU Targets Byte Offset 895 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO894 ,CPU Targets Byte Offset 894 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO893 ,CPU Targets Byte Offset 893 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO892 ,CPU Targets Byte Offset 892 "
|
|
else
|
|
hgroup.long 0xB60++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
|
|
hgroup.long 0xB64++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
|
|
hgroup.long 0xB68++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
|
|
hgroup.long 0xB6C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
|
|
hgroup.long 0xB70++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
|
|
hgroup.long 0xB74++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
|
|
hgroup.long 0xB78++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
|
|
hgroup.long 0xB7C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0xB80++0x03
|
|
line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO899 ,CPU Targets Byte Offset 899 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO898 ,CPU Targets Byte Offset 898 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO897 ,CPU Targets Byte Offset 897 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO896 ,CPU Targets Byte Offset 896 "
|
|
group.long 0xB84++0x03
|
|
line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO903 ,CPU Targets Byte Offset 903 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO902 ,CPU Targets Byte Offset 902 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO901 ,CPU Targets Byte Offset 901 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO900 ,CPU Targets Byte Offset 900 "
|
|
group.long 0xB88++0x03
|
|
line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO907 ,CPU Targets Byte Offset 907 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO906 ,CPU Targets Byte Offset 906 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO905 ,CPU Targets Byte Offset 905 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO904 ,CPU Targets Byte Offset 904 "
|
|
group.long 0xB8C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO911 ,CPU Targets Byte Offset 911 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO910 ,CPU Targets Byte Offset 910 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO909 ,CPU Targets Byte Offset 909 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO908 ,CPU Targets Byte Offset 908 "
|
|
group.long 0xB90++0x03
|
|
line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO915 ,CPU Targets Byte Offset 915 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO914 ,CPU Targets Byte Offset 914 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO913 ,CPU Targets Byte Offset 913 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO912 ,CPU Targets Byte Offset 912 "
|
|
group.long 0xB94++0x03
|
|
line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO919 ,CPU Targets Byte Offset 919 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO918 ,CPU Targets Byte Offset 918 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO917 ,CPU Targets Byte Offset 917 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO916 ,CPU Targets Byte Offset 916 "
|
|
group.long 0xB98++0x03
|
|
line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO923 ,CPU Targets Byte Offset 923 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO922 ,CPU Targets Byte Offset 922 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO921 ,CPU Targets Byte Offset 921 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO920 ,CPU Targets Byte Offset 920 "
|
|
group.long 0xB9C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO927 ,CPU Targets Byte Offset 927 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO926 ,CPU Targets Byte Offset 926 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO925 ,CPU Targets Byte Offset 925 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO924 ,CPU Targets Byte Offset 924 "
|
|
else
|
|
hgroup.long 0xB80++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
|
|
hgroup.long 0xB84++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
|
|
hgroup.long 0xB88++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
|
|
hgroup.long 0xB8C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
|
|
hgroup.long 0xB90++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
|
|
hgroup.long 0xB94++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
|
|
hgroup.long 0xB98++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
|
|
hgroup.long 0xB9C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0xBA0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO931 ,CPU Targets Byte Offset 931 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO930 ,CPU Targets Byte Offset 930 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO929 ,CPU Targets Byte Offset 929 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO928 ,CPU Targets Byte Offset 928 "
|
|
group.long 0xBA4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO935 ,CPU Targets Byte Offset 935 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO934 ,CPU Targets Byte Offset 934 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO933 ,CPU Targets Byte Offset 933 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO932 ,CPU Targets Byte Offset 932 "
|
|
group.long 0xBA8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO939 ,CPU Targets Byte Offset 939 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO938 ,CPU Targets Byte Offset 938 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO937 ,CPU Targets Byte Offset 937 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO936 ,CPU Targets Byte Offset 936 "
|
|
group.long 0xBAC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO943 ,CPU Targets Byte Offset 943 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO942 ,CPU Targets Byte Offset 942 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO941 ,CPU Targets Byte Offset 941 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO940 ,CPU Targets Byte Offset 940 "
|
|
group.long 0xBB0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO947 ,CPU Targets Byte Offset 947 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO946 ,CPU Targets Byte Offset 946 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO945 ,CPU Targets Byte Offset 945 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO944 ,CPU Targets Byte Offset 944 "
|
|
group.long 0xBB4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO951 ,CPU Targets Byte Offset 951 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO950 ,CPU Targets Byte Offset 950 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO949 ,CPU Targets Byte Offset 949 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO948 ,CPU Targets Byte Offset 948 "
|
|
group.long 0xBB8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO955 ,CPU Targets Byte Offset 955 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO954 ,CPU Targets Byte Offset 954 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO953 ,CPU Targets Byte Offset 953 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO952 ,CPU Targets Byte Offset 952 "
|
|
group.long 0xBBC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO959 ,CPU Targets Byte Offset 959 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO958 ,CPU Targets Byte Offset 958 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO957 ,CPU Targets Byte Offset 957 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO956 ,CPU Targets Byte Offset 956 "
|
|
else
|
|
hgroup.long 0xBA0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
|
|
hgroup.long 0xBA4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
|
|
hgroup.long 0xBA8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
|
|
hgroup.long 0xBAC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
|
|
hgroup.long 0xBB0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
|
|
hgroup.long 0xBB4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
|
|
hgroup.long 0xBB8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
|
|
hgroup.long 0xBBC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0xBC0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO963 ,CPU Targets Byte Offset 963 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO962 ,CPU Targets Byte Offset 962 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO961 ,CPU Targets Byte Offset 961 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO960 ,CPU Targets Byte Offset 960 "
|
|
group.long 0xBC4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO967 ,CPU Targets Byte Offset 967 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO966 ,CPU Targets Byte Offset 966 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO965 ,CPU Targets Byte Offset 965 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO964 ,CPU Targets Byte Offset 964 "
|
|
group.long 0xBC8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO971 ,CPU Targets Byte Offset 971 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO970 ,CPU Targets Byte Offset 970 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO969 ,CPU Targets Byte Offset 969 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO968 ,CPU Targets Byte Offset 968 "
|
|
group.long 0xBCC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO975 ,CPU Targets Byte Offset 975 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO974 ,CPU Targets Byte Offset 974 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO973 ,CPU Targets Byte Offset 973 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO972 ,CPU Targets Byte Offset 972 "
|
|
group.long 0xBD0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO979 ,CPU Targets Byte Offset 979 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO978 ,CPU Targets Byte Offset 978 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO977 ,CPU Targets Byte Offset 977 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO976 ,CPU Targets Byte Offset 976 "
|
|
group.long 0xBD4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO983 ,CPU Targets Byte Offset 983 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO982 ,CPU Targets Byte Offset 982 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO981 ,CPU Targets Byte Offset 981 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO980 ,CPU Targets Byte Offset 980 "
|
|
group.long 0xBD8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO987 ,CPU Targets Byte Offset 987 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO986 ,CPU Targets Byte Offset 986 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO985 ,CPU Targets Byte Offset 985 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO984 ,CPU Targets Byte Offset 984 "
|
|
group.long 0xBDC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO991 ,CPU Targets Byte Offset 991 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO990 ,CPU Targets Byte Offset 990 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO989 ,CPU Targets Byte Offset 989 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO988 ,CPU Targets Byte Offset 988 "
|
|
else
|
|
hgroup.long 0xBC0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
|
|
hgroup.long 0xBC4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
|
|
hgroup.long 0xBC8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
|
|
hgroup.long 0xBCC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
|
|
hgroup.long 0xBD0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
|
|
hgroup.long 0xBD4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
|
|
hgroup.long 0xBD8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
|
|
hgroup.long 0xBDC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1F)
|
|
group.long 0xBE0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO995 ,CPU Targets Byte Offset 995 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO994 ,CPU Targets Byte Offset 994 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO993 ,CPU Targets Byte Offset 993 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO992 ,CPU Targets Byte Offset 992 "
|
|
group.long 0xBE4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO999 ,CPU Targets Byte Offset 999 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO998 ,CPU Targets Byte Offset 998 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO997 ,CPU Targets Byte Offset 997 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO996 ,CPU Targets Byte Offset 996 "
|
|
group.long 0xBE8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1003 ,CPU Targets Byte Offset 1003"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1002 ,CPU Targets Byte Offset 1002"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1001 ,CPU Targets Byte Offset 1001"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1000 ,CPU Targets Byte Offset 1000"
|
|
group.long 0xBEC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1007 ,CPU Targets Byte Offset 1007"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1006 ,CPU Targets Byte Offset 1006"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1005 ,CPU Targets Byte Offset 1005"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1004 ,CPU Targets Byte Offset 1004"
|
|
group.long 0xBF0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1011 ,CPU Targets Byte Offset 1011"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1010 ,CPU Targets Byte Offset 1010"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1009 ,CPU Targets Byte Offset 1009"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1008 ,CPU Targets Byte Offset 1008"
|
|
group.long 0xBF4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1015 ,CPU Targets Byte Offset 1015"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1014 ,CPU Targets Byte Offset 1014"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1013 ,CPU Targets Byte Offset 1013"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1012 ,CPU Targets Byte Offset 1012"
|
|
group.long 0xBF8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1019 ,CPU Targets Byte Offset 1019"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1018 ,CPU Targets Byte Offset 1018"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1017 ,CPU Targets Byte Offset 1017"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1016 ,CPU Targets Byte Offset 1016"
|
|
else
|
|
hgroup.long 0xBE0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248"
|
|
hgroup.long 0xBE4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249"
|
|
hgroup.long 0xBE8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250"
|
|
hgroup.long 0xBEC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251"
|
|
hgroup.long 0xBF0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252"
|
|
hgroup.long 0xBF4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253"
|
|
hgroup.long 0xBF8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254"
|
|
endif
|
|
else
|
|
hgroup.long 0x800++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR0 ,Interrupt Processor Targets Register 0 "
|
|
hgroup.long 0x804++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR1 ,Interrupt Processor Targets Register 1 "
|
|
hgroup.long 0x808++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR2 ,Interrupt Processor Targets Register 2 "
|
|
hgroup.long 0x80C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR3 ,Interrupt Processor Targets Register 3 "
|
|
hgroup.long 0x810++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR4 ,Interrupt Processor Targets Register 4 "
|
|
hgroup.long 0x814++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR5 ,Interrupt Processor Targets Register 5 "
|
|
hgroup.long 0x818++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR6 ,Interrupt Processor Targets Register 6 "
|
|
hgroup.long 0x81C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR7 ,Interrupt Processor Targets Register 7 "
|
|
hgroup.long 0x820++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR8 ,Interrupt Processor Targets Register 8 "
|
|
hgroup.long 0x824++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR9 ,Interrupt Processor Targets Register 9 "
|
|
hgroup.long 0x828++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR10 ,Interrupt Processor Targets Register 10 "
|
|
hgroup.long 0x82C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR11 ,Interrupt Processor Targets Register 11 "
|
|
hgroup.long 0x830++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR12 ,Interrupt Processor Targets Register 12 "
|
|
hgroup.long 0x834++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR13 ,Interrupt Processor Targets Register 13 "
|
|
hgroup.long 0x838++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR14 ,Interrupt Processor Targets Register 14 "
|
|
hgroup.long 0x83C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR15 ,Interrupt Processor Targets Register 15 "
|
|
hgroup.long 0x840++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR16 ,Interrupt Processor Targets Register 16 "
|
|
hgroup.long 0x844++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR17 ,Interrupt Processor Targets Register 17 "
|
|
hgroup.long 0x848++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR18 ,Interrupt Processor Targets Register 18 "
|
|
hgroup.long 0x84C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR19 ,Interrupt Processor Targets Register 19 "
|
|
hgroup.long 0x850++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR20 ,Interrupt Processor Targets Register 20 "
|
|
hgroup.long 0x854++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR21 ,Interrupt Processor Targets Register 21 "
|
|
hgroup.long 0x858++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR22 ,Interrupt Processor Targets Register 22 "
|
|
hgroup.long 0x85C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR23 ,Interrupt Processor Targets Register 23 "
|
|
hgroup.long 0x860++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR24 ,Interrupt Processor Targets Register 24 "
|
|
hgroup.long 0x864++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR25 ,Interrupt Processor Targets Register 25 "
|
|
hgroup.long 0x868++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR26 ,Interrupt Processor Targets Register 26 "
|
|
hgroup.long 0x86C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR27 ,Interrupt Processor Targets Register 27 "
|
|
hgroup.long 0x870++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR28 ,Interrupt Processor Targets Register 28 "
|
|
hgroup.long 0x874++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR29 ,Interrupt Processor Targets Register 29 "
|
|
hgroup.long 0x878++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR30 ,Interrupt Processor Targets Register 30 "
|
|
hgroup.long 0x87C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR31 ,Interrupt Processor Targets Register 31 "
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR32 ,Interrupt Processor Targets Register 32 "
|
|
hgroup.long 0x884++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR33 ,Interrupt Processor Targets Register 33 "
|
|
hgroup.long 0x888++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR34 ,Interrupt Processor Targets Register 34 "
|
|
hgroup.long 0x88C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR35 ,Interrupt Processor Targets Register 35 "
|
|
hgroup.long 0x890++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR36 ,Interrupt Processor Targets Register 36 "
|
|
hgroup.long 0x894++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR37 ,Interrupt Processor Targets Register 37 "
|
|
hgroup.long 0x898++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR38 ,Interrupt Processor Targets Register 38 "
|
|
hgroup.long 0x89C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR39 ,Interrupt Processor Targets Register 39 "
|
|
hgroup.long 0x8A0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR40 ,Interrupt Processor Targets Register 40 "
|
|
hgroup.long 0x8A4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR41 ,Interrupt Processor Targets Register 41 "
|
|
hgroup.long 0x8A8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR42 ,Interrupt Processor Targets Register 42 "
|
|
hgroup.long 0x8AC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR43 ,Interrupt Processor Targets Register 43 "
|
|
hgroup.long 0x8B0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR44 ,Interrupt Processor Targets Register 44 "
|
|
hgroup.long 0x8B4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR45 ,Interrupt Processor Targets Register 45 "
|
|
hgroup.long 0x8B8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR46 ,Interrupt Processor Targets Register 46 "
|
|
hgroup.long 0x8BC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR47 ,Interrupt Processor Targets Register 47 "
|
|
hgroup.long 0x8C0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR48 ,Interrupt Processor Targets Register 48 "
|
|
hgroup.long 0x8C4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR49 ,Interrupt Processor Targets Register 49 "
|
|
hgroup.long 0x8C8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR50 ,Interrupt Processor Targets Register 50 "
|
|
hgroup.long 0x8CC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR51 ,Interrupt Processor Targets Register 51 "
|
|
hgroup.long 0x8D0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR52 ,Interrupt Processor Targets Register 52 "
|
|
hgroup.long 0x8D4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR53 ,Interrupt Processor Targets Register 53 "
|
|
hgroup.long 0x8D8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR54 ,Interrupt Processor Targets Register 54 "
|
|
hgroup.long 0x8DC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR55 ,Interrupt Processor Targets Register 55 "
|
|
hgroup.long 0x8E0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR56 ,Interrupt Processor Targets Register 56 "
|
|
hgroup.long 0x8E4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR57 ,Interrupt Processor Targets Register 57 "
|
|
hgroup.long 0x8E8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR58 ,Interrupt Processor Targets Register 58 "
|
|
hgroup.long 0x8EC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR59 ,Interrupt Processor Targets Register 59 "
|
|
hgroup.long 0x8F0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR60 ,Interrupt Processor Targets Register 60 "
|
|
hgroup.long 0x8F4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR61 ,Interrupt Processor Targets Register 61 "
|
|
hgroup.long 0x8F8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR62 ,Interrupt Processor Targets Register 62 "
|
|
hgroup.long 0x8FC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR63 ,Interrupt Processor Targets Register 63 "
|
|
hgroup.long 0x900++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR64 ,Interrupt Processor Targets Register 64 "
|
|
hgroup.long 0x904++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR65 ,Interrupt Processor Targets Register 65 "
|
|
hgroup.long 0x908++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR66 ,Interrupt Processor Targets Register 66 "
|
|
hgroup.long 0x90C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR67 ,Interrupt Processor Targets Register 67 "
|
|
hgroup.long 0x910++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR68 ,Interrupt Processor Targets Register 68 "
|
|
hgroup.long 0x914++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR69 ,Interrupt Processor Targets Register 69 "
|
|
hgroup.long 0x918++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR70 ,Interrupt Processor Targets Register 70 "
|
|
hgroup.long 0x91C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR71 ,Interrupt Processor Targets Register 71 "
|
|
hgroup.long 0x920++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR72 ,Interrupt Processor Targets Register 72 "
|
|
hgroup.long 0x924++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR73 ,Interrupt Processor Targets Register 73 "
|
|
hgroup.long 0x928++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR74 ,Interrupt Processor Targets Register 74 "
|
|
hgroup.long 0x92C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR75 ,Interrupt Processor Targets Register 75 "
|
|
hgroup.long 0x930++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR76 ,Interrupt Processor Targets Register 76 "
|
|
hgroup.long 0x934++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR77 ,Interrupt Processor Targets Register 77 "
|
|
hgroup.long 0x938++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR78 ,Interrupt Processor Targets Register 78 "
|
|
hgroup.long 0x93C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR79 ,Interrupt Processor Targets Register 79 "
|
|
hgroup.long 0x940++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR80 ,Interrupt Processor Targets Register 80 "
|
|
hgroup.long 0x944++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR81 ,Interrupt Processor Targets Register 81 "
|
|
hgroup.long 0x948++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR82 ,Interrupt Processor Targets Register 82 "
|
|
hgroup.long 0x94C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR83 ,Interrupt Processor Targets Register 83 "
|
|
hgroup.long 0x950++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR84 ,Interrupt Processor Targets Register 84 "
|
|
hgroup.long 0x954++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR85 ,Interrupt Processor Targets Register 85 "
|
|
hgroup.long 0x958++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR86 ,Interrupt Processor Targets Register 86 "
|
|
hgroup.long 0x95C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR87 ,Interrupt Processor Targets Register 87 "
|
|
hgroup.long 0x960++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR88 ,Interrupt Processor Targets Register 88 "
|
|
hgroup.long 0x964++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR89 ,Interrupt Processor Targets Register 89 "
|
|
hgroup.long 0x968++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR90 ,Interrupt Processor Targets Register 90 "
|
|
hgroup.long 0x96C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR91 ,Interrupt Processor Targets Register 91 "
|
|
hgroup.long 0x970++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR92 ,Interrupt Processor Targets Register 92 "
|
|
hgroup.long 0x974++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR93 ,Interrupt Processor Targets Register 93 "
|
|
hgroup.long 0x978++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR94 ,Interrupt Processor Targets Register 94 "
|
|
hgroup.long 0x97C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR95 ,Interrupt Processor Targets Register 95 "
|
|
hgroup.long 0x980++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR96 ,Interrupt Processor Targets Register 96 "
|
|
hgroup.long 0x984++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR97 ,Interrupt Processor Targets Register 97 "
|
|
hgroup.long 0x988++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR98 ,Interrupt Processor Targets Register 98 "
|
|
hgroup.long 0x98C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR99 ,Interrupt Processor Targets Register 99 "
|
|
hgroup.long 0x990++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
|
|
hgroup.long 0x994++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
|
|
hgroup.long 0x998++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
|
|
hgroup.long 0x99C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
|
|
hgroup.long 0x9A0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
|
|
hgroup.long 0x9A4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
|
|
hgroup.long 0x9A8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
|
|
hgroup.long 0x9AC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
|
|
hgroup.long 0x9B0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
|
|
hgroup.long 0x9B4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
|
|
hgroup.long 0x9B8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
|
|
hgroup.long 0x9BC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
|
|
hgroup.long 0x9C0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
|
|
hgroup.long 0x9C4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
|
|
hgroup.long 0x9C8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
|
|
hgroup.long 0x9CC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
|
|
hgroup.long 0x9D0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
|
|
hgroup.long 0x9D4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
|
|
hgroup.long 0x9D8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
|
|
hgroup.long 0x9DC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
|
|
hgroup.long 0x9E0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
|
|
hgroup.long 0x9E4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
|
|
hgroup.long 0x9E8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
|
|
hgroup.long 0x9EC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
|
|
hgroup.long 0x9F0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
|
|
hgroup.long 0x9F4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
|
|
hgroup.long 0x9F8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
|
|
hgroup.long 0x9FC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
|
|
hgroup.long 0xA00++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
|
|
hgroup.long 0xA04++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
|
|
hgroup.long 0xA08++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
|
|
hgroup.long 0xA0C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
|
|
hgroup.long 0xA10++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
|
|
hgroup.long 0xA14++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
|
|
hgroup.long 0xA18++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
|
|
hgroup.long 0xA1C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
|
|
hgroup.long 0xA20++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
|
|
hgroup.long 0xA24++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
|
|
hgroup.long 0xA28++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
|
|
hgroup.long 0xA2C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
|
|
hgroup.long 0xA30++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
|
|
hgroup.long 0xA34++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
|
|
hgroup.long 0xA38++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
|
|
hgroup.long 0xA3C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
|
|
hgroup.long 0xA40++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
|
|
hgroup.long 0xA44++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
|
|
hgroup.long 0xA48++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
|
|
hgroup.long 0xA4C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
|
|
hgroup.long 0xA50++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
|
|
hgroup.long 0xA54++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
|
|
hgroup.long 0xA58++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
|
|
hgroup.long 0xA5C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
|
|
hgroup.long 0xA60++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
|
|
hgroup.long 0xA64++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
|
|
hgroup.long 0xA68++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
|
|
hgroup.long 0xA6C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
|
|
hgroup.long 0xA70++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
|
|
hgroup.long 0xA74++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
|
|
hgroup.long 0xA78++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
|
|
hgroup.long 0xA7C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
|
|
hgroup.long 0xA80++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
|
|
hgroup.long 0xA84++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
|
|
hgroup.long 0xA88++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
|
|
hgroup.long 0xA8C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
|
|
hgroup.long 0xA90++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
|
|
hgroup.long 0xA94++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
|
|
hgroup.long 0xA98++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
|
|
hgroup.long 0xA9C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
|
|
hgroup.long 0xAA0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
|
|
hgroup.long 0xAA4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
|
|
hgroup.long 0xAA8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
|
|
hgroup.long 0xAAC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
|
|
hgroup.long 0xAB0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
|
|
hgroup.long 0xAB4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
|
|
hgroup.long 0xAB8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
|
|
hgroup.long 0xABC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
|
|
hgroup.long 0xAC0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
|
|
hgroup.long 0xAC4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
|
|
hgroup.long 0xAC8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
|
|
hgroup.long 0xACC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
|
|
hgroup.long 0xAD0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
|
|
hgroup.long 0xAD4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
|
|
hgroup.long 0xAD8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
|
|
hgroup.long 0xADC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
|
|
hgroup.long 0xAE0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
|
|
hgroup.long 0xAE4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
|
|
hgroup.long 0xAE8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
|
|
hgroup.long 0xAEC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
|
|
hgroup.long 0xAF0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
|
|
hgroup.long 0xAF4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
|
|
hgroup.long 0xAF8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
|
|
hgroup.long 0xAFC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
|
|
hgroup.long 0xB00++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
|
|
hgroup.long 0xB04++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
|
|
hgroup.long 0xB08++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
|
|
hgroup.long 0xB0C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
|
|
hgroup.long 0xB10++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
|
|
hgroup.long 0xB14++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
|
|
hgroup.long 0xB18++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
|
|
hgroup.long 0xB1C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
|
|
hgroup.long 0xB20++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
|
|
hgroup.long 0xB24++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
|
|
hgroup.long 0xB28++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
|
|
hgroup.long 0xB2C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
|
|
hgroup.long 0xB30++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
|
|
hgroup.long 0xB34++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
|
|
hgroup.long 0xB38++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
|
|
hgroup.long 0xB3C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
|
|
hgroup.long 0xB40++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
|
|
hgroup.long 0xB44++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
|
|
hgroup.long 0xB48++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
|
|
hgroup.long 0xB4C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
|
|
hgroup.long 0xB50++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
|
|
hgroup.long 0xB54++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
|
|
hgroup.long 0xB58++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
|
|
hgroup.long 0xB5C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
|
|
hgroup.long 0xB60++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
|
|
hgroup.long 0xB64++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
|
|
hgroup.long 0xB68++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
|
|
hgroup.long 0xB6C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
|
|
hgroup.long 0xB70++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
|
|
hgroup.long 0xB74++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
|
|
hgroup.long 0xB78++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
|
|
hgroup.long 0xB7C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
|
|
hgroup.long 0xB80++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
|
|
hgroup.long 0xB84++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
|
|
hgroup.long 0xB88++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
|
|
hgroup.long 0xB8C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
|
|
hgroup.long 0xB90++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
|
|
hgroup.long 0xB94++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
|
|
hgroup.long 0xB98++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
|
|
hgroup.long 0xB9C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
|
|
hgroup.long 0xBA0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
|
|
hgroup.long 0xBA4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
|
|
hgroup.long 0xBA8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
|
|
hgroup.long 0xBAC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
|
|
hgroup.long 0xBB0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
|
|
hgroup.long 0xBB4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
|
|
hgroup.long 0xBB8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
|
|
hgroup.long 0xBBC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
|
|
hgroup.long 0xBC0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
|
|
hgroup.long 0xBC4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
|
|
hgroup.long 0xBC8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
|
|
hgroup.long 0xBCC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
|
|
hgroup.long 0xBD0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
|
|
hgroup.long 0xBD4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
|
|
hgroup.long 0xBD8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
|
|
hgroup.long 0xBDC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
|
|
hgroup.long 0xBE0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248"
|
|
hgroup.long 0xBE4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249"
|
|
hgroup.long 0xBE8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250"
|
|
hgroup.long 0xBEC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251"
|
|
hgroup.long 0xBF0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252"
|
|
hgroup.long 0xBF4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253"
|
|
hgroup.long 0xBF8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254"
|
|
endif
|
|
tree.end
|
|
width 14.
|
|
tree "Configuration Registers"
|
|
hgroup.long 0xC00++0x03
|
|
hide.long 0x00 "GICD_ICFGR0,Interrupt Configuration Register"
|
|
textline " "
|
|
rgroup.long 0xC04++0x03
|
|
line.long 0x00 "GICD_ICFGR1,Interrupt Configuration Register"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1)
|
|
group.long 0xC08++0x03
|
|
line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC0C++0x03
|
|
line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC08++0x03
|
|
hide.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2"
|
|
hgroup.long 0xC0C++0x03
|
|
hide.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x2)
|
|
group.long 0xC10++0x03
|
|
line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC14++0x03
|
|
line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC10++0x03
|
|
hide.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4"
|
|
hgroup.long 0xC14++0x03
|
|
hide.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x3)
|
|
group.long 0xC18++0x03
|
|
line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC1C++0x03
|
|
line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC18++0x03
|
|
hide.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6"
|
|
hgroup.long 0xC1C++0x03
|
|
hide.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x4)
|
|
group.long 0xC20++0x03
|
|
line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC24++0x03
|
|
line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC20++0x03
|
|
hide.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8"
|
|
hgroup.long 0xC24++0x03
|
|
hide.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x5)
|
|
group.long 0xC28++0x03
|
|
line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC2C++0x03
|
|
line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC28++0x03
|
|
hide.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10"
|
|
hgroup.long 0xC2C++0x03
|
|
hide.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x6)
|
|
group.long 0xC30++0x03
|
|
line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC34++0x03
|
|
line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC30++0x03
|
|
hide.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12"
|
|
hgroup.long 0xC34++0x03
|
|
hide.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x7)
|
|
group.long 0xC38++0x03
|
|
line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC3C++0x03
|
|
line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC38++0x03
|
|
hide.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14"
|
|
hgroup.long 0xC3C++0x03
|
|
hide.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x8)
|
|
group.long 0xC40++0x03
|
|
line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC44++0x03
|
|
line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC40++0x03
|
|
hide.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16"
|
|
hgroup.long 0xC44++0x03
|
|
hide.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x9)
|
|
group.long 0xC48++0x03
|
|
line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC4C++0x03
|
|
line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC48++0x03
|
|
hide.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18"
|
|
hgroup.long 0xC4C++0x03
|
|
hide.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0xA)
|
|
group.long 0xC50++0x03
|
|
line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC54++0x03
|
|
line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC50++0x03
|
|
hide.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20"
|
|
hgroup.long 0xC54++0x03
|
|
hide.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0xB)
|
|
group.long 0xC58++0x03
|
|
line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC5C++0x03
|
|
line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC58++0x03
|
|
hide.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22"
|
|
hgroup.long 0xC5C++0x03
|
|
hide.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0xC)
|
|
group.long 0xC60++0x03
|
|
line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC64++0x03
|
|
line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC60++0x03
|
|
hide.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24"
|
|
hgroup.long 0xC64++0x03
|
|
hide.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0xD)
|
|
group.long 0xC68++0x03
|
|
line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC6C++0x03
|
|
line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC68++0x03
|
|
hide.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26"
|
|
hgroup.long 0xC6C++0x03
|
|
hide.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0xE)
|
|
group.long 0xC70++0x03
|
|
line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC74++0x03
|
|
line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC70++0x03
|
|
hide.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28"
|
|
hgroup.long 0xC74++0x03
|
|
hide.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0xF)
|
|
group.long 0xC78++0x03
|
|
line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC7C++0x03
|
|
line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC78++0x03
|
|
hide.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30"
|
|
hgroup.long 0xC7C++0x03
|
|
hide.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0xC80++0x03
|
|
line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC84++0x03
|
|
line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC80++0x03
|
|
hide.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32"
|
|
hgroup.long 0xC84++0x03
|
|
hide.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0xC88++0x03
|
|
line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC8C++0x03
|
|
line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC88++0x03
|
|
hide.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34"
|
|
hgroup.long 0xC8C++0x03
|
|
hide.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0xC90++0x03
|
|
line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC94++0x03
|
|
line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC90++0x03
|
|
hide.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36"
|
|
hgroup.long 0xC94++0x03
|
|
hide.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0xC98++0x03
|
|
line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC9C++0x03
|
|
line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC98++0x03
|
|
hide.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38"
|
|
hgroup.long 0xC9C++0x03
|
|
hide.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0xCA0++0x03
|
|
line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCA4++0x03
|
|
line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCA0++0x03
|
|
hide.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40"
|
|
hgroup.long 0xCA4++0x03
|
|
hide.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0xCA8++0x03
|
|
line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCAC++0x03
|
|
line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCA8++0x03
|
|
hide.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42"
|
|
hgroup.long 0xCAC++0x03
|
|
hide.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0xCB0++0x03
|
|
line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCB4++0x03
|
|
line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCB0++0x03
|
|
hide.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44"
|
|
hgroup.long 0xCB4++0x03
|
|
hide.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0xCB8++0x03
|
|
line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCBC++0x03
|
|
line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCB8++0x03
|
|
hide.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46"
|
|
hgroup.long 0xCBC++0x03
|
|
hide.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0xCC0++0x03
|
|
line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCC4++0x03
|
|
line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCC0++0x03
|
|
hide.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48"
|
|
hgroup.long 0xCC4++0x03
|
|
hide.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0xCC8++0x03
|
|
line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCCC++0x03
|
|
line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCC8++0x03
|
|
hide.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50"
|
|
hgroup.long 0xCCC++0x03
|
|
hide.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0xCD0++0x03
|
|
line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCD4++0x03
|
|
line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCD0++0x03
|
|
hide.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52"
|
|
hgroup.long 0xCD4++0x03
|
|
hide.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0xCD8++0x03
|
|
line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCDC++0x03
|
|
line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCD8++0x03
|
|
hide.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54"
|
|
hgroup.long 0xCDC++0x03
|
|
hide.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0xCE0++0x03
|
|
line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCE4++0x03
|
|
line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCE0++0x03
|
|
hide.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56"
|
|
hgroup.long 0xCE4++0x03
|
|
hide.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0xCE8++0x03
|
|
line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCEC++0x03
|
|
line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCE8++0x03
|
|
hide.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58"
|
|
hgroup.long 0xCEC++0x03
|
|
hide.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0xCF0++0x03
|
|
line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCF4++0x03
|
|
line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCF0++0x03
|
|
hide.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60"
|
|
hgroup.long 0xCF4++0x03
|
|
hide.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61"
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1F)
|
|
group.long 0xCF8++0x03
|
|
line.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCFC++0x03
|
|
line.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCF8++0x03
|
|
hide.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62"
|
|
hgroup.long 0xCFC++0x03
|
|
hide.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63"
|
|
endif
|
|
tree.end
|
|
width 12.
|
|
tree "Peripheral Interrupt Status Registers"
|
|
rgroup.long 0x0D00++0x03
|
|
line.long 0x00 "GICD_PPISR,Private Peripheral Interrupt Status Register"
|
|
bitfld.long 0x00 15. " PPI_C[15] ,Returns the status of the ppi_c[15] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 14. " PPI_C[14] ,Returns the status of the ppi_c[14] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 13. " PPI_C[13] ,Returns the status of the ppi_c[13] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 12. " PPI_C[12] ,Returns the status of the ppi_c[12] inputs on the Distributor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PPI_C[11] ,Returns the status of the ppi_c[11] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 10. " PPI_C[10] ,Returns the status of the ppi_c[10] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 9. " PPI_C[9] ,Returns the status of the ppi_c[9] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 8. " PPI_C[8] ,Returns the status of the ppi_c[8] inputs on the Distributor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PPI_C[7] ,Returns the status of the ppi_c[7] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 6. " PPI_C[6] ,Returns the status of the ppi_c[6] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 5. " PPI_C[5] ,Returns the status of the ppi_c[5] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 4. " PPI_C[4] ,Returns the status of the ppi_c[4] inputs on the Distributor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PPI_C[3] ,Returns the status of the ppi_c[3] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 2. " PPI_C[2] ,Returns the status of the ppi_c[2] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 1. " PPI_C[1] ,Returns the status of the ppi_c[1] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 0. " PPI_C[0] ,Returns the status of the ppi_c[0] inputs on the Distributor" "Low,High"
|
|
textline " "
|
|
width 22.
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x01)
|
|
rgroup.long 0x0D04++0x03
|
|
line.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 0"
|
|
bitfld.long 0x00 31. " IRQS31 ,IRQS Status Bit 31" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS30 ,IRQS Status Bit 30" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS29 ,IRQS Status Bit 29" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS28 ,IRQS Status Bit 28" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS27 ,IRQS Status Bit 27" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS26 ,IRQS Status Bit 26" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS25 ,IRQS Status Bit 25" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS24 ,IRQS Status Bit 24" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS23 ,IRQS Status Bit 23" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS22 ,IRQS Status Bit 22" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS21 ,IRQS Status Bit 21" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS20 ,IRQS Status Bit 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS19 ,IRQS Status Bit 19" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS18 ,IRQS Status Bit 18" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS17 ,IRQS Status Bit 17" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS16 ,IRQS Status Bit 16" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS15 ,IRQS Status Bit 15" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS14 ,IRQS Status Bit 14" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS13 ,IRQS Status Bit 13" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS12 ,IRQS Status Bit 12" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS11 ,IRQS Status Bit 11" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS10 ,IRQS Status Bit 10" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS9 ,IRQS Status Bit 9" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS8 ,IRQS Status Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS7 ,IRQS Status Bit 7" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS6 ,IRQS Status Bit 6" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS5 ,IRQS Status Bit 5" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS4 ,IRQS Status Bit 4" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS3 ,IRQS Status Bit 3" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS2 ,IRQS Status Bit 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS1 ,IRQS Status Bit 1" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS0 ,IRQS Status Bit 0" "Low,High"
|
|
else
|
|
hgroup.long 0x0D04++0x03
|
|
hide.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x02)
|
|
rgroup.long 0x0D08++0x03
|
|
line.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1"
|
|
bitfld.long 0x00 31. " IRQS63 ,IRQS Status Bit 63" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS62 ,IRQS Status Bit 62" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS61 ,IRQS Status Bit 61" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS60 ,IRQS Status Bit 60" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS59 ,IRQS Status Bit 59" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS58 ,IRQS Status Bit 58" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS57 ,IRQS Status Bit 57" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS56 ,IRQS Status Bit 56" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS55 ,IRQS Status Bit 55" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS54 ,IRQS Status Bit 54" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS53 ,IRQS Status Bit 53" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS52 ,IRQS Status Bit 52" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS51 ,IRQS Status Bit 51" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS50 ,IRQS Status Bit 50" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS49 ,IRQS Status Bit 49" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS48 ,IRQS Status Bit 48" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS47 ,IRQS Status Bit 47" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS46 ,IRQS Status Bit 46" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS45 ,IRQS Status Bit 45" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS44 ,IRQS Status Bit 44" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS43 ,IRQS Status Bit 43" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS42 ,IRQS Status Bit 42" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS41 ,IRQS Status Bit 41" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS40 ,IRQS Status Bit 40" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS39 ,IRQS Status Bit 39" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS38 ,IRQS Status Bit 38" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS37 ,IRQS Status Bit 37" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS36 ,IRQS Status Bit 36" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS35 ,IRQS Status Bit 35" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS34 ,IRQS Status Bit 34" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS33 ,IRQS Status Bit 33" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS32 ,IRQS Status Bit 32" "Low,High"
|
|
else
|
|
hgroup.long 0x0D08++0x03
|
|
hide.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x03)
|
|
rgroup.long 0x0D0C++0x03
|
|
line.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2"
|
|
bitfld.long 0x00 31. " IRQS95 ,IRQS Status Bit 95" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS94 ,IRQS Status Bit 94" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS93 ,IRQS Status Bit 93" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS92 ,IRQS Status Bit 92" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS91 ,IRQS Status Bit 91" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS90 ,IRQS Status Bit 90" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS89 ,IRQS Status Bit 89" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS88 ,IRQS Status Bit 88" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS87 ,IRQS Status Bit 87" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS86 ,IRQS Status Bit 86" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS85 ,IRQS Status Bit 85" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS84 ,IRQS Status Bit 84" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS83 ,IRQS Status Bit 83" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS82 ,IRQS Status Bit 82" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS81 ,IRQS Status Bit 81" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS80 ,IRQS Status Bit 80" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS79 ,IRQS Status Bit 79" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS78 ,IRQS Status Bit 78" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS77 ,IRQS Status Bit 77" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS76 ,IRQS Status Bit 76" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS75 ,IRQS Status Bit 75" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS74 ,IRQS Status Bit 74" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS73 ,IRQS Status Bit 73" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS72 ,IRQS Status Bit 72" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS71 ,IRQS Status Bit 71" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS70 ,IRQS Status Bit 70" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS69 ,IRQS Status Bit 69" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS68 ,IRQS Status Bit 68" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS67 ,IRQS Status Bit 67" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS66 ,IRQS Status Bit 66" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS65 ,IRQS Status Bit 65" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS64 ,IRQS Status Bit 64" "Low,High"
|
|
else
|
|
hgroup.long 0x0D0C++0x03
|
|
hide.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x04)
|
|
rgroup.long 0x0D10++0x03
|
|
line.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3"
|
|
bitfld.long 0x00 31. " IRQS127 ,IRQS Status Bit 127" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS126 ,IRQS Status Bit 126" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS125 ,IRQS Status Bit 125" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS124 ,IRQS Status Bit 124" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS123 ,IRQS Status Bit 123" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS122 ,IRQS Status Bit 122" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS121 ,IRQS Status Bit 121" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS120 ,IRQS Status Bit 120" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS119 ,IRQS Status Bit 119" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS118 ,IRQS Status Bit 118" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS117 ,IRQS Status Bit 117" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS116 ,IRQS Status Bit 116" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS115 ,IRQS Status Bit 115" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS114 ,IRQS Status Bit 114" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS113 ,IRQS Status Bit 113" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS112 ,IRQS Status Bit 112" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS111 ,IRQS Status Bit 111" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS110 ,IRQS Status Bit 110" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS109 ,IRQS Status Bit 109" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS108 ,IRQS Status Bit 108" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS107 ,IRQS Status Bit 107" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS106 ,IRQS Status Bit 106" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS105 ,IRQS Status Bit 105" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS104 ,IRQS Status Bit 104" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS103 ,IRQS Status Bit 103" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS102 ,IRQS Status Bit 102" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS101 ,IRQS Status Bit 101" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS100 ,IRQS Status Bit 100" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS99 ,IRQS Status Bit 99" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS98 ,IRQS Status Bit 98" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS97 ,IRQS Status Bit 97" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS96 ,IRQS Status Bit 96" "Low,High"
|
|
else
|
|
hgroup.long 0x0D10++0x03
|
|
hide.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x05)
|
|
rgroup.long 0x0D14++0x03
|
|
line.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4"
|
|
bitfld.long 0x00 31. " IRQS159 ,IRQS Status Bit 159" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS158 ,IRQS Status Bit 158" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS157 ,IRQS Status Bit 157" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS156 ,IRQS Status Bit 156" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS155 ,IRQS Status Bit 155" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS154 ,IRQS Status Bit 154" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS153 ,IRQS Status Bit 153" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS152 ,IRQS Status Bit 152" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS151 ,IRQS Status Bit 151" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS150 ,IRQS Status Bit 150" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS149 ,IRQS Status Bit 149" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS148 ,IRQS Status Bit 148" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS147 ,IRQS Status Bit 147" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS146 ,IRQS Status Bit 146" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS145 ,IRQS Status Bit 145" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS144 ,IRQS Status Bit 144" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS143 ,IRQS Status Bit 143" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS142 ,IRQS Status Bit 142" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS141 ,IRQS Status Bit 141" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS140 ,IRQS Status Bit 140" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS139 ,IRQS Status Bit 139" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS138 ,IRQS Status Bit 138" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS137 ,IRQS Status Bit 137" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS136 ,IRQS Status Bit 136" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS135 ,IRQS Status Bit 135" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS134 ,IRQS Status Bit 134" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS133 ,IRQS Status Bit 133" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS132 ,IRQS Status Bit 132" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS131 ,IRQS Status Bit 131" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS130 ,IRQS Status Bit 130" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS129 ,IRQS Status Bit 129" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS128 ,IRQS Status Bit 128" "Low,High"
|
|
else
|
|
hgroup.long 0x0D14++0x03
|
|
hide.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x06)
|
|
rgroup.long 0x0D18++0x03
|
|
line.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5"
|
|
bitfld.long 0x00 31. " IRQS191 ,IRQS Status Bit 191" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS190 ,IRQS Status Bit 190" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS189 ,IRQS Status Bit 189" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS188 ,IRQS Status Bit 188" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS187 ,IRQS Status Bit 187" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS186 ,IRQS Status Bit 186" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS185 ,IRQS Status Bit 185" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS184 ,IRQS Status Bit 184" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS183 ,IRQS Status Bit 183" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS182 ,IRQS Status Bit 182" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS181 ,IRQS Status Bit 181" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS180 ,IRQS Status Bit 180" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS179 ,IRQS Status Bit 179" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS178 ,IRQS Status Bit 178" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS177 ,IRQS Status Bit 177" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS176 ,IRQS Status Bit 176" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS175 ,IRQS Status Bit 175" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS174 ,IRQS Status Bit 174" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS173 ,IRQS Status Bit 173" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS172 ,IRQS Status Bit 172" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS171 ,IRQS Status Bit 171" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS170 ,IRQS Status Bit 170" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS169 ,IRQS Status Bit 169" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS168 ,IRQS Status Bit 168" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS167 ,IRQS Status Bit 167" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS166 ,IRQS Status Bit 166" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS165 ,IRQS Status Bit 165" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS164 ,IRQS Status Bit 164" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS163 ,IRQS Status Bit 163" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS162 ,IRQS Status Bit 162" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS161 ,IRQS Status Bit 161" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS160 ,IRQS Status Bit 160" "Low,High"
|
|
else
|
|
hgroup.long 0x0D18++0x03
|
|
hide.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x07)
|
|
rgroup.long 0x0D1C++0x03
|
|
line.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6"
|
|
bitfld.long 0x00 31. " IRQS223 ,IRQS Status Bit 223" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS222 ,IRQS Status Bit 222" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS221 ,IRQS Status Bit 221" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS220 ,IRQS Status Bit 220" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS219 ,IRQS Status Bit 219" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS218 ,IRQS Status Bit 218" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS217 ,IRQS Status Bit 217" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS216 ,IRQS Status Bit 216" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS215 ,IRQS Status Bit 215" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS214 ,IRQS Status Bit 214" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS213 ,IRQS Status Bit 213" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS212 ,IRQS Status Bit 212" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS211 ,IRQS Status Bit 211" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS210 ,IRQS Status Bit 210" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS209 ,IRQS Status Bit 209" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS208 ,IRQS Status Bit 208" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS207 ,IRQS Status Bit 207" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS206 ,IRQS Status Bit 206" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS205 ,IRQS Status Bit 205" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS204 ,IRQS Status Bit 204" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS203 ,IRQS Status Bit 203" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS202 ,IRQS Status Bit 202" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS201 ,IRQS Status Bit 201" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS200 ,IRQS Status Bit 200" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS199 ,IRQS Status Bit 199" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS198 ,IRQS Status Bit 198" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS197 ,IRQS Status Bit 197" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS196 ,IRQS Status Bit 196" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS195 ,IRQS Status Bit 195" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS194 ,IRQS Status Bit 194" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS193 ,IRQS Status Bit 193" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS192 ,IRQS Status Bit 192" "Low,High"
|
|
else
|
|
hgroup.long 0x0D1C++0x03
|
|
hide.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x08)
|
|
rgroup.long 0x0D20++0x03
|
|
line.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7"
|
|
bitfld.long 0x00 31. " IRQS255 ,IRQS Status Bit 255" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS254 ,IRQS Status Bit 254" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS253 ,IRQS Status Bit 253" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS252 ,IRQS Status Bit 252" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS251 ,IRQS Status Bit 251" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS250 ,IRQS Status Bit 250" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS249 ,IRQS Status Bit 249" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS248 ,IRQS Status Bit 248" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS247 ,IRQS Status Bit 247" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS246 ,IRQS Status Bit 246" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS245 ,IRQS Status Bit 245" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS244 ,IRQS Status Bit 244" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS243 ,IRQS Status Bit 243" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS242 ,IRQS Status Bit 242" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS241 ,IRQS Status Bit 241" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS240 ,IRQS Status Bit 240" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS239 ,IRQS Status Bit 239" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS238 ,IRQS Status Bit 238" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS237 ,IRQS Status Bit 237" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS236 ,IRQS Status Bit 236" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS235 ,IRQS Status Bit 235" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS234 ,IRQS Status Bit 234" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS233 ,IRQS Status Bit 233" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS232 ,IRQS Status Bit 232" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS231 ,IRQS Status Bit 231" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS230 ,IRQS Status Bit 230" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS229 ,IRQS Status Bit 229" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS228 ,IRQS Status Bit 228" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS227 ,IRQS Status Bit 227" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS226 ,IRQS Status Bit 226" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS225 ,IRQS Status Bit 225" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS224 ,IRQS Status Bit 224" "Low,High"
|
|
else
|
|
hgroup.long 0x0D20++0x03
|
|
hide.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x09)
|
|
rgroup.long 0x0D24++0x03
|
|
line.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8"
|
|
bitfld.long 0x00 31. " IRQS287 ,IRQS Status Bit 287" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS286 ,IRQS Status Bit 286" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS285 ,IRQS Status Bit 285" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS284 ,IRQS Status Bit 284" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS283 ,IRQS Status Bit 283" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS282 ,IRQS Status Bit 282" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS281 ,IRQS Status Bit 281" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS280 ,IRQS Status Bit 280" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS279 ,IRQS Status Bit 279" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS278 ,IRQS Status Bit 278" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS277 ,IRQS Status Bit 277" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS276 ,IRQS Status Bit 276" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS275 ,IRQS Status Bit 275" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS274 ,IRQS Status Bit 274" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS273 ,IRQS Status Bit 273" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS272 ,IRQS Status Bit 272" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS271 ,IRQS Status Bit 271" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS270 ,IRQS Status Bit 270" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS269 ,IRQS Status Bit 269" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS268 ,IRQS Status Bit 268" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS267 ,IRQS Status Bit 267" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS266 ,IRQS Status Bit 266" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS265 ,IRQS Status Bit 265" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS264 ,IRQS Status Bit 264" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS263 ,IRQS Status Bit 263" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS262 ,IRQS Status Bit 262" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS261 ,IRQS Status Bit 261" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS260 ,IRQS Status Bit 260" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS259 ,IRQS Status Bit 259" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS258 ,IRQS Status Bit 258" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS257 ,IRQS Status Bit 257" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS256 ,IRQS Status Bit 256" "Low,High"
|
|
else
|
|
hgroup.long 0x0D24++0x03
|
|
hide.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0A)
|
|
rgroup.long 0x0D28++0x03
|
|
line.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9"
|
|
bitfld.long 0x00 31. " IRQS319 ,IRQS Status Bit 319" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS318 ,IRQS Status Bit 318" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS317 ,IRQS Status Bit 317" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS316 ,IRQS Status Bit 316" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS315 ,IRQS Status Bit 315" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS314 ,IRQS Status Bit 314" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS313 ,IRQS Status Bit 313" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS312 ,IRQS Status Bit 312" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS311 ,IRQS Status Bit 311" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS310 ,IRQS Status Bit 310" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS309 ,IRQS Status Bit 309" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS308 ,IRQS Status Bit 308" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS307 ,IRQS Status Bit 307" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS306 ,IRQS Status Bit 306" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS305 ,IRQS Status Bit 305" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS304 ,IRQS Status Bit 304" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS303 ,IRQS Status Bit 303" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS302 ,IRQS Status Bit 302" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS301 ,IRQS Status Bit 301" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS300 ,IRQS Status Bit 300" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS299 ,IRQS Status Bit 299" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS298 ,IRQS Status Bit 298" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS297 ,IRQS Status Bit 297" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS296 ,IRQS Status Bit 296" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS295 ,IRQS Status Bit 295" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS294 ,IRQS Status Bit 294" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS293 ,IRQS Status Bit 293" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS292 ,IRQS Status Bit 292" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS291 ,IRQS Status Bit 291" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS290 ,IRQS Status Bit 290" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS289 ,IRQS Status Bit 289" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS288 ,IRQS Status Bit 288" "Low,High"
|
|
else
|
|
hgroup.long 0x0D28++0x03
|
|
hide.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0B)
|
|
rgroup.long 0x0D2C++0x03
|
|
line.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10"
|
|
bitfld.long 0x00 31. " IRQS351 ,IRQS Status Bit 351" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS350 ,IRQS Status Bit 350" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS349 ,IRQS Status Bit 349" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS348 ,IRQS Status Bit 348" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS347 ,IRQS Status Bit 347" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS346 ,IRQS Status Bit 346" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS345 ,IRQS Status Bit 345" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS344 ,IRQS Status Bit 344" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS343 ,IRQS Status Bit 343" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS342 ,IRQS Status Bit 342" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS341 ,IRQS Status Bit 341" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS340 ,IRQS Status Bit 340" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS339 ,IRQS Status Bit 339" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS338 ,IRQS Status Bit 338" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS337 ,IRQS Status Bit 337" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS336 ,IRQS Status Bit 336" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS335 ,IRQS Status Bit 335" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS334 ,IRQS Status Bit 334" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS333 ,IRQS Status Bit 333" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS332 ,IRQS Status Bit 332" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS331 ,IRQS Status Bit 331" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS330 ,IRQS Status Bit 330" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS329 ,IRQS Status Bit 329" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS328 ,IRQS Status Bit 328" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS327 ,IRQS Status Bit 327" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS326 ,IRQS Status Bit 326" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS325 ,IRQS Status Bit 325" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS324 ,IRQS Status Bit 324" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS323 ,IRQS Status Bit 323" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS322 ,IRQS Status Bit 322" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS321 ,IRQS Status Bit 321" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS320 ,IRQS Status Bit 320" "Low,High"
|
|
else
|
|
hgroup.long 0x0D2C++0x03
|
|
hide.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0C)
|
|
rgroup.long 0x0D30++0x03
|
|
line.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11"
|
|
bitfld.long 0x00 31. " IRQS383 ,IRQS Status Bit 383" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS382 ,IRQS Status Bit 382" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS381 ,IRQS Status Bit 381" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS380 ,IRQS Status Bit 380" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS379 ,IRQS Status Bit 379" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS378 ,IRQS Status Bit 378" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS377 ,IRQS Status Bit 377" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS376 ,IRQS Status Bit 376" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS375 ,IRQS Status Bit 375" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS374 ,IRQS Status Bit 374" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS373 ,IRQS Status Bit 373" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS372 ,IRQS Status Bit 372" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS371 ,IRQS Status Bit 371" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS370 ,IRQS Status Bit 370" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS369 ,IRQS Status Bit 369" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS368 ,IRQS Status Bit 368" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS367 ,IRQS Status Bit 367" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS366 ,IRQS Status Bit 366" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS365 ,IRQS Status Bit 365" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS364 ,IRQS Status Bit 364" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS363 ,IRQS Status Bit 363" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS362 ,IRQS Status Bit 362" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS361 ,IRQS Status Bit 361" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS360 ,IRQS Status Bit 360" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS359 ,IRQS Status Bit 359" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS358 ,IRQS Status Bit 358" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS357 ,IRQS Status Bit 357" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS356 ,IRQS Status Bit 356" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS355 ,IRQS Status Bit 355" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS354 ,IRQS Status Bit 354" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS353 ,IRQS Status Bit 353" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS352 ,IRQS Status Bit 352" "Low,High"
|
|
else
|
|
hgroup.long 0x0D30++0x03
|
|
hide.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0D)
|
|
rgroup.long 0x0D34++0x03
|
|
line.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12"
|
|
bitfld.long 0x00 31. " IRQS415 ,IRQS Status Bit 415" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS414 ,IRQS Status Bit 414" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS413 ,IRQS Status Bit 413" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS412 ,IRQS Status Bit 412" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS411 ,IRQS Status Bit 411" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS410 ,IRQS Status Bit 410" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS409 ,IRQS Status Bit 409" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS408 ,IRQS Status Bit 408" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS407 ,IRQS Status Bit 407" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS406 ,IRQS Status Bit 406" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS405 ,IRQS Status Bit 405" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS404 ,IRQS Status Bit 404" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS403 ,IRQS Status Bit 403" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS402 ,IRQS Status Bit 402" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS401 ,IRQS Status Bit 401" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS400 ,IRQS Status Bit 400" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS399 ,IRQS Status Bit 399" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS398 ,IRQS Status Bit 398" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS397 ,IRQS Status Bit 397" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS396 ,IRQS Status Bit 396" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS395 ,IRQS Status Bit 395" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS394 ,IRQS Status Bit 394" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS393 ,IRQS Status Bit 393" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS392 ,IRQS Status Bit 392" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS391 ,IRQS Status Bit 391" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS390 ,IRQS Status Bit 390" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS389 ,IRQS Status Bit 389" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS388 ,IRQS Status Bit 388" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS387 ,IRQS Status Bit 387" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS386 ,IRQS Status Bit 386" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS385 ,IRQS Status Bit 385" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS384 ,IRQS Status Bit 384" "Low,High"
|
|
else
|
|
hgroup.long 0x0D34++0x03
|
|
hide.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0E)
|
|
rgroup.long 0x0D38++0x03
|
|
line.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13"
|
|
bitfld.long 0x00 31. " IRQS447 ,IRQS Status Bit 447" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS446 ,IRQS Status Bit 446" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS445 ,IRQS Status Bit 445" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS444 ,IRQS Status Bit 444" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS443 ,IRQS Status Bit 443" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS442 ,IRQS Status Bit 442" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS441 ,IRQS Status Bit 441" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS440 ,IRQS Status Bit 440" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS439 ,IRQS Status Bit 439" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS438 ,IRQS Status Bit 438" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS437 ,IRQS Status Bit 437" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS436 ,IRQS Status Bit 436" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS435 ,IRQS Status Bit 435" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS434 ,IRQS Status Bit 434" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS433 ,IRQS Status Bit 433" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS432 ,IRQS Status Bit 432" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS431 ,IRQS Status Bit 431" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS430 ,IRQS Status Bit 430" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS429 ,IRQS Status Bit 429" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS428 ,IRQS Status Bit 428" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS427 ,IRQS Status Bit 427" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS426 ,IRQS Status Bit 426" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS425 ,IRQS Status Bit 425" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS424 ,IRQS Status Bit 424" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS423 ,IRQS Status Bit 423" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS422 ,IRQS Status Bit 422" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS421 ,IRQS Status Bit 421" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS420 ,IRQS Status Bit 420" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS419 ,IRQS Status Bit 419" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS418 ,IRQS Status Bit 418" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS417 ,IRQS Status Bit 417" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS416 ,IRQS Status Bit 416" "Low,High"
|
|
else
|
|
hgroup.long 0x0D38++0x03
|
|
hide.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x0F)
|
|
rgroup.long 0x0D3C++0x03
|
|
line.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14"
|
|
bitfld.long 0x00 31. " IRQS479 ,IRQS Status Bit 479" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS478 ,IRQS Status Bit 478" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS477 ,IRQS Status Bit 477" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS476 ,IRQS Status Bit 476" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS475 ,IRQS Status Bit 475" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS474 ,IRQS Status Bit 474" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS473 ,IRQS Status Bit 473" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS472 ,IRQS Status Bit 472" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS471 ,IRQS Status Bit 471" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS470 ,IRQS Status Bit 470" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS469 ,IRQS Status Bit 469" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS468 ,IRQS Status Bit 468" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS467 ,IRQS Status Bit 467" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS466 ,IRQS Status Bit 466" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS465 ,IRQS Status Bit 465" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS464 ,IRQS Status Bit 464" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS463 ,IRQS Status Bit 463" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS462 ,IRQS Status Bit 462" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS461 ,IRQS Status Bit 461" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS460 ,IRQS Status Bit 460" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS459 ,IRQS Status Bit 459" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS458 ,IRQS Status Bit 458" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS457 ,IRQS Status Bit 457" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS456 ,IRQS Status Bit 456" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS455 ,IRQS Status Bit 455" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS454 ,IRQS Status Bit 454" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS453 ,IRQS Status Bit 453" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS452 ,IRQS Status Bit 452" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS451 ,IRQS Status Bit 451" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS450 ,IRQS Status Bit 450" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS449 ,IRQS Status Bit 449" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS448 ,IRQS Status Bit 448" "Low,High"
|
|
else
|
|
hgroup.long 0x0D3C++0x03
|
|
hide.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x10)
|
|
rgroup.long 0x0D40++0x03
|
|
line.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15"
|
|
bitfld.long 0x00 31. " IRQS511 ,IRQS Status Bit 511" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS510 ,IRQS Status Bit 510" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS509 ,IRQS Status Bit 509" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS508 ,IRQS Status Bit 508" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS507 ,IRQS Status Bit 507" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS506 ,IRQS Status Bit 506" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS505 ,IRQS Status Bit 505" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS504 ,IRQS Status Bit 504" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS503 ,IRQS Status Bit 503" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS502 ,IRQS Status Bit 502" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS501 ,IRQS Status Bit 501" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS500 ,IRQS Status Bit 500" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS499 ,IRQS Status Bit 499" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS498 ,IRQS Status Bit 498" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS497 ,IRQS Status Bit 497" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS496 ,IRQS Status Bit 496" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS495 ,IRQS Status Bit 495" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS494 ,IRQS Status Bit 494" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS493 ,IRQS Status Bit 493" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS492 ,IRQS Status Bit 492" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS491 ,IRQS Status Bit 491" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS490 ,IRQS Status Bit 490" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS489 ,IRQS Status Bit 489" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS488 ,IRQS Status Bit 488" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS487 ,IRQS Status Bit 487" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS486 ,IRQS Status Bit 486" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS485 ,IRQS Status Bit 485" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS484 ,IRQS Status Bit 484" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS483 ,IRQS Status Bit 483" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS482 ,IRQS Status Bit 482" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS481 ,IRQS Status Bit 481" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS480 ,IRQS Status Bit 480" "Low,High"
|
|
else
|
|
hgroup.long 0x0D40++0x03
|
|
hide.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x11)
|
|
rgroup.long 0x0D44++0x03
|
|
line.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16"
|
|
bitfld.long 0x00 31. " IRQS543 ,IRQS Status Bit 543" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS542 ,IRQS Status Bit 542" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS541 ,IRQS Status Bit 541" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS540 ,IRQS Status Bit 540" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS539 ,IRQS Status Bit 539" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS538 ,IRQS Status Bit 538" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS537 ,IRQS Status Bit 537" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS536 ,IRQS Status Bit 536" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS535 ,IRQS Status Bit 535" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS534 ,IRQS Status Bit 534" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS533 ,IRQS Status Bit 533" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS532 ,IRQS Status Bit 532" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS531 ,IRQS Status Bit 531" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS530 ,IRQS Status Bit 530" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS529 ,IRQS Status Bit 529" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS528 ,IRQS Status Bit 528" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS527 ,IRQS Status Bit 527" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS526 ,IRQS Status Bit 526" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS525 ,IRQS Status Bit 525" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS524 ,IRQS Status Bit 524" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS523 ,IRQS Status Bit 523" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS522 ,IRQS Status Bit 522" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS521 ,IRQS Status Bit 521" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS520 ,IRQS Status Bit 520" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS519 ,IRQS Status Bit 519" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS518 ,IRQS Status Bit 518" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS517 ,IRQS Status Bit 517" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS516 ,IRQS Status Bit 516" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS515 ,IRQS Status Bit 515" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS514 ,IRQS Status Bit 514" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS513 ,IRQS Status Bit 513" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS512 ,IRQS Status Bit 512" "Low,High"
|
|
else
|
|
hgroup.long 0x0D44++0x03
|
|
hide.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x12)
|
|
rgroup.long 0x0D48++0x03
|
|
line.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17"
|
|
bitfld.long 0x00 31. " IRQS575 ,IRQS Status Bit 575" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS574 ,IRQS Status Bit 574" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS573 ,IRQS Status Bit 573" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS572 ,IRQS Status Bit 572" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS571 ,IRQS Status Bit 571" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS570 ,IRQS Status Bit 570" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS569 ,IRQS Status Bit 569" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS568 ,IRQS Status Bit 568" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS567 ,IRQS Status Bit 567" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS566 ,IRQS Status Bit 566" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS565 ,IRQS Status Bit 565" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS564 ,IRQS Status Bit 564" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS563 ,IRQS Status Bit 563" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS562 ,IRQS Status Bit 562" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS561 ,IRQS Status Bit 561" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS560 ,IRQS Status Bit 560" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS559 ,IRQS Status Bit 559" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS558 ,IRQS Status Bit 558" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS557 ,IRQS Status Bit 557" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS556 ,IRQS Status Bit 556" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS555 ,IRQS Status Bit 555" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS554 ,IRQS Status Bit 554" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS553 ,IRQS Status Bit 553" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS552 ,IRQS Status Bit 552" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS551 ,IRQS Status Bit 551" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS550 ,IRQS Status Bit 550" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS549 ,IRQS Status Bit 549" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS548 ,IRQS Status Bit 548" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS547 ,IRQS Status Bit 547" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS546 ,IRQS Status Bit 546" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS545 ,IRQS Status Bit 545" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS544 ,IRQS Status Bit 544" "Low,High"
|
|
else
|
|
hgroup.long 0x0D48++0x03
|
|
hide.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x13)
|
|
rgroup.long 0x0D4C++0x03
|
|
line.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18"
|
|
bitfld.long 0x00 31. " IRQS607 ,IRQS Status Bit 607" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS606 ,IRQS Status Bit 606" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS605 ,IRQS Status Bit 605" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS604 ,IRQS Status Bit 604" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS603 ,IRQS Status Bit 603" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS602 ,IRQS Status Bit 602" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS601 ,IRQS Status Bit 601" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS600 ,IRQS Status Bit 600" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS599 ,IRQS Status Bit 599" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS598 ,IRQS Status Bit 598" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS597 ,IRQS Status Bit 597" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS596 ,IRQS Status Bit 596" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS595 ,IRQS Status Bit 595" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS594 ,IRQS Status Bit 594" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS593 ,IRQS Status Bit 593" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS592 ,IRQS Status Bit 592" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS591 ,IRQS Status Bit 591" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS590 ,IRQS Status Bit 590" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS589 ,IRQS Status Bit 589" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS588 ,IRQS Status Bit 588" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS587 ,IRQS Status Bit 587" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS586 ,IRQS Status Bit 586" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS585 ,IRQS Status Bit 585" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS584 ,IRQS Status Bit 584" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS583 ,IRQS Status Bit 583" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS582 ,IRQS Status Bit 582" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS581 ,IRQS Status Bit 581" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS580 ,IRQS Status Bit 580" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS579 ,IRQS Status Bit 579" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS578 ,IRQS Status Bit 578" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS577 ,IRQS Status Bit 577" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS576 ,IRQS Status Bit 576" "Low,High"
|
|
else
|
|
hgroup.long 0x0D4C++0x03
|
|
hide.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x14)
|
|
rgroup.long 0x0D50++0x03
|
|
line.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19"
|
|
bitfld.long 0x00 31. " IRQS639 ,IRQS Status Bit 639" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS638 ,IRQS Status Bit 638" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS637 ,IRQS Status Bit 637" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS636 ,IRQS Status Bit 636" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS635 ,IRQS Status Bit 635" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS634 ,IRQS Status Bit 634" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS633 ,IRQS Status Bit 633" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS632 ,IRQS Status Bit 632" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS631 ,IRQS Status Bit 631" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS630 ,IRQS Status Bit 630" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS629 ,IRQS Status Bit 629" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS628 ,IRQS Status Bit 628" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS627 ,IRQS Status Bit 627" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS626 ,IRQS Status Bit 626" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS625 ,IRQS Status Bit 625" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS624 ,IRQS Status Bit 624" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS623 ,IRQS Status Bit 623" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS622 ,IRQS Status Bit 622" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS621 ,IRQS Status Bit 621" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS620 ,IRQS Status Bit 620" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS619 ,IRQS Status Bit 619" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS618 ,IRQS Status Bit 618" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS617 ,IRQS Status Bit 617" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS616 ,IRQS Status Bit 616" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS615 ,IRQS Status Bit 615" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS614 ,IRQS Status Bit 614" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS613 ,IRQS Status Bit 613" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS612 ,IRQS Status Bit 612" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS611 ,IRQS Status Bit 611" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS610 ,IRQS Status Bit 610" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS609 ,IRQS Status Bit 609" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS608 ,IRQS Status Bit 608" "Low,High"
|
|
else
|
|
hgroup.long 0x0D50++0x03
|
|
hide.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x15)
|
|
rgroup.long 0x0D54++0x03
|
|
line.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20"
|
|
bitfld.long 0x00 31. " IRQS671 ,IRQS Status Bit 671" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS670 ,IRQS Status Bit 670" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS669 ,IRQS Status Bit 669" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS668 ,IRQS Status Bit 668" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS667 ,IRQS Status Bit 667" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS666 ,IRQS Status Bit 666" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS665 ,IRQS Status Bit 665" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS664 ,IRQS Status Bit 664" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS663 ,IRQS Status Bit 663" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS662 ,IRQS Status Bit 662" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS661 ,IRQS Status Bit 661" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS660 ,IRQS Status Bit 660" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS659 ,IRQS Status Bit 659" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS658 ,IRQS Status Bit 658" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS657 ,IRQS Status Bit 657" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS656 ,IRQS Status Bit 656" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS655 ,IRQS Status Bit 655" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS654 ,IRQS Status Bit 654" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS653 ,IRQS Status Bit 653" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS652 ,IRQS Status Bit 652" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS651 ,IRQS Status Bit 651" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS650 ,IRQS Status Bit 650" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS649 ,IRQS Status Bit 649" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS648 ,IRQS Status Bit 648" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS647 ,IRQS Status Bit 647" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS646 ,IRQS Status Bit 646" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS645 ,IRQS Status Bit 645" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS644 ,IRQS Status Bit 644" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS643 ,IRQS Status Bit 643" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS642 ,IRQS Status Bit 642" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS641 ,IRQS Status Bit 641" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS640 ,IRQS Status Bit 640" "Low,High"
|
|
else
|
|
hgroup.long 0x0D54++0x03
|
|
hide.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x16)
|
|
rgroup.long 0x0D58++0x03
|
|
line.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21"
|
|
bitfld.long 0x00 31. " IRQS703 ,IRQS Status Bit 703" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS702 ,IRQS Status Bit 702" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS701 ,IRQS Status Bit 701" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS700 ,IRQS Status Bit 700" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS699 ,IRQS Status Bit 699" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS698 ,IRQS Status Bit 698" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS697 ,IRQS Status Bit 697" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS696 ,IRQS Status Bit 696" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS695 ,IRQS Status Bit 695" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS694 ,IRQS Status Bit 694" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS693 ,IRQS Status Bit 693" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS692 ,IRQS Status Bit 692" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS691 ,IRQS Status Bit 691" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS690 ,IRQS Status Bit 690" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS689 ,IRQS Status Bit 689" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS688 ,IRQS Status Bit 688" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS687 ,IRQS Status Bit 687" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS686 ,IRQS Status Bit 686" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS685 ,IRQS Status Bit 685" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS684 ,IRQS Status Bit 684" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS683 ,IRQS Status Bit 683" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS682 ,IRQS Status Bit 682" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS681 ,IRQS Status Bit 681" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS680 ,IRQS Status Bit 680" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS679 ,IRQS Status Bit 679" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS678 ,IRQS Status Bit 678" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS677 ,IRQS Status Bit 677" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS676 ,IRQS Status Bit 676" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS675 ,IRQS Status Bit 675" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS674 ,IRQS Status Bit 674" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS673 ,IRQS Status Bit 673" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS672 ,IRQS Status Bit 672" "Low,High"
|
|
else
|
|
hgroup.long 0x0D58++0x03
|
|
hide.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x17)
|
|
rgroup.long 0x0D5C++0x03
|
|
line.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22"
|
|
bitfld.long 0x00 31. " IRQS735 ,IRQS Status Bit 735" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS734 ,IRQS Status Bit 734" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS733 ,IRQS Status Bit 733" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS732 ,IRQS Status Bit 732" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS731 ,IRQS Status Bit 731" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS730 ,IRQS Status Bit 730" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS729 ,IRQS Status Bit 729" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS728 ,IRQS Status Bit 728" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS727 ,IRQS Status Bit 727" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS726 ,IRQS Status Bit 726" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS725 ,IRQS Status Bit 725" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS724 ,IRQS Status Bit 724" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS723 ,IRQS Status Bit 723" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS722 ,IRQS Status Bit 722" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS721 ,IRQS Status Bit 721" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS720 ,IRQS Status Bit 720" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS719 ,IRQS Status Bit 719" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS718 ,IRQS Status Bit 718" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS717 ,IRQS Status Bit 717" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS716 ,IRQS Status Bit 716" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS715 ,IRQS Status Bit 715" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS714 ,IRQS Status Bit 714" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS713 ,IRQS Status Bit 713" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS712 ,IRQS Status Bit 712" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS711 ,IRQS Status Bit 711" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS710 ,IRQS Status Bit 710" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS709 ,IRQS Status Bit 709" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS708 ,IRQS Status Bit 708" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS707 ,IRQS Status Bit 707" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS706 ,IRQS Status Bit 706" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS705 ,IRQS Status Bit 705" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS704 ,IRQS Status Bit 704" "Low,High"
|
|
else
|
|
hgroup.long 0x0D5C++0x03
|
|
hide.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x18)
|
|
rgroup.long 0x060++0x03
|
|
line.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23"
|
|
bitfld.long 0x00 31. " IRQS767 ,IRQS Status Bit 767" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS766 ,IRQS Status Bit 766" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS765 ,IRQS Status Bit 765" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS764 ,IRQS Status Bit 764" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS763 ,IRQS Status Bit 763" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS762 ,IRQS Status Bit 762" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS761 ,IRQS Status Bit 761" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS760 ,IRQS Status Bit 760" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS759 ,IRQS Status Bit 759" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS758 ,IRQS Status Bit 758" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS757 ,IRQS Status Bit 757" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS756 ,IRQS Status Bit 756" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS755 ,IRQS Status Bit 755" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS754 ,IRQS Status Bit 754" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS753 ,IRQS Status Bit 753" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS752 ,IRQS Status Bit 752" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS751 ,IRQS Status Bit 751" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS750 ,IRQS Status Bit 750" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS749 ,IRQS Status Bit 749" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS748 ,IRQS Status Bit 748" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS747 ,IRQS Status Bit 747" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS746 ,IRQS Status Bit 746" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS745 ,IRQS Status Bit 745" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS744 ,IRQS Status Bit 744" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS743 ,IRQS Status Bit 743" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS742 ,IRQS Status Bit 742" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS741 ,IRQS Status Bit 741" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS740 ,IRQS Status Bit 740" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS739 ,IRQS Status Bit 739" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS738 ,IRQS Status Bit 738" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS737 ,IRQS Status Bit 737" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS736 ,IRQS Status Bit 736" "Low,High"
|
|
else
|
|
hgroup.long 0x0D60++0x03
|
|
hide.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x19)
|
|
rgroup.long 0x0D64++0x03
|
|
line.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24"
|
|
bitfld.long 0x00 31. " IRQS799 ,IRQS Status Bit 799" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS798 ,IRQS Status Bit 798" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS797 ,IRQS Status Bit 797" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS796 ,IRQS Status Bit 796" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS795 ,IRQS Status Bit 795" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS794 ,IRQS Status Bit 794" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS793 ,IRQS Status Bit 793" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS792 ,IRQS Status Bit 792" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS791 ,IRQS Status Bit 791" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS790 ,IRQS Status Bit 790" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS789 ,IRQS Status Bit 789" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS788 ,IRQS Status Bit 788" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS787 ,IRQS Status Bit 787" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS786 ,IRQS Status Bit 786" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS785 ,IRQS Status Bit 785" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS784 ,IRQS Status Bit 784" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS783 ,IRQS Status Bit 783" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS782 ,IRQS Status Bit 782" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS781 ,IRQS Status Bit 781" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS780 ,IRQS Status Bit 780" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS779 ,IRQS Status Bit 779" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS778 ,IRQS Status Bit 778" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS777 ,IRQS Status Bit 777" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS776 ,IRQS Status Bit 776" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS775 ,IRQS Status Bit 775" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS774 ,IRQS Status Bit 774" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS773 ,IRQS Status Bit 773" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS772 ,IRQS Status Bit 772" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS771 ,IRQS Status Bit 771" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS770 ,IRQS Status Bit 770" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS769 ,IRQS Status Bit 769" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS768 ,IRQS Status Bit 768" "Low,High"
|
|
else
|
|
hgroup.long 0x0D64++0x03
|
|
hide.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1A)
|
|
rgroup.long 0x0D68++0x03
|
|
line.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25"
|
|
bitfld.long 0x00 31. " IRQS831 ,IRQS Status Bit 831" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS830 ,IRQS Status Bit 830" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS829 ,IRQS Status Bit 829" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS828 ,IRQS Status Bit 828" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS827 ,IRQS Status Bit 827" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS826 ,IRQS Status Bit 826" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS825 ,IRQS Status Bit 825" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS824 ,IRQS Status Bit 824" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS823 ,IRQS Status Bit 823" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS822 ,IRQS Status Bit 822" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS821 ,IRQS Status Bit 821" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS820 ,IRQS Status Bit 820" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS819 ,IRQS Status Bit 819" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS818 ,IRQS Status Bit 818" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS817 ,IRQS Status Bit 817" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS816 ,IRQS Status Bit 816" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS815 ,IRQS Status Bit 815" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS814 ,IRQS Status Bit 814" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS813 ,IRQS Status Bit 813" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS812 ,IRQS Status Bit 812" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS811 ,IRQS Status Bit 811" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS810 ,IRQS Status Bit 810" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS809 ,IRQS Status Bit 809" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS808 ,IRQS Status Bit 808" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS807 ,IRQS Status Bit 807" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS806 ,IRQS Status Bit 806" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS805 ,IRQS Status Bit 805" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS804 ,IRQS Status Bit 804" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS803 ,IRQS Status Bit 803" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS802 ,IRQS Status Bit 802" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS801 ,IRQS Status Bit 801" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS800 ,IRQS Status Bit 800" "Low,High"
|
|
else
|
|
hgroup.long 0x0D68++0x03
|
|
hide.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1B)
|
|
rgroup.long 0x0D6C++0x03
|
|
line.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26"
|
|
bitfld.long 0x00 31. " IRQS863 ,IRQS Status Bit 863" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS862 ,IRQS Status Bit 862" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS861 ,IRQS Status Bit 861" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS860 ,IRQS Status Bit 860" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS859 ,IRQS Status Bit 859" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS858 ,IRQS Status Bit 858" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS857 ,IRQS Status Bit 857" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS856 ,IRQS Status Bit 856" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS855 ,IRQS Status Bit 855" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS854 ,IRQS Status Bit 854" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS853 ,IRQS Status Bit 853" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS852 ,IRQS Status Bit 852" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS851 ,IRQS Status Bit 851" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS850 ,IRQS Status Bit 850" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS849 ,IRQS Status Bit 849" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS848 ,IRQS Status Bit 848" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS847 ,IRQS Status Bit 847" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS846 ,IRQS Status Bit 846" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS845 ,IRQS Status Bit 845" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS844 ,IRQS Status Bit 844" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS843 ,IRQS Status Bit 843" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS842 ,IRQS Status Bit 842" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS841 ,IRQS Status Bit 841" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS840 ,IRQS Status Bit 840" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS839 ,IRQS Status Bit 839" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS838 ,IRQS Status Bit 838" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS837 ,IRQS Status Bit 837" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS836 ,IRQS Status Bit 836" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS835 ,IRQS Status Bit 835" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS834 ,IRQS Status Bit 834" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS833 ,IRQS Status Bit 833" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS832 ,IRQS Status Bit 832" "Low,High"
|
|
else
|
|
hgroup.long 0x0D6C++0x03
|
|
hide.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1C)
|
|
rgroup.long 0x0D70++0x03
|
|
line.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27"
|
|
bitfld.long 0x00 31. " IRQS895 ,IRQS Status Bit 895" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS894 ,IRQS Status Bit 894" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS893 ,IRQS Status Bit 893" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS892 ,IRQS Status Bit 892" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS891 ,IRQS Status Bit 891" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS890 ,IRQS Status Bit 890" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS889 ,IRQS Status Bit 889" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS888 ,IRQS Status Bit 888" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS887 ,IRQS Status Bit 887" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS886 ,IRQS Status Bit 886" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS885 ,IRQS Status Bit 885" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS884 ,IRQS Status Bit 884" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS883 ,IRQS Status Bit 883" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS882 ,IRQS Status Bit 882" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS881 ,IRQS Status Bit 881" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS880 ,IRQS Status Bit 880" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS879 ,IRQS Status Bit 879" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS878 ,IRQS Status Bit 878" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS877 ,IRQS Status Bit 877" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS876 ,IRQS Status Bit 876" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS875 ,IRQS Status Bit 875" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS874 ,IRQS Status Bit 874" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS873 ,IRQS Status Bit 873" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS872 ,IRQS Status Bit 872" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS871 ,IRQS Status Bit 871" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS870 ,IRQS Status Bit 870" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS869 ,IRQS Status Bit 869" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS868 ,IRQS Status Bit 868" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS867 ,IRQS Status Bit 867" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS866 ,IRQS Status Bit 866" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS865 ,IRQS Status Bit 865" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS864 ,IRQS Status Bit 864" "Low,High"
|
|
else
|
|
hgroup.long 0x0D70++0x03
|
|
hide.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1D)
|
|
rgroup.long 0x0D74++0x03
|
|
line.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28"
|
|
bitfld.long 0x00 31. " IRQS927 ,IRQS Status Bit 927" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS926 ,IRQS Status Bit 926" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS925 ,IRQS Status Bit 925" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS924 ,IRQS Status Bit 924" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS923 ,IRQS Status Bit 923" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS922 ,IRQS Status Bit 922" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS921 ,IRQS Status Bit 921" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS920 ,IRQS Status Bit 920" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS919 ,IRQS Status Bit 919" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS918 ,IRQS Status Bit 918" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS917 ,IRQS Status Bit 917" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS916 ,IRQS Status Bit 916" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS915 ,IRQS Status Bit 915" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS914 ,IRQS Status Bit 914" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS913 ,IRQS Status Bit 913" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS912 ,IRQS Status Bit 912" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS911 ,IRQS Status Bit 911" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS910 ,IRQS Status Bit 910" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS909 ,IRQS Status Bit 909" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS908 ,IRQS Status Bit 908" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS907 ,IRQS Status Bit 907" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS906 ,IRQS Status Bit 906" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS905 ,IRQS Status Bit 905" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS904 ,IRQS Status Bit 904" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS903 ,IRQS Status Bit 903" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS902 ,IRQS Status Bit 902" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS901 ,IRQS Status Bit 901" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS900 ,IRQS Status Bit 900" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS899 ,IRQS Status Bit 899" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS898 ,IRQS Status Bit 898" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS897 ,IRQS Status Bit 897" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS896 ,IRQS Status Bit 896" "Low,High"
|
|
else
|
|
hgroup.long 0x0D74++0x03
|
|
hide.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1E)
|
|
rgroup.long 0x0D78++0x03
|
|
line.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29"
|
|
bitfld.long 0x00 31. " IRQS959 ,IRQS Status Bit 959" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS958 ,IRQS Status Bit 958" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS957 ,IRQS Status Bit 957" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS956 ,IRQS Status Bit 956" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS955 ,IRQS Status Bit 955" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS954 ,IRQS Status Bit 954" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS953 ,IRQS Status Bit 953" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS952 ,IRQS Status Bit 952" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS951 ,IRQS Status Bit 951" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS950 ,IRQS Status Bit 950" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS949 ,IRQS Status Bit 949" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS948 ,IRQS Status Bit 948" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS947 ,IRQS Status Bit 947" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS946 ,IRQS Status Bit 946" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS945 ,IRQS Status Bit 945" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS944 ,IRQS Status Bit 944" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS943 ,IRQS Status Bit 943" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS942 ,IRQS Status Bit 942" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS941 ,IRQS Status Bit 941" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS940 ,IRQS Status Bit 940" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS939 ,IRQS Status Bit 939" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS938 ,IRQS Status Bit 938" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS937 ,IRQS Status Bit 937" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS936 ,IRQS Status Bit 936" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS935 ,IRQS Status Bit 935" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS934 ,IRQS Status Bit 934" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS933 ,IRQS Status Bit 933" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS932 ,IRQS Status Bit 932" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS931 ,IRQS Status Bit 931" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS930 ,IRQS Status Bit 930" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS929 ,IRQS Status Bit 929" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS928 ,IRQS Status Bit 928" "Low,High"
|
|
else
|
|
hgroup.long 0x0D78++0x03
|
|
hide.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x0000001F)>=0x1F)
|
|
rgroup.long 0x0D7C++0x03
|
|
line.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30"
|
|
bitfld.long 0x00 27. " IRQS987 ,IRQS Status Bit 987" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS986 ,IRQS Status Bit 986" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS985 ,IRQS Status Bit 985" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS984 ,IRQS Status Bit 984" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS983 ,IRQS Status Bit 983" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS982 ,IRQS Status Bit 982" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS981 ,IRQS Status Bit 981" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS980 ,IRQS Status Bit 980" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS979 ,IRQS Status Bit 979" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS978 ,IRQS Status Bit 978" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS977 ,IRQS Status Bit 977" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS976 ,IRQS Status Bit 976" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS975 ,IRQS Status Bit 975" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS974 ,IRQS Status Bit 974" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS973 ,IRQS Status Bit 973" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS972 ,IRQS Status Bit 972" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS971 ,IRQS Status Bit 971" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS970 ,IRQS Status Bit 970" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS969 ,IRQS Status Bit 969" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS968 ,IRQS Status Bit 968" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS967 ,IRQS Status Bit 967" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS966 ,IRQS Status Bit 966" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS965 ,IRQS Status Bit 965" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS964 ,IRQS Status Bit 964" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS963 ,IRQS Status Bit 963" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS962 ,IRQS Status Bit 962" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS961 ,IRQS Status Bit 961" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS960 ,IRQS Status Bit 960" "Low,High"
|
|
else
|
|
hgroup.long 0x0D7C++0x03
|
|
hide.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 25.
|
|
tree "Software Generated Interrupt"
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x400)==0x400)
|
|
wgroup.long 0x0F00++0x03
|
|
line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register"
|
|
bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..."
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List"
|
|
textline " "
|
|
bitfld.long 0x00 15. " NSATT ,NSATT" "Secure,Non-secure"
|
|
bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
wgroup.long 0x0F00++0x03
|
|
line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register"
|
|
bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..."
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
tree.end
|
|
width 12.
|
|
tree "Peripheral/Component ID Registers"
|
|
rgroup.byte 0x0FE0++0x00
|
|
line.byte 0x00 "GICD_PIDR0,Peripheral ID0 Register"
|
|
hexmask.byte 0x00 0.--7. 1. " PART_NUMBER_0 ,Returns 0x90"
|
|
rgroup.byte 0x0FE4++0x00
|
|
line.byte 0x00 "GICD_PIDR1,Peripheral ID1 Register"
|
|
bitfld.byte 0x00 4.--7. " JEP106_ID_3_0 ,JEP106 identity code [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0.--3. " PART_NUMBER_1 ,Returns 0x3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.byte 0x0FE8++0x00
|
|
line.byte 0x00 "GICD_PIDR2,Peripheral ID2 Register"
|
|
bitfld.byte 0x00 4.--7. " ARCHITECTURE ,Identifies the architecture version of the GIC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 3. " JEDEC_USED ,This indicates that the GIC uses a manufacturers identity code that was allocated by JEDEC according to JEP106" "Low,High"
|
|
bitfld.byte 0x00 0.--2. " JEP106_ID_CODE ,JEP106 identity code field" "0,1,2,3,4,5,6,7"
|
|
rgroup.byte 0x0FEC++0x00
|
|
line.byte 0x00 "GICD_PIDR3,Peripheral ID3 Register"
|
|
bitfld.byte 0x00 4.--7. " REVAND ,The top-level RTL provides four AND gates that are tied-off to provide an output value of 0x0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0.--3. " MOD_NUMBER ,The customer can update this field if they modify the RTL of the GIC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.byte 0x0FD0++0x00
|
|
line.byte 0x00 "GICD_PIDR4,Peripheral ID4 Register"
|
|
bitfld.byte 0x00 4.--7. " 4KB_COUNT ,The number of 4KB address blocks you require to access the registers expressed in powers of 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0.--3. " JEP106_C_CODE ,The JEP106 continuation code value represents how many 0x7F continuation characters occur in the manufacturers identity code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.byte 0x0FD4++0x00
|
|
line.byte 0x00 "GICD_PIDR5,Peripheral ID5 Register"
|
|
bitfld.byte 0x00 5.--7. " PPI_NUMBER_0 ,The LSBs of the number of PPIs that the GIC provides" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 0.--4. " SGI_NUMBER ,The number of SGIs that the GIC provides" "None,INTID0,INTID[1:0],INTID[2:0],INTID[3:0],INTID[4:0],INTID[5:0],INTID[6:0],INTID[7:0],INTID[8:0],INTID[9:0],INTID[10:0],INTID[11:0],INTID[12:0],INTID[13:0],INTID[14:0],INTID[15:0],?..."
|
|
rgroup.byte 0x0FD8++0x00
|
|
line.byte 0x00 "GICD_PIDR6,Peripheral ID6 Register"
|
|
bitfld.byte 0x00 2.--7. " SPI_NUMBER_0 ,The LSBs of the number of SPIs that the GIC provides" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.byte 0x00 0.--1. " PPI_NUMBER_1 ,The MSBs of the number of PPIs that the GIC provides" "0,1,2,3"
|
|
rgroup.byte 0x0FDC++0x00
|
|
line.byte 0x00 "GICD_PIDR7,Peripheral ID7 Register"
|
|
bitfld.byte 0x00 7. " TZ ,Identifies the number of security states that the GIC supports" "S,NS&S"
|
|
bitfld.byte 0x00 4.--6. " PRIORITY ,The number of priority levels that the GIC provides" "16,32,64,128,256,?..."
|
|
bitfld.byte 0x00 0.--3. " SPI_NUMBER_1 ,The MSBs of the number of SPIs that the GIC provides" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.byte 0x0FC0++0x00
|
|
line.byte 0x00 "GICD_PIDR8,Peripheral ID8 Register"
|
|
bitfld.byte 0x00 7. " IDENTIFIER ,Identifies the AMBA interface that this register belongs to" "Distributor,CPU Interface"
|
|
bitfld.byte 0x00 5.--6. " IF_TYPE ,Identifies the AMBA protocol that the GIC supports" "AXI,AHB-Lite,?..."
|
|
bitfld.byte 0x00 2.--4. " CPU_IF ,Identifies the number of CPU Interfaces that the GIC contains" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " FIQ_LEGACY ,Identifies if the GIC provides a legacy FIQ input signal for each CPU Interface" "Not supported,Supported"
|
|
bitfld.byte 0x00 0. " IRQ_LEGACY ,Identifies if the GIC provides a legacy IRQ input signal for each CPU Interface" "Not supported,Supported"
|
|
tree.end
|
|
tree.end
|
|
base AD:0xF8F00100
|
|
width 17.
|
|
tree "CPU Interface"
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x400)==0x0)
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICC_CTLR,CPU Interface Control Register"
|
|
bitfld.long 0x00 0. " ENABLE ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
else
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICC_CTLR,CPU Interface Control Register (Non-secure access)"
|
|
bitfld.long 0x00 0. " ENABLE ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
group.long 0x0004++0x03
|
|
line.long 0x00 "GICC_PMR,Interrupt Priority Mask Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface"
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x400)==0x400)
|
|
group.long 0x0008++0x03
|
|
line.long 0x00 "GICC_BPR,Binary Point Register (Non-secure access)"
|
|
bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
else
|
|
group.long 0x0008++0x03
|
|
line.long 0x00 "GICC_BPR,Binary Point Register"
|
|
bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
endif
|
|
hgroup.long 0x000C++0x03
|
|
hide.long 0x00 "GICC_IAR,Interrupt Acknowledge Register"
|
|
in
|
|
wgroup.long 0x0010++0x03
|
|
line.long 0x00 "GICC_EOIR,End Of Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access"
|
|
rgroup.long 0x0014++0x03
|
|
line.long 0x00 "GICC_RPR,Running Priority Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,The current running priority on the CPU interface"
|
|
rgroup.long 0x0018++0x03
|
|
line.long 0x00 "GICC_HPIR,Highest Priority Pending Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt"
|
|
if (((d.l(AD:0xF8F01000+0x04))&0x400)==0x400)
|
|
group.long 0x001C++0x03
|
|
line.long 0x00 "GICC_ABPR,Aliased Binary Point Register"
|
|
bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
else
|
|
hgroup.long 0x001C++0x03
|
|
hide.long 0x00 "GICC_ABPR,Aliased Binary Point Register"
|
|
endif
|
|
rgroup.long 0x00FC++0x03
|
|
line.long 0x00 "GICC_IIDR,CPU and Virtual CPU Interface Identification Register"
|
|
hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID"
|
|
bitfld.long 0x00 16.--19. " ARCH_VER ,Identifies the architecture version of the GIC" "GICv1,GICv1,GICv2,GICv2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer"
|
|
tree.end
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "AXI FIFO Interface"
|
|
tree "AFI 0"
|
|
base ad:0xF8008000
|
|
width 23.
|
|
group.long 0x00++0x0b
|
|
line.long 0x00 "AFI_RDCHAN_CTRL,Read Channel Control Register"
|
|
bitfld.long 0x00 3. " QOSHEADOFCMDQEN ,Priority of a read transaction promotion" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " FABRICOUTCMDEN ,Enable control of outstanding read commands from the fabric" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FABRICQOSEN ,Enable control of qos from the fabric" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " 32BITEN ,Read Channel as a 32-bit interface" "Disabled,Enabled"
|
|
line.long 0x04 "AFI_RDCHAN_ISSUINGCAP,Read Issuing Capability Register"
|
|
bitfld.long 0x04 4.--6. " RDISSUECAP1 ,Max number of outstanding read commands field 1" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x04 0.--2. " RDISSUECAP0 ,Max number of outstanding read commands field 0" "1,2,3,4,5,6,7,8"
|
|
line.long 0x08 "AFI_RDQOS,QOS Read Channel Register"
|
|
bitfld.long 0x08 0.--3. " STATICQOS ,Level of the Qos for the read channel" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
rgroup.long 0x0c++0x07
|
|
line.long 0x00 "AFI_RDDATAFIFO_LEVEL,Read Data FIFO Level Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " FIFOLEVEL ,Level of the Read Data FIFO"
|
|
line.long 0x04 "AFI_RDDEBUG,Read Channel Debug Register"
|
|
bitfld.long 0x04 4. " RDDATAFIFOOVERFLOW ,RdDataFIFO overflow" "No overflow,Overflow"
|
|
bitfld.long 0x04 0.--3. " OUTRDCMDS ,Number of read commands between the AFI and the SAM switch" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x14++0x0b
|
|
line.long 0x00 "AFI_WRCHAN_CTRL,Write Channel Control Register"
|
|
bitfld.long 0x00 8.--11. " WRDATATHRESHOLD ,Write Data Threshold" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 4.--5. " QECMDRELEASEMODE ,Mode of Write Command Release" "On Wlast,On threshold,On receive,?..."
|
|
textline " "
|
|
bitfld.long 0x00 3. " QOSHEADOFCMDQEN ,Priority of a write transaction promotion" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " FABRICOUTCMDEN ,Enable control of outstanding write commands from the fabric" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FABRICQOSEN ,Enable control of qos from the fabric" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " 32BITEN ,Configures the Write Channel as a 32-bit interface" "Disabled,Enabled"
|
|
line.long 0x04 "AFI_WRCHAN_ISSUINGCAP,Write Issuing Capability Register"
|
|
bitfld.long 0x04 4.--6. " WRISSUECAP1 ,Max number of outstanding write commands field 1" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x04 0.--2. " WRISSUECAP0 ,Max number of outstanding write commands field 0" "1,2,3,4,5,6,7,8"
|
|
line.long 0x08 "AFI_WRQOS,QOS Write Channel Register"
|
|
bitfld.long 0x08 0.--3. " STATICQOS ,Level of the Qos for the write channel" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
rgroup.long 0x20++0x07
|
|
line.long 0x00 "AFI_WRDATAFIFO_LEVEL,Write Data FIFO Level Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " FIFOLEVEL ,Level of the Write Data FIFO"
|
|
line.long 0x04 "AFI_WRDEBUG,Write Channel Debug Register"
|
|
bitfld.long 0x04 4. " WRDATAFIFOOVERFLOW ,WrDataFIFO overflow" "No overflow,Overflow"
|
|
bitfld.long 0x04 0.--3. " OUTWRCMDS ,Number of write commands between the AFI and the SAM switch" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
width 12.
|
|
tree.end
|
|
tree "AFI 1"
|
|
base ad:0xF8009000
|
|
width 23.
|
|
group.long 0x00++0x0b
|
|
line.long 0x00 "AFI_RDCHAN_CTRL,Read Channel Control Register"
|
|
bitfld.long 0x00 3. " QOSHEADOFCMDQEN ,Priority of a read transaction promotion" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " FABRICOUTCMDEN ,Enable control of outstanding read commands from the fabric" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FABRICQOSEN ,Enable control of qos from the fabric" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " 32BITEN ,Read Channel as a 32-bit interface" "Disabled,Enabled"
|
|
line.long 0x04 "AFI_RDCHAN_ISSUINGCAP,Read Issuing Capability Register"
|
|
bitfld.long 0x04 4.--6. " RDISSUECAP1 ,Max number of outstanding read commands field 1" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x04 0.--2. " RDISSUECAP0 ,Max number of outstanding read commands field 0" "1,2,3,4,5,6,7,8"
|
|
line.long 0x08 "AFI_RDQOS,QOS Read Channel Register"
|
|
bitfld.long 0x08 0.--3. " STATICQOS ,Level of the Qos for the read channel" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
rgroup.long 0x0c++0x07
|
|
line.long 0x00 "AFI_RDDATAFIFO_LEVEL,Read Data FIFO Level Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " FIFOLEVEL ,Level of the Read Data FIFO"
|
|
line.long 0x04 "AFI_RDDEBUG,Read Channel Debug Register"
|
|
bitfld.long 0x04 4. " RDDATAFIFOOVERFLOW ,RdDataFIFO overflow" "No overflow,Overflow"
|
|
bitfld.long 0x04 0.--3. " OUTRDCMDS ,Number of read commands between the AFI and the SAM switch" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x14++0x0b
|
|
line.long 0x00 "AFI_WRCHAN_CTRL,Write Channel Control Register"
|
|
bitfld.long 0x00 8.--11. " WRDATATHRESHOLD ,Write Data Threshold" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 4.--5. " QECMDRELEASEMODE ,Mode of Write Command Release" "On Wlast,On threshold,On receive,?..."
|
|
textline " "
|
|
bitfld.long 0x00 3. " QOSHEADOFCMDQEN ,Priority of a write transaction promotion" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " FABRICOUTCMDEN ,Enable control of outstanding write commands from the fabric" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FABRICQOSEN ,Enable control of qos from the fabric" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " 32BITEN ,Configures the Write Channel as a 32-bit interface" "Disabled,Enabled"
|
|
line.long 0x04 "AFI_WRCHAN_ISSUINGCAP,Write Issuing Capability Register"
|
|
bitfld.long 0x04 4.--6. " WRISSUECAP1 ,Max number of outstanding write commands field 1" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x04 0.--2. " WRISSUECAP0 ,Max number of outstanding write commands field 0" "1,2,3,4,5,6,7,8"
|
|
line.long 0x08 "AFI_WRQOS,QOS Write Channel Register"
|
|
bitfld.long 0x08 0.--3. " STATICQOS ,Level of the Qos for the write channel" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
rgroup.long 0x20++0x07
|
|
line.long 0x00 "AFI_WRDATAFIFO_LEVEL,Write Data FIFO Level Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " FIFOLEVEL ,Level of the Write Data FIFO"
|
|
line.long 0x04 "AFI_WRDEBUG,Write Channel Debug Register"
|
|
bitfld.long 0x04 4. " WRDATAFIFOOVERFLOW ,WrDataFIFO overflow" "No overflow,Overflow"
|
|
bitfld.long 0x04 0.--3. " OUTWRCMDS ,Number of write commands between the AFI and the SAM switch" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
width 12.
|
|
tree.end
|
|
tree "AFI 2"
|
|
base ad:0xF800A000
|
|
width 23.
|
|
group.long 0x00++0x0b
|
|
line.long 0x00 "AFI_RDCHAN_CTRL,Read Channel Control Register"
|
|
bitfld.long 0x00 3. " QOSHEADOFCMDQEN ,Priority of a read transaction promotion" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " FABRICOUTCMDEN ,Enable control of outstanding read commands from the fabric" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FABRICQOSEN ,Enable control of qos from the fabric" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " 32BITEN ,Read Channel as a 32-bit interface" "Disabled,Enabled"
|
|
line.long 0x04 "AFI_RDCHAN_ISSUINGCAP,Read Issuing Capability Register"
|
|
bitfld.long 0x04 4.--6. " RDISSUECAP1 ,Max number of outstanding read commands field 1" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x04 0.--2. " RDISSUECAP0 ,Max number of outstanding read commands field 0" "1,2,3,4,5,6,7,8"
|
|
line.long 0x08 "AFI_RDQOS,QOS Read Channel Register"
|
|
bitfld.long 0x08 0.--3. " STATICQOS ,Level of the Qos for the read channel" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
rgroup.long 0x0c++0x07
|
|
line.long 0x00 "AFI_RDDATAFIFO_LEVEL,Read Data FIFO Level Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " FIFOLEVEL ,Level of the Read Data FIFO"
|
|
line.long 0x04 "AFI_RDDEBUG,Read Channel Debug Register"
|
|
bitfld.long 0x04 4. " RDDATAFIFOOVERFLOW ,RdDataFIFO overflow" "No overflow,Overflow"
|
|
bitfld.long 0x04 0.--3. " OUTRDCMDS ,Number of read commands between the AFI and the SAM switch" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x14++0x0b
|
|
line.long 0x00 "AFI_WRCHAN_CTRL,Write Channel Control Register"
|
|
bitfld.long 0x00 8.--11. " WRDATATHRESHOLD ,Write Data Threshold" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 4.--5. " QECMDRELEASEMODE ,Mode of Write Command Release" "On Wlast,On threshold,On receive,?..."
|
|
textline " "
|
|
bitfld.long 0x00 3. " QOSHEADOFCMDQEN ,Priority of a write transaction promotion" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " FABRICOUTCMDEN ,Enable control of outstanding write commands from the fabric" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FABRICQOSEN ,Enable control of qos from the fabric" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " 32BITEN ,Configures the Write Channel as a 32-bit interface" "Disabled,Enabled"
|
|
line.long 0x04 "AFI_WRCHAN_ISSUINGCAP,Write Issuing Capability Register"
|
|
bitfld.long 0x04 4.--6. " WRISSUECAP1 ,Max number of outstanding write commands field 1" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x04 0.--2. " WRISSUECAP0 ,Max number of outstanding write commands field 0" "1,2,3,4,5,6,7,8"
|
|
line.long 0x08 "AFI_WRQOS,QOS Write Channel Register"
|
|
bitfld.long 0x08 0.--3. " STATICQOS ,Level of the Qos for the write channel" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
rgroup.long 0x20++0x07
|
|
line.long 0x00 "AFI_WRDATAFIFO_LEVEL,Write Data FIFO Level Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " FIFOLEVEL ,Level of the Write Data FIFO"
|
|
line.long 0x04 "AFI_WRDEBUG,Write Channel Debug Register"
|
|
bitfld.long 0x04 4. " WRDATAFIFOOVERFLOW ,WrDataFIFO overflow" "No overflow,Overflow"
|
|
bitfld.long 0x04 0.--3. " OUTWRCMDS ,Number of write commands between the AFI and the SAM switch" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
width 12.
|
|
tree.end
|
|
tree "AFI 3"
|
|
base ad:0xF800B000
|
|
width 23.
|
|
group.long 0x00++0x0b
|
|
line.long 0x00 "AFI_RDCHAN_CTRL,Read Channel Control Register"
|
|
bitfld.long 0x00 3. " QOSHEADOFCMDQEN ,Priority of a read transaction promotion" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " FABRICOUTCMDEN ,Enable control of outstanding read commands from the fabric" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FABRICQOSEN ,Enable control of qos from the fabric" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " 32BITEN ,Read Channel as a 32-bit interface" "Disabled,Enabled"
|
|
line.long 0x04 "AFI_RDCHAN_ISSUINGCAP,Read Issuing Capability Register"
|
|
bitfld.long 0x04 4.--6. " RDISSUECAP1 ,Max number of outstanding read commands field 1" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x04 0.--2. " RDISSUECAP0 ,Max number of outstanding read commands field 0" "1,2,3,4,5,6,7,8"
|
|
line.long 0x08 "AFI_RDQOS,QOS Read Channel Register"
|
|
bitfld.long 0x08 0.--3. " STATICQOS ,Level of the Qos for the read channel" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
rgroup.long 0x0c++0x07
|
|
line.long 0x00 "AFI_RDDATAFIFO_LEVEL,Read Data FIFO Level Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " FIFOLEVEL ,Level of the Read Data FIFO"
|
|
line.long 0x04 "AFI_RDDEBUG,Read Channel Debug Register"
|
|
bitfld.long 0x04 4. " RDDATAFIFOOVERFLOW ,RdDataFIFO overflow" "No overflow,Overflow"
|
|
bitfld.long 0x04 0.--3. " OUTRDCMDS ,Number of read commands between the AFI and the SAM switch" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x14++0x0b
|
|
line.long 0x00 "AFI_WRCHAN_CTRL,Write Channel Control Register"
|
|
bitfld.long 0x00 8.--11. " WRDATATHRESHOLD ,Write Data Threshold" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 4.--5. " QECMDRELEASEMODE ,Mode of Write Command Release" "On Wlast,On threshold,On receive,?..."
|
|
textline " "
|
|
bitfld.long 0x00 3. " QOSHEADOFCMDQEN ,Priority of a write transaction promotion" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " FABRICOUTCMDEN ,Enable control of outstanding write commands from the fabric" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FABRICQOSEN ,Enable control of qos from the fabric" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " 32BITEN ,Configures the Write Channel as a 32-bit interface" "Disabled,Enabled"
|
|
line.long 0x04 "AFI_WRCHAN_ISSUINGCAP,Write Issuing Capability Register"
|
|
bitfld.long 0x04 4.--6. " WRISSUECAP1 ,Max number of outstanding write commands field 1" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x04 0.--2. " WRISSUECAP0 ,Max number of outstanding write commands field 0" "1,2,3,4,5,6,7,8"
|
|
line.long 0x08 "AFI_WRQOS,QOS Write Channel Register"
|
|
bitfld.long 0x08 0.--3. " STATICQOS ,Level of the Qos for the write channel" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest"
|
|
rgroup.long 0x20++0x07
|
|
line.long 0x00 "AFI_WRDATAFIFO_LEVEL,Write Data FIFO Level Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " FIFOLEVEL ,Level of the Write Data FIFO"
|
|
line.long 0x04 "AFI_WRDEBUG,Write Channel Debug Register"
|
|
bitfld.long 0x04 4. " WRDATAFIFOOVERFLOW ,WrDataFIFO overflow" "No overflow,Overflow"
|
|
bitfld.long 0x04 0.--3. " OUTWRCMDS ,Number of write commands between the AFI and the SAM switch" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
width 12.
|
|
tree.end
|
|
tree.end
|
|
tree.open "Controller Area Network"
|
|
tree "CAN 0"
|
|
base ad:0xE0008000
|
|
width 14.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SRR,Software Reset Register"
|
|
bitfld.long 0x00 1. " CEN ,Can Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SRST ,Software Reset" "No reset,Reset"
|
|
if ((d.l(ad:0xE0008000)&0x02)==0x00)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MSR,Mode Select Register"
|
|
bitfld.long 0x00 2. " SNOOP ,Snoop Mode Select" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " LBACK ,Loop Back Mode Select" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SLEEP ,Sleep Mode Select" "Disabled,Enabled"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MSR,Mode Select Register"
|
|
bitfld.long 0x00 0. " SLEEP ,Sleep Mode Select" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x08++0x07
|
|
line.long 0x00 "BRPR,Baud Rate Prescaler Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " BRP ,Baud Rate Prescaler"
|
|
line.long 0x04 "BTR,Bit Timing Register"
|
|
bitfld.long 0x04 7.--8. " SJW ,Synchronization Jump Width" "0,1,2,3"
|
|
bitfld.long 0x04 4.--6. " TS2 ,Time Segment 2" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 0.--3. " TS1 ,Time Segment 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "ECR,Error Counter Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " REC ,Receive Error Counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TEC ,Transmit Error Counter"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "ESR,Error Status Register"
|
|
eventfld.long 0x00 4. " ACKER ,ACK Error" "No error,Error"
|
|
eventfld.long 0x00 3. " BERR ,Bit Error" "No error,Error"
|
|
eventfld.long 0x00 2. " STER ,Stuff Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 1. " FMER ,Form Error" "No error,Error"
|
|
eventfld.long 0x00 0. " CRCER ,CRC Error" "No error,Error"
|
|
rgroup.long 0x18++0x07
|
|
line.long 0x00 "SR,Status Register"
|
|
bitfld.long 0x00 12. " SNOOP ,Snoop Mode" "Not snoop mode,Snoop mode"
|
|
bitfld.long 0x00 11. " ACFBSY ,Acceptance Filter Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 10. " TXFLL ,Transmit FIFO Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TXBFLL ,High Priority Transmit Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 7.--8. " ESTAT ,Error Status" "Undefined,Error Active State,Error Passive State,Bus Off State"
|
|
bitfld.long 0x00 6. " ERRWRN ,Error Warning" "No warning,Warning"
|
|
textline " "
|
|
bitfld.long 0x00 5. " BBSY ,Bus Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 4. " BIDLE ,Bus Idle" "Not idle,Idle"
|
|
bitfld.long 0x00 3. " NORMAL ,Normal Mode" "Not nomral mode,Normal mode"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SLEEP ,Sleep Mode" "Not sleep mode,Sleep mode"
|
|
bitfld.long 0x00 1. " LBACK ,Loop Back Mode" "Not loop back mode,Loop back mode"
|
|
bitfld.long 0x00 0. " CONFIG ,Configuration Mode Indicator" "Not configuration mode,Configuration Mode"
|
|
line.long 0x04 "ISR,Interrupt Status Register"
|
|
bitfld.long 0x04 14. " TXFEMP ,Transmit FIFO Empty Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 13. " TXFWMEMP ,Transmit FIFO Watermark Empty Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 12. " RXFWMFLL ,Receive FIFO Watermark Full Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 11. " WKUP ,Wake up Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 10. " SLP ,Sleep Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 9. " BSOFF ,Bus Off Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 8. " ERROR ,Error Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 7. " RXNEMP ,Receive FIFO Not Empty Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 6. " RXOFLW ,RX FIFO Overflow Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 5. " RXUFLW ,RX FIFO Underflow Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 4. " RXOK ,New Message Received Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 3. " TXBFLL ,High Priority Transmit Buffer Full Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 2. " TXFLL ,Transmit FIFO Full Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 1. " TXOK ,Transmission Successful Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " ARBLST ,Arbitration Lost Interrupt" "No interrupt,Interrupt"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 14. " ETXFEMP ,Enable Transmit FIFO Empty Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ETXFWMEMP ,Enable Transmit FIFO Watermark Empty Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " ERXFWMFLL ,Enable Receive FIFO Watermark Full Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " EWKUP ,Enable Wake up Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " ESLP ,Enable Sleep Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " EBSOFF ,Enable Bus Off Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " EERROR ,Enable Error Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ERXNEMP ,Enable Receive FIFO Not Empty Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " ERXOFLW ,Enable RX FIFO Overflow Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " ERXUFLW ,Enable RX FIFO Underflow Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " ERXOK ,Enable New Message Received Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ETXBFLL ,Enable High Priority Transmit Buffer Full Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ETXFLL ,Enable Transmit FIFO Full Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ETXOK ,Enable Transmission Successful Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EARBLST ,Enable Arbitration Lost Interrupt" "Disabled,Enabled"
|
|
wgroup.long 0x24++0x07
|
|
line.long 0x00 "ICR,Interrupt Clear Register"
|
|
bitfld.long 0x00 14. " CTXFEMP ,Clear Transmit FIFO Empty Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 13. " CTXFWMEMP ,Clear Transmit FIFO Watermark Empty Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 12. " CRXFWMFLL ,Clear Receive FIFO Watermark Full Interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CWKUP ,Clear Wake up Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 10. " CSLP ,Clear Sleep Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 9. " CBSOFF ,Clear Bus Off Interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CERROR ,Clear Error Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 7. " CRXNEMP ,Clear Receive FIFO Not Empty Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 6. " CRXOFLW ,Clear RX FIFO Overflow Interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CRXUFLW ,Clear RX FIFO Underflow Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 4. " CRXOK ,Clear New Message Received Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 3. " CTXBFLL ,Clear High Priority Transmit Buffer Full Interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CTXFLL ,Clear Transmit FIFO Full Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 1. " CTXOK ,Clear Transmission Successful Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CARBLST ,Clear Arbitration Lost Interrupt" "No effect,Clear"
|
|
line.long 0x04 "TCR,Timestamp Control Register"
|
|
bitfld.long 0x04 0. " CTS ,Clear Timestamp" "No effect,Clear"
|
|
width 14.
|
|
group.long 0x2c++0x03
|
|
line.long 0x00 "WIR,Watermark Interrupt Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " EW ,TXFIFO Empty watermark"
|
|
hexmask.long.byte 0x00 0.--7. 1. " FW ,RXFIFO Full watermark"
|
|
wgroup.long 0x30++0x03
|
|
line.long 0x00 "TXFIFO_ID,Transmit message fifo message identifier"
|
|
hexmask.long.word 0x00 21.--31. 1. " IDH ,Standard Message ID"
|
|
bitfld.long 0x00 20. " SRRRTR ,Substitute Remote Transmission Request" "Data frame,Remote frame"
|
|
bitfld.long 0x00 19. " IDE ,Identifier Extension" "Standard,Extended"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 1.--18. 1. " IDL ,Extended Message ID"
|
|
bitfld.long 0x00 0. " RTR ,Remote Transmission Request" "Data frame,Remote frame"
|
|
group.long 0x34++0x0b
|
|
line.long 0x00 "TXFIFO_DLC,Transmit message fifo data length code"
|
|
bitfld.long 0x00 28.--31. " DLC ,Data Length Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "TXFIFO_DATA1,Transmit message fifo data word 1"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DB0 ,Data Byte 0"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DB1 ,Data Byte 1"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DB2 ,Data Byte 2"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DB3 ,Data Byte 3"
|
|
line.long 0x08 "TXFIFO_DATA2,Transmit message fifo data word 2"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DB0 ,Data Byte 4"
|
|
hexmask.long.byte 0x08 16.--23. 1. " DB1 ,Data Byte 5"
|
|
hexmask.long.byte 0x08 8.--15. 1. " DB2 ,Data Byte 6"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DB3 ,Data Byte 7"
|
|
wgroup.long 0x40++0x03
|
|
line.long 0x00 "TXHPB_ID,Transmit high priority buffer message identifier"
|
|
hexmask.long.word 0x00 21.--31. 1. " IDH ,Standard Message ID"
|
|
bitfld.long 0x00 20. " SRRRTR ,Substitute Remote Transmission Request" "Data frame,Remote frame"
|
|
bitfld.long 0x00 19. " IDE ,Identifier Extension" "Standard,Extended"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 1.--18. 1. " IDL ,Extended Message ID"
|
|
bitfld.long 0x00 0. " RTR ,Remote Transmission Request" "Data frame,Remote frame"
|
|
group.long 0x44++0x0b
|
|
line.long 0x00 "TXHPB_DLC,Transmit high priority buffer data length code"
|
|
bitfld.long 0x00 28.--31. " DLC ,Data Length Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "TXHPB_DATA1,Transmit high priority buffer data word 1"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DB0 ,Data Byte 0"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DB1 ,Data Byte 1"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DB2 ,Data Byte 2"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DB3 ,Data Byte 3"
|
|
line.long 0x08 "TXHPB_DATA2,Transmit high priority buffer data word 2"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DB4 ,Data Byte 4"
|
|
hexmask.long.byte 0x08 16.--23. 1. " DB5 ,Data Byte 5"
|
|
hexmask.long.byte 0x08 8.--15. 1. " DB6 ,Data Byte 6"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DB7 ,Data Byte 7"
|
|
wgroup.long 0x50++0x03
|
|
line.long 0x00 "RXFIFO_ID,Receive message fifo message identifier"
|
|
hexmask.long.word 0x00 21.--31. 1. " IDH ,Standard Message ID"
|
|
bitfld.long 0x00 20. " SRRRTR ,Substitute Remote Transmission Request" "Data frame,Remote frame"
|
|
bitfld.long 0x00 19. " IDE ,Identifier Extension" "Standard,Extended"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 1.--18. 1. " IDL ,Extended Message ID"
|
|
bitfld.long 0x00 0. " RTR ,Remote Transmission Request" "Data frame,Remote frame"
|
|
group.long 0x54++0x2f
|
|
line.long 0x00 "RXFIFO_DLC,Receive message fifo data length code"
|
|
bitfld.long 0x00 28.--31. " DLC ,Data Length Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "RXFIFO_DATA1,Receive message fifo data word 1"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DB0 ,Data Byte 0"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DB1 ,Data Byte 1"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DB2 ,Data Byte 2"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DB3 ,Data Byte 3"
|
|
line.long 0x08 "RXFIFO_DATA2,Receive message fifo data word 2"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DB4 ,Data Byte 4"
|
|
hexmask.long.byte 0x08 16.--23. 1. " DB5 ,Data Byte 5"
|
|
hexmask.long.byte 0x08 8.--15. 1. " DB6 ,Data Byte 6"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DB7 ,Data Byte 7"
|
|
width 14.
|
|
line.long 0x0c "AFR,Acceptance Filter Register"
|
|
bitfld.long 0x0c 3. " UAF4 ,Use Acceptance Filter Number 4" "Not used,Used"
|
|
bitfld.long 0x0c 2. " UAF3 ,Use Acceptance Filter Number 3" "Not used,Used"
|
|
bitfld.long 0x0c 1. " UAF2 ,Use Acceptance Filter Number 2" "Not used,Used"
|
|
textline " "
|
|
bitfld.long 0x0c 0. " UAF1 ,Use Acceptance Filter Number 1" "Not used,Used"
|
|
line.long 0x10 "AFMR1,Acceptance Filter Mask Register 1"
|
|
hexmask.long.word 0x10 21.--31. 1. " AMIDH ,Standard Message ID Mask"
|
|
bitfld.long 0x10 20. " AMSRR ,Substitute Remote Transmission Request Mask" "Not used,Used"
|
|
bitfld.long 0x10 19. " AMIDE ,Identifier Extension Mask" "Not used,Used"
|
|
textline " "
|
|
hexmask.long.tbyte 0x10 1.--18. 1. " AMIDL ,Extended Message ID Mask"
|
|
bitfld.long 0x10 0. " AMRTR ,Remote Transmission Request Mask" "Not used,Used"
|
|
line.long 0x14 "AFIR1,Acceptance Filter ID Register 1"
|
|
hexmask.long.word 0x14 21.--31. 1. " AIIDH ,Standard Message ID"
|
|
bitfld.long 0x14 20. " AISRR ,Substitute Remote Transmission Request" "Not requested,Requested"
|
|
bitfld.long 0x14 19. " AIIDE ,Identifier Extension" "No difference,Difference"
|
|
textline " "
|
|
hexmask.long.tbyte 0x14 1.--18. 1. " AIIDL ,Extended Message ID Mask"
|
|
bitfld.long 0x14 0. " AIRTR ,Remote Transmission Request Mask" "Not masked,Masked"
|
|
line.long 0x18 "AFMR2,Acceptance Filter Mask Register 2"
|
|
hexmask.long.word 0x18 21.--31. 1. " AMIDH ,Standard Message ID Mask"
|
|
bitfld.long 0x18 20. " AMSRR ,Substitute Remote Transmission Request Mask" "Not used,Used"
|
|
bitfld.long 0x18 19. " AMIDE ,Identifier Extension Mask" "Not used,Used"
|
|
textline " "
|
|
hexmask.long.tbyte 0x18 1.--18. 1. " AMIDL ,Extended Message ID Mask"
|
|
bitfld.long 0x18 0. " AMRTR ,Remote Transmission Request Mask" "Not used,Used"
|
|
line.long 0x1C "AFIR2,Acceptance Filter ID Register 2"
|
|
hexmask.long.word 0x1C 21.--31. 1. " AIIDH ,Standard Message ID"
|
|
bitfld.long 0x1C 20. " AISRR ,Substitute Remote Transmission Request" "Not requested,Requested"
|
|
bitfld.long 0x1C 19. " AIIDE ,Identifier Extension" "No difference,Difference"
|
|
textline " "
|
|
hexmask.long.tbyte 0x1C 1.--18. 1. " AIIDL ,Extended Message ID Mask"
|
|
bitfld.long 0x1C 0. " AIRTR ,Remote Transmission Request Mask" "Not masked,Masked"
|
|
line.long 0x20 "AFMR3,Acceptance Filter Mask Register 3"
|
|
hexmask.long.word 0x20 21.--31. 1. " AMIDH ,Standard Message ID Mask"
|
|
bitfld.long 0x20 20. " AMSRR ,Substitute Remote Transmission Request Mask" "Not used,Used"
|
|
bitfld.long 0x20 19. " AMIDE ,Identifier Extension Mask" "Not used,Used"
|
|
textline " "
|
|
hexmask.long.tbyte 0x20 1.--18. 1. " AMIDL ,Extended Message ID Mask"
|
|
bitfld.long 0x20 0. " AMRTR ,Remote Transmission Request Mask" "Not used,Used"
|
|
line.long 0x24 "AFIR3,Acceptance Filter ID Register 3"
|
|
hexmask.long.word 0x24 21.--31. 1. " AIIDH ,Standard Message ID"
|
|
bitfld.long 0x24 20. " AISRR ,Substitute Remote Transmission Request" "Not requested,Requested"
|
|
bitfld.long 0x24 19. " AIIDE ,Identifier Extension" "No difference,Difference"
|
|
textline " "
|
|
hexmask.long.tbyte 0x24 1.--18. 1. " AIIDL ,Extended Message ID Mask"
|
|
bitfld.long 0x24 0. " AIRTR ,Remote Transmission Request Mask" "Not masked,Masked"
|
|
line.long 0x28 "AFMR4,Acceptance Filter Mask Register 4"
|
|
hexmask.long.word 0x28 21.--31. 1. " AMIDH ,Standard Message ID Mask"
|
|
bitfld.long 0x28 20. " AMSRR ,Substitute Remote Transmission Request Mask" "Not used,Used"
|
|
bitfld.long 0x28 19. " AMIDE ,Identifier Extension Mask" "Not used,Used"
|
|
textline " "
|
|
hexmask.long.tbyte 0x28 1.--18. 1. " AMIDL ,Extended Message ID Mask"
|
|
bitfld.long 0x28 0. " AMRTR ,Remote Transmission Request Mask" "Not used,Used"
|
|
line.long 0x2C "AFIR4,Acceptance Filter ID Register 4"
|
|
hexmask.long.word 0x2C 21.--31. 1. " AIIDH ,Standard Message ID"
|
|
bitfld.long 0x2C 20. " AISRR ,Substitute Remote Transmission Request" "Not requested,Requested"
|
|
bitfld.long 0x2C 19. " AIIDE ,Identifier Extension" "No difference,Difference"
|
|
textline " "
|
|
hexmask.long.tbyte 0x2C 1.--18. 1. " AIIDL ,Extended Message ID Mask"
|
|
bitfld.long 0x2C 0. " AIRTR ,Remote Transmission Request Mask" "Not masked,Masked"
|
|
width 12.
|
|
tree.end
|
|
tree "CAN 1"
|
|
base ad:0xE0009000
|
|
width 14.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SRR,Software Reset Register"
|
|
bitfld.long 0x00 1. " CEN ,Can Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SRST ,Software Reset" "No reset,Reset"
|
|
if ((d.l(ad:0xE0009000)&0x02)==0x00)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MSR,Mode Select Register"
|
|
bitfld.long 0x00 2. " SNOOP ,Snoop Mode Select" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " LBACK ,Loop Back Mode Select" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SLEEP ,Sleep Mode Select" "Disabled,Enabled"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MSR,Mode Select Register"
|
|
bitfld.long 0x00 0. " SLEEP ,Sleep Mode Select" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x08++0x07
|
|
line.long 0x00 "BRPR,Baud Rate Prescaler Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " BRP ,Baud Rate Prescaler"
|
|
line.long 0x04 "BTR,Bit Timing Register"
|
|
bitfld.long 0x04 7.--8. " SJW ,Synchronization Jump Width" "0,1,2,3"
|
|
bitfld.long 0x04 4.--6. " TS2 ,Time Segment 2" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 0.--3. " TS1 ,Time Segment 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "ECR,Error Counter Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " REC ,Receive Error Counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TEC ,Transmit Error Counter"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "ESR,Error Status Register"
|
|
eventfld.long 0x00 4. " ACKER ,ACK Error" "No error,Error"
|
|
eventfld.long 0x00 3. " BERR ,Bit Error" "No error,Error"
|
|
eventfld.long 0x00 2. " STER ,Stuff Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 1. " FMER ,Form Error" "No error,Error"
|
|
eventfld.long 0x00 0. " CRCER ,CRC Error" "No error,Error"
|
|
rgroup.long 0x18++0x07
|
|
line.long 0x00 "SR,Status Register"
|
|
bitfld.long 0x00 12. " SNOOP ,Snoop Mode" "Not snoop mode,Snoop mode"
|
|
bitfld.long 0x00 11. " ACFBSY ,Acceptance Filter Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 10. " TXFLL ,Transmit FIFO Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TXBFLL ,High Priority Transmit Buffer Full" "Not full,Full"
|
|
bitfld.long 0x00 7.--8. " ESTAT ,Error Status" "Undefined,Error Active State,Error Passive State,Bus Off State"
|
|
bitfld.long 0x00 6. " ERRWRN ,Error Warning" "No warning,Warning"
|
|
textline " "
|
|
bitfld.long 0x00 5. " BBSY ,Bus Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 4. " BIDLE ,Bus Idle" "Not idle,Idle"
|
|
bitfld.long 0x00 3. " NORMAL ,Normal Mode" "Not nomral mode,Normal mode"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SLEEP ,Sleep Mode" "Not sleep mode,Sleep mode"
|
|
bitfld.long 0x00 1. " LBACK ,Loop Back Mode" "Not loop back mode,Loop back mode"
|
|
bitfld.long 0x00 0. " CONFIG ,Configuration Mode Indicator" "Not configuration mode,Configuration Mode"
|
|
line.long 0x04 "ISR,Interrupt Status Register"
|
|
bitfld.long 0x04 14. " TXFEMP ,Transmit FIFO Empty Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 13. " TXFWMEMP ,Transmit FIFO Watermark Empty Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 12. " RXFWMFLL ,Receive FIFO Watermark Full Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 11. " WKUP ,Wake up Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 10. " SLP ,Sleep Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 9. " BSOFF ,Bus Off Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 8. " ERROR ,Error Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 7. " RXNEMP ,Receive FIFO Not Empty Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 6. " RXOFLW ,RX FIFO Overflow Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 5. " RXUFLW ,RX FIFO Underflow Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 4. " RXOK ,New Message Received Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 3. " TXBFLL ,High Priority Transmit Buffer Full Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 2. " TXFLL ,Transmit FIFO Full Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 1. " TXOK ,Transmission Successful Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " ARBLST ,Arbitration Lost Interrupt" "No interrupt,Interrupt"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 14. " ETXFEMP ,Enable Transmit FIFO Empty Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ETXFWMEMP ,Enable Transmit FIFO Watermark Empty Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " ERXFWMFLL ,Enable Receive FIFO Watermark Full Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " EWKUP ,Enable Wake up Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " ESLP ,Enable Sleep Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " EBSOFF ,Enable Bus Off Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " EERROR ,Enable Error Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ERXNEMP ,Enable Receive FIFO Not Empty Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " ERXOFLW ,Enable RX FIFO Overflow Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " ERXUFLW ,Enable RX FIFO Underflow Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " ERXOK ,Enable New Message Received Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ETXBFLL ,Enable High Priority Transmit Buffer Full Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ETXFLL ,Enable Transmit FIFO Full Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ETXOK ,Enable Transmission Successful Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EARBLST ,Enable Arbitration Lost Interrupt" "Disabled,Enabled"
|
|
wgroup.long 0x24++0x07
|
|
line.long 0x00 "ICR,Interrupt Clear Register"
|
|
bitfld.long 0x00 14. " CTXFEMP ,Clear Transmit FIFO Empty Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 13. " CTXFWMEMP ,Clear Transmit FIFO Watermark Empty Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 12. " CRXFWMFLL ,Clear Receive FIFO Watermark Full Interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CWKUP ,Clear Wake up Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 10. " CSLP ,Clear Sleep Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 9. " CBSOFF ,Clear Bus Off Interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CERROR ,Clear Error Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 7. " CRXNEMP ,Clear Receive FIFO Not Empty Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 6. " CRXOFLW ,Clear RX FIFO Overflow Interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CRXUFLW ,Clear RX FIFO Underflow Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 4. " CRXOK ,Clear New Message Received Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 3. " CTXBFLL ,Clear High Priority Transmit Buffer Full Interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CTXFLL ,Clear Transmit FIFO Full Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 1. " CTXOK ,Clear Transmission Successful Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CARBLST ,Clear Arbitration Lost Interrupt" "No effect,Clear"
|
|
line.long 0x04 "TCR,Timestamp Control Register"
|
|
bitfld.long 0x04 0. " CTS ,Clear Timestamp" "No effect,Clear"
|
|
width 14.
|
|
group.long 0x2c++0x03
|
|
line.long 0x00 "WIR,Watermark Interrupt Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " EW ,TXFIFO Empty watermark"
|
|
hexmask.long.byte 0x00 0.--7. 1. " FW ,RXFIFO Full watermark"
|
|
wgroup.long 0x30++0x03
|
|
line.long 0x00 "TXFIFO_ID,Transmit message fifo message identifier"
|
|
hexmask.long.word 0x00 21.--31. 1. " IDH ,Standard Message ID"
|
|
bitfld.long 0x00 20. " SRRRTR ,Substitute Remote Transmission Request" "Data frame,Remote frame"
|
|
bitfld.long 0x00 19. " IDE ,Identifier Extension" "Standard,Extended"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 1.--18. 1. " IDL ,Extended Message ID"
|
|
bitfld.long 0x00 0. " RTR ,Remote Transmission Request" "Data frame,Remote frame"
|
|
group.long 0x34++0x0b
|
|
line.long 0x00 "TXFIFO_DLC,Transmit message fifo data length code"
|
|
bitfld.long 0x00 28.--31. " DLC ,Data Length Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "TXFIFO_DATA1,Transmit message fifo data word 1"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DB0 ,Data Byte 0"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DB1 ,Data Byte 1"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DB2 ,Data Byte 2"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DB3 ,Data Byte 3"
|
|
line.long 0x08 "TXFIFO_DATA2,Transmit message fifo data word 2"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DB0 ,Data Byte 4"
|
|
hexmask.long.byte 0x08 16.--23. 1. " DB1 ,Data Byte 5"
|
|
hexmask.long.byte 0x08 8.--15. 1. " DB2 ,Data Byte 6"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DB3 ,Data Byte 7"
|
|
wgroup.long 0x40++0x03
|
|
line.long 0x00 "TXHPB_ID,Transmit high priority buffer message identifier"
|
|
hexmask.long.word 0x00 21.--31. 1. " IDH ,Standard Message ID"
|
|
bitfld.long 0x00 20. " SRRRTR ,Substitute Remote Transmission Request" "Data frame,Remote frame"
|
|
bitfld.long 0x00 19. " IDE ,Identifier Extension" "Standard,Extended"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 1.--18. 1. " IDL ,Extended Message ID"
|
|
bitfld.long 0x00 0. " RTR ,Remote Transmission Request" "Data frame,Remote frame"
|
|
group.long 0x44++0x0b
|
|
line.long 0x00 "TXHPB_DLC,Transmit high priority buffer data length code"
|
|
bitfld.long 0x00 28.--31. " DLC ,Data Length Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "TXHPB_DATA1,Transmit high priority buffer data word 1"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DB0 ,Data Byte 0"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DB1 ,Data Byte 1"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DB2 ,Data Byte 2"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DB3 ,Data Byte 3"
|
|
line.long 0x08 "TXHPB_DATA2,Transmit high priority buffer data word 2"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DB4 ,Data Byte 4"
|
|
hexmask.long.byte 0x08 16.--23. 1. " DB5 ,Data Byte 5"
|
|
hexmask.long.byte 0x08 8.--15. 1. " DB6 ,Data Byte 6"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DB7 ,Data Byte 7"
|
|
wgroup.long 0x50++0x03
|
|
line.long 0x00 "RXFIFO_ID,Receive message fifo message identifier"
|
|
hexmask.long.word 0x00 21.--31. 1. " IDH ,Standard Message ID"
|
|
bitfld.long 0x00 20. " SRRRTR ,Substitute Remote Transmission Request" "Data frame,Remote frame"
|
|
bitfld.long 0x00 19. " IDE ,Identifier Extension" "Standard,Extended"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 1.--18. 1. " IDL ,Extended Message ID"
|
|
bitfld.long 0x00 0. " RTR ,Remote Transmission Request" "Data frame,Remote frame"
|
|
group.long 0x54++0x2f
|
|
line.long 0x00 "RXFIFO_DLC,Receive message fifo data length code"
|
|
bitfld.long 0x00 28.--31. " DLC ,Data Length Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "RXFIFO_DATA1,Receive message fifo data word 1"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DB0 ,Data Byte 0"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DB1 ,Data Byte 1"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DB2 ,Data Byte 2"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DB3 ,Data Byte 3"
|
|
line.long 0x08 "RXFIFO_DATA2,Receive message fifo data word 2"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DB4 ,Data Byte 4"
|
|
hexmask.long.byte 0x08 16.--23. 1. " DB5 ,Data Byte 5"
|
|
hexmask.long.byte 0x08 8.--15. 1. " DB6 ,Data Byte 6"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DB7 ,Data Byte 7"
|
|
width 14.
|
|
line.long 0x0c "AFR,Acceptance Filter Register"
|
|
bitfld.long 0x0c 3. " UAF4 ,Use Acceptance Filter Number 4" "Not used,Used"
|
|
bitfld.long 0x0c 2. " UAF3 ,Use Acceptance Filter Number 3" "Not used,Used"
|
|
bitfld.long 0x0c 1. " UAF2 ,Use Acceptance Filter Number 2" "Not used,Used"
|
|
textline " "
|
|
bitfld.long 0x0c 0. " UAF1 ,Use Acceptance Filter Number 1" "Not used,Used"
|
|
line.long 0x10 "AFMR1,Acceptance Filter Mask Register 1"
|
|
hexmask.long.word 0x10 21.--31. 1. " AMIDH ,Standard Message ID Mask"
|
|
bitfld.long 0x10 20. " AMSRR ,Substitute Remote Transmission Request Mask" "Not used,Used"
|
|
bitfld.long 0x10 19. " AMIDE ,Identifier Extension Mask" "Not used,Used"
|
|
textline " "
|
|
hexmask.long.tbyte 0x10 1.--18. 1. " AMIDL ,Extended Message ID Mask"
|
|
bitfld.long 0x10 0. " AMRTR ,Remote Transmission Request Mask" "Not used,Used"
|
|
line.long 0x14 "AFIR1,Acceptance Filter ID Register 1"
|
|
hexmask.long.word 0x14 21.--31. 1. " AIIDH ,Standard Message ID"
|
|
bitfld.long 0x14 20. " AISRR ,Substitute Remote Transmission Request" "Not requested,Requested"
|
|
bitfld.long 0x14 19. " AIIDE ,Identifier Extension" "No difference,Difference"
|
|
textline " "
|
|
hexmask.long.tbyte 0x14 1.--18. 1. " AIIDL ,Extended Message ID Mask"
|
|
bitfld.long 0x14 0. " AIRTR ,Remote Transmission Request Mask" "Not masked,Masked"
|
|
line.long 0x18 "AFMR2,Acceptance Filter Mask Register 2"
|
|
hexmask.long.word 0x18 21.--31. 1. " AMIDH ,Standard Message ID Mask"
|
|
bitfld.long 0x18 20. " AMSRR ,Substitute Remote Transmission Request Mask" "Not used,Used"
|
|
bitfld.long 0x18 19. " AMIDE ,Identifier Extension Mask" "Not used,Used"
|
|
textline " "
|
|
hexmask.long.tbyte 0x18 1.--18. 1. " AMIDL ,Extended Message ID Mask"
|
|
bitfld.long 0x18 0. " AMRTR ,Remote Transmission Request Mask" "Not used,Used"
|
|
line.long 0x1C "AFIR2,Acceptance Filter ID Register 2"
|
|
hexmask.long.word 0x1C 21.--31. 1. " AIIDH ,Standard Message ID"
|
|
bitfld.long 0x1C 20. " AISRR ,Substitute Remote Transmission Request" "Not requested,Requested"
|
|
bitfld.long 0x1C 19. " AIIDE ,Identifier Extension" "No difference,Difference"
|
|
textline " "
|
|
hexmask.long.tbyte 0x1C 1.--18. 1. " AIIDL ,Extended Message ID Mask"
|
|
bitfld.long 0x1C 0. " AIRTR ,Remote Transmission Request Mask" "Not masked,Masked"
|
|
line.long 0x20 "AFMR3,Acceptance Filter Mask Register 3"
|
|
hexmask.long.word 0x20 21.--31. 1. " AMIDH ,Standard Message ID Mask"
|
|
bitfld.long 0x20 20. " AMSRR ,Substitute Remote Transmission Request Mask" "Not used,Used"
|
|
bitfld.long 0x20 19. " AMIDE ,Identifier Extension Mask" "Not used,Used"
|
|
textline " "
|
|
hexmask.long.tbyte 0x20 1.--18. 1. " AMIDL ,Extended Message ID Mask"
|
|
bitfld.long 0x20 0. " AMRTR ,Remote Transmission Request Mask" "Not used,Used"
|
|
line.long 0x24 "AFIR3,Acceptance Filter ID Register 3"
|
|
hexmask.long.word 0x24 21.--31. 1. " AIIDH ,Standard Message ID"
|
|
bitfld.long 0x24 20. " AISRR ,Substitute Remote Transmission Request" "Not requested,Requested"
|
|
bitfld.long 0x24 19. " AIIDE ,Identifier Extension" "No difference,Difference"
|
|
textline " "
|
|
hexmask.long.tbyte 0x24 1.--18. 1. " AIIDL ,Extended Message ID Mask"
|
|
bitfld.long 0x24 0. " AIRTR ,Remote Transmission Request Mask" "Not masked,Masked"
|
|
line.long 0x28 "AFMR4,Acceptance Filter Mask Register 4"
|
|
hexmask.long.word 0x28 21.--31. 1. " AMIDH ,Standard Message ID Mask"
|
|
bitfld.long 0x28 20. " AMSRR ,Substitute Remote Transmission Request Mask" "Not used,Used"
|
|
bitfld.long 0x28 19. " AMIDE ,Identifier Extension Mask" "Not used,Used"
|
|
textline " "
|
|
hexmask.long.tbyte 0x28 1.--18. 1. " AMIDL ,Extended Message ID Mask"
|
|
bitfld.long 0x28 0. " AMRTR ,Remote Transmission Request Mask" "Not used,Used"
|
|
line.long 0x2C "AFIR4,Acceptance Filter ID Register 4"
|
|
hexmask.long.word 0x2C 21.--31. 1. " AIIDH ,Standard Message ID"
|
|
bitfld.long 0x2C 20. " AISRR ,Substitute Remote Transmission Request" "Not requested,Requested"
|
|
bitfld.long 0x2C 19. " AIIDE ,Identifier Extension" "No difference,Difference"
|
|
textline " "
|
|
hexmask.long.tbyte 0x2C 1.--18. 1. " AIIDL ,Extended Message ID Mask"
|
|
bitfld.long 0x2C 0. " AIRTR ,Remote Transmission Request Mask" "Not masked,Masked"
|
|
width 12.
|
|
tree.end
|
|
tree.end
|
|
tree "DDR memory controller"
|
|
base ad:0xF8006000
|
|
width 30.
|
|
group.long 0x00++0x47
|
|
line.long 0x00 "DDRC_CTRL,DDRC Control Register"
|
|
bitfld.long 0x00 16. " REG_DDRC_DIS_AUTO_REFRESH ,Disable auto-refresh" "No,Yes"
|
|
bitfld.long 0x00 15. " REG_DDRC_DIS_ACT_BYPASS ,Disable activate bypass" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 14. " REG_DDRC_DIS_RD_BYPASS ,Disable read bypass" "No,Yes"
|
|
hexmask.long.byte 0x00 7.--13. 1. " REG_DDRC_RDWR_IDLE_GAP ,Idle Gap"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " REG_DDRC_BURST8_REFRESH ,Refresh timeout" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 2.--3. " REG_DDRC_DATA_BUS_WIDTH ,DDR bus width control" "32 bit,16 bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 1. " REG_DDRC_POWERDOWN_EN ,Controller power down control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REG_DDRC_SOFT_RSTB ,Active low soft reset" "Reset,No reset"
|
|
line.long 0x04 "TWO_RANK_CFG,Two rank configuration register"
|
|
bitfld.long 0x04 28. " REG_DDRC_ADDRMAP_4BANK_RAM ,Address map for 4 Bank RAMs" "Disabled,Enabled"
|
|
bitfld.long 0x04 27. " REG_DDRC_ADDRMAP_OPEN_BANK ,Open Bank mode for address map" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 22.--26. " REG_DDRC_ADDRMAP_CS_BIT1 ,Rank address bit 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,31"
|
|
bitfld.long 0x04 21. " REG_DDRC_DIFF_RANK_RD_2CYCLE_GAP ,Two cycle gap" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19.--20. " REG_DDRC_WR_ODT_BLOCK ,Write ODT setting" "1 cycle,2 cycles,3 cycles,?..."
|
|
bitfld.long 0x04 14.--18. " REG_DDRC_ADDRMAP_CS_BIT0 ,Rank address bit 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,31"
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " REG_DDRC_ACTIVE_RANKS ,Active ranks" "Reserved,One rank,Reserved,Two ranks"
|
|
hexmask.long.word 0x04 0.--11. 1. " REG_DDRC_T_RFC_NOM_X32 ,Average time between refreshes"
|
|
line.long 0x08 "HPR_REG,HPR Queue control register"
|
|
bitfld.long 0x08 22.--25. " REG_DDRC_HPR_XACT_RUN_LENGTH ,Number of transactions that will be serviced" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x08 11.--21. 1. " REG_DDRC_HPR_MAX_STARVE_X32 ,Number of clocks that the HPR queue can be starved before it goes critical"
|
|
textline " "
|
|
hexmask.long.word 0x08 0.--10. 1. " REG_DDRC_HPR_MIN_NON_CRITICAL_X32 ,Number of clocks that the HPR queue is guaranteed to be non-critical"
|
|
line.long 0x0c "LPR_REG,LPR Queue control register"
|
|
bitfld.long 0x0c 22.--25. " REG_DDRC_LPR_XACT_RUN_LENGTH ,Number of transactions that will be serviced" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x0c 11.--21. 1. " REG_DDRC_LPR_MAX_STARVE_X32 ,Number of clocks that the LPR queue can be starved before it goes critical"
|
|
textline " "
|
|
hexmask.long.word 0x0c 0.--10. 1. " REG_DDRC_LPR_MIN_NON_CRITICAL_X32 ,Number of clocks that the LPR queue is guaranteed to be non-critical"
|
|
line.long 0x10 "WR_REG,WR Queue control register"
|
|
bitfld.long 0x10 11.--14. " REG_DDRC_W_XACT_RUN_LENGTH ,Number of transactions that will be serviced" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x10 0.--10. 1. " REG_DDRC_W_MIN_NON_CRITICAL_X32 ,Number of clock cycles that the WR queue is guaranteed to be non-critical"
|
|
line.long 0x14 "DRAM_PARAM_REG0,DRAM Parameters register 0"
|
|
hexmask.long.byte 0x14 14.--20. 1. " REG_DDRC_POST_SELFREF_GAP_X32 ,Minimum time to wait after coming out of self refresh before doing anything"
|
|
hexmask.long.byte 0x14 6.--13. 1. " REG_DDRC_T_RFC_MIN ,Minimum time from refresh to refresh or activate"
|
|
textline " "
|
|
bitfld.long 0x14 0.--5. " REG_DDRC_T_RC ,Min time between activates to same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x18 "DRAM_PARAM_REG1,DRAM Parameters register 1"
|
|
bitfld.long 0x18 28.--31. " REG_DDRC_T_CKE ,Minimum number of cycles of CKE HIGH/LOW during power down and self refresh" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x18 22.--26. " REG_DDRC_T_RAS_MIN ,Minimum time between activate and precharge to the same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x18 16.--21. " REG_DDRC_T_RAS_MAX ,Maximum time between activate and precharge to same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x18 10.--15. " REG_DDRC_T_FAW ,At most 4 banks must be activated in a rolling window of tFAW cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.long 0x18 5.--9. " REG_DDRC_POWERDOWN_TO_X32 ,After this many clocks of NOP or DESELECT the controller will put the DRAM into power down" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x18 0.--4. " REG_DDRC_WR2PRE ,Minimum time between write and precharge to same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x1c "DRAM_PARAM_REG2,DRAM Parameters register 2"
|
|
bitfld.long 0x1c 28.--31. " REG_DDRC_T_RCD ,Minimum time from activate to read or write command to same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x1c 23.--27. " REG_DDRC_RD2PRE ,Minimum time from read to precharge of same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x1c 20.--22. " REG_DDRC_PAD_PD ,Pads power down time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x1c 15.--19. " REG_DDRC_T_XP ,Minimum time after power down exit to any operation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x1c 10.--14. " REG_DDRC_WR2RD ,Minimum time from write command to read command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x1c 5.--9. " REG_DDRC_RD2WR ,Minimum time from read command to write command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x1c 0.--4. " REG_DDRC_WRITE_LATENCY ,Time from write command to write data on DDRC to PHY Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x20 "DRAM_PARAM_REG3,DRAM Parameters register 3"
|
|
bitfld.long 0x20 30. " REG_DDRC_DIS_PAD_PD ,Pad power down feature" "Enabled,Disabled"
|
|
bitfld.long 0x20 24.--28. " REG_DDRC_READ_LATENCY ,Time from Read command to Read data on DRAM interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x20 23. " REG_DDRC_CLOCK_STOP_EN ,Enable the assertion of stop_clk to the PHY whenever a clock is not required by LPDDR/ LPDDR2" "Disabled,Enabled"
|
|
bitfld.long 0x20 22. " REG_DDRC_MOBILE ,DRAM device in use" "Non-mobile,Mobile/LPDDR"
|
|
textline " "
|
|
bitfld.long 0x20 21. " REG_DDRC_SDRAM ,SDRAM device" "Non-sdram,Sdram"
|
|
bitfld.long 0x20 16.--20. " REG_DDRC_REFRESH_TO_X32 ,Refresh timer to x32" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x20 12.--15. " REG_DDRC_T_RP ,Minimum time from precharge to activate of same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x20 8.--11. " REG_DDRC_REFRESH_MARGIN ,Issue critical refresh or page close this many cycles before the critical refresh or page timer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x20 5.--7. " REG_DDRC_T_RRD ,Minimum time between activates from bank a to bank b" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x20 2.--4. " REG_DDRC_T_CCD ,Minimum time between two reads or two writes" "0,1,2,3,4,5,6,7"
|
|
line.long 0x24 "DRAM_PARAM_REG4,DRAM Parameters register 4"
|
|
bitfld.long 0x24 27. " REG_DDRC_MR_RDATA_VALID ,Mode Register Read Data valid" "Not valid,Valid"
|
|
bitfld.long 0x24 26. " REG_DDRC_MR_TYPE ,Mode register operation" "Write,Read"
|
|
textline " "
|
|
bitfld.long 0x24 25. " DDRC_REG_MR_WR_BUSY ,Mode register write / read busy" "Not busy,Busy"
|
|
hexmask.long.word 0x24 9.--24. 1. " REG_DDRC_MR_DATA ,Mode register write data"
|
|
textline " "
|
|
bitfld.long 0x24 7.--8. " REG_DDRC_MR_ADDR ,Mode register address" "MR0,MR1,MR2,MR3"
|
|
bitfld.long 0x24 6. " REG_DDRC_MR_WR ,Mode register write or read" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x24 2.--5. " REG_DDRC_MAX_RANK_RD ,Maximum number of 64-byte reads" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x24 1. " REG_DDRC_PREFER_WRITE ,Bank selector preference" "Reserved,Write over read"
|
|
textline " "
|
|
bitfld.long 0x24 0. " REG_DDRC_EN_2T_TIMING_MODE ,DDRC 2T timing mode" "Disabled,Enabled"
|
|
line.long 0x28 "DRAM_INIT_PARAM,DRAM initialization parameters register"
|
|
bitfld.long 0x28 7.--10. " REG_DDRC_PRE_OCD_X32 ,Wait period before driving the 'OCD Complete' command to DRAM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x28 0.--6. 1. " REG_DDRC_FINAL_WAIT_X32 ,Cycles to wait after completing the DRAM init sequence before starting the dynamic scheduler"
|
|
line.long 0x2c "DRAM_EMR_REG,DRAM EMR2, EMR3 access register"
|
|
hexmask.long.word 0x2c 16.--31. 1. " REG_DDRC_EMR3 ,Non LPDDR2- Value to be loaded into DRAM EMR3 registers"
|
|
hexmask.long.word 0x2c 0.--15. 1. " REG_DDRC_EMR2 ,Non LPDDR2- Value to be loaded into DRAM EMR2 registers"
|
|
line.long 0x30 "DRAM_EMR_MR_REG,DRAM EMR, MR access register"
|
|
hexmask.long.word 0x30 16.--31. 1. " REG_DDRC_EMR ,Non LPDDR2- Value to be loaded into DRAM EMR registers"
|
|
hexmask.long.word 0x30 0.--15. 1. " REG_DDRC_MR ,Non LPDDR2- Value to be loaded into DRAM Mode registers"
|
|
line.long 0x34 "DRAM_BURST8_RDWR,DRAM burst 8 read/write register"
|
|
hexmask.long.word 0x34 16.--25. 1. " REG_DDRC_POST_CKE_X1024 ,Cycles to wait after driving CKE high to start the DRAM initialization sequence"
|
|
hexmask.long.word 0x34 4.--13. 1. " REG_DDRC_PRE_CKE_X1024 ,Cycles to wait after reset before driving CKE high to start the DRAM initialization sequence"
|
|
textline " "
|
|
bitfld.long 0x34 0.--3. " REG_DDRC_BURST_RDWR ,Burst size used to access the DRAM" "Reserved,Reserved,4,Reserved,8,Reserved,Reserved,Reserved,16,?..."
|
|
line.long 0x38 "DRAM_DISABLE_DQ,DRAM Disable DQ register"
|
|
bitfld.long 0x38 1. " REG_DDRC_DIS_DQ ,De-queue disable" "No,Yes"
|
|
bitfld.long 0x38 0. " REG_DDRC_FORCE_LOW_PRI_N ,Force low priority" "Not forced,Forced"
|
|
line.long 0x3c "DRAM_ADDR_MAP_BANK,Selects the address bits used as DRAM bank address bits"
|
|
bitfld.long 0x3c 8.--11. " REG_DDRC_ADDRMAP_BANK_B2 ,Address bit used as bank address bit 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x3c 4.--7. " REG_DDRC_ADDRMAP_BANK_B1 ,Address bit used as bank address bit 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..."
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textline " "
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bitfld.long 0x3c 0.--3. " REG_DDRC_ADDRMAP_BANK_B0 ,Address bit used as bank address bit 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,?..."
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line.long 0x40 "DRAM_ADDR_MAP_COL,Selects the address bits used as DRAM column address bits"
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bitfld.long 0x40 28.--31. " REG_DDRC_ADDRMAP_COL_B11 ,Address bit used as column address Internal base 11" "0,1,2,3,4,5,6,7,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,15"
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bitfld.long 0x40 24.--27. " REG_DDRC_ADDRMAP_COL_B10 ,Address bit used as column address Internal base 10" "0,1,2,3,4,5,6,7,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,15"
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textline " "
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bitfld.long 0x40 20.--23. " REG_DDRC_ADDRMAP_COL_B9 ,Address bit used as column address Internal base 9" "0,1,2,3,4,5,6,7,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,15"
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bitfld.long 0x40 16.--19. " REG_DDRC_ADDRMAP_COL_B8 ,Address bit used as column address Internal base 8" "0,1,2,3,4,5,6,7,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,15"
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textline " "
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bitfld.long 0x40 12.--15. " REG_DDRC_ADDRMAP_COL_B7 ,Address bit used as column address Internal base 7" "0,1,2,3,4,5,6,7,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,15"
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bitfld.long 0x40 8.--11. " REG_DDRC_ADDRMAP_COL_B4_6 ,Address bit used as column address Internal base 4 to 6" "0,1,2,3,4,5,6,7,?..."
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textline " "
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bitfld.long 0x40 4.--7. " REG_DDRC_ADDRMAP_COL_B3 ,Address bit used as column address Internal base 3" "0,1,2,3,4,5,6,7,?..."
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bitfld.long 0x40 0.--3. " REG_DDRC_ADDRMAP_COL_B2 ,Address bit used as column address Internal base 2" "0,1,2,3,4,5,6,7,?..."
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line.long 0x44 "DRAM_ADDR_MAP_ROW,Selects the address bits used as DRAM row address bits"
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bitfld.long 0x44 24.--27. " REG_DDRC_ADDRMAP_ROW_B15 ,Address bit used as row address bit 15" "0,1,2,3,4,5,6,7,8,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,15"
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bitfld.long 0x44 20.--23. " REG_DDRC_ADDRMAP_ROW_B14 ,Address bit used as row address bit 14" "0,1,2,3,4,5,6,7,8,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,15"
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textline " "
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bitfld.long 0x44 16.--19. " REG_DDRC_ADDRMAP_ROW_B13 ,Address bit used as row address bit 13" "0,1,2,3,4,5,6,7,8,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,15"
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bitfld.long 0x44 12.--15. " REG_DDRC_ADDRMAP_ROW_B12 ,Address bit used as row address bit 12" "0,1,2,3,4,5,6,7,8,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,15"
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textline " "
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bitfld.long 0x44 8.--11. " REG_DDRC_ADDRMAP_ROW_B2_11 ,Address bit used as row address bit 2 to 11" "0,1,2,3,4,5,6,7,8,?..."
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bitfld.long 0x44 4.--7. " REG_DDRC_ADDRMAP_ROW_B1 ,Address bit used as row address bit 1" "0,1,2,3,4,5,6,7,8,?..."
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textline " "
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bitfld.long 0x44 0.--3. " REG_DDRC_ADDRMAP_ROW_B0 ,Address bit used as row address bit 0" "0,1,2,3,4,5,6,7,8,?..."
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rgroup.long 0x4c++0x03
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line.long 0x00 "PHY_DBG_REG,PHY debug register"
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bitfld.long 0x00 19. " PHY_REG_BC_FIFO_RE3 ,Debug read capture FIFO read enable for data slice 3" "Disabled,Enabled"
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bitfld.long 0x00 18. " PHY_REG_BC_FIFO_WE3 ,Debug read capture FIFO write enable, for data slice 3" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17. " PHY_REG_BC_DQS_OE3 ,Debug DQS output enable for data slice 3" "Disabled,Enabled"
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bitfld.long 0x00 16. " PHY_REG_BC_DQ_OE3 ,Debug DQ output enable for data slice 3" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 15. " PHY_REG_BC_FIFO_RE2 ,Debug read capture FIFO read enable for data slice 2" "Disabled,Enabled"
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bitfld.long 0x00 14. " PHY_REG_BC_FIFO_WE2 ,Debug read capture FIFO write enable, for data slice 2" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 13. " PHY_REG_BC_DQS_OE2 ,Debug DQS output enable for data slice 2" "Disabled,Enabled"
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bitfld.long 0x00 12. " PHY_REG_BC_DQ_OE2 ,Debug DQ output enable for data slice 2" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 11. " PHY_REG_BC_FIFO_RE1 ,Debug read capture FIFO read enable for data slice 1" "Disabled,Enabled"
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bitfld.long 0x00 10. " PHY_REG_BC_FIFO_WE1 ,Debug read capture FIFO write enable, for data slice 1" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 9. " PHY_REG_BC_DQS_OE1 ,Debug DQS output enable for data slice 1" "Disabled,Enabled"
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bitfld.long 0x00 8. " PHY_REG_BC_DQ_OE1 ,Debug DQ output enable for data slice 1" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 7. " PHY_REG_BC_FIFO_RE0 ,Debug read capture FIFO read enable for data slice 0" "Disabled,Enabled"
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bitfld.long 0x00 6. " PHY_REG_BC_FIFO_WE0 ,Debug read capture FIFO write enable, for data slice 0" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 5. " PHY_REG_BC_DQS_OE0 ,Debug DQS output enable for data slice 0" "Disabled,Enabled"
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bitfld.long 0x00 4. " PHY_REG_BC_DQ_OE0 ,Debug DQ output enable for data slice 0" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 0.--3. " PHY_REG_RDC_FIFO_RST_ERR_CNT ,Value of the counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x50++0x03
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line.long 0x00 "PHY_CMD_TIMEOUT_RDDATA_CPT,PHY command time out and read data capture FIFO register"
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bitfld.long 0x00 28.--31. " REG_PHY_WRLVL_NUM_OF_DQ0 ,Number of samples for dq0_in for each ratio increment by the Write Leveling FSM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 24.--27. " REG_PHY_GATELVL_NUM_OF_DQ0 ,Number of samples for dq0_in for each ratio increment by the Gate Training FSM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 19. " REG_PHY_CLK_STALL_LEVEL ,This port determines whether delay line clock stalls at HIGH or LOW level" "Low,High"
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bitfld.long 0x00 18. " REG_PHY_DIS_PHY_CTRL_RSTn ,Disable the reset from Phy Ctrl macro" "No,Yes"
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textline " "
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bitfld.long 0x00 17. " REG_PHY_RDC_FIFO_RST_ERR_CNT_CLR ,FIFO Read Data Capture counter reset" "No reset,Reset"
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bitfld.long 0x00 16. " REG_PHY_USE_FIXED_RE ,Enable fixed re delay method" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 15. " REG_PHY_RDC_FIFO_RST_DISABLE ,Read Data Capture FIFO counter disable" "No,Yes"
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bitfld.long 0x00 8.--11. " REG_PHY_RDC_WE_TO_RE_DELAY ,Number of clock cycles between writing into the Read Capture FIFO and the read operation" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
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rgroup.long 0x54++0x03
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line.long 0x00 "MODE_STS_REG,Controller operation mode status registers"
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bitfld.long 0x00 15.--20. " DDRC_REG_DBG_HPR_Q_DEPTH ,Number of entries currently in the HPR CAM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 9.--14. " DDRC_REG_DBG_LPR_Q_DEPTH ,Number of entries currently in the LPR CAM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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textline " "
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bitfld.long 0x00 3.--8. " DDRC_REG_DBG_WR_Q_DEPTH ,Number of entries currently in the WR CAM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 2. " DDRC_REG_DBG_STALL ,Commands stall" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 0.--1. " DDRC_REG_OPERATING_MODE ,Status of the controller" "DDRC Init,Normal,Power-down,Self-refresh"
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group.long 0x58++0x17
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line.long 0x00 "DLL_CALIB,DLL calibration register"
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bitfld.long 0x00 16. " REG_DDRC_DIS_DLL_CALIB ,Disable calibration" "No,Yes"
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line.long 0x04 "ODT_DELAY_HOLD,ODT delay and ODT hold register"
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bitfld.long 0x04 12.--15. " REG_DDRC_WR_ODT_HOLD ,Cycles to hold ODT for a Write Command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x04 8.--11. " REG_DDRC_RD_ODT_HOLD ,Cycles to hold ODT for a Read Command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x04 4.--7. " REG_DDRC_WR_ODT_DELAY ,Delay from issuing a write command to setting ODT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x04 0.--3. " REG_DDRC_RD_ODT_DELAY ,Delay from issuing a read command to setting ODT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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line.long 0x08 "CTRL_REG1,Controller register 1"
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bitfld.long 0x08 12. " REG_DDRC_SELFREF_EN ,DRAM self refresh" "Disabled,Enabled"
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bitfld.long 0x08 10. " REG_DDRC_DIS_COLLISION_PAGE_OPT ,Auto-precharge on collision enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x08 9. " REG_DDRC_DIS_WC ,Disable Write Combine" "No,Yes"
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bitfld.long 0x08 8. " REG_DDRC_REFRESH_UPDATE_LEVEL ,Refresh register(s) have been updated" "Not updated,Updated"
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textline " "
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bitfld.long 0x08 7. " REG_DDRC_AUTO_PRE_EN ,Auto-precharge enable" "Disabled,Enabled"
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bitfld.long 0x08 1.--6. " REG_DDRC_LPR_NUM_ENTRIES ,Number of entries in the low priority transaction store" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
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textline " "
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bitfld.long 0x08 0. " REG_DDRC_PAGECLOSE ,Page close" "Opened,Closed"
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line.long 0x0c "CTRL_REG2,Controller register 2"
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bitfld.long 0x0c 17. " REG_ARB_GO2CRITICAL_EN ,Go2critical enable" "Disabled,Enabled"
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hexmask.long.byte 0x0c 5.--12. 1. " REG_DDRC_GO2CRITICAL_HYSTERESIS ,Number of cycles that must be asserted before the corresponding queue moves to the 'critical' state in the DDRC"
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line.long 0x10 "CTRL_REG3,Controller register 3"
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hexmask.long.word 0x10 16.--25. 1. " REG_DDRC_DFI_T_WLMRD ,First DQS/DQS# rising edge after write leveling mode is programmed"
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hexmask.long.byte 0x10 8.--15. 1. " REG_DDRC_RDLVL_RR ,Read leveling read-to-read delay"
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textline " "
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hexmask.long.byte 0x10 0.--7. 1. " REG_DDRC_WRLVL_WW ,Write leveling write-to-write delay"
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line.long 0x14 "CTRL_REG4,Controller register 4"
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hexmask.long.byte 0x14 8.--15. 1. " DFI_T_CTRLUPD_INTERVAL_MAX_X1024 ,Maximum amount of time between Controller initiated DFI update requests"
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hexmask.long.byte 0x14 0.--7. 1. " DFI_T_CTRLUPD_INTERVAL_MIN_X1024 ,Minimum amount of time between Controller initiated DFI update requests"
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width 38.
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group.long 0xa0++0x2b
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line.long 0x00 "CHE_REFRESH_TIMER01,Refresh Timer for Rank 0 and Rank 1 Register"
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hexmask.long.word 0x00 12.--23. 1. " REFRESH_TIMER1_START_VALUE_X32 ,Refresh Timer for Rank 0"
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textline " "
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hexmask.long.word 0x00 0.--11. 1. " REFRESH_TIMER0_START_VALUE_X32 ,Refresh Timer for Rank 1"
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line.long 0x04 "CHE_T_ZQ,CHE_T_ZQ Register"
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hexmask.long.word 0x04 22.--31. 1. " REG_DDRC_T_ZQ_SHORT_NOP ,Number of cycles of NOP required after a ZQCS command is issued to DRAM "
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textline " "
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hexmask.long.word 0x04 12.--21. 1. " REG_DDRC_T_ZQ_LONG_NOP ,Number of cycles of NOP required after a ZQCL command is issued to DRAM"
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textline " "
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hexmask.long.word 0x04 2.--11. 1. " REG_DDRC_T_MOD ,Command update delay"
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textline " "
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bitfld.long 0x04 1. " REG_DDRC_DDR3 ,DDR2/DDR3 mode" "DDR2,DDR3"
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textline " "
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bitfld.long 0x04 0. " REG_DDRC_DIS_AUTO_ZQ ,Disable controller generation of ZQCS command" "No,Yes"
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line.long 0x08 "CHE_T_ZQ_SHORT_INTERVAL_REG,CHE_T_ZQ Short Interval Register"
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hexmask.long.byte 0x08 20.--27. 1. " T_ZQ_SHORT_INTERVAL_X1024 ,Number of cycles to assert DRAM reset signal during init sequence"
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textline " "
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hexmask.long.tbyte 0x08 0.--19. 1. " DRAM_RSTN_X1024 ,Average interval to wait between automatically issuing ZQCS commands to DDR3 devices"
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line.long 0x0c "DEEP_PWRDWN_REG,Deep Power Down Register"
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hexmask.long.byte 0x0c 1.--8. 1. " DEEPPOWERDOWN_TO_X1024 ,Minimum deep power down time"
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textline " "
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bitfld.long 0x0c 0. " DEEPPOWERDOWN_EN ,Deep Powerdown mode enable" "Disabled,Enabled"
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line.long 0x10 "REG_2C,reg_2c"
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bitfld.long 0x10 28. " REG_DDRC_DFI_RD_DATA_EYE_TRAIN ,Read Data Eye training mode enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 27. " REG_DDRC_DFI_RD_DQS_GATE_LEVEL ,Read DQS Gate Leveling mode enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 26. " REG_DDRC_DFI_WR_LEVEL_EN ,Write leveling mode enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 25. " DDRC_REG_TRDLVL_MAX_ERROR ,RDRLVL_MAX timer timeout" "No timeout,Timeout"
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textline " "
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bitfld.long 0x10 24. " DDRC_REG_TWRLVL_MAX_ERROR ,WRLVL_MAX timer timeout" "No timeout,Timeout"
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textline " "
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hexmask.long.word 0x10 12.--23. 1. " DFI_RDLVL_MAX_X1024 ,Read leveling maximum time"
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textline " "
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hexmask.long.word 0x10 0.--11. 1. " DFI_WRLVL_MAX_X1024 ,Write leveling maximum time"
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line.long 0x14 "REG_2D,reg_2d"
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bitfld.long 0x14 10. " REG_DDRC_DIS_PRE_BYPASS ,Disable bypass path for high priority precharges" "No,Yes"
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textline " "
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bitfld.long 0x14 9. " REG_DDRC_SKIP_OCD ,Skip OCD adjustment step during DDR2 initialization" "Reserved,Enabled"
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textline " "
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hexmask.long.word 0x14 0.--8. 1. " REG_DDRC_2T_DELAY ,Clock edge in which chip select (CSN) and CKE is asserted"
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line.long 0x18 "DFI_TIMING,dfi_timing"
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hexmask.long.word 0x18 15.--24. 1. " REG_DDRC_DFI_T_CTRLUP_MAX ,Maximum number of clock cycles that the ddrc_dfi_ctrlupd_req signal can assert"
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textline " "
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hexmask.long.word 0x18 5.--14. 1. " REG_DDRC_DFI_T_CTRLUP_MIN ,Minimum number of clock cycles that the ddrc_dfi_ctrlupd_req signal must be asserted"
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textline " "
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bitfld.long 0x18 0.--4. " REG_DDRC_DFI_T_RDDATA_EN ,Time from the assertion of a READ command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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line.long 0x1c "REFRESH_TIMER_2,Refresh Timer 2 Register"
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hexmask.long.word 0x1c 12.--23. 1. " REG_DDRC_REFRESH_TIMER3_START_VALUE_X32 ,Refresh Timer for Rank 3"
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textline " "
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hexmask.long.word 0x1c 0.--11. 1. " REG_DDRC_REFRESH_TIMER2_START_VALUE_X32 ,Refresh Timer for Rank 2"
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line.long 0x20 "NC_TIMING,Non-Critical Timing Register"
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hexmask.long.word 0x20 11.--21. 1. " REG_DDRC_LPR_MIN_NON_CRITICAL ,Minimum number of cycles the low priority read transaction store remains non-critical"
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textline " "
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hexmask.long.word 0x20 0.--10. 1. " REG_DDRC_HPR_MIN_NON_CRITICAL ,Minimum number of cycles the high priority read transaction store remains non-critical"
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line.long 0x24 "CHE_ECC_CONTROL_REG_OFFSET,ECC Control Register"
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bitfld.long 0x24 1. " CLEAR_CORRECTABLE_DRAM_ECC_ERROR ,Clear Correctable DRAM ECC error" "No effect,Clear"
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textline " "
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bitfld.long 0x24 0. " CLEAR_UNCORRECTABLE_DRAM_ECC_ERROR ,Clear Uncorrectable DRAM ECC error" "No effect,Clear"
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line.long 0x28 "CHE_CORR_ECC_LOG_REG_OFFSET,CHE_CORR_ECC_LOG_REG_OFFSET"
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hexmask.long.byte 0x28 1.--7. 1. " ECC_CORRECTED_BIT_NUM ,Number syndrome in error for single-bit errors"
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textline " "
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bitfld.long 0x28 0. " CORR_ECC_LOG_VALID ,Correctable ECC error is captured" "Not captured,Caprured"
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rgroup.long 0xcc++0x27
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line.long 0x00 "CHE_CORR_ECC_ADDR_REG_OFFSET,CHE_CORR_ECC_ADDR_REG_OFFSET"
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bitfld.long 0x00 28.--30. " CORR_ECC_LOG_BANK ,Bank" "0,1,2,3,4,5,6,7"
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textline " "
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hexmask.long.word 0x00 12.--27. 1. " CORR_ECC_LOG_ROW ,Row"
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textline " "
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hexmask.long.word 0x00 0.--11. 1. " CORR_ECC_LOG_COL ,Column"
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line.long 0x04 "CHE_CORR_ECC_DATA_31_0_REG_OFFSET,CHE_CORR_ECC_DATA_31_0_REG_OFFSET"
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line.long 0x08 "CHE_CORR_ECC_DATA_63_32_REG_OFFSET,CHE_CORR_ECC_DATA_63_32_REG_OFFSET"
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line.long 0x0c "CHE_CORR_ECC_DATA_71_64_REG_OFFSET,CHE_CORR_ECC_DATA_71_64_REG_OFFSET"
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hexmask.long.byte 0x0c 0.--7. 1. " CORR_ECC_LOG_DAT_71_64 ,Bits [71:64] of the data that caused the captured correctable ECC error"
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line.long 0x10 "CHE_UNCORR_ECC_LOG_REG_OFFSET,CHE_UNCORR_ECC_LOG_REG_OFFSET"
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bitfld.long 0x10 0. " UNCORR_ECC_LOG_VALID ,Uncorrectable ECC error is captured" "Not captured,Caprured"
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line.long 0x14 "CHE_UNCORR_ECC_ADDR_REG_OFFSET,CHE_UNCORR_ECC_ADDR_REG_OFFSET"
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bitfld.long 0x14 28.--30. " UNCORR_ECC_LOG_BANK ,Bank" "0,1,2,3,4,5,6,7"
|
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textline " "
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hexmask.long.word 0x14 12.--27. 1. " UNCORR_ECC_LOG_ROW ,Row"
|
|
textline " "
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hexmask.long.word 0x14 0.--11. 1. " UNCORR_ECC_LOG_COL ,Column"
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line.long 0x18 "CHE_UNCORR_ECC_DATA_31_0_REG_OFFSET,CHE_UNCORR_ECC_DATA_31_0_REG_OFFSET"
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line.long 0x1c "CHE_UNCORR_ECC_DATA_63_32_REG_OFFSET,CHE_UNCORR_ECC_DATA_63_32_REG_OFFSET"
|
|
line.long 0x20 "CHE_UNCORR_ECC_DATA_71_64_REG_OFFSET,CHE_UNCORR_ECC_DATA_71_64_REG_OFFSET"
|
|
hexmask.long.byte 0x20 0.--7. 1. " UNCORR_ECC_LOG_DAT_71_64 ,Bits [71:64] of the data that caused the captured uncorrectable ECC error"
|
|
line.long 0x24 "CHE_ECC_STATS_REG_OFFSET,CHE_ECC_STATS_REG_OFFSET"
|
|
hexmask.long.byte 0x24 8.--15. 1. " STAT_NUM_CORR_ERR ,Number of correctable ECC errors seen since the last read"
|
|
hexmask.long.byte 0x24 0.--7. 1. " STAT_NUM_UNCORR_ERR ,Number of uncorrectable ECC errors seen since the last read"
|
|
group.long 0xf4++0x03
|
|
line.long 0x00 "ECC_SCRUB,ECC_scrub"
|
|
bitfld.long 0x00 0.--2. " REG_DDRC_ECC_MODE ,DRAM ECC Mode" "No ECC,Reserved,Parity,Reserved,SEC/DED over 1-beat,SEC/DED over multiple beats,Device Correction,?..."
|
|
rgroup.long 0xf8++0x07
|
|
line.long 0x00 "CHE_ECC_CORR_BIT_MASK_31_0_REG_OFFSET,CHE_ECC_CORR_BIT_MASK_31_0_REG_OFFSET"
|
|
line.long 0x04 "CHE_ECC_CORR_BIT_MASK_63_32_REG_OFFSET,CHE_ECC_CORR_BIT_MASK_63_32_REG_OFFSET"
|
|
width 23.
|
|
group.long 0x114++0x13
|
|
line.long 0x00 "PHY_RCVR_ENABLE,phy_rcvr_enable"
|
|
bitfld.long 0x00 7. " REG_PHY_DIF_OFF[3] ,Turns the IO Receiver OFF" "No effect,Turn off"
|
|
bitfld.long 0x00 6. " REG_PHY_DIF_OFF[2] ,Turns the IO Receiver OFF" "No effect,Turn off"
|
|
textline " "
|
|
bitfld.long 0x00 5. " REG_PHY_DIF_OFF[1] ,Turns the IO Receiver OFF" "No effect,Turn off"
|
|
bitfld.long 0x00 4. " REG_PHY_DIF_OFF[0] ,Turns the IO Receiver OFF" "No effect,Turn off"
|
|
textline " "
|
|
bitfld.long 0x00 3. " REG_PHY_DIF_ON[3] ,Turns the IO Receiver ON" "No effect,Turn on"
|
|
bitfld.long 0x00 2. " REG_PHY_DIF_ON[2] ,Turns the IO Receiver ON" "No effect,Turn on"
|
|
textline " "
|
|
bitfld.long 0x00 1. " REG_PHY_DIF_ON[1] ,Turns the IO Receiver ON" "No effect,Turn on"
|
|
bitfld.long 0x00 0. " REG_PHY_DIF_ON[0] ,Turns the IO Receiver ON" "No effect,Turn on"
|
|
line.long 0x4 "PHY_CONFIG0,PHY_Config0"
|
|
hexmask.long.byte 0x4 24.--30. 1. " REG_PHY_DQ_OFFSET ,Offset value from DQS to DQ"
|
|
hexmask.long.word 0x4 15.--23. 1. " REG_PHY_BIST_ERR_CLR ,Clear the mismatch error flag from the BIST Checker"
|
|
textline " "
|
|
hexmask.long.word 0x4 6.--14. 1. " REG_PHY_BIST_SHIFT_DQ ,Determines whether early shifting is required"
|
|
bitfld.long 0x4 5. " REG_PHY_BOARD_LPBK_RX ,Slice behaves as Receiver for board loopback" "Disabled,Receiver"
|
|
textline " "
|
|
bitfld.long 0x4 4. " REG_PHY_BOARD_LPBK_TX ,Slice behaves as Transmitter for board loopback" "Disabled,Transmiter"
|
|
bitfld.long 0x4 3. " REG_PHY_WRLVL_INC_MODE ,Incremental Write Leveling Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 2. " REG_PHY_GATELVL_INC_MODE ,Incremental Read DQS Gate Training Mode" "Disabled,Enabled"
|
|
bitfld.long 0x4 1. " REG_PHY_RDLVL_INC_MODE ,Incremental Read Data Eye Training Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 0. " REG_PHY_DATA_SLICE_IN_USE ,Data bus width selection for Read FIFO RE generation" "Not valid,Valid"
|
|
line.long 0x8 "PHY_CONFIG1,PHY_Config1"
|
|
hexmask.long.byte 0x8 24.--30. 1. " REG_PHY_DQ_OFFSET ,Offset value from DQS to DQ"
|
|
hexmask.long.word 0x8 15.--23. 1. " REG_PHY_BIST_ERR_CLR ,Clear the mismatch error flag from the BIST Checker"
|
|
textline " "
|
|
hexmask.long.word 0x8 6.--14. 1. " REG_PHY_BIST_SHIFT_DQ ,Determines whether early shifting is required"
|
|
bitfld.long 0x8 5. " REG_PHY_BOARD_LPBK_RX ,Slice behaves as Receiver for board loopback" "Disabled,Receiver"
|
|
textline " "
|
|
bitfld.long 0x8 4. " REG_PHY_BOARD_LPBK_TX ,Slice behaves as Transmitter for board loopback" "Disabled,Transmiter"
|
|
bitfld.long 0x8 3. " REG_PHY_WRLVL_INC_MODE ,Incremental Write Leveling Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 2. " REG_PHY_GATELVL_INC_MODE ,Incremental Read DQS Gate Training Mode" "Disabled,Enabled"
|
|
bitfld.long 0x8 1. " REG_PHY_RDLVL_INC_MODE ,Incremental Read Data Eye Training Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 0. " REG_PHY_DATA_SLICE_IN_USE ,Data bus width selection for Read FIFO RE generation" "Not valid,Valid"
|
|
line.long 0xC "PHY_CONFIG2,PHY_Config2"
|
|
hexmask.long.byte 0xC 24.--30. 1. " REG_PHY_DQ_OFFSET ,Offset value from DQS to DQ"
|
|
hexmask.long.word 0xC 15.--23. 1. " REG_PHY_BIST_ERR_CLR ,Clear the mismatch error flag from the BIST Checker"
|
|
textline " "
|
|
hexmask.long.word 0xC 6.--14. 1. " REG_PHY_BIST_SHIFT_DQ ,Determines whether early shifting is required"
|
|
bitfld.long 0xC 5. " REG_PHY_BOARD_LPBK_RX ,Slice behaves as Receiver for board loopback" "Disabled,Receiver"
|
|
textline " "
|
|
bitfld.long 0xC 4. " REG_PHY_BOARD_LPBK_TX ,Slice behaves as Transmitter for board loopback" "Disabled,Transmiter"
|
|
bitfld.long 0xC 3. " REG_PHY_WRLVL_INC_MODE ,Incremental Write Leveling Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 2. " REG_PHY_GATELVL_INC_MODE ,Incremental Read DQS Gate Training Mode" "Disabled,Enabled"
|
|
bitfld.long 0xC 1. " REG_PHY_RDLVL_INC_MODE ,Incremental Read Data Eye Training Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 0. " REG_PHY_DATA_SLICE_IN_USE ,Data bus width selection for Read FIFO RE generation" "Not valid,Valid"
|
|
line.long 0x10 "PHY_CONFIG3,PHY_Config3"
|
|
hexmask.long.byte 0x10 24.--30. 1. " REG_PHY_DQ_OFFSET ,Offset value from DQS to DQ"
|
|
hexmask.long.word 0x10 15.--23. 1. " REG_PHY_BIST_ERR_CLR ,Clear the mismatch error flag from the BIST Checker"
|
|
textline " "
|
|
hexmask.long.word 0x10 6.--14. 1. " REG_PHY_BIST_SHIFT_DQ ,Determines whether early shifting is required"
|
|
bitfld.long 0x10 5. " REG_PHY_BOARD_LPBK_RX ,Slice behaves as Receiver for board loopback" "Disabled,Receiver"
|
|
textline " "
|
|
bitfld.long 0x10 4. " REG_PHY_BOARD_LPBK_TX ,Slice behaves as Transmitter for board loopback" "Disabled,Transmiter"
|
|
bitfld.long 0x10 3. " REG_PHY_WRLVL_INC_MODE ,Incremental Write Leveling Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 2. " REG_PHY_GATELVL_INC_MODE ,Incremental Read DQS Gate Training Mode" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " REG_PHY_RDLVL_INC_MODE ,Incremental Read Data Eye Training Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 0. " REG_PHY_DATA_SLICE_IN_USE ,Data bus width selection for Read FIFO RE generation" "Not valid,Valid"
|
|
group.long 0x12c++0x0f
|
|
line.long 0x0 "PHY_INIT_RATIO0,phy_init_ratio 0"
|
|
hexmask.long.word 0x0 10.--19. 1. " REG_PHY_GATELVL_INIT_RATIO ,User programmable init ratio used by DQS Gate Training FSM"
|
|
hexmask.long.word 0x0 0.--9. 1. " REG_PHY_WRLVL_INIT_RATIO ,User programmable init ratio used by Write Leveling FSM"
|
|
line.long 0x4 "PHY_INIT_RATIO1,phy_init_ratio 1"
|
|
hexmask.long.word 0x4 10.--19. 1. " REG_PHY_GATELVL_INIT_RATIO ,User programmable init ratio used by DQS Gate Training FSM"
|
|
hexmask.long.word 0x4 0.--9. 1. " REG_PHY_WRLVL_INIT_RATIO ,User programmable init ratio used by Write Leveling FSM"
|
|
line.long 0x8 "PHY_INIT_RATIO2,phy_init_ratio 2"
|
|
hexmask.long.word 0x8 10.--19. 1. " REG_PHY_GATELVL_INIT_RATIO ,User programmable init ratio used by DQS Gate Training FSM"
|
|
hexmask.long.word 0x8 0.--9. 1. " REG_PHY_WRLVL_INIT_RATIO ,User programmable init ratio used by Write Leveling FSM"
|
|
line.long 0xC "PHY_INIT_RATIO3,phy_init_ratio 3"
|
|
hexmask.long.word 0xC 10.--19. 1. " REG_PHY_GATELVL_INIT_RATIO ,User programmable init ratio used by DQS Gate Training FSM"
|
|
hexmask.long.word 0xC 0.--9. 1. " REG_PHY_WRLVL_INIT_RATIO ,User programmable init ratio used by Write Leveling FSM"
|
|
group.long 0x140++0x0f
|
|
line.long 0x0 "PHY_RD_DQS_CFG0,phy_rd_dqs_cfg 0"
|
|
hexmask.long.word 0x0 11.--19. 1. " REG_PHY_RD_DQS_SLAVE_DELAY ,Value to replace delay/tap value for read DQS slave DLL"
|
|
bitfld.long 0x0 10. " REG_PHY_RD_DQS_SLAVE_FORCE ,Overwrite the delay/tap value for read DQS slave DLL" "Not forced,Forced"
|
|
textline " "
|
|
hexmask.long.word 0x0 0.--9. 1. " REG_PHY_RD_DQS_SLAVE_RATIO ,Ratio value for read DQS slave DLL"
|
|
line.long 0x4 "PHY_RD_DQS_CFG1,phy_rd_dqs_cfg 1"
|
|
hexmask.long.word 0x4 11.--19. 1. " REG_PHY_RD_DQS_SLAVE_DELAY ,Value to replace delay/tap value for read DQS slave DLL"
|
|
bitfld.long 0x4 10. " REG_PHY_RD_DQS_SLAVE_FORCE ,Overwrite the delay/tap value for read DQS slave DLL" "Not forced,Forced"
|
|
textline " "
|
|
hexmask.long.word 0x4 0.--9. 1. " REG_PHY_RD_DQS_SLAVE_RATIO ,Ratio value for read DQS slave DLL"
|
|
line.long 0x8 "PHY_RD_DQS_CFG2,phy_rd_dqs_cfg 2"
|
|
hexmask.long.word 0x8 11.--19. 1. " REG_PHY_RD_DQS_SLAVE_DELAY ,Value to replace delay/tap value for read DQS slave DLL"
|
|
bitfld.long 0x8 10. " REG_PHY_RD_DQS_SLAVE_FORCE ,Overwrite the delay/tap value for read DQS slave DLL" "Not forced,Forced"
|
|
textline " "
|
|
hexmask.long.word 0x8 0.--9. 1. " REG_PHY_RD_DQS_SLAVE_RATIO ,Ratio value for read DQS slave DLL"
|
|
line.long 0xC "PHY_RD_DQS_CFG3,phy_rd_dqs_cfg 3"
|
|
hexmask.long.word 0xC 11.--19. 1. " REG_PHY_RD_DQS_SLAVE_DELAY ,Value to replace delay/tap value for read DQS slave DLL"
|
|
bitfld.long 0xC 10. " REG_PHY_RD_DQS_SLAVE_FORCE ,Overwrite the delay/tap value for read DQS slave DLL" "Not forced,Forced"
|
|
textline " "
|
|
hexmask.long.word 0xC 0.--9. 1. " REG_PHY_RD_DQS_SLAVE_RATIO ,Ratio value for read DQS slave DLL"
|
|
group.long 0x154++0x0f
|
|
line.long 0x0 "PHY_WR_DQS_CFG0,phy_wr_dqs_cfg 0"
|
|
hexmask.long.word 0x0 11.--19. 1. " REG_PHY_WR_DQS_SLAVE_DELAY ,Value to replace delay/tap value for write DQS slave DLL"
|
|
bitfld.long 0x0 10. " REG_PHY_WR_DQS_SLAVE_FORCE ,Overwrite the delay/tap value for write DQS slave DLL" "Not forced,Forced"
|
|
textline " "
|
|
hexmask.long.word 0x0 0.--9. 1. " REG_PHY_WR_DQS_SLAVE_RATIO ,Ratio value for write DQS slave DLL"
|
|
line.long 0x4 "PHY_WR_DQS_CFG1,phy_wr_dqs_cfg 1"
|
|
hexmask.long.word 0x4 11.--19. 1. " REG_PHY_WR_DQS_SLAVE_DELAY ,Value to replace delay/tap value for write DQS slave DLL"
|
|
bitfld.long 0x4 10. " REG_PHY_WR_DQS_SLAVE_FORCE ,Overwrite the delay/tap value for write DQS slave DLL" "Not forced,Forced"
|
|
textline " "
|
|
hexmask.long.word 0x4 0.--9. 1. " REG_PHY_WR_DQS_SLAVE_RATIO ,Ratio value for write DQS slave DLL"
|
|
line.long 0x8 "PHY_WR_DQS_CFG2,phy_wr_dqs_cfg 2"
|
|
hexmask.long.word 0x8 11.--19. 1. " REG_PHY_WR_DQS_SLAVE_DELAY ,Value to replace delay/tap value for write DQS slave DLL"
|
|
bitfld.long 0x8 10. " REG_PHY_WR_DQS_SLAVE_FORCE ,Overwrite the delay/tap value for write DQS slave DLL" "Not forced,Forced"
|
|
textline " "
|
|
hexmask.long.word 0x8 0.--9. 1. " REG_PHY_WR_DQS_SLAVE_RATIO ,Ratio value for write DQS slave DLL"
|
|
line.long 0xC "PHY_WR_DQS_CFG3,phy_wr_dqs_cfg 3"
|
|
hexmask.long.word 0xC 11.--19. 1. " REG_PHY_WR_DQS_SLAVE_DELAY ,Value to replace delay/tap value for write DQS slave DLL"
|
|
bitfld.long 0xC 10. " REG_PHY_WR_DQS_SLAVE_FORCE ,Overwrite the delay/tap value for write DQS slave DLL" "Not forced,Forced"
|
|
textline " "
|
|
hexmask.long.word 0xC 0.--9. 1. " REG_PHY_WR_DQS_SLAVE_RATIO ,Ratio value for write DQS slave DLL"
|
|
group.long 0x168++0x0f
|
|
line.long 0x0 "PHY_WE_CFG0,phy_we_cfg 0"
|
|
hexmask.long.word 0x0 11.--19. 1. " REG_PHY_FIFO_WE_IN_DELAY ,Delay value"
|
|
bitfld.long 0x0 10. " REG_PHY_FIFO_WE_IN_FORCE ,Overwrite the delay/tap value for fifo_we_X slave DLL" "Not forced,Forced"
|
|
textline " "
|
|
hexmask.long.word 0x0 0.--9. 1. " REG_PHY_FIFO_WE_SLAVE_RATIO ,Ratio value for slave"
|
|
line.long 0x4 "PHY_WE_CFG1,phy_we_cfg 1"
|
|
hexmask.long.word 0x4 11.--19. 1. " REG_PHY_FIFO_WE_IN_DELAY ,Delay value"
|
|
bitfld.long 0x4 10. " REG_PHY_FIFO_WE_IN_FORCE ,Overwrite the delay/tap value for fifo_we_X slave DLL" "Not forced,Forced"
|
|
textline " "
|
|
hexmask.long.word 0x4 0.--9. 1. " REG_PHY_FIFO_WE_SLAVE_RATIO ,Ratio value for slave"
|
|
line.long 0x8 "PHY_WE_CFG2,phy_we_cfg 2"
|
|
hexmask.long.word 0x8 11.--19. 1. " REG_PHY_FIFO_WE_IN_DELAY ,Delay value"
|
|
bitfld.long 0x8 10. " REG_PHY_FIFO_WE_IN_FORCE ,Overwrite the delay/tap value for fifo_we_X slave DLL" "Not forced,Forced"
|
|
textline " "
|
|
hexmask.long.word 0x8 0.--9. 1. " REG_PHY_FIFO_WE_SLAVE_RATIO ,Ratio value for slave"
|
|
line.long 0xC "PHY_WE_CFG3,phy_we_cfg 3"
|
|
hexmask.long.word 0xC 11.--19. 1. " REG_PHY_FIFO_WE_IN_DELAY ,Delay value"
|
|
bitfld.long 0xC 10. " REG_PHY_FIFO_WE_IN_FORCE ,Overwrite the delay/tap value for fifo_we_X slave DLL" "Not forced,Forced"
|
|
textline " "
|
|
hexmask.long.word 0xC 0.--9. 1. " REG_PHY_FIFO_WE_SLAVE_RATIO ,Ratio value for slave"
|
|
group.long 0x17c++0x0f
|
|
line.long 0x0 "WR_DATA_SLV0,wr_data_slv 0"
|
|
hexmask.long.word 0x0 0.--9. 1. " REG_PHY_WR_DATA_SLAVE_RATIO ,Ratio value for write data slave DLL"
|
|
line.long 0x4 "WR_DATA_SLV1,wr_data_slv 1"
|
|
hexmask.long.word 0x4 0.--9. 1. " REG_PHY_WR_DATA_SLAVE_RATIO ,Ratio value for write data slave DLL"
|
|
line.long 0x8 "WR_DATA_SLV2,wr_data_slv 2"
|
|
hexmask.long.word 0x8 0.--9. 1. " REG_PHY_WR_DATA_SLAVE_RATIO ,Ratio value for write data slave DLL"
|
|
line.long 0xC "WR_DATA_SLV3,wr_data_slv 3"
|
|
hexmask.long.word 0xC 0.--9. 1. " REG_PHY_WR_DATA_SLAVE_RATIO ,Ratio value for write data slave DLL"
|
|
group.long 0x190++0x07
|
|
line.long 0x00 "REG_64,reg_64"
|
|
bitfld.long 0x00 30. " REG_PHY_CMD_LATENCY ,Command latency" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " REG_PHY_LPDDR ,DRAM device type" "Non-LPDDR,Mobile/LPDDR"
|
|
textline " "
|
|
bitfld.long 0x00 28. " REG_PHY_USE_RANK0_DELAYS ,Use Rank 0 delay" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 21.--27. 1. " REG_PHY_CTRL_SLAVE_DELAY ,Delay/tap value for address/command timing slave DLL"
|
|
textline " "
|
|
bitfld.long 0x00 20. " REG_PHY_CTRL_SLAVE_FORCE ,Force overwrite the delay/tap value for address/command timing slave DLL" "Not forced,Forced"
|
|
hexmask.long.word 0x00 10.--19. 1. " REG_PHY_CTRL_SLAVE_RATIO ,Ratio value for address/command launch timing"
|
|
textline " "
|
|
bitfld.long 0x00 9. " REG_PHY_GATELVL_INIT_MODE ,User programmable init ratio selection mode" "Write Leveling,Reg_phy_gatelvl_init_ratio"
|
|
bitfld.long 0x00 8. " REG_PHY_WRLVL_INIT_MODE ,User programmable init ratio selection mode" "Write Leveling,reg_phy_wrlvl_init_ratio"
|
|
textline " "
|
|
bitfld.long 0x00 7. " REG_PHY_INVERT_CLKOUT ,Inverts the polarity of DRAM clock" "Not inverted,Inverted"
|
|
bitfld.long 0x00 5.--6. " REG_PHY_BIST_MODE ,Pattern type generated by the BIST generator" "Constant,Low freq,PRBS,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4. " REG_PHY_BIST_FORCE_ERR ,BIST force error" "No force,Force"
|
|
bitfld.long 0x00 3. " REG_PHY_BIST_ENABLe ,Internal BIST generation and checker logic enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " REG_PHY_AT_SPD_ATPG ,Scan test clock speed" "Slow,Full"
|
|
bitfld.long 0x00 0. " REG_PHY_LOOPBACK ,Loopback testing" "Disabled,Enabled"
|
|
line.long 0x04 "REG_65,reg_65"
|
|
bitfld.long 0x04 17. " REG_PHY_DIS_CALIB_RST ,Disable the resetting of the Read Capture FIFO pointers" "No,Yes"
|
|
bitfld.long 0x04 16. " REG_PHY_USE_RD_DATA_EYE_LEVEL ,Read Data Eye training control" "Programmed,Calculated"
|
|
textline " "
|
|
bitfld.long 0x04 15. " REG_PHY_USE_RD_DQS_GATE_LEVEL ,Read DQS Gate training control" "Programmed,Calculated"
|
|
bitfld.long 0x04 14. " REG_PHY_USE_WR_LEVEL ,Write Leveling training control" "Programmed,Calculated"
|
|
textline " "
|
|
bitfld.long 0x04 10.--13. " REG_PHY_DLL_LOCK_DIFF ,The Maximum number of delay line taps variation allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 5.--9. " REG_PHY_RD_RL_DELAY ,Active rank's ratio logic delay for Read Data and Read DQS slave delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x04 0.--4. " REG_PHY_WR_RL_DELAY ,Active rank's ratio logic delay for Write Data and Write DQS slave delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
width 23.
|
|
rgroup.long 0x1a4++0x0f
|
|
line.long 0x0 "REG69_6C0,reg69_6c 0"
|
|
hexmask.long.word 0x0 20.--28. 1. " PHY_REG_STATUS_FIFO_WE_SLAVE_DLL_VALUE ,Delay value applied to FIFO WE slave DLL"
|
|
textline " "
|
|
hexmask.long.word 0x0 9.--19. 1. " PHY_REG_RDLVL_FIFOWEIN_RATIO ,Ratio value generated by Read Gate training FSM"
|
|
textline " "
|
|
bitfld.long 0x0 8. " PHY_REG_BIST_ERR[8] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PHY_REG_BIST_ERR[7] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0 6. " PHY_REG_BIST_ERR[6] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0 5. " PHY_REG_BIST_ERR[5] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0 4. " PHY_REG_BIST_ERR[4] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0 3. " PHY_REG_BIST_ERR[3] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0 2. " PHY_REG_BIST_ERR[2] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0 1. " PHY_REG_BIST_ERR[1] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0 0. " PHY_REG_BIST_ERR[0] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
line.long 0x4 "REG69_6C1,reg69_6c 1"
|
|
hexmask.long.word 0x4 20.--28. 1. " PHY_REG_STATUS_FIFO_WE_SLAVE_DLL_VALUE ,Delay value applied to FIFO WE slave DLL"
|
|
textline " "
|
|
hexmask.long.word 0x4 9.--19. 1. " PHY_REG_RDLVL_FIFOWEIN_RATIO ,Ratio value generated by Read Gate training FSM"
|
|
textline " "
|
|
bitfld.long 0x4 8. " PHY_REG_BIST_ERR[8] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x4 7. " PHY_REG_BIST_ERR[7] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x4 6. " PHY_REG_BIST_ERR[6] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x4 5. " PHY_REG_BIST_ERR[5] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x4 4. " PHY_REG_BIST_ERR[4] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x4 3. " PHY_REG_BIST_ERR[3] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x4 2. " PHY_REG_BIST_ERR[2] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x4 1. " PHY_REG_BIST_ERR[1] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x4 0. " PHY_REG_BIST_ERR[0] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
line.long 0x8 "REG69_6C2,reg69_6c 2"
|
|
hexmask.long.word 0x8 20.--28. 1. " PHY_REG_STATUS_FIFO_WE_SLAVE_DLL_VALUE ,Delay value applied to FIFO WE slave DLL"
|
|
textline " "
|
|
hexmask.long.word 0x8 9.--19. 1. " PHY_REG_RDLVL_FIFOWEIN_RATIO ,Ratio value generated by Read Gate training FSM"
|
|
textline " "
|
|
bitfld.long 0x8 8. " PHY_REG_BIST_ERR[8] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x8 7. " PHY_REG_BIST_ERR[7] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x8 6. " PHY_REG_BIST_ERR[6] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x8 5. " PHY_REG_BIST_ERR[5] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x8 4. " PHY_REG_BIST_ERR[4] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x8 3. " PHY_REG_BIST_ERR[3] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x8 2. " PHY_REG_BIST_ERR[2] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x8 1. " PHY_REG_BIST_ERR[1] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x8 0. " PHY_REG_BIST_ERR[0] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
line.long 0xC "REG69_6C3,reg69_6c 3"
|
|
hexmask.long.word 0xC 20.--28. 1. " PHY_REG_STATUS_FIFO_WE_SLAVE_DLL_VALUE ,Delay value applied to FIFO WE slave DLL"
|
|
textline " "
|
|
hexmask.long.word 0xC 9.--19. 1. " PHY_REG_RDLVL_FIFOWEIN_RATIO ,Ratio value generated by Read Gate training FSM"
|
|
textline " "
|
|
bitfld.long 0xC 8. " PHY_REG_BIST_ERR[8] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0xC 7. " PHY_REG_BIST_ERR[7] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0xC 6. " PHY_REG_BIST_ERR[6] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0xC 5. " PHY_REG_BIST_ERR[5] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0xC 4. " PHY_REG_BIST_ERR[4] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0xC 3. " PHY_REG_BIST_ERR[3] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0xC 2. " PHY_REG_BIST_ERR[2] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0xC 1. " PHY_REG_BIST_ERR[1] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0xC 0. " PHY_REG_BIST_ERR[0] ,Mismatch error flag from the BIST Checker" "No error,Error"
|
|
rgroup.long 0x1b8++0x0f
|
|
line.long 0x0 "REG6E_710,reg6e_71 0"
|
|
hexmask.long.word 0x0 20.--29. 1. " PHY_REG_RDLVL_DQS_RATIO ,Ratio value generated by Read Data Eye training FSM"
|
|
textline " "
|
|
hexmask.long.word 0x0 10.--19. 1. " PHY_REG_WRLVL_DQ_RATIO ,Ratio value generated by the write leveling FSM for Write Data"
|
|
textline " "
|
|
hexmask.long.word 0x0 0.--9. 1. " PHY_REG_WRLVL_DQS_RATIO ,Ratio value generated by the write leveling FSM for Write DQS"
|
|
line.long 0x4 "REG6E_711,reg6e_71 1"
|
|
hexmask.long.word 0x4 20.--29. 1. " PHY_REG_RDLVL_DQS_RATIO ,Ratio value generated by Read Data Eye training FSM"
|
|
textline " "
|
|
hexmask.long.word 0x4 10.--19. 1. " PHY_REG_WRLVL_DQ_RATIO ,Ratio value generated by the write leveling FSM for Write Data"
|
|
textline " "
|
|
hexmask.long.word 0x4 0.--9. 1. " PHY_REG_WRLVL_DQS_RATIO ,Ratio value generated by the write leveling FSM for Write DQS"
|
|
line.long 0x8 "REG6E_712,reg6e_71 2"
|
|
hexmask.long.word 0x8 20.--29. 1. " PHY_REG_RDLVL_DQS_RATIO ,Ratio value generated by Read Data Eye training FSM"
|
|
textline " "
|
|
hexmask.long.word 0x8 10.--19. 1. " PHY_REG_WRLVL_DQ_RATIO ,Ratio value generated by the write leveling FSM for Write Data"
|
|
textline " "
|
|
hexmask.long.word 0x8 0.--9. 1. " PHY_REG_WRLVL_DQS_RATIO ,Ratio value generated by the write leveling FSM for Write DQS"
|
|
line.long 0xC "REG6E_713,reg6e_71 3"
|
|
hexmask.long.word 0xC 20.--29. 1. " PHY_REG_RDLVL_DQS_RATIO ,Ratio value generated by Read Data Eye training FSM"
|
|
textline " "
|
|
hexmask.long.word 0xC 10.--19. 1. " PHY_REG_WRLVL_DQ_RATIO ,Ratio value generated by the write leveling FSM for Write Data"
|
|
textline " "
|
|
hexmask.long.word 0xC 0.--9. 1. " PHY_REG_WRLVL_DQS_RATIO ,Ratio value generated by the write leveling FSM for Write DQS"
|
|
rgroup.long 0x1cc++0x0f
|
|
line.long 0x0 "PHY_DLL_STS0,phy_dll_sts 0"
|
|
hexmask.long.word 0x0 18.--26. 1. " PHY_REG_STATUS_WR_DQS_SLAVE_DLL_VALUE ,Delay value applied to write DQS slave DLL for Silce 0"
|
|
textline " "
|
|
hexmask.long.word 0x0 9.--17. 1. " PHY_REG_STATUS_WR_DATA_SLAVE_DLL_VALUE ,Delay value applied to write data slave DLL for Silce 0"
|
|
textline " "
|
|
hexmask.long.word 0x0 0.--8. 1. " PHY_REG_STATUS_RD_DQS_SLAVE_DLL_VALUE ,Delay value applied to read data slave DLL for Silce 0"
|
|
line.long 0x4 "PHY_DLL_STS1,phy_dll_sts 1"
|
|
hexmask.long.word 0x4 18.--26. 1. " PHY_REG_STATUS_WR_DQS_SLAVE_DLL_VALUE ,Delay value applied to write DQS slave DLL for Silce 1"
|
|
textline " "
|
|
hexmask.long.word 0x4 9.--17. 1. " PHY_REG_STATUS_WR_DATA_SLAVE_DLL_VALUE ,Delay value applied to write data slave DLL for Silce 1"
|
|
textline " "
|
|
hexmask.long.word 0x4 0.--8. 1. " PHY_REG_STATUS_RD_DQS_SLAVE_DLL_VALUE ,Delay value applied to read data slave DLL for Silce 1"
|
|
line.long 0x8 "PHY_DLL_STS2,phy_dll_sts 2"
|
|
hexmask.long.word 0x8 18.--26. 1. " PHY_REG_STATUS_WR_DQS_SLAVE_DLL_VALUE ,Delay value applied to write DQS slave DLL for Silce 2"
|
|
textline " "
|
|
hexmask.long.word 0x8 9.--17. 1. " PHY_REG_STATUS_WR_DATA_SLAVE_DLL_VALUE ,Delay value applied to write data slave DLL for Silce 2"
|
|
textline " "
|
|
hexmask.long.word 0x8 0.--8. 1. " PHY_REG_STATUS_RD_DQS_SLAVE_DLL_VALUE ,Delay value applied to read data slave DLL for Silce 2"
|
|
line.long 0xC "PHY_DLL_STS3,phy_dll_sts 3"
|
|
hexmask.long.word 0xC 18.--26. 1. " PHY_REG_STATUS_WR_DQS_SLAVE_DLL_VALUE ,Delay value applied to write DQS slave DLL for Silce 3"
|
|
textline " "
|
|
hexmask.long.word 0xC 9.--17. 1. " PHY_REG_STATUS_WR_DATA_SLAVE_DLL_VALUE ,Delay value applied to write data slave DLL for Silce 3"
|
|
textline " "
|
|
hexmask.long.word 0xC 0.--8. 1. " PHY_REG_STATUS_RD_DQS_SLAVE_DLL_VALUE ,Delay value applied to read data slave DLL for Silce 3"
|
|
rgroup.long 0x1e0++0x0b
|
|
line.long 0x00 "DLL_LOCK_STS,dll_lock_sts"
|
|
bitfld.long 0x00 11. " PHY_REG_STATUS_OF_IN_LOCK_STATE[1] ,Coarse delay line lock status" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PHY_REG_STATUS_OF_IN_LOCK_STATE[0] ,Fine delay line lock status" "Not locked,Locked"
|
|
textline " "
|
|
hexmask.long.byte 0x00 3.--9. 1. " PHY_REG_STATUS_DLL_SLAVE_VALUE[8:2] ,Current Coarse value going to all the Slave DLLs"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " PHY_REG_STATUS_DLL_SLAVE_VALUE[1:0] ,Current Fine value going to all the Slave DLLs" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PHY_REG_STATUS_DLL_LOCK ,Master DLL status" "Not locked,Locked"
|
|
line.long 0x04 "PHY_CTRL_STS,phy_ctrl_sts"
|
|
bitfld.long 0x04 29. " PHY_REG_STATUS_PHY_CTRL_OF_IN_LOCK_STATE[1] ,Coarse delay line lock status" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x04 28. " PHY_REG_STATUS_PHY_CTRL_OF_IN_LOCK_STATE[0] ,Fine delay line lock status" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x04 22.--27. " PHY_REG_STATUS_PHY_CTRL_DLL_SLAVE_VALUE[8:2] ,Current Coarse delay value going to the PHY_CTRL Slave DLL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.long 0x04 20.--21. " PHY_REG_STATUS_PHY_CTRL_DLL_SLAVE_VALUE[1:0] ,Current Fine delay value going to the PHY_CTRL Slave DLL" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x04 19. " PHY_REG_STATUS_PHY_CTRL_DLL_LOCK ,PHY_CTRL Master DLL Status signal" "Not locked,Locked"
|
|
textline " "
|
|
hexmask.long.byte 0x04 12.--18. 1. " PHY_REG_STATUS_OF_OUT_DELAY_VALUE[6:0] ,Coarse value coming out of the Output Filter in Master DLL"
|
|
textline " "
|
|
bitfld.long 0x04 10.--11. " PHY_REG_STATUS_OF_OUT_DELAY_VALUE[1:0] ,Fine value coming out of the Output Filter in Master DLL" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x04 2.--9. 1. " PHY_REG_STATUS_OF_IN_DELAY_VALUE[6:0] ,Coarse value going into the Output Filter in Master DLL"
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " PHY_REG_STATUS_OF_IN_DELAY_VALUE[1:0] ,Fine values going into the Output Filter in Master DLL" "0,1,2,3"
|
|
line.long 0x08 "PHY_CTRL_STS_REG2,phy_ctrl_sts_reg2"
|
|
hexmask.long.word 0x08 18.--26. 1. " PHY_REG_STATUS_PHY_CTRL_SLAVE_DLL_VALUE ,Delay value applied to read DQS slave DLL"
|
|
textline " "
|
|
hexmask.long.byte 0x08 11.--17. 1. " PHY_REG_STATUS_PHY_CTRL_OF_OUT_DELAY_VALUE[6:0] ,Coarse value coming out of the Output Filter in PHY_CTRL Master DLL"
|
|
textline " "
|
|
bitfld.long 0x08 9.--10. " PHY_REG_STATUS_PHY_CTRL_OF_OUT_DELAY_VALUE[1:0] ,Fine value coming out of the Output Filter in PHY_CTRL Master DLL" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x08 2.--8. 1. " PHY_REG_STATUS_PHY_CTRL_OF_IN_DELAY_VALUE[6:0] ,Coarse value going into the Output Filter in PHY_CTRL Master DLL"
|
|
textline " "
|
|
bitfld.long 0x08 0.--1. " PHY_REG_STATUS_PHY_CTRL_OF_IN_DELAY_VALUE[1:0] ,Fine value going into the Output Filter in PHY_CTRL Master DLL" "0,1,2,3"
|
|
rgroup.long 0x200++0x03
|
|
line.long 0x00 "AXI_ID,ID and revision information"
|
|
bitfld.long 0x00 20.--25. " REG_ARB_REV_NUM ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
hexmask.long.byte 0x00 12.--19. 1. " REG_ARB_PROV_NUM ,Prov number"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " REG_ARB_PART_NUM ,Part Number"
|
|
width 23.
|
|
group.long 0x204++0x23
|
|
line.long 0x00 "PAGE_MASK,Page mask register"
|
|
line.long 0x4 "AXI_PRIORITY_WR_PORT0,AXI Priority control for write port 0"
|
|
bitfld.long 0x4 18. " REG_ARB_DIS_PAGE_MATCH_WR_PORT0 ,Disable the page match feature" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x4 17. " REG_ARB_DISABLE_URGENT_WR_PORT0 ,Disable urgent for this Write Port" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x4 16. " REG_ARB_DISABLE_AGING_WR_PORT0 ,Disable aging for this Write Port" "No,Yes"
|
|
textline " "
|
|
hexmask.long.word 0x4 0.--9. 1. " REG_ARB_PRI_WR_PORT0 ,Priority of Write Port "
|
|
line.long 0x8 "AXI_PRIORITY_WR_PORT1,AXI Priority control for write port 1"
|
|
bitfld.long 0x8 18. " REG_ARB_DIS_PAGE_MATCH_WR_PORT1 ,Disable the page match feature" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x8 17. " REG_ARB_DISABLE_URGENT_WR_PORT1 ,Disable urgent for this Write Port" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x8 16. " REG_ARB_DISABLE_AGING_WR_PORT1 ,Disable aging for this Write Port" "No,Yes"
|
|
textline " "
|
|
hexmask.long.word 0x8 0.--9. 1. " REG_ARB_PRI_WR_PORT1 ,Priority of Write Port "
|
|
line.long 0xC "AXI_PRIORITY_WR_PORT2,AXI Priority control for write port 2"
|
|
bitfld.long 0xC 18. " REG_ARB_DIS_PAGE_MATCH_WR_PORT2 ,Disable the page match feature" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0xC 17. " REG_ARB_DISABLE_URGENT_WR_PORT2 ,Disable urgent for this Write Port" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0xC 16. " REG_ARB_DISABLE_AGING_WR_PORT2 ,Disable aging for this Write Port" "No,Yes"
|
|
textline " "
|
|
hexmask.long.word 0xC 0.--9. 1. " REG_ARB_PRI_WR_PORT2 ,Priority of Write Port "
|
|
line.long 0x10 "AXI_PRIORITY_WR_PORT3,AXI Priority control for write port 3"
|
|
bitfld.long 0x10 18. " REG_ARB_DIS_PAGE_MATCH_WR_PORT3 ,Disable the page match feature" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x10 17. " REG_ARB_DISABLE_URGENT_WR_PORT3 ,Disable urgent for this Write Port" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x10 16. " REG_ARB_DISABLE_AGING_WR_PORT3 ,Disable aging for this Write Port" "No,Yes"
|
|
textline " "
|
|
hexmask.long.word 0x10 0.--9. 1. " REG_ARB_PRI_WR_PORT3 ,Priority of Write Port "
|
|
line.long 0x14 "AXI_PRIORITY_RD_PORT0,AXI Priority control for read port 0"
|
|
bitfld.long 0x14 19. " REG_ARB_SET_HPR_RD_PORT0 ,Enable reads to be generated as HPR for this Read Port" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 18. " REG_ARB_DIS_PAGE_MATCH_RD_PORT0 ,Disable the page match feature" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x14 17. " REG_ARB_DISABLE_URGENT_RD_PORT0 ,Disable urgent for this Read Port" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x14 16. " REG_ARB_DISABLE_AGING_RD_PORT0 ,Disable aging for this Read Port" "No,Yes"
|
|
textline " "
|
|
hexmask.long.word 0x14 0.--9. 1. " REG_ARB_PRI_RD_PORT0 ,Priority of Read Port "
|
|
line.long 0x18 "AXI_PRIORITY_RD_PORT1,AXI Priority control for read port 1"
|
|
bitfld.long 0x18 19. " REG_ARB_SET_HPR_RD_PORT1 ,Enable reads to be generated as HPR for this Read Port" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 18. " REG_ARB_DIS_PAGE_MATCH_RD_PORT1 ,Disable the page match feature" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x18 17. " REG_ARB_DISABLE_URGENT_RD_PORT1 ,Disable urgent for this Read Port" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x18 16. " REG_ARB_DISABLE_AGING_RD_PORT1 ,Disable aging for this Read Port" "No,Yes"
|
|
textline " "
|
|
hexmask.long.word 0x18 0.--9. 1. " REG_ARB_PRI_RD_PORT1 ,Priority of Read Port "
|
|
line.long 0x1C "AXI_PRIORITY_RD_PORT2,AXI Priority control for read port 2"
|
|
bitfld.long 0x1C 19. " REG_ARB_SET_HPR_RD_PORT2 ,Enable reads to be generated as HPR for this Read Port" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 18. " REG_ARB_DIS_PAGE_MATCH_RD_PORT2 ,Disable the page match feature" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x1C 17. " REG_ARB_DISABLE_URGENT_RD_PORT2 ,Disable urgent for this Read Port" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x1C 16. " REG_ARB_DISABLE_AGING_RD_PORT2 ,Disable aging for this Read Port" "No,Yes"
|
|
textline " "
|
|
hexmask.long.word 0x1C 0.--9. 1. " REG_ARB_PRI_RD_PORT2 ,Priority of Read Port "
|
|
line.long 0x20 "AXI_PRIORITY_RD_PORT3,AXI Priority control for read port 3"
|
|
bitfld.long 0x20 19. " REG_ARB_SET_HPR_RD_PORT3 ,Enable reads to be generated as HPR for this Read Port" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 18. " REG_ARB_DIS_PAGE_MATCH_RD_PORT3 ,Disable the page match feature" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x20 17. " REG_ARB_DISABLE_URGENT_RD_PORT3 ,Disable urgent for this Read Port" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x20 16. " REG_ARB_DISABLE_AGING_RD_PORT3 ,Disable aging for this Read Port" "No,Yes"
|
|
textline " "
|
|
hexmask.long.word 0x20 0.--9. 1. " REG_ARB_PRI_RD_PORT3 ,Priority of Read Port "
|
|
rgroup.long 0x260++0x2f
|
|
line.long 0x0 "PERF_MON0,Performance monitoring register 1 for port 0"
|
|
hexmask.long.word 0x0 20.--30. 1. " REG_MAX_READ_LATENCY_PORT0 ,Measured Maximum Read latency"
|
|
textline " "
|
|
hexmask.long.word 0x0 9.--19. 1. " REG_MIN_READ_LATENCY_PORT0 ,Measured Minimum Read latency"
|
|
line.long 0x4 "PERF_MON1,Performance monitoring register 1 for port 1"
|
|
hexmask.long.word 0x4 20.--30. 1. " REG_MAX_READ_LATENCY_PORT1 ,Measured Maximum Read latency"
|
|
textline " "
|
|
hexmask.long.word 0x4 9.--19. 1. " REG_MIN_READ_LATENCY_PORT1 ,Measured Minimum Read latency"
|
|
line.long 0x8 "PERF_MON2,Performance monitoring register 1 for port 2"
|
|
hexmask.long.word 0x8 20.--30. 1. " REG_MAX_READ_LATENCY_PORT2 ,Measured Maximum Read latency"
|
|
textline " "
|
|
hexmask.long.word 0x8 9.--19. 1. " REG_MIN_READ_LATENCY_PORT2 ,Measured Minimum Read latency"
|
|
line.long 0xC "PERF_MON3,Performance monitoring register 1 for port 3"
|
|
hexmask.long.word 0xC 20.--30. 1. " REG_MAX_READ_LATENCY_PORT3 ,Measured Maximum Read latency"
|
|
textline " "
|
|
hexmask.long.word 0xC 9.--19. 1. " REG_MIN_READ_LATENCY_PORT3 ,Measured Minimum Read latency"
|
|
line.long 0x10 "PERF_MON20,Performance monitoring register 2 for port 0"
|
|
hexmask.long.word 0x10 17.--31. 1. " REG_MEASURE_AXI_ID_PORT0 ,Performance measurements done on this programmable 15-bit AXI ID"
|
|
textline " "
|
|
hexmask.long.word 0x10 0.--15. 1. " REG_NUM_WORDS_WR_PORT0 ,Counter reflects the number of write transactions for the write AXI ID"
|
|
line.long 0x14 "PERF_MON21,Performance monitoring register 2 for port 1"
|
|
hexmask.long.word 0x14 17.--31. 1. " REG_MEASURE_AXI_ID_PORT1 ,Performance measurements done on this programmable 15-bit AXI ID"
|
|
textline " "
|
|
hexmask.long.word 0x14 0.--15. 1. " REG_NUM_WORDS_WR_PORT1 ,Counter reflects the number of write transactions for the write AXI ID"
|
|
line.long 0x18 "PERF_MON22,Performance monitoring register 2 for port 2"
|
|
hexmask.long.word 0x18 17.--31. 1. " REG_MEASURE_AXI_ID_PORT2 ,Performance measurements done on this programmable 15-bit AXI ID"
|
|
textline " "
|
|
hexmask.long.word 0x18 0.--15. 1. " REG_NUM_WORDS_WR_PORT2 ,Counter reflects the number of write transactions for the write AXI ID"
|
|
line.long 0x1C "PERF_MON23,Performance monitoring register 2 for port 3"
|
|
hexmask.long.word 0x1C 17.--31. 1. " REG_MEASURE_AXI_ID_PORT3 ,Performance measurements done on this programmable 15-bit AXI ID"
|
|
textline " "
|
|
hexmask.long.word 0x1C 0.--15. 1. " REG_NUM_WORDS_WR_PORT3 ,Counter reflects the number of write transactions for the write AXI ID"
|
|
line.long 0x20 "PERF_MON30,Performance monitoring register 3 for port 0"
|
|
hexmask.long.word 0x20 0.--15. 1. " REG_NUM_WORDS_RD_PORT0 ,Counter reflects the number of read transactions for the read AXI ID"
|
|
line.long 0x24 "PERF_MON31,Performance monitoring register 3 for port 1"
|
|
hexmask.long.word 0x24 0.--15. 1. " REG_NUM_WORDS_RD_PORT1 ,Counter reflects the number of read transactions for the read AXI ID"
|
|
line.long 0x28 "PERF_MON32,Performance monitoring register 3 for port 2"
|
|
hexmask.long.word 0x28 0.--15. 1. " REG_NUM_WORDS_RD_PORT2 ,Counter reflects the number of read transactions for the read AXI ID"
|
|
line.long 0x2C "PERF_MON33,Performance monitoring register 3 for port 3"
|
|
hexmask.long.word 0x2C 0.--15. 1. " REG_NUM_WORDS_RD_PORT3 ,Counter reflects the number of read transactions for the read AXI ID"
|
|
width 23.
|
|
group.long 0x290++0x03
|
|
line.long 0x00 "TRUSTED_MEM_CFG,Trusted Memory configuration"
|
|
hexmask.long.word 0x00 0.--15. 1. " REG_DECPROT ,Sets the memory regions to be secure or non-secure"
|
|
rgroup.long 0x2a4++0x03
|
|
line.long 0x00 "MODE_REG_READ,Mode register read data"
|
|
group.long 0x2a8++0x0f
|
|
line.long 0x00 "LPDDR_CTRL0,LPDDR2 Control 0 Register"
|
|
hexmask.long.byte 0x00 4.--11. 1. " REG_DDRC_MR4_MARGIN ,Derating factor applied to derate timing parameters"
|
|
bitfld.long 0x00 2. " REG_DDRC_DERATE_ENABLE ,Timing parameter derating enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " REG_DDRC_PER_BANK_REFRESH ,Per bank refresh" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REG_DDRC_LPDDR2 ,DRAM device type" "Non-LPDDR2,LPDDR2"
|
|
line.long 0x04 "LPDDR_CTRL1,LPDDR2 Control 1 Register"
|
|
line.long 0x08 "LPDDR_CTRL2,LPDDR2 Control 2 Register"
|
|
hexmask.long.word 0x08 12.--21. 1. " REG_DDRC_T_MRW ,Time to wait during load mode register writes"
|
|
hexmask.long.byte 0x08 4.--11. 1. " REG_DDRC_IDLE_AFTER_RESET_X32 ,Idle time after the reset command"
|
|
textline " "
|
|
bitfld.long 0x08 0.--3. " REG_DDRC_MIN_STABLE_CLOCK_X1 ,Time to wait after the first CKE high" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x0c "LPDDR_CTRL3,LPDDR2 Control 3 Register"
|
|
hexmask.long.word 0x0c 8.--17. 1. " REG_DDRC_DEV_ZQINIT_X32 ,ZQ initial calibration"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " REG_DDRC_MAX_AUTO_INIT_X1024 ,Maximum duration of the auto initialization"
|
|
rgroup.long 0x2b8++0x0b
|
|
line.long 0x00 "PHY_WR_LVL_FSM,,Write Leveling State information Register"
|
|
bitfld.long 0x00 12.--15. " PHY_REG_WR_LEVEL_FSM_SLICE3 ,Write Leveling State information from Slice 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " PHY_REG_WR_LEVEL_FSM_SLICE2 ,Write Leveling State information from Slice 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " PHY_REG_WR_LEVEL_FSM_SLICE1 ,Write Leveling State information from Slice 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " PHY_REG_WR_LEVEL_FSM_SLICE0 ,Write Leveling State information from Slice 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "PHY_RD_LVL_FSM,Read Leveling State information Register"
|
|
bitfld.long 0x04 12.--14. " PHY_REG_RD_LEVEL_FSM_SLICE3 ,Read Leveling State information from Slice 3" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 8.--10. " PHY_REG_RD_LEVEL_FSM_SLICE2 ,Read Leveling State information from Slice 2" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x04 4.--6. " PHY_REG_RD_LEVEL_FSM_SLICE1 ,Read Leveling State information from Slice 1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 0.--2. " PHY_REG_RD_LEVEL_FSM_SLICE0 ,Read Leveling State information from Slice 0" "0,1,2,3,4,5,6,7"
|
|
line.long 0x08 "PHY_GATE_LVL_FSM,Gate Leveling State information Register"
|
|
bitfld.long 0x08 12.--14. " PHY_REG_GATE_FSM_SLICE3 ,Gate Leveling State information from Slice 3" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 8.--10. " PHY_REG_GATE_FSM_SLICE2 ,Gate Leveling State information from Slice 2" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x08 4.--6. " PHY_REG_GATE_FSM_SLICE1 ,Gate Leveling State information from Slice 1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 0.--2. " PHY_REG_GATE_FSM_SLICE0 ,Gate Leveling State information from Slice 0" "0,1,2,3,4,5,6,7"
|
|
width 12.
|
|
tree.end
|
|
tree.open "Cross Trigger Interface"
|
|
tree "DEBUG_CPU_CTI0"
|
|
base ad:0xF8898000
|
|
width 18.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTICONTROL,CTI Control Register"
|
|
bitfld.long 0x00 0. " GLBEN ,Enables or disables the ECT" "Disabled,Enabled"
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "CTIINTACK,CTI Interrupt Acknowledge Register"
|
|
bitfld.long 0x00 7. " INTACK[7] ,CTITRIGOUT[7] output Acknowledge" "No effect,Acknowledged"
|
|
bitfld.long 0x00 6. " INTACK[6] ,CTITRIGOUT[6] output Acknowledge" "No effect,Acknowledged"
|
|
bitfld.long 0x00 5. " INTACK[5] ,CTITRIGOUT[5] output Acknowledge" "No effect,Acknowledged"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INTACK[4] ,CTITRIGOUT[4] output Acknowledge" "No effect,Acknowledged"
|
|
bitfld.long 0x00 3. " INTACK[3] ,CTITRIGOUT[3] output Acknowledge" "No effect,Acknowledged"
|
|
bitfld.long 0x00 2. " INTACK[2] ,CTITRIGOUT[2] output Acknowledge" "No effect,Acknowledged"
|
|
textline " "
|
|
bitfld.long 0x00 1. " INTACK[1] ,CTITRIGOUT[1] output Acknowledge" "No effect,Acknowledged"
|
|
bitfld.long 0x00 0. " INTACK[0] ,CTITRIGOUT[0] output Acknowledge" "No effect,Acknowledged"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CTIAPPSET,CTI Application Trigger Set Register"
|
|
bitfld.long 0x00 3. " APPSET[3] ,Channel 3 trigger state" "Inactive,Active"
|
|
bitfld.long 0x00 2. " APPSET[2] ,Channel 2 trigger state" "Inactive,Active"
|
|
bitfld.long 0x00 1. " APPSET[1] ,Channel 1 trigger state" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 0. " APPSET[0] ,Channel 0 trigger state" "Inactive,Active"
|
|
wgroup.long 0x18++0x07
|
|
line.long 0x00 "CTIAPPCLEAR,CTI Application Trigger Clear Register"
|
|
bitfld.long 0x00 3. " APPCLEAR[3] ,Channel 3 trigger state" "No effect,Clear"
|
|
bitfld.long 0x00 2. " APPCLEAR[2] ,Channel 2 trigger state" "No effect,Clear"
|
|
bitfld.long 0x00 1. " APPCLEAR[1] ,Channel 1 trigger state" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " APPCLEAR[0] ,Channel 0 trigger state" "No effect,Clear"
|
|
line.long 0x04 "CTIAPPPULSE,CTI Application Pulse Register"
|
|
bitfld.long 0x04 3. " APPULSE[3] ,Channel 3 Pulse Event" "No effect,Generate"
|
|
bitfld.long 0x04 2. " APPULSE[2] ,Channel 2 Pulse Event" "No effect,Generate"
|
|
bitfld.long 0x04 1. " APPULSE[1] ,Channel 1 Pulse Event" "No effect,Generate"
|
|
textline " "
|
|
bitfld.long 0x04 0. " APPULSE[0] ,Channel 0 Pulse Event" "No effect,Generate"
|
|
group.long 0x20++0x1f
|
|
line.long 0x0 "CTIINEN0,CTI Trigger to Channel Enable 0 Register"
|
|
bitfld.long 0x0 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x4 "CTIINEN1,CTI Trigger to Channel Enable 1 Register"
|
|
bitfld.long 0x4 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x4 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x4 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x8 "CTIINEN2,CTI Trigger to Channel Enable 2 Register"
|
|
bitfld.long 0x8 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x8 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x8 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0xC "CTIINEN3,CTI Trigger to Channel Enable 3 Register"
|
|
bitfld.long 0xC 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0xC 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0xC 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x10 "CTIINEN4,CTI Trigger to Channel Enable 4 Register"
|
|
bitfld.long 0x10 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x14 "CTIINEN5,CTI Trigger to Channel Enable 5 Register"
|
|
bitfld.long 0x14 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x14 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x18 "CTIINEN6,CTI Trigger to Channel Enable 6 Register"
|
|
bitfld.long 0x18 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x18 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x18 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x1C "CTIINEN7,CTI Trigger to Channel Enable 7 Register"
|
|
bitfld.long 0x1C 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x1C 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x1C 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
group.long 0xa0++0x1f
|
|
line.long 0x0 "CTIOUTEN0,CTI Channel to Trigger Enable 0 Register"
|
|
bitfld.long 0x0 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x4 "CTIOUTEN1,CTI Channel to Trigger Enable 1 Register"
|
|
bitfld.long 0x4 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x4 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x4 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x8 "CTIOUTEN2,CTI Channel to Trigger Enable 2 Register"
|
|
bitfld.long 0x8 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x8 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x8 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0xC "CTIOUTEN3,CTI Channel to Trigger Enable 3 Register"
|
|
bitfld.long 0xC 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0xC 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0xC 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x10 "CTIOUTEN4,CTI Channel to Trigger Enable 4 Register"
|
|
bitfld.long 0x10 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x14 "CTIOUTEN5,CTI Channel to Trigger Enable 5 Register"
|
|
bitfld.long 0x14 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x14 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x18 "CTIOUTEN6,CTI Channel to Trigger Enable 6 Register"
|
|
bitfld.long 0x18 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x18 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x18 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x1C "CTIOUTEN7,CTI Channel to Trigger Enable 7 Register"
|
|
bitfld.long 0x1C 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x1C 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x1C 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
rgroup.long 0x130++0x0f
|
|
line.long 0x00 "CTITRIGINSTATUS,CTI Trigger In Status Register"
|
|
bitfld.long 0x00 7. " TRIGINSTATUS[7] ,Status of the CTITRIGIN input 7" "Not active,Active"
|
|
bitfld.long 0x00 6. " TRIGINSTATUS[6] ,Status of the CTITRIGIN input 6" "Not active,Active"
|
|
bitfld.long 0x00 5. " TRIGINSTATUS[5] ,Status of the CTITRIGIN input 5" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TRIGINSTATUS[4] ,Status of the CTITRIGIN input 4" "Not active,Active"
|
|
bitfld.long 0x00 3. " TRIGINSTATUS[3] ,Status of the CTITRIGIN input 3" "Not active,Active"
|
|
bitfld.long 0x00 2. " TRIGINSTATUS[2] ,Status of the CTITRIGIN input 2" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TRIGINSTATUS[1] ,Status of the CTITRIGIN input 1" "Not active,Active"
|
|
bitfld.long 0x00 0. " TRIGINSTATUS[0] ,Status of the CTITRIGIN input 0" "Not active,Active"
|
|
line.long 0x04 "CTITRIGOUTSTATUS,CTI Trigger Out Status Register"
|
|
bitfld.long 0x04 7. " TRIGOUTSTATUS[7] ,Status of the CTITRIGOUT output 7" "Not active,Active"
|
|
bitfld.long 0x04 6. " TRIGOUTSTATUS[6] ,Status of the CTITRIGOUT output 6" "Not active,Active"
|
|
bitfld.long 0x04 5. " TRIGOUTSTATUS[5] ,Status of the CTITRIGOUT output 5" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 4. " TRIGOUTSTATUS[4] ,Status of the CTITRIGOUT output 4" "Not active,Active"
|
|
bitfld.long 0x04 3. " TRIGOUTSTATUS[3] ,Status of the CTITRIGOUT output 3" "Not active,Active"
|
|
bitfld.long 0x04 2. " TRIGOUTSTATUS[2] ,Status of the CTITRIGOUT output 2" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " TRIGOUTSTATUS[1] ,Status of the CTITRIGOUT output 1" "Not active,Active"
|
|
bitfld.long 0x04 0. " TRIGOUTSTATUS[0] ,Status of the CTITRIGOUT output 0" "Not active,Active"
|
|
line.long 0x08 "CTICHINSTATUS,CTI Channel In Status Register"
|
|
bitfld.long 0x08 3. " CTCHINSTATUS[3] ,Status of the CTICHIN input 3" "Not active,Active"
|
|
bitfld.long 0x08 2. " CTCHINSTATUS[2] ,Status of the CTICHIN input 2" "Not active,Active"
|
|
bitfld.long 0x08 1. " CTCHINSTATUS[1] ,Status of the CTICHIN input 1" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 0. " CTCHINSTATUS[0] ,Status of the CTICHIN input 0" "Not active,Active"
|
|
line.long 0x0c "CTICHOUTSTATUS,CTI Channel Out Status Register"
|
|
bitfld.long 0x0c 3. " CTCHOUTSTATUS[3] ,Status of the CTICHOUT output 3" "Not active,Active"
|
|
bitfld.long 0x0c 2. " CTCHOUTSTATUS[2] ,Status of the CTICHOUT output 2" "Not active,Active"
|
|
bitfld.long 0x0c 1. " CTCHOUTSTATUS[1] ,Status of the CTICHOUT output 1" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 0. " CTCHOUTSTATUS[0] ,Status of the CTICHOUT output 0" "Not active,Active"
|
|
group.long 0x140++0x07
|
|
line.long 0x00 "CTIGATE,Enable CTI Channel Gate Register"
|
|
bitfld.long 0x00 3. " CTIGATEEN3 ,Enable CTICHOUT3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CTIGATEEN2 ,Enable CTICHOUT2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " CTIGATEEN1 ,Enable CTICHOUT1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTIGATEEN0 ,Enable CTICHOUT0" "Disabled,Enabled"
|
|
line.long 0x04 "ASICCTL,External Multiplexor Control Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ASICCTL ,Output of ASICCTL[7:0]"
|
|
wgroup.long 0xedc++0x0f
|
|
line.long 0x00 "ITCHINACK,ITCHINACK Register"
|
|
bitfld.long 0x00 3. " CTCHINACK[3] ,Set CTCHINACK output 3" "No effect,Set"
|
|
bitfld.long 0x00 2. " CTCHINACK[2] ,Set CTCHINACK output 2" "No effect,Set"
|
|
bitfld.long 0x00 1. " CTCHINACK[1] ,Set CTCHINACK output 1" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTCHINACK[0] ,Set CTCHINACK output 0" "No effect,Set"
|
|
line.long 0x04 "ITTRIGINACK,ITTRIGINACK Register"
|
|
bitfld.long 0x04 7. " CTTRIGINACK[7] ,Set CTTRIGINACK output 7" "No effect,Set"
|
|
bitfld.long 0x04 6. " CTTRIGINACK[6] ,Set CTTRIGINACK output 6" "No effect,Set"
|
|
bitfld.long 0x04 5. " CTTRIGINACK[5] ,Set CTTRIGINACK output 5" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x04 4. " CTTRIGINACK[4] ,Set CTTRIGINACK output 4" "No effect,Set"
|
|
bitfld.long 0x04 3. " CTTRIGINACK[3] ,Set CTTRIGINACK output 3" "No effect,Set"
|
|
bitfld.long 0x04 2. " CTTRIGINACK[2] ,Set CTTRIGINACK output 2" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CTTRIGINACK[1] ,Set CTTRIGINACK output 1" "No effect,Set"
|
|
bitfld.long 0x04 0. " CTTRIGINACK[0] ,Set CTTRIGINACK output 0" "No effect,Set"
|
|
line.long 0x08 "ITCHOUT,ITCHOUT Register"
|
|
bitfld.long 0x08 3. " CTCHOUT[3] ,Set CTCHOUT output 3" "No effect,Set"
|
|
bitfld.long 0x08 2. " CTCHOUT[2] ,Set CTCHOUT output 2" "No effect,Set"
|
|
bitfld.long 0x08 1. " CTCHOUT[1] ,Set CTCHOUT output 1" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x08 0. " CTCHOUT[0] ,Set CTCHOUT output 0" "No effect,Set"
|
|
line.long 0x0c "ITTRIGOUT,ITTRIGOUT Register"
|
|
bitfld.long 0x0c 7. " CTTRIGOUT[7] ,Set CTTRIGOUT output 7" "No effect,Set"
|
|
bitfld.long 0x0c 6. " CTTRIGOUT[6] ,Set CTTRIGOUT output 6" "No effect,Set"
|
|
bitfld.long 0x0c 5. " CTTRIGOUT[5] ,Set CTTRIGOUT output 5" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " CTTRIGOUT[4] ,Set CTTRIGOUT output 4" "No effect,Set"
|
|
bitfld.long 0x0c 3. " CTTRIGOUT[3] ,Set CTTRIGOUT output 3" "No effect,Set"
|
|
bitfld.long 0x0c 2. " CTTRIGOUT[2] ,Set CTTRIGOUT output 2" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " CTTRIGOUT[1] ,Set CTTRIGOUT output 1" "No effect,Set"
|
|
bitfld.long 0x0c 0. " CTTRIGOUT[0] ,Set CTTRIGOUT output 0" "No effect,Set"
|
|
rgroup.long 0xeec++0x0f
|
|
line.long 0x00 "ITCHOUTACK,ITCHOUTACK Register"
|
|
bitfld.long 0x00 3. " CTCHOUTACK[3] ,Value of CTCHOUTACK input 3" "Low,High"
|
|
bitfld.long 0x00 2. " CTCHOUTACK[2] ,Value of CTCHOUTACK input 2" "Low,High"
|
|
bitfld.long 0x00 1. " CTCHOUTACK[1] ,Value of CTCHOUTACK input 1" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTCHINACK[0] ,Value of CTCHINACK input 0" "Low,High"
|
|
line.long 0x04 "ITTRIGOUTACK,ITTRIGOUTACK Register"
|
|
bitfld.long 0x04 7. " CTTRIGOUTACK[7] ,Value of CTTRIGOUTACK input 7" "Low,High"
|
|
bitfld.long 0x04 6. " CTTRIGOUTACK[6] ,Value of CTTRIGOUTACK input 6" "Low,High"
|
|
bitfld.long 0x04 5. " CTTRIGOUTACK[5] ,Value of CTTRIGOUTACK input 5" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 4. " CTTRIGOUTACK[4] ,Value of CTTRIGOUTACK input 4" "Low,High"
|
|
bitfld.long 0x04 3. " CTTRIGOUTACK[3] ,Value of CTTRIGOUTACK input 3" "Low,High"
|
|
bitfld.long 0x04 2. " CTTRIGOUTACK[2] ,Value of CTTRIGOUTACK input 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CTTRIGOUTACK[1] ,Value of CTTRIGOUTACK input 1" "Low,High"
|
|
bitfld.long 0x04 0. " CTTRIGOUTACK[0] ,Value of CTTRIGOUTACK input 0" "Low,High"
|
|
line.long 0x08 "ITCHIN,ITCHIN Register"
|
|
bitfld.long 0x08 3. " CTCHIN[3] ,Value of CTCHIN input 3" "Low,High"
|
|
bitfld.long 0x08 2. " CTCHIN[2] ,Value of CTCHIN input 2" "Low,High"
|
|
bitfld.long 0x08 1. " CTCHIN[1] ,Value of CTCHIN input 1" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 0. " CTCHIN[0] ,Value of CTCHIN input 0" "Low,High"
|
|
line.long 0x0c "ITTRIGIN,ITTRIGIN Register"
|
|
bitfld.long 0x0c 7. " CTTRIGIN[7] ,Value of CTTRIGIN input 7" "Low,High"
|
|
bitfld.long 0x0c 6. " CTTRIGIN[6] ,Value of CTTRIGIN input 6" "Low,High"
|
|
bitfld.long 0x0c 5. " CTTRIGIN[5] ,Value of CTTRIGIN input 5" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " CTTRIGIN[4] ,Value of CTTRIGIN input" "Low,High"
|
|
bitfld.long 0x0c 3. " CTTRIGIN[3] ,Value of CTTRIGIN input" "Low,High"
|
|
bitfld.long 0x0c 2. " CTTRIGIN[2] ,Value of CTTRIGIN input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " CTTRIGIN[1] ,Value of CTTRIGIN input 1" "Low,High"
|
|
bitfld.long 0x0c 0. " CTTRIGIN[0] ,Value of CTTRIGIN input 0" "Low,High"
|
|
width 18.
|
|
group.long 0xf00++0x03
|
|
line.long 0x00 "ITCTRL,IT Control Register"
|
|
bitfld.long 0x00 0. " ITEN ,Enable IT Registers" "Disabled,Enabled"
|
|
group.long 0xfa0++0x07
|
|
line.long 0x00 "CTSR,Claim Tag Set Register"
|
|
bitfld.long 0x00 0.--3. " CTS ,Claim Tag Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "CTCR,Claim Tag Clear Register"
|
|
bitfld.long 0x04 0.--3. " CTC ,Claim Tag Clear" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0xfb0++0x03
|
|
line.long 0x00 "LOCK_ACCESS,Lock Access Register"
|
|
rgroup.long 0xfb4++0x07
|
|
line.long 0x00 "LSR,Lock Status Register"
|
|
bitfld.long 0x00 0.--2. " LS ,Lock Status" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "ASR,Authentication Status Register"
|
|
bitfld.long 0x04 3. " NIDEN ,Current value of noninvasive debug enable signals" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " NIDEN_CTL ,Non-invasive debug controlled" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " IDEN ,Current value of invasive debug enable signals" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " IDEN_CTL ,Invasive debug controlled" "Disabled,Enabled"
|
|
rgroup.long 0xfc8++0x37
|
|
line.long 0x00 "DEVID,Device ID"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " DEVID ,Device ID"
|
|
line.long 0x04 "DTIR,Device Type Identifier Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DTI ,Device Type Identifier"
|
|
line.long 0x08 "PERIPHID4,Peripheral ID4"
|
|
hexmask.long.byte 0x08 0.--7. 1. " PERIPHID4 ,Peripheral ID4"
|
|
line.long 0x0c "PERIPHID5,Peripheral ID5"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " PERIPHID5 ,Peripheral ID5"
|
|
line.long 0x10 "PERIPHID6,Peripheral ID6"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PERIPHID6 ,Peripheral ID6"
|
|
line.long 0x14 "PERIPHID7,Peripheral ID7"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PERIPHID7 ,Peripheral ID7"
|
|
line.long 0x18 "PERIPHID0,Peripheral ID0"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PERIPHID0 ,Peripheral ID0"
|
|
line.long 0x1c "PERIPHID1,Peripheral ID1"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " PERIPHID1 ,Peripheral ID1"
|
|
line.long 0x20 "PERIPHID2,Peripheral ID2"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PERIPHID2 ,Peripheral ID2"
|
|
line.long 0x24 "PERIPHID3,Peripheral ID3"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PERIPHID3 ,Peripheral ID3"
|
|
line.long 0x28 "COMPID0,Component ID0"
|
|
hexmask.long.byte 0x28 0.--7. 1. " COMPID0 ,Component ID0"
|
|
line.long 0x2c "COMPID1,Component ID1"
|
|
hexmask.long.byte 0x2c 0.--7. 1. " COMPID1 ,Component ID1"
|
|
line.long 0x30 "COMPID2,Component ID2"
|
|
hexmask.long.byte 0x30 0.--7. 1. " COMPID2 ,Component ID2"
|
|
line.long 0x34 "COMPID3,Component ID3"
|
|
hexmask.long.byte 0x34 0.--7. 1. " COMPID3 ,Component ID3"
|
|
width 12.
|
|
tree.end
|
|
tree "DEBUG_CPU_CTI1"
|
|
base ad:0xF8899000
|
|
width 18.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTICONTROL,CTI Control Register"
|
|
bitfld.long 0x00 0. " GLBEN ,Enables or disables the ECT" "Disabled,Enabled"
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "CTIINTACK,CTI Interrupt Acknowledge Register"
|
|
bitfld.long 0x00 7. " INTACK[7] ,CTITRIGOUT[7] output Acknowledge" "No effect,Acknowledged"
|
|
bitfld.long 0x00 6. " INTACK[6] ,CTITRIGOUT[6] output Acknowledge" "No effect,Acknowledged"
|
|
bitfld.long 0x00 5. " INTACK[5] ,CTITRIGOUT[5] output Acknowledge" "No effect,Acknowledged"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INTACK[4] ,CTITRIGOUT[4] output Acknowledge" "No effect,Acknowledged"
|
|
bitfld.long 0x00 3. " INTACK[3] ,CTITRIGOUT[3] output Acknowledge" "No effect,Acknowledged"
|
|
bitfld.long 0x00 2. " INTACK[2] ,CTITRIGOUT[2] output Acknowledge" "No effect,Acknowledged"
|
|
textline " "
|
|
bitfld.long 0x00 1. " INTACK[1] ,CTITRIGOUT[1] output Acknowledge" "No effect,Acknowledged"
|
|
bitfld.long 0x00 0. " INTACK[0] ,CTITRIGOUT[0] output Acknowledge" "No effect,Acknowledged"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CTIAPPSET,CTI Application Trigger Set Register"
|
|
bitfld.long 0x00 3. " APPSET[3] ,Channel 3 trigger state" "Inactive,Active"
|
|
bitfld.long 0x00 2. " APPSET[2] ,Channel 2 trigger state" "Inactive,Active"
|
|
bitfld.long 0x00 1. " APPSET[1] ,Channel 1 trigger state" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 0. " APPSET[0] ,Channel 0 trigger state" "Inactive,Active"
|
|
wgroup.long 0x18++0x07
|
|
line.long 0x00 "CTIAPPCLEAR,CTI Application Trigger Clear Register"
|
|
bitfld.long 0x00 3. " APPCLEAR[3] ,Channel 3 trigger state" "No effect,Clear"
|
|
bitfld.long 0x00 2. " APPCLEAR[2] ,Channel 2 trigger state" "No effect,Clear"
|
|
bitfld.long 0x00 1. " APPCLEAR[1] ,Channel 1 trigger state" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " APPCLEAR[0] ,Channel 0 trigger state" "No effect,Clear"
|
|
line.long 0x04 "CTIAPPPULSE,CTI Application Pulse Register"
|
|
bitfld.long 0x04 3. " APPULSE[3] ,Channel 3 Pulse Event" "No effect,Generate"
|
|
bitfld.long 0x04 2. " APPULSE[2] ,Channel 2 Pulse Event" "No effect,Generate"
|
|
bitfld.long 0x04 1. " APPULSE[1] ,Channel 1 Pulse Event" "No effect,Generate"
|
|
textline " "
|
|
bitfld.long 0x04 0. " APPULSE[0] ,Channel 0 Pulse Event" "No effect,Generate"
|
|
group.long 0x20++0x1f
|
|
line.long 0x0 "CTIINEN0,CTI Trigger to Channel Enable 0 Register"
|
|
bitfld.long 0x0 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x4 "CTIINEN1,CTI Trigger to Channel Enable 1 Register"
|
|
bitfld.long 0x4 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x4 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x4 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x8 "CTIINEN2,CTI Trigger to Channel Enable 2 Register"
|
|
bitfld.long 0x8 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x8 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x8 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0xC "CTIINEN3,CTI Trigger to Channel Enable 3 Register"
|
|
bitfld.long 0xC 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0xC 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0xC 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x10 "CTIINEN4,CTI Trigger to Channel Enable 4 Register"
|
|
bitfld.long 0x10 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x14 "CTIINEN5,CTI Trigger to Channel Enable 5 Register"
|
|
bitfld.long 0x14 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x14 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x18 "CTIINEN6,CTI Trigger to Channel Enable 6 Register"
|
|
bitfld.long 0x18 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x18 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x18 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x1C "CTIINEN7,CTI Trigger to Channel Enable 7 Register"
|
|
bitfld.long 0x1C 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x1C 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x1C 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
group.long 0xa0++0x1f
|
|
line.long 0x0 "CTIOUTEN0,CTI Channel to Trigger Enable 0 Register"
|
|
bitfld.long 0x0 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x4 "CTIOUTEN1,CTI Channel to Trigger Enable 1 Register"
|
|
bitfld.long 0x4 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x4 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x4 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x8 "CTIOUTEN2,CTI Channel to Trigger Enable 2 Register"
|
|
bitfld.long 0x8 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x8 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x8 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0xC "CTIOUTEN3,CTI Channel to Trigger Enable 3 Register"
|
|
bitfld.long 0xC 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0xC 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0xC 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x10 "CTIOUTEN4,CTI Channel to Trigger Enable 4 Register"
|
|
bitfld.long 0x10 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x14 "CTIOUTEN5,CTI Channel to Trigger Enable 5 Register"
|
|
bitfld.long 0x14 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x14 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x18 "CTIOUTEN6,CTI Channel to Trigger Enable 6 Register"
|
|
bitfld.long 0x18 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x18 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x18 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x1C "CTIOUTEN7,CTI Channel to Trigger Enable 7 Register"
|
|
bitfld.long 0x1C 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x1C 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x1C 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
rgroup.long 0x130++0x0f
|
|
line.long 0x00 "CTITRIGINSTATUS,CTI Trigger In Status Register"
|
|
bitfld.long 0x00 7. " TRIGINSTATUS[7] ,Status of the CTITRIGIN input 7" "Not active,Active"
|
|
bitfld.long 0x00 6. " TRIGINSTATUS[6] ,Status of the CTITRIGIN input 6" "Not active,Active"
|
|
bitfld.long 0x00 5. " TRIGINSTATUS[5] ,Status of the CTITRIGIN input 5" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TRIGINSTATUS[4] ,Status of the CTITRIGIN input 4" "Not active,Active"
|
|
bitfld.long 0x00 3. " TRIGINSTATUS[3] ,Status of the CTITRIGIN input 3" "Not active,Active"
|
|
bitfld.long 0x00 2. " TRIGINSTATUS[2] ,Status of the CTITRIGIN input 2" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TRIGINSTATUS[1] ,Status of the CTITRIGIN input 1" "Not active,Active"
|
|
bitfld.long 0x00 0. " TRIGINSTATUS[0] ,Status of the CTITRIGIN input 0" "Not active,Active"
|
|
line.long 0x04 "CTITRIGOUTSTATUS,CTI Trigger Out Status Register"
|
|
bitfld.long 0x04 7. " TRIGOUTSTATUS[7] ,Status of the CTITRIGOUT output 7" "Not active,Active"
|
|
bitfld.long 0x04 6. " TRIGOUTSTATUS[6] ,Status of the CTITRIGOUT output 6" "Not active,Active"
|
|
bitfld.long 0x04 5. " TRIGOUTSTATUS[5] ,Status of the CTITRIGOUT output 5" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 4. " TRIGOUTSTATUS[4] ,Status of the CTITRIGOUT output 4" "Not active,Active"
|
|
bitfld.long 0x04 3. " TRIGOUTSTATUS[3] ,Status of the CTITRIGOUT output 3" "Not active,Active"
|
|
bitfld.long 0x04 2. " TRIGOUTSTATUS[2] ,Status of the CTITRIGOUT output 2" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " TRIGOUTSTATUS[1] ,Status of the CTITRIGOUT output 1" "Not active,Active"
|
|
bitfld.long 0x04 0. " TRIGOUTSTATUS[0] ,Status of the CTITRIGOUT output 0" "Not active,Active"
|
|
line.long 0x08 "CTICHINSTATUS,CTI Channel In Status Register"
|
|
bitfld.long 0x08 3. " CTCHINSTATUS[3] ,Status of the CTICHIN input 3" "Not active,Active"
|
|
bitfld.long 0x08 2. " CTCHINSTATUS[2] ,Status of the CTICHIN input 2" "Not active,Active"
|
|
bitfld.long 0x08 1. " CTCHINSTATUS[1] ,Status of the CTICHIN input 1" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 0. " CTCHINSTATUS[0] ,Status of the CTICHIN input 0" "Not active,Active"
|
|
line.long 0x0c "CTICHOUTSTATUS,CTI Channel Out Status Register"
|
|
bitfld.long 0x0c 3. " CTCHOUTSTATUS[3] ,Status of the CTICHOUT output 3" "Not active,Active"
|
|
bitfld.long 0x0c 2. " CTCHOUTSTATUS[2] ,Status of the CTICHOUT output 2" "Not active,Active"
|
|
bitfld.long 0x0c 1. " CTCHOUTSTATUS[1] ,Status of the CTICHOUT output 1" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 0. " CTCHOUTSTATUS[0] ,Status of the CTICHOUT output 0" "Not active,Active"
|
|
group.long 0x140++0x07
|
|
line.long 0x00 "CTIGATE,Enable CTI Channel Gate Register"
|
|
bitfld.long 0x00 3. " CTIGATEEN3 ,Enable CTICHOUT3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CTIGATEEN2 ,Enable CTICHOUT2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " CTIGATEEN1 ,Enable CTICHOUT1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTIGATEEN0 ,Enable CTICHOUT0" "Disabled,Enabled"
|
|
line.long 0x04 "ASICCTL,External Multiplexor Control Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ASICCTL ,Output of ASICCTL[7:0]"
|
|
wgroup.long 0xedc++0x0f
|
|
line.long 0x00 "ITCHINACK,ITCHINACK Register"
|
|
bitfld.long 0x00 3. " CTCHINACK[3] ,Set CTCHINACK output 3" "No effect,Set"
|
|
bitfld.long 0x00 2. " CTCHINACK[2] ,Set CTCHINACK output 2" "No effect,Set"
|
|
bitfld.long 0x00 1. " CTCHINACK[1] ,Set CTCHINACK output 1" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTCHINACK[0] ,Set CTCHINACK output 0" "No effect,Set"
|
|
line.long 0x04 "ITTRIGINACK,ITTRIGINACK Register"
|
|
bitfld.long 0x04 7. " CTTRIGINACK[7] ,Set CTTRIGINACK output 7" "No effect,Set"
|
|
bitfld.long 0x04 6. " CTTRIGINACK[6] ,Set CTTRIGINACK output 6" "No effect,Set"
|
|
bitfld.long 0x04 5. " CTTRIGINACK[5] ,Set CTTRIGINACK output 5" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x04 4. " CTTRIGINACK[4] ,Set CTTRIGINACK output 4" "No effect,Set"
|
|
bitfld.long 0x04 3. " CTTRIGINACK[3] ,Set CTTRIGINACK output 3" "No effect,Set"
|
|
bitfld.long 0x04 2. " CTTRIGINACK[2] ,Set CTTRIGINACK output 2" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CTTRIGINACK[1] ,Set CTTRIGINACK output 1" "No effect,Set"
|
|
bitfld.long 0x04 0. " CTTRIGINACK[0] ,Set CTTRIGINACK output 0" "No effect,Set"
|
|
line.long 0x08 "ITCHOUT,ITCHOUT Register"
|
|
bitfld.long 0x08 3. " CTCHOUT[3] ,Set CTCHOUT output 3" "No effect,Set"
|
|
bitfld.long 0x08 2. " CTCHOUT[2] ,Set CTCHOUT output 2" "No effect,Set"
|
|
bitfld.long 0x08 1. " CTCHOUT[1] ,Set CTCHOUT output 1" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x08 0. " CTCHOUT[0] ,Set CTCHOUT output 0" "No effect,Set"
|
|
line.long 0x0c "ITTRIGOUT,ITTRIGOUT Register"
|
|
bitfld.long 0x0c 7. " CTTRIGOUT[7] ,Set CTTRIGOUT output 7" "No effect,Set"
|
|
bitfld.long 0x0c 6. " CTTRIGOUT[6] ,Set CTTRIGOUT output 6" "No effect,Set"
|
|
bitfld.long 0x0c 5. " CTTRIGOUT[5] ,Set CTTRIGOUT output 5" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " CTTRIGOUT[4] ,Set CTTRIGOUT output 4" "No effect,Set"
|
|
bitfld.long 0x0c 3. " CTTRIGOUT[3] ,Set CTTRIGOUT output 3" "No effect,Set"
|
|
bitfld.long 0x0c 2. " CTTRIGOUT[2] ,Set CTTRIGOUT output 2" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " CTTRIGOUT[1] ,Set CTTRIGOUT output 1" "No effect,Set"
|
|
bitfld.long 0x0c 0. " CTTRIGOUT[0] ,Set CTTRIGOUT output 0" "No effect,Set"
|
|
rgroup.long 0xeec++0x0f
|
|
line.long 0x00 "ITCHOUTACK,ITCHOUTACK Register"
|
|
bitfld.long 0x00 3. " CTCHOUTACK[3] ,Value of CTCHOUTACK input 3" "Low,High"
|
|
bitfld.long 0x00 2. " CTCHOUTACK[2] ,Value of CTCHOUTACK input 2" "Low,High"
|
|
bitfld.long 0x00 1. " CTCHOUTACK[1] ,Value of CTCHOUTACK input 1" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTCHINACK[0] ,Value of CTCHINACK input 0" "Low,High"
|
|
line.long 0x04 "ITTRIGOUTACK,ITTRIGOUTACK Register"
|
|
bitfld.long 0x04 7. " CTTRIGOUTACK[7] ,Value of CTTRIGOUTACK input 7" "Low,High"
|
|
bitfld.long 0x04 6. " CTTRIGOUTACK[6] ,Value of CTTRIGOUTACK input 6" "Low,High"
|
|
bitfld.long 0x04 5. " CTTRIGOUTACK[5] ,Value of CTTRIGOUTACK input 5" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 4. " CTTRIGOUTACK[4] ,Value of CTTRIGOUTACK input 4" "Low,High"
|
|
bitfld.long 0x04 3. " CTTRIGOUTACK[3] ,Value of CTTRIGOUTACK input 3" "Low,High"
|
|
bitfld.long 0x04 2. " CTTRIGOUTACK[2] ,Value of CTTRIGOUTACK input 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CTTRIGOUTACK[1] ,Value of CTTRIGOUTACK input 1" "Low,High"
|
|
bitfld.long 0x04 0. " CTTRIGOUTACK[0] ,Value of CTTRIGOUTACK input 0" "Low,High"
|
|
line.long 0x08 "ITCHIN,ITCHIN Register"
|
|
bitfld.long 0x08 3. " CTCHIN[3] ,Value of CTCHIN input 3" "Low,High"
|
|
bitfld.long 0x08 2. " CTCHIN[2] ,Value of CTCHIN input 2" "Low,High"
|
|
bitfld.long 0x08 1. " CTCHIN[1] ,Value of CTCHIN input 1" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 0. " CTCHIN[0] ,Value of CTCHIN input 0" "Low,High"
|
|
line.long 0x0c "ITTRIGIN,ITTRIGIN Register"
|
|
bitfld.long 0x0c 7. " CTTRIGIN[7] ,Value of CTTRIGIN input 7" "Low,High"
|
|
bitfld.long 0x0c 6. " CTTRIGIN[6] ,Value of CTTRIGIN input 6" "Low,High"
|
|
bitfld.long 0x0c 5. " CTTRIGIN[5] ,Value of CTTRIGIN input 5" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " CTTRIGIN[4] ,Value of CTTRIGIN input" "Low,High"
|
|
bitfld.long 0x0c 3. " CTTRIGIN[3] ,Value of CTTRIGIN input" "Low,High"
|
|
bitfld.long 0x0c 2. " CTTRIGIN[2] ,Value of CTTRIGIN input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " CTTRIGIN[1] ,Value of CTTRIGIN input 1" "Low,High"
|
|
bitfld.long 0x0c 0. " CTTRIGIN[0] ,Value of CTTRIGIN input 0" "Low,High"
|
|
width 18.
|
|
group.long 0xf00++0x03
|
|
line.long 0x00 "ITCTRL,IT Control Register"
|
|
bitfld.long 0x00 0. " ITEN ,Enable IT Registers" "Disabled,Enabled"
|
|
group.long 0xfa0++0x07
|
|
line.long 0x00 "CTSR,Claim Tag Set Register"
|
|
bitfld.long 0x00 0.--3. " CTS ,Claim Tag Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "CTCR,Claim Tag Clear Register"
|
|
bitfld.long 0x04 0.--3. " CTC ,Claim Tag Clear" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0xfb0++0x03
|
|
line.long 0x00 "LOCK_ACCESS,Lock Access Register"
|
|
rgroup.long 0xfb4++0x07
|
|
line.long 0x00 "LSR,Lock Status Register"
|
|
bitfld.long 0x00 0.--2. " LS ,Lock Status" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "ASR,Authentication Status Register"
|
|
bitfld.long 0x04 3. " NIDEN ,Current value of noninvasive debug enable signals" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " NIDEN_CTL ,Non-invasive debug controlled" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " IDEN ,Current value of invasive debug enable signals" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " IDEN_CTL ,Invasive debug controlled" "Disabled,Enabled"
|
|
rgroup.long 0xfc8++0x37
|
|
line.long 0x00 "DEVID,Device ID"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " DEVID ,Device ID"
|
|
line.long 0x04 "DTIR,Device Type Identifier Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DTI ,Device Type Identifier"
|
|
line.long 0x08 "PERIPHID4,Peripheral ID4"
|
|
hexmask.long.byte 0x08 0.--7. 1. " PERIPHID4 ,Peripheral ID4"
|
|
line.long 0x0c "PERIPHID5,Peripheral ID5"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " PERIPHID5 ,Peripheral ID5"
|
|
line.long 0x10 "PERIPHID6,Peripheral ID6"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PERIPHID6 ,Peripheral ID6"
|
|
line.long 0x14 "PERIPHID7,Peripheral ID7"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PERIPHID7 ,Peripheral ID7"
|
|
line.long 0x18 "PERIPHID0,Peripheral ID0"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PERIPHID0 ,Peripheral ID0"
|
|
line.long 0x1c "PERIPHID1,Peripheral ID1"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " PERIPHID1 ,Peripheral ID1"
|
|
line.long 0x20 "PERIPHID2,Peripheral ID2"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PERIPHID2 ,Peripheral ID2"
|
|
line.long 0x24 "PERIPHID3,Peripheral ID3"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PERIPHID3 ,Peripheral ID3"
|
|
line.long 0x28 "COMPID0,Component ID0"
|
|
hexmask.long.byte 0x28 0.--7. 1. " COMPID0 ,Component ID0"
|
|
line.long 0x2c "COMPID1,Component ID1"
|
|
hexmask.long.byte 0x2c 0.--7. 1. " COMPID1 ,Component ID1"
|
|
line.long 0x30 "COMPID2,Component ID2"
|
|
hexmask.long.byte 0x30 0.--7. 1. " COMPID2 ,Component ID2"
|
|
line.long 0x34 "COMPID3,Component ID3"
|
|
hexmask.long.byte 0x34 0.--7. 1. " COMPID3 ,Component ID3"
|
|
width 12.
|
|
tree.end
|
|
tree "DEBUG_CTI_AXIM"
|
|
base ad:0xF880A000
|
|
width 18.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTICONTROL,CTI Control Register"
|
|
bitfld.long 0x00 0. " GLBEN ,Enables or disables the ECT" "Disabled,Enabled"
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "CTIINTACK,CTI Interrupt Acknowledge Register"
|
|
bitfld.long 0x00 7. " INTACK[7] ,CTITRIGOUT[7] output Acknowledge" "No effect,Acknowledged"
|
|
bitfld.long 0x00 6. " INTACK[6] ,CTITRIGOUT[6] output Acknowledge" "No effect,Acknowledged"
|
|
bitfld.long 0x00 5. " INTACK[5] ,CTITRIGOUT[5] output Acknowledge" "No effect,Acknowledged"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INTACK[4] ,CTITRIGOUT[4] output Acknowledge" "No effect,Acknowledged"
|
|
bitfld.long 0x00 3. " INTACK[3] ,CTITRIGOUT[3] output Acknowledge" "No effect,Acknowledged"
|
|
bitfld.long 0x00 2. " INTACK[2] ,CTITRIGOUT[2] output Acknowledge" "No effect,Acknowledged"
|
|
textline " "
|
|
bitfld.long 0x00 1. " INTACK[1] ,CTITRIGOUT[1] output Acknowledge" "No effect,Acknowledged"
|
|
bitfld.long 0x00 0. " INTACK[0] ,CTITRIGOUT[0] output Acknowledge" "No effect,Acknowledged"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CTIAPPSET,CTI Application Trigger Set Register"
|
|
bitfld.long 0x00 3. " APPSET[3] ,Channel 3 trigger state" "Inactive,Active"
|
|
bitfld.long 0x00 2. " APPSET[2] ,Channel 2 trigger state" "Inactive,Active"
|
|
bitfld.long 0x00 1. " APPSET[1] ,Channel 1 trigger state" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 0. " APPSET[0] ,Channel 0 trigger state" "Inactive,Active"
|
|
wgroup.long 0x18++0x07
|
|
line.long 0x00 "CTIAPPCLEAR,CTI Application Trigger Clear Register"
|
|
bitfld.long 0x00 3. " APPCLEAR[3] ,Channel 3 trigger state" "No effect,Clear"
|
|
bitfld.long 0x00 2. " APPCLEAR[2] ,Channel 2 trigger state" "No effect,Clear"
|
|
bitfld.long 0x00 1. " APPCLEAR[1] ,Channel 1 trigger state" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " APPCLEAR[0] ,Channel 0 trigger state" "No effect,Clear"
|
|
line.long 0x04 "CTIAPPPULSE,CTI Application Pulse Register"
|
|
bitfld.long 0x04 3. " APPULSE[3] ,Channel 3 Pulse Event" "No effect,Generate"
|
|
bitfld.long 0x04 2. " APPULSE[2] ,Channel 2 Pulse Event" "No effect,Generate"
|
|
bitfld.long 0x04 1. " APPULSE[1] ,Channel 1 Pulse Event" "No effect,Generate"
|
|
textline " "
|
|
bitfld.long 0x04 0. " APPULSE[0] ,Channel 0 Pulse Event" "No effect,Generate"
|
|
group.long 0x20++0x1f
|
|
line.long 0x0 "CTIINEN0,CTI Trigger to Channel Enable 0 Register"
|
|
bitfld.long 0x0 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x4 "CTIINEN1,CTI Trigger to Channel Enable 1 Register"
|
|
bitfld.long 0x4 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x4 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x4 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x8 "CTIINEN2,CTI Trigger to Channel Enable 2 Register"
|
|
bitfld.long 0x8 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x8 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x8 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0xC "CTIINEN3,CTI Trigger to Channel Enable 3 Register"
|
|
bitfld.long 0xC 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0xC 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0xC 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x10 "CTIINEN4,CTI Trigger to Channel Enable 4 Register"
|
|
bitfld.long 0x10 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x14 "CTIINEN5,CTI Trigger to Channel Enable 5 Register"
|
|
bitfld.long 0x14 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x14 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x18 "CTIINEN6,CTI Trigger to Channel Enable 6 Register"
|
|
bitfld.long 0x18 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x18 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x18 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x1C "CTIINEN7,CTI Trigger to Channel Enable 7 Register"
|
|
bitfld.long 0x1C 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x1C 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x1C 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
group.long 0xa0++0x1f
|
|
line.long 0x0 "CTIOUTEN0,CTI Channel to Trigger Enable 0 Register"
|
|
bitfld.long 0x0 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x4 "CTIOUTEN1,CTI Channel to Trigger Enable 1 Register"
|
|
bitfld.long 0x4 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x4 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x4 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x8 "CTIOUTEN2,CTI Channel to Trigger Enable 2 Register"
|
|
bitfld.long 0x8 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x8 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x8 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0xC "CTIOUTEN3,CTI Channel to Trigger Enable 3 Register"
|
|
bitfld.long 0xC 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0xC 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0xC 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x10 "CTIOUTEN4,CTI Channel to Trigger Enable 4 Register"
|
|
bitfld.long 0x10 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x14 "CTIOUTEN5,CTI Channel to Trigger Enable 5 Register"
|
|
bitfld.long 0x14 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x14 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x18 "CTIOUTEN6,CTI Channel to Trigger Enable 6 Register"
|
|
bitfld.long 0x18 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x18 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x18 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x1C "CTIOUTEN7,CTI Channel to Trigger Enable 7 Register"
|
|
bitfld.long 0x1C 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x1C 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x1C 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
rgroup.long 0x130++0x0f
|
|
line.long 0x00 "CTITRIGINSTATUS,CTI Trigger In Status Register"
|
|
bitfld.long 0x00 7. " TRIGINSTATUS[7] ,Status of the CTITRIGIN input 7" "Not active,Active"
|
|
bitfld.long 0x00 6. " TRIGINSTATUS[6] ,Status of the CTITRIGIN input 6" "Not active,Active"
|
|
bitfld.long 0x00 5. " TRIGINSTATUS[5] ,Status of the CTITRIGIN input 5" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TRIGINSTATUS[4] ,Status of the CTITRIGIN input 4" "Not active,Active"
|
|
bitfld.long 0x00 3. " TRIGINSTATUS[3] ,Status of the CTITRIGIN input 3" "Not active,Active"
|
|
bitfld.long 0x00 2. " TRIGINSTATUS[2] ,Status of the CTITRIGIN input 2" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TRIGINSTATUS[1] ,Status of the CTITRIGIN input 1" "Not active,Active"
|
|
bitfld.long 0x00 0. " TRIGINSTATUS[0] ,Status of the CTITRIGIN input 0" "Not active,Active"
|
|
line.long 0x04 "CTITRIGOUTSTATUS,CTI Trigger Out Status Register"
|
|
bitfld.long 0x04 7. " TRIGOUTSTATUS[7] ,Status of the CTITRIGOUT output 7" "Not active,Active"
|
|
bitfld.long 0x04 6. " TRIGOUTSTATUS[6] ,Status of the CTITRIGOUT output 6" "Not active,Active"
|
|
bitfld.long 0x04 5. " TRIGOUTSTATUS[5] ,Status of the CTITRIGOUT output 5" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 4. " TRIGOUTSTATUS[4] ,Status of the CTITRIGOUT output 4" "Not active,Active"
|
|
bitfld.long 0x04 3. " TRIGOUTSTATUS[3] ,Status of the CTITRIGOUT output 3" "Not active,Active"
|
|
bitfld.long 0x04 2. " TRIGOUTSTATUS[2] ,Status of the CTITRIGOUT output 2" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " TRIGOUTSTATUS[1] ,Status of the CTITRIGOUT output 1" "Not active,Active"
|
|
bitfld.long 0x04 0. " TRIGOUTSTATUS[0] ,Status of the CTITRIGOUT output 0" "Not active,Active"
|
|
line.long 0x08 "CTICHINSTATUS,CTI Channel In Status Register"
|
|
bitfld.long 0x08 3. " CTCHINSTATUS[3] ,Status of the CTICHIN input 3" "Not active,Active"
|
|
bitfld.long 0x08 2. " CTCHINSTATUS[2] ,Status of the CTICHIN input 2" "Not active,Active"
|
|
bitfld.long 0x08 1. " CTCHINSTATUS[1] ,Status of the CTICHIN input 1" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 0. " CTCHINSTATUS[0] ,Status of the CTICHIN input 0" "Not active,Active"
|
|
line.long 0x0c "CTICHOUTSTATUS,CTI Channel Out Status Register"
|
|
bitfld.long 0x0c 3. " CTCHOUTSTATUS[3] ,Status of the CTICHOUT output 3" "Not active,Active"
|
|
bitfld.long 0x0c 2. " CTCHOUTSTATUS[2] ,Status of the CTICHOUT output 2" "Not active,Active"
|
|
bitfld.long 0x0c 1. " CTCHOUTSTATUS[1] ,Status of the CTICHOUT output 1" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 0. " CTCHOUTSTATUS[0] ,Status of the CTICHOUT output 0" "Not active,Active"
|
|
group.long 0x140++0x07
|
|
line.long 0x00 "CTIGATE,Enable CTI Channel Gate Register"
|
|
bitfld.long 0x00 3. " CTIGATEEN3 ,Enable CTICHOUT3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CTIGATEEN2 ,Enable CTICHOUT2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " CTIGATEEN1 ,Enable CTICHOUT1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTIGATEEN0 ,Enable CTICHOUT0" "Disabled,Enabled"
|
|
line.long 0x04 "ASICCTL,External Multiplexor Control Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ASICCTL ,Output of ASICCTL[7:0]"
|
|
wgroup.long 0xedc++0x0f
|
|
line.long 0x00 "ITCHINACK,ITCHINACK Register"
|
|
bitfld.long 0x00 3. " CTCHINACK[3] ,Set CTCHINACK output 3" "No effect,Set"
|
|
bitfld.long 0x00 2. " CTCHINACK[2] ,Set CTCHINACK output 2" "No effect,Set"
|
|
bitfld.long 0x00 1. " CTCHINACK[1] ,Set CTCHINACK output 1" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTCHINACK[0] ,Set CTCHINACK output 0" "No effect,Set"
|
|
line.long 0x04 "ITTRIGINACK,ITTRIGINACK Register"
|
|
bitfld.long 0x04 7. " CTTRIGINACK[7] ,Set CTTRIGINACK output 7" "No effect,Set"
|
|
bitfld.long 0x04 6. " CTTRIGINACK[6] ,Set CTTRIGINACK output 6" "No effect,Set"
|
|
bitfld.long 0x04 5. " CTTRIGINACK[5] ,Set CTTRIGINACK output 5" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x04 4. " CTTRIGINACK[4] ,Set CTTRIGINACK output 4" "No effect,Set"
|
|
bitfld.long 0x04 3. " CTTRIGINACK[3] ,Set CTTRIGINACK output 3" "No effect,Set"
|
|
bitfld.long 0x04 2. " CTTRIGINACK[2] ,Set CTTRIGINACK output 2" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CTTRIGINACK[1] ,Set CTTRIGINACK output 1" "No effect,Set"
|
|
bitfld.long 0x04 0. " CTTRIGINACK[0] ,Set CTTRIGINACK output 0" "No effect,Set"
|
|
line.long 0x08 "ITCHOUT,ITCHOUT Register"
|
|
bitfld.long 0x08 3. " CTCHOUT[3] ,Set CTCHOUT output 3" "No effect,Set"
|
|
bitfld.long 0x08 2. " CTCHOUT[2] ,Set CTCHOUT output 2" "No effect,Set"
|
|
bitfld.long 0x08 1. " CTCHOUT[1] ,Set CTCHOUT output 1" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x08 0. " CTCHOUT[0] ,Set CTCHOUT output 0" "No effect,Set"
|
|
line.long 0x0c "ITTRIGOUT,ITTRIGOUT Register"
|
|
bitfld.long 0x0c 7. " CTTRIGOUT[7] ,Set CTTRIGOUT output 7" "No effect,Set"
|
|
bitfld.long 0x0c 6. " CTTRIGOUT[6] ,Set CTTRIGOUT output 6" "No effect,Set"
|
|
bitfld.long 0x0c 5. " CTTRIGOUT[5] ,Set CTTRIGOUT output 5" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " CTTRIGOUT[4] ,Set CTTRIGOUT output 4" "No effect,Set"
|
|
bitfld.long 0x0c 3. " CTTRIGOUT[3] ,Set CTTRIGOUT output 3" "No effect,Set"
|
|
bitfld.long 0x0c 2. " CTTRIGOUT[2] ,Set CTTRIGOUT output 2" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " CTTRIGOUT[1] ,Set CTTRIGOUT output 1" "No effect,Set"
|
|
bitfld.long 0x0c 0. " CTTRIGOUT[0] ,Set CTTRIGOUT output 0" "No effect,Set"
|
|
rgroup.long 0xeec++0x0f
|
|
line.long 0x00 "ITCHOUTACK,ITCHOUTACK Register"
|
|
bitfld.long 0x00 3. " CTCHOUTACK[3] ,Value of CTCHOUTACK input 3" "Low,High"
|
|
bitfld.long 0x00 2. " CTCHOUTACK[2] ,Value of CTCHOUTACK input 2" "Low,High"
|
|
bitfld.long 0x00 1. " CTCHOUTACK[1] ,Value of CTCHOUTACK input 1" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTCHINACK[0] ,Value of CTCHINACK input 0" "Low,High"
|
|
line.long 0x04 "ITTRIGOUTACK,ITTRIGOUTACK Register"
|
|
bitfld.long 0x04 7. " CTTRIGOUTACK[7] ,Value of CTTRIGOUTACK input 7" "Low,High"
|
|
bitfld.long 0x04 6. " CTTRIGOUTACK[6] ,Value of CTTRIGOUTACK input 6" "Low,High"
|
|
bitfld.long 0x04 5. " CTTRIGOUTACK[5] ,Value of CTTRIGOUTACK input 5" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 4. " CTTRIGOUTACK[4] ,Value of CTTRIGOUTACK input 4" "Low,High"
|
|
bitfld.long 0x04 3. " CTTRIGOUTACK[3] ,Value of CTTRIGOUTACK input 3" "Low,High"
|
|
bitfld.long 0x04 2. " CTTRIGOUTACK[2] ,Value of CTTRIGOUTACK input 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CTTRIGOUTACK[1] ,Value of CTTRIGOUTACK input 1" "Low,High"
|
|
bitfld.long 0x04 0. " CTTRIGOUTACK[0] ,Value of CTTRIGOUTACK input 0" "Low,High"
|
|
line.long 0x08 "ITCHIN,ITCHIN Register"
|
|
bitfld.long 0x08 3. " CTCHIN[3] ,Value of CTCHIN input 3" "Low,High"
|
|
bitfld.long 0x08 2. " CTCHIN[2] ,Value of CTCHIN input 2" "Low,High"
|
|
bitfld.long 0x08 1. " CTCHIN[1] ,Value of CTCHIN input 1" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 0. " CTCHIN[0] ,Value of CTCHIN input 0" "Low,High"
|
|
line.long 0x0c "ITTRIGIN,ITTRIGIN Register"
|
|
bitfld.long 0x0c 7. " CTTRIGIN[7] ,Value of CTTRIGIN input 7" "Low,High"
|
|
bitfld.long 0x0c 6. " CTTRIGIN[6] ,Value of CTTRIGIN input 6" "Low,High"
|
|
bitfld.long 0x0c 5. " CTTRIGIN[5] ,Value of CTTRIGIN input 5" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " CTTRIGIN[4] ,Value of CTTRIGIN input" "Low,High"
|
|
bitfld.long 0x0c 3. " CTTRIGIN[3] ,Value of CTTRIGIN input" "Low,High"
|
|
bitfld.long 0x0c 2. " CTTRIGIN[2] ,Value of CTTRIGIN input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " CTTRIGIN[1] ,Value of CTTRIGIN input 1" "Low,High"
|
|
bitfld.long 0x0c 0. " CTTRIGIN[0] ,Value of CTTRIGIN input 0" "Low,High"
|
|
width 18.
|
|
group.long 0xf00++0x03
|
|
line.long 0x00 "ITCTRL,IT Control Register"
|
|
bitfld.long 0x00 0. " ITEN ,Enable IT Registers" "Disabled,Enabled"
|
|
group.long 0xfa0++0x07
|
|
line.long 0x00 "CTSR,Claim Tag Set Register"
|
|
bitfld.long 0x00 0.--3. " CTS ,Claim Tag Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "CTCR,Claim Tag Clear Register"
|
|
bitfld.long 0x04 0.--3. " CTC ,Claim Tag Clear" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0xfb0++0x03
|
|
line.long 0x00 "LOCK_ACCESS,Lock Access Register"
|
|
rgroup.long 0xfb4++0x07
|
|
line.long 0x00 "LSR,Lock Status Register"
|
|
bitfld.long 0x00 0.--2. " LS ,Lock Status" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "ASR,Authentication Status Register"
|
|
bitfld.long 0x04 3. " NIDEN ,Current value of noninvasive debug enable signals" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " NIDEN_CTL ,Non-invasive debug controlled" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " IDEN ,Current value of invasive debug enable signals" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " IDEN_CTL ,Invasive debug controlled" "Disabled,Enabled"
|
|
rgroup.long 0xfc8++0x37
|
|
line.long 0x00 "DEVID,Device ID"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " DEVID ,Device ID"
|
|
line.long 0x04 "DTIR,Device Type Identifier Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DTI ,Device Type Identifier"
|
|
line.long 0x08 "PERIPHID4,Peripheral ID4"
|
|
hexmask.long.byte 0x08 0.--7. 1. " PERIPHID4 ,Peripheral ID4"
|
|
line.long 0x0c "PERIPHID5,Peripheral ID5"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " PERIPHID5 ,Peripheral ID5"
|
|
line.long 0x10 "PERIPHID6,Peripheral ID6"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PERIPHID6 ,Peripheral ID6"
|
|
line.long 0x14 "PERIPHID7,Peripheral ID7"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PERIPHID7 ,Peripheral ID7"
|
|
line.long 0x18 "PERIPHID0,Peripheral ID0"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PERIPHID0 ,Peripheral ID0"
|
|
line.long 0x1c "PERIPHID1,Peripheral ID1"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " PERIPHID1 ,Peripheral ID1"
|
|
line.long 0x20 "PERIPHID2,Peripheral ID2"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PERIPHID2 ,Peripheral ID2"
|
|
line.long 0x24 "PERIPHID3,Peripheral ID3"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PERIPHID3 ,Peripheral ID3"
|
|
line.long 0x28 "COMPID0,Component ID0"
|
|
hexmask.long.byte 0x28 0.--7. 1. " COMPID0 ,Component ID0"
|
|
line.long 0x2c "COMPID1,Component ID1"
|
|
hexmask.long.byte 0x2c 0.--7. 1. " COMPID1 ,Component ID1"
|
|
line.long 0x30 "COMPID2,Component ID2"
|
|
hexmask.long.byte 0x30 0.--7. 1. " COMPID2 ,Component ID2"
|
|
line.long 0x34 "COMPID3,Component ID3"
|
|
hexmask.long.byte 0x34 0.--7. 1. " COMPID3 ,Component ID3"
|
|
width 12.
|
|
tree.end
|
|
tree "DEBUG_CTI_ETB_TPIU"
|
|
base ad:0xF8802000
|
|
width 18.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTICONTROL,CTI Control Register"
|
|
bitfld.long 0x00 0. " GLBEN ,Enables or disables the ECT" "Disabled,Enabled"
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "CTIINTACK,CTI Interrupt Acknowledge Register"
|
|
bitfld.long 0x00 7. " INTACK[7] ,CTITRIGOUT[7] output Acknowledge" "No effect,Acknowledged"
|
|
bitfld.long 0x00 6. " INTACK[6] ,CTITRIGOUT[6] output Acknowledge" "No effect,Acknowledged"
|
|
bitfld.long 0x00 5. " INTACK[5] ,CTITRIGOUT[5] output Acknowledge" "No effect,Acknowledged"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INTACK[4] ,CTITRIGOUT[4] output Acknowledge" "No effect,Acknowledged"
|
|
bitfld.long 0x00 3. " INTACK[3] ,CTITRIGOUT[3] output Acknowledge" "No effect,Acknowledged"
|
|
bitfld.long 0x00 2. " INTACK[2] ,CTITRIGOUT[2] output Acknowledge" "No effect,Acknowledged"
|
|
textline " "
|
|
bitfld.long 0x00 1. " INTACK[1] ,CTITRIGOUT[1] output Acknowledge" "No effect,Acknowledged"
|
|
bitfld.long 0x00 0. " INTACK[0] ,CTITRIGOUT[0] output Acknowledge" "No effect,Acknowledged"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CTIAPPSET,CTI Application Trigger Set Register"
|
|
bitfld.long 0x00 3. " APPSET[3] ,Channel 3 trigger state" "Inactive,Active"
|
|
bitfld.long 0x00 2. " APPSET[2] ,Channel 2 trigger state" "Inactive,Active"
|
|
bitfld.long 0x00 1. " APPSET[1] ,Channel 1 trigger state" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 0. " APPSET[0] ,Channel 0 trigger state" "Inactive,Active"
|
|
wgroup.long 0x18++0x07
|
|
line.long 0x00 "CTIAPPCLEAR,CTI Application Trigger Clear Register"
|
|
bitfld.long 0x00 3. " APPCLEAR[3] ,Channel 3 trigger state" "No effect,Clear"
|
|
bitfld.long 0x00 2. " APPCLEAR[2] ,Channel 2 trigger state" "No effect,Clear"
|
|
bitfld.long 0x00 1. " APPCLEAR[1] ,Channel 1 trigger state" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " APPCLEAR[0] ,Channel 0 trigger state" "No effect,Clear"
|
|
line.long 0x04 "CTIAPPPULSE,CTI Application Pulse Register"
|
|
bitfld.long 0x04 3. " APPULSE[3] ,Channel 3 Pulse Event" "No effect,Generate"
|
|
bitfld.long 0x04 2. " APPULSE[2] ,Channel 2 Pulse Event" "No effect,Generate"
|
|
bitfld.long 0x04 1. " APPULSE[1] ,Channel 1 Pulse Event" "No effect,Generate"
|
|
textline " "
|
|
bitfld.long 0x04 0. " APPULSE[0] ,Channel 0 Pulse Event" "No effect,Generate"
|
|
group.long 0x20++0x1f
|
|
line.long 0x0 "CTIINEN0,CTI Trigger to Channel Enable 0 Register"
|
|
bitfld.long 0x0 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x4 "CTIINEN1,CTI Trigger to Channel Enable 1 Register"
|
|
bitfld.long 0x4 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x4 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x4 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x8 "CTIINEN2,CTI Trigger to Channel Enable 2 Register"
|
|
bitfld.long 0x8 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x8 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x8 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0xC "CTIINEN3,CTI Trigger to Channel Enable 3 Register"
|
|
bitfld.long 0xC 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0xC 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0xC 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x10 "CTIINEN4,CTI Trigger to Channel Enable 4 Register"
|
|
bitfld.long 0x10 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x14 "CTIINEN5,CTI Trigger to Channel Enable 5 Register"
|
|
bitfld.long 0x14 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x14 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x18 "CTIINEN6,CTI Trigger to Channel Enable 6 Register"
|
|
bitfld.long 0x18 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x18 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x18 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x1C "CTIINEN7,CTI Trigger to Channel Enable 7 Register"
|
|
bitfld.long 0x1C 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x1C 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x1C 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
group.long 0xa0++0x1f
|
|
line.long 0x0 "CTIOUTEN0,CTI Channel to Trigger Enable 0 Register"
|
|
bitfld.long 0x0 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x4 "CTIOUTEN1,CTI Channel to Trigger Enable 1 Register"
|
|
bitfld.long 0x4 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x4 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x4 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x8 "CTIOUTEN2,CTI Channel to Trigger Enable 2 Register"
|
|
bitfld.long 0x8 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x8 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x8 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0xC "CTIOUTEN3,CTI Channel to Trigger Enable 3 Register"
|
|
bitfld.long 0xC 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0xC 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0xC 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x10 "CTIOUTEN4,CTI Channel to Trigger Enable 4 Register"
|
|
bitfld.long 0x10 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x14 "CTIOUTEN5,CTI Channel to Trigger Enable 5 Register"
|
|
bitfld.long 0x14 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x14 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x18 "CTIOUTEN6,CTI Channel to Trigger Enable 6 Register"
|
|
bitfld.long 0x18 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x18 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x18 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x1C "CTIOUTEN7,CTI Channel to Trigger Enable 7 Register"
|
|
bitfld.long 0x1C 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x1C 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x1C 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
rgroup.long 0x130++0x0f
|
|
line.long 0x00 "CTITRIGINSTATUS,CTI Trigger In Status Register"
|
|
bitfld.long 0x00 7. " TRIGINSTATUS[7] ,Status of the CTITRIGIN input 7" "Not active,Active"
|
|
bitfld.long 0x00 6. " TRIGINSTATUS[6] ,Status of the CTITRIGIN input 6" "Not active,Active"
|
|
bitfld.long 0x00 5. " TRIGINSTATUS[5] ,Status of the CTITRIGIN input 5" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TRIGINSTATUS[4] ,Status of the CTITRIGIN input 4" "Not active,Active"
|
|
bitfld.long 0x00 3. " TRIGINSTATUS[3] ,Status of the CTITRIGIN input 3" "Not active,Active"
|
|
bitfld.long 0x00 2. " TRIGINSTATUS[2] ,Status of the CTITRIGIN input 2" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TRIGINSTATUS[1] ,Status of the CTITRIGIN input 1" "Not active,Active"
|
|
bitfld.long 0x00 0. " TRIGINSTATUS[0] ,Status of the CTITRIGIN input 0" "Not active,Active"
|
|
line.long 0x04 "CTITRIGOUTSTATUS,CTI Trigger Out Status Register"
|
|
bitfld.long 0x04 7. " TRIGOUTSTATUS[7] ,Status of the CTITRIGOUT output 7" "Not active,Active"
|
|
bitfld.long 0x04 6. " TRIGOUTSTATUS[6] ,Status of the CTITRIGOUT output 6" "Not active,Active"
|
|
bitfld.long 0x04 5. " TRIGOUTSTATUS[5] ,Status of the CTITRIGOUT output 5" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 4. " TRIGOUTSTATUS[4] ,Status of the CTITRIGOUT output 4" "Not active,Active"
|
|
bitfld.long 0x04 3. " TRIGOUTSTATUS[3] ,Status of the CTITRIGOUT output 3" "Not active,Active"
|
|
bitfld.long 0x04 2. " TRIGOUTSTATUS[2] ,Status of the CTITRIGOUT output 2" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " TRIGOUTSTATUS[1] ,Status of the CTITRIGOUT output 1" "Not active,Active"
|
|
bitfld.long 0x04 0. " TRIGOUTSTATUS[0] ,Status of the CTITRIGOUT output 0" "Not active,Active"
|
|
line.long 0x08 "CTICHINSTATUS,CTI Channel In Status Register"
|
|
bitfld.long 0x08 3. " CTCHINSTATUS[3] ,Status of the CTICHIN input 3" "Not active,Active"
|
|
bitfld.long 0x08 2. " CTCHINSTATUS[2] ,Status of the CTICHIN input 2" "Not active,Active"
|
|
bitfld.long 0x08 1. " CTCHINSTATUS[1] ,Status of the CTICHIN input 1" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 0. " CTCHINSTATUS[0] ,Status of the CTICHIN input 0" "Not active,Active"
|
|
line.long 0x0c "CTICHOUTSTATUS,CTI Channel Out Status Register"
|
|
bitfld.long 0x0c 3. " CTCHOUTSTATUS[3] ,Status of the CTICHOUT output 3" "Not active,Active"
|
|
bitfld.long 0x0c 2. " CTCHOUTSTATUS[2] ,Status of the CTICHOUT output 2" "Not active,Active"
|
|
bitfld.long 0x0c 1. " CTCHOUTSTATUS[1] ,Status of the CTICHOUT output 1" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 0. " CTCHOUTSTATUS[0] ,Status of the CTICHOUT output 0" "Not active,Active"
|
|
group.long 0x140++0x07
|
|
line.long 0x00 "CTIGATE,Enable CTI Channel Gate Register"
|
|
bitfld.long 0x00 3. " CTIGATEEN3 ,Enable CTICHOUT3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CTIGATEEN2 ,Enable CTICHOUT2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " CTIGATEEN1 ,Enable CTICHOUT1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTIGATEEN0 ,Enable CTICHOUT0" "Disabled,Enabled"
|
|
line.long 0x04 "ASICCTL,External Multiplexor Control Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ASICCTL ,Output of ASICCTL[7:0]"
|
|
wgroup.long 0xedc++0x0f
|
|
line.long 0x00 "ITCHINACK,ITCHINACK Register"
|
|
bitfld.long 0x00 3. " CTCHINACK[3] ,Set CTCHINACK output 3" "No effect,Set"
|
|
bitfld.long 0x00 2. " CTCHINACK[2] ,Set CTCHINACK output 2" "No effect,Set"
|
|
bitfld.long 0x00 1. " CTCHINACK[1] ,Set CTCHINACK output 1" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTCHINACK[0] ,Set CTCHINACK output 0" "No effect,Set"
|
|
line.long 0x04 "ITTRIGINACK,ITTRIGINACK Register"
|
|
bitfld.long 0x04 7. " CTTRIGINACK[7] ,Set CTTRIGINACK output 7" "No effect,Set"
|
|
bitfld.long 0x04 6. " CTTRIGINACK[6] ,Set CTTRIGINACK output 6" "No effect,Set"
|
|
bitfld.long 0x04 5. " CTTRIGINACK[5] ,Set CTTRIGINACK output 5" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x04 4. " CTTRIGINACK[4] ,Set CTTRIGINACK output 4" "No effect,Set"
|
|
bitfld.long 0x04 3. " CTTRIGINACK[3] ,Set CTTRIGINACK output 3" "No effect,Set"
|
|
bitfld.long 0x04 2. " CTTRIGINACK[2] ,Set CTTRIGINACK output 2" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CTTRIGINACK[1] ,Set CTTRIGINACK output 1" "No effect,Set"
|
|
bitfld.long 0x04 0. " CTTRIGINACK[0] ,Set CTTRIGINACK output 0" "No effect,Set"
|
|
line.long 0x08 "ITCHOUT,ITCHOUT Register"
|
|
bitfld.long 0x08 3. " CTCHOUT[3] ,Set CTCHOUT output 3" "No effect,Set"
|
|
bitfld.long 0x08 2. " CTCHOUT[2] ,Set CTCHOUT output 2" "No effect,Set"
|
|
bitfld.long 0x08 1. " CTCHOUT[1] ,Set CTCHOUT output 1" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x08 0. " CTCHOUT[0] ,Set CTCHOUT output 0" "No effect,Set"
|
|
line.long 0x0c "ITTRIGOUT,ITTRIGOUT Register"
|
|
bitfld.long 0x0c 7. " CTTRIGOUT[7] ,Set CTTRIGOUT output 7" "No effect,Set"
|
|
bitfld.long 0x0c 6. " CTTRIGOUT[6] ,Set CTTRIGOUT output 6" "No effect,Set"
|
|
bitfld.long 0x0c 5. " CTTRIGOUT[5] ,Set CTTRIGOUT output 5" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " CTTRIGOUT[4] ,Set CTTRIGOUT output 4" "No effect,Set"
|
|
bitfld.long 0x0c 3. " CTTRIGOUT[3] ,Set CTTRIGOUT output 3" "No effect,Set"
|
|
bitfld.long 0x0c 2. " CTTRIGOUT[2] ,Set CTTRIGOUT output 2" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " CTTRIGOUT[1] ,Set CTTRIGOUT output 1" "No effect,Set"
|
|
bitfld.long 0x0c 0. " CTTRIGOUT[0] ,Set CTTRIGOUT output 0" "No effect,Set"
|
|
rgroup.long 0xeec++0x0f
|
|
line.long 0x00 "ITCHOUTACK,ITCHOUTACK Register"
|
|
bitfld.long 0x00 3. " CTCHOUTACK[3] ,Value of CTCHOUTACK input 3" "Low,High"
|
|
bitfld.long 0x00 2. " CTCHOUTACK[2] ,Value of CTCHOUTACK input 2" "Low,High"
|
|
bitfld.long 0x00 1. " CTCHOUTACK[1] ,Value of CTCHOUTACK input 1" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTCHINACK[0] ,Value of CTCHINACK input 0" "Low,High"
|
|
line.long 0x04 "ITTRIGOUTACK,ITTRIGOUTACK Register"
|
|
bitfld.long 0x04 7. " CTTRIGOUTACK[7] ,Value of CTTRIGOUTACK input 7" "Low,High"
|
|
bitfld.long 0x04 6. " CTTRIGOUTACK[6] ,Value of CTTRIGOUTACK input 6" "Low,High"
|
|
bitfld.long 0x04 5. " CTTRIGOUTACK[5] ,Value of CTTRIGOUTACK input 5" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 4. " CTTRIGOUTACK[4] ,Value of CTTRIGOUTACK input 4" "Low,High"
|
|
bitfld.long 0x04 3. " CTTRIGOUTACK[3] ,Value of CTTRIGOUTACK input 3" "Low,High"
|
|
bitfld.long 0x04 2. " CTTRIGOUTACK[2] ,Value of CTTRIGOUTACK input 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CTTRIGOUTACK[1] ,Value of CTTRIGOUTACK input 1" "Low,High"
|
|
bitfld.long 0x04 0. " CTTRIGOUTACK[0] ,Value of CTTRIGOUTACK input 0" "Low,High"
|
|
line.long 0x08 "ITCHIN,ITCHIN Register"
|
|
bitfld.long 0x08 3. " CTCHIN[3] ,Value of CTCHIN input 3" "Low,High"
|
|
bitfld.long 0x08 2. " CTCHIN[2] ,Value of CTCHIN input 2" "Low,High"
|
|
bitfld.long 0x08 1. " CTCHIN[1] ,Value of CTCHIN input 1" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 0. " CTCHIN[0] ,Value of CTCHIN input 0" "Low,High"
|
|
line.long 0x0c "ITTRIGIN,ITTRIGIN Register"
|
|
bitfld.long 0x0c 7. " CTTRIGIN[7] ,Value of CTTRIGIN input 7" "Low,High"
|
|
bitfld.long 0x0c 6. " CTTRIGIN[6] ,Value of CTTRIGIN input 6" "Low,High"
|
|
bitfld.long 0x0c 5. " CTTRIGIN[5] ,Value of CTTRIGIN input 5" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " CTTRIGIN[4] ,Value of CTTRIGIN input" "Low,High"
|
|
bitfld.long 0x0c 3. " CTTRIGIN[3] ,Value of CTTRIGIN input" "Low,High"
|
|
bitfld.long 0x0c 2. " CTTRIGIN[2] ,Value of CTTRIGIN input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " CTTRIGIN[1] ,Value of CTTRIGIN input 1" "Low,High"
|
|
bitfld.long 0x0c 0. " CTTRIGIN[0] ,Value of CTTRIGIN input 0" "Low,High"
|
|
width 18.
|
|
group.long 0xf00++0x03
|
|
line.long 0x00 "ITCTRL,IT Control Register"
|
|
bitfld.long 0x00 0. " ITEN ,Enable IT Registers" "Disabled,Enabled"
|
|
group.long 0xfa0++0x07
|
|
line.long 0x00 "CTSR,Claim Tag Set Register"
|
|
bitfld.long 0x00 0.--3. " CTS ,Claim Tag Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "CTCR,Claim Tag Clear Register"
|
|
bitfld.long 0x04 0.--3. " CTC ,Claim Tag Clear" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0xfb0++0x03
|
|
line.long 0x00 "LOCK_ACCESS,Lock Access Register"
|
|
rgroup.long 0xfb4++0x07
|
|
line.long 0x00 "LSR,Lock Status Register"
|
|
bitfld.long 0x00 0.--2. " LS ,Lock Status" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "ASR,Authentication Status Register"
|
|
bitfld.long 0x04 3. " NIDEN ,Current value of noninvasive debug enable signals" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " NIDEN_CTL ,Non-invasive debug controlled" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " IDEN ,Current value of invasive debug enable signals" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " IDEN_CTL ,Invasive debug controlled" "Disabled,Enabled"
|
|
rgroup.long 0xfc8++0x37
|
|
line.long 0x00 "DEVID,Device ID"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " DEVID ,Device ID"
|
|
line.long 0x04 "DTIR,Device Type Identifier Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DTI ,Device Type Identifier"
|
|
line.long 0x08 "PERIPHID4,Peripheral ID4"
|
|
hexmask.long.byte 0x08 0.--7. 1. " PERIPHID4 ,Peripheral ID4"
|
|
line.long 0x0c "PERIPHID5,Peripheral ID5"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " PERIPHID5 ,Peripheral ID5"
|
|
line.long 0x10 "PERIPHID6,Peripheral ID6"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PERIPHID6 ,Peripheral ID6"
|
|
line.long 0x14 "PERIPHID7,Peripheral ID7"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PERIPHID7 ,Peripheral ID7"
|
|
line.long 0x18 "PERIPHID0,Peripheral ID0"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PERIPHID0 ,Peripheral ID0"
|
|
line.long 0x1c "PERIPHID1,Peripheral ID1"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " PERIPHID1 ,Peripheral ID1"
|
|
line.long 0x20 "PERIPHID2,Peripheral ID2"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PERIPHID2 ,Peripheral ID2"
|
|
line.long 0x24 "PERIPHID3,Peripheral ID3"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PERIPHID3 ,Peripheral ID3"
|
|
line.long 0x28 "COMPID0,Component ID0"
|
|
hexmask.long.byte 0x28 0.--7. 1. " COMPID0 ,Component ID0"
|
|
line.long 0x2c "COMPID1,Component ID1"
|
|
hexmask.long.byte 0x2c 0.--7. 1. " COMPID1 ,Component ID1"
|
|
line.long 0x30 "COMPID2,Component ID2"
|
|
hexmask.long.byte 0x30 0.--7. 1. " COMPID2 ,Component ID2"
|
|
line.long 0x34 "COMPID3,Component ID3"
|
|
hexmask.long.byte 0x34 0.--7. 1. " COMPID3 ,Component ID3"
|
|
width 12.
|
|
tree.end
|
|
tree "DEBUG_CTI_FTM"
|
|
base ad:0xF8809000
|
|
width 18.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTICONTROL,CTI Control Register"
|
|
bitfld.long 0x00 0. " GLBEN ,Enables or disables the ECT" "Disabled,Enabled"
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "CTIINTACK,CTI Interrupt Acknowledge Register"
|
|
bitfld.long 0x00 7. " INTACK[7] ,CTITRIGOUT[7] output Acknowledge" "No effect,Acknowledged"
|
|
bitfld.long 0x00 6. " INTACK[6] ,CTITRIGOUT[6] output Acknowledge" "No effect,Acknowledged"
|
|
bitfld.long 0x00 5. " INTACK[5] ,CTITRIGOUT[5] output Acknowledge" "No effect,Acknowledged"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INTACK[4] ,CTITRIGOUT[4] output Acknowledge" "No effect,Acknowledged"
|
|
bitfld.long 0x00 3. " INTACK[3] ,CTITRIGOUT[3] output Acknowledge" "No effect,Acknowledged"
|
|
bitfld.long 0x00 2. " INTACK[2] ,CTITRIGOUT[2] output Acknowledge" "No effect,Acknowledged"
|
|
textline " "
|
|
bitfld.long 0x00 1. " INTACK[1] ,CTITRIGOUT[1] output Acknowledge" "No effect,Acknowledged"
|
|
bitfld.long 0x00 0. " INTACK[0] ,CTITRIGOUT[0] output Acknowledge" "No effect,Acknowledged"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CTIAPPSET,CTI Application Trigger Set Register"
|
|
bitfld.long 0x00 3. " APPSET[3] ,Channel 3 trigger state" "Inactive,Active"
|
|
bitfld.long 0x00 2. " APPSET[2] ,Channel 2 trigger state" "Inactive,Active"
|
|
bitfld.long 0x00 1. " APPSET[1] ,Channel 1 trigger state" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 0. " APPSET[0] ,Channel 0 trigger state" "Inactive,Active"
|
|
wgroup.long 0x18++0x07
|
|
line.long 0x00 "CTIAPPCLEAR,CTI Application Trigger Clear Register"
|
|
bitfld.long 0x00 3. " APPCLEAR[3] ,Channel 3 trigger state" "No effect,Clear"
|
|
bitfld.long 0x00 2. " APPCLEAR[2] ,Channel 2 trigger state" "No effect,Clear"
|
|
bitfld.long 0x00 1. " APPCLEAR[1] ,Channel 1 trigger state" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " APPCLEAR[0] ,Channel 0 trigger state" "No effect,Clear"
|
|
line.long 0x04 "CTIAPPPULSE,CTI Application Pulse Register"
|
|
bitfld.long 0x04 3. " APPULSE[3] ,Channel 3 Pulse Event" "No effect,Generate"
|
|
bitfld.long 0x04 2. " APPULSE[2] ,Channel 2 Pulse Event" "No effect,Generate"
|
|
bitfld.long 0x04 1. " APPULSE[1] ,Channel 1 Pulse Event" "No effect,Generate"
|
|
textline " "
|
|
bitfld.long 0x04 0. " APPULSE[0] ,Channel 0 Pulse Event" "No effect,Generate"
|
|
group.long 0x20++0x1f
|
|
line.long 0x0 "CTIINEN0,CTI Trigger to Channel Enable 0 Register"
|
|
bitfld.long 0x0 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x4 "CTIINEN1,CTI Trigger to Channel Enable 1 Register"
|
|
bitfld.long 0x4 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x4 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x4 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x8 "CTIINEN2,CTI Trigger to Channel Enable 2 Register"
|
|
bitfld.long 0x8 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x8 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x8 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0xC "CTIINEN3,CTI Trigger to Channel Enable 3 Register"
|
|
bitfld.long 0xC 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0xC 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0xC 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x10 "CTIINEN4,CTI Trigger to Channel Enable 4 Register"
|
|
bitfld.long 0x10 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x14 "CTIINEN5,CTI Trigger to Channel Enable 5 Register"
|
|
bitfld.long 0x14 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x14 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x18 "CTIINEN6,CTI Trigger to Channel Enable 6 Register"
|
|
bitfld.long 0x18 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x18 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x18 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
line.long 0x1C "CTIINEN7,CTI Trigger to Channel Enable 7 Register"
|
|
bitfld.long 0x1C 3. " TRIGINEN[3] ,Channel 3 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x1C 2. " TRIGINEN[2] ,Channel 2 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
bitfld.long 0x1C 1. " TRIGINEN[1] ,Channel 1 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 0. " TRIGINEN[0] ,Channel 0 cross trigger event enable when an CTITRIGIN is activated" "Disabled,Enabled"
|
|
group.long 0xa0++0x1f
|
|
line.long 0x0 "CTIOUTEN0,CTI Channel to Trigger Enable 0 Register"
|
|
bitfld.long 0x0 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x4 "CTIOUTEN1,CTI Channel to Trigger Enable 1 Register"
|
|
bitfld.long 0x4 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x4 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x4 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x8 "CTIOUTEN2,CTI Channel to Trigger Enable 2 Register"
|
|
bitfld.long 0x8 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x8 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x8 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0xC "CTIOUTEN3,CTI Channel to Trigger Enable 3 Register"
|
|
bitfld.long 0xC 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0xC 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0xC 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x10 "CTIOUTEN4,CTI Channel to Trigger Enable 4 Register"
|
|
bitfld.long 0x10 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x14 "CTIOUTEN5,CTI Channel to Trigger Enable 5 Register"
|
|
bitfld.long 0x14 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x14 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x18 "CTIOUTEN6,CTI Channel to Trigger Enable 6 Register"
|
|
bitfld.long 0x18 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x18 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x18 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
line.long 0x1C "CTIOUTEN7,CTI Channel to Trigger Enable 7 Register"
|
|
bitfld.long 0x1C 3. " TRIGOUTEN[3] ,Channel 3 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x1C 2. " TRIGOUTEN[2] ,Channel 2 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
bitfld.long 0x1C 1. " TRIGOUTEN[1] ,Channel 1 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 0. " TRIGOUTEN[0] ,Channel 0 cross trigger event enable generating an CTITRIGOUT output" "Disabled,Enabled"
|
|
rgroup.long 0x130++0x0f
|
|
line.long 0x00 "CTITRIGINSTATUS,CTI Trigger In Status Register"
|
|
bitfld.long 0x00 7. " TRIGINSTATUS[7] ,Status of the CTITRIGIN input 7" "Not active,Active"
|
|
bitfld.long 0x00 6. " TRIGINSTATUS[6] ,Status of the CTITRIGIN input 6" "Not active,Active"
|
|
bitfld.long 0x00 5. " TRIGINSTATUS[5] ,Status of the CTITRIGIN input 5" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TRIGINSTATUS[4] ,Status of the CTITRIGIN input 4" "Not active,Active"
|
|
bitfld.long 0x00 3. " TRIGINSTATUS[3] ,Status of the CTITRIGIN input 3" "Not active,Active"
|
|
bitfld.long 0x00 2. " TRIGINSTATUS[2] ,Status of the CTITRIGIN input 2" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TRIGINSTATUS[1] ,Status of the CTITRIGIN input 1" "Not active,Active"
|
|
bitfld.long 0x00 0. " TRIGINSTATUS[0] ,Status of the CTITRIGIN input 0" "Not active,Active"
|
|
line.long 0x04 "CTITRIGOUTSTATUS,CTI Trigger Out Status Register"
|
|
bitfld.long 0x04 7. " TRIGOUTSTATUS[7] ,Status of the CTITRIGOUT output 7" "Not active,Active"
|
|
bitfld.long 0x04 6. " TRIGOUTSTATUS[6] ,Status of the CTITRIGOUT output 6" "Not active,Active"
|
|
bitfld.long 0x04 5. " TRIGOUTSTATUS[5] ,Status of the CTITRIGOUT output 5" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 4. " TRIGOUTSTATUS[4] ,Status of the CTITRIGOUT output 4" "Not active,Active"
|
|
bitfld.long 0x04 3. " TRIGOUTSTATUS[3] ,Status of the CTITRIGOUT output 3" "Not active,Active"
|
|
bitfld.long 0x04 2. " TRIGOUTSTATUS[2] ,Status of the CTITRIGOUT output 2" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " TRIGOUTSTATUS[1] ,Status of the CTITRIGOUT output 1" "Not active,Active"
|
|
bitfld.long 0x04 0. " TRIGOUTSTATUS[0] ,Status of the CTITRIGOUT output 0" "Not active,Active"
|
|
line.long 0x08 "CTICHINSTATUS,CTI Channel In Status Register"
|
|
bitfld.long 0x08 3. " CTCHINSTATUS[3] ,Status of the CTICHIN input 3" "Not active,Active"
|
|
bitfld.long 0x08 2. " CTCHINSTATUS[2] ,Status of the CTICHIN input 2" "Not active,Active"
|
|
bitfld.long 0x08 1. " CTCHINSTATUS[1] ,Status of the CTICHIN input 1" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 0. " CTCHINSTATUS[0] ,Status of the CTICHIN input 0" "Not active,Active"
|
|
line.long 0x0c "CTICHOUTSTATUS,CTI Channel Out Status Register"
|
|
bitfld.long 0x0c 3. " CTCHOUTSTATUS[3] ,Status of the CTICHOUT output 3" "Not active,Active"
|
|
bitfld.long 0x0c 2. " CTCHOUTSTATUS[2] ,Status of the CTICHOUT output 2" "Not active,Active"
|
|
bitfld.long 0x0c 1. " CTCHOUTSTATUS[1] ,Status of the CTICHOUT output 1" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 0. " CTCHOUTSTATUS[0] ,Status of the CTICHOUT output 0" "Not active,Active"
|
|
group.long 0x140++0x07
|
|
line.long 0x00 "CTIGATE,Enable CTI Channel Gate Register"
|
|
bitfld.long 0x00 3. " CTIGATEEN3 ,Enable CTICHOUT3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CTIGATEEN2 ,Enable CTICHOUT2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " CTIGATEEN1 ,Enable CTICHOUT1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTIGATEEN0 ,Enable CTICHOUT0" "Disabled,Enabled"
|
|
line.long 0x04 "ASICCTL,External Multiplexor Control Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ASICCTL ,Output of ASICCTL[7:0]"
|
|
wgroup.long 0xedc++0x0f
|
|
line.long 0x00 "ITCHINACK,ITCHINACK Register"
|
|
bitfld.long 0x00 3. " CTCHINACK[3] ,Set CTCHINACK output 3" "No effect,Set"
|
|
bitfld.long 0x00 2. " CTCHINACK[2] ,Set CTCHINACK output 2" "No effect,Set"
|
|
bitfld.long 0x00 1. " CTCHINACK[1] ,Set CTCHINACK output 1" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTCHINACK[0] ,Set CTCHINACK output 0" "No effect,Set"
|
|
line.long 0x04 "ITTRIGINACK,ITTRIGINACK Register"
|
|
bitfld.long 0x04 7. " CTTRIGINACK[7] ,Set CTTRIGINACK output 7" "No effect,Set"
|
|
bitfld.long 0x04 6. " CTTRIGINACK[6] ,Set CTTRIGINACK output 6" "No effect,Set"
|
|
bitfld.long 0x04 5. " CTTRIGINACK[5] ,Set CTTRIGINACK output 5" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x04 4. " CTTRIGINACK[4] ,Set CTTRIGINACK output 4" "No effect,Set"
|
|
bitfld.long 0x04 3. " CTTRIGINACK[3] ,Set CTTRIGINACK output 3" "No effect,Set"
|
|
bitfld.long 0x04 2. " CTTRIGINACK[2] ,Set CTTRIGINACK output 2" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CTTRIGINACK[1] ,Set CTTRIGINACK output 1" "No effect,Set"
|
|
bitfld.long 0x04 0. " CTTRIGINACK[0] ,Set CTTRIGINACK output 0" "No effect,Set"
|
|
line.long 0x08 "ITCHOUT,ITCHOUT Register"
|
|
bitfld.long 0x08 3. " CTCHOUT[3] ,Set CTCHOUT output 3" "No effect,Set"
|
|
bitfld.long 0x08 2. " CTCHOUT[2] ,Set CTCHOUT output 2" "No effect,Set"
|
|
bitfld.long 0x08 1. " CTCHOUT[1] ,Set CTCHOUT output 1" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x08 0. " CTCHOUT[0] ,Set CTCHOUT output 0" "No effect,Set"
|
|
line.long 0x0c "ITTRIGOUT,ITTRIGOUT Register"
|
|
bitfld.long 0x0c 7. " CTTRIGOUT[7] ,Set CTTRIGOUT output 7" "No effect,Set"
|
|
bitfld.long 0x0c 6. " CTTRIGOUT[6] ,Set CTTRIGOUT output 6" "No effect,Set"
|
|
bitfld.long 0x0c 5. " CTTRIGOUT[5] ,Set CTTRIGOUT output 5" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " CTTRIGOUT[4] ,Set CTTRIGOUT output 4" "No effect,Set"
|
|
bitfld.long 0x0c 3. " CTTRIGOUT[3] ,Set CTTRIGOUT output 3" "No effect,Set"
|
|
bitfld.long 0x0c 2. " CTTRIGOUT[2] ,Set CTTRIGOUT output 2" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " CTTRIGOUT[1] ,Set CTTRIGOUT output 1" "No effect,Set"
|
|
bitfld.long 0x0c 0. " CTTRIGOUT[0] ,Set CTTRIGOUT output 0" "No effect,Set"
|
|
rgroup.long 0xeec++0x0f
|
|
line.long 0x00 "ITCHOUTACK,ITCHOUTACK Register"
|
|
bitfld.long 0x00 3. " CTCHOUTACK[3] ,Value of CTCHOUTACK input 3" "Low,High"
|
|
bitfld.long 0x00 2. " CTCHOUTACK[2] ,Value of CTCHOUTACK input 2" "Low,High"
|
|
bitfld.long 0x00 1. " CTCHOUTACK[1] ,Value of CTCHOUTACK input 1" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTCHINACK[0] ,Value of CTCHINACK input 0" "Low,High"
|
|
line.long 0x04 "ITTRIGOUTACK,ITTRIGOUTACK Register"
|
|
bitfld.long 0x04 7. " CTTRIGOUTACK[7] ,Value of CTTRIGOUTACK input 7" "Low,High"
|
|
bitfld.long 0x04 6. " CTTRIGOUTACK[6] ,Value of CTTRIGOUTACK input 6" "Low,High"
|
|
bitfld.long 0x04 5. " CTTRIGOUTACK[5] ,Value of CTTRIGOUTACK input 5" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 4. " CTTRIGOUTACK[4] ,Value of CTTRIGOUTACK input 4" "Low,High"
|
|
bitfld.long 0x04 3. " CTTRIGOUTACK[3] ,Value of CTTRIGOUTACK input 3" "Low,High"
|
|
bitfld.long 0x04 2. " CTTRIGOUTACK[2] ,Value of CTTRIGOUTACK input 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CTTRIGOUTACK[1] ,Value of CTTRIGOUTACK input 1" "Low,High"
|
|
bitfld.long 0x04 0. " CTTRIGOUTACK[0] ,Value of CTTRIGOUTACK input 0" "Low,High"
|
|
line.long 0x08 "ITCHIN,ITCHIN Register"
|
|
bitfld.long 0x08 3. " CTCHIN[3] ,Value of CTCHIN input 3" "Low,High"
|
|
bitfld.long 0x08 2. " CTCHIN[2] ,Value of CTCHIN input 2" "Low,High"
|
|
bitfld.long 0x08 1. " CTCHIN[1] ,Value of CTCHIN input 1" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 0. " CTCHIN[0] ,Value of CTCHIN input 0" "Low,High"
|
|
line.long 0x0c "ITTRIGIN,ITTRIGIN Register"
|
|
bitfld.long 0x0c 7. " CTTRIGIN[7] ,Value of CTTRIGIN input 7" "Low,High"
|
|
bitfld.long 0x0c 6. " CTTRIGIN[6] ,Value of CTTRIGIN input 6" "Low,High"
|
|
bitfld.long 0x0c 5. " CTTRIGIN[5] ,Value of CTTRIGIN input 5" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " CTTRIGIN[4] ,Value of CTTRIGIN input" "Low,High"
|
|
bitfld.long 0x0c 3. " CTTRIGIN[3] ,Value of CTTRIGIN input" "Low,High"
|
|
bitfld.long 0x0c 2. " CTTRIGIN[2] ,Value of CTTRIGIN input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " CTTRIGIN[1] ,Value of CTTRIGIN input 1" "Low,High"
|
|
bitfld.long 0x0c 0. " CTTRIGIN[0] ,Value of CTTRIGIN input 0" "Low,High"
|
|
width 18.
|
|
group.long 0xf00++0x03
|
|
line.long 0x00 "ITCTRL,IT Control Register"
|
|
bitfld.long 0x00 0. " ITEN ,Enable IT Registers" "Disabled,Enabled"
|
|
group.long 0xfa0++0x07
|
|
line.long 0x00 "CTSR,Claim Tag Set Register"
|
|
bitfld.long 0x00 0.--3. " CTS ,Claim Tag Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "CTCR,Claim Tag Clear Register"
|
|
bitfld.long 0x04 0.--3. " CTC ,Claim Tag Clear" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0xfb0++0x03
|
|
line.long 0x00 "LOCK_ACCESS,Lock Access Register"
|
|
rgroup.long 0xfb4++0x07
|
|
line.long 0x00 "LSR,Lock Status Register"
|
|
bitfld.long 0x00 0.--2. " LS ,Lock Status" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "ASR,Authentication Status Register"
|
|
bitfld.long 0x04 3. " NIDEN ,Current value of noninvasive debug enable signals" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " NIDEN_CTL ,Non-invasive debug controlled" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " IDEN ,Current value of invasive debug enable signals" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " IDEN_CTL ,Invasive debug controlled" "Disabled,Enabled"
|
|
rgroup.long 0xfc8++0x37
|
|
line.long 0x00 "DEVID,Device ID"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " DEVID ,Device ID"
|
|
line.long 0x04 "DTIR,Device Type Identifier Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DTI ,Device Type Identifier"
|
|
line.long 0x08 "PERIPHID4,Peripheral ID4"
|
|
hexmask.long.byte 0x08 0.--7. 1. " PERIPHID4 ,Peripheral ID4"
|
|
line.long 0x0c "PERIPHID5,Peripheral ID5"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " PERIPHID5 ,Peripheral ID5"
|
|
line.long 0x10 "PERIPHID6,Peripheral ID6"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PERIPHID6 ,Peripheral ID6"
|
|
line.long 0x14 "PERIPHID7,Peripheral ID7"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PERIPHID7 ,Peripheral ID7"
|
|
line.long 0x18 "PERIPHID0,Peripheral ID0"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PERIPHID0 ,Peripheral ID0"
|
|
line.long 0x1c "PERIPHID1,Peripheral ID1"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " PERIPHID1 ,Peripheral ID1"
|
|
line.long 0x20 "PERIPHID2,Peripheral ID2"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PERIPHID2 ,Peripheral ID2"
|
|
line.long 0x24 "PERIPHID3,Peripheral ID3"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PERIPHID3 ,Peripheral ID3"
|
|
line.long 0x28 "COMPID0,Component ID0"
|
|
hexmask.long.byte 0x28 0.--7. 1. " COMPID0 ,Component ID0"
|
|
line.long 0x2c "COMPID1,Component ID1"
|
|
hexmask.long.byte 0x2c 0.--7. 1. " COMPID1 ,Component ID1"
|
|
line.long 0x30 "COMPID2,Component ID2"
|
|
hexmask.long.byte 0x30 0.--7. 1. " COMPID2 ,Component ID2"
|
|
line.long 0x34 "COMPID3,Component ID3"
|
|
hexmask.long.byte 0x34 0.--7. 1. " COMPID3 ,Component ID3"
|
|
width 12.
|
|
tree.end
|
|
tree.end
|
|
tree.open "Cortex A9 Performance Monitoring Unit"
|
|
tree "DEBUG_CPU_PMU0"
|
|
base ad:0xF8891000
|
|
width 13.
|
|
group.long 0x00++0x17
|
|
line.long 0x00 "PMXEVCNTR0,PMU event counter 0"
|
|
line.long 0x04 "PMXEVCNTR1,PMU event counter 1"
|
|
line.long 0x08 "PMXEVCNTR2,PMU event counter 2"
|
|
line.long 0x0c "PMXEVCNTR3,PMU event counter 3"
|
|
line.long 0x10 "PMXEVCNTR4,PMU event counter 4"
|
|
line.long 0x14 "PMXEVCNTR5,PMU event counter 5"
|
|
group.long 0x7c++0x03
|
|
line.long 0x00 "PMCCNTR,pmccntr"
|
|
group.long 0x400++0x17
|
|
line.long 0x00 "PMXEVTYPER0,pmevtyper0"
|
|
line.long 0x04 "PMXEVTYPER1,pmevtyper1"
|
|
line.long 0x08 "PMXEVTYPER2,pmevtyper2"
|
|
line.long 0x0c "PMXEVTYPER3,pmevtyper3"
|
|
line.long 0x10 "PMXEVTYPER4,pmevtyper4"
|
|
line.long 0x14 "PMXEVTYPER5,pmevtyper5"
|
|
group.long 0xc00++0x03
|
|
line.long 0x00 "PMCNTENSET,pmcntenset"
|
|
group.long 0xc20++0x03
|
|
line.long 0x00 "PMCNTENCLR,pmcntenclr"
|
|
group.long 0xc40++0x03
|
|
line.long 0x00 "PMINTENSET,pmintenset"
|
|
group.long 0xc60++0x03
|
|
line.long 0x00 "PMINTENCLR,pmintenclr"
|
|
group.long 0xc80++0x03
|
|
line.long 0x00 "PMOVSR,pmovsr"
|
|
wgroup.long 0xca0++0x03
|
|
line.long 0x00 "PMSWINC,pmswinc"
|
|
group.long 0xe04++0x07
|
|
line.long 0x00 "PMCR,pmcr"
|
|
line.long 0x04 "PMUSERENR,pmuserenr"
|
|
width 12.
|
|
tree.end
|
|
tree "DEBUG_CPU_PMU1"
|
|
base ad:0xF8893000
|
|
width 13.
|
|
group.long 0x00++0x17
|
|
line.long 0x00 "PMXEVCNTR0,PMU event counter 0"
|
|
line.long 0x04 "PMXEVCNTR1,PMU event counter 1"
|
|
line.long 0x08 "PMXEVCNTR2,PMU event counter 2"
|
|
line.long 0x0c "PMXEVCNTR3,PMU event counter 3"
|
|
line.long 0x10 "PMXEVCNTR4,PMU event counter 4"
|
|
line.long 0x14 "PMXEVCNTR5,PMU event counter 5"
|
|
group.long 0x7c++0x03
|
|
line.long 0x00 "PMCCNTR,pmccntr"
|
|
group.long 0x400++0x17
|
|
line.long 0x00 "PMXEVTYPER0,pmevtyper0"
|
|
line.long 0x04 "PMXEVTYPER1,pmevtyper1"
|
|
line.long 0x08 "PMXEVTYPER2,pmevtyper2"
|
|
line.long 0x0c "PMXEVTYPER3,pmevtyper3"
|
|
line.long 0x10 "PMXEVTYPER4,pmevtyper4"
|
|
line.long 0x14 "PMXEVTYPER5,pmevtyper5"
|
|
group.long 0xc00++0x03
|
|
line.long 0x00 "PMCNTENSET,pmcntenset"
|
|
group.long 0xc20++0x03
|
|
line.long 0x00 "PMCNTENCLR,pmcntenclr"
|
|
group.long 0xc40++0x03
|
|
line.long 0x00 "PMINTENSET,pmintenset"
|
|
group.long 0xc60++0x03
|
|
line.long 0x00 "PMINTENCLR,pmintenclr"
|
|
group.long 0xc80++0x03
|
|
line.long 0x00 "PMOVSR,pmovsr"
|
|
wgroup.long 0xca0++0x03
|
|
line.long 0x00 "PMSWINC,pmswinc"
|
|
group.long 0xe04++0x07
|
|
line.long 0x00 "PMCR,pmcr"
|
|
line.long 0x04 "PMUSERENR,pmuserenr"
|
|
width 12.
|
|
tree.end
|
|
tree.end
|
|
tree.open "CoreSight PTM-A9"
|
|
tree "DEBUG_CPU_PTM0"
|
|
base ad:0xF889C000
|
|
width 15.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ETMCR,Main Control Register"
|
|
bitfld.long 0x00 29. " RETURNSTACKEN ,Return stack enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TIMESTAMPEN ,Timestamp enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25.--27. " PROCSELECT ,External multiplexor select" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " CONTEXIDSIZE ,Context ID Size" "None,8 bit,16 bit,32 bit"
|
|
bitfld.long 0x00 12. " CYCLEACCURATE ,Enables cycle counting" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " PROGBIT ,Programmed Status" "Not programmed,Programmed"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DEBUGREQCTRL ,Debug Request Control" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " BRANCHOUTPUT ,Branch output" "Not all,All"
|
|
bitfld.long 0x00 0. " POWERDOWN ,External control of the PTM enable" "Disabled,Enabled"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ETMCCR,Configuration Code Register"
|
|
bitfld.long 0x00 31. " IDREGPRESENT ,ID Register present" "Not present,Present"
|
|
bitfld.long 0x00 27. " SOFTWAREACCESS ,Software access support" "Not supported,Supported"
|
|
bitfld.long 0x00 26. " TRACESSB ,trace start/stop block present" "Not present,Present"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " NUMCNTXTIDCOMP ,Number of Context ID comparators" "0,1,2,3"
|
|
bitfld.long 0x00 23. " FIFOFULLLOGIC ,Stall the processor to prevent FIFO overflow" "Not possible,Possible"
|
|
bitfld.long 0x00 20.--22. " NUMEXTOUT ,Number of external outputs" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " NUMEXTIN ,Number of external inputs" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16. " SEQUENCER ,Sequencer present" "Not present,Present"
|
|
bitfld.long 0x00 13.--15. " NUMCOUNTERS ,Number of counters" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " NUMADDRCOMP ,Number of address comparator pairs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "ETMTRIGGER,Trigger Event Register"
|
|
bitfld.long 0x00 14.--16. " TRIGEVENT[16:14] ,Function that combines the two resources that define the event" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 7.--13. 1. " TRIGEVENT[13:7] ,Resource B"
|
|
hexmask.long.byte 0x00 0.--6. 1. " TRIGEVENT[6:0] ,Resource A"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "ETMSR,Status Register"
|
|
bitfld.long 0x00 3. " TRIGFLAG ,Trigger status" "No trigger,Trigger"
|
|
bitfld.long 0x00 2. " TSSRSTAT ,Current status of the trace start/stop resource" "Stoped,Started"
|
|
bitfld.long 0x00 1. " PROGBIT ,State of the Programming bit" "Not programming,Programming"
|
|
textline " "
|
|
bitfld.long 0x00 0. " OVERFLOW ,Overflow status" "No overflow,Overflow"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "ETMSCR,System Configuration Register"
|
|
bitfld.long 0x00 12.--14. " NUMPROCS ,Number of supported processors" "0,1,2,3,4,5,6,7"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "ETMTSSCR,TraceEnable Start/Stop Control Register"
|
|
bitfld.long 0x00 23. " STOPADDRSEL[7] ,Single address comparator 8 as stop address" "Not selected,Selected"
|
|
bitfld.long 0x00 22. " STOPADDRSEL[6] ,Single address comparator 7 as stop address" "Not selected,Selected"
|
|
bitfld.long 0x00 21. " STOPADDRSEL[5] ,Single address comparator 6 as stop address" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 20. " STOPADDRSEL[4] ,Single address comparator 5 as stop address" "Not selected,Selected"
|
|
bitfld.long 0x00 19. " STOPADDRSEL[3] ,Single address comparator 4 as stop address" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " STOPADDRSEL[2] ,Single address comparator 3 as stop address" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " STOPADDRSEL[1] ,Single address comparator 2 as stop address" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " STOPADDRSEL[0] ,Single address comparator 1 as stop address" "Not selected,Selected"
|
|
bitfld.long 0x00 7. " STARTADDRSEL[7] ,Single address comparator 8 as start address" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " STARTADDRSEL[6] ,Single address comparator 7 as start address" "Not selected,Selected"
|
|
bitfld.long 0x00 5. " STARTADDRSEL[5] ,Single address comparator 6 as start address" "Not selected,Selected"
|
|
bitfld.long 0x00 4. " STARTADDRSEL[4] ,Single address comparator 5 as start address" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STARTADDRSEL[3] ,Single address comparator 4 as start address" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " STARTADDRSEL[2] ,Single address comparator 3 as start address" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " STARTADDRSEL[1] ,Single address comparator 2 as start address" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STARTADDRSEL[0] ,Single address comparator 1 as start address" "Not selected,Selected"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "ETMTECR1,TraceEnable Control Register 1"
|
|
bitfld.long 0x00 25. " TRACESSEN ,Trace start/stop control enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " EXCINCFLAG ,Exclude/include flag" "Include,Exclude"
|
|
bitfld.long 0x00 3. " ADDRCOMPSEL[3] ,Address range comparator 4 select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ADDRCOMPSEL[2] ,Address range comparator 3 select" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " ADDRCOMPSEL[1] ,Address range comparator 2 select" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " ADDRCOMPSEL[0] ,Address range comparator 1 select" "Not selected,Selected"
|
|
group.long 0x40++0x1f
|
|
line.long 0x0 "ETMACVR1,Address Comparator Value Register 1"
|
|
line.long 0x4 "ETMACVR2,Address Comparator Value Register 2"
|
|
line.long 0x8 "ETMACVR3,Address Comparator Value Register 3"
|
|
line.long 0xC "ETMACVR4,Address Comparator Value Register 4"
|
|
line.long 0x10 "ETMACVR5,Address Comparator Value Register 5"
|
|
line.long 0x14 "ETMACVR6,Address Comparator Value Register 6"
|
|
line.long 0x18 "ETMACVR7,Address Comparator Value Register 7"
|
|
line.long 0x1C "ETMACVR8,Address Comparator Value Register 8"
|
|
group.long 0x80++0x1f
|
|
line.long 0x0 "ETMACTR1,Address Comparator Access Type Register 1"
|
|
bitfld.long 0x0 10.--11. " SECLEVELCTRL ,Security level control" "Ignore,Nonsec,Secure,?..."
|
|
bitfld.long 0x0 8.--9. " CONTEXTIDCOMPCTRL ,Context ID comparator control" "Ignore,Match1,Match2,Match3"
|
|
bitfld.long 0x0 0.--2. " ACCESSTYPE ,Access type" "Reserved,Instruction execute,?..."
|
|
line.long 0x4 "ETMACTR2,Address Comparator Access Type Register 2"
|
|
bitfld.long 0x4 10.--11. " SECLEVELCTRL ,Security level control" "Ignore,Nonsec,Secure,?..."
|
|
bitfld.long 0x4 8.--9. " CONTEXTIDCOMPCTRL ,Context ID comparator control" "Ignore,Match1,Match2,Match3"
|
|
bitfld.long 0x4 0.--2. " ACCESSTYPE ,Access type" "Reserved,Instruction execute,?..."
|
|
line.long 0x8 "ETMACTR3,Address Comparator Access Type Register 3"
|
|
bitfld.long 0x8 10.--11. " SECLEVELCTRL ,Security level control" "Ignore,Nonsec,Secure,?..."
|
|
bitfld.long 0x8 8.--9. " CONTEXTIDCOMPCTRL ,Context ID comparator control" "Ignore,Match1,Match2,Match3"
|
|
bitfld.long 0x8 0.--2. " ACCESSTYPE ,Access type" "Reserved,Instruction execute,?..."
|
|
line.long 0xC "ETMACTR4,Address Comparator Access Type Register 4"
|
|
bitfld.long 0xC 10.--11. " SECLEVELCTRL ,Security level control" "Ignore,Nonsec,Secure,?..."
|
|
bitfld.long 0xC 8.--9. " CONTEXTIDCOMPCTRL ,Context ID comparator control" "Ignore,Match1,Match2,Match3"
|
|
bitfld.long 0xC 0.--2. " ACCESSTYPE ,Access type" "Reserved,Instruction execute,?..."
|
|
line.long 0x10 "ETMACTR5,Address Comparator Access Type Register 5"
|
|
bitfld.long 0x10 10.--11. " SECLEVELCTRL ,Security level control" "Ignore,Nonsec,Secure,?..."
|
|
bitfld.long 0x10 8.--9. " CONTEXTIDCOMPCTRL ,Context ID comparator control" "Ignore,Match1,Match2,Match3"
|
|
bitfld.long 0x10 0.--2. " ACCESSTYPE ,Access type" "Reserved,Instruction execute,?..."
|
|
line.long 0x14 "ETMACTR6,Address Comparator Access Type Register 6"
|
|
bitfld.long 0x14 10.--11. " SECLEVELCTRL ,Security level control" "Ignore,Nonsec,Secure,?..."
|
|
bitfld.long 0x14 8.--9. " CONTEXTIDCOMPCTRL ,Context ID comparator control" "Ignore,Match1,Match2,Match3"
|
|
bitfld.long 0x14 0.--2. " ACCESSTYPE ,Access type" "Reserved,Instruction execute,?..."
|
|
line.long 0x18 "ETMACTR7,Address Comparator Access Type Register 7"
|
|
bitfld.long 0x18 10.--11. " SECLEVELCTRL ,Security level control" "Ignore,Nonsec,Secure,?..."
|
|
bitfld.long 0x18 8.--9. " CONTEXTIDCOMPCTRL ,Context ID comparator control" "Ignore,Match1,Match2,Match3"
|
|
bitfld.long 0x18 0.--2. " ACCESSTYPE ,Access type" "Reserved,Instruction execute,?..."
|
|
line.long 0x1C "ETMACTR8,Address Comparator Access Type Register 8"
|
|
bitfld.long 0x1C 10.--11. " SECLEVELCTRL ,Security level control" "Ignore,Nonsec,Secure,?..."
|
|
bitfld.long 0x1C 8.--9. " CONTEXTIDCOMPCTRL ,Context ID comparator control" "Ignore,Match1,Match2,Match3"
|
|
bitfld.long 0x1C 0.--2. " ACCESSTYPE ,Access type" "Reserved,Instruction execute,?..."
|
|
group.long 0x140++0x07
|
|
line.long 0x00 "ETMCNTRLDVR1,Counter Reload Value Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " INITVALUE ,Counter initial value"
|
|
line.long 0x04 "ETMCNTRLDVR2,Counter Reload Value Register 2"
|
|
hexmask.long.word 0x04 0.--15. 1. " INITVALUE ,Counter initial value"
|
|
group.long 0x150++0x07
|
|
line.long 0x00 "ETMCNTENR1,Counter Enable Event Register 1"
|
|
bitfld.long 0x00 14.--16. " EXTOUTEVENT[16:14] ,Function that combines the two resources that define the event" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 7.--13. 1. " EXTOUTEVENT[13:7] ,Resource B"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EXTOUTEVENT[6:0] ,Resource A"
|
|
line.long 0x04 "ETMCNTENR2,Counter Enable Event Register 2"
|
|
bitfld.long 0x04 14.--16. " EXTOUTEVENT[16:14] ,Function that combines the two resources that define the event" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x04 7.--13. 1. " EXTOUTEVENT[13:7] ,Resource B"
|
|
hexmask.long.byte 0x04 0.--6. 1. " EXTOUTEVENT[6:0] ,Resource A"
|
|
group.long 0x160++0x07
|
|
line.long 0x00 "ETMCNTRLDEVR1,Counter Reload Event Register 1"
|
|
bitfld.long 0x00 14.--16. " CNTRELOADEVENT[16:14] ,Function that combines the two resources that define the event" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 7.--13. 1. " CNTRELOADEVENT[13:7] ,Resource B"
|
|
hexmask.long.byte 0x00 0.--6. 1. " CNTRELOADEVENT[6:0] ,Resource A"
|
|
line.long 0x04 "ETMCNTRLDEVR2,Counter Reload Event Register 2"
|
|
bitfld.long 0x04 14.--16. " CNTRELOADEVENT[16:14] ,Function that combines the two resources that define the event" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x04 7.--13. 1. " CNTRELOADEVENT[13:7] ,Resource B"
|
|
hexmask.long.byte 0x04 0.--6. 1. " CNTRELOADEVENT[6:0] ,Resource A"
|
|
group.long 0x170++0x07
|
|
line.long 0x00 "ETMCNTVR1,Counter Value Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " CURRCOUNT ,Current counter value"
|
|
line.long 0x04 "ETMCNTVR2,Counter Value Register 2"
|
|
hexmask.long.word 0x04 0.--15. 1. " CURRCOUNT ,Current counter value"
|
|
group.long 0x1e0++0x03
|
|
line.long 0x00 "ETMSYNCFR,Synchronization Frequency Register"
|
|
hexmask.long.word 0x00 2.--11. 1. " SYNCFREQ ,Synchronization frequency"
|
|
rgroup.long 0x1e4++0x07
|
|
line.long 0x00 "ETMIDR,ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ImplCode ,Implementor code"
|
|
bitfld.long 0x00 19. " SECEXTSUPP ,Security extensions support" "Not supported,Supported"
|
|
bitfld.long 0x00 18. " THUMB32SUPP ,32-bit Thumb instructions support" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " MAJORVER ,Major architecture version number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " MINORVER ,Minor architecture version number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " IMPLREV ,Implementation revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "ETMCCER,Configuration Code Extension Register"
|
|
bitfld.long 0x04 25. " BARRTS ,Timestamps generation for DMB/DSB" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " BARRWP ,DMB/DSB instructions treated as waypoints" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " RETSTACK ,Return stack" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x04 22. " TIMESTAMP ,Timestamping" "Not implemented,Implemented"
|
|
bitfld.long 0x04 13.--15. " INSTRUMRES ,Number of instrumentation resources" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 11. " REGREADS ,Registers Readable" "Not readable,Readable"
|
|
textline " "
|
|
hexmask.long.byte 0x04 3.--10. 1. " EXTINSIZE ,Size of the extended external input bus"
|
|
bitfld.long 0x04 0.--2. " EXTINSEL ,Number of extended external input selectors" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1ec++0x03
|
|
line.long 0x00 "ETMEXTINSELR,Extended External Input Selection Register"
|
|
bitfld.long 0x00 8.--13. " EXTINSEL2 ,Second extended external input selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " EXTINSEL1 ,First extended external input selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x1fc++0x07
|
|
line.long 0x00 "ETMAUXCR,Auxiliary Control Register"
|
|
bitfld.long 0x00 3. " FORCESYNCINSERT ,Force insertion of synchronization packets" "Not forced,Forced"
|
|
bitfld.long 0x00 2. " DISABLEWPUPDATE ,PTM waypoint update disable" "No,Yes"
|
|
bitfld.long 0x00 1. " DISABLETSONBARR ,PTM timestamp on a barrier instruction disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DISABLEFORCEDOF ,PTM enter in overflow state when synchronization is requested disable" "No,Yes"
|
|
line.long 0x04 "ETMTRACEIDR,CoreSight Trace ID Register"
|
|
hexmask.long.byte 0x04 0.--6. 1. " TRACEID ,Trace ID"
|
|
rgroup.long 0x304++0x03
|
|
line.long 0x00 "OSLSR,OS Lock Status Register"
|
|
rgroup.long 0x314++0x03
|
|
line.long 0x00 "ETMPDSR,Device Power-Down Status Register"
|
|
wgroup.long 0xedc++0x03
|
|
line.long 0x00 "ITMISCOUT,Miscellaneous Outputs Register"
|
|
bitfld.long 0x00 8.--9. " PTMEXTOUT ,PTMEXTOUT[1:0] output" "0,1,2,3"
|
|
bitfld.long 0x00 5. " PTMIDLEACK ,PTMIDLEACK output" "Low,High"
|
|
bitfld.long 0x00 4. " PTMDBGREQ ,PTMDBGREQ output" "Low,High"
|
|
rgroup.long 0xee0++0x03
|
|
line.long 0x00 "ITMISCIN,Miscellaneous Inputs Register"
|
|
bitfld.long 0x00 6. " STANDBYWFI ,Value of the STANDBYWFI input" "Low,High"
|
|
bitfld.long 0x00 4. " PTMDBGACK ,Value of the PTMDBGACK input" "Low,High"
|
|
bitfld.long 0x00 0.--3. " EXTIN ,Value of the EXTIN[3:0] inputs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0xee8++0x07
|
|
line.long 0x00 "ITTRIGGER,Trigger Register"
|
|
bitfld.long 0x00 0. " PTMTRIGGER ,PTMTRIGGER output" "Low,High"
|
|
line.long 0x04 "ITATBDATA0,ATB Data 0 Register"
|
|
bitfld.long 0x04 4. " ATDATAM31 ,ATDATAM[31] output" "Low,High"
|
|
bitfld.long 0x04 3. " ATDATAM23 ,ATDATAM[23] output" "Low,High"
|
|
bitfld.long 0x04 2. " ATDATAM15 ,ATDATAM[15] output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ATDATAM7 ,ATDATAM[7] output" "Low,High"
|
|
bitfld.long 0x04 0. " ATDATAM0 ,ATDATAM[0] output" "Low,High"
|
|
rgroup.long 0xef0++0x03
|
|
line.long 0x00 "ITATBCTR2,ATB Control 2 Register"
|
|
bitfld.long 0x00 1. " AFVALIDM ,Value of the AFVALIDM input" "Low,High"
|
|
bitfld.long 0x00 0. " ATREADYM ,Value of the ATREADYM input" "Low,High"
|
|
wgroup.long 0xef4++0x07
|
|
line.long 0x00 "ITATBID,ATB Identification Register"
|
|
hexmask.long.byte 0x00 0.--6. 1. " ATIDM ,ATIDM[6:0] outputs"
|
|
line.long 0x04 "ITATBCTR0,ATB Control 0 Register"
|
|
bitfld.long 0x04 8.--9. " ATBYTESM ,ATBYTESM[9:8] outputs" "0,1,2,3"
|
|
bitfld.long 0x04 1. " AFREADYM ,AFREADYM output" "Low,High"
|
|
bitfld.long 0x04 0. " ATVALIDM ,ATVALIDM output" "Low,High"
|
|
group.long 0xf00++0x03
|
|
line.long 0x00 "ETMITCTRL,Integration Mode Control Register"
|
|
bitfld.long 0x00 0. " EIT ,Enable Integration Test" "Disabled,Enabled"
|
|
group.long 0xfa0++0x07
|
|
line.long 0x00 "CTSR,Claim Tag Set Register"
|
|
bitfld.long 0x00 0.--3. " CTS ,Claim Tag Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "CTCR,Claim Tag Clear Register"
|
|
bitfld.long 0x04 0.--3. " CTC ,Claim Tag Clear" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0xfb0++0x03
|
|
line.long 0x00 "LAR,Lock Access Register"
|
|
rgroup.long 0xfb4++0x07
|
|
line.long 0x00 "LSR,Lock Status Register"
|
|
bitfld.long 0x00 0.--2. " LS ,Lock Status" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "ASR,Authentication Status Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " AS ,Authentication Status"
|
|
rgroup.long 0xfc8++0x37
|
|
line.long 0x00 "DEVID,Device ID"
|
|
line.long 0x04 "DTIR,Device Type Identifier Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DTI ,Device Type Identifier"
|
|
line.long 0x08 "PERIPHID4,Peripheral ID4"
|
|
hexmask.long.byte 0x08 0.--7. 1. " PERIPHID4 ,Peripheral ID4"
|
|
line.long 0x0c "PERIPHID5,Peripheral ID5"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " PERIPHID5 ,Peripheral ID5"
|
|
line.long 0x10 "PERIPHID6,Peripheral ID6"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PERIPHID6 ,Peripheral ID6"
|
|
line.long 0x14 "PERIPHID7,Peripheral ID7"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PERIPHID7 ,Peripheral ID7"
|
|
line.long 0x18 "PERIPHID0,Peripheral ID0"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PERIPHID0 ,Peripheral ID0"
|
|
line.long 0x1c "PERIPHID1,Peripheral ID1"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " PERIPHID1 ,Peripheral ID1"
|
|
line.long 0x20 "PERIPHID2,Peripheral ID2"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PERIPHID2 ,Peripheral ID2"
|
|
line.long 0x24 "PERIPHID3,Peripheral ID3"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PERIPHID3 ,Peripheral ID3"
|
|
line.long 0x28 "COMPID0,Component ID0"
|
|
hexmask.long.byte 0x28 0.--7. 1. " COMPID0 ,Component ID0"
|
|
line.long 0x2c "COMPID1,Component ID1"
|
|
hexmask.long.byte 0x2c 0.--7. 1. " COMPID1 ,Component ID1"
|
|
line.long 0x30 "COMPID2,Component ID2"
|
|
hexmask.long.byte 0x30 0.--7. 1. " COMPID2 ,Component ID2"
|
|
line.long 0x34 "COMPID3,Component ID3"
|
|
hexmask.long.byte 0x34 0.--7. 1. " COMPID3 ,Component ID3"
|
|
width 12.
|
|
tree.end
|
|
tree "DEBUG_CPU_PTM1"
|
|
base ad:0xF889D000
|
|
width 15.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ETMCR,Main Control Register"
|
|
bitfld.long 0x00 29. " RETURNSTACKEN ,Return stack enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TIMESTAMPEN ,Timestamp enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25.--27. " PROCSELECT ,External multiplexor select" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " CONTEXIDSIZE ,Context ID Size" "None,8 bit,16 bit,32 bit"
|
|
bitfld.long 0x00 12. " CYCLEACCURATE ,Enables cycle counting" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " PROGBIT ,Programmed Status" "Not programmed,Programmed"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DEBUGREQCTRL ,Debug Request Control" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " BRANCHOUTPUT ,Branch output" "Not all,All"
|
|
bitfld.long 0x00 0. " POWERDOWN ,External control of the PTM enable" "Disabled,Enabled"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ETMCCR,Configuration Code Register"
|
|
bitfld.long 0x00 31. " IDREGPRESENT ,ID Register present" "Not present,Present"
|
|
bitfld.long 0x00 27. " SOFTWAREACCESS ,Software access support" "Not supported,Supported"
|
|
bitfld.long 0x00 26. " TRACESSB ,trace start/stop block present" "Not present,Present"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " NUMCNTXTIDCOMP ,Number of Context ID comparators" "0,1,2,3"
|
|
bitfld.long 0x00 23. " FIFOFULLLOGIC ,Stall the processor to prevent FIFO overflow" "Not possible,Possible"
|
|
bitfld.long 0x00 20.--22. " NUMEXTOUT ,Number of external outputs" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " NUMEXTIN ,Number of external inputs" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16. " SEQUENCER ,Sequencer present" "Not present,Present"
|
|
bitfld.long 0x00 13.--15. " NUMCOUNTERS ,Number of counters" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " NUMADDRCOMP ,Number of address comparator pairs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "ETMTRIGGER,Trigger Event Register"
|
|
bitfld.long 0x00 14.--16. " TRIGEVENT[16:14] ,Function that combines the two resources that define the event" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 7.--13. 1. " TRIGEVENT[13:7] ,Resource B"
|
|
hexmask.long.byte 0x00 0.--6. 1. " TRIGEVENT[6:0] ,Resource A"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "ETMSR,Status Register"
|
|
bitfld.long 0x00 3. " TRIGFLAG ,Trigger status" "No trigger,Trigger"
|
|
bitfld.long 0x00 2. " TSSRSTAT ,Current status of the trace start/stop resource" "Stoped,Started"
|
|
bitfld.long 0x00 1. " PROGBIT ,State of the Programming bit" "Not programming,Programming"
|
|
textline " "
|
|
bitfld.long 0x00 0. " OVERFLOW ,Overflow status" "No overflow,Overflow"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "ETMSCR,System Configuration Register"
|
|
bitfld.long 0x00 12.--14. " NUMPROCS ,Number of supported processors" "0,1,2,3,4,5,6,7"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "ETMTSSCR,TraceEnable Start/Stop Control Register"
|
|
bitfld.long 0x00 23. " STOPADDRSEL[7] ,Single address comparator 8 as stop address" "Not selected,Selected"
|
|
bitfld.long 0x00 22. " STOPADDRSEL[6] ,Single address comparator 7 as stop address" "Not selected,Selected"
|
|
bitfld.long 0x00 21. " STOPADDRSEL[5] ,Single address comparator 6 as stop address" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 20. " STOPADDRSEL[4] ,Single address comparator 5 as stop address" "Not selected,Selected"
|
|
bitfld.long 0x00 19. " STOPADDRSEL[3] ,Single address comparator 4 as stop address" "Not selected,Selected"
|
|
bitfld.long 0x00 18. " STOPADDRSEL[2] ,Single address comparator 3 as stop address" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " STOPADDRSEL[1] ,Single address comparator 2 as stop address" "Not selected,Selected"
|
|
bitfld.long 0x00 16. " STOPADDRSEL[0] ,Single address comparator 1 as stop address" "Not selected,Selected"
|
|
bitfld.long 0x00 7. " STARTADDRSEL[7] ,Single address comparator 8 as start address" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " STARTADDRSEL[6] ,Single address comparator 7 as start address" "Not selected,Selected"
|
|
bitfld.long 0x00 5. " STARTADDRSEL[5] ,Single address comparator 6 as start address" "Not selected,Selected"
|
|
bitfld.long 0x00 4. " STARTADDRSEL[4] ,Single address comparator 5 as start address" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STARTADDRSEL[3] ,Single address comparator 4 as start address" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " STARTADDRSEL[2] ,Single address comparator 3 as start address" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " STARTADDRSEL[1] ,Single address comparator 2 as start address" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STARTADDRSEL[0] ,Single address comparator 1 as start address" "Not selected,Selected"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "ETMTECR1,TraceEnable Control Register 1"
|
|
bitfld.long 0x00 25. " TRACESSEN ,Trace start/stop control enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " EXCINCFLAG ,Exclude/include flag" "Include,Exclude"
|
|
bitfld.long 0x00 3. " ADDRCOMPSEL[3] ,Address range comparator 4 select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ADDRCOMPSEL[2] ,Address range comparator 3 select" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " ADDRCOMPSEL[1] ,Address range comparator 2 select" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " ADDRCOMPSEL[0] ,Address range comparator 1 select" "Not selected,Selected"
|
|
group.long 0x40++0x1f
|
|
line.long 0x0 "ETMACVR1,Address Comparator Value Register 1"
|
|
line.long 0x4 "ETMACVR2,Address Comparator Value Register 2"
|
|
line.long 0x8 "ETMACVR3,Address Comparator Value Register 3"
|
|
line.long 0xC "ETMACVR4,Address Comparator Value Register 4"
|
|
line.long 0x10 "ETMACVR5,Address Comparator Value Register 5"
|
|
line.long 0x14 "ETMACVR6,Address Comparator Value Register 6"
|
|
line.long 0x18 "ETMACVR7,Address Comparator Value Register 7"
|
|
line.long 0x1C "ETMACVR8,Address Comparator Value Register 8"
|
|
group.long 0x80++0x1f
|
|
line.long 0x0 "ETMACTR1,Address Comparator Access Type Register 1"
|
|
bitfld.long 0x0 10.--11. " SECLEVELCTRL ,Security level control" "Ignore,Nonsec,Secure,?..."
|
|
bitfld.long 0x0 8.--9. " CONTEXTIDCOMPCTRL ,Context ID comparator control" "Ignore,Match1,Match2,Match3"
|
|
bitfld.long 0x0 0.--2. " ACCESSTYPE ,Access type" "Reserved,Instruction execute,?..."
|
|
line.long 0x4 "ETMACTR2,Address Comparator Access Type Register 2"
|
|
bitfld.long 0x4 10.--11. " SECLEVELCTRL ,Security level control" "Ignore,Nonsec,Secure,?..."
|
|
bitfld.long 0x4 8.--9. " CONTEXTIDCOMPCTRL ,Context ID comparator control" "Ignore,Match1,Match2,Match3"
|
|
bitfld.long 0x4 0.--2. " ACCESSTYPE ,Access type" "Reserved,Instruction execute,?..."
|
|
line.long 0x8 "ETMACTR3,Address Comparator Access Type Register 3"
|
|
bitfld.long 0x8 10.--11. " SECLEVELCTRL ,Security level control" "Ignore,Nonsec,Secure,?..."
|
|
bitfld.long 0x8 8.--9. " CONTEXTIDCOMPCTRL ,Context ID comparator control" "Ignore,Match1,Match2,Match3"
|
|
bitfld.long 0x8 0.--2. " ACCESSTYPE ,Access type" "Reserved,Instruction execute,?..."
|
|
line.long 0xC "ETMACTR4,Address Comparator Access Type Register 4"
|
|
bitfld.long 0xC 10.--11. " SECLEVELCTRL ,Security level control" "Ignore,Nonsec,Secure,?..."
|
|
bitfld.long 0xC 8.--9. " CONTEXTIDCOMPCTRL ,Context ID comparator control" "Ignore,Match1,Match2,Match3"
|
|
bitfld.long 0xC 0.--2. " ACCESSTYPE ,Access type" "Reserved,Instruction execute,?..."
|
|
line.long 0x10 "ETMACTR5,Address Comparator Access Type Register 5"
|
|
bitfld.long 0x10 10.--11. " SECLEVELCTRL ,Security level control" "Ignore,Nonsec,Secure,?..."
|
|
bitfld.long 0x10 8.--9. " CONTEXTIDCOMPCTRL ,Context ID comparator control" "Ignore,Match1,Match2,Match3"
|
|
bitfld.long 0x10 0.--2. " ACCESSTYPE ,Access type" "Reserved,Instruction execute,?..."
|
|
line.long 0x14 "ETMACTR6,Address Comparator Access Type Register 6"
|
|
bitfld.long 0x14 10.--11. " SECLEVELCTRL ,Security level control" "Ignore,Nonsec,Secure,?..."
|
|
bitfld.long 0x14 8.--9. " CONTEXTIDCOMPCTRL ,Context ID comparator control" "Ignore,Match1,Match2,Match3"
|
|
bitfld.long 0x14 0.--2. " ACCESSTYPE ,Access type" "Reserved,Instruction execute,?..."
|
|
line.long 0x18 "ETMACTR7,Address Comparator Access Type Register 7"
|
|
bitfld.long 0x18 10.--11. " SECLEVELCTRL ,Security level control" "Ignore,Nonsec,Secure,?..."
|
|
bitfld.long 0x18 8.--9. " CONTEXTIDCOMPCTRL ,Context ID comparator control" "Ignore,Match1,Match2,Match3"
|
|
bitfld.long 0x18 0.--2. " ACCESSTYPE ,Access type" "Reserved,Instruction execute,?..."
|
|
line.long 0x1C "ETMACTR8,Address Comparator Access Type Register 8"
|
|
bitfld.long 0x1C 10.--11. " SECLEVELCTRL ,Security level control" "Ignore,Nonsec,Secure,?..."
|
|
bitfld.long 0x1C 8.--9. " CONTEXTIDCOMPCTRL ,Context ID comparator control" "Ignore,Match1,Match2,Match3"
|
|
bitfld.long 0x1C 0.--2. " ACCESSTYPE ,Access type" "Reserved,Instruction execute,?..."
|
|
group.long 0x140++0x07
|
|
line.long 0x00 "ETMCNTRLDVR1,Counter Reload Value Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " INITVALUE ,Counter initial value"
|
|
line.long 0x04 "ETMCNTRLDVR2,Counter Reload Value Register 2"
|
|
hexmask.long.word 0x04 0.--15. 1. " INITVALUE ,Counter initial value"
|
|
group.long 0x150++0x07
|
|
line.long 0x00 "ETMCNTENR1,Counter Enable Event Register 1"
|
|
bitfld.long 0x00 14.--16. " EXTOUTEVENT[16:14] ,Function that combines the two resources that define the event" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 7.--13. 1. " EXTOUTEVENT[13:7] ,Resource B"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EXTOUTEVENT[6:0] ,Resource A"
|
|
line.long 0x04 "ETMCNTENR2,Counter Enable Event Register 2"
|
|
bitfld.long 0x04 14.--16. " EXTOUTEVENT[16:14] ,Function that combines the two resources that define the event" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x04 7.--13. 1. " EXTOUTEVENT[13:7] ,Resource B"
|
|
hexmask.long.byte 0x04 0.--6. 1. " EXTOUTEVENT[6:0] ,Resource A"
|
|
group.long 0x160++0x07
|
|
line.long 0x00 "ETMCNTRLDEVR1,Counter Reload Event Register 1"
|
|
bitfld.long 0x00 14.--16. " CNTRELOADEVENT[16:14] ,Function that combines the two resources that define the event" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 7.--13. 1. " CNTRELOADEVENT[13:7] ,Resource B"
|
|
hexmask.long.byte 0x00 0.--6. 1. " CNTRELOADEVENT[6:0] ,Resource A"
|
|
line.long 0x04 "ETMCNTRLDEVR2,Counter Reload Event Register 2"
|
|
bitfld.long 0x04 14.--16. " CNTRELOADEVENT[16:14] ,Function that combines the two resources that define the event" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x04 7.--13. 1. " CNTRELOADEVENT[13:7] ,Resource B"
|
|
hexmask.long.byte 0x04 0.--6. 1. " CNTRELOADEVENT[6:0] ,Resource A"
|
|
group.long 0x170++0x07
|
|
line.long 0x00 "ETMCNTVR1,Counter Value Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " CURRCOUNT ,Current counter value"
|
|
line.long 0x04 "ETMCNTVR2,Counter Value Register 2"
|
|
hexmask.long.word 0x04 0.--15. 1. " CURRCOUNT ,Current counter value"
|
|
group.long 0x1e0++0x03
|
|
line.long 0x00 "ETMSYNCFR,Synchronization Frequency Register"
|
|
hexmask.long.word 0x00 2.--11. 1. " SYNCFREQ ,Synchronization frequency"
|
|
rgroup.long 0x1e4++0x07
|
|
line.long 0x00 "ETMIDR,ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ImplCode ,Implementor code"
|
|
bitfld.long 0x00 19. " SECEXTSUPP ,Security extensions support" "Not supported,Supported"
|
|
bitfld.long 0x00 18. " THUMB32SUPP ,32-bit Thumb instructions support" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " MAJORVER ,Major architecture version number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " MINORVER ,Minor architecture version number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " IMPLREV ,Implementation revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "ETMCCER,Configuration Code Extension Register"
|
|
bitfld.long 0x04 25. " BARRTS ,Timestamps generation for DMB/DSB" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " BARRWP ,DMB/DSB instructions treated as waypoints" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " RETSTACK ,Return stack" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x04 22. " TIMESTAMP ,Timestamping" "Not implemented,Implemented"
|
|
bitfld.long 0x04 13.--15. " INSTRUMRES ,Number of instrumentation resources" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 11. " REGREADS ,Registers Readable" "Not readable,Readable"
|
|
textline " "
|
|
hexmask.long.byte 0x04 3.--10. 1. " EXTINSIZE ,Size of the extended external input bus"
|
|
bitfld.long 0x04 0.--2. " EXTINSEL ,Number of extended external input selectors" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1ec++0x03
|
|
line.long 0x00 "ETMEXTINSELR,Extended External Input Selection Register"
|
|
bitfld.long 0x00 8.--13. " EXTINSEL2 ,Second extended external input selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " EXTINSEL1 ,First extended external input selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x1fc++0x07
|
|
line.long 0x00 "ETMAUXCR,Auxiliary Control Register"
|
|
bitfld.long 0x00 3. " FORCESYNCINSERT ,Force insertion of synchronization packets" "Not forced,Forced"
|
|
bitfld.long 0x00 2. " DISABLEWPUPDATE ,PTM waypoint update disable" "No,Yes"
|
|
bitfld.long 0x00 1. " DISABLETSONBARR ,PTM timestamp on a barrier instruction disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DISABLEFORCEDOF ,PTM enter in overflow state when synchronization is requested disable" "No,Yes"
|
|
line.long 0x04 "ETMTRACEIDR,CoreSight Trace ID Register"
|
|
hexmask.long.byte 0x04 0.--6. 1. " TRACEID ,Trace ID"
|
|
rgroup.long 0x304++0x03
|
|
line.long 0x00 "OSLSR,OS Lock Status Register"
|
|
rgroup.long 0x314++0x03
|
|
line.long 0x00 "ETMPDSR,Device Power-Down Status Register"
|
|
wgroup.long 0xedc++0x03
|
|
line.long 0x00 "ITMISCOUT,Miscellaneous Outputs Register"
|
|
bitfld.long 0x00 8.--9. " PTMEXTOUT ,PTMEXTOUT[1:0] output" "0,1,2,3"
|
|
bitfld.long 0x00 5. " PTMIDLEACK ,PTMIDLEACK output" "Low,High"
|
|
bitfld.long 0x00 4. " PTMDBGREQ ,PTMDBGREQ output" "Low,High"
|
|
rgroup.long 0xee0++0x03
|
|
line.long 0x00 "ITMISCIN,Miscellaneous Inputs Register"
|
|
bitfld.long 0x00 6. " STANDBYWFI ,Value of the STANDBYWFI input" "Low,High"
|
|
bitfld.long 0x00 4. " PTMDBGACK ,Value of the PTMDBGACK input" "Low,High"
|
|
bitfld.long 0x00 0.--3. " EXTIN ,Value of the EXTIN[3:0] inputs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0xee8++0x07
|
|
line.long 0x00 "ITTRIGGER,Trigger Register"
|
|
bitfld.long 0x00 0. " PTMTRIGGER ,PTMTRIGGER output" "Low,High"
|
|
line.long 0x04 "ITATBDATA0,ATB Data 0 Register"
|
|
bitfld.long 0x04 4. " ATDATAM31 ,ATDATAM[31] output" "Low,High"
|
|
bitfld.long 0x04 3. " ATDATAM23 ,ATDATAM[23] output" "Low,High"
|
|
bitfld.long 0x04 2. " ATDATAM15 ,ATDATAM[15] output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ATDATAM7 ,ATDATAM[7] output" "Low,High"
|
|
bitfld.long 0x04 0. " ATDATAM0 ,ATDATAM[0] output" "Low,High"
|
|
rgroup.long 0xef0++0x03
|
|
line.long 0x00 "ITATBCTR2,ATB Control 2 Register"
|
|
bitfld.long 0x00 1. " AFVALIDM ,Value of the AFVALIDM input" "Low,High"
|
|
bitfld.long 0x00 0. " ATREADYM ,Value of the ATREADYM input" "Low,High"
|
|
wgroup.long 0xef4++0x07
|
|
line.long 0x00 "ITATBID,ATB Identification Register"
|
|
hexmask.long.byte 0x00 0.--6. 1. " ATIDM ,ATIDM[6:0] outputs"
|
|
line.long 0x04 "ITATBCTR0,ATB Control 0 Register"
|
|
bitfld.long 0x04 8.--9. " ATBYTESM ,ATBYTESM[9:8] outputs" "0,1,2,3"
|
|
bitfld.long 0x04 1. " AFREADYM ,AFREADYM output" "Low,High"
|
|
bitfld.long 0x04 0. " ATVALIDM ,ATVALIDM output" "Low,High"
|
|
group.long 0xf00++0x03
|
|
line.long 0x00 "ETMITCTRL,Integration Mode Control Register"
|
|
bitfld.long 0x00 0. " EIT ,Enable Integration Test" "Disabled,Enabled"
|
|
group.long 0xfa0++0x07
|
|
line.long 0x00 "CTSR,Claim Tag Set Register"
|
|
bitfld.long 0x00 0.--3. " CTS ,Claim Tag Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "CTCR,Claim Tag Clear Register"
|
|
bitfld.long 0x04 0.--3. " CTC ,Claim Tag Clear" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0xfb0++0x03
|
|
line.long 0x00 "LAR,Lock Access Register"
|
|
rgroup.long 0xfb4++0x07
|
|
line.long 0x00 "LSR,Lock Status Register"
|
|
bitfld.long 0x00 0.--2. " LS ,Lock Status" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "ASR,Authentication Status Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " AS ,Authentication Status"
|
|
rgroup.long 0xfc8++0x37
|
|
line.long 0x00 "DEVID,Device ID"
|
|
line.long 0x04 "DTIR,Device Type Identifier Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DTI ,Device Type Identifier"
|
|
line.long 0x08 "PERIPHID4,Peripheral ID4"
|
|
hexmask.long.byte 0x08 0.--7. 1. " PERIPHID4 ,Peripheral ID4"
|
|
line.long 0x0c "PERIPHID5,Peripheral ID5"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " PERIPHID5 ,Peripheral ID5"
|
|
line.long 0x10 "PERIPHID6,Peripheral ID6"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PERIPHID6 ,Peripheral ID6"
|
|
line.long 0x14 "PERIPHID7,Peripheral ID7"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PERIPHID7 ,Peripheral ID7"
|
|
line.long 0x18 "PERIPHID0,Peripheral ID0"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PERIPHID0 ,Peripheral ID0"
|
|
line.long 0x1c "PERIPHID1,Peripheral ID1"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " PERIPHID1 ,Peripheral ID1"
|
|
line.long 0x20 "PERIPHID2,Peripheral ID2"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PERIPHID2 ,Peripheral ID2"
|
|
line.long 0x24 "PERIPHID3,Peripheral ID3"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PERIPHID3 ,Peripheral ID3"
|
|
line.long 0x28 "COMPID0,Component ID0"
|
|
hexmask.long.byte 0x28 0.--7. 1. " COMPID0 ,Component ID0"
|
|
line.long 0x2c "COMPID1,Component ID1"
|
|
hexmask.long.byte 0x2c 0.--7. 1. " COMPID1 ,Component ID1"
|
|
line.long 0x30 "COMPID2,Component ID2"
|
|
hexmask.long.byte 0x30 0.--7. 1. " COMPID2 ,Component ID2"
|
|
line.long 0x34 "COMPID3,Component ID3"
|
|
hexmask.long.byte 0x34 0.--7. 1. " COMPID3 ,Component ID3"
|
|
width 12.
|
|
tree.end
|
|
tree.end
|
|
tree "Debug Access Port ROM"
|
|
base ad:0xF8800000
|
|
width 12.
|
|
rgroup.long 0x00++0x27
|
|
line.long 0x0 "ROMENTRY00,ROM entry 00"
|
|
hexmask.long.tbyte 0x0 12.--31. 0x10 " ADDRESSOFFSET ,Base address of the component, relative to the ROM address"
|
|
bitfld.long 0x0 1. " FORMAT ,Format of ROM entry" "8 bit,32 bit"
|
|
bitfld.long 0x0 0. " ENTRYPRESENT ,Entry Present" "Not present,Present"
|
|
line.long 0x4 "ROMENTRY01,ROM entry 01"
|
|
hexmask.long.tbyte 0x4 12.--31. 0x10 " ADDRESSOFFSET ,Base address of the component, relative to the ROM address"
|
|
bitfld.long 0x4 1. " FORMAT ,Format of ROM entry" "8 bit,32 bit"
|
|
bitfld.long 0x4 0. " ENTRYPRESENT ,Entry Present" "Not present,Present"
|
|
line.long 0x8 "ROMENTRY02,ROM entry 02"
|
|
hexmask.long.tbyte 0x8 12.--31. 0x10 " ADDRESSOFFSET ,Base address of the component, relative to the ROM address"
|
|
bitfld.long 0x8 1. " FORMAT ,Format of ROM entry" "8 bit,32 bit"
|
|
bitfld.long 0x8 0. " ENTRYPRESENT ,Entry Present" "Not present,Present"
|
|
line.long 0xC "ROMENTRY03,ROM entry 03"
|
|
hexmask.long.tbyte 0xC 12.--31. 0x10 " ADDRESSOFFSET ,Base address of the component, relative to the ROM address"
|
|
bitfld.long 0xC 1. " FORMAT ,Format of ROM entry" "8 bit,32 bit"
|
|
bitfld.long 0xC 0. " ENTRYPRESENT ,Entry Present" "Not present,Present"
|
|
line.long 0x10 "ROMENTRY04,ROM entry 04"
|
|
hexmask.long.tbyte 0x10 12.--31. 0x10 " ADDRESSOFFSET ,Base address of the component, relative to the ROM address"
|
|
bitfld.long 0x10 1. " FORMAT ,Format of ROM entry" "8 bit,32 bit"
|
|
bitfld.long 0x10 0. " ENTRYPRESENT ,Entry Present" "Not present,Present"
|
|
line.long 0x14 "ROMENTRY05,ROM entry 05"
|
|
hexmask.long.tbyte 0x14 12.--31. 0x10 " ADDRESSOFFSET ,Base address of the component, relative to the ROM address"
|
|
bitfld.long 0x14 1. " FORMAT ,Format of ROM entry" "8 bit,32 bit"
|
|
bitfld.long 0x14 0. " ENTRYPRESENT ,Entry Present" "Not present,Present"
|
|
line.long 0x18 "ROMENTRY06,ROM entry 06"
|
|
hexmask.long.tbyte 0x18 12.--31. 0x10 " ADDRESSOFFSET ,Base address of the component, relative to the ROM address"
|
|
bitfld.long 0x18 1. " FORMAT ,Format of ROM entry" "8 bit,32 bit"
|
|
bitfld.long 0x18 0. " ENTRYPRESENT ,Entry Present" "Not present,Present"
|
|
line.long 0x1C "ROMENTRY07,ROM entry 07"
|
|
hexmask.long.tbyte 0x1C 12.--31. 0x10 " ADDRESSOFFSET ,Base address of the component, relative to the ROM address"
|
|
bitfld.long 0x1C 1. " FORMAT ,Format of ROM entry" "8 bit,32 bit"
|
|
bitfld.long 0x1C 0. " ENTRYPRESENT ,Entry Present" "Not present,Present"
|
|
line.long 0x20 "ROMENTRY08,ROM entry 08"
|
|
hexmask.long.tbyte 0x20 12.--31. 0x10 " ADDRESSOFFSET ,Base address of the component, relative to the ROM address"
|
|
bitfld.long 0x20 1. " FORMAT ,Format of ROM entry" "8 bit,32 bit"
|
|
bitfld.long 0x20 0. " ENTRYPRESENT ,Entry Present" "Not present,Present"
|
|
line.long 0x24 "ROMENTRY09,ROM entry 09"
|
|
hexmask.long.tbyte 0x24 12.--31. 0x10 " ADDRESSOFFSET ,Base address of the component, relative to the ROM address"
|
|
bitfld.long 0x24 1. " FORMAT ,Format of ROM entry" "8 bit,32 bit"
|
|
bitfld.long 0x24 0. " ENTRYPRESENT ,Entry Present" "Not present,Present"
|
|
width 12.
|
|
rgroup.long 0xfd0++0x03
|
|
line.long 0x00 "PERIPHID4,Peripheral ID4"
|
|
bitfld.long 0x00 4.--7. " 4KB_COUNT ,4KB Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " JEP106CC ,JEP106 continuation code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0xfe0++0x1f
|
|
line.long 0x00 "PERIPHID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0 ,Part number 0"
|
|
line.long 0x04 "PERIPHID1,Peripheral ID1"
|
|
bitfld.long 0x04 4.--7. " JEP106ID ,JEP106 Identity Code [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--3. " PARTNUMBER1 ,PartNumber1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "PERIPHID2,Peripheral ID2"
|
|
bitfld.long 0x08 4.--7. " REVNUM ,Revision number of Peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned value use status" "Not used,Used"
|
|
bitfld.long 0x08 0.--2. " JEP106ID ,JEP106 Identity Code [6:4]" "0,1,2,3,4,5,6,7"
|
|
line.long 0x0c "PERIPHID3,Peripheral ID3"
|
|
bitfld.long 0x0c 4.--7. " REVAND ,RevAnd, at top level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0c 0.--3. " CUSTMOD ,Customer Modified" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "COMPID0,Component ID0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PREAMBLE ,Preamble"
|
|
line.long 0x14 "COMPID1,Component ID1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PREAMBLE ,Preamble"
|
|
line.long 0x18 "COMPID2,Component ID2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PREAMBLE ,Preamble"
|
|
line.long 0x1c "COMPID3,Component ID3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " PREAMBLE ,Preamble"
|
|
width 12.
|
|
tree.end
|
|
tree "Embedded Trace Buffer"
|
|
base ad:0xF8801000
|
|
width 13.
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "RDP,RAM Depth Register"
|
|
rgroup.long 0x0c++0x07
|
|
line.long 0x00 "STS,Status Register"
|
|
bitfld.long 0x00 3. " FTEMPTY ,Formatter pipeline empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " ACQCOMP ,Acquisition complete" "Not completed,Completed"
|
|
bitfld.long 0x00 1. " TRIGGERED ,Trigger has been observed" "Not observed,Observed"
|
|
textline " "
|
|
bitfld.long 0x00 0. " Full ,RAM Full" "Not full,Full"
|
|
line.long 0x04 "RRD,RAM Read Data Register"
|
|
group.long 0x14++0x13
|
|
line.long 0x00 "RRP,RAM Read Pointer Register"
|
|
hexmask.long.word 0x00 0.--9. 1. " RRP ,RAM Read Pointer"
|
|
line.long 0x04 "RWP,RAM Write Pointer Register"
|
|
hexmask.long.word 0x04 0.--9. 1. " RWP ,RAM Write Pointer"
|
|
line.long 0x08 "TRG,Trigger Counter Register"
|
|
hexmask.long.word 0x08 0.--9. 1. " TRG ,Trigger Counter"
|
|
line.long 0x0c "CTL,Control Register"
|
|
bitfld.long 0x0c 0. " TRACECAPTEN ,ETB Trace Capture Enable" "Disabled,Enabled"
|
|
line.long 0x10 "RWD,RAM Write Data Register"
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "FFSR,Formatter and Flush Status Register"
|
|
bitfld.long 0x00 1. " FTSTOPPED ,Formatter stopped" "Not stopped,Stopped"
|
|
bitfld.long 0x00 0. " FLINPROG ,Flush In Progress" "No flush,Flush"
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "FFCR,Formatter and Flush Control Register"
|
|
bitfld.long 0x00 13. " STOPTRIG ,Stops the formatter when a Trigger Event has been observed" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " STOPFL ,Stop the formatter when a flush has completed" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " TRIGFL ,Indicate a trigger on Flush completion" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TRIGEVT ,Indicate a trigger on a Trigger Event" "No triggered,Triggered"
|
|
bitfld.long 0x00 8. " TRIGIN ,Indicate a trigger on TRIGIN being asserted" "No triggered,Triggered"
|
|
bitfld.long 0x00 6. " FONMAN ,Generate a flush of the system" "No flush,Flush"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FONTRIG ,Generate flush using Trigger event" "No flush,Flush"
|
|
bitfld.long 0x00 4. " FONFLIN ,Generate flush using the FLUSHIN interface" "No flush,Flush"
|
|
bitfld.long 0x00 1. " ENFCONT ,Continuous Formatting" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENFTC ,Enable Formatting" "Disabled,Enabled"
|
|
wgroup.long 0xee0++0x0b
|
|
line.long 0x00 "ITMISCOP0,Integration Test Miscellaneous Output Register 0"
|
|
bitfld.long 0x00 1. " FULL ,Set the value of FULL" "No effect,Set"
|
|
bitfld.long 0x00 0. " ACQCOMP ,Set the value of ACQCOMP" "No effect,Set"
|
|
line.long 0x04 "ITTRFLINACK,Integration Test Trigger In and Flush In Acknowledge Register"
|
|
bitfld.long 0x04 1. " FLUSHINACK ,Set the value of FLUSHINACK" "No effect,Set"
|
|
bitfld.long 0x04 0. " TRIGINACK ,Set the value of TRIGINACK" "No effect,Set"
|
|
line.long 0x08 "ITTRFLIN,Integration Test Trigger In and Flush In Register"
|
|
bitfld.long 0x08 1. " FLUSHIN ,Set the value of FLUSHIN" "No effect,Set"
|
|
bitfld.long 0x08 0. " TRIGIN ,Set the value of TRIGIN" "No effect,Set"
|
|
rgroup.long 0xeec++0x03
|
|
line.long 0x00 "ITATBDATA0,Integration Test ATB Data Register"
|
|
bitfld.long 0x00 4. " ATDATA31 ,Value of ATDATA[31]" "Low,High"
|
|
bitfld.long 0x00 3. " ATDATA23 ,Value of ATDATA[23]" "Low,High"
|
|
bitfld.long 0x00 2. " ATDATA15 ,Value of ATDATA[15]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ATDATA7 ,Value of ATDATA[7]" "Low,High"
|
|
bitfld.long 0x00 0. " ATDATA0 ,Value of ATDATA[0]" "Low,High"
|
|
wgroup.long 0xef0++0x03
|
|
line.long 0x00 "ITATBCTR2,Integration Test ATB Control Register 2"
|
|
bitfld.long 0x00 1. " AFVALIDS ,Set the value of AFVALIDS" "No effect,Set"
|
|
bitfld.long 0x00 0. " ATREADYS ,Set the value of ATREADYS" "No effect,Set"
|
|
rgroup.long 0xef4++0x07
|
|
line.long 0x00 "ITATBCTR1,Integration Test ATB Control Register 1"
|
|
hexmask.long.byte 0x00 0.--6. 1. " ATID ,Value of ATIDS"
|
|
line.long 0x04 "ITATBCTR0,Integration Test ATB Control Register 0"
|
|
bitfld.long 0x04 8.--9. " ATBYTES ,Value of ATBYTESS" "0,1,2,3"
|
|
bitfld.long 0x04 1. " AFREADY ,Value of ATFREADYS" "Low,High"
|
|
bitfld.long 0x04 0. " ATVALID ,Value of ATVALIDS" "Low,High"
|
|
group.long 0xf00++0x03
|
|
line.long 0x00 "IMCR,Integration Mode Control Register"
|
|
bitfld.long 0x00 0. " ITE ,Enable Integration Test" "Disabled,Enabled"
|
|
group.long 0xfa0++0x07
|
|
line.long 0x00 "CTSR,Claim Tag Set Register"
|
|
bitfld.long 0x00 0.--3. " CTS ,Claim Tag Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "CTCR,Claim Tag Clear Register"
|
|
bitfld.long 0x04 0.--3. " CTC ,Claim Tag Clear" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0xfb0++0x03
|
|
line.long 0x00 "LAR,Lock Access Register"
|
|
rgroup.long 0xfb4++0x07
|
|
line.long 0x00 "LSR,Lock Status Register"
|
|
bitfld.long 0x00 0.--2. " LS ,Lock Status" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "ASR,Authentication Status Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " AS ,Authentication Status"
|
|
rgroup.long 0xfc8++0x37
|
|
line.long 0x00 "DEVID,Device ID"
|
|
line.long 0x04 "DTIR,Device Type Identifier Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DTI ,Device Type Identifier"
|
|
line.long 0x08 "PERIPHID4,Peripheral ID4"
|
|
hexmask.long.byte 0x08 0.--7. 1. " PERIPHID4 ,Peripheral ID4"
|
|
line.long 0x0c "PERIPHID5,Peripheral ID5"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " PERIPHID5 ,Peripheral ID5"
|
|
line.long 0x10 "PERIPHID6,Peripheral ID6"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PERIPHID6 ,Peripheral ID6"
|
|
line.long 0x14 "PERIPHID7,Peripheral ID7"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PERIPHID7 ,Peripheral ID7"
|
|
line.long 0x18 "PERIPHID0,Peripheral ID0"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PERIPHID0 ,Peripheral ID0"
|
|
line.long 0x1c "PERIPHID1,Peripheral ID1"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " PERIPHID1 ,Peripheral ID1"
|
|
line.long 0x20 "PERIPHID2,Peripheral ID2"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PERIPHID2 ,Peripheral ID2"
|
|
line.long 0x24 "PERIPHID3,Peripheral ID3"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PERIPHID3 ,Peripheral ID3"
|
|
line.long 0x28 "COMPID0,Component ID0"
|
|
hexmask.long.byte 0x28 0.--7. 1. " COMPID0 ,Component ID0"
|
|
line.long 0x2c "COMPID1,Component ID1"
|
|
hexmask.long.byte 0x2c 0.--7. 1. " COMPID1 ,Component ID1"
|
|
line.long 0x30 "COMPID2,Component ID2"
|
|
hexmask.long.byte 0x30 0.--7. 1. " COMPID2 ,Component ID2"
|
|
line.long 0x34 "COMPID3,Component ID3"
|
|
hexmask.long.byte 0x34 0.--7. 1. " COMPID3 ,Component ID3"
|
|
width 12.
|
|
tree.end
|
|
tree "Fabric Trace Macrocell"
|
|
base ad:0xF880B000
|
|
width 17.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "FTMGLBCTRL,FTM Global Control Register"
|
|
bitfld.long 0x00 0. " FTMENABLE ,Enable FTM" "Disabled,Enabled"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "FTMSTATUS,FTM Status Register"
|
|
bitfld.long 0x00 7. " IDLE ,FTM IDLE Status" "Not idle,Idle"
|
|
bitfld.long 0x00 6. " SPIDEN ,Trustzone SPIDEN signal status" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " DBGEN ,Trustzone DBGEN signal status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SPNIDEN ,Trustzone SPNIDEN signal status" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " NIDEN ,Trustzone NIDEN signal status" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " FIFOFULL ,FIFO full status" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FIFOEMPTY ,FIFO empty status" "Not empty,Empty"
|
|
bitfld.long 0x00 0. " LOCKED ,Lock status" "Not locked,Locked"
|
|
group.long 0x08++0x13
|
|
line.long 0x00 "FTMCONTROL,FTM Configuration"
|
|
bitfld.long 0x00 2. " CYCEN ,Enable Cycle Count packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TRACEN ,Enable Trace packets" "Disabled,Enabled"
|
|
line.long 0x4 "FTMP2FDBG0,FPGA Debug Register P2F0"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PSS2FPGA ,Signals presented to the fabric"
|
|
line.long 0x8 "FTMP2FDBG1,FPGA Debug Register P2F1"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PSS2FPGA ,Signals presented to the fabric"
|
|
line.long 0xC "FTMP2FDBG2,FPGA Debug Register P2F2"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PSS2FPGA ,Signals presented to the fabric"
|
|
line.long 0x10 "FTMP2FDBG3,FPGA Debug Register P2F3"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PSS2FPGA ,Signals presented to the fabric"
|
|
rgroup.long 0x1c++0x0f
|
|
line.long 0x0 "FTMF2PDBG0,FPGA Debug Register F2P0"
|
|
hexmask.long.byte 0x0 0.--7. 1. " FPGA2PSS ,Signals presented to the PSS from the Fabric"
|
|
line.long 0x4 "FTMF2PDBG1,FPGA Debug Register F2P1"
|
|
hexmask.long.byte 0x4 0.--7. 1. " FPGA2PSS ,Signals presented to the PSS from the Fabric"
|
|
line.long 0x8 "FTMF2PDBG2,FPGA Debug Register F2P2"
|
|
hexmask.long.byte 0x8 0.--7. 1. " FPGA2PSS ,Signals presented to the PSS from the Fabric"
|
|
line.long 0xC "FTMF2PDBG3,FPGA Debug Register F2P3"
|
|
hexmask.long.byte 0xC 0.--7. 1. " FPGA2PSS ,Signals presented to the PSS from the Fabric"
|
|
group.long 0x2c++0x07
|
|
line.long 0x00 "CYCOUNTPRE,AXI Cycle Count clock pre-scaler"
|
|
bitfld.long 0x00 0.--3. " PRESCALE ,Incoming clock Prescaler" "Disabled,Div by 2,Div by 4,Div by 8,Div by 16,Div by 32,Div by 64,Div by 128,Div by 256,Div by 512,Div by 1024,Div by 2048,Div by 4096,Div by 8192,Div by 16384,Div by 32768"
|
|
line.long 0x04 "FTMSYNCRELOAD,FTM Synchronization Counter reload value"
|
|
hexmask.long.word 0x04 0.--11. 1. " SYNCCOUNTTERM ,FTM Synchronization packet counter reload value"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "FTMSYNCCOUT,FTM Synchronization Counter value"
|
|
hexmask.long.word 0x00 0.--11. 1. " SYNCCOUT ,Current value of the Synchronization packet counter"
|
|
group.long 0x400++0x03
|
|
line.long 0x00 "FTMATID,FTM ATID Value Register"
|
|
hexmask.long.byte 0x00 0.--6. 1. " ATID ,ATID value supplied to ATB bus"
|
|
rgroup.long 0xed0++0x03
|
|
line.long 0x00 "FTMITTRIGOUTACK,Trigger Output Acknowledge Integration Test Register"
|
|
bitfld.long 0x00 0.--3. " TRIGACK ,Current value of the FTMTrigOutAck[3:0] inputs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0xed4++0x03
|
|
line.long 0x00 "FTMITTRIGGER,Trigger Output Integration Test Register"
|
|
bitfld.long 0x00 0.--3. " TRIGGER ,FTMTrigOut[3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0xed8++0x03
|
|
line.long 0x00 "FTMITTRACEDIS,External Trace Disable Integration Test Register"
|
|
bitfld.long 0x00 0. " TRACEDIS ,External Trace Disable" "No,Yes"
|
|
group.long 0xedc++0x03
|
|
line.long 0x00 "FTMITCYCCOUNT,Cycle Counter Test Register"
|
|
wgroup.long 0xeec++0x03
|
|
line.long 0x00 "FTMITATBDATA0,ATB Data Integration Test Register 0"
|
|
bitfld.long 0x00 4. " ATDATAM31 ,ATDATAM[31] output" "Low,High"
|
|
bitfld.long 0x00 3. " ATDATAM23 ,ATDATAM[23] output" "Low,High"
|
|
bitfld.long 0x00 2. " ATDATAM15 ,ATDATAM[15] output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ATDATAM7 ,ATDATAM[7] output" "Low,High"
|
|
bitfld.long 0x00 0. " ATDATAM0 ,ATDATAM[0] output" "Low,High"
|
|
rgroup.long 0xef0++0x03
|
|
line.long 0x00 "FTMITATBCTR2,ATB Control Integration Test Register 2"
|
|
bitfld.long 0x00 1. " AFVALID ,Value of the AFVALIDM input" "Low,High"
|
|
bitfld.long 0x00 0. " ATREADY ,Value of the ATREADYM input" "Low,High"
|
|
group.long 0xef4++0x03
|
|
line.long 0x00 "FTMITATBCTR1,ATB Control Integration Test Register 1"
|
|
hexmask.long.byte 0x00 0.--6. 1. " ATID_TEST ,ATID output"
|
|
wgroup.long 0xef8++0x03
|
|
line.long 0x00 "FTMITATBCTR0,ATB Control Integration Test Register 0"
|
|
bitfld.long 0x00 8.--9. " ATBYTES ,ATBYTESM[9:8] outputs" "0,1,2,3"
|
|
bitfld.long 0x00 1. " AFREADYM ,AFREADY output" "Low,High"
|
|
bitfld.long 0x00 0. " ATVALIDM ,ATVALID output" "Low,High"
|
|
group.long 0xf00++0x03
|
|
line.long 0x00 "FTMITCR,FTM Test Control Register"
|
|
bitfld.long 0x00 0. " ITEN ,Integration Test Enable" "Disabled,Enabled"
|
|
width 17.
|
|
group.long 0xfa0++0x07
|
|
line.long 0x00 "CLAIMTAGSET,Claim Tag Set Register"
|
|
bitfld.long 0x00 3. " CLAIMTAGSETVAL[3] ,Claim tag 3 Set" "Not implemented,Implemented"
|
|
bitfld.long 0x00 2. " CLAIMTAGSETVAL[2] ,Claim tag 2 Set" "Not implemented,Implemented"
|
|
bitfld.long 0x00 1. " CLAIMTAGSETVAL[1] ,Claim tag 1 Set" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLAIMTAGSETVAL[0] ,Claim tag 0 Set" "Not implemented,Implemented"
|
|
line.long 0x04 "CLAIMTAGCLR,Claim Tag Clear Register"
|
|
bitfld.long 0x04 3. " CLAIMTAGCLRVAL[3] ,Claim tag 3 Clear" "Not implemented,Implemented"
|
|
bitfld.long 0x04 2. " CLAIMTAGCLRVAL[2] ,Claim tag 2 Clear" "Not implemented,Implemented"
|
|
bitfld.long 0x04 1. " CLAIMTAGCLRVAL[1] ,Claim tag 1 Clear" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x04 0. " CLAIMTAGCLRVAL[0] ,Claim tag 0 Clear" "Not implemented,Implemented"
|
|
width 17.
|
|
wgroup.long 0xfb0++0x03
|
|
line.long 0x00 "LOCK_ACCESS,Lock Access Register"
|
|
rgroup.long 0xfb4++0x07
|
|
line.long 0x00 "LOCK_STATUS,Lock Status Register"
|
|
bitfld.long 0x00 2. " 8BITACCESS ,8 bit access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " LOCKSTATUS ,Lock status" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LOCKIMP ,Lock exists" "Not exists,Exists"
|
|
line.long 0x04 "FTMAUTHSTATUS,Authentication Status Register"
|
|
bitfld.long 0x04 6.--7. " AUTH_SPNIDEN ,Secure Non-Invasive Debug" "0,1,2,3"
|
|
bitfld.long 0x04 2.--3. " AUTH_NIDEN ,Non-Secure Non-Invasive Debug" "0,1,2,3"
|
|
rgroup.long 0xfcc++0x07
|
|
line.long 0x00 "FTMDEV_TYPE,Device Type Identification Register"
|
|
bitfld.long 0x00 4.--7. " SUBTYPE ,Sub Type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " MAJORTYPE ,Major Type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "FTMPERIPHID4,Peripheral ID4"
|
|
bitfld.long 0x04 4.--7. " 4KBCOUNT ,4KB Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--3. " JEP106 ,JEP106 Continuation Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0xfe0++0x1f
|
|
line.long 0x00 "FTMPERIPHID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMLOWER ,Part Number Lower"
|
|
line.long 0x04 "FTMPERIPHID1,Peripheral ID1"
|
|
bitfld.long 0x04 4.--7. " JEP106 ,JEP106 identity bits [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--3. " PARTNUMUPPER ,Part Number Upper [11:8]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "FTMPERIPHID2,Peripheral ID2"
|
|
bitfld.long 0x08 4.--7. " REVISION ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC used" "Not used,Used"
|
|
bitfld.long 0x08 0.--2. " JEP106 ,JEP106 Identity [6:4]" "0,1,2,3,4,5,6,7"
|
|
line.long 0x0c "FTMPERIPHID3,Peripheral ID3"
|
|
bitfld.long 0x0c 4.--7. " REVAND ,RevAnd" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0c 0.--3. " CUSTMOD ,Customer Modified" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "FTMCOMPID0,Component ID0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PREAMBLE ,Preamble"
|
|
line.long 0x14 "FTMCOMPID1,Component ID1"
|
|
bitfld.long 0x04 4.--7. " COMPCLASS ,Component Class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--3. " PREAMBLE ,Preamble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x18 "FTMCOMPID2,Component ID2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PREAMBLE ,Preamble"
|
|
line.long 0x1c "FTMCOMPID3,Component ID3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " PREAMBLE ,Preamble"
|
|
width 12.
|
|
tree.end
|
|
tree "CoreSight Trace Funnel"
|
|
base ad:0xF8804000
|
|
width 12.
|
|
group.long 0x00++0x7
|
|
line.long 0x0 "CONTROL,CSTF Control Register"
|
|
bitfld.long 0x0 8.--11. " MINHOLDTIME ,Minimum hold time" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
bitfld.long 0x0 7. " ENABLESLAVE7 ,Slave 7 enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 6. " ENABLESLAVE6 ,Slave 6 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 5. " ENABLESLAVE5 ,Slave 5 enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " ENABLESLAVE4 ,Slave 4 enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " ENABLESLAVE3 ,Slave 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 2. " ENABLESLAVE2 ,Slave 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " ENABLESLAVE1 ,Slave 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " ENABLESLAVE0 ,Slave 0 enable" "Disabled,Enabled"
|
|
line.long 0x4 "PRICONTROL,CSTF Priority Control Register"
|
|
bitfld.long 0x4 21.--23. " PRIPORT7 ,8th port priority value" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 18.--20. " PRIPORT6 ,7th port priority value" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 15.--17. " PRIPORT5 ,6th port priority value" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x4 12.--14. " PRIPORT4 ,5th port priority value" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 9.--11. " PRIPORT3 ,4th port priority value" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 6.--8. " PRIPORT2 ,3rd port priority value" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x4 3.--5. " PRIPORT1 ,2nd port priority value" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 0.--2. " PRIPORT0 ,1st port priority value" "0,1,2,3,4,5,6,7"
|
|
group.long 0xeec++0xf
|
|
line.long 0x0 "ITATBDATA0,Integration Test ATB Data 0 Register"
|
|
bitfld.long 0x0 4. " ATDATA31 ,Value of ATDATA[31]" "Low,High"
|
|
bitfld.long 0x0 3. " ATDATA23 ,Value of ATDATA[23]" "Low,High"
|
|
bitfld.long 0x0 2. " ATDATA15 ,Value of ATDATA[15]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0 1. " ATDATA7 ,Value of ATDATA[7]" "Low,High"
|
|
bitfld.long 0x0 0. " ATDATA0 ,Value of ATDATA[0]" "Low,High"
|
|
line.long 0x4 "ITATBCTR2,tegration Test ATB Control 2 Register"
|
|
bitfld.long 0x4 1. " AFVALID ,Value of the AFVALID" "Low,High"
|
|
bitfld.long 0x4 0. " ATREADY ,Value of ATREADY" "Low,High"
|
|
line.long 0x8 "ITATBCTR1,Integration Test ATB Control 1 Register"
|
|
hexmask.long.byte 0x8 0.--6. 1. " ATID ,Value of ATID"
|
|
line.long 0xc "ITATBCTR0,Integration Test ATB Control 0 Register"
|
|
bitfld.long 0xc 8.--9. " ATBYTES ,Value of ATBYTES" "0,1,2,3"
|
|
bitfld.long 0xc 1. " AFREADY ,Value of AFREADY" "Low,High"
|
|
bitfld.long 0xc 0. " ATVALID ,Value of ATVALID" "Low,High"
|
|
group.long 0xf00++0x3
|
|
line.long 0x0 "IMCR,Integration Mode Control Register"
|
|
bitfld.long 0x0 0. " ITEN ,Enable integration test registers" "Disabled,Enabled"
|
|
group.long 0xfa0++0x7
|
|
line.long 0x0 "CTSR,Claim Tag Set Register"
|
|
bitfld.long 0x0 0.--3. " CTS ,Claim tag set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x4 "CTCR,Claim Tag Clear Register"
|
|
bitfld.long 0x4 0.--3. " CTC ,Claim tag clear" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0xfb0++0x3
|
|
line.long 0x0 "LAR,Lock Access Register"
|
|
rgroup.long 0xfb4++0x7
|
|
line.long 0x0 "LSR,Lock Status Register"
|
|
bitfld.long 0x0 0.--2. " LS ,Lock status" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "ASR,Authentication Status Register"
|
|
hexmask.long.byte 0x4 0.--7. 1. " AS ,Authentication status"
|
|
rgroup.long 0xfc8++0x37
|
|
line.long 0x0 "DEVID,Device ID"
|
|
line.long 0x4 "DTIR,Device Type Identifier Register"
|
|
hexmask.long.byte 0x4 0.--7. 1. " DTI ,Device type identifier"
|
|
line.long 0x8 "PERIPHID4,Peripheral ID4"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PERIPHID4 ,Peripheral ID4"
|
|
line.long 0xc "PERIPHID5,Peripheral ID5"
|
|
hexmask.long.byte 0xc 0.--7. 1. " PERIPHID5 ,Peripheral ID5"
|
|
line.long 0x10 "PERIPHID6,Peripheral ID6"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PERIPHID6 ,Peripheral ID6"
|
|
line.long 0x14 "PERIPHID7,Peripheral ID7"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PERIPHID7 ,Peripheral ID7"
|
|
line.long 0x18 "PERIPHID0,Peripheral ID0"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PERIPHID0 ,Peripheral ID0"
|
|
line.long 0x1c "PERIPHID1,Peripheral ID1"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " PERIPHID1 ,Peripheral ID1"
|
|
line.long 0x20 "PERIPHID2,Peripheral ID2"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PERIPHID2 ,Peripheral ID2"
|
|
line.long 0x24 "PERIPHID3,Peripheral ID3"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PERIPHID3 ,Peripheral ID3"
|
|
line.long 0x28 "COMPID0,Component ID0"
|
|
hexmask.long.byte 0x28 0.--7. 1. " COMPID0 ,Component ID0"
|
|
line.long 0x2c "COMPID1,Component ID1"
|
|
hexmask.long.byte 0x2c 0.--7. 1. " COMPID1 ,Component ID1"
|
|
line.long 0x30 "COMPID2,Component ID2"
|
|
hexmask.long.byte 0x30 0.--7. 1. " COMPID2 ,Component ID2"
|
|
line.long 0x34 "COMPID3,Component ID3"
|
|
hexmask.long.byte 0x34 0.--7. 1. " COMPID3 ,Component ID3"
|
|
width 12.
|
|
tree.end
|
|
tree "Instrumentation Trace Macrocell"
|
|
base ad:0xF8805000
|
|
width 14.
|
|
group.long 0x00++0x7f
|
|
line.long 0x0 "STIMPORT0,Stimulus Port Register 0"
|
|
line.long 0x4 "STIMPORT1,Stimulus Port Register 1"
|
|
line.long 0x8 "STIMPORT2,Stimulus Port Register 2"
|
|
line.long 0xC "STIMPORT3,Stimulus Port Register 3"
|
|
line.long 0x10 "STIMPORT4,Stimulus Port Register 4"
|
|
line.long 0x14 "STIMPORT5,Stimulus Port Register 5"
|
|
line.long 0x18 "STIMPORT6,Stimulus Port Register 6"
|
|
line.long 0x1C "STIMPORT7,Stimulus Port Register 7"
|
|
line.long 0x20 "STIMPORT8,Stimulus Port Register 8"
|
|
line.long 0x24 "STIMPORT9,Stimulus Port Register 9"
|
|
line.long 0x28 "STIMPORT10,Stimulus Port Register 10"
|
|
line.long 0x2C "STIMPORT11,Stimulus Port Register 11"
|
|
line.long 0x30 "STIMPORT12,Stimulus Port Register 12"
|
|
line.long 0x34 "STIMPORT13,Stimulus Port Register 13"
|
|
line.long 0x38 "STIMPORT14,Stimulus Port Register 14"
|
|
line.long 0x3C "STIMPORT15,Stimulus Port Register 15"
|
|
line.long 0x40 "STIMPORT16,Stimulus Port Register 16"
|
|
line.long 0x44 "STIMPORT17,Stimulus Port Register 17"
|
|
line.long 0x48 "STIMPORT18,Stimulus Port Register 18"
|
|
line.long 0x4C "STIMPORT19,Stimulus Port Register 19"
|
|
line.long 0x50 "STIMPORT20,Stimulus Port Register 20"
|
|
line.long 0x54 "STIMPORT21,Stimulus Port Register 21"
|
|
line.long 0x58 "STIMPORT22,Stimulus Port Register 22"
|
|
line.long 0x5C "STIMPORT23,Stimulus Port Register 23"
|
|
line.long 0x60 "STIMPORT24,Stimulus Port Register 24"
|
|
line.long 0x64 "STIMPORT25,Stimulus Port Register 25"
|
|
line.long 0x68 "STIMPORT26,Stimulus Port Register 26"
|
|
line.long 0x6C "STIMPORT27,Stimulus Port Register 27"
|
|
line.long 0x70 "STIMPORT28,Stimulus Port Register 28"
|
|
line.long 0x74 "STIMPORT29,Stimulus Port Register 29"
|
|
line.long 0x78 "STIMPORT30,Stimulus Port Register 30"
|
|
line.long 0x7C "STIMPORT31,Stimulus Port Register 31"
|
|
group.long 0xe00++0x03
|
|
line.long 0x00 "TER,Trace Enable Register"
|
|
group.long 0xe20++0x03
|
|
line.long 0x00 "TTR,Trace Trigger Register"
|
|
group.long 0xe80++0x03
|
|
line.long 0x00 "CR,Control Register"
|
|
bitfld.long 0x00 23. " ITMBUSY ,ITM Busy" "Not busy,Busy"
|
|
hexmask.long.byte 0x00 16.--22. 1. " TRACEID ,ATIDM[6:0] value"
|
|
bitfld.long 0x00 8.--9. " TSPRESCALE ,Timestamp Prescaler" "Disabled,Div by 4,Div by 16,Div by 64"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DWTEN ,Enable DWT input port" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SYNCEN ,Enable sync packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TSSEN ,Enable timestamps" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ITMEN ,Enable ITM Stimulus" "Disabled,Enabled"
|
|
group.long 0xe90++0x03
|
|
line.long 0x00 "SCR,Synchronization Control Register"
|
|
hexmask.long.word 0x00 0.--11. 1. " SYNCCOUNT ,Counter value for time between synchronization markers"
|
|
rgroup.long 0xee4++0x03
|
|
line.long 0x00 "ITTRIGOUTACK,Integration Test Trigger Out Acknowledge Register"
|
|
bitfld.long 0x00 0. " ITTRIGOUTACK ,Value of TRIGOUTACK" "Low,High"
|
|
wgroup.long 0xee8++0x07
|
|
line.long 0x00 "ITTRIGOUT,Integration Test Trigger Out Register"
|
|
bitfld.long 0x00 0. " ITTRIGOUT ,Value of TRIGOUT" "Low,High"
|
|
line.long 0x04 "ITATBDATA0,Integration Test ATB Data Register 0"
|
|
bitfld.long 0x04 1. " ITATDATAM7 ,Value of ATDATAM[7]" "Low,High"
|
|
bitfld.long 0x04 0. " ITATDATAM0 ,Value of ATDATAM[0]" "Low,High"
|
|
rgroup.long 0xef0++0x03
|
|
line.long 0x00 "ITATBCTR2,Integration Test ATB Control Register 2"
|
|
bitfld.long 0x00 0. " ITATREADYM ,Value of ATREADYM" "Low,High"
|
|
wgroup.long 0xef4++0x07
|
|
line.long 0x00 "ITATABCTR1,Integration Test ATB Control Register 1"
|
|
hexmask.long.byte 0x00 0.--6. 1. " ITATIDM ,Value of ATIDM[6:0]"
|
|
line.long 0x04 "ITATBCTR0,Integration Test ATB Control Register 0"
|
|
bitfld.long 0x04 1. " ITAFREADYM ,Value of ITAFREADYM" "Low,High"
|
|
bitfld.long 0x04 0. " ITATVALIDM ,Value of ITATVALIDM" "Low,High"
|
|
group.long 0xf00++0x03
|
|
line.long 0x00 "IMCR,Integration Mode Control Register"
|
|
bitfld.long 0x00 0. " ITEN ,Enable Integration Test registers" "Disabled,Enabled"
|
|
group.long 0xfa0++0x07
|
|
line.long 0x00 "CTSR,Claim Tag Set Register"
|
|
bitfld.long 0x00 0.--3. " CTS ,Claim Tag Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "CTCR,Claim Tag Clear Register"
|
|
bitfld.long 0x04 0.--3. " CTC ,Claim Tag Clear" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0xfb0++0x03
|
|
line.long 0x00 "LAR,Lock Access Register"
|
|
rgroup.long 0xfb4++0x07
|
|
line.long 0x00 "LSR,Lock Status Register"
|
|
bitfld.long 0x00 0.--2. " LS ,Lock Status" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "ASR,Authentication Status Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " AS ,Authentication Status"
|
|
rgroup.long 0xfc8++0x37
|
|
line.long 0x00 "DEVID,Device ID"
|
|
hexmask.long.word 0x00 0.--12. 1. " DEVID ,Device ID"
|
|
line.long 0x04 "DTIR,Device Type Identifier Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DTI ,Device Type Identifier"
|
|
line.long 0x08 "PERIPHID4,Peripheral ID4"
|
|
hexmask.long.byte 0x08 0.--7. 1. " PERIPHID4 ,Peripheral ID4"
|
|
line.long 0x0c "PERIPHID5,Peripheral ID5"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " PERIPHID5 ,Peripheral ID5"
|
|
line.long 0x10 "PERIPHID6,Peripheral ID6"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PERIPHID6 ,Peripheral ID6"
|
|
line.long 0x14 "PERIPHID7,Peripheral ID7"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PERIPHID7 ,Peripheral ID7"
|
|
line.long 0x18 "PERIPHID0,Peripheral ID0"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PERIPHID0 ,Peripheral ID0"
|
|
line.long 0x1c "PERIPHID1,Peripheral ID1"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " PERIPHID1 ,Peripheral ID1"
|
|
line.long 0x20 "PERIPHID2,Peripheral ID2"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PERIPHID2 ,Peripheral ID2"
|
|
line.long 0x24 "PERIPHID3,Peripheral ID3"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PERIPHID3 ,Peripheral ID3"
|
|
line.long 0x28 "COMPID0,Component ID0"
|
|
hexmask.long.byte 0x28 0.--7. 1. " COMPID0 ,Component ID0"
|
|
line.long 0x2c "COMPID1,Component ID1"
|
|
hexmask.long.byte 0x2c 0.--7. 1. " COMPID1 ,Component ID1"
|
|
line.long 0x30 "COMPID2,Component ID2"
|
|
hexmask.long.byte 0x30 0.--7. 1. " COMPID2 ,Component ID2"
|
|
line.long 0x34 "COMPID3,Component ID3"
|
|
hexmask.long.byte 0x34 0.--7. 1. " COMPID3 ,Component ID3"
|
|
width 12.
|
|
tree.end
|
|
tree "Trace Port Interface Unit"
|
|
base ad:0xF8803000
|
|
width 17.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "SUPPSIZE,Supported Port Size Register"
|
|
line.long 0x04 "CURRENTSIZE,Current Port Size Register"
|
|
rgroup.long 0x100++0x03
|
|
line.long 0x00 "SUPPTRIGMODE,Supported Trigger Modes Register"
|
|
bitfld.long 0x00 17. " TRGRUN ,Trigger Counter Status" "Not running,Running"
|
|
bitfld.long 0x00 16. " TRIGGERED ,Trigger status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " TCOUNT8 ,8-bit wide counter register" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MULT64K ,Multiply the Trigger Counter by 65536" "Not supported,Supported"
|
|
bitfld.long 0x00 3. " MULT256 ,Multiply the Trigger Counter by 256" "Not supported,Supported"
|
|
bitfld.long 0x00 2. " MULT16 ,Multiply the Trigger Counter by 16" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MULT4 ,Multiply the Trigger Counter by 4" "Not supported,Supported"
|
|
bitfld.long 0x00 0. " MULT2 ,Multiply the Trigger Counter by 2" "Not supported,Supported"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "TRIGCOUNT,Trigger Counter Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TRIGCOUNT ,Trigger Counter"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "TRIGMULT,Trigger Multiplier Register"
|
|
bitfld.long 0x00 4. " MULT64K ,Multiply the Trigger Counter by 65536" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " MULT256 ,Multiply the Trigger Counter by 256" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " MULT16 ,Multiply the Trigger Counter by 16" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MULT4 ,Multiply the Trigger Counter by 4" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " MULT2 ,Multiply the Trigger Counter by 2" "Disabled,Enabled"
|
|
rgroup.long 0x200++0x03
|
|
line.long 0x00 "SUPPTEST,Supported Test Patterns/Modes Register"
|
|
bitfld.long 0x00 17. " PCONTEN ,Continuous mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " PTIMEEN ,Timed mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " PATF0 ,FF/00 Pattern" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PATA5 ,AA/55 Pattern" "Not supported,Supported"
|
|
bitfld.long 0x00 1. " PATW0 ,Walking 0s Pattern" "Not supported,Supported"
|
|
bitfld.long 0x00 0. " PATW1 ,Walking 1s Pattern" "Not supported,Supported"
|
|
group.long 0x204++0x07
|
|
line.long 0x00 "CURRENTTEST,Current Test Patterns/Modes Register"
|
|
bitfld.long 0x00 17. " PCONTEN ,Continuous mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " PTIMEEN ,Timed mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " PATF0 ,FF/00 Pattern" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PATA5 ,AA/55 Pattern" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " PATW0 ,Walking 0s Pattern" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PATW1 ,Walking 1s Pattern" "Disabled,Enabled"
|
|
line.long 0x04 "TESTREPEATCOUNT,TPIU Test Pattern Repeat Counter Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " PATTCOUNT ,number of TRACECLKIN cycles that a pattern runs for before switching to the next pattern"
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "FFSR,Formatter and Flush Status Register"
|
|
bitfld.long 0x00 2. " TCPRESENT ,TRACECTL present" "Not present,Present"
|
|
bitfld.long 0x00 1. " FTSTOPPED ,Formatter stopped" "Not stopped,Stopped"
|
|
bitfld.long 0x00 0. " FLINPROG ,Flush In Progress" "No flush,Flush"
|
|
group.long 0x304++0x07
|
|
line.long 0x00 "FFCR,Formatter and Flush Control Register"
|
|
bitfld.long 0x00 13. " STOPTRIG ,Stop the formatter after a Trigger Event is observed" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " STOPFL ,Stop the formatter after a flush completes" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " TRIGFL ,Indicates a trigger on Flush completion on AFREADYS being returned" "Not triggered,Triggered"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TRIGEVT ,Indicates a trigger on a Trigger Event" "Not triggered,Triggered"
|
|
bitfld.long 0x00 8. " TRIGIN ,Indicate a trigger on TRIGIN being asserted" "Not triggered,Triggered"
|
|
bitfld.long 0x00 6. " FONMAN ,Manually generate a flush of the system" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FONTRIG ,Generate a flush using Trigger event" "Not generated,Generated"
|
|
bitfld.long 0x00 4. " FONFLIN ,Generate flush using the FLUSHIN interface" "Not generated,Generated"
|
|
bitfld.long 0x00 1. " ENFCONT ,Continuous Formatting" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENFTC ,Enable Formatting" "Disabled,Enabled"
|
|
line.long 0x04 "FORMATSYNCCOUNT,Formatter Synchronization Counter Register"
|
|
hexmask.long.word 0x04 0.--11. 1. " CYCCOUNT ,Number of complete frames between full synchronization packets"
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "EXTCTLIN,EXTCTL In Port"
|
|
hexmask.long.byte 0x00 0.--7. 1. " EXTCTLIN ,EXTCTL In Port"
|
|
group.long 0x404++0x03
|
|
line.long 0x00 "EXTCTLOUT,EXTCTL Out Port"
|
|
hexmask.long.byte 0x00 0.--7. 1. " EXTCTLOUT ,EXTCTL Out Port"
|
|
wgroup.long 0xee4++0x03
|
|
line.long 0x00 "ITTRFLINACK,Integration Test Trigger In and Flush In Acknowledge Register"
|
|
bitfld.long 0x00 1. " FLUSHINACK ,Set the value of FLUSHINACK" "Low,High"
|
|
bitfld.long 0x00 0. " TRIGINACK ,Set the value of TRIGINACK" "Low,High"
|
|
rgroup.long 0xee8++0x07
|
|
line.long 0x00 "ITTRFLIN,Integration Test Trigger In and Flush In Register"
|
|
bitfld.long 0x00 1. " FLUSHIN ,Value of FLUSHIN" "Low,High"
|
|
bitfld.long 0x00 0. " TRIGIN ,Value of TRIGIN" "Low,High"
|
|
line.long 0x04 "ITATBDATA0,Integration Test ATB Data Register 0"
|
|
bitfld.long 0x04 4. " ATDATA31 ,Value of ATDATAS[31]" "Low,High"
|
|
bitfld.long 0x04 3. " ATDATA23 ,Value of ATDATAS[23]" "Low,High"
|
|
bitfld.long 0x04 2. " ATDATA15 ,Value of ATDATAS[15]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ATDATA7 ,Value of ATDATAS[7]" "Low,High"
|
|
bitfld.long 0x04 0. " ATDATA0 ,Value of ATDATAS[0]" "Low,High"
|
|
wgroup.long 0xef0++0x03
|
|
line.long 0x00 "ITATBCTR2,Integration Test ATB Control Register 2"
|
|
bitfld.long 0x00 1. " AFVALID ,Set the value of AFVALIDS" "Low,High"
|
|
bitfld.long 0x00 0. " ATREADY ,Set the value of ATREADYS" "Low,High"
|
|
rgroup.long 0xef4++0x07
|
|
line.long 0x00 "ITATABCTR1,Integration Test ATB Control Register 1"
|
|
hexmask.long.byte 0x00 0.--6. 1. " ATID ,Value of ATIDS[6:0]"
|
|
line.long 0x04 "ITATBCTR0,Integration Test ATB Control Register 0"
|
|
bitfld.long 0x04 8.--9. " ATBYTES ,Value of ATBYTESS" "0,1,2,3"
|
|
bitfld.long 0x04 1. " AFREADY ,Value of AFREADYS" "Low,High"
|
|
bitfld.long 0x04 0. " ATVALID ,Value of ATVALIDS" "Low,High"
|
|
group.long 0xf00++0x03
|
|
line.long 0x00 "IMCR,Integration Mode Control Register"
|
|
bitfld.long 0x00 0. " ITEN ,Enable Integration Test registers" "Disabled,Enabled"
|
|
group.long 0xfa0++0x07
|
|
line.long 0x00 "CTSR,Claim Tag Set Register"
|
|
bitfld.long 0x00 0.--3. " CTS ,Claim Tag Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "CTCR,Claim Tag Clear Register"
|
|
bitfld.long 0x04 0.--3. " CTC ,Claim Tag Clear" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0xfb0++0x03
|
|
line.long 0x00 "LAR,Lock Access Register"
|
|
rgroup.long 0xfb4++0x07
|
|
line.long 0x00 "LSR,Lock Status Register"
|
|
bitfld.long 0x00 0.--2. " LS ,Lock Status" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "ASR,Authentication Status Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " AS ,Authentication Status"
|
|
rgroup.long 0xfc8++0x37
|
|
line.long 0x00 "DEVID,Device ID"
|
|
line.long 0x04 "DTIR,Device Type Identifier Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DTI ,Device Type Identifier"
|
|
line.long 0x08 "PERIPHID4,Peripheral ID4"
|
|
hexmask.long.byte 0x08 0.--7. 1. " PERIPHID4 ,Peripheral ID4"
|
|
line.long 0x0c "PERIPHID5,Peripheral ID5"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " PERIPHID5 ,Peripheral ID5"
|
|
line.long 0x10 "PERIPHID6,Peripheral ID6"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PERIPHID6 ,Peripheral ID6"
|
|
line.long 0x14 "PERIPHID7,Peripheral ID7"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PERIPHID7 ,Peripheral ID7"
|
|
line.long 0x18 "PERIPHID0,Peripheral ID0"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PERIPHID0 ,Peripheral ID0"
|
|
line.long 0x1c "PERIPHID1,Peripheral ID1"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " PERIPHID1 ,Peripheral ID1"
|
|
line.long 0x20 "PERIPHID2,Peripheral ID2"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PERIPHID2 ,Peripheral ID2"
|
|
line.long 0x24 "PERIPHID3,Peripheral ID3"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PERIPHID3 ,Peripheral ID3"
|
|
line.long 0x28 "COMPID0,Component ID0"
|
|
hexmask.long.byte 0x28 0.--7. 1. " COMPID0 ,Component ID0"
|
|
line.long 0x2c "COMPID1,Component ID1"
|
|
hexmask.long.byte 0x2c 0.--7. 1. " COMPID1 ,Component ID1"
|
|
line.long 0x30 "COMPID2,Component ID2"
|
|
hexmask.long.byte 0x30 0.--7. 1. " COMPID2 ,Component ID2"
|
|
line.long 0x34 "COMPID3,Component ID3"
|
|
hexmask.long.byte 0x34 0.--7. 1. " COMPID3 ,Component ID3"
|
|
width 12.
|
|
tree.end
|
|
tree "Device Configuration Interface"
|
|
base ad:0xF8007000
|
|
width 16.
|
|
group.long 0x00++0x27
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " FORCE_RST ,Force PSS in to secure reset" "Not forced,Forced"
|
|
bitfld.long 0x00 30. " PCFG_PROG_B ,Program Signal used to reset FPGA" "No reset,Reset"
|
|
bitfld.long 0x00 29. " PCFG_POR_CNT_4K ,FPGA fabric timer" "64K timer,4K timer"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PCAP_PR ,Internal Partial Re-Configuration from PCAP enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " PCAP_MODE ,Enable PCAP interface and disable all FPGA external programming interface" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " QUARTER_PCAP_RATE_EN ,Force only one data send to FPGA every 4 PCAP clock cycles" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " MULTIBOOT_EN ,Multi-boot enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " JTAG_CHAIN_DIS ,JTAG Scan disable" "No,Yes"
|
|
bitfld.long 0x00 15. " USER_MODE ,CPU mode" "ROM,User"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PCFG_AES_FUSE ,Source of the AES key" "BBRAM,eFuse"
|
|
bitfld.long 0x00 9.--11. " PCFG_AES_EN ,Enable AES engine within FPGA Configuration Logic" "Disabled,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Enabled"
|
|
bitfld.long 0x00 8. " SEU_EN ,SEU Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SEC_EN ,PSS Secure Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SPNIDEN ,Secure/priviledged Non-Invasive Debug Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SPIDEN ,Secure/privileged Invasive Debug Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " NIDEN ,Non-Invasive Debug Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " DBGEN ,Invasive Debug Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--2. " DAP_EN ,ARM DAP Enable" "Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Enabled"
|
|
line.long 0x04 "LOCK,LOCK Register"
|
|
bitfld.long 0x04 4. " AES_FUSE_LOCK ,PCFG_AES_FUSE Lock" "Not locked,Locked"
|
|
bitfld.long 0x04 3. " AES_EN_LOCK ,PCFG_AES_EN Lock" "Not locked,Locked"
|
|
bitfld.long 0x04 2. " SEU_LOCK ,SEU_En Lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SEC_LOCK ,SEC_EN and USER_MODE Lock" "Not locked,Locked"
|
|
bitfld.long 0x04 0. " DBG_LOCK ,Security Configuration Bits Lock" "Not locked,Locked"
|
|
line.long 0x08 "CFG,Configuration Register"
|
|
bitfld.long 0x08 10.--11. " RFIFO_TH ,Rx FIFO level that sets interrupt flag" "1/4 full,1/2 full,3/4 full,Full"
|
|
bitfld.long 0x08 8.--9. " WFIFO_TH ,Tx FIFO level that sets interrupt flag" "1/4 empty,1/2 empty,3/4 empty,Empty"
|
|
bitfld.long 0x08 7. " RCLK_EDGE ,Read data active clock edge" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x08 6. " WCLK_EDGE ,Write data active clock edge" "Falling,Rising"
|
|
bitfld.long 0x08 5. " DISABLE_SRC_INC ,Disable automatic DMA AXI source address increment," "No,Yes"
|
|
bitfld.long 0x08 4. " DISABLE_DST_INC ,Disable automatic DMA AXI destination address increment" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x08 3. " RD_ISSUE ,AXI read issuing capability" "4,8"
|
|
bitfld.long 0x08 2. " WR_ISSUE ,AXI write issuing capability" "2,4"
|
|
bitfld.long 0x08 1. " RDLEN ,AXI read burst length" "8,16"
|
|
textline " "
|
|
bitfld.long 0x08 0. " WRLEN ,AXI write burst length" "8,16"
|
|
line.long 0x0c "INT_STS,Interrupt Status Register"
|
|
eventfld.long 0x0C 31. " PSS_GTS_USR_B_INT ,Tri-state IO during HIZ (both edges)" "No interrupt,Interrupt"
|
|
eventfld.long 0x0C 30. " PSS_FST_CFG_B_INT ,First configuration done (both edges)" "No interrupt,Interrupt"
|
|
eventfld.long 0x0C 29. " PSS_GPWRDWN_B_INT ,Global power down (both edges)" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0C 28. " PSS_GTS_CFG_B_INT ,Tri-state IO during configuration (both edges)" "No interrupt,Interrupt"
|
|
eventfld.long 0x0C 27. " PSS_CFG_RESET_B_INT ,Config reset (both edges)" "No interrupt,Interrupt"
|
|
eventfld.long 0x0C 23. " AXI_WTO_INT ,AXI write timeout" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0C 22. " AXI_WERR_INT ,AXI write response error" "No interrupt,Interrupt"
|
|
eventfld.long 0x0C 21. " AXI_RTO_INT ,AXI read timeout" "No interrupt,Interrupt"
|
|
eventfld.long 0x0C 20. " AXI_RERR_INT ,AXI read response error" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0C 18. " RX_FIFO_OV_INT ,RX FIFO overflow" "No interrupt,Interrupt"
|
|
eventfld.long 0x0C 17. " WR_FIFO_LVL_INT ,Tx FIFO level < treshold" "No interrupt,Interrupt"
|
|
eventfld.long 0x0C 16. " RD_FIFO_LVL_INT ,Rx FIFO level >= threshold" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0C 15. " DMA_CMD_ERR_INT ,Illegal DMA command" "No interrupt,Interrupt"
|
|
eventfld.long 0x0C 14. " DMA_Q_OV_INT ,DMA command queue overflow" "No interrupt,Interrupt"
|
|
eventfld.long 0x0C 13. " DMA_DONE_INT ,DMA command done" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0C 12. " D_P_DONE_INT ,DMA and PCAP transfers are done" "No interrupt,Interrupt"
|
|
eventfld.long 0x0C 11. " P2D_LEN_ERR_INT ,Inconsistent PCAP to DMA transfer length error" "No interrupt,Interrupt"
|
|
eventfld.long 0x0C 6. " PCFG_HMAC_ERR_INT ,HMAC error from FPGA" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0C 5. " PCFG_SEU_ERR_INT ,SEU status from FPGA" "No interrupt,Interrupt"
|
|
eventfld.long 0x0C 4. " PCFG_POR_B_INT ,FPGA POR Indication" "No interrupt,Interrupt"
|
|
eventfld.long 0x0C 3. " PCFG_CFG_RST_INT ,FPGA under reset" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0C 2. " PCFG_DONE_INT ,Done Status signal from FPGA" "No interrupt,Interrupt"
|
|
eventfld.long 0x0C 1. " PCFG_INIT_PE_INT ,Positive edge of Init signal from FPGA" "No interrupt,Interrupt"
|
|
eventfld.long 0x0C 0. " PCFG_INIT_NE_INT ,Negative edge of Init signal from FPGA" "No interrupt,Interrupt"
|
|
line.long 0x10 "INT_MASK,Interrupt Mask Register"
|
|
bitfld.long 0x10 31. " M_PSS_GTS_USR_B_INT ,Interrupt mask for tri-state IO during HIZ both edges" "Not masked,Masked"
|
|
bitfld.long 0x10 30. " M_PSS_FST_CFG_B_INT ,Interrupt mask for first config done both edges" "Not masked,Masked"
|
|
bitfld.long 0x10 29. " M_PSS_GPWRDWN_B_INT ,Interrupt mask for global power down both edges" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x10 28. " M_PSS_GTS_CFG_B_INT ,Interrupt mask for tri-state IO in config both edges" "Not masked,Masked"
|
|
bitfld.long 0x10 27. " M_PSS_CFG_RESET_B_INT ,Interrupt mask for config reset both edges" "Not masked,Masked"
|
|
bitfld.long 0x10 23. " M_AXI_WTO_INT ,Interrupt mask for AXI write time out interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x10 22. " M_AXI_WERR_INT ,Interrupt mask for AXI write response error interrupt" "Not masked,Masked"
|
|
bitfld.long 0x10 21. " M_AXI_RTO_INT ,Interrupt mask for AXI read time out interrupt" "Not masked,Masked"
|
|
bitfld.long 0x10 20. " M_AXI_RERR_INT ,Interrupt mask for AXI read response error interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x10 18. " M_RX_FIFO_OV_INT ,Interrupt mask for Rx FIFO overflow interrupt" "Not masked,Masked"
|
|
bitfld.long 0x10 17. " M_WR_FIFO_LVL_INT ,Interrupt mask for Tx FIFO level < threshold interrupt" "Not masked,Masked"
|
|
bitfld.long 0x10 16. " M_RD_FIFO_LVL_INT ,Interrupt mask for Rx FIFO level > threshold interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x10 15. " M_DMA_CMD_ERR_INT ,Interrupt mask for illegal DMA command interrupt" "Not masked,Masked"
|
|
bitfld.long 0x10 14. " M_DMA_FIFO_OV_INT ,Interrupt mask for DMA command FIFO overflows M" "Not masked,Masked"
|
|
bitfld.long 0x10 13. " M_DMA_DONE_INT ,Interrupt mask for DMA command done interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x10 12. " M_D_P_DONE_INT ,Interrupt mask for DMA and PCAP done interrupt" "Not masked,Masked"
|
|
bitfld.long 0x10 11. " M_P2D_LEN_ERR_INT ,Interrupt mask Inconsistent xfer length error interrupt" "Not masked,Masked"
|
|
bitfld.long 0x10 6. " M_PCFG_HMAC_ERR_INT ,Interrupt mask for HMAC error" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x10 5. " M_PCFG_SEU_ERR_INT ,Interrupt mask for PCFG_SEU_ERR interrupt" "Not masked,Masked"
|
|
bitfld.long 0x10 4. " M_PCFG_POR_B_INT ,Interrupt mask for PCFG_POR_B Interrupt" "Not masked,Masked"
|
|
bitfld.long 0x10 3. " M_PCFG_CFG_RST_INT ,Interrupt mask for PCFG_CFG_RESET interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x10 2. " M_PCFG_DONE_INT ,Interrupt mask for PCFG_DONE interrupt" "Not masked,Masked"
|
|
bitfld.long 0x10 1. " M_PCFG_INIT_PE_INT ,Interrupt mask for PCFG_INIT_PE interrupt" "Not masked,Masked"
|
|
bitfld.long 0x10 0. " M_PCFG_INIT_NE_INT ,Interrupt mask for PCFG_INIT_NE interrupt" "Not masked,Masked"
|
|
line.long 0x14 "STATUS,Status Register"
|
|
bitfld.long 0x14 31. " DMA_CMD_Q_F ,DMA command queue full" "Not full,Full"
|
|
bitfld.long 0x14 30. " DMA_CMD_Q_E ,DMA command queue empty" "Not empty,Empty"
|
|
bitfld.long 0x14 28.--29. " DMA_DONE_CNT ,Number of completed DMA transfers that have not been acknowledged by software" "All,One,Two,Three"
|
|
textline " "
|
|
bitfld.long 0x14 20.--24. " RX_FIFO_LVL ,RxFIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x14 12.--18. 1. " TX_FIFO_LVL ,TxFIFO level"
|
|
bitfld.long 0x14 11. " PSS_GTS_USR_B ,Tri-state IO during HIZ" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 10. " PSS_FST_CFG_B ,First config done" "Disabled,Enabled"
|
|
bitfld.long 0x14 9. " PSS_GPWRDWN_B ,Global power down" "Disabled,Enabled"
|
|
bitfld.long 0x14 8. " PSS_GTS_CFG_B ,Tri-state IO during config" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 7. " SECURE_RST ,POR only clear register used to remember secure violation reset" "No reset,Reset"
|
|
bitfld.long 0x14 6. " ILLEGAL_APB_ACCESS ,Illegal first APB access" "Disabled,Enabled"
|
|
bitfld.long 0x14 5. " PSS_CFG_RESET_B ,PSS configuration reset" "Reset,No reset"
|
|
textline " "
|
|
bitfld.long 0x14 4. " PCFG_INIT ,Input signal from FPGA to indicate the init status" "Low,High"
|
|
bitfld.long 0x14 3. " EFUSE_SW_RESERVE ,Input signal from FPGA to indicate efuse status" "Low,High"
|
|
bitfld.long 0x14 2. " EFUSE_SEC_EN ,Input signal from FPGA to indicate efuse status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x14 1. " EFUSE_JTAG_DIS ,Input signal from FPGA to indicate efuse status" "Low,High"
|
|
bitfld.long 0x14 0. " SECURE_DIS ,Indicate security disable" "No,Yes"
|
|
line.long 0x18 "DMA_SRC_ADDR,DMA Source Address Register"
|
|
line.long 0x1C "DMA_DST_ADDR,DMA Destination Address Register"
|
|
line.long 0x20 "DMA_SRC_LEN,DMA Source Transfer Length Register"
|
|
hexmask.long 0x20 0.--26. 1. " LEN ,Length"
|
|
line.long 0x24 "DMA_DEST_LEN,DMA Destination Transfer Length Register"
|
|
hexmask.long 0x24 0.--26. 1. " LEN ,Length"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "ROM_SHADOW,ROM Shadow Register"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "MULTIBOOT_ADDR,MULTI Boot Address Pointer Register"
|
|
if (((d.l(ad:0xF8007000))&0x8000)==0x8000)
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "SW_ID,Software ID Register"
|
|
else
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "SW_ID,Software ID Register"
|
|
endif
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "UNLOCK,Unlock Register"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "MCTRL,Miscellaneous control Register"
|
|
bitfld.long 0x00 4. " INT_PCAP_LPBK ,Internal PCAP loopback" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RFIFO_FLUSH ,Rx FIFO Flush" "Not flushed,Flushed"
|
|
bitfld.long 0x00 0. " WFIFO_FLUSH ,Tx FIFO Flush" "Not flushed,Flushed"
|
|
group.long 0x100++0x0B
|
|
line.long 0x00 "SYSM_CFG,Sysmon Interface Configuration Register"
|
|
bitfld.long 0x00 31. " ENABLE ,Enable PSS access of the System Monitor" "Disabled,Enabled"
|
|
bitfld.long 0x00 20.--23. " CFIFOTH ,Command FIFO level threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. " DFIFOTH ,Data FIFO level threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 13. " WEDGE ,Write launch edge" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " REDGE ,Read capture edge" "Falling,Rising"
|
|
bitfld.long 0x00 8.--9. " TCKRATE ,System Monitor clock tck frequency control" "1/2,1/4,1/8,1/16"
|
|
bitfld.long 0x00 0.--4. " IGAP ,Minimum idle gap between successive commands" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "SYSM_INT_STS,Sysmon Interface Interrupt Status Register"
|
|
eventfld.long 0x04 9. " CFIFO_LTH ,Command FIFO level less than or equal to the threshold" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 8. " DFIFO_GTH ,Data FIFO level greater than threshold" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 7. " OT ,Over temperature alarm from the System Monitor" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 6. " ALM[6] ,Alarm signal from System Monitor 6" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 5. " ALM[5] ,Alarm signal from System Monitor 5" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 4. " ALM[4] ,Alarm signal from System Monitor 4" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 3. " ALM[3] ,Alarm signal from System Monitor 3" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 2. " ALM[2] ,Alarm signal from System Monitor 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 1. " ALM[1] ,Alarm signal from System Monitor 1" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 0. " ALM[0] ,Alarm signal from System Monitor 0" "No interrupt,Interrupt"
|
|
line.long 0x08 "SYSM_INT_MASK,Sysmon Interface Interrupt Mask Register"
|
|
bitfld.long 0x08 9. " CFIFO_LTH ,Interrupt mask for command FIFO level less than or equal to the threshold" "Not masked,Masked"
|
|
bitfld.long 0x08 8. " DFIFO_GTH ,Interrupt mask data FIFO level greater than threshold" "Not masked,Masked"
|
|
bitfld.long 0x08 7. " OT ,Interrupt mask for over temperature alarm from the System Monitor" "Not masked,Masked"
|
|
bitfld.long 0x08 6. " ALM[6] ,Interrupt mask for alarm signal from System Monitor 6" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 5. " ALM[5] ,Interrupt mask for alarm signal from System Monitor 5" "Not masked,Masked"
|
|
bitfld.long 0x08 4. " ALM[4] ,Interrupt mask for alarm signal from System Monitor 4" "Not masked,Masked"
|
|
bitfld.long 0x08 3. " ALM[3] ,Interrupt mask for alarm signal from System Monitor 3" "Not masked,Masked"
|
|
bitfld.long 0x08 2. " ALM[2] ,Interrupt mask for alarm signal from System Monitor 2" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ALM[1] ,Interrupt mask for alarm signal from System Monitor 1" "Not masked,Masked"
|
|
bitfld.long 0x08 0. " ALM[0] ,Interrupt mask for alarm signal from System Monitor 0" "Not masked,Masked"
|
|
rgroup.long 0x10C++0x03
|
|
line.long 0x00 "SYSM_MSTS,Sysmon Interface miscellaneous Status Register"
|
|
bitfld.long 0x00 16.--19. " CFIFO_LVL ,Command FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DFIFO_LVL ,Data FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. " CFIFOF ,Command FIFO full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CFIFOE ,Command FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x00 9. " DFIFOF ,Data FIFO full" "Not full,Full"
|
|
bitfld.long 0x00 8. " DFIFOE ,Data FIFO empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 7. " OT ,Raw over temperature alarm from the System Monitor" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " ALM[6] ,Raw alarm signal from System Monitor 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ALM[5] ,Raw alarm signal from System Monitor 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ALM[4] ,Raw alarm signal from System Monitor 4" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ALM[3] ,Raw alarm signal from System Monitor 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ALM[2] ,Raw alarm signal from System Monitor 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ALM[1] ,Raw alarm signal from System Monitor 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ALM[0] ,Raw alarm signal from System Monitor 0" "Disabled,Enabled"
|
|
wgroup.long 0x110++0x03
|
|
line.long 0x00 "SYSM_CMDFIFO,Sysmon Interface Command FIFO Register"
|
|
rgroup.long 0x114++0x03
|
|
line.long 0x00 "SYSM_RDFIFO,Sysmon Interface Data FIFO Register"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "SYSM_MCTL,Sysmon Interface Miscellaneous Control Register"
|
|
bitfld.long 0x00 4. " RESET ,Drives the sysmon_pss_reset signal" "No reset,Reset"
|
|
bitfld.long 0x00 0. " FLUSH ,Flush the command and data FIFOs" "Not flushed,Flushed"
|
|
width 12.
|
|
tree.end
|
|
tree.open "DMA Controller"
|
|
tree "DMAC0_NS"
|
|
base ad:0xF8004000
|
|
width 23.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "DSR,DMA manager status register"
|
|
bitfld.long 0x00 9. " DNS ,Provides the security status of the DMA manager thread" "Secure,Non-secure"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_EVENT ,Wakeup event" "Event[0],Event[1],Event[2],Event[3],Event[4],Event[5],Event[6],Event[7],Event[8],Event[9],Event[10],Event[11],Event[12],Event[13],Event[14],Event[15],Event[16],Event[17],Event[18],Event[19],Event[20],Event[21],Event[22],Event[23],Event[24],Event[25],Event[26],Event[27],Event[28],Event[29],Event[30],Event[31]"
|
|
bitfld.long 0x00 0.--3. " DMA_STATUS ,The operating state of the DMA manager" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Faulting"
|
|
line.long 0x04 "DPC,DMA Program Counter Register"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "INTEN,Interrupt enable register"
|
|
bitfld.long 0x00 31. " EVENT_IRQ_SELECT[31] ,Event Interrupt Request Enable 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " EVENT_IRQ_SELECT[30] ,Event Interrupt Request Enable 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " EVENT_IRQ_SELECT[29] ,Event Interrupt Request Enable 29" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EVENT_IRQ_SELECT[28] ,Event Interrupt Request Enable 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EVENT_IRQ_SELECT[27] ,Event Interrupt Request Enable 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " EVENT_IRQ_SELECT[26] ,Event Interrupt Request Enable 26" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " EVENT_IRQ_SELECT[25] ,Event Interrupt Request Enable 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " EVENT_IRQ_SELECT[24] ,Event Interrupt Request Enable 24" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " EVENT_IRQ_SELECT[23] ,Event Interrupt Request Enable 23" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " EVENT_IRQ_SELECT[22] ,Event Interrupt Request Enable 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " EVENT_IRQ_SELECT[21] ,Event Interrupt Request Enable 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " EVENT_IRQ_SELECT[20] ,Event Interrupt Request Enable 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " EVENT_IRQ_SELECT[19] ,Event Interrupt Request Enable 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " EVENT_IRQ_SELECT[18] ,Event Interrupt Request Enable 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " EVENT_IRQ_SELECT[17] ,Event Interrupt Request Enable 17" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EVENT_IRQ_SELECT[16] ,Event Interrupt Request Enable 16" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " EVENT_IRQ_SELECT[15] ,Event Interrupt Request Enable 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " EVENT_IRQ_SELECT[14] ,Event Interrupt Request Enable 14" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " EVENT_IRQ_SELECT[13] ,Event Interrupt Request Enable 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " EVENT_IRQ_SELECT[12] ,Event Interrupt Request Enable 12" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " EVENT_IRQ_SELECT[11] ,Event Interrupt Request Enable 11" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " EVENT_IRQ_SELECT[10] ,Event Interrupt Request Enable 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " EVENT_IRQ_SELECT[9] ,Event Interrupt Request Enable 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " EVENT_IRQ_SELECT[8] ,Event Interrupt Request Enable 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " EVENT_IRQ_SELECT[7] ,Event Interrupt Request Enable 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " EVENT_IRQ_SELECT[6] ,Event Interrupt Request Enable 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EVENT_IRQ_SELECT[5] ,Event Interrupt Request Enable 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EVENT_IRQ_SELECT[4] ,Event Interrupt Request Enable 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EVENT_IRQ_SELECT[3] ,Event Interrupt Request Enable 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " EVENT_IRQ_SELECT[2] ,Event Interrupt Request Enable 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " EVENT_IRQ_SELECT[1] ,Event Interrupt Request Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EVENT_IRQ_SELECT[0] ,Event Interrupt Request Enable 0" "Disabled,Enabled"
|
|
group.long 0x24++0x07
|
|
line.long 0x00 "INT_EVENT_RIS,Event interrupt raw status register"
|
|
bitfld.long 0x00 31. " DMASEV_ACTIVE[31] ,Status of the event-interrupt 31" "Inactive,Active"
|
|
bitfld.long 0x00 30. " DMASEV_ACTIVE[30] ,Status of the event-interrupt 30" "Inactive,Active"
|
|
bitfld.long 0x00 29. " DMASEV_ACTIVE[29] ,Status of the event-interrupt 29" "Inactive,Active"
|
|
bitfld.long 0x00 28. " DMASEV_ACTIVE[28] ,Status of the event-interrupt 28" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DMASEV_ACTIVE[27] ,Status of the event-interrupt 27" "Inactive,Active"
|
|
bitfld.long 0x00 26. " DMASEV_ACTIVE[26] ,Status of the event-interrupt 26" "Inactive,Active"
|
|
bitfld.long 0x00 25. " DMASEV_ACTIVE[25] ,Status of the event-interrupt 25" "Inactive,Active"
|
|
bitfld.long 0x00 24. " DMASEV_ACTIVE[24] ,Status of the event-interrupt 24" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DMASEV_ACTIVE[23] ,Status of the event-interrupt 23" "Inactive,Active"
|
|
bitfld.long 0x00 22. " DMASEV_ACTIVE[22] ,Status of the event-interrupt 22" "Inactive,Active"
|
|
bitfld.long 0x00 21. " DMASEV_ACTIVE[21] ,Status of the event-interrupt 21" "Inactive,Active"
|
|
bitfld.long 0x00 20. " DMASEV_ACTIVE[20] ,Status of the event-interrupt 20" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DMASEV_ACTIVE[19] ,Status of the event-interrupt 19" "Inactive,Active"
|
|
bitfld.long 0x00 18. " DMASEV_ACTIVE[18] ,Status of the event-interrupt 18" "Inactive,Active"
|
|
bitfld.long 0x00 17. " DMASEV_ACTIVE[17] ,Status of the event-interrupt 17" "Inactive,Active"
|
|
bitfld.long 0x00 16. " DMASEV_ACTIVE[16] ,Status of the event-interrupt 16" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DMASEV_ACTIVE[15] ,Status of the event-interrupt 15" "Inactive,Active"
|
|
bitfld.long 0x00 14. " DMASEV_ACTIVE[14] ,Status of the event-interrupt 14" "Inactive,Active"
|
|
bitfld.long 0x00 13. " DMASEV_ACTIVE[13] ,Status of the event-interrupt 13" "Inactive,Active"
|
|
bitfld.long 0x00 12. " DMASEV_ACTIVE[12] ,Status of the event-interrupt 12" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DMASEV_ACTIVE[11] ,Status of the event-interrupt 11" "Inactive,Active"
|
|
bitfld.long 0x00 10. " DMASEV_ACTIVE[10] ,Status of the event-interrupt 10" "Inactive,Active"
|
|
bitfld.long 0x00 9. " DMASEV_ACTIVE[9] ,Status of the event-interrupt 9" "Inactive,Active"
|
|
bitfld.long 0x00 8. " DMASEV_ACTIVE[8] ,Status of the event-interrupt 8" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DMASEV_ACTIVE[7] ,Status of the event-interrupt 7" "Inactive,Active"
|
|
bitfld.long 0x00 6. " DMASEV_ACTIVE[6] ,Status of the event-interrupt 6" "Inactive,Active"
|
|
bitfld.long 0x00 5. " DMASEV_ACTIVE[5] ,Status of the event-interrupt 5" "Inactive,Active"
|
|
bitfld.long 0x00 4. " DMASEV_ACTIVE[4] ,Status of the event-interrupt 4" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DMASEV_ACTIVE[3] ,Status of the event-interrupt 3" "Inactive,Active"
|
|
bitfld.long 0x00 2. " DMASEV_ACTIVE[2] ,Status of the event-interrupt 2" "Inactive,Active"
|
|
bitfld.long 0x00 1. " DMASEV_ACTIVE[1] ,Status of the event-interrupt 1" "Inactive,Active"
|
|
bitfld.long 0x00 0. " DMASEV_ACTIVE[0] ,Status of the event-interrupt 0" "Inactive,Active"
|
|
line.long 0x04 "INTMIS,Interrupt status register"
|
|
bitfld.long 0x04 31. " IRQ_STATUS[31] ,Status of the interrupt 31" "Inactive,Active"
|
|
bitfld.long 0x04 30. " IRQ_STATUS[30] ,Status of the interrupt 30" "Inactive,Active"
|
|
bitfld.long 0x04 29. " IRQ_STATUS[29] ,Status of the interrupt 29" "Inactive,Active"
|
|
bitfld.long 0x04 28. " IRQ_STATUS[28] ,Status of the interrupt 28" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 27. " IRQ_STATUS[27] ,Status of the interrupt 27" "Inactive,Active"
|
|
bitfld.long 0x04 26. " IRQ_STATUS[26] ,Status of the interrupt 26" "Inactive,Active"
|
|
bitfld.long 0x04 25. " IRQ_STATUS[25] ,Status of the interrupt 25" "Inactive,Active"
|
|
bitfld.long 0x04 24. " IRQ_STATUS[24] ,Status of the interrupt 24" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 23. " IRQ_STATUS[23] ,Status of the interrupt 23" "Inactive,Active"
|
|
bitfld.long 0x04 22. " IRQ_STATUS[22] ,Status of the interrupt 22" "Inactive,Active"
|
|
bitfld.long 0x04 21. " IRQ_STATUS[21] ,Status of the interrupt 21" "Inactive,Active"
|
|
bitfld.long 0x04 20. " IRQ_STATUS[20] ,Status of the interrupt 20" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " IRQ_STATUS[19] ,Status of the interrupt 19" "Inactive,Active"
|
|
bitfld.long 0x04 18. " IRQ_STATUS[18] ,Status of the interrupt 18" "Inactive,Active"
|
|
bitfld.long 0x04 17. " IRQ_STATUS[17] ,Status of the interrupt 17" "Inactive,Active"
|
|
bitfld.long 0x04 16. " IRQ_STATUS[16] ,Status of the interrupt 16" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 15. " IRQ_STATUS[15] ,Status of the interrupt 15" "Inactive,Active"
|
|
bitfld.long 0x04 14. " IRQ_STATUS[14] ,Status of the interrupt 14" "Inactive,Active"
|
|
bitfld.long 0x04 13. " IRQ_STATUS[13] ,Status of the interrupt 13" "Inactive,Active"
|
|
bitfld.long 0x04 12. " IRQ_STATUS[12] ,Status of the interrupt 12" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 11. " IRQ_STATUS[11] ,Status of the interrupt 11" "Inactive,Active"
|
|
bitfld.long 0x04 10. " IRQ_STATUS[10] ,Status of the interrupt 10" "Inactive,Active"
|
|
bitfld.long 0x04 9. " IRQ_STATUS[9] ,Status of the interrupt 9" "Inactive,Active"
|
|
bitfld.long 0x04 8. " IRQ_STATUS[8] ,Status of the interrupt 8" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " IRQ_STATUS[7] ,Status of the interrupt 7" "Inactive,Active"
|
|
bitfld.long 0x04 6. " IRQ_STATUS[6] ,Status of the interrupt 6" "Inactive,Active"
|
|
bitfld.long 0x04 5. " IRQ_STATUS[5] ,Status of the interrupt 5" "Inactive,Active"
|
|
bitfld.long 0x04 4. " IRQ_STATUS[4] ,Status of the interrupt 4" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 3. " IRQ_STATUS[3] ,Status of the interrupt 3" "Inactive,Active"
|
|
bitfld.long 0x04 2. " IRQ_STATUS[2] ,Status of the interrupt 2" "Inactive,Active"
|
|
bitfld.long 0x04 1. " IRQ_STATUS[1] ,Status of the interrupt 1" "Inactive,Active"
|
|
bitfld.long 0x04 0. " IRQ_STATUS[0] ,Status of the interrupt 0" "Inactive,Active"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "INTCLR,Interrupt clear register"
|
|
bitfld.long 0x00 31. " IRQ_CLR[31] ,Interrupt 31 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 30. " IRQ_CLR[30] ,Interrupt 30 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 29. " IRQ_CLR[29] ,Interrupt 29 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 28. " IRQ_CLR[28] ,Interrupt 28 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 27. " IRQ_CLR[27] ,Interrupt 27 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 26. " IRQ_CLR[26] ,Interrupt 26 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 25. " IRQ_CLR[25] ,Interrupt 25 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 24. " IRQ_CLR[24] ,Interrupt 24 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IRQ_CLR[23] ,Interrupt 23 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " IRQ_CLR[22] ,Interrupt 22 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " IRQ_CLR[21] ,Interrupt 21 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 20. " IRQ_CLR[20] ,Interrupt 20 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQ_CLR[19] ,Interrupt 19 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " IRQ_CLR[18] ,Interrupt 18 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 17. " IRQ_CLR[17] ,Interrupt 17 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " IRQ_CLR[16] ,Interrupt 16 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IRQ_CLR[15] ,Interrupt 15 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 14. " IRQ_CLR[14] ,Interrupt 14 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 13. " IRQ_CLR[13] ,Interrupt 13 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 12. " IRQ_CLR[12] ,Interrupt 12 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQ_CLR[11] ,Interrupt 11 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 10. " IRQ_CLR[10] ,Interrupt 10 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 9. " IRQ_CLR[9] ,Interrupt 9 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 8. " IRQ_CLR[8] ,Interrupt 8 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQ_CLR[7] ,Interrupt 7 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 6. " IRQ_CLR[6] ,Interrupt 6 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " IRQ_CLR[5] ,Interrupt 5 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 4. " IRQ_CLR[4] ,Interrupt 4 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IRQ_CLR[3] ,Interrupt 3 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " IRQ_CLR[2] ,Interrupt 2 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 1. " IRQ_CLR[1] ,Interrupt 1 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " IRQ_CLR[0] ,Interrupt 0 clear" "No effect,Cleared"
|
|
group.long 0x30++0x0B
|
|
line.long 0x00 "FSRD,Fault status DMA manager register"
|
|
bitfld.long 0x00 0. " FS_MGR ,Provides the fault status of the DMA manager" "Disabled,Enabled"
|
|
line.long 0x04 "FSRC,Fault status DMA channel register"
|
|
bitfld.long 0x04 7. " FAULT_STATUS ,Fault status of the channel 7" "Not present,Present"
|
|
bitfld.long 0x04 6. " FAULT_STATUS ,Fault status of the channel 6" "Not present,Present"
|
|
bitfld.long 0x04 5. " FAULT_STATUS ,Fault status of the channel 5" "Not present,Present"
|
|
bitfld.long 0x04 4. " FAULT_STATUS ,Fault status of the channel 4" "Not present,Present"
|
|
textline " "
|
|
bitfld.long 0x04 3. " FAULT_STATUS ,Fault status of the channel 3" "Not present,Present"
|
|
bitfld.long 0x04 2. " FAULT_STATUS ,Fault status of the channel 2" "Not present,Present"
|
|
bitfld.long 0x04 1. " FAULT_STATUS ,Fault status of the channel 1" "Not present,Present"
|
|
bitfld.long 0x04 0. " FAULT_STATUS ,Fault status of the channel 0" "Not present,Present"
|
|
line.long 0x08 "FTRD,Fault type DMA manager register"
|
|
bitfld.long 0x08 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
bitfld.long 0x08 16. " INSTR_FETCH_ERR ,Indicates the AXI response that the DMAC receives on the RRESP bus after the DMA manager" "No error,Error"
|
|
bitfld.long 0x08 5. " MGR_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x08 4. " DMAGO_ERR ,Execute DMAGO with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x08 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x08 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
tree "DMA Channel 0"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "FTR0,Default type for DMA channel 0"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
group.long 0x100++0x07
|
|
line.long 0x00 "CSR0,Channel status for DMA channel 0"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC0,Channel PC for DMA channel 0"
|
|
group.long 0x400++0x13
|
|
line.long 0x00 "SAR0,Source address for DMA channel 0"
|
|
line.long 0x04 "DAR0,Destination address for DMA channel 0"
|
|
line.long 0x08 "CCR0,Channel control for DMA channel 0"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_0,Loop counter 0 for DMA channel 0"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_0,Loop counter 1 for DMA channel 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA Channel 1"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "FTR1,Default type for DMA channel 1"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
group.long 0x108++0x07
|
|
line.long 0x00 "CSR1,Channel status for DMA channel 1"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC1,Channel PC for DMA channel 1"
|
|
group.long 0x420++0x13
|
|
line.long 0x00 "SAR1,Source address for DMA channel 1"
|
|
line.long 0x04 "DAR1,Destination address for DMA channel 1"
|
|
line.long 0x08 "CCR1,Channel control for DMA channel 1"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_1,Loop counter 0 for DMA channel 1"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_1,Loop counter 1 for DMA channel 1"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA Channel 2"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "FTR2,Default type for DMA channel 2"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
group.long 0x110++0x07
|
|
line.long 0x00 "CSR2,Channel status for DMA channel 2"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC2,Channel PC for DMA channel 2"
|
|
group.long 0x440++0x13
|
|
line.long 0x00 "SAR2,Source address for DMA channel 2"
|
|
line.long 0x04 "DAR2,Destination address for DMA channel 2"
|
|
line.long 0x08 "CCR2,Channel control for DMA channel 2"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_2,Loop counter 0 for DMA channel 2"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_2,Loop counter 1 for DMA channel 2"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA Channel 3"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "FTR3,Default type for DMA channel 3"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
group.long 0x118++0x07
|
|
line.long 0x00 "CSR3,Channel status for DMA channel 3"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC3,Channel PC for DMA channel 3"
|
|
group.long 0x460++0x13
|
|
line.long 0x00 "SAR3,Source address for DMA channel 3"
|
|
line.long 0x04 "DAR3,Destination address for DMA channel 3"
|
|
line.long 0x08 "CCR3,Channel control for DMA channel 3"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_3,Loop counter 0 for DMA channel 3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_3,Loop counter 1 for DMA channel 3"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA Channel 4"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "FTR4,Default type for DMA channel 4"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
group.long 0x120++0x07
|
|
line.long 0x00 "CSR4,Channel status for DMA channel 4"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC4,Channel PC for DMA channel 4"
|
|
group.long 0x480++0x13
|
|
line.long 0x00 "SAR4,Source address for DMA channel 4"
|
|
line.long 0x04 "DAR4,Destination address for DMA channel 4"
|
|
line.long 0x08 "CCR4,Channel control for DMA channel 4"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_4,Loop counter 0 for DMA channel 4"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_4,Loop counter 1 for DMA channel 4"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA Channel 5"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "FTR5,Default type for DMA channel 5"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
group.long 0x128++0x07
|
|
line.long 0x00 "CSR5,Channel status for DMA channel 5"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC5,Channel PC for DMA channel 5"
|
|
group.long 0x4A0++0x13
|
|
line.long 0x00 "SAR5,Source address for DMA channel 5"
|
|
line.long 0x04 "DAR5,Destination address for DMA channel 5"
|
|
line.long 0x08 "CCR5,Channel control for DMA channel 5"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_5,Loop counter 0 for DMA channel 5"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_5,Loop counter 1 for DMA channel 5"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA Channel 6"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "FTR6,Default type for DMA channel 6"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
group.long 0x130++0x07
|
|
line.long 0x00 "CSR6,Channel status for DMA channel 6"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC6,Channel PC for DMA channel 6"
|
|
group.long 0x4C0++0x13
|
|
line.long 0x00 "SAR6,Source address for DMA channel 6"
|
|
line.long 0x04 "DAR6,Destination address for DMA channel 6"
|
|
line.long 0x08 "CCR6,Channel control for DMA channel 6"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_6,Loop counter 0 for DMA channel 6"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_6,Loop counter 1 for DMA channel 6"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA Channel 7"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "FTR7,Default type for DMA channel 7"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
group.long 0x138++0x07
|
|
line.long 0x00 "CSR7,Channel status for DMA channel 7"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC7,Channel PC for DMA channel 7"
|
|
group.long 0x4E0++0x13
|
|
line.long 0x00 "SAR7,Source address for DMA channel 7"
|
|
line.long 0x04 "DAR7,Destination address for DMA channel 7"
|
|
line.long 0x08 "CCR7,Channel control for DMA channel 7"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_7,Loop counter 0 for DMA channel 7"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_7,Loop counter 1 for DMA channel 7"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
group.long 0xD00++0x0F
|
|
line.long 0x00 "DBGSTATUS,Debug status register"
|
|
bitfld.long 0x00 0. " DBGSTATUS ,Debug status" "Idle,Busy"
|
|
line.long 0x04 "DBGCMD,Debug command register"
|
|
bitfld.long 0x04 0.--1. " DBGCMD ,Debug command" "Executed,?..."
|
|
line.long 0x08 "DBGINST0,Debug instruction 0 register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " INSTRUCTION_BYTE1 ,Instruction byte 1"
|
|
hexmask.long.byte 0x08 16.--23. 1. " INSTRUCTION_BYTE0 ,Instruction byte 0"
|
|
bitfld.long 0x08 8.--10. " CHANNEL_NUM ,DMA channel number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 0. " DEBUG_THREAD ,Debug thread" "Manager,Channel"
|
|
line.long 0x0C "DBGINST1,Debug instruction 1 register"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " INSTRUCTION_BYTE5 ,Instruction byte 5"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " INSTRUCTION_BYTE4 ,Instruction byte 4"
|
|
hexmask.long.byte 0x0C 8.--15. 1. " INSTRUCTION_BYTE3 ,Instruction byte 3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " INSTRUCTION_BYTE2 ,Instruction byte 2"
|
|
if (((d.l(ad:0xF8004000+0xE00))&0x1)==0x1)
|
|
group.long 0xE00++0x03
|
|
line.long 0x00 "CR0,Configuration Register 0"
|
|
bitfld.long 0x00 17.--21. " NUM_EVENTS ,Number of interrupt outputs that the DMAC provides" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 12.--16. " NUM_PERIPH_REQ ,Number of peripheral request interfaces that the DMAC provides" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 4.--6. " NUM_CHNLS ,Number of DMA channels that the DMAC supports" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 2. " MGR_NS_AT_RST ,Status of the boot_manager_ns signal when the DMAC exited from reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BOOT_EN ,Status of the boot_from_pc signal when the DMAC exited from reset" "Low,High"
|
|
bitfld.long 0x00 0. " PERIPH_REQ ,Supports peripheral requests" "Not provided,Provided"
|
|
else
|
|
group.long 0xE00++0x03
|
|
line.long 0x00 "CR0,Configuration Register 0"
|
|
bitfld.long 0x00 17.--21. " NUM_EVENTS ,Number of interrupt outputs that the DMAC provides" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 4.--6. " NUM_CHNLS ,Number of DMA channels that the DMAC supports" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 2. " MGR_NS_AT_RST ,Status of the boot_manager_ns signal when the DMAC exited from reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BOOT_EN ,Status of the boot_from_pc signal when the DMAC exited from reset" "Low,High"
|
|
bitfld.long 0x00 0. " PERIPH_REQ ,Supports peripheral requests" "Not provided,Provided"
|
|
endif
|
|
group.long 0xE04++0x13
|
|
line.long 0x00 "CR1,Configuration Register 1"
|
|
bitfld.long 0x00 4.--7. " NUM_ICACHE_LINES ,Number of i-cache lines" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 0.--2. " ICACHE_LEN ,I-cache line length" "Reserved,Reserved,4 bytes,8 bytes,16 bytes,32 bytes,?..."
|
|
line.long 0x04 "CR2,Configuration Register 2"
|
|
line.long 0x08 "CR3,Configuration Register 3"
|
|
bitfld.long 0x08 31. " INS[31] ,Security state of an event-interrupt resource 31" "Secure,Non-secure"
|
|
bitfld.long 0x08 30. " INS[30] ,Security state of an event-interrupt resource 30" "Secure,Non-secure"
|
|
bitfld.long 0x08 29. " INS[29] ,Security state of an event-interrupt resource 29" "Secure,Non-secure"
|
|
bitfld.long 0x08 28. " INS[28] ,Security state of an event-interrupt resource 28" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 27. " INS[27] ,Security state of an event-interrupt resource 27" "Secure,Non-secure"
|
|
bitfld.long 0x08 26. " INS[26] ,Security state of an event-interrupt resource 26" "Secure,Non-secure"
|
|
bitfld.long 0x08 25. " INS[25] ,Security state of an event-interrupt resource 25" "Secure,Non-secure"
|
|
bitfld.long 0x08 24. " INS[24] ,Security state of an event-interrupt resource 24" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 23. " INS[23] ,Security state of an event-interrupt resource 23" "Secure,Non-secure"
|
|
bitfld.long 0x08 22. " INS[22] ,Security state of an event-interrupt resource 22" "Secure,Non-secure"
|
|
bitfld.long 0x08 21. " INS[21] ,Security state of an event-interrupt resource 21" "Secure,Non-secure"
|
|
bitfld.long 0x08 20. " INS[20] ,Security state of an event-interrupt resource 20" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 19. " INS[19] ,Security state of an event-interrupt resource 19" "Secure,Non-secure"
|
|
bitfld.long 0x08 18. " INS[18] ,Security state of an event-interrupt resource 18" "Secure,Non-secure"
|
|
bitfld.long 0x08 17. " INS[17] ,Security state of an event-interrupt resource 17" "Secure,Non-secure"
|
|
bitfld.long 0x08 16. " INS[16] ,Security state of an event-interrupt resource 16" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 15. " INS[15] ,Security state of an event-interrupt resource 15" "Secure,Non-secure"
|
|
bitfld.long 0x08 14. " INS[14] ,Security state of an event-interrupt resource 14" "Secure,Non-secure"
|
|
bitfld.long 0x08 13. " INS[13] ,Security state of an event-interrupt resource 13" "Secure,Non-secure"
|
|
bitfld.long 0x08 12. " INS[12] ,Security state of an event-interrupt resource 12" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 11. " INS[11] ,Security state of an event-interrupt resource 11" "Secure,Non-secure"
|
|
bitfld.long 0x08 10. " INS[10] ,Security state of an event-interrupt resource 10" "Secure,Non-secure"
|
|
bitfld.long 0x08 9. " INS[9] ,Security state of an event-interrupt resource 9" "Secure,Non-secure"
|
|
bitfld.long 0x08 8. " INS[8] ,Security state of an event-interrupt resource 8" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 7. " INS[7] ,Security state of an event-interrupt resource 7" "Secure,Non-secure"
|
|
bitfld.long 0x08 6. " INS[6] ,Security state of an event-interrupt resource 6" "Secure,Non-secure"
|
|
bitfld.long 0x08 5. " INS[5] ,Security state of an event-interrupt resource 5" "Secure,Non-secure"
|
|
bitfld.long 0x08 4. " INS[4] ,Security state of an event-interrupt resource 4" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 3. " INS[3] ,Security state of an event-interrupt resource 3" "Secure,Non-secure"
|
|
bitfld.long 0x08 2. " INS[2] ,Security state of an event-interrupt resource 2" "Secure,Non-secure"
|
|
bitfld.long 0x08 1. " INS[1] ,Security state of an event-interrupt resource 1" "Secure,Non-secure"
|
|
bitfld.long 0x08 0. " INS[0] ,Security state of an event-interrupt resource 0" "Secure,Non-secure"
|
|
line.long 0x0C "CR4,Configuration Register 4"
|
|
bitfld.long 0x0C 31. " PNS[31] ,Security state of the peripheral request interface 31" "Secure,Non-secure"
|
|
bitfld.long 0x0C 30. " PNS[30] ,Security state of the peripheral request interface 30" "Secure,Non-secure"
|
|
bitfld.long 0x0C 29. " PNS[29] ,Security state of the peripheral request interface 29" "Secure,Non-secure"
|
|
bitfld.long 0x0C 28. " PNS[28] ,Security state of the peripheral request interface 28" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " PNS[27] ,Security state of the peripheral request interface 27" "Secure,Non-secure"
|
|
bitfld.long 0x0C 26. " PNS[26] ,Security state of the peripheral request interface 26" "Secure,Non-secure"
|
|
bitfld.long 0x0C 25. " PNS[25] ,Security state of the peripheral request interface 25" "Secure,Non-secure"
|
|
bitfld.long 0x0C 24. " PNS[24] ,Security state of the peripheral request interface 24" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 23. " PNS[23] ,Security state of the peripheral request interface 23" "Secure,Non-secure"
|
|
bitfld.long 0x0C 22. " PNS[22] ,Security state of the peripheral request interface 22" "Secure,Non-secure"
|
|
bitfld.long 0x0C 21. " PNS[21] ,Security state of the peripheral request interface 21" "Secure,Non-secure"
|
|
bitfld.long 0x0C 20. " PNS[20] ,Security state of the peripheral request interface 20" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " PNS[19] ,Security state of the peripheral request interface 19" "Secure,Non-secure"
|
|
bitfld.long 0x0C 18. " PNS[18] ,Security state of the peripheral request interface 18" "Secure,Non-secure"
|
|
bitfld.long 0x0C 17. " PNS[17] ,Security state of the peripheral request interface 17" "Secure,Non-secure"
|
|
bitfld.long 0x0C 16. " PNS[16] ,Security state of the peripheral request interface 16" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " PNS[15] ,Security state of the peripheral request interface 15" "Secure,Non-secure"
|
|
bitfld.long 0x0C 14. " PNS[14] ,Security state of the peripheral request interface 14" "Secure,Non-secure"
|
|
bitfld.long 0x0C 13. " PNS[13] ,Security state of the peripheral request interface 13" "Secure,Non-secure"
|
|
bitfld.long 0x0C 12. " PNS[12] ,Security state of the peripheral request interface 12" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " PNS[11] ,Security state of the peripheral request interface 11" "Secure,Non-secure"
|
|
bitfld.long 0x0C 10. " PNS[10] ,Security state of the peripheral request interface 10" "Secure,Non-secure"
|
|
bitfld.long 0x0C 9. " PNS[9] ,Security state of the peripheral request interface 9" "Secure,Non-secure"
|
|
bitfld.long 0x0C 8. " PNS[8] ,Security state of the peripheral request interface 8" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " PNS[7] ,Security state of the peripheral request interface 7" "Secure,Non-secure"
|
|
bitfld.long 0x0C 6. " PNS[6] ,Security state of the peripheral request interface 6" "Secure,Non-secure"
|
|
bitfld.long 0x0C 5. " PNS[5] ,Security state of the peripheral request interface 5" "Secure,Non-secure"
|
|
bitfld.long 0x0C 4. " PNS[4] ,Security state of the peripheral request interface 4" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " PNS[3] ,Security state of the peripheral request interface 3" "Secure,Non-secure"
|
|
bitfld.long 0x0C 2. " PNS[2] ,Security state of the peripheral request interface 2" "Secure,Non-secure"
|
|
bitfld.long 0x0C 1. " PNS[1] ,Security state of the peripheral request interface 1" "Secure,Non-secure"
|
|
bitfld.long 0x0C 0. " PNS[0] ,Security state of the peripheral request interface 0" "Secure,Non-secure"
|
|
line.long 0x10 "CRD,DMA configuration register"
|
|
hexmask.long.word 0x10 20.--29. 1. " DATA_BUFFER_DEP ,Number of lines that the data buffer contains"
|
|
bitfld.long 0x10 16.--19. " RD_Q_DEP ,Depth of the read queue" "1 line,2 lines,3 lines,4 lines,5 lines,6 lines,7 lines,8 lines,9 lines,10 lines,11 lines,12 lines,13 lines,14 lines,15 lines,16 lines"
|
|
bitfld.long 0x10 12.--14. " RD_CAP ,Number of outstanding read transactions" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x10 8.--11. " WR_Q_DEP ,Depth of the write queue" "1 line,2 lines,3 lines,4 lines,5 lines,6 lines,7 lines,8 lines,9 lines,10 lines,11 lines,12 lines,13 lines,14 lines,15 lines,16 lines"
|
|
textline " "
|
|
bitfld.long 0x10 4.--6. " WR_CAP ,Number of outstanding write transactions" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x10 0.--2. " DATA_WIDTH ,Data bus width of the AXI master interface" "Reserved,Reserved,32-bit,64-bit,128-bit,?..."
|
|
group.long 0xE80++0x03
|
|
line.long 0x00 "WD,Watch dog register"
|
|
bitfld.long 0x00 0. " WD_IRQ_ONLY ,Controls how the DMAC responds when it detects a lock-up condition" "Aborted and set,Set"
|
|
group.long 0xFE0++0x1F
|
|
line.long 0x00 "PERIPH_ID_0,Peripheral identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PART_NUMBER_0 ,Part number 0"
|
|
line.long 0x04 "PERIPH_ID_1,Peripheral identification register 1"
|
|
bitfld.long 0x04 4.--7. " DESIGNER_0 ,Designer 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--3. " PART_NUMBER_1 ,Part number 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "PERIPH_ID_2,Peripheral identification register 2"
|
|
bitfld.long 0x08 4.--7. " REVISION ,Revision nuber" "r0p0,r1p0,r1p1,?..."
|
|
bitfld.long 0x08 0.--3. " DESIGNER_1 ,Designer 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x0C "PERIPH_ID_3,Peripheral identification register 3"
|
|
bitfld.long 0x0C 0. " INTEGRATION_CFG ,Integration test logic(ITL) configuration" "No ITL,ITL"
|
|
line.long 0x10 "PCELL_ID_0,Component identification register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PCELL_ID_0 ,Component identification 0"
|
|
line.long 0x14 "PCELL_ID_1,Component identification register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PCELL_ID_1 ,Component identification 1"
|
|
line.long 0x18 "PCELL_ID_2,Component identification register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PCELL_ID_2 ,Component identification 2"
|
|
line.long 0x1C "PCELL_ID_3,Component identification register 3"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PCELL_ID_3 ,Component identification 3"
|
|
width 12.
|
|
tree.end
|
|
tree "DMAC0_S"
|
|
base ad:0xF8003000
|
|
width 23.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "DSR,DMA manager status register"
|
|
bitfld.long 0x00 9. " DNS ,Provides the security status of the DMA manager thread" "Secure,Non-secure"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_EVENT ,Wakeup event" "Event[0],Event[1],Event[2],Event[3],Event[4],Event[5],Event[6],Event[7],Event[8],Event[9],Event[10],Event[11],Event[12],Event[13],Event[14],Event[15],Event[16],Event[17],Event[18],Event[19],Event[20],Event[21],Event[22],Event[23],Event[24],Event[25],Event[26],Event[27],Event[28],Event[29],Event[30],Event[31]"
|
|
bitfld.long 0x00 0.--3. " DMA_STATUS ,The operating state of the DMA manager" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Faulting"
|
|
line.long 0x04 "DPC,DMA Program Counter Register"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "INTEN,Interrupt enable register"
|
|
bitfld.long 0x00 31. " EVENT_IRQ_SELECT[31] ,Event Interrupt Request Enable 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " EVENT_IRQ_SELECT[30] ,Event Interrupt Request Enable 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " EVENT_IRQ_SELECT[29] ,Event Interrupt Request Enable 29" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " EVENT_IRQ_SELECT[28] ,Event Interrupt Request Enable 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EVENT_IRQ_SELECT[27] ,Event Interrupt Request Enable 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " EVENT_IRQ_SELECT[26] ,Event Interrupt Request Enable 26" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " EVENT_IRQ_SELECT[25] ,Event Interrupt Request Enable 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " EVENT_IRQ_SELECT[24] ,Event Interrupt Request Enable 24" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " EVENT_IRQ_SELECT[23] ,Event Interrupt Request Enable 23" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " EVENT_IRQ_SELECT[22] ,Event Interrupt Request Enable 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " EVENT_IRQ_SELECT[21] ,Event Interrupt Request Enable 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " EVENT_IRQ_SELECT[20] ,Event Interrupt Request Enable 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " EVENT_IRQ_SELECT[19] ,Event Interrupt Request Enable 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " EVENT_IRQ_SELECT[18] ,Event Interrupt Request Enable 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " EVENT_IRQ_SELECT[17] ,Event Interrupt Request Enable 17" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EVENT_IRQ_SELECT[16] ,Event Interrupt Request Enable 16" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " EVENT_IRQ_SELECT[15] ,Event Interrupt Request Enable 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " EVENT_IRQ_SELECT[14] ,Event Interrupt Request Enable 14" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " EVENT_IRQ_SELECT[13] ,Event Interrupt Request Enable 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " EVENT_IRQ_SELECT[12] ,Event Interrupt Request Enable 12" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " EVENT_IRQ_SELECT[11] ,Event Interrupt Request Enable 11" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " EVENT_IRQ_SELECT[10] ,Event Interrupt Request Enable 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " EVENT_IRQ_SELECT[9] ,Event Interrupt Request Enable 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " EVENT_IRQ_SELECT[8] ,Event Interrupt Request Enable 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " EVENT_IRQ_SELECT[7] ,Event Interrupt Request Enable 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " EVENT_IRQ_SELECT[6] ,Event Interrupt Request Enable 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EVENT_IRQ_SELECT[5] ,Event Interrupt Request Enable 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EVENT_IRQ_SELECT[4] ,Event Interrupt Request Enable 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EVENT_IRQ_SELECT[3] ,Event Interrupt Request Enable 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " EVENT_IRQ_SELECT[2] ,Event Interrupt Request Enable 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " EVENT_IRQ_SELECT[1] ,Event Interrupt Request Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EVENT_IRQ_SELECT[0] ,Event Interrupt Request Enable 0" "Disabled,Enabled"
|
|
group.long 0x24++0x07
|
|
line.long 0x00 "INT_EVENT_RIS,Event interrupt raw status register"
|
|
bitfld.long 0x00 31. " DMASEV_ACTIVE[31] ,Status of the event-interrupt 31" "Inactive,Active"
|
|
bitfld.long 0x00 30. " DMASEV_ACTIVE[30] ,Status of the event-interrupt 30" "Inactive,Active"
|
|
bitfld.long 0x00 29. " DMASEV_ACTIVE[29] ,Status of the event-interrupt 29" "Inactive,Active"
|
|
bitfld.long 0x00 28. " DMASEV_ACTIVE[28] ,Status of the event-interrupt 28" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DMASEV_ACTIVE[27] ,Status of the event-interrupt 27" "Inactive,Active"
|
|
bitfld.long 0x00 26. " DMASEV_ACTIVE[26] ,Status of the event-interrupt 26" "Inactive,Active"
|
|
bitfld.long 0x00 25. " DMASEV_ACTIVE[25] ,Status of the event-interrupt 25" "Inactive,Active"
|
|
bitfld.long 0x00 24. " DMASEV_ACTIVE[24] ,Status of the event-interrupt 24" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DMASEV_ACTIVE[23] ,Status of the event-interrupt 23" "Inactive,Active"
|
|
bitfld.long 0x00 22. " DMASEV_ACTIVE[22] ,Status of the event-interrupt 22" "Inactive,Active"
|
|
bitfld.long 0x00 21. " DMASEV_ACTIVE[21] ,Status of the event-interrupt 21" "Inactive,Active"
|
|
bitfld.long 0x00 20. " DMASEV_ACTIVE[20] ,Status of the event-interrupt 20" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DMASEV_ACTIVE[19] ,Status of the event-interrupt 19" "Inactive,Active"
|
|
bitfld.long 0x00 18. " DMASEV_ACTIVE[18] ,Status of the event-interrupt 18" "Inactive,Active"
|
|
bitfld.long 0x00 17. " DMASEV_ACTIVE[17] ,Status of the event-interrupt 17" "Inactive,Active"
|
|
bitfld.long 0x00 16. " DMASEV_ACTIVE[16] ,Status of the event-interrupt 16" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DMASEV_ACTIVE[15] ,Status of the event-interrupt 15" "Inactive,Active"
|
|
bitfld.long 0x00 14. " DMASEV_ACTIVE[14] ,Status of the event-interrupt 14" "Inactive,Active"
|
|
bitfld.long 0x00 13. " DMASEV_ACTIVE[13] ,Status of the event-interrupt 13" "Inactive,Active"
|
|
bitfld.long 0x00 12. " DMASEV_ACTIVE[12] ,Status of the event-interrupt 12" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DMASEV_ACTIVE[11] ,Status of the event-interrupt 11" "Inactive,Active"
|
|
bitfld.long 0x00 10. " DMASEV_ACTIVE[10] ,Status of the event-interrupt 10" "Inactive,Active"
|
|
bitfld.long 0x00 9. " DMASEV_ACTIVE[9] ,Status of the event-interrupt 9" "Inactive,Active"
|
|
bitfld.long 0x00 8. " DMASEV_ACTIVE[8] ,Status of the event-interrupt 8" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DMASEV_ACTIVE[7] ,Status of the event-interrupt 7" "Inactive,Active"
|
|
bitfld.long 0x00 6. " DMASEV_ACTIVE[6] ,Status of the event-interrupt 6" "Inactive,Active"
|
|
bitfld.long 0x00 5. " DMASEV_ACTIVE[5] ,Status of the event-interrupt 5" "Inactive,Active"
|
|
bitfld.long 0x00 4. " DMASEV_ACTIVE[4] ,Status of the event-interrupt 4" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DMASEV_ACTIVE[3] ,Status of the event-interrupt 3" "Inactive,Active"
|
|
bitfld.long 0x00 2. " DMASEV_ACTIVE[2] ,Status of the event-interrupt 2" "Inactive,Active"
|
|
bitfld.long 0x00 1. " DMASEV_ACTIVE[1] ,Status of the event-interrupt 1" "Inactive,Active"
|
|
bitfld.long 0x00 0. " DMASEV_ACTIVE[0] ,Status of the event-interrupt 0" "Inactive,Active"
|
|
line.long 0x04 "INTMIS,Interrupt status register"
|
|
bitfld.long 0x04 31. " IRQ_STATUS[31] ,Status of the interrupt 31" "Inactive,Active"
|
|
bitfld.long 0x04 30. " IRQ_STATUS[30] ,Status of the interrupt 30" "Inactive,Active"
|
|
bitfld.long 0x04 29. " IRQ_STATUS[29] ,Status of the interrupt 29" "Inactive,Active"
|
|
bitfld.long 0x04 28. " IRQ_STATUS[28] ,Status of the interrupt 28" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 27. " IRQ_STATUS[27] ,Status of the interrupt 27" "Inactive,Active"
|
|
bitfld.long 0x04 26. " IRQ_STATUS[26] ,Status of the interrupt 26" "Inactive,Active"
|
|
bitfld.long 0x04 25. " IRQ_STATUS[25] ,Status of the interrupt 25" "Inactive,Active"
|
|
bitfld.long 0x04 24. " IRQ_STATUS[24] ,Status of the interrupt 24" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 23. " IRQ_STATUS[23] ,Status of the interrupt 23" "Inactive,Active"
|
|
bitfld.long 0x04 22. " IRQ_STATUS[22] ,Status of the interrupt 22" "Inactive,Active"
|
|
bitfld.long 0x04 21. " IRQ_STATUS[21] ,Status of the interrupt 21" "Inactive,Active"
|
|
bitfld.long 0x04 20. " IRQ_STATUS[20] ,Status of the interrupt 20" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " IRQ_STATUS[19] ,Status of the interrupt 19" "Inactive,Active"
|
|
bitfld.long 0x04 18. " IRQ_STATUS[18] ,Status of the interrupt 18" "Inactive,Active"
|
|
bitfld.long 0x04 17. " IRQ_STATUS[17] ,Status of the interrupt 17" "Inactive,Active"
|
|
bitfld.long 0x04 16. " IRQ_STATUS[16] ,Status of the interrupt 16" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 15. " IRQ_STATUS[15] ,Status of the interrupt 15" "Inactive,Active"
|
|
bitfld.long 0x04 14. " IRQ_STATUS[14] ,Status of the interrupt 14" "Inactive,Active"
|
|
bitfld.long 0x04 13. " IRQ_STATUS[13] ,Status of the interrupt 13" "Inactive,Active"
|
|
bitfld.long 0x04 12. " IRQ_STATUS[12] ,Status of the interrupt 12" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 11. " IRQ_STATUS[11] ,Status of the interrupt 11" "Inactive,Active"
|
|
bitfld.long 0x04 10. " IRQ_STATUS[10] ,Status of the interrupt 10" "Inactive,Active"
|
|
bitfld.long 0x04 9. " IRQ_STATUS[9] ,Status of the interrupt 9" "Inactive,Active"
|
|
bitfld.long 0x04 8. " IRQ_STATUS[8] ,Status of the interrupt 8" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " IRQ_STATUS[7] ,Status of the interrupt 7" "Inactive,Active"
|
|
bitfld.long 0x04 6. " IRQ_STATUS[6] ,Status of the interrupt 6" "Inactive,Active"
|
|
bitfld.long 0x04 5. " IRQ_STATUS[5] ,Status of the interrupt 5" "Inactive,Active"
|
|
bitfld.long 0x04 4. " IRQ_STATUS[4] ,Status of the interrupt 4" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 3. " IRQ_STATUS[3] ,Status of the interrupt 3" "Inactive,Active"
|
|
bitfld.long 0x04 2. " IRQ_STATUS[2] ,Status of the interrupt 2" "Inactive,Active"
|
|
bitfld.long 0x04 1. " IRQ_STATUS[1] ,Status of the interrupt 1" "Inactive,Active"
|
|
bitfld.long 0x04 0. " IRQ_STATUS[0] ,Status of the interrupt 0" "Inactive,Active"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "INTCLR,Interrupt clear register"
|
|
bitfld.long 0x00 31. " IRQ_CLR[31] ,Interrupt 31 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 30. " IRQ_CLR[30] ,Interrupt 30 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 29. " IRQ_CLR[29] ,Interrupt 29 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 28. " IRQ_CLR[28] ,Interrupt 28 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 27. " IRQ_CLR[27] ,Interrupt 27 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 26. " IRQ_CLR[26] ,Interrupt 26 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 25. " IRQ_CLR[25] ,Interrupt 25 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 24. " IRQ_CLR[24] ,Interrupt 24 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IRQ_CLR[23] ,Interrupt 23 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " IRQ_CLR[22] ,Interrupt 22 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " IRQ_CLR[21] ,Interrupt 21 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 20. " IRQ_CLR[20] ,Interrupt 20 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQ_CLR[19] ,Interrupt 19 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " IRQ_CLR[18] ,Interrupt 18 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 17. " IRQ_CLR[17] ,Interrupt 17 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " IRQ_CLR[16] ,Interrupt 16 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IRQ_CLR[15] ,Interrupt 15 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 14. " IRQ_CLR[14] ,Interrupt 14 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 13. " IRQ_CLR[13] ,Interrupt 13 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 12. " IRQ_CLR[12] ,Interrupt 12 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQ_CLR[11] ,Interrupt 11 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 10. " IRQ_CLR[10] ,Interrupt 10 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 9. " IRQ_CLR[9] ,Interrupt 9 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 8. " IRQ_CLR[8] ,Interrupt 8 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQ_CLR[7] ,Interrupt 7 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 6. " IRQ_CLR[6] ,Interrupt 6 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " IRQ_CLR[5] ,Interrupt 5 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 4. " IRQ_CLR[4] ,Interrupt 4 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IRQ_CLR[3] ,Interrupt 3 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " IRQ_CLR[2] ,Interrupt 2 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 1. " IRQ_CLR[1] ,Interrupt 1 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " IRQ_CLR[0] ,Interrupt 0 clear" "No effect,Cleared"
|
|
group.long 0x30++0x0B
|
|
line.long 0x00 "FSRD,Fault status DMA manager register"
|
|
bitfld.long 0x00 0. " FS_MGR ,Provides the fault status of the DMA manager" "Disabled,Enabled"
|
|
line.long 0x04 "FSRC,Fault status DMA channel register"
|
|
bitfld.long 0x04 7. " FAULT_STATUS ,Fault status of the channel 7" "Not present,Present"
|
|
bitfld.long 0x04 6. " FAULT_STATUS ,Fault status of the channel 6" "Not present,Present"
|
|
bitfld.long 0x04 5. " FAULT_STATUS ,Fault status of the channel 5" "Not present,Present"
|
|
bitfld.long 0x04 4. " FAULT_STATUS ,Fault status of the channel 4" "Not present,Present"
|
|
textline " "
|
|
bitfld.long 0x04 3. " FAULT_STATUS ,Fault status of the channel 3" "Not present,Present"
|
|
bitfld.long 0x04 2. " FAULT_STATUS ,Fault status of the channel 2" "Not present,Present"
|
|
bitfld.long 0x04 1. " FAULT_STATUS ,Fault status of the channel 1" "Not present,Present"
|
|
bitfld.long 0x04 0. " FAULT_STATUS ,Fault status of the channel 0" "Not present,Present"
|
|
line.long 0x08 "FTRD,Fault type DMA manager register"
|
|
bitfld.long 0x08 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
bitfld.long 0x08 16. " INSTR_FETCH_ERR ,Indicates the AXI response that the DMAC receives on the RRESP bus after the DMA manager" "No error,Error"
|
|
bitfld.long 0x08 5. " MGR_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x08 4. " DMAGO_ERR ,Execute DMAGO with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x08 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x08 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
tree "DMA Channel 0"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "FTR0,Default type for DMA channel 0"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
group.long 0x100++0x07
|
|
line.long 0x00 "CSR0,Channel status for DMA channel 0"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC0,Channel PC for DMA channel 0"
|
|
group.long 0x400++0x13
|
|
line.long 0x00 "SAR0,Source address for DMA channel 0"
|
|
line.long 0x04 "DAR0,Destination address for DMA channel 0"
|
|
line.long 0x08 "CCR0,Channel control for DMA channel 0"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_0,Loop counter 0 for DMA channel 0"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_0,Loop counter 1 for DMA channel 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA Channel 1"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "FTR1,Default type for DMA channel 1"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
group.long 0x108++0x07
|
|
line.long 0x00 "CSR1,Channel status for DMA channel 1"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC1,Channel PC for DMA channel 1"
|
|
group.long 0x420++0x13
|
|
line.long 0x00 "SAR1,Source address for DMA channel 1"
|
|
line.long 0x04 "DAR1,Destination address for DMA channel 1"
|
|
line.long 0x08 "CCR1,Channel control for DMA channel 1"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_1,Loop counter 0 for DMA channel 1"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_1,Loop counter 1 for DMA channel 1"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA Channel 2"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "FTR2,Default type for DMA channel 2"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
group.long 0x110++0x07
|
|
line.long 0x00 "CSR2,Channel status for DMA channel 2"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC2,Channel PC for DMA channel 2"
|
|
group.long 0x440++0x13
|
|
line.long 0x00 "SAR2,Source address for DMA channel 2"
|
|
line.long 0x04 "DAR2,Destination address for DMA channel 2"
|
|
line.long 0x08 "CCR2,Channel control for DMA channel 2"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_2,Loop counter 0 for DMA channel 2"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_2,Loop counter 1 for DMA channel 2"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA Channel 3"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "FTR3,Default type for DMA channel 3"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
group.long 0x118++0x07
|
|
line.long 0x00 "CSR3,Channel status for DMA channel 3"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC3,Channel PC for DMA channel 3"
|
|
group.long 0x460++0x13
|
|
line.long 0x00 "SAR3,Source address for DMA channel 3"
|
|
line.long 0x04 "DAR3,Destination address for DMA channel 3"
|
|
line.long 0x08 "CCR3,Channel control for DMA channel 3"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_3,Loop counter 0 for DMA channel 3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_3,Loop counter 1 for DMA channel 3"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA Channel 4"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "FTR4,Default type for DMA channel 4"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
group.long 0x120++0x07
|
|
line.long 0x00 "CSR4,Channel status for DMA channel 4"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC4,Channel PC for DMA channel 4"
|
|
group.long 0x480++0x13
|
|
line.long 0x00 "SAR4,Source address for DMA channel 4"
|
|
line.long 0x04 "DAR4,Destination address for DMA channel 4"
|
|
line.long 0x08 "CCR4,Channel control for DMA channel 4"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_4,Loop counter 0 for DMA channel 4"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_4,Loop counter 1 for DMA channel 4"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA Channel 5"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "FTR5,Default type for DMA channel 5"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
group.long 0x128++0x07
|
|
line.long 0x00 "CSR5,Channel status for DMA channel 5"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC5,Channel PC for DMA channel 5"
|
|
group.long 0x4A0++0x13
|
|
line.long 0x00 "SAR5,Source address for DMA channel 5"
|
|
line.long 0x04 "DAR5,Destination address for DMA channel 5"
|
|
line.long 0x08 "CCR5,Channel control for DMA channel 5"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_5,Loop counter 0 for DMA channel 5"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_5,Loop counter 1 for DMA channel 5"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA Channel 6"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "FTR6,Default type for DMA channel 6"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
group.long 0x130++0x07
|
|
line.long 0x00 "CSR6,Channel status for DMA channel 6"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC6,Channel PC for DMA channel 6"
|
|
group.long 0x4C0++0x13
|
|
line.long 0x00 "SAR6,Source address for DMA channel 6"
|
|
line.long 0x04 "DAR6,Destination address for DMA channel 6"
|
|
line.long 0x08 "CCR6,Channel control for DMA channel 6"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_6,Loop counter 0 for DMA channel 6"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_6,Loop counter 1 for DMA channel 6"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA Channel 7"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "FTR7,Default type for DMA channel 7"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
group.long 0x138++0x07
|
|
line.long 0x00 "CSR7,Channel status for DMA channel 7"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC7,Channel PC for DMA channel 7"
|
|
group.long 0x4E0++0x13
|
|
line.long 0x00 "SAR7,Source address for DMA channel 7"
|
|
line.long 0x04 "DAR7,Destination address for DMA channel 7"
|
|
line.long 0x08 "CCR7,Channel control for DMA channel 7"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst lenght" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_7,Loop counter 0 for DMA channel 7"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_7,Loop counter 1 for DMA channel 7"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
group.long 0xD00++0x0F
|
|
line.long 0x00 "DBGSTATUS,Debug status register"
|
|
bitfld.long 0x00 0. " DBGSTATUS ,Debug status" "Idle,Busy"
|
|
line.long 0x04 "DBGCMD,Debug command register"
|
|
bitfld.long 0x04 0.--1. " DBGCMD ,Debug command" "Executed,?..."
|
|
line.long 0x08 "DBGINST0,Debug instruction 0 register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " INSTRUCTION_BYTE1 ,Instruction byte 1"
|
|
hexmask.long.byte 0x08 16.--23. 1. " INSTRUCTION_BYTE0 ,Instruction byte 0"
|
|
bitfld.long 0x08 8.--10. " CHANNEL_NUM ,DMA channel number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 0. " DEBUG_THREAD ,Debug thread" "Manager,Channel"
|
|
line.long 0x0C "DBGINST1,Debug instruction 1 register"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " INSTRUCTION_BYTE5 ,Instruction byte 5"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " INSTRUCTION_BYTE4 ,Instruction byte 4"
|
|
hexmask.long.byte 0x0C 8.--15. 1. " INSTRUCTION_BYTE3 ,Instruction byte 3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " INSTRUCTION_BYTE2 ,Instruction byte 2"
|
|
if (((d.l(ad:0xF8003000+0xE00))&0x1)==0x1)
|
|
group.long 0xE00++0x03
|
|
line.long 0x00 "CR0,Configuration Register 0"
|
|
bitfld.long 0x00 17.--21. " NUM_EVENTS ,Number of interrupt outputs that the DMAC provides" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 12.--16. " NUM_PERIPH_REQ ,Number of peripheral request interfaces that the DMAC provides" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 4.--6. " NUM_CHNLS ,Number of DMA channels that the DMAC supports" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 2. " MGR_NS_AT_RST ,Status of the boot_manager_ns signal when the DMAC exited from reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BOOT_EN ,Status of the boot_from_pc signal when the DMAC exited from reset" "Low,High"
|
|
bitfld.long 0x00 0. " PERIPH_REQ ,Supports peripheral requests" "Not provided,Provided"
|
|
else
|
|
group.long 0xE00++0x03
|
|
line.long 0x00 "CR0,Configuration Register 0"
|
|
bitfld.long 0x00 17.--21. " NUM_EVENTS ,Number of interrupt outputs that the DMAC provides" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 4.--6. " NUM_CHNLS ,Number of DMA channels that the DMAC supports" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 2. " MGR_NS_AT_RST ,Status of the boot_manager_ns signal when the DMAC exited from reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BOOT_EN ,Status of the boot_from_pc signal when the DMAC exited from reset" "Low,High"
|
|
bitfld.long 0x00 0. " PERIPH_REQ ,Supports peripheral requests" "Not provided,Provided"
|
|
endif
|
|
group.long 0xE04++0x13
|
|
line.long 0x00 "CR1,Configuration Register 1"
|
|
bitfld.long 0x00 4.--7. " NUM_ICACHE_LINES ,Number of i-cache lines" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 0.--2. " ICACHE_LEN ,I-cache line length" "Reserved,Reserved,4 bytes,8 bytes,16 bytes,32 bytes,?..."
|
|
line.long 0x04 "CR2,Configuration Register 2"
|
|
line.long 0x08 "CR3,Configuration Register 3"
|
|
bitfld.long 0x08 31. " INS[31] ,Security state of an event-interrupt resource 31" "Secure,Non-secure"
|
|
bitfld.long 0x08 30. " INS[30] ,Security state of an event-interrupt resource 30" "Secure,Non-secure"
|
|
bitfld.long 0x08 29. " INS[29] ,Security state of an event-interrupt resource 29" "Secure,Non-secure"
|
|
bitfld.long 0x08 28. " INS[28] ,Security state of an event-interrupt resource 28" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 27. " INS[27] ,Security state of an event-interrupt resource 27" "Secure,Non-secure"
|
|
bitfld.long 0x08 26. " INS[26] ,Security state of an event-interrupt resource 26" "Secure,Non-secure"
|
|
bitfld.long 0x08 25. " INS[25] ,Security state of an event-interrupt resource 25" "Secure,Non-secure"
|
|
bitfld.long 0x08 24. " INS[24] ,Security state of an event-interrupt resource 24" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 23. " INS[23] ,Security state of an event-interrupt resource 23" "Secure,Non-secure"
|
|
bitfld.long 0x08 22. " INS[22] ,Security state of an event-interrupt resource 22" "Secure,Non-secure"
|
|
bitfld.long 0x08 21. " INS[21] ,Security state of an event-interrupt resource 21" "Secure,Non-secure"
|
|
bitfld.long 0x08 20. " INS[20] ,Security state of an event-interrupt resource 20" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 19. " INS[19] ,Security state of an event-interrupt resource 19" "Secure,Non-secure"
|
|
bitfld.long 0x08 18. " INS[18] ,Security state of an event-interrupt resource 18" "Secure,Non-secure"
|
|
bitfld.long 0x08 17. " INS[17] ,Security state of an event-interrupt resource 17" "Secure,Non-secure"
|
|
bitfld.long 0x08 16. " INS[16] ,Security state of an event-interrupt resource 16" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 15. " INS[15] ,Security state of an event-interrupt resource 15" "Secure,Non-secure"
|
|
bitfld.long 0x08 14. " INS[14] ,Security state of an event-interrupt resource 14" "Secure,Non-secure"
|
|
bitfld.long 0x08 13. " INS[13] ,Security state of an event-interrupt resource 13" "Secure,Non-secure"
|
|
bitfld.long 0x08 12. " INS[12] ,Security state of an event-interrupt resource 12" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 11. " INS[11] ,Security state of an event-interrupt resource 11" "Secure,Non-secure"
|
|
bitfld.long 0x08 10. " INS[10] ,Security state of an event-interrupt resource 10" "Secure,Non-secure"
|
|
bitfld.long 0x08 9. " INS[9] ,Security state of an event-interrupt resource 9" "Secure,Non-secure"
|
|
bitfld.long 0x08 8. " INS[8] ,Security state of an event-interrupt resource 8" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 7. " INS[7] ,Security state of an event-interrupt resource 7" "Secure,Non-secure"
|
|
bitfld.long 0x08 6. " INS[6] ,Security state of an event-interrupt resource 6" "Secure,Non-secure"
|
|
bitfld.long 0x08 5. " INS[5] ,Security state of an event-interrupt resource 5" "Secure,Non-secure"
|
|
bitfld.long 0x08 4. " INS[4] ,Security state of an event-interrupt resource 4" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 3. " INS[3] ,Security state of an event-interrupt resource 3" "Secure,Non-secure"
|
|
bitfld.long 0x08 2. " INS[2] ,Security state of an event-interrupt resource 2" "Secure,Non-secure"
|
|
bitfld.long 0x08 1. " INS[1] ,Security state of an event-interrupt resource 1" "Secure,Non-secure"
|
|
bitfld.long 0x08 0. " INS[0] ,Security state of an event-interrupt resource 0" "Secure,Non-secure"
|
|
line.long 0x0C "CR4,Configuration Register 4"
|
|
bitfld.long 0x0C 31. " PNS[31] ,Security state of the peripheral request interface 31" "Secure,Non-secure"
|
|
bitfld.long 0x0C 30. " PNS[30] ,Security state of the peripheral request interface 30" "Secure,Non-secure"
|
|
bitfld.long 0x0C 29. " PNS[29] ,Security state of the peripheral request interface 29" "Secure,Non-secure"
|
|
bitfld.long 0x0C 28. " PNS[28] ,Security state of the peripheral request interface 28" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " PNS[27] ,Security state of the peripheral request interface 27" "Secure,Non-secure"
|
|
bitfld.long 0x0C 26. " PNS[26] ,Security state of the peripheral request interface 26" "Secure,Non-secure"
|
|
bitfld.long 0x0C 25. " PNS[25] ,Security state of the peripheral request interface 25" "Secure,Non-secure"
|
|
bitfld.long 0x0C 24. " PNS[24] ,Security state of the peripheral request interface 24" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 23. " PNS[23] ,Security state of the peripheral request interface 23" "Secure,Non-secure"
|
|
bitfld.long 0x0C 22. " PNS[22] ,Security state of the peripheral request interface 22" "Secure,Non-secure"
|
|
bitfld.long 0x0C 21. " PNS[21] ,Security state of the peripheral request interface 21" "Secure,Non-secure"
|
|
bitfld.long 0x0C 20. " PNS[20] ,Security state of the peripheral request interface 20" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " PNS[19] ,Security state of the peripheral request interface 19" "Secure,Non-secure"
|
|
bitfld.long 0x0C 18. " PNS[18] ,Security state of the peripheral request interface 18" "Secure,Non-secure"
|
|
bitfld.long 0x0C 17. " PNS[17] ,Security state of the peripheral request interface 17" "Secure,Non-secure"
|
|
bitfld.long 0x0C 16. " PNS[16] ,Security state of the peripheral request interface 16" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " PNS[15] ,Security state of the peripheral request interface 15" "Secure,Non-secure"
|
|
bitfld.long 0x0C 14. " PNS[14] ,Security state of the peripheral request interface 14" "Secure,Non-secure"
|
|
bitfld.long 0x0C 13. " PNS[13] ,Security state of the peripheral request interface 13" "Secure,Non-secure"
|
|
bitfld.long 0x0C 12. " PNS[12] ,Security state of the peripheral request interface 12" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " PNS[11] ,Security state of the peripheral request interface 11" "Secure,Non-secure"
|
|
bitfld.long 0x0C 10. " PNS[10] ,Security state of the peripheral request interface 10" "Secure,Non-secure"
|
|
bitfld.long 0x0C 9. " PNS[9] ,Security state of the peripheral request interface 9" "Secure,Non-secure"
|
|
bitfld.long 0x0C 8. " PNS[8] ,Security state of the peripheral request interface 8" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " PNS[7] ,Security state of the peripheral request interface 7" "Secure,Non-secure"
|
|
bitfld.long 0x0C 6. " PNS[6] ,Security state of the peripheral request interface 6" "Secure,Non-secure"
|
|
bitfld.long 0x0C 5. " PNS[5] ,Security state of the peripheral request interface 5" "Secure,Non-secure"
|
|
bitfld.long 0x0C 4. " PNS[4] ,Security state of the peripheral request interface 4" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " PNS[3] ,Security state of the peripheral request interface 3" "Secure,Non-secure"
|
|
bitfld.long 0x0C 2. " PNS[2] ,Security state of the peripheral request interface 2" "Secure,Non-secure"
|
|
bitfld.long 0x0C 1. " PNS[1] ,Security state of the peripheral request interface 1" "Secure,Non-secure"
|
|
bitfld.long 0x0C 0. " PNS[0] ,Security state of the peripheral request interface 0" "Secure,Non-secure"
|
|
line.long 0x10 "CRD,DMA configuration register"
|
|
hexmask.long.word 0x10 20.--29. 1. " DATA_BUFFER_DEP ,Number of lines that the data buffer contains"
|
|
bitfld.long 0x10 16.--19. " RD_Q_DEP ,Depth of the read queue" "1 line,2 lines,3 lines,4 lines,5 lines,6 lines,7 lines,8 lines,9 lines,10 lines,11 lines,12 lines,13 lines,14 lines,15 lines,16 lines"
|
|
bitfld.long 0x10 12.--14. " RD_CAP ,Number of outstanding read transactions" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x10 8.--11. " WR_Q_DEP ,Depth of the write queue" "1 line,2 lines,3 lines,4 lines,5 lines,6 lines,7 lines,8 lines,9 lines,10 lines,11 lines,12 lines,13 lines,14 lines,15 lines,16 lines"
|
|
textline " "
|
|
bitfld.long 0x10 4.--6. " WR_CAP ,Number of outstanding write transactions" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x10 0.--2. " DATA_WIDTH ,Data bus width of the AXI master interface" "Reserved,Reserved,32-bit,64-bit,128-bit,?..."
|
|
group.long 0xE80++0x03
|
|
line.long 0x00 "WD,Watch dog register"
|
|
bitfld.long 0x00 0. " WD_IRQ_ONLY ,Controls how the DMAC responds when it detects a lock-up condition" "Aborted and set,Set"
|
|
group.long 0xFE0++0x1F
|
|
line.long 0x00 "PERIPH_ID_0,Peripheral identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PART_NUMBER_0 ,Part number 0"
|
|
line.long 0x04 "PERIPH_ID_1,Peripheral identification register 1"
|
|
bitfld.long 0x04 4.--7. " DESIGNER_0 ,Designer 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--3. " PART_NUMBER_1 ,Part number 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "PERIPH_ID_2,Peripheral identification register 2"
|
|
bitfld.long 0x08 4.--7. " REVISION ,Revision nuber" "r0p0,r1p0,r1p1,?..."
|
|
bitfld.long 0x08 0.--3. " DESIGNER_1 ,Designer 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x0C "PERIPH_ID_3,Peripheral identification register 3"
|
|
bitfld.long 0x0C 0. " INTEGRATION_CFG ,Integration test logic(ITL) configuration" "No ITL,ITL"
|
|
line.long 0x10 "PCELL_ID_0,Component identification register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PCELL_ID_0 ,Component identification 0"
|
|
line.long 0x14 "PCELL_ID_1,Component identification register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PCELL_ID_1 ,Component identification 1"
|
|
line.long 0x18 "PCELL_ID_2,Component identification register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PCELL_ID_2 ,Component identification 2"
|
|
line.long 0x1C "PCELL_ID_3,Component identification register 3"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PCELL_ID_3 ,Component identification 3"
|
|
width 12.
|
|
tree.end
|
|
tree.end
|
|
tree.open "GEM (Cadence Gigabit Ethernet MAC)"
|
|
tree "GEM0"
|
|
base ad:0xE000B000
|
|
width 23.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "NET_CTRL,Network control register"
|
|
bitfld.long 0x00 18. " FLUSH_NEXT_RX_DPRAM_PKT ,Flush the next packet from the external RX DPRAM" "Not flush,Flush"
|
|
bitfld.long 0x00 17. " TX_PFC_PRI_PRI_PAUSE_FRAME ,Transmit PFC Priority Based Pause Frame" "Low,High"
|
|
bitfld.long 0x00 16. " EN_PFC_PRI_PAUSE_RX ,Enable PFC Priority Based Pause Reception capabilities" "Disable,Enable"
|
|
bitfld.long 0x00 15. " STR_RX_TIMESTAMP ,Store receive time stamp to memory" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TX_ZEROQ_PAUSE_FRAME ,Transmit zero quantum pause frame" "No effect,Pause"
|
|
bitfld.long 0x00 11. " TX_PAUSE_FRAME ,Transmit pause frame" "No effect,Pause"
|
|
bitfld.long 0x00 10. " TX_HALT ,Transmit halt" "No effect,Halt"
|
|
bitfld.long 0x00 9. " START_TX ,Start transmission" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 8. " BACK_PRESSURE ,Back pressure" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " WREN_STAT_REGS ,Write enable for statistics registers" "Non-writeable,Writeable"
|
|
bitfld.long 0x00 6. " INCR_STAT_REGS ,Incremental statistics registers" "No effect,Increment"
|
|
bitfld.long 0x00 5. " CLEAR_STAT_REGS ,Clear statistics registers" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MGMT_PORT_EN ,Management port enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TX_EN ,Transmit enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RX_EN ,Receive enable" "Disabled,Enabled"
|
|
line.long 0x04 "NET_CFG,Network configuration register"
|
|
bitfld.long 0x04 31. " UNIDIR_EN ,Uni-direction-enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " IGNORE_IPG_RX_ER ,Ignore IPG rx_er" "Not ignored,Ignored"
|
|
bitfld.long 0x04 29. " RX_BAD_PREAMBLE ,Receive bad preamble" "Rejected,Not rejected"
|
|
bitfld.long 0x04 28. " IPG_STRETCH_EN ,IPG stretch enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 27. " SGMII_EN ,SGMII mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " IGNORE_RX_FCS ,Ignore RX FCS" "Not ignored,Ignored"
|
|
bitfld.long 0x04 25. " RX_HD_WHILE_TX ,Enable frames to be received in half-duplex mode while transmitting" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " RX_CHKSUM_OFFLD_EN ,Receive checksum offload enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " DIS_CP_PAUSE_FRAME ,Disable copy of pause frames" "No,Yes"
|
|
bitfld.long 0x04 21.--22. " DBUS_WIDTH ,Data bus width" "32 bit,64 bit,128 bit,128 bit"
|
|
bitfld.long 0x04 18.--20. " MDC_CLK_DIV ,MDC clock division" "/8,/16,/32,/48,/64,/96,/128,/224"
|
|
bitfld.long 0x04 17. " FCS_REMOVE ,FCS remove" "Not removed,Removed"
|
|
textline " "
|
|
bitfld.long 0x04 16. " LEN_ERR_FRAME_DISC ,Length field error frame discard" "Not discarded,Discarded"
|
|
bitfld.long 0x04 14.--15. " RX_BUF_OFFSET ,Receive buffer offset" "0,1,2,3"
|
|
bitfld.long 0x04 13. " PAUSE_EN ,Pause enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " RETRY_TEST ,Retry test" "Normal,Retry"
|
|
textline " "
|
|
bitfld.long 0x04 11. " PCS_SEL ,PCS select" "GMII/MII,TBI"
|
|
bitfld.long 0x04 10. " GIGE_EN ,Gigabit mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " EXT_ADDR_MATCH_EN ,External address match enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " RX_1536_BYTE_FRAMES ,Receive 1536 byte frames" "Not accepted,Accepted"
|
|
textline " "
|
|
bitfld.long 0x04 7. " UNI_HASH_EN ,Unicast hash enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " MULTI_HASH_EN ,Multicast hash enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " NO_BROADCAST ,No broadcast" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " COPY_ALL ,Copy all frames" "Not accepted,Accepted"
|
|
textline " "
|
|
bitfld.long 0x04 2. " DISC_NON_VLAN ,Discard non-VLAN frames" "Not discarded,Discarded"
|
|
bitfld.long 0x04 1. " FULL_DUPLEX ,Full duplex" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " SPEED ,Speed" "10Mbps,100Mbps"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "NET_STATUS,Network status register"
|
|
bitfld.long 0x00 6. " PFC_PRI_PAUSE_NEG ,PFC Priority Based Pause negotiation" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " PCS_AUTONEG_PAUSE_TX_RES ,PCS auto-negotiation pause transmit resolution" "Not paused,Paused"
|
|
bitfld.long 0x00 4. " PCS_AUTONEG_PAUSE_RX_RES ,PCS auto-negotiation pause receive resolution" "Not paused,Paused"
|
|
bitfld.long 0x00 3. " PCS_AUTONEG_DUP_RES ,PCS auto-negotiation duplex resolution" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PHY_MGMT_IDLE ,PHY management logic is idle" "Normal,Idle"
|
|
bitfld.long 0x00 1. " MDIO_IN_PIN_STATUS ,Returns status of the mdio_in pin" "Low,High"
|
|
bitfld.long 0x00 0. " PCS_LINK_STATE ,Returns status of PCS link state" "Low,High"
|
|
group.long 0x0C++0x17
|
|
line.long 0x00 "USER_IO,User Input/Output"
|
|
hexmask.long.word 0x00 16.--31. 1. " USER_IN ,User programmable inputs"
|
|
hexmask.long.word 0x00 0.--15. 1. " USER_OUT ,User programmable outputs"
|
|
line.long 0x04 "DMA_CFG,DMA Configuration Register"
|
|
bitfld.long 0x04 24. " DISC_WHEN_NO_AHB ,Discard receive packets when no AHB" "Not discarded,Discarded"
|
|
hexmask.long.byte 0x04 16.--23. 1. " AHB_MEM_RX_BUF_SIZE ,DMA receive buffer size in AHB system memory"
|
|
bitfld.long 0x04 11. " CSUM_GEN_OFFLOAD_EN ,Transmitter IP" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " TX_PKTBUF_MEMSZ_SEL ,Transmitter packet buffer memory size select" "2 Kb,4 Kb"
|
|
textline " "
|
|
bitfld.long 0x04 8.--9. " RX_PKTBUF_MEMSZ_SEL ,Receiver packet buffer memory size select" "1 Kb,2 Kb,4 Kb,8 Kb"
|
|
bitfld.long 0x04 7. " AHB_ENDIAN_SWP_PKT_EN ,AHB endian swap mode enable for packet data accesses" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " AHB_ENDIAN_SWP_MGMT_EN ,AHB endian swap mode enable for management descriptor accesses" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--4. " AHB_FIXED_BURST_LEN ,AHB fixed burst length for DMA data operations" "Reserved,SINGLE,SINGLE,SINGLE,INCR4,INCR4,INCR4,INCR4,INCR8,INCR8,INCR8,INCR8,INCR8,INCR8,INCR8,INCR8,INCR16,INCR16,INCR16,INCR16,INCR16,INCR16,INCR16,INCR16,INCR16,INCR16,INCR16,INCR16,INCR16,INCR16,INCR16,INCR16"
|
|
line.long 0x08 "TX_STATUS,Transmit Status Register"
|
|
eventfld.long 0x08 8. " HRESP_NOT_OK ,Hresp not OK" "OK,Not OK"
|
|
eventfld.long 0x08 7. " LATE_COLLISION ,Late collision occurred" "Not occurred,Occurred"
|
|
eventfld.long 0x08 6. " TX_UNDER_RUN ,Transmit under run" "Not forced,Forced"
|
|
eventfld.long 0x08 5. " TX_COMPLETE ,Transmit complete" "Not completed,Completed"
|
|
textline " "
|
|
eventfld.long 0x08 4. " TX_CORR_AHB_ERR ,Transmit frame corruption due to AHB error" "No error,Error"
|
|
eventfld.long 0x08 3. " TX_GO ,Transmit go" "Inactive,Active"
|
|
eventfld.long 0x08 2. " RETRY_LIMIT_EXCEEDED ,Retry limit exceeded" "Not exceeded,Exceeded"
|
|
eventfld.long 0x08 1. " COLLISION ,Collision occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x08 0. " USED_BIT_READ ,Used bit read" "Disabled,Enabled"
|
|
line.long 0x0C "RX_QBAR,Receive Buffer Queue Base Address"
|
|
hexmask.long 0x0C 2.--31. 0x4 " RX_Q_BASE_ADDR ,Receive buffer queue base address"
|
|
line.long 0x10 "TX_QBAR,Transmit Buffer Queue Base Address"
|
|
hexmask.long 0x10 2.--31. 0x4 " TX_Q_BASE_ADDR ,Transmit buffer queue base address"
|
|
line.long 0x14 "RX_STATUS,Receive Status Register"
|
|
eventfld.long 0x14 3. " HRESP_NOT_OK ,Hresp not OK" "OK,Not OK"
|
|
eventfld.long 0x14 2. " RX_OVERRUN ,Receive overrun" "Not received,Received"
|
|
eventfld.long 0x14 1. " FRAME_RECD ,Frame received" "Not received,Received"
|
|
eventfld.long 0x14 0. " BUFFER_NOT_AVAIL ,Buffer not available" "No,Yes"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "INTR_STATUS,Interrupt status register"
|
|
bitfld.long 0x00 26. " TSU_SEC_INCR ,TSU seconds register increment" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 25. " PDELAY_RESP_TX ,PTP pdelay_resp frame transmitted" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. " PDELAY_REQ_TX ,PTP pdelay_req frame transmitted" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 23. " PDELAY_RESP_RX ,PTP pdelay_resp frame received" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PDELAY_REQ_RX ,PTP pdelay_req frame received" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 21. " SYNC_TX ,PTP sync frame transmitted" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " DELAY_REQ_TX ,PTP delay_req frame transmitted" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 19. " SYNC_RX ,PTP sync frame received" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DELAY_REQ_RX ,PTP delay_req frame received" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " PARTNER_PG_RX ,PCS link partner page received" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16. " AUTONEG_COMPLETE ,PCS auto-negotiation complete" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 15. " EXT_INTR ,External interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 14. " PAUSE_TX ,Pause frame transmitted" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 13. " PAUSE_ZERO ,Pause time zero" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " PAUSE_NONZEROQ_RX ,Pause frame with non-zero pause quantum received" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 11. " HRESP_NOT_OK ,Hresp not OK" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RX_OVERRUN ,Receive overrun" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. " LINK_CHNG ,Link change" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 7. " TX_COMPLETE ,Transmit complete" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " TX_CORRUPT_AHB_ERR ,Transmit frame corruption due to AHB error" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RETRY_EX_LATE_COLLISN ,Retry limit exceeded or late collision" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " TX_USED_READ ,TX used bit read" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " RX_USED_READ ,RX used bit read" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " RX_COMPLETE ,Receive complete" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " MGMT_SENT ,Management frame sent" "No interrupt,Interrupt"
|
|
wgroup.long 0x28++0x07
|
|
line.long 0x00 "INTR_EN,Interrupt enable register"
|
|
bitfld.long 0x00 26. " TSU_SEC_INCR ,Enable TSU seconds register increment interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 25. " PDELAY_RESP_TX ,Enable PTP pdelay_resp frame transmitted interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 24. " PDELAY_REQ_TX ,Enable PTP pdelay_req frame transmitted interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 23. " PDELAY_RESP_RX ,Enable PTP pdelay_resp frame received interrupt" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PDELAY_REQ_RX ,Enable PTP pdelay_req frame received interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 21. " SYNC_TX ,Enable PTP sync frame transmitted interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 20. " DELAY_REQ_TX ,Enable PTP delay_req frame transmitted interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 19. " SYNC_RX ,Enable PTP sync frame received interrupt" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DELAY_REQ_RX ,Enable PTP delay_req frame received interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 17. " PARTNER_PG_RX ,Enable PCS link partner page received interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 16. " AUTONEG_COMPLETE ,Enable PCS auto-negotiation complete interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 15. " EXT_INTR ,Enable external interrupt" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 14. " PAUSE_TX ,Enable pause frame transmitted interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 13. " PAUSE_ZERO ,Enable pause time zero interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 12. " PAUSE_NONZEROQ_RX ,Enable pause frame with non-zero pause quantum received interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 11. " HRESP_NOT_OK ,Enable hresp not OK interrupt" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RX_OVERRUN ,Enable receive overrun interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 9. " LINK_CHNG ,Enable link change interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 7. " TX_COMPLETE ,Enable transmit complete interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 6. " TX_CORRUPT_AHB_ERR ,Enable transmit frame corruption due to AHB error interrupt" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RETRY_EX_LATE_COLLISN ,Enable retry limit exceeded or late collision interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 3. " TX_USED_READ ,Enable TX used bit read interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 2. " RX_USED_READ ,Enable RX used bit read interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 1. " RX_COMPLETE ,Enable receive complete interrupt" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 0. " MGMT_SENT ,Enable management frame sent interrupt" "No effect,Enable"
|
|
line.long 0x04 "INTR_DIS,Interrupt disable register"
|
|
bitfld.long 0x04 26. " TSU_SEC_INCR ,Disable TSU seconds register increment interrupt" "No,Yes"
|
|
bitfld.long 0x04 25. " PDELAY_RESP_TX ,Disable PTP pdelay_resp frame transmitted interrupt" "No,Yes"
|
|
bitfld.long 0x04 24. " PDELAY_REQ_TX ,Disable PTP pdelay_req frame transmitted interrupt" "No,Yes"
|
|
bitfld.long 0x04 23. " PDELAY_RESP_RX ,Disable PTP pdelay_resp frame received interrupt" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x04 22. " PDELAY_REQ_RX ,Disable PTP pdelay_req frame received interrupt" "No,Yes"
|
|
bitfld.long 0x04 21. " SYNC_TX ,Disable PTP sync frame transmitted interrupt" "No,Yes"
|
|
bitfld.long 0x04 20. " DELAY_REQ_TX ,Disable PTP delay_req frame transmitted interrupt" "No,Yes"
|
|
bitfld.long 0x04 19. " SYNC_RX ,Disable PTP sync frame received interrupt" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x04 18. " DELAY_REQ_RX ,Disable PTP delay_req frame received interrupt" "No,Yes"
|
|
bitfld.long 0x04 17. " PARTNER_PG_RX ,Disable PCS link partner page received interrupt" "No,Yes"
|
|
bitfld.long 0x04 16. " AUTONEG_COMPLETE ,Disable PCS auto-negotiation complete interrupt" "No,Yes"
|
|
bitfld.long 0x04 15. " EXT_INTR ,Disable external interrupt" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x04 14. " PAUSE_TX ,Disable pause frame transmitted interrupt" "No,Yes"
|
|
bitfld.long 0x04 13. " PAUSE_ZERO ,Disable pause time zero interrupt" "No,Yes"
|
|
bitfld.long 0x04 12. " PAUSE_NONZEROQ_RX ,Disable pause frame with non-zero pause quantum received interrupt" "No,Yes"
|
|
bitfld.long 0x04 11. " HRESP_NOT_OK ,Disable hresp not OK interrupt" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x04 10. " RX_OVERRUN ,Disable receive overrun interrupt" "No,Yes"
|
|
bitfld.long 0x04 9. " LINK_CHNG ,Disable link change interrupt" "No,Yes"
|
|
bitfld.long 0x04 7. " TX_COMPLETE ,Disable transmit complete interrupt" "No,Yes"
|
|
bitfld.long 0x04 6. " TX_CORRUPT_AHB_ERR ,Disable transmit frame corruption due to AHB error interrupt" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x04 5. " RETRY_EX_LATE_COLLISN ,Disable retry limit exceeded or late collision interrupt" "No,Yes"
|
|
bitfld.long 0x04 3. " TX_USED_READ ,Disable TX used bit read interrupt" "No,Yes"
|
|
bitfld.long 0x04 2. " RX_USED_READ ,Disable RX used bit read interrupt" "No,Yes"
|
|
bitfld.long 0x04 1. " RX_COMPLETE ,Disable receive complete interrupt" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x04 0. " MGMT_SENT ,Disable management frame sent interrupt" "No,Yes"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "INTR_MASK,Interrupt mask register"
|
|
bitfld.long 0x00 25. " PDELAY_RESP_TX ,PTP pdelay_resp frame transmitted mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " PDELAY_REQ_TX ,PTP pdelay_req frame transmitted mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " PDELAY_RESP_RX ,PTP pdelay_resp frame received mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PDELAY_REQ_RX ,PTP pdelay_req frame received mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " SYNC_TX ,PTP sync frame transmitted mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " DELAY_REQ_TX ,PTP delay_req frame transmitted mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " SYNC_RX ,PTP sync frame received mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DELAY_REQ_RX ,PTP delay_req frame received mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " PARTNER_PG_RX ,PCS link partner page received mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " AUTONEG_COMPLETE ,PCS auto-negotiation complete mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " EXT_INTR ,External interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " PAUSE_TX ,Pause frame transmitted interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " PAUSE_ZERO ,Pause time zero interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " PAUSE_NONZEROQ_RX ,Pause frame with non-zero pause quantum received interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " HRESP_NOT_OK ,Hresp not OK interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RX_OVERRUN ,Receive overrun interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " LINK_CHNG ,Link change interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " TX_COMPLETE ,Transmit complete interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " TX_CORRUPT_AHB_ERR ,Transmit frame corruption due to AHB error interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RETRY_EX_LATE_COLLISN ,Retry limit exceeded or late collision interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " TX_USED_READ ,TX used bit read interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " RX_USED_READ ,RX used bit read interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " RX_COMPLETE ,Receive complete interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " MGMT_SENT ,Management frame sent interrupt mask" "Not masked,Masked"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "PHY_MAINT,PHY maintenance register"
|
|
bitfld.long 0x00 30. " CLAUSE_22 ,Clause 22 operation" "Disabled,Enabled"
|
|
bitfld.long 0x00 28.--29. " OPERATION ,Operation." "Reserved,Write,Read,?..."
|
|
bitfld.long 0x00 23.--27. " PHY_ADDR ,PHY address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 18.--22. " REG_ADDR ,Register address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " MUST_10 ,Must be written to 10" "0,1,2,3"
|
|
hexmask.long.word 0x00 0.--15. 1. " DATA ,Data to be written to the PHY"
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "RX_PAUSEQ,Received pause quantum register"
|
|
hexmask.long.word 0x00 0.--15. 1. " RX_PAUSEQ ,Received pause quantum"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "TX_PAUSEQ,Transmit pause quantum register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TX_PAUSEQ ,Transmit pause quantum"
|
|
group.long 0x80++0x4F
|
|
line.long 0x00 "HASH_BOT,Hash register bottom"
|
|
line.long 0x04 "HASH_TOP,Hash register top"
|
|
line.long 0x08 "SPEC_ADDR1_BOT,Specific Address 1 Bottom"
|
|
line.long 0x0C "SPEC_ADDR1_TOP,Specific Address 1 Top"
|
|
hexmask.long.word 0x0C 0.--15. 1. " ADDR_MSBS ,Specific address 1"
|
|
line.long 0x10 "SPEC_ADDR2_BOT,Specific Address 2 Bottom"
|
|
line.long 0x14 "SPEC_ADDR2_TOP,Specific Address 2 Top"
|
|
hexmask.long.word 0x14 0.--15. 1. " ADDR_MSBS ,Specific address 2"
|
|
line.long 0x18 "SPEC_ADDR3_BOT,Specific Address 3 Bottom"
|
|
line.long 0x1C "SPEC_ADDR3_TOP,Specific Address 3 Top"
|
|
hexmask.long.word 0x1C 0.--15. 1. " ADDR_MSBS ,Specific address 3"
|
|
line.long 0x20 "SPEC_ADDR4_BOT,Specific Address 4 Bottom"
|
|
line.long 0x24 "SPEC_ADDR4_TOP,Specific Address 4 Top"
|
|
hexmask.long.word 0x24 0.--15. 1. " ADDR_MSBS ,Specific address 4"
|
|
line.long 0x28 "TYPE_ID_MATCH1,Type ID Match 1"
|
|
bitfld.long 0x28 31. " COPY_EN ,Enable copying of type ID match 1 matched frames" "Disabled,Enabled"
|
|
hexmask.long.word 0x28 0.--15. 1. " TYPE_ID_MATCH1 ,Type ID Match 1"
|
|
line.long 0x2C "TYPE_ID_MATCH2,Type ID Match 2"
|
|
bitfld.long 0x2C 31. " COPY_EN ,Enable copying of type ID match 2 matched frames" "Disabled,Enabled"
|
|
hexmask.long.word 0x2C 0.--15. 1. " TYPE_ID_MATCH2 ,Type ID Match 2"
|
|
line.long 0x30 "TYPE_ID_MATCH3,Type ID Match 3"
|
|
bitfld.long 0x30 31. " COPY_EN ,Enable copying of type ID match 3 matched frames" "Disabled,Enabled"
|
|
hexmask.long.word 0x30 0.--15. 1. " TYPE_ID_MATCH3 ,Type ID Match 3"
|
|
line.long 0x34 "TYPE_ID_MATCH4,Type ID Match 4"
|
|
bitfld.long 0x34 31. " COPY_EN ,Enable copying of type ID match 4 matched frames" "Disabled,Enabled"
|
|
hexmask.long.word 0x34 0.--15. 1. " TYPE_ID_MATCH4 ,Type ID Match 4"
|
|
line.long 0x38 "WAKE_ON_LAN,Wake on LAN Register"
|
|
bitfld.long 0x38 19. " MULTI_HASH_EN ,Wake on LAN multicast hash event enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 18. " SPEC_ADDR_REG1_EN ,Wake on LAN specific address register 1 event enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 17. " ARP_REQ_EN ,Wake on LAN ARP request event enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 16. " MAGIC_PKT_EN ,Wake on LAN magic packet event enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.word 0x38 0.--15. 1. " ARP_REQ_IP_ADDR ,Wake on LAN ARP request IP address"
|
|
line.long 0x3C "IPG_STRECH,IPG stretch register"
|
|
hexmask.long.word 0x3C 0.--15. 1. " IPG_STRETCH ,IPG stretch"
|
|
line.long 0x40 "STACKED_VLAN,Stacked VLAN Register"
|
|
bitfld.long 0x40 31. " STACKED_VLAN_EN ,Enable Stacked VLAN processing mode" "Disabled,Enabled"
|
|
hexmask.long.word 0x40 0.--15. 1. " USER_DEF_VLAN_TYPE ,User defined VLAN_TYPE field"
|
|
line.long 0x44 "TX_PFC_PAUSE,Transmit PFC Pause Register"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PAUSEQ_SEL ,Pause quantum select"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_EN_VEC_VAL ,Priority enable vector value"
|
|
line.long 0x48 "SPEC_ADDR1_MASK_BOT,Specific Address Mask 1 Bottom"
|
|
bitfld.long 0x48 31. " MASK_BITS_BOT ,Mask bit 31" "0,1"
|
|
bitfld.long 0x48 30. ",Mask bit 30" "0,1"
|
|
bitfld.long 0x48 29. ",Mask bit 29" "0,1"
|
|
bitfld.long 0x48 28. ",Mask bit 28" "0,1"
|
|
bitfld.long 0x48 27. ",Mask bit 27" "0,1"
|
|
bitfld.long 0x48 26. ",Mask bit 26" "0,1"
|
|
bitfld.long 0x48 25. ",Mask bit 25" "0,1"
|
|
bitfld.long 0x48 24. ",Mask bit 24" "0,1"
|
|
bitfld.long 0x48 23. ",Mask bit 23" "0,1"
|
|
bitfld.long 0x48 22. ",Mask bit 22" "0,1"
|
|
bitfld.long 0x48 21. ",Mask bit 21" "0,1"
|
|
bitfld.long 0x48 20. ",Mask bit 20" "0,1"
|
|
bitfld.long 0x48 19. ",Mask bit 19" "0,1"
|
|
bitfld.long 0x48 18. ",Mask bit 18" "0,1"
|
|
bitfld.long 0x48 17. ",Mask bit 17" "0,1"
|
|
bitfld.long 0x48 16. ",Mask bit 16" "0,1"
|
|
bitfld.long 0x48 15. ",Mask bit 15" "0,1"
|
|
bitfld.long 0x48 14. ",Mask bit 14" "0,1"
|
|
bitfld.long 0x48 13. ",Mask bit 13" "0,1"
|
|
bitfld.long 0x48 12. ",Mask bit 12" "0,1"
|
|
bitfld.long 0x48 11. ",Mask bit 11" "0,1"
|
|
bitfld.long 0x48 10. ",Mask bit 10" "0,1"
|
|
bitfld.long 0x48 9. ",Mask bit 9" "0,1"
|
|
bitfld.long 0x48 8. ",Mask bit 8" "0,1"
|
|
bitfld.long 0x48 7. ",Mask bit 7" "0,1"
|
|
bitfld.long 0x48 6. ",Mask bit 6" "0,1"
|
|
bitfld.long 0x48 5. ",Mask bit 5" "0,1"
|
|
bitfld.long 0x48 4. ",Mask bit 4" "0,1"
|
|
bitfld.long 0x48 3. ",Mask bit 3" "0,1"
|
|
bitfld.long 0x48 2. ",Mask bit 2" "0,1"
|
|
bitfld.long 0x48 1. ",Mask bit 1" "0,1"
|
|
bitfld.long 0x48 0. ",Mask bit 0" "0,1"
|
|
line.long 0x4C "SPEC_ADDR1_MASK_TOP,Specific Address Mask 1 Top"
|
|
bitfld.long 0x4C 15. " MASK_BITS_TOP ,Mask bit 47" "0,1"
|
|
bitfld.long 0x4C 14. ",Mask bit 46" "0,1"
|
|
bitfld.long 0x4C 13. ",Mask bit 45" "0,1"
|
|
bitfld.long 0x4C 12. ",Mask bit 44" "0,1"
|
|
bitfld.long 0x4C 11. ",Mask bit 43" "0,1"
|
|
bitfld.long 0x4C 10. ",Mask bit 42" "0,1"
|
|
bitfld.long 0x4C 9. ",Mask bit 41" "0,1"
|
|
bitfld.long 0x4C 8. ",Mask bit 40" "0,1"
|
|
bitfld.long 0x4C 7. ",Mask bit 39" "0,1"
|
|
bitfld.long 0x4C 6. ",Mask bit 38" "0,1"
|
|
bitfld.long 0x4C 5. ",Mask bit 37" "0,1"
|
|
bitfld.long 0x4C 4. ",Mask bit 36" "0,1"
|
|
bitfld.long 0x4C 3. ",Mask bit 35" "0,1"
|
|
bitfld.long 0x4C 2. ",Mask bit 34" "0,1"
|
|
bitfld.long 0x4C 1. ",Mask bit 33" "0,1"
|
|
bitfld.long 0x4C 0. ",Mask bit 32" "0,1"
|
|
rgroup.long 0xFC++0x03
|
|
line.long 0x00 "MODULE_ID,Module ID Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " MODULE_ID ,Module identification number"
|
|
hexmask.long.word 0x00 0.--15. 1. " MODULE_REV ,Module revision"
|
|
if (((d.l(ad:0xE000B000))&0x80)==0x80)
|
|
group.long 0x100++0x83
|
|
line.long 0x00 "OCTETS_TX_BOT,Octets Transmitted Bottom Register"
|
|
line.long 0x04 "OCTETS_TX_TOP,Octets Transmitted Top Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " OCTETS_TX_TOP ,Transmitted octets in frame without errors"
|
|
line.long 0x08 "FRAMES_TX,Frames transmitted without error"
|
|
line.long 0x0C "BROADCAST_FRAMES_TX,Broadcast frames transmitted without error"
|
|
line.long 0x10 "MULTI_FRAMES_TX,Multicast frames transmitted without error"
|
|
line.long 0x14 "PAUSE_FRAMES_TX,Transmitted pause frames"
|
|
hexmask.long.word 0x14 0.--15. 1. " PAUSE_FRAMES_TX ,Transmitted pause frames"
|
|
line.long 0x18 "FRAMES_64B_TX,64 byte frames transmitted without error"
|
|
line.long 0x1C "FRAMES_65TO127B_TX,65 to 127 byte frames transmitted without error"
|
|
line.long 0x20 "FRAMES_128TO255B_TX,128 to 255 byte frames transmitted without error"
|
|
line.long 0x24 "FRAMES_256TO511B_TX,256 to 511 byte frames transmitted without error"
|
|
line.long 0x28 "FRAMES_512TO1023B_TX,512 to 1023 byte frames transmitted without error"
|
|
line.long 0x2C "FRAMES_1024TO1518B_TX,1024 to 1518 byte frames transmitted without error"
|
|
line.long 0x30 "FRAMES_GT1518B_TX,Greater than 1518 byte frames transmitted without error"
|
|
line.long 0x34 "TX_UNDER_RUNS,Transmit under runs"
|
|
hexmask.long.word 0x34 0.--9. 1. " TX_UNDER_RUNS ,Transmit under runs"
|
|
line.long 0x38 "SINGLE_COLLISN_FRAMES,Single Collision Frames"
|
|
hexmask.long.tbyte 0x38 0.--17. 1. " SINGLE_COLLISN ,Single collision frames"
|
|
line.long 0x3C "MULTI_COLLISN_FRAMES,Multiple Collision Frames"
|
|
hexmask.long.tbyte 0x3C 0.--17. 1. " MULTI_COLLISN ,Multiple collision frames"
|
|
line.long 0x40 "EXCESSIVE_COLLISNS,Excessive Collisions"
|
|
hexmask.long.word 0x40 0.--9. 1. " EXCESSIVE_COLLISNS ,Excessive collisions"
|
|
line.long 0x44 "LATE_COLLISNS,Late Collisions"
|
|
hexmask.long.word 0x44 0.--9. 1. " LATE_COLLISNS ,Late collisions"
|
|
line.long 0x48 "DEFERRED_TX_FRAMES,Deferred Transmission Frames"
|
|
hexmask.long.tbyte 0x48 0.--17. 1. " DEFERRED_TX ,Deferred transmission frames"
|
|
line.long 0x4C "CARRIER_SENSE_ERRS,Carrier Sense Errors"
|
|
hexmask.long.word 0x4C 0.--9. 1. " CARRIER_SENSE_ERRS ,Carrier sense errors"
|
|
line.long 0x50 "OCTETS_RX_BOT,Octets Received Bot"
|
|
line.long 0x54 "OCTETS_RX_TOP,Octets Received Top"
|
|
hexmask.long.word 0x54 0.--15. 1. " OCTETS_RX_TOP ,Received octets in frame without errors"
|
|
line.long 0x58 "FRAMES_RX,Frames received without error"
|
|
line.long 0x5C "BDCAST_FAMES_RX,Broadcast frames received without error"
|
|
line.long 0x60 "MULTI_FRAMES_RX,Multicast frames received without error"
|
|
line.long 0x64 "PAUSE_RX,Pause frames received"
|
|
line.long 0x68 "FRAMES_64B_RX,64 byte frames received without error"
|
|
line.long 0x6C "FRAMES_65TO127B_RX,65 to 127 byte frames received without error"
|
|
line.long 0x70 "FRAMES_128TO255B_RX,128 to 255 byte frames received without error"
|
|
line.long 0x74 "FRAMES_256TO511B_RX,256 to 511 byte frames received without error"
|
|
line.long 0x78 "FRAMES_512TO1023B_RX,512 to 1023 byte frames received without error"
|
|
line.long 0x7C "FRAMES_1024TO1518B_RX,1024 to 1518 byte frames received without error"
|
|
line.long 0x80 "FRAMES_GT1518B_RX,1519 to maximum byte frames received without error"
|
|
else
|
|
rgroup.long 0x100++0x83
|
|
line.long 0x00 "OCTETS_TX_BOT,Octets Transmitted Bottom Register"
|
|
line.long 0x04 "OCTETS_TX_TOP,Octets Transmitted Top Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " OCTETS_TX_TOP ,Transmitted octets in frame without errors"
|
|
line.long 0x08 "FRAMES_TX,Frames transmitted without error"
|
|
line.long 0x0C "BROADCAST_FRAMES_TX,Broadcast frames transmitted without error"
|
|
line.long 0x10 "MULTI_FRAMES_TX,Multicast frames transmitted without error"
|
|
line.long 0x14 "PAUSE_FRAMES_TX,Transmitted pause frames"
|
|
hexmask.long.word 0x14 0.--15. 1. " PAUSE_FRAMES_TX ,Transmitted pause frames"
|
|
line.long 0x18 "FRAMES_64B_TX,64 byte frames transmitted without error"
|
|
line.long 0x1C "FRAMES_65TO127B_TX,65 to 127 byte frames transmitted without error"
|
|
line.long 0x20 "FRAMES_128TO255B_TX,128 to 255 byte frames transmitted without error"
|
|
line.long 0x24 "FRAMES_256TO511B_TX,256 to 511 byte frames transmitted without error"
|
|
line.long 0x28 "FRAMES_512TO1023B_TX,512 to 1023 byte frames transmitted without error"
|
|
line.long 0x2C "FRAMES_1024TO1518B_TX,1024 to 1518 byte frames transmitted without error"
|
|
line.long 0x30 "FRAMES_GT1518B_TX,Greater than 1518 byte frames transmitted without error"
|
|
line.long 0x34 "TX_UNDER_RUNS,Transmit under runs"
|
|
hexmask.long.word 0x34 0.--9. 1. " TX_UNDER_RUNS ,Transmit under runs"
|
|
line.long 0x38 "SINGLE_COLLISN_FRAMES,Single Collision Frames"
|
|
hexmask.long.tbyte 0x38 0.--17. 1. " SINGLE_COLLISN ,Single collision frames"
|
|
line.long 0x3C "MULTI_COLLISN_FRAMES,Multiple Collision Frames"
|
|
hexmask.long.tbyte 0x3C 0.--17. 1. " MULTI_COLLISN ,Multiple collision frames"
|
|
line.long 0x40 "EXCESSIVE_COLLISNS,Excessive Collisions"
|
|
hexmask.long.word 0x40 0.--9. 1. " EXCESSIVE_COLLISNS ,Excessive collisions"
|
|
line.long 0x44 "LATE_COLLISNS,Late Collisions"
|
|
hexmask.long.word 0x44 0.--9. 1. " LATE_COLLISNS ,Late collisions"
|
|
line.long 0x48 "DEFERRED_TX_FRAMES,Deferred Transmission Frames"
|
|
hexmask.long.tbyte 0x48 0.--17. 1. " DEFERRED_TX ,Deferred transmission frames"
|
|
line.long 0x4C "CARRIER_SENSE_ERRS,Carrier Sense Errors"
|
|
hexmask.long.word 0x4C 0.--9. 1. " CARRIER_SENSE_ERRS ,Carrier sense errors"
|
|
line.long 0x50 "OCTETS_RX_BOT,Octets Received Bot"
|
|
line.long 0x54 "OCTETS_RX_TOP,Octets Received Top"
|
|
hexmask.long.word 0x54 0.--15. 1. " OCTETS_RX_TOP ,Received octets in frame without errors"
|
|
line.long 0x58 "FRAMES_RX,Frames received without error"
|
|
line.long 0x5C "BDCAST_FAMES_RX,Broadcast frames received without error"
|
|
line.long 0x60 "MULTI_FRAMES_RX,Multicast frames received without error"
|
|
line.long 0x64 "PAUSE_RX,Pause frames received"
|
|
line.long 0x68 "FRAMES_64B_RX,64 byte frames received without error"
|
|
line.long 0x6C "FRAMES_65TO127B_RX,65 to 127 byte frames received without error"
|
|
line.long 0x70 "FRAMES_128TO255B_RX,128 to 255 byte frames received without error"
|
|
line.long 0x74 "FRAMES_256TO511B_RX,256 to 511 byte frames received without error"
|
|
line.long 0x78 "FRAMES_512TO1023B_RX,512 to 1023 byte frames received without error"
|
|
line.long 0x7C "FRAMES_1024TO1518B_RX,1024 to 1518 byte frames received without error"
|
|
line.long 0x80 "FRAMES_GT1518B_RX,1519 to maximum byte frames received without error"
|
|
endif
|
|
rgroup.long 0x184++0x2F
|
|
line.long 0x00 "UNDERSZ_RX,Undersize frames received"
|
|
hexmask.long.word 0x00 0.--9. 1. " UNDERSZ_RX ,Undersize frames received"
|
|
line.long 0x04 "OVERSZ_RX,Oversize frames received"
|
|
hexmask.long.word 0x04 0.--9. 1. " OVERSZ_RX ,Oversize frames received"
|
|
line.long 0x08 "JAB_RX,Jabbers received"
|
|
hexmask.long.word 0x08 0.--9. 1. " JAB_RX ,Jabbers received"
|
|
line.long 0x0C "FCS_ERRORS,Frame check sequence errors"
|
|
hexmask.long.word 0x0C 0.--9. 1. " FCS_ERRORS ,Frame check sequence errors"
|
|
line.long 0x10 "LENGTH_FIELD_ERRORS,Length field frame errors"
|
|
hexmask.long.word 0x10 0.--9. 1. " LENGTH_FIELD_ERRORS ,Length field frame errors"
|
|
line.long 0x14 "RX_SYMBOL_ERRORS,Receive symbol errors"
|
|
hexmask.long.word 0x14 0.--9. 1. " RX_SYMBOL_ERRORS ,Receive symbol errors"
|
|
line.long 0x18 "ALIGN_ERRORS,Alignment errors"
|
|
hexmask.long.word 0x18 0.--9. 1. " ALIGN_ERRORS ,Alignment errors"
|
|
line.long 0x1C "RX_RESOURCE_ERRORS,Receive resource errors"
|
|
hexmask.long.tbyte 0x1C 0.--17. 1. " RX_RESOURCE_ERRORS ,Receive resource errors"
|
|
line.long 0x20 "RX_OVERRUN_ERRORS,Receive overrun errors"
|
|
hexmask.long.word 0x20 0.--9. 1. " RX_OVERRUN_ERRORS ,Receive overrun errors"
|
|
line.long 0x24 "IP_HDR_CSUM_ERRORS,IP header checksum errors"
|
|
hexmask.long.byte 0x24 0.--7. 1. " IP_HDR_CSUM_ERRORS ,IP header checksum errors"
|
|
line.long 0x28 "TCP_CSUM_ERRORS,TCP checksum errors"
|
|
hexmask.long.byte 0x28 0.--7. 1. " TCP_CSUM_ERRORS ,TCP checksum errors"
|
|
line.long 0x2C "UDP_CSUM_ERRORS,UDP checksum error"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " UDP_CSUM_ERRORS ,UDP checksum error"
|
|
group.long 0x1C8++0x0F
|
|
line.long 0x00 "TIMER_STROBE_S,1588 timer sync strobe seconds"
|
|
line.long 0x04 "TIMER_STROBE_NS,1588 timer sync strobe nanoseconds"
|
|
hexmask.long 0x04 0.--29. 1. " NS_REG_VAL ,1588 timer sync strobe nanoseconds"
|
|
line.long 0x08 "TIMER_S,1588 timer seconds"
|
|
line.long 0x0C "TIMER_NS,1588 timer nanoseconds"
|
|
hexmask.long 0x0C 0.--29. 1. " TIMER_CT_NS ,Timer count in nanoseconds"
|
|
wgroup.long 0x1D8++0x03
|
|
line.long 0x00 "TIMER_ADJUST,1588 timer adjust"
|
|
bitfld.long 0x00 31. " ADD_SUBN ,Add/subtract from the 1588 timer" "Add,Subtract"
|
|
hexmask.long 0x00 0.--29. 1. " NS_DELTA ,Number of nanoseconds to increment or decrement the 1588 timer nanoseconds"
|
|
group.long 0x1DC++0x03
|
|
line.long 0x00 "TIMER_INCR,1588 timer increment"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INCR_B4_ALT ,Number of increments after which the alternative increment is used"
|
|
hexmask.long.byte 0x00 8.--15. 1. " ALT_CT_NS_DELTA ,Alternative count of nanoseconds by which the 1588 timer nanoseconds register will be incremented each clock cycle"
|
|
hexmask.long.byte 0x00 0.--7. 1. " NS_DELTA ,Count of nanoseconds by which the 1588 timer nanoseconds register will be incremented each clock cycle"
|
|
rgroup.long 0x1E0++0x1F
|
|
line.long 0x00 "PTP_TX_S,PTP event frame transmitted seconds"
|
|
line.long 0x04 "PTP_TX_NS,PTP event frame transmitted nanoseconds"
|
|
hexmask.long 0x04 0.--29. 1. " NS_REG_VAL ,PTP event frame transmitted nanoseconds"
|
|
line.long 0x08 "PTP_RX_S,PTP event frame received seconds"
|
|
line.long 0x0C "PTP_RX_NS,PTP event frame received nanoseconds"
|
|
hexmask.long 0x0C 0.--29. 1. " NS_REG_VAL ,PTP event frame received nanoseconds"
|
|
line.long 0x10 "PTP_PEER_TX_S,PTP peer event frame transmitted seconds"
|
|
line.long 0x14 "PTP_PEER_TX_NS,PTP peer event frame transmitted nanoseconds"
|
|
hexmask.long 0x14 0.--29. 1. " NS_REG_VAL ,PTP peer event frame transmitted nanoseconds"
|
|
line.long 0x18 "PTP_PEER_RX_S,PTP peer event frame received seconds"
|
|
line.long 0x1C "PTP_PEER_RX_NS,PTP peer event frame received nanoseconds"
|
|
hexmask.long 0x1C 0.--29. 1. " NS_REG_VAL ,PTP peer event frame received nanoseconds"
|
|
rgroup.long 0x280++0x13
|
|
line.long 0x00 "DESIGN_CFG1,Design Configuration Register 1"
|
|
bitfld.long 0x00 25.--27. " GEM_DMA_BUS_WIDTH ,Takes the value of the gem_dma_bus_width DEFINE" "Reserved,32-bit,64-bit,Reserved,128-bit,?..."
|
|
bitfld.long 0x00 22. " GEM_NO_SNAPSHOT ,Takes the value of the gem_no_snapshot DEFINE" "Low,High"
|
|
bitfld.long 0x00 20. " GEM_NO_SCAN_PINS ,Takes the value of the gem_no_scan_pins DEFINE" "Low,High"
|
|
bitfld.long 0x00 8. " GEM_APB_REV2 ,Takes the value of the gem_apb_rev2 DEFINE" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GEM_INT_LOOPBACK ,Takes the value of the gem_int_loopback DEFINE" "Low,High"
|
|
bitfld.long 0x00 0. " GEM_NO_PCS ,Takes the value of the gem_no_pcs DEFINE" "Low,High"
|
|
line.long 0x04 "DESIGN_CFG2,Design Configuration Register 2"
|
|
bitfld.long 0x04 26.--29. " GEM_TX_PBUF_ADDR ,Takes the value of the gem_tx_pbuf_addr DEFINE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 22.--25. " GEM_RX_PBUF_ADDR ,Takes the value of the gem_rx_pbuf_addr DEFINE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 21. " GEM_TX_PKT_BUFFER ,Takes the value of the gem_tx_pkt_buffer DEFINE" "Low,High"
|
|
bitfld.long 0x04 20. " GEM_RX_PKT_BUFFER ,Takes the value of the gem_rx_pkt_buffer DEFINE" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " GEM_HPROT_VALUE ,Takes the value of the gem_hprot_value DEFINE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x04 0.--15. 1. " GEM_JUMBO_MAX_LENGTH ,Takes the value of the gem_jumbo_max_length DEFINE"
|
|
line.long 0x08 "DESIGN_CFG3,Design Configuration Register 3"
|
|
hexmask.long.word 0x08 16.--31. 1. " GEM_RX_BASE2_FIFO_SIZE ,Takes the value of the gem_rx_base2_fifo_size DEFINE"
|
|
hexmask.long.word 0x08 0.--15. 1. " GEM_RX_FIFO_SIZE ,Takes the value of the gem_rx_fifo_size DEFINE"
|
|
line.long 0x0C "DESIGN_CFG4,Design Configuration Register 4"
|
|
hexmask.long.word 0x0C 16.--31. 1. " GEM_TX_BASE2_FIFO_SIZE ,Takes the value of the gem_tx_base2_fifo_size DEFINE"
|
|
hexmask.long.word 0x0C 0.--15. 1. " GEM_TX_FIFO_SIZE ,Takes the value of the gem_tx_fifo_size DEFINE"
|
|
line.long 0x10 "DESIGN_CFG5,Design Configuration Register 5"
|
|
hexmask.long.byte 0x10 20.--27. 1. " GEM_RX_BUFFER_LENGTH_DEF ,Rx buffer length"
|
|
bitfld.long 0x10 19. " GEM_TX_PBUF_SIZE_DEF ,Takes the value of the gem_tx_pbuf_size_def DEFINE" "Low,High"
|
|
bitfld.long 0x10 17.--18. " GEM_RX_PBUF_SIZE_DEF ,Takes the value of the gem_rx_pbuf_size_def DEFINE" "0,1,2,3"
|
|
bitfld.long 0x10 15.--16. " GEM_ENDIAN_SWAP_DEF ,Endian management" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x10 12.--14. " GEM_MDC_CLOCK_DIV ,MDC clock divisor" "/1,/1,/2,/3,/4,/5,/6,/7"
|
|
bitfld.long 0x10 10.--11. " GEM_DMA_BUS_WIDTH ,Takes the value of the gem_dma_bus_width_def DEFINE" "0,1,2,3"
|
|
bitfld.long 0x10 8. " GEM_TSU ,Include support for 1588 Time Stamp Unit" "Not supported,Supported"
|
|
bitfld.long 0x10 4.--7. " GEM_TX_FIFO_CNT_WIDTH ,Width for gem_tx_fifo_size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x10 0.--3. " GEM_RX_FIFO_CNT_WIDTH ,Width for gem_rx_fifo_size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
width 12.
|
|
tree.end
|
|
tree "GEM1"
|
|
base ad:0xE000C000
|
|
width 23.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "NET_CTRL,Network control register"
|
|
bitfld.long 0x00 18. " FLUSH_NEXT_RX_DPRAM_PKT ,Flush the next packet from the external RX DPRAM" "Not flush,Flush"
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|
bitfld.long 0x00 17. " TX_PFC_PRI_PRI_PAUSE_FRAME ,Transmit PFC Priority Based Pause Frame" "Low,High"
|
|
bitfld.long 0x00 16. " EN_PFC_PRI_PAUSE_RX ,Enable PFC Priority Based Pause Reception capabilities" "Disable,Enable"
|
|
bitfld.long 0x00 15. " STR_RX_TIMESTAMP ,Store receive time stamp to memory" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TX_ZEROQ_PAUSE_FRAME ,Transmit zero quantum pause frame" "No effect,Pause"
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|
bitfld.long 0x00 11. " TX_PAUSE_FRAME ,Transmit pause frame" "No effect,Pause"
|
|
bitfld.long 0x00 10. " TX_HALT ,Transmit halt" "No effect,Halt"
|
|
bitfld.long 0x00 9. " START_TX ,Start transmission" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 8. " BACK_PRESSURE ,Back pressure" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " WREN_STAT_REGS ,Write enable for statistics registers" "Non-writeable,Writeable"
|
|
bitfld.long 0x00 6. " INCR_STAT_REGS ,Incremental statistics registers" "No effect,Increment"
|
|
bitfld.long 0x00 5. " CLEAR_STAT_REGS ,Clear statistics registers" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MGMT_PORT_EN ,Management port enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TX_EN ,Transmit enable" "Disabled,Enabled"
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|
bitfld.long 0x00 2. " RX_EN ,Receive enable" "Disabled,Enabled"
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|
line.long 0x04 "NET_CFG,Network configuration register"
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|
bitfld.long 0x04 31. " UNIDIR_EN ,Uni-direction-enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " IGNORE_IPG_RX_ER ,Ignore IPG rx_er" "Not ignored,Ignored"
|
|
bitfld.long 0x04 29. " RX_BAD_PREAMBLE ,Receive bad preamble" "Rejected,Not rejected"
|
|
bitfld.long 0x04 28. " IPG_STRETCH_EN ,IPG stretch enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 27. " SGMII_EN ,SGMII mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " IGNORE_RX_FCS ,Ignore RX FCS" "Not ignored,Ignored"
|
|
bitfld.long 0x04 25. " RX_HD_WHILE_TX ,Enable frames to be received in half-duplex mode while transmitting" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " RX_CHKSUM_OFFLD_EN ,Receive checksum offload enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " DIS_CP_PAUSE_FRAME ,Disable copy of pause frames" "No,Yes"
|
|
bitfld.long 0x04 21.--22. " DBUS_WIDTH ,Data bus width" "32 bit,64 bit,128 bit,128 bit"
|
|
bitfld.long 0x04 18.--20. " MDC_CLK_DIV ,MDC clock division" "/8,/16,/32,/48,/64,/96,/128,/224"
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|
bitfld.long 0x04 17. " FCS_REMOVE ,FCS remove" "Not removed,Removed"
|
|
textline " "
|
|
bitfld.long 0x04 16. " LEN_ERR_FRAME_DISC ,Length field error frame discard" "Not discarded,Discarded"
|
|
bitfld.long 0x04 14.--15. " RX_BUF_OFFSET ,Receive buffer offset" "0,1,2,3"
|
|
bitfld.long 0x04 13. " PAUSE_EN ,Pause enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " RETRY_TEST ,Retry test" "Normal,Retry"
|
|
textline " "
|
|
bitfld.long 0x04 11. " PCS_SEL ,PCS select" "GMII/MII,TBI"
|
|
bitfld.long 0x04 10. " GIGE_EN ,Gigabit mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " EXT_ADDR_MATCH_EN ,External address match enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " RX_1536_BYTE_FRAMES ,Receive 1536 byte frames" "Not accepted,Accepted"
|
|
textline " "
|
|
bitfld.long 0x04 7. " UNI_HASH_EN ,Unicast hash enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " MULTI_HASH_EN ,Multicast hash enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " NO_BROADCAST ,No broadcast" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " COPY_ALL ,Copy all frames" "Not accepted,Accepted"
|
|
textline " "
|
|
bitfld.long 0x04 2. " DISC_NON_VLAN ,Discard non-VLAN frames" "Not discarded,Discarded"
|
|
bitfld.long 0x04 1. " FULL_DUPLEX ,Full duplex" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " SPEED ,Speed" "10Mbps,100Mbps"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "NET_STATUS,Network status register"
|
|
bitfld.long 0x00 6. " PFC_PRI_PAUSE_NEG ,PFC Priority Based Pause negotiation" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " PCS_AUTONEG_PAUSE_TX_RES ,PCS auto-negotiation pause transmit resolution" "Not paused,Paused"
|
|
bitfld.long 0x00 4. " PCS_AUTONEG_PAUSE_RX_RES ,PCS auto-negotiation pause receive resolution" "Not paused,Paused"
|
|
bitfld.long 0x00 3. " PCS_AUTONEG_DUP_RES ,PCS auto-negotiation duplex resolution" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PHY_MGMT_IDLE ,PHY management logic is idle" "Normal,Idle"
|
|
bitfld.long 0x00 1. " MDIO_IN_PIN_STATUS ,Returns status of the mdio_in pin" "Low,High"
|
|
bitfld.long 0x00 0. " PCS_LINK_STATE ,Returns status of PCS link state" "Low,High"
|
|
group.long 0x0C++0x17
|
|
line.long 0x00 "USER_IO,User Input/Output"
|
|
hexmask.long.word 0x00 16.--31. 1. " USER_IN ,User programmable inputs"
|
|
hexmask.long.word 0x00 0.--15. 1. " USER_OUT ,User programmable outputs"
|
|
line.long 0x04 "DMA_CFG,DMA Configuration Register"
|
|
bitfld.long 0x04 24. " DISC_WHEN_NO_AHB ,Discard receive packets when no AHB" "Not discarded,Discarded"
|
|
hexmask.long.byte 0x04 16.--23. 1. " AHB_MEM_RX_BUF_SIZE ,DMA receive buffer size in AHB system memory"
|
|
bitfld.long 0x04 11. " CSUM_GEN_OFFLOAD_EN ,Transmitter IP" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " TX_PKTBUF_MEMSZ_SEL ,Transmitter packet buffer memory size select" "2 Kb,4 Kb"
|
|
textline " "
|
|
bitfld.long 0x04 8.--9. " RX_PKTBUF_MEMSZ_SEL ,Receiver packet buffer memory size select" "1 Kb,2 Kb,4 Kb,8 Kb"
|
|
bitfld.long 0x04 7. " AHB_ENDIAN_SWP_PKT_EN ,AHB endian swap mode enable for packet data accesses" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " AHB_ENDIAN_SWP_MGMT_EN ,AHB endian swap mode enable for management descriptor accesses" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--4. " AHB_FIXED_BURST_LEN ,AHB fixed burst length for DMA data operations" "Reserved,SINGLE,SINGLE,SINGLE,INCR4,INCR4,INCR4,INCR4,INCR8,INCR8,INCR8,INCR8,INCR8,INCR8,INCR8,INCR8,INCR16,INCR16,INCR16,INCR16,INCR16,INCR16,INCR16,INCR16,INCR16,INCR16,INCR16,INCR16,INCR16,INCR16,INCR16,INCR16"
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|
line.long 0x08 "TX_STATUS,Transmit Status Register"
|
|
eventfld.long 0x08 8. " HRESP_NOT_OK ,Hresp not OK" "OK,Not OK"
|
|
eventfld.long 0x08 7. " LATE_COLLISION ,Late collision occurred" "Not occurred,Occurred"
|
|
eventfld.long 0x08 6. " TX_UNDER_RUN ,Transmit under run" "Not forced,Forced"
|
|
eventfld.long 0x08 5. " TX_COMPLETE ,Transmit complete" "Not completed,Completed"
|
|
textline " "
|
|
eventfld.long 0x08 4. " TX_CORR_AHB_ERR ,Transmit frame corruption due to AHB error" "No error,Error"
|
|
eventfld.long 0x08 3. " TX_GO ,Transmit go" "Inactive,Active"
|
|
eventfld.long 0x08 2. " RETRY_LIMIT_EXCEEDED ,Retry limit exceeded" "Not exceeded,Exceeded"
|
|
eventfld.long 0x08 1. " COLLISION ,Collision occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x08 0. " USED_BIT_READ ,Used bit read" "Disabled,Enabled"
|
|
line.long 0x0C "RX_QBAR,Receive Buffer Queue Base Address"
|
|
hexmask.long 0x0C 2.--31. 0x4 " RX_Q_BASE_ADDR ,Receive buffer queue base address"
|
|
line.long 0x10 "TX_QBAR,Transmit Buffer Queue Base Address"
|
|
hexmask.long 0x10 2.--31. 0x4 " TX_Q_BASE_ADDR ,Transmit buffer queue base address"
|
|
line.long 0x14 "RX_STATUS,Receive Status Register"
|
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eventfld.long 0x14 3. " HRESP_NOT_OK ,Hresp not OK" "OK,Not OK"
|
|
eventfld.long 0x14 2. " RX_OVERRUN ,Receive overrun" "Not received,Received"
|
|
eventfld.long 0x14 1. " FRAME_RECD ,Frame received" "Not received,Received"
|
|
eventfld.long 0x14 0. " BUFFER_NOT_AVAIL ,Buffer not available" "No,Yes"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "INTR_STATUS,Interrupt status register"
|
|
bitfld.long 0x00 26. " TSU_SEC_INCR ,TSU seconds register increment" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 25. " PDELAY_RESP_TX ,PTP pdelay_resp frame transmitted" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. " PDELAY_REQ_TX ,PTP pdelay_req frame transmitted" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 23. " PDELAY_RESP_RX ,PTP pdelay_resp frame received" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PDELAY_REQ_RX ,PTP pdelay_req frame received" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 21. " SYNC_TX ,PTP sync frame transmitted" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " DELAY_REQ_TX ,PTP delay_req frame transmitted" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 19. " SYNC_RX ,PTP sync frame received" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DELAY_REQ_RX ,PTP delay_req frame received" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " PARTNER_PG_RX ,PCS link partner page received" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16. " AUTONEG_COMPLETE ,PCS auto-negotiation complete" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 15. " EXT_INTR ,External interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 14. " PAUSE_TX ,Pause frame transmitted" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 13. " PAUSE_ZERO ,Pause time zero" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " PAUSE_NONZEROQ_RX ,Pause frame with non-zero pause quantum received" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 11. " HRESP_NOT_OK ,Hresp not OK" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RX_OVERRUN ,Receive overrun" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. " LINK_CHNG ,Link change" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 7. " TX_COMPLETE ,Transmit complete" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " TX_CORRUPT_AHB_ERR ,Transmit frame corruption due to AHB error" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RETRY_EX_LATE_COLLISN ,Retry limit exceeded or late collision" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " TX_USED_READ ,TX used bit read" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " RX_USED_READ ,RX used bit read" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " RX_COMPLETE ,Receive complete" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " MGMT_SENT ,Management frame sent" "No interrupt,Interrupt"
|
|
wgroup.long 0x28++0x07
|
|
line.long 0x00 "INTR_EN,Interrupt enable register"
|
|
bitfld.long 0x00 26. " TSU_SEC_INCR ,Enable TSU seconds register increment interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 25. " PDELAY_RESP_TX ,Enable PTP pdelay_resp frame transmitted interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 24. " PDELAY_REQ_TX ,Enable PTP pdelay_req frame transmitted interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 23. " PDELAY_RESP_RX ,Enable PTP pdelay_resp frame received interrupt" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PDELAY_REQ_RX ,Enable PTP pdelay_req frame received interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 21. " SYNC_TX ,Enable PTP sync frame transmitted interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 20. " DELAY_REQ_TX ,Enable PTP delay_req frame transmitted interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 19. " SYNC_RX ,Enable PTP sync frame received interrupt" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DELAY_REQ_RX ,Enable PTP delay_req frame received interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 17. " PARTNER_PG_RX ,Enable PCS link partner page received interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 16. " AUTONEG_COMPLETE ,Enable PCS auto-negotiation complete interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 15. " EXT_INTR ,Enable external interrupt" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 14. " PAUSE_TX ,Enable pause frame transmitted interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 13. " PAUSE_ZERO ,Enable pause time zero interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 12. " PAUSE_NONZEROQ_RX ,Enable pause frame with non-zero pause quantum received interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 11. " HRESP_NOT_OK ,Enable hresp not OK interrupt" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RX_OVERRUN ,Enable receive overrun interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 9. " LINK_CHNG ,Enable link change interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 7. " TX_COMPLETE ,Enable transmit complete interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 6. " TX_CORRUPT_AHB_ERR ,Enable transmit frame corruption due to AHB error interrupt" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RETRY_EX_LATE_COLLISN ,Enable retry limit exceeded or late collision interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 3. " TX_USED_READ ,Enable TX used bit read interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 2. " RX_USED_READ ,Enable RX used bit read interrupt" "No effect,Enable"
|
|
bitfld.long 0x00 1. " RX_COMPLETE ,Enable receive complete interrupt" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 0. " MGMT_SENT ,Enable management frame sent interrupt" "No effect,Enable"
|
|
line.long 0x04 "INTR_DIS,Interrupt disable register"
|
|
bitfld.long 0x04 26. " TSU_SEC_INCR ,Disable TSU seconds register increment interrupt" "No,Yes"
|
|
bitfld.long 0x04 25. " PDELAY_RESP_TX ,Disable PTP pdelay_resp frame transmitted interrupt" "No,Yes"
|
|
bitfld.long 0x04 24. " PDELAY_REQ_TX ,Disable PTP pdelay_req frame transmitted interrupt" "No,Yes"
|
|
bitfld.long 0x04 23. " PDELAY_RESP_RX ,Disable PTP pdelay_resp frame received interrupt" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x04 22. " PDELAY_REQ_RX ,Disable PTP pdelay_req frame received interrupt" "No,Yes"
|
|
bitfld.long 0x04 21. " SYNC_TX ,Disable PTP sync frame transmitted interrupt" "No,Yes"
|
|
bitfld.long 0x04 20. " DELAY_REQ_TX ,Disable PTP delay_req frame transmitted interrupt" "No,Yes"
|
|
bitfld.long 0x04 19. " SYNC_RX ,Disable PTP sync frame received interrupt" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x04 18. " DELAY_REQ_RX ,Disable PTP delay_req frame received interrupt" "No,Yes"
|
|
bitfld.long 0x04 17. " PARTNER_PG_RX ,Disable PCS link partner page received interrupt" "No,Yes"
|
|
bitfld.long 0x04 16. " AUTONEG_COMPLETE ,Disable PCS auto-negotiation complete interrupt" "No,Yes"
|
|
bitfld.long 0x04 15. " EXT_INTR ,Disable external interrupt" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x04 14. " PAUSE_TX ,Disable pause frame transmitted interrupt" "No,Yes"
|
|
bitfld.long 0x04 13. " PAUSE_ZERO ,Disable pause time zero interrupt" "No,Yes"
|
|
bitfld.long 0x04 12. " PAUSE_NONZEROQ_RX ,Disable pause frame with non-zero pause quantum received interrupt" "No,Yes"
|
|
bitfld.long 0x04 11. " HRESP_NOT_OK ,Disable hresp not OK interrupt" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x04 10. " RX_OVERRUN ,Disable receive overrun interrupt" "No,Yes"
|
|
bitfld.long 0x04 9. " LINK_CHNG ,Disable link change interrupt" "No,Yes"
|
|
bitfld.long 0x04 7. " TX_COMPLETE ,Disable transmit complete interrupt" "No,Yes"
|
|
bitfld.long 0x04 6. " TX_CORRUPT_AHB_ERR ,Disable transmit frame corruption due to AHB error interrupt" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x04 5. " RETRY_EX_LATE_COLLISN ,Disable retry limit exceeded or late collision interrupt" "No,Yes"
|
|
bitfld.long 0x04 3. " TX_USED_READ ,Disable TX used bit read interrupt" "No,Yes"
|
|
bitfld.long 0x04 2. " RX_USED_READ ,Disable RX used bit read interrupt" "No,Yes"
|
|
bitfld.long 0x04 1. " RX_COMPLETE ,Disable receive complete interrupt" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x04 0. " MGMT_SENT ,Disable management frame sent interrupt" "No,Yes"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "INTR_MASK,Interrupt mask register"
|
|
bitfld.long 0x00 25. " PDELAY_RESP_TX ,PTP pdelay_resp frame transmitted mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " PDELAY_REQ_TX ,PTP pdelay_req frame transmitted mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " PDELAY_RESP_RX ,PTP pdelay_resp frame received mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PDELAY_REQ_RX ,PTP pdelay_req frame received mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " SYNC_TX ,PTP sync frame transmitted mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " DELAY_REQ_TX ,PTP delay_req frame transmitted mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " SYNC_RX ,PTP sync frame received mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DELAY_REQ_RX ,PTP delay_req frame received mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " PARTNER_PG_RX ,PCS link partner page received mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " AUTONEG_COMPLETE ,PCS auto-negotiation complete mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " EXT_INTR ,External interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " PAUSE_TX ,Pause frame transmitted interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " PAUSE_ZERO ,Pause time zero interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " PAUSE_NONZEROQ_RX ,Pause frame with non-zero pause quantum received interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " HRESP_NOT_OK ,Hresp not OK interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RX_OVERRUN ,Receive overrun interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " LINK_CHNG ,Link change interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " TX_COMPLETE ,Transmit complete interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " TX_CORRUPT_AHB_ERR ,Transmit frame corruption due to AHB error interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RETRY_EX_LATE_COLLISN ,Retry limit exceeded or late collision interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " TX_USED_READ ,TX used bit read interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " RX_USED_READ ,RX used bit read interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " RX_COMPLETE ,Receive complete interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " MGMT_SENT ,Management frame sent interrupt mask" "Not masked,Masked"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "PHY_MAINT,PHY maintenance register"
|
|
bitfld.long 0x00 30. " CLAUSE_22 ,Clause 22 operation" "Disabled,Enabled"
|
|
bitfld.long 0x00 28.--29. " OPERATION ,Operation." "Reserved,Write,Read,?..."
|
|
bitfld.long 0x00 23.--27. " PHY_ADDR ,PHY address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 18.--22. " REG_ADDR ,Register address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " MUST_10 ,Must be written to 10" "0,1,2,3"
|
|
hexmask.long.word 0x00 0.--15. 1. " DATA ,Data to be written to the PHY"
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "RX_PAUSEQ,Received pause quantum register"
|
|
hexmask.long.word 0x00 0.--15. 1. " RX_PAUSEQ ,Received pause quantum"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "TX_PAUSEQ,Transmit pause quantum register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TX_PAUSEQ ,Transmit pause quantum"
|
|
group.long 0x80++0x4F
|
|
line.long 0x00 "HASH_BOT,Hash register bottom"
|
|
line.long 0x04 "HASH_TOP,Hash register top"
|
|
line.long 0x08 "SPEC_ADDR1_BOT,Specific Address 1 Bottom"
|
|
line.long 0x0C "SPEC_ADDR1_TOP,Specific Address 1 Top"
|
|
hexmask.long.word 0x0C 0.--15. 1. " ADDR_MSBS ,Specific address 1"
|
|
line.long 0x10 "SPEC_ADDR2_BOT,Specific Address 2 Bottom"
|
|
line.long 0x14 "SPEC_ADDR2_TOP,Specific Address 2 Top"
|
|
hexmask.long.word 0x14 0.--15. 1. " ADDR_MSBS ,Specific address 2"
|
|
line.long 0x18 "SPEC_ADDR3_BOT,Specific Address 3 Bottom"
|
|
line.long 0x1C "SPEC_ADDR3_TOP,Specific Address 3 Top"
|
|
hexmask.long.word 0x1C 0.--15. 1. " ADDR_MSBS ,Specific address 3"
|
|
line.long 0x20 "SPEC_ADDR4_BOT,Specific Address 4 Bottom"
|
|
line.long 0x24 "SPEC_ADDR4_TOP,Specific Address 4 Top"
|
|
hexmask.long.word 0x24 0.--15. 1. " ADDR_MSBS ,Specific address 4"
|
|
line.long 0x28 "TYPE_ID_MATCH1,Type ID Match 1"
|
|
bitfld.long 0x28 31. " COPY_EN ,Enable copying of type ID match 1 matched frames" "Disabled,Enabled"
|
|
hexmask.long.word 0x28 0.--15. 1. " TYPE_ID_MATCH1 ,Type ID Match 1"
|
|
line.long 0x2C "TYPE_ID_MATCH2,Type ID Match 2"
|
|
bitfld.long 0x2C 31. " COPY_EN ,Enable copying of type ID match 2 matched frames" "Disabled,Enabled"
|
|
hexmask.long.word 0x2C 0.--15. 1. " TYPE_ID_MATCH2 ,Type ID Match 2"
|
|
line.long 0x30 "TYPE_ID_MATCH3,Type ID Match 3"
|
|
bitfld.long 0x30 31. " COPY_EN ,Enable copying of type ID match 3 matched frames" "Disabled,Enabled"
|
|
hexmask.long.word 0x30 0.--15. 1. " TYPE_ID_MATCH3 ,Type ID Match 3"
|
|
line.long 0x34 "TYPE_ID_MATCH4,Type ID Match 4"
|
|
bitfld.long 0x34 31. " COPY_EN ,Enable copying of type ID match 4 matched frames" "Disabled,Enabled"
|
|
hexmask.long.word 0x34 0.--15. 1. " TYPE_ID_MATCH4 ,Type ID Match 4"
|
|
line.long 0x38 "WAKE_ON_LAN,Wake on LAN Register"
|
|
bitfld.long 0x38 19. " MULTI_HASH_EN ,Wake on LAN multicast hash event enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 18. " SPEC_ADDR_REG1_EN ,Wake on LAN specific address register 1 event enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 17. " ARP_REQ_EN ,Wake on LAN ARP request event enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 16. " MAGIC_PKT_EN ,Wake on LAN magic packet event enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.word 0x38 0.--15. 1. " ARP_REQ_IP_ADDR ,Wake on LAN ARP request IP address"
|
|
line.long 0x3C "IPG_STRECH,IPG stretch register"
|
|
hexmask.long.word 0x3C 0.--15. 1. " IPG_STRETCH ,IPG stretch"
|
|
line.long 0x40 "STACKED_VLAN,Stacked VLAN Register"
|
|
bitfld.long 0x40 31. " STACKED_VLAN_EN ,Enable Stacked VLAN processing mode" "Disabled,Enabled"
|
|
hexmask.long.word 0x40 0.--15. 1. " USER_DEF_VLAN_TYPE ,User defined VLAN_TYPE field"
|
|
line.long 0x44 "TX_PFC_PAUSE,Transmit PFC Pause Register"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PAUSEQ_SEL ,Pause quantum select"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_EN_VEC_VAL ,Priority enable vector value"
|
|
line.long 0x48 "SPEC_ADDR1_MASK_BOT,Specific Address Mask 1 Bottom"
|
|
bitfld.long 0x48 31. " MASK_BITS_BOT ,Mask bit 31" "0,1"
|
|
bitfld.long 0x48 30. ",Mask bit 30" "0,1"
|
|
bitfld.long 0x48 29. ",Mask bit 29" "0,1"
|
|
bitfld.long 0x48 28. ",Mask bit 28" "0,1"
|
|
bitfld.long 0x48 27. ",Mask bit 27" "0,1"
|
|
bitfld.long 0x48 26. ",Mask bit 26" "0,1"
|
|
bitfld.long 0x48 25. ",Mask bit 25" "0,1"
|
|
bitfld.long 0x48 24. ",Mask bit 24" "0,1"
|
|
bitfld.long 0x48 23. ",Mask bit 23" "0,1"
|
|
bitfld.long 0x48 22. ",Mask bit 22" "0,1"
|
|
bitfld.long 0x48 21. ",Mask bit 21" "0,1"
|
|
bitfld.long 0x48 20. ",Mask bit 20" "0,1"
|
|
bitfld.long 0x48 19. ",Mask bit 19" "0,1"
|
|
bitfld.long 0x48 18. ",Mask bit 18" "0,1"
|
|
bitfld.long 0x48 17. ",Mask bit 17" "0,1"
|
|
bitfld.long 0x48 16. ",Mask bit 16" "0,1"
|
|
bitfld.long 0x48 15. ",Mask bit 15" "0,1"
|
|
bitfld.long 0x48 14. ",Mask bit 14" "0,1"
|
|
bitfld.long 0x48 13. ",Mask bit 13" "0,1"
|
|
bitfld.long 0x48 12. ",Mask bit 12" "0,1"
|
|
bitfld.long 0x48 11. ",Mask bit 11" "0,1"
|
|
bitfld.long 0x48 10. ",Mask bit 10" "0,1"
|
|
bitfld.long 0x48 9. ",Mask bit 9" "0,1"
|
|
bitfld.long 0x48 8. ",Mask bit 8" "0,1"
|
|
bitfld.long 0x48 7. ",Mask bit 7" "0,1"
|
|
bitfld.long 0x48 6. ",Mask bit 6" "0,1"
|
|
bitfld.long 0x48 5. ",Mask bit 5" "0,1"
|
|
bitfld.long 0x48 4. ",Mask bit 4" "0,1"
|
|
bitfld.long 0x48 3. ",Mask bit 3" "0,1"
|
|
bitfld.long 0x48 2. ",Mask bit 2" "0,1"
|
|
bitfld.long 0x48 1. ",Mask bit 1" "0,1"
|
|
bitfld.long 0x48 0. ",Mask bit 0" "0,1"
|
|
line.long 0x4C "SPEC_ADDR1_MASK_TOP,Specific Address Mask 1 Top"
|
|
bitfld.long 0x4C 15. " MASK_BITS_TOP ,Mask bit 47" "0,1"
|
|
bitfld.long 0x4C 14. ",Mask bit 46" "0,1"
|
|
bitfld.long 0x4C 13. ",Mask bit 45" "0,1"
|
|
bitfld.long 0x4C 12. ",Mask bit 44" "0,1"
|
|
bitfld.long 0x4C 11. ",Mask bit 43" "0,1"
|
|
bitfld.long 0x4C 10. ",Mask bit 42" "0,1"
|
|
bitfld.long 0x4C 9. ",Mask bit 41" "0,1"
|
|
bitfld.long 0x4C 8. ",Mask bit 40" "0,1"
|
|
bitfld.long 0x4C 7. ",Mask bit 39" "0,1"
|
|
bitfld.long 0x4C 6. ",Mask bit 38" "0,1"
|
|
bitfld.long 0x4C 5. ",Mask bit 37" "0,1"
|
|
bitfld.long 0x4C 4. ",Mask bit 36" "0,1"
|
|
bitfld.long 0x4C 3. ",Mask bit 35" "0,1"
|
|
bitfld.long 0x4C 2. ",Mask bit 34" "0,1"
|
|
bitfld.long 0x4C 1. ",Mask bit 33" "0,1"
|
|
bitfld.long 0x4C 0. ",Mask bit 32" "0,1"
|
|
rgroup.long 0xFC++0x03
|
|
line.long 0x00 "MODULE_ID,Module ID Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " MODULE_ID ,Module identification number"
|
|
hexmask.long.word 0x00 0.--15. 1. " MODULE_REV ,Module revision"
|
|
if (((d.l(ad:0xE000C000))&0x80)==0x80)
|
|
group.long 0x100++0x83
|
|
line.long 0x00 "OCTETS_TX_BOT,Octets Transmitted Bottom Register"
|
|
line.long 0x04 "OCTETS_TX_TOP,Octets Transmitted Top Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " OCTETS_TX_TOP ,Transmitted octets in frame without errors"
|
|
line.long 0x08 "FRAMES_TX,Frames transmitted without error"
|
|
line.long 0x0C "BROADCAST_FRAMES_TX,Broadcast frames transmitted without error"
|
|
line.long 0x10 "MULTI_FRAMES_TX,Multicast frames transmitted without error"
|
|
line.long 0x14 "PAUSE_FRAMES_TX,Transmitted pause frames"
|
|
hexmask.long.word 0x14 0.--15. 1. " PAUSE_FRAMES_TX ,Transmitted pause frames"
|
|
line.long 0x18 "FRAMES_64B_TX,64 byte frames transmitted without error"
|
|
line.long 0x1C "FRAMES_65TO127B_TX,65 to 127 byte frames transmitted without error"
|
|
line.long 0x20 "FRAMES_128TO255B_TX,128 to 255 byte frames transmitted without error"
|
|
line.long 0x24 "FRAMES_256TO511B_TX,256 to 511 byte frames transmitted without error"
|
|
line.long 0x28 "FRAMES_512TO1023B_TX,512 to 1023 byte frames transmitted without error"
|
|
line.long 0x2C "FRAMES_1024TO1518B_TX,1024 to 1518 byte frames transmitted without error"
|
|
line.long 0x30 "FRAMES_GT1518B_TX,Greater than 1518 byte frames transmitted without error"
|
|
line.long 0x34 "TX_UNDER_RUNS,Transmit under runs"
|
|
hexmask.long.word 0x34 0.--9. 1. " TX_UNDER_RUNS ,Transmit under runs"
|
|
line.long 0x38 "SINGLE_COLLISN_FRAMES,Single Collision Frames"
|
|
hexmask.long.tbyte 0x38 0.--17. 1. " SINGLE_COLLISN ,Single collision frames"
|
|
line.long 0x3C "MULTI_COLLISN_FRAMES,Multiple Collision Frames"
|
|
hexmask.long.tbyte 0x3C 0.--17. 1. " MULTI_COLLISN ,Multiple collision frames"
|
|
line.long 0x40 "EXCESSIVE_COLLISNS,Excessive Collisions"
|
|
hexmask.long.word 0x40 0.--9. 1. " EXCESSIVE_COLLISNS ,Excessive collisions"
|
|
line.long 0x44 "LATE_COLLISNS,Late Collisions"
|
|
hexmask.long.word 0x44 0.--9. 1. " LATE_COLLISNS ,Late collisions"
|
|
line.long 0x48 "DEFERRED_TX_FRAMES,Deferred Transmission Frames"
|
|
hexmask.long.tbyte 0x48 0.--17. 1. " DEFERRED_TX ,Deferred transmission frames"
|
|
line.long 0x4C "CARRIER_SENSE_ERRS,Carrier Sense Errors"
|
|
hexmask.long.word 0x4C 0.--9. 1. " CARRIER_SENSE_ERRS ,Carrier sense errors"
|
|
line.long 0x50 "OCTETS_RX_BOT,Octets Received Bot"
|
|
line.long 0x54 "OCTETS_RX_TOP,Octets Received Top"
|
|
hexmask.long.word 0x54 0.--15. 1. " OCTETS_RX_TOP ,Received octets in frame without errors"
|
|
line.long 0x58 "FRAMES_RX,Frames received without error"
|
|
line.long 0x5C "BDCAST_FAMES_RX,Broadcast frames received without error"
|
|
line.long 0x60 "MULTI_FRAMES_RX,Multicast frames received without error"
|
|
line.long 0x64 "PAUSE_RX,Pause frames received"
|
|
line.long 0x68 "FRAMES_64B_RX,64 byte frames received without error"
|
|
line.long 0x6C "FRAMES_65TO127B_RX,65 to 127 byte frames received without error"
|
|
line.long 0x70 "FRAMES_128TO255B_RX,128 to 255 byte frames received without error"
|
|
line.long 0x74 "FRAMES_256TO511B_RX,256 to 511 byte frames received without error"
|
|
line.long 0x78 "FRAMES_512TO1023B_RX,512 to 1023 byte frames received without error"
|
|
line.long 0x7C "FRAMES_1024TO1518B_RX,1024 to 1518 byte frames received without error"
|
|
line.long 0x80 "FRAMES_GT1518B_RX,1519 to maximum byte frames received without error"
|
|
else
|
|
rgroup.long 0x100++0x83
|
|
line.long 0x00 "OCTETS_TX_BOT,Octets Transmitted Bottom Register"
|
|
line.long 0x04 "OCTETS_TX_TOP,Octets Transmitted Top Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " OCTETS_TX_TOP ,Transmitted octets in frame without errors"
|
|
line.long 0x08 "FRAMES_TX,Frames transmitted without error"
|
|
line.long 0x0C "BROADCAST_FRAMES_TX,Broadcast frames transmitted without error"
|
|
line.long 0x10 "MULTI_FRAMES_TX,Multicast frames transmitted without error"
|
|
line.long 0x14 "PAUSE_FRAMES_TX,Transmitted pause frames"
|
|
hexmask.long.word 0x14 0.--15. 1. " PAUSE_FRAMES_TX ,Transmitted pause frames"
|
|
line.long 0x18 "FRAMES_64B_TX,64 byte frames transmitted without error"
|
|
line.long 0x1C "FRAMES_65TO127B_TX,65 to 127 byte frames transmitted without error"
|
|
line.long 0x20 "FRAMES_128TO255B_TX,128 to 255 byte frames transmitted without error"
|
|
line.long 0x24 "FRAMES_256TO511B_TX,256 to 511 byte frames transmitted without error"
|
|
line.long 0x28 "FRAMES_512TO1023B_TX,512 to 1023 byte frames transmitted without error"
|
|
line.long 0x2C "FRAMES_1024TO1518B_TX,1024 to 1518 byte frames transmitted without error"
|
|
line.long 0x30 "FRAMES_GT1518B_TX,Greater than 1518 byte frames transmitted without error"
|
|
line.long 0x34 "TX_UNDER_RUNS,Transmit under runs"
|
|
hexmask.long.word 0x34 0.--9. 1. " TX_UNDER_RUNS ,Transmit under runs"
|
|
line.long 0x38 "SINGLE_COLLISN_FRAMES,Single Collision Frames"
|
|
hexmask.long.tbyte 0x38 0.--17. 1. " SINGLE_COLLISN ,Single collision frames"
|
|
line.long 0x3C "MULTI_COLLISN_FRAMES,Multiple Collision Frames"
|
|
hexmask.long.tbyte 0x3C 0.--17. 1. " MULTI_COLLISN ,Multiple collision frames"
|
|
line.long 0x40 "EXCESSIVE_COLLISNS,Excessive Collisions"
|
|
hexmask.long.word 0x40 0.--9. 1. " EXCESSIVE_COLLISNS ,Excessive collisions"
|
|
line.long 0x44 "LATE_COLLISNS,Late Collisions"
|
|
hexmask.long.word 0x44 0.--9. 1. " LATE_COLLISNS ,Late collisions"
|
|
line.long 0x48 "DEFERRED_TX_FRAMES,Deferred Transmission Frames"
|
|
hexmask.long.tbyte 0x48 0.--17. 1. " DEFERRED_TX ,Deferred transmission frames"
|
|
line.long 0x4C "CARRIER_SENSE_ERRS,Carrier Sense Errors"
|
|
hexmask.long.word 0x4C 0.--9. 1. " CARRIER_SENSE_ERRS ,Carrier sense errors"
|
|
line.long 0x50 "OCTETS_RX_BOT,Octets Received Bot"
|
|
line.long 0x54 "OCTETS_RX_TOP,Octets Received Top"
|
|
hexmask.long.word 0x54 0.--15. 1. " OCTETS_RX_TOP ,Received octets in frame without errors"
|
|
line.long 0x58 "FRAMES_RX,Frames received without error"
|
|
line.long 0x5C "BDCAST_FAMES_RX,Broadcast frames received without error"
|
|
line.long 0x60 "MULTI_FRAMES_RX,Multicast frames received without error"
|
|
line.long 0x64 "PAUSE_RX,Pause frames received"
|
|
line.long 0x68 "FRAMES_64B_RX,64 byte frames received without error"
|
|
line.long 0x6C "FRAMES_65TO127B_RX,65 to 127 byte frames received without error"
|
|
line.long 0x70 "FRAMES_128TO255B_RX,128 to 255 byte frames received without error"
|
|
line.long 0x74 "FRAMES_256TO511B_RX,256 to 511 byte frames received without error"
|
|
line.long 0x78 "FRAMES_512TO1023B_RX,512 to 1023 byte frames received without error"
|
|
line.long 0x7C "FRAMES_1024TO1518B_RX,1024 to 1518 byte frames received without error"
|
|
line.long 0x80 "FRAMES_GT1518B_RX,1519 to maximum byte frames received without error"
|
|
endif
|
|
rgroup.long 0x184++0x2F
|
|
line.long 0x00 "UNDERSZ_RX,Undersize frames received"
|
|
hexmask.long.word 0x00 0.--9. 1. " UNDERSZ_RX ,Undersize frames received"
|
|
line.long 0x04 "OVERSZ_RX,Oversize frames received"
|
|
hexmask.long.word 0x04 0.--9. 1. " OVERSZ_RX ,Oversize frames received"
|
|
line.long 0x08 "JAB_RX,Jabbers received"
|
|
hexmask.long.word 0x08 0.--9. 1. " JAB_RX ,Jabbers received"
|
|
line.long 0x0C "FCS_ERRORS,Frame check sequence errors"
|
|
hexmask.long.word 0x0C 0.--9. 1. " FCS_ERRORS ,Frame check sequence errors"
|
|
line.long 0x10 "LENGTH_FIELD_ERRORS,Length field frame errors"
|
|
hexmask.long.word 0x10 0.--9. 1. " LENGTH_FIELD_ERRORS ,Length field frame errors"
|
|
line.long 0x14 "RX_SYMBOL_ERRORS,Receive symbol errors"
|
|
hexmask.long.word 0x14 0.--9. 1. " RX_SYMBOL_ERRORS ,Receive symbol errors"
|
|
line.long 0x18 "ALIGN_ERRORS,Alignment errors"
|
|
hexmask.long.word 0x18 0.--9. 1. " ALIGN_ERRORS ,Alignment errors"
|
|
line.long 0x1C "RX_RESOURCE_ERRORS,Receive resource errors"
|
|
hexmask.long.tbyte 0x1C 0.--17. 1. " RX_RESOURCE_ERRORS ,Receive resource errors"
|
|
line.long 0x20 "RX_OVERRUN_ERRORS,Receive overrun errors"
|
|
hexmask.long.word 0x20 0.--9. 1. " RX_OVERRUN_ERRORS ,Receive overrun errors"
|
|
line.long 0x24 "IP_HDR_CSUM_ERRORS,IP header checksum errors"
|
|
hexmask.long.byte 0x24 0.--7. 1. " IP_HDR_CSUM_ERRORS ,IP header checksum errors"
|
|
line.long 0x28 "TCP_CSUM_ERRORS,TCP checksum errors"
|
|
hexmask.long.byte 0x28 0.--7. 1. " TCP_CSUM_ERRORS ,TCP checksum errors"
|
|
line.long 0x2C "UDP_CSUM_ERRORS,UDP checksum error"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " UDP_CSUM_ERRORS ,UDP checksum error"
|
|
group.long 0x1C8++0x0F
|
|
line.long 0x00 "TIMER_STROBE_S,1588 timer sync strobe seconds"
|
|
line.long 0x04 "TIMER_STROBE_NS,1588 timer sync strobe nanoseconds"
|
|
hexmask.long 0x04 0.--29. 1. " NS_REG_VAL ,1588 timer sync strobe nanoseconds"
|
|
line.long 0x08 "TIMER_S,1588 timer seconds"
|
|
line.long 0x0C "TIMER_NS,1588 timer nanoseconds"
|
|
hexmask.long 0x0C 0.--29. 1. " TIMER_CT_NS ,Timer count in nanoseconds"
|
|
wgroup.long 0x1D8++0x03
|
|
line.long 0x00 "TIMER_ADJUST,1588 timer adjust"
|
|
bitfld.long 0x00 31. " ADD_SUBN ,Add/subtract from the 1588 timer" "Add,Subtract"
|
|
hexmask.long 0x00 0.--29. 1. " NS_DELTA ,Number of nanoseconds to increment or decrement the 1588 timer nanoseconds"
|
|
group.long 0x1DC++0x03
|
|
line.long 0x00 "TIMER_INCR,1588 timer increment"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INCR_B4_ALT ,Number of increments after which the alternative increment is used"
|
|
hexmask.long.byte 0x00 8.--15. 1. " ALT_CT_NS_DELTA ,Alternative count of nanoseconds by which the 1588 timer nanoseconds register will be incremented each clock cycle"
|
|
hexmask.long.byte 0x00 0.--7. 1. " NS_DELTA ,Count of nanoseconds by which the 1588 timer nanoseconds register will be incremented each clock cycle"
|
|
rgroup.long 0x1E0++0x1F
|
|
line.long 0x00 "PTP_TX_S,PTP event frame transmitted seconds"
|
|
line.long 0x04 "PTP_TX_NS,PTP event frame transmitted nanoseconds"
|
|
hexmask.long 0x04 0.--29. 1. " NS_REG_VAL ,PTP event frame transmitted nanoseconds"
|
|
line.long 0x08 "PTP_RX_S,PTP event frame received seconds"
|
|
line.long 0x0C "PTP_RX_NS,PTP event frame received nanoseconds"
|
|
hexmask.long 0x0C 0.--29. 1. " NS_REG_VAL ,PTP event frame received nanoseconds"
|
|
line.long 0x10 "PTP_PEER_TX_S,PTP peer event frame transmitted seconds"
|
|
line.long 0x14 "PTP_PEER_TX_NS,PTP peer event frame transmitted nanoseconds"
|
|
hexmask.long 0x14 0.--29. 1. " NS_REG_VAL ,PTP peer event frame transmitted nanoseconds"
|
|
line.long 0x18 "PTP_PEER_RX_S,PTP peer event frame received seconds"
|
|
line.long 0x1C "PTP_PEER_RX_NS,PTP peer event frame received nanoseconds"
|
|
hexmask.long 0x1C 0.--29. 1. " NS_REG_VAL ,PTP peer event frame received nanoseconds"
|
|
rgroup.long 0x280++0x13
|
|
line.long 0x00 "DESIGN_CFG1,Design Configuration Register 1"
|
|
bitfld.long 0x00 25.--27. " GEM_DMA_BUS_WIDTH ,Takes the value of the gem_dma_bus_width DEFINE" "Reserved,32-bit,64-bit,Reserved,128-bit,?..."
|
|
bitfld.long 0x00 22. " GEM_NO_SNAPSHOT ,Takes the value of the gem_no_snapshot DEFINE" "Low,High"
|
|
bitfld.long 0x00 20. " GEM_NO_SCAN_PINS ,Takes the value of the gem_no_scan_pins DEFINE" "Low,High"
|
|
bitfld.long 0x00 8. " GEM_APB_REV2 ,Takes the value of the gem_apb_rev2 DEFINE" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GEM_INT_LOOPBACK ,Takes the value of the gem_int_loopback DEFINE" "Low,High"
|
|
bitfld.long 0x00 0. " GEM_NO_PCS ,Takes the value of the gem_no_pcs DEFINE" "Low,High"
|
|
line.long 0x04 "DESIGN_CFG2,Design Configuration Register 2"
|
|
bitfld.long 0x04 26.--29. " GEM_TX_PBUF_ADDR ,Takes the value of the gem_tx_pbuf_addr DEFINE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 22.--25. " GEM_RX_PBUF_ADDR ,Takes the value of the gem_rx_pbuf_addr DEFINE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 21. " GEM_TX_PKT_BUFFER ,Takes the value of the gem_tx_pkt_buffer DEFINE" "Low,High"
|
|
bitfld.long 0x04 20. " GEM_RX_PKT_BUFFER ,Takes the value of the gem_rx_pkt_buffer DEFINE" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " GEM_HPROT_VALUE ,Takes the value of the gem_hprot_value DEFINE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x04 0.--15. 1. " GEM_JUMBO_MAX_LENGTH ,Takes the value of the gem_jumbo_max_length DEFINE"
|
|
line.long 0x08 "DESIGN_CFG3,Design Configuration Register 3"
|
|
hexmask.long.word 0x08 16.--31. 1. " GEM_RX_BASE2_FIFO_SIZE ,Takes the value of the gem_rx_base2_fifo_size DEFINE"
|
|
hexmask.long.word 0x08 0.--15. 1. " GEM_RX_FIFO_SIZE ,Takes the value of the gem_rx_fifo_size DEFINE"
|
|
line.long 0x0C "DESIGN_CFG4,Design Configuration Register 4"
|
|
hexmask.long.word 0x0C 16.--31. 1. " GEM_TX_BASE2_FIFO_SIZE ,Takes the value of the gem_tx_base2_fifo_size DEFINE"
|
|
hexmask.long.word 0x0C 0.--15. 1. " GEM_TX_FIFO_SIZE ,Takes the value of the gem_tx_fifo_size DEFINE"
|
|
line.long 0x10 "DESIGN_CFG5,Design Configuration Register 5"
|
|
hexmask.long.byte 0x10 20.--27. 1. " GEM_RX_BUFFER_LENGTH_DEF ,Rx buffer length"
|
|
bitfld.long 0x10 19. " GEM_TX_PBUF_SIZE_DEF ,Takes the value of the gem_tx_pbuf_size_def DEFINE" "Low,High"
|
|
bitfld.long 0x10 17.--18. " GEM_RX_PBUF_SIZE_DEF ,Takes the value of the gem_rx_pbuf_size_def DEFINE" "0,1,2,3"
|
|
bitfld.long 0x10 15.--16. " GEM_ENDIAN_SWAP_DEF ,Endian management" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x10 12.--14. " GEM_MDC_CLOCK_DIV ,MDC clock divisor" "/1,/1,/2,/3,/4,/5,/6,/7"
|
|
bitfld.long 0x10 10.--11. " GEM_DMA_BUS_WIDTH ,Takes the value of the gem_dma_bus_width_def DEFINE" "0,1,2,3"
|
|
bitfld.long 0x10 8. " GEM_TSU ,Include support for 1588 Time Stamp Unit" "Not supported,Supported"
|
|
bitfld.long 0x10 4.--7. " GEM_TX_FIFO_CNT_WIDTH ,Width for gem_tx_fifo_size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x10 0.--3. " GEM_RX_FIFO_CNT_WIDTH ,Width for gem_rx_fifo_size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
width 12.
|
|
tree.end
|
|
tree.end
|
|
tree "GPIO (General Purpose Input / Output)"
|
|
base ad:0xE000A000
|
|
width 17.
|
|
group.long 0x0++0x07
|
|
line.long 0x00 "MASK_DATA_0_LSW,Maskable single-word-based data access register"
|
|
bitfld.long 0x00 31. " MASK_0_LSW[15] ,Mask value to be applied on writes to pin 15" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " MASK_0_LSW[14] ,Mask value to be applied on writes to pin 14" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " MASK_0_LSW[13] ,Mask value to be applied on writes to pin 13" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " MASK_0_LSW[12] ,Mask value to be applied on writes to pin 12" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " MASK_0_LSW[11] ,Mask value to be applied on writes to pin 11" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " MASK_0_LSW[10] ,Mask value to be applied on writes to pin 10" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " MASK_0_LSW[9] ,Mask value to be applied on writes to pin 9" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " MASK_0_LSW[8] ,Mask value to be applied on writes to pin 8" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " MASK_0_LSW[7] ,Mask value to be applied on writes to pin 7" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " MASK_0_LSW[6] ,Mask value to be applied on writes to pin 6" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " MASK_0_LSW[5] ,Mask value to be applied on writes to pin 5" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK_0_LSW[4] ,Mask value to be applied on writes to pin 4" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " MASK_0_LSW[3] ,Mask value to be applied on writes to pin 3" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " MASK_0_LSW[2] ,Mask value to be applied on writes to pin 2" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK_0_LSW[1] ,Mask value to be applied on writes to pin 1" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK_0_LSW[0] ,Mask value to be applied on writes to pin 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DATA_0_LSW[15] ,Data value read from or written to pin 15" "Low,High"
|
|
bitfld.long 0x00 14. " DATA_0_LSW[14] ,Data value read from or written to pin 14" "Low,High"
|
|
bitfld.long 0x00 13. " DATA_0_LSW[13] ,Data value read from or written to pin 13" "Low,High"
|
|
bitfld.long 0x00 12. " DATA_0_LSW[12] ,Data value read from or written to pin 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DATA_0_LSW[11] ,Data value read from or written to pin 11" "Low,High"
|
|
bitfld.long 0x00 10. " DATA_0_LSW[10] ,Data value read from or written to pin 10" "Low,High"
|
|
bitfld.long 0x00 9. " DATA_0_LSW[9] ,Data value read from or written to pin 9" "Low,High"
|
|
bitfld.long 0x00 8. " DATA_0_LSW[8] ,Data value read from or written to pin 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DATA_0_LSW[7] ,Data value read from or written to pin 7" "Low,High"
|
|
bitfld.long 0x00 6. " DATA_0_LSW[6] ,Data value read from or written to pin 6" "Low,High"
|
|
bitfld.long 0x00 5. " DATA_0_LSW[5] ,Data value read from or written to pin 5" "Low,High"
|
|
bitfld.long 0x00 4. " DATA_0_LSW[4] ,Data value read from or written to pin 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DATA_0_LSW[3] ,Data value read from or written to pin 3" "Low,High"
|
|
bitfld.long 0x00 2. " DATA_0_LSW[2] ,Data value read from or written to pin 2" "Low,High"
|
|
bitfld.long 0x00 1. " DATA_0_LSW[1] ,Data value read from or written to pin 1" "Low,High"
|
|
bitfld.long 0x00 0. " DATA_0_LSW[0] ,Data value read from or written to pin 0" "Low,High"
|
|
line.long 0x04 "MASK_DATA_0_MSW,Maskable single-word-based data access register"
|
|
bitfld.long 0x04 31. " MASK_0_MSW[15] ,Mask value to be applied on writes to pin 15" "Not masked,Masked"
|
|
bitfld.long 0x04 30. " MASK_0_MSW[14] ,Mask value to be applied on writes to pin 14" "Not masked,Masked"
|
|
bitfld.long 0x04 29. " MASK_0_MSW[13] ,Mask value to be applied on writes to pin 13" "Not masked,Masked"
|
|
bitfld.long 0x04 28. " MASK_0_MSW[12] ,Mask value to be applied on writes to pin 12" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 27. " MASK_0_MSW[11] ,Mask value to be applied on writes to pin 11" "Not masked,Masked"
|
|
bitfld.long 0x04 26. " MASK_0_MSW[10] ,Mask value to be applied on writes to pin 10" "Not masked,Masked"
|
|
bitfld.long 0x04 25. " MASK_0_MSW[9] ,Mask value to be applied on writes to pin 9" "Not masked,Masked"
|
|
bitfld.long 0x04 24. " MASK_0_MSW[8] ,Mask value to be applied on writes to pin 8" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 23. " MASK_0_MSW[7] ,Mask value to be applied on writes to pin 7" "Not masked,Masked"
|
|
bitfld.long 0x04 22. " MASK_0_MSW[6] ,Mask value to be applied on writes to pin 6" "Not masked,Masked"
|
|
bitfld.long 0x04 21. " MASK_0_MSW[5] ,Mask value to be applied on writes to pin 5" "Not masked,Masked"
|
|
bitfld.long 0x04 20. " MASK_0_MSW[4] ,Mask value to be applied on writes to pin 4" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 19. " MASK_0_MSW[3] ,Mask value to be applied on writes to pin 3" "Not masked,Masked"
|
|
bitfld.long 0x04 18. " MASK_0_MSW[2] ,Mask value to be applied on writes to pin 2" "Not masked,Masked"
|
|
bitfld.long 0x04 17. " MASK_0_MSW[1] ,Mask value to be applied on writes to pin 1" "Not masked,Masked"
|
|
bitfld.long 0x04 16. " MASK_0_MSW[0] ,Mask value to be applied on writes to pin 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 15. " DATA_0_MSW[15] ,Data value read from or written to pin 15" "Low,High"
|
|
bitfld.long 0x04 14. " DATA_0_MSW[14] ,Data value read from or written to pin 14" "Low,High"
|
|
bitfld.long 0x04 13. " DATA_0_MSW[13] ,Data value read from or written to pin 13" "Low,High"
|
|
bitfld.long 0x04 12. " DATA_0_MSW[12] ,Data value read from or written to pin 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 11. " DATA_0_MSW[11] ,Data value read from or written to pin 11" "Low,High"
|
|
bitfld.long 0x04 10. " DATA_0_MSW[10] ,Data value read from or written to pin 10" "Low,High"
|
|
bitfld.long 0x04 9. " DATA_0_MSW[9] ,Data value read from or written to pin 9" "Low,High"
|
|
bitfld.long 0x04 8. " DATA_0_MSW[8] ,Data value read from or written to pin 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 7. " DATA_0_MSW[7] ,Data value read from or written to pin 7" "Low,High"
|
|
bitfld.long 0x04 6. " DATA_0_MSW[6] ,Data value read from or written to pin 6" "Low,High"
|
|
bitfld.long 0x04 5. " DATA_0_MSW[5] ,Data value read from or written to pin 5" "Low,High"
|
|
bitfld.long 0x04 4. " DATA_0_MSW[4] ,Data value read from or written to pin 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 3. " DATA_0_MSW[3] ,Data value read from or written to pin 3" "Low,High"
|
|
bitfld.long 0x04 2. " DATA_0_MSW[2] ,Data value read from or written to pin 2" "Low,High"
|
|
bitfld.long 0x04 1. " DATA_0_MSW[1] ,Data value read from or written to pin 1" "Low,High"
|
|
bitfld.long 0x04 0. " DATA_0_MSW[0] ,Data value read from or written to pin 0" "Low,High"
|
|
group.long 0x8++0x07
|
|
line.long 0x00 "MASK_DATA_1_LSW,Maskable single-word-based data access register"
|
|
bitfld.long 0x00 31. " MASK_1_LSW[15] ,Mask value to be applied on writes to pin 15" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " MASK_1_LSW[14] ,Mask value to be applied on writes to pin 14" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " MASK_1_LSW[13] ,Mask value to be applied on writes to pin 13" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " MASK_1_LSW[12] ,Mask value to be applied on writes to pin 12" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " MASK_1_LSW[11] ,Mask value to be applied on writes to pin 11" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " MASK_1_LSW[10] ,Mask value to be applied on writes to pin 10" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " MASK_1_LSW[9] ,Mask value to be applied on writes to pin 9" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " MASK_1_LSW[8] ,Mask value to be applied on writes to pin 8" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " MASK_1_LSW[7] ,Mask value to be applied on writes to pin 7" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " MASK_1_LSW[6] ,Mask value to be applied on writes to pin 6" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " MASK_1_LSW[5] ,Mask value to be applied on writes to pin 5" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK_1_LSW[4] ,Mask value to be applied on writes to pin 4" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " MASK_1_LSW[3] ,Mask value to be applied on writes to pin 3" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " MASK_1_LSW[2] ,Mask value to be applied on writes to pin 2" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK_1_LSW[1] ,Mask value to be applied on writes to pin 1" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK_1_LSW[0] ,Mask value to be applied on writes to pin 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DATA_1_LSW[15] ,Data value read from or written to pin 15" "Low,High"
|
|
bitfld.long 0x00 14. " DATA_1_LSW[14] ,Data value read from or written to pin 14" "Low,High"
|
|
bitfld.long 0x00 13. " DATA_1_LSW[13] ,Data value read from or written to pin 13" "Low,High"
|
|
bitfld.long 0x00 12. " DATA_1_LSW[12] ,Data value read from or written to pin 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DATA_1_LSW[11] ,Data value read from or written to pin 11" "Low,High"
|
|
bitfld.long 0x00 10. " DATA_1_LSW[10] ,Data value read from or written to pin 10" "Low,High"
|
|
bitfld.long 0x00 9. " DATA_1_LSW[9] ,Data value read from or written to pin 9" "Low,High"
|
|
bitfld.long 0x00 8. " DATA_1_LSW[8] ,Data value read from or written to pin 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DATA_1_LSW[7] ,Data value read from or written to pin 7" "Low,High"
|
|
bitfld.long 0x00 6. " DATA_1_LSW[6] ,Data value read from or written to pin 6" "Low,High"
|
|
bitfld.long 0x00 5. " DATA_1_LSW[5] ,Data value read from or written to pin 5" "Low,High"
|
|
bitfld.long 0x00 4. " DATA_1_LSW[4] ,Data value read from or written to pin 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DATA_1_LSW[3] ,Data value read from or written to pin 3" "Low,High"
|
|
bitfld.long 0x00 2. " DATA_1_LSW[2] ,Data value read from or written to pin 2" "Low,High"
|
|
bitfld.long 0x00 1. " DATA_1_LSW[1] ,Data value read from or written to pin 1" "Low,High"
|
|
bitfld.long 0x00 0. " DATA_1_LSW[0] ,Data value read from or written to pin 0" "Low,High"
|
|
line.long 0x04 "MASK_DATA_1_MSW,Maskable single-word-based data access register"
|
|
bitfld.long 0x04 31. " MASK_1_MSW[15] ,Mask value to be applied on writes to pin 15" "Not masked,Masked"
|
|
bitfld.long 0x04 30. " MASK_1_MSW[14] ,Mask value to be applied on writes to pin 14" "Not masked,Masked"
|
|
bitfld.long 0x04 29. " MASK_1_MSW[13] ,Mask value to be applied on writes to pin 13" "Not masked,Masked"
|
|
bitfld.long 0x04 28. " MASK_1_MSW[12] ,Mask value to be applied on writes to pin 12" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 27. " MASK_1_MSW[11] ,Mask value to be applied on writes to pin 11" "Not masked,Masked"
|
|
bitfld.long 0x04 26. " MASK_1_MSW[10] ,Mask value to be applied on writes to pin 10" "Not masked,Masked"
|
|
bitfld.long 0x04 25. " MASK_1_MSW[9] ,Mask value to be applied on writes to pin 9" "Not masked,Masked"
|
|
bitfld.long 0x04 24. " MASK_1_MSW[8] ,Mask value to be applied on writes to pin 8" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 23. " MASK_1_MSW[7] ,Mask value to be applied on writes to pin 7" "Not masked,Masked"
|
|
bitfld.long 0x04 22. " MASK_1_MSW[6] ,Mask value to be applied on writes to pin 6" "Not masked,Masked"
|
|
bitfld.long 0x04 21. " MASK_1_MSW[5] ,Mask value to be applied on writes to pin 5" "Not masked,Masked"
|
|
bitfld.long 0x04 20. " MASK_1_MSW[4] ,Mask value to be applied on writes to pin 4" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 19. " MASK_1_MSW[3] ,Mask value to be applied on writes to pin 3" "Not masked,Masked"
|
|
bitfld.long 0x04 18. " MASK_1_MSW[2] ,Mask value to be applied on writes to pin 2" "Not masked,Masked"
|
|
bitfld.long 0x04 17. " MASK_1_MSW[1] ,Mask value to be applied on writes to pin 1" "Not masked,Masked"
|
|
bitfld.long 0x04 16. " MASK_1_MSW[0] ,Mask value to be applied on writes to pin 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 15. " DATA_1_MSW[15] ,Data value read from or written to pin 15" "Low,High"
|
|
bitfld.long 0x04 14. " DATA_1_MSW[14] ,Data value read from or written to pin 14" "Low,High"
|
|
bitfld.long 0x04 13. " DATA_1_MSW[13] ,Data value read from or written to pin 13" "Low,High"
|
|
bitfld.long 0x04 12. " DATA_1_MSW[12] ,Data value read from or written to pin 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 11. " DATA_1_MSW[11] ,Data value read from or written to pin 11" "Low,High"
|
|
bitfld.long 0x04 10. " DATA_1_MSW[10] ,Data value read from or written to pin 10" "Low,High"
|
|
bitfld.long 0x04 9. " DATA_1_MSW[9] ,Data value read from or written to pin 9" "Low,High"
|
|
bitfld.long 0x04 8. " DATA_1_MSW[8] ,Data value read from or written to pin 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 7. " DATA_1_MSW[7] ,Data value read from or written to pin 7" "Low,High"
|
|
bitfld.long 0x04 6. " DATA_1_MSW[6] ,Data value read from or written to pin 6" "Low,High"
|
|
bitfld.long 0x04 5. " DATA_1_MSW[5] ,Data value read from or written to pin 5" "Low,High"
|
|
bitfld.long 0x04 4. " DATA_1_MSW[4] ,Data value read from or written to pin 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 3. " DATA_1_MSW[3] ,Data value read from or written to pin 3" "Low,High"
|
|
bitfld.long 0x04 2. " DATA_1_MSW[2] ,Data value read from or written to pin 2" "Low,High"
|
|
bitfld.long 0x04 1. " DATA_1_MSW[1] ,Data value read from or written to pin 1" "Low,High"
|
|
bitfld.long 0x04 0. " DATA_1_MSW[0] ,Data value read from or written to pin 0" "Low,High"
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "MASK_DATA_2_LSW,Maskable single-word-based data access register"
|
|
bitfld.long 0x00 31. " MASK_2_LSW[15] ,Mask value to be applied on writes to pin 15" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " MASK_2_LSW[14] ,Mask value to be applied on writes to pin 14" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " MASK_2_LSW[13] ,Mask value to be applied on writes to pin 13" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " MASK_2_LSW[12] ,Mask value to be applied on writes to pin 12" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " MASK_2_LSW[11] ,Mask value to be applied on writes to pin 11" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " MASK_2_LSW[10] ,Mask value to be applied on writes to pin 10" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " MASK_2_LSW[9] ,Mask value to be applied on writes to pin 9" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " MASK_2_LSW[8] ,Mask value to be applied on writes to pin 8" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " MASK_2_LSW[7] ,Mask value to be applied on writes to pin 7" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " MASK_2_LSW[6] ,Mask value to be applied on writes to pin 6" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " MASK_2_LSW[5] ,Mask value to be applied on writes to pin 5" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK_2_LSW[4] ,Mask value to be applied on writes to pin 4" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " MASK_2_LSW[3] ,Mask value to be applied on writes to pin 3" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " MASK_2_LSW[2] ,Mask value to be applied on writes to pin 2" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK_2_LSW[1] ,Mask value to be applied on writes to pin 1" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK_2_LSW[0] ,Mask value to be applied on writes to pin 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DATA_2_LSW[15] ,Data value read from or written to pin 15" "Low,High"
|
|
bitfld.long 0x00 14. " DATA_2_LSW[14] ,Data value read from or written to pin 14" "Low,High"
|
|
bitfld.long 0x00 13. " DATA_2_LSW[13] ,Data value read from or written to pin 13" "Low,High"
|
|
bitfld.long 0x00 12. " DATA_2_LSW[12] ,Data value read from or written to pin 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DATA_2_LSW[11] ,Data value read from or written to pin 11" "Low,High"
|
|
bitfld.long 0x00 10. " DATA_2_LSW[10] ,Data value read from or written to pin 10" "Low,High"
|
|
bitfld.long 0x00 9. " DATA_2_LSW[9] ,Data value read from or written to pin 9" "Low,High"
|
|
bitfld.long 0x00 8. " DATA_2_LSW[8] ,Data value read from or written to pin 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DATA_2_LSW[7] ,Data value read from or written to pin 7" "Low,High"
|
|
bitfld.long 0x00 6. " DATA_2_LSW[6] ,Data value read from or written to pin 6" "Low,High"
|
|
bitfld.long 0x00 5. " DATA_2_LSW[5] ,Data value read from or written to pin 5" "Low,High"
|
|
bitfld.long 0x00 4. " DATA_2_LSW[4] ,Data value read from or written to pin 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DATA_2_LSW[3] ,Data value read from or written to pin 3" "Low,High"
|
|
bitfld.long 0x00 2. " DATA_2_LSW[2] ,Data value read from or written to pin 2" "Low,High"
|
|
bitfld.long 0x00 1. " DATA_2_LSW[1] ,Data value read from or written to pin 1" "Low,High"
|
|
bitfld.long 0x00 0. " DATA_2_LSW[0] ,Data value read from or written to pin 0" "Low,High"
|
|
line.long 0x04 "MASK_DATA_2_MSW,Maskable single-word-based data access register"
|
|
bitfld.long 0x04 31. " MASK_2_MSW[15] ,Mask value to be applied on writes to pin 15" "Not masked,Masked"
|
|
bitfld.long 0x04 30. " MASK_2_MSW[14] ,Mask value to be applied on writes to pin 14" "Not masked,Masked"
|
|
bitfld.long 0x04 29. " MASK_2_MSW[13] ,Mask value to be applied on writes to pin 13" "Not masked,Masked"
|
|
bitfld.long 0x04 28. " MASK_2_MSW[12] ,Mask value to be applied on writes to pin 12" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 27. " MASK_2_MSW[11] ,Mask value to be applied on writes to pin 11" "Not masked,Masked"
|
|
bitfld.long 0x04 26. " MASK_2_MSW[10] ,Mask value to be applied on writes to pin 10" "Not masked,Masked"
|
|
bitfld.long 0x04 25. " MASK_2_MSW[9] ,Mask value to be applied on writes to pin 9" "Not masked,Masked"
|
|
bitfld.long 0x04 24. " MASK_2_MSW[8] ,Mask value to be applied on writes to pin 8" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 23. " MASK_2_MSW[7] ,Mask value to be applied on writes to pin 7" "Not masked,Masked"
|
|
bitfld.long 0x04 22. " MASK_2_MSW[6] ,Mask value to be applied on writes to pin 6" "Not masked,Masked"
|
|
bitfld.long 0x04 21. " MASK_2_MSW[5] ,Mask value to be applied on writes to pin 5" "Not masked,Masked"
|
|
bitfld.long 0x04 20. " MASK_2_MSW[4] ,Mask value to be applied on writes to pin 4" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 19. " MASK_2_MSW[3] ,Mask value to be applied on writes to pin 3" "Not masked,Masked"
|
|
bitfld.long 0x04 18. " MASK_2_MSW[2] ,Mask value to be applied on writes to pin 2" "Not masked,Masked"
|
|
bitfld.long 0x04 17. " MASK_2_MSW[1] ,Mask value to be applied on writes to pin 1" "Not masked,Masked"
|
|
bitfld.long 0x04 16. " MASK_2_MSW[0] ,Mask value to be applied on writes to pin 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 15. " DATA_2_MSW[15] ,Data value read from or written to pin 15" "Low,High"
|
|
bitfld.long 0x04 14. " DATA_2_MSW[14] ,Data value read from or written to pin 14" "Low,High"
|
|
bitfld.long 0x04 13. " DATA_2_MSW[13] ,Data value read from or written to pin 13" "Low,High"
|
|
bitfld.long 0x04 12. " DATA_2_MSW[12] ,Data value read from or written to pin 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 11. " DATA_2_MSW[11] ,Data value read from or written to pin 11" "Low,High"
|
|
bitfld.long 0x04 10. " DATA_2_MSW[10] ,Data value read from or written to pin 10" "Low,High"
|
|
bitfld.long 0x04 9. " DATA_2_MSW[9] ,Data value read from or written to pin 9" "Low,High"
|
|
bitfld.long 0x04 8. " DATA_2_MSW[8] ,Data value read from or written to pin 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 7. " DATA_2_MSW[7] ,Data value read from or written to pin 7" "Low,High"
|
|
bitfld.long 0x04 6. " DATA_2_MSW[6] ,Data value read from or written to pin 6" "Low,High"
|
|
bitfld.long 0x04 5. " DATA_2_MSW[5] ,Data value read from or written to pin 5" "Low,High"
|
|
bitfld.long 0x04 4. " DATA_2_MSW[4] ,Data value read from or written to pin 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 3. " DATA_2_MSW[3] ,Data value read from or written to pin 3" "Low,High"
|
|
bitfld.long 0x04 2. " DATA_2_MSW[2] ,Data value read from or written to pin 2" "Low,High"
|
|
bitfld.long 0x04 1. " DATA_2_MSW[1] ,Data value read from or written to pin 1" "Low,High"
|
|
bitfld.long 0x04 0. " DATA_2_MSW[0] ,Data value read from or written to pin 0" "Low,High"
|
|
group.long 0x18++0x07
|
|
line.long 0x00 "MASK_DATA_3_LSW,Maskable single-word-based data access register"
|
|
bitfld.long 0x00 31. " MASK_3_LSW[15] ,Mask value to be applied on writes to pin 15" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " MASK_3_LSW[14] ,Mask value to be applied on writes to pin 14" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " MASK_3_LSW[13] ,Mask value to be applied on writes to pin 13" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " MASK_3_LSW[12] ,Mask value to be applied on writes to pin 12" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " MASK_3_LSW[11] ,Mask value to be applied on writes to pin 11" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " MASK_3_LSW[10] ,Mask value to be applied on writes to pin 10" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " MASK_3_LSW[9] ,Mask value to be applied on writes to pin 9" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " MASK_3_LSW[8] ,Mask value to be applied on writes to pin 8" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " MASK_3_LSW[7] ,Mask value to be applied on writes to pin 7" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " MASK_3_LSW[6] ,Mask value to be applied on writes to pin 6" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " MASK_3_LSW[5] ,Mask value to be applied on writes to pin 5" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " MASK_3_LSW[4] ,Mask value to be applied on writes to pin 4" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " MASK_3_LSW[3] ,Mask value to be applied on writes to pin 3" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " MASK_3_LSW[2] ,Mask value to be applied on writes to pin 2" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " MASK_3_LSW[1] ,Mask value to be applied on writes to pin 1" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " MASK_3_LSW[0] ,Mask value to be applied on writes to pin 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DATA_3_LSW[15] ,Data value read from or written to pin 15" "Low,High"
|
|
bitfld.long 0x00 14. " DATA_3_LSW[14] ,Data value read from or written to pin 14" "Low,High"
|
|
bitfld.long 0x00 13. " DATA_3_LSW[13] ,Data value read from or written to pin 13" "Low,High"
|
|
bitfld.long 0x00 12. " DATA_3_LSW[12] ,Data value read from or written to pin 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DATA_3_LSW[11] ,Data value read from or written to pin 11" "Low,High"
|
|
bitfld.long 0x00 10. " DATA_3_LSW[10] ,Data value read from or written to pin 10" "Low,High"
|
|
bitfld.long 0x00 9. " DATA_3_LSW[9] ,Data value read from or written to pin 9" "Low,High"
|
|
bitfld.long 0x00 8. " DATA_3_LSW[8] ,Data value read from or written to pin 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DATA_3_LSW[7] ,Data value read from or written to pin 7" "Low,High"
|
|
bitfld.long 0x00 6. " DATA_3_LSW[6] ,Data value read from or written to pin 6" "Low,High"
|
|
bitfld.long 0x00 5. " DATA_3_LSW[5] ,Data value read from or written to pin 5" "Low,High"
|
|
bitfld.long 0x00 4. " DATA_3_LSW[4] ,Data value read from or written to pin 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DATA_3_LSW[3] ,Data value read from or written to pin 3" "Low,High"
|
|
bitfld.long 0x00 2. " DATA_3_LSW[2] ,Data value read from or written to pin 2" "Low,High"
|
|
bitfld.long 0x00 1. " DATA_3_LSW[1] ,Data value read from or written to pin 1" "Low,High"
|
|
bitfld.long 0x00 0. " DATA_3_LSW[0] ,Data value read from or written to pin 0" "Low,High"
|
|
line.long 0x04 "MASK_DATA_3_MSW,Maskable single-word-based data access register"
|
|
bitfld.long 0x04 31. " MASK_3_MSW[15] ,Mask value to be applied on writes to pin 15" "Not masked,Masked"
|
|
bitfld.long 0x04 30. " MASK_3_MSW[14] ,Mask value to be applied on writes to pin 14" "Not masked,Masked"
|
|
bitfld.long 0x04 29. " MASK_3_MSW[13] ,Mask value to be applied on writes to pin 13" "Not masked,Masked"
|
|
bitfld.long 0x04 28. " MASK_3_MSW[12] ,Mask value to be applied on writes to pin 12" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 27. " MASK_3_MSW[11] ,Mask value to be applied on writes to pin 11" "Not masked,Masked"
|
|
bitfld.long 0x04 26. " MASK_3_MSW[10] ,Mask value to be applied on writes to pin 10" "Not masked,Masked"
|
|
bitfld.long 0x04 25. " MASK_3_MSW[9] ,Mask value to be applied on writes to pin 9" "Not masked,Masked"
|
|
bitfld.long 0x04 24. " MASK_3_MSW[8] ,Mask value to be applied on writes to pin 8" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 23. " MASK_3_MSW[7] ,Mask value to be applied on writes to pin 7" "Not masked,Masked"
|
|
bitfld.long 0x04 22. " MASK_3_MSW[6] ,Mask value to be applied on writes to pin 6" "Not masked,Masked"
|
|
bitfld.long 0x04 21. " MASK_3_MSW[5] ,Mask value to be applied on writes to pin 5" "Not masked,Masked"
|
|
bitfld.long 0x04 20. " MASK_3_MSW[4] ,Mask value to be applied on writes to pin 4" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 19. " MASK_3_MSW[3] ,Mask value to be applied on writes to pin 3" "Not masked,Masked"
|
|
bitfld.long 0x04 18. " MASK_3_MSW[2] ,Mask value to be applied on writes to pin 2" "Not masked,Masked"
|
|
bitfld.long 0x04 17. " MASK_3_MSW[1] ,Mask value to be applied on writes to pin 1" "Not masked,Masked"
|
|
bitfld.long 0x04 16. " MASK_3_MSW[0] ,Mask value to be applied on writes to pin 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 15. " DATA_3_MSW[15] ,Data value read from or written to pin 15" "Low,High"
|
|
bitfld.long 0x04 14. " DATA_3_MSW[14] ,Data value read from or written to pin 14" "Low,High"
|
|
bitfld.long 0x04 13. " DATA_3_MSW[13] ,Data value read from or written to pin 13" "Low,High"
|
|
bitfld.long 0x04 12. " DATA_3_MSW[12] ,Data value read from or written to pin 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 11. " DATA_3_MSW[11] ,Data value read from or written to pin 11" "Low,High"
|
|
bitfld.long 0x04 10. " DATA_3_MSW[10] ,Data value read from or written to pin 10" "Low,High"
|
|
bitfld.long 0x04 9. " DATA_3_MSW[9] ,Data value read from or written to pin 9" "Low,High"
|
|
bitfld.long 0x04 8. " DATA_3_MSW[8] ,Data value read from or written to pin 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 7. " DATA_3_MSW[7] ,Data value read from or written to pin 7" "Low,High"
|
|
bitfld.long 0x04 6. " DATA_3_MSW[6] ,Data value read from or written to pin 6" "Low,High"
|
|
bitfld.long 0x04 5. " DATA_3_MSW[5] ,Data value read from or written to pin 5" "Low,High"
|
|
bitfld.long 0x04 4. " DATA_3_MSW[4] ,Data value read from or written to pin 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 3. " DATA_3_MSW[3] ,Data value read from or written to pin 3" "Low,High"
|
|
bitfld.long 0x04 2. " DATA_3_MSW[2] ,Data value read from or written to pin 2" "Low,High"
|
|
bitfld.long 0x04 1. " DATA_3_MSW[1] ,Data value read from or written to pin 1" "Low,High"
|
|
bitfld.long 0x04 0. " DATA_3_MSW[0] ,Data value read from or written to pin 0" "Low,High"
|
|
group.long 0x40++0x0F
|
|
line.long 0x00 "DATA_0,Unmasked double-word-based data access register"
|
|
bitfld.long 0x00 31. " DATA_0[31] ,Data value read from or written to pin 31" "Low,High"
|
|
bitfld.long 0x00 30. " DATA_0[30] ,Data value read from or written to pin 30" "Low,High"
|
|
bitfld.long 0x00 29. " DATA_0[29] ,Data value read from or written to pin 29" "Low,High"
|
|
bitfld.long 0x00 28. " DATA_0[28] ,Data value read from or written to pin 28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DATA_0[27] ,Data value read from or written to pin 27" "Low,High"
|
|
bitfld.long 0x00 26. " DATA_0[26] ,Data value read from or written to pin 26" "Low,High"
|
|
bitfld.long 0x00 25. " DATA_0[25] ,Data value read from or written to pin 25" "Low,High"
|
|
bitfld.long 0x00 24. " DATA_0[24] ,Data value read from or written to pin 24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DATA_0[23] ,Data value read from or written to pin 23" "Low,High"
|
|
bitfld.long 0x00 22. " DATA_0[22] ,Data value read from or written to pin 22" "Low,High"
|
|
bitfld.long 0x00 21. " DATA_0[21] ,Data value read from or written to pin 21" "Low,High"
|
|
bitfld.long 0x00 20. " DATA_0[20] ,Data value read from or written to pin 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DATA_0[19] ,Data value read from or written to pin 19" "Low,High"
|
|
bitfld.long 0x00 18. " DATA_0[18] ,Data value read from or written to pin 18" "Low,High"
|
|
bitfld.long 0x00 17. " DATA_0[17] ,Data value read from or written to pin 17" "Low,High"
|
|
bitfld.long 0x00 16. " DATA_0[16] ,Data value read from or written to pin 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DATA_0[15] ,Data value read from or written to pin 15" "Low,High"
|
|
bitfld.long 0x00 14. " DATA_0[14] ,Data value read from or written to pin 14" "Low,High"
|
|
bitfld.long 0x00 13. " DATA_0[13] ,Data value read from or written to pin 13" "Low,High"
|
|
bitfld.long 0x00 12. " DATA_0[12] ,Data value read from or written to pin 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DATA_0[11] ,Data value read from or written to pin 11" "Low,High"
|
|
bitfld.long 0x00 10. " DATA_0[10] ,Data value read from or written to pin 10" "Low,High"
|
|
bitfld.long 0x00 9. " DATA_0[9] ,Data value read from or written to pin 9" "Low,High"
|
|
bitfld.long 0x00 8. " DATA_0[8] ,Data value read from or written to pin 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DATA_0[7] ,Data value read from or written to pin 7" "Low,High"
|
|
bitfld.long 0x00 6. " DATA_0[6] ,Data value read from or written to pin 6" "Low,High"
|
|
bitfld.long 0x00 5. " DATA_0[5] ,Data value read from or written to pin 5" "Low,High"
|
|
bitfld.long 0x00 4. " DATA_0[4] ,Data value read from or written to pin 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DATA_0[3] ,Data value read from or written to pin 3" "Low,High"
|
|
bitfld.long 0x00 2. " DATA_0[2] ,Data value read from or written to pin 2" "Low,High"
|
|
bitfld.long 0x00 1. " DATA_0[1] ,Data value read from or written to pin 1" "Low,High"
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bitfld.long 0x00 0. " DATA_0[0] ,Data value read from or written to pin 0" "Low,High"
|
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line.long 0x04 "DATA_1,Unmasked double-word-based data access register"
|
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bitfld.long 0x04 21. " DATA_1[21] ,Data value read from or written to pin 21" "Low,High"
|
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bitfld.long 0x04 20. " DATA_1[20] ,Data value read from or written to pin 20" "Low,High"
|
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bitfld.long 0x04 19. " DATA_1[19] ,Data value read from or written to pin 19" "Low,High"
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bitfld.long 0x04 18. " DATA_1[18] ,Data value read from or written to pin 18" "Low,High"
|
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textline " "
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bitfld.long 0x04 17. " DATA_1[17] ,Data value read from or written to pin 17" "Low,High"
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bitfld.long 0x04 16. " DATA_1[16] ,Data value read from or written to pin 16" "Low,High"
|
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bitfld.long 0x04 15. " DATA_1[15] ,Data value read from or written to pin 15" "Low,High"
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bitfld.long 0x04 14. " DATA_1[14] ,Data value read from or written to pin 14" "Low,High"
|
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textline " "
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bitfld.long 0x04 13. " DATA_1[13] ,Data value read from or written to pin 13" "Low,High"
|
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bitfld.long 0x04 12. " DATA_1[12] ,Data value read from or written to pin 12" "Low,High"
|
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bitfld.long 0x04 11. " DATA_1[11] ,Data value read from or written to pin 11" "Low,High"
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bitfld.long 0x04 10. " DATA_1[10] ,Data value read from or written to pin 10" "Low,High"
|
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textline " "
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bitfld.long 0x04 9. " DATA_1[9] ,Data value read from or written to pin 9" "Low,High"
|
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bitfld.long 0x04 8. " DATA_1[8] ,Data value read from or written to pin 8" "Low,High"
|
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bitfld.long 0x04 7. " DATA_1[7] ,Data value read from or written to pin 7" "Low,High"
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bitfld.long 0x04 6. " DATA_1[6] ,Data value read from or written to pin 6" "Low,High"
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textline " "
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bitfld.long 0x04 5. " DATA_1[5] ,Data value read from or written to pin 5" "Low,High"
|
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bitfld.long 0x04 4. " DATA_1[4] ,Data value read from or written to pin 4" "Low,High"
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bitfld.long 0x04 3. " DATA_1[3] ,Data value read from or written to pin 3" "Low,High"
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bitfld.long 0x04 2. " DATA_1[2] ,Data value read from or written to pin 2" "Low,High"
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textline " "
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bitfld.long 0x04 1. " DATA_1[1] ,Data value read from or written to pin 1" "Low,High"
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bitfld.long 0x04 0. " DATA_1[0] ,Data value read from or written to pin 0" "Low,High"
|
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line.long 0x08 "DATA_2,Unmasked double-word-based data access register"
|
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bitfld.long 0x08 31. " DATA_2[31] ,Data value read from or written to pin 31" "Low,High"
|
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bitfld.long 0x08 30. " DATA_2[30] ,Data value read from or written to pin 30" "Low,High"
|
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bitfld.long 0x08 29. " DATA_2[29] ,Data value read from or written to pin 29" "Low,High"
|
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bitfld.long 0x08 28. " DATA_2[28] ,Data value read from or written to pin 28" "Low,High"
|
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textline " "
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bitfld.long 0x08 27. " DATA_2[27] ,Data value read from or written to pin 27" "Low,High"
|
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bitfld.long 0x08 26. " DATA_2[26] ,Data value read from or written to pin 26" "Low,High"
|
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bitfld.long 0x08 25. " DATA_2[25] ,Data value read from or written to pin 25" "Low,High"
|
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bitfld.long 0x08 24. " DATA_2[24] ,Data value read from or written to pin 24" "Low,High"
|
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textline " "
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bitfld.long 0x08 23. " DATA_2[23] ,Data value read from or written to pin 23" "Low,High"
|
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bitfld.long 0x08 22. " DATA_2[22] ,Data value read from or written to pin 22" "Low,High"
|
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bitfld.long 0x08 21. " DATA_2[21] ,Data value read from or written to pin 21" "Low,High"
|
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bitfld.long 0x08 20. " DATA_2[20] ,Data value read from or written to pin 20" "Low,High"
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textline " "
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bitfld.long 0x08 19. " DATA_2[19] ,Data value read from or written to pin 19" "Low,High"
|
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bitfld.long 0x08 18. " DATA_2[18] ,Data value read from or written to pin 18" "Low,High"
|
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bitfld.long 0x08 17. " DATA_2[17] ,Data value read from or written to pin 17" "Low,High"
|
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bitfld.long 0x08 16. " DATA_2[16] ,Data value read from or written to pin 16" "Low,High"
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textline " "
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bitfld.long 0x08 15. " DATA_2[15] ,Data value read from or written to pin 15" "Low,High"
|
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bitfld.long 0x08 14. " DATA_2[14] ,Data value read from or written to pin 14" "Low,High"
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bitfld.long 0x08 13. " DATA_2[13] ,Data value read from or written to pin 13" "Low,High"
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bitfld.long 0x08 12. " DATA_2[12] ,Data value read from or written to pin 12" "Low,High"
|
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textline " "
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bitfld.long 0x08 11. " DATA_2[11] ,Data value read from or written to pin 11" "Low,High"
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bitfld.long 0x08 10. " DATA_2[10] ,Data value read from or written to pin 10" "Low,High"
|
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bitfld.long 0x08 9. " DATA_2[9] ,Data value read from or written to pin 9" "Low,High"
|
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bitfld.long 0x08 8. " DATA_2[8] ,Data value read from or written to pin 8" "Low,High"
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textline " "
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bitfld.long 0x08 7. " DATA_2[7] ,Data value read from or written to pin 7" "Low,High"
|
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bitfld.long 0x08 6. " DATA_2[6] ,Data value read from or written to pin 6" "Low,High"
|
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bitfld.long 0x08 5. " DATA_2[5] ,Data value read from or written to pin 5" "Low,High"
|
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bitfld.long 0x08 4. " DATA_2[4] ,Data value read from or written to pin 4" "Low,High"
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textline " "
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bitfld.long 0x08 3. " DATA_2[3] ,Data value read from or written to pin 3" "Low,High"
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bitfld.long 0x08 2. " DATA_2[2] ,Data value read from or written to pin 2" "Low,High"
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bitfld.long 0x08 1. " DATA_2[1] ,Data value read from or written to pin 1" "Low,High"
|
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bitfld.long 0x08 0. " DATA_2[0] ,Data value read from or written to pin 0" "Low,High"
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line.long 0x0C "DATA_3,Unmasked double-word-based data access register"
|
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bitfld.long 0x0C 31. " DATA_3[31] ,Data value read from or written to pin 31" "Low,High"
|
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bitfld.long 0x0C 30. " DATA_3[30] ,Data value read from or written to pin 30" "Low,High"
|
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bitfld.long 0x0C 29. " DATA_3[29] ,Data value read from or written to pin 29" "Low,High"
|
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bitfld.long 0x0C 28. " DATA_3[28] ,Data value read from or written to pin 28" "Low,High"
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textline " "
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bitfld.long 0x0C 27. " DATA_3[27] ,Data value read from or written to pin 27" "Low,High"
|
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bitfld.long 0x0C 26. " DATA_3[26] ,Data value read from or written to pin 26" "Low,High"
|
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bitfld.long 0x0C 25. " DATA_3[25] ,Data value read from or written to pin 25" "Low,High"
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bitfld.long 0x0C 24. " DATA_3[24] ,Data value read from or written to pin 24" "Low,High"
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textline " "
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bitfld.long 0x0C 23. " DATA_3[23] ,Data value read from or written to pin 23" "Low,High"
|
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bitfld.long 0x0C 22. " DATA_3[22] ,Data value read from or written to pin 22" "Low,High"
|
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bitfld.long 0x0C 21. " DATA_3[21] ,Data value read from or written to pin 21" "Low,High"
|
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bitfld.long 0x0C 20. " DATA_3[20] ,Data value read from or written to pin 20" "Low,High"
|
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textline " "
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bitfld.long 0x0C 19. " DATA_3[19] ,Data value read from or written to pin 19" "Low,High"
|
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bitfld.long 0x0C 18. " DATA_3[18] ,Data value read from or written to pin 18" "Low,High"
|
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bitfld.long 0x0C 17. " DATA_3[17] ,Data value read from or written to pin 17" "Low,High"
|
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bitfld.long 0x0C 16. " DATA_3[16] ,Data value read from or written to pin 16" "Low,High"
|
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textline " "
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bitfld.long 0x0C 15. " DATA_3[15] ,Data value read from or written to pin 15" "Low,High"
|
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bitfld.long 0x0C 14. " DATA_3[14] ,Data value read from or written to pin 14" "Low,High"
|
|
bitfld.long 0x0C 13. " DATA_3[13] ,Data value read from or written to pin 13" "Low,High"
|
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bitfld.long 0x0C 12. " DATA_3[12] ,Data value read from or written to pin 12" "Low,High"
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textline " "
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bitfld.long 0x0C 11. " DATA_3[11] ,Data value read from or written to pin 11" "Low,High"
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bitfld.long 0x0C 10. " DATA_3[10] ,Data value read from or written to pin 10" "Low,High"
|
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bitfld.long 0x0C 9. " DATA_3[9] ,Data value read from or written to pin 9" "Low,High"
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bitfld.long 0x0C 8. " DATA_3[8] ,Data value read from or written to pin 8" "Low,High"
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textline " "
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bitfld.long 0x0C 7. " DATA_3[7] ,Data value read from or written to pin 7" "Low,High"
|
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bitfld.long 0x0C 6. " DATA_3[6] ,Data value read from or written to pin 6" "Low,High"
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bitfld.long 0x0C 5. " DATA_3[5] ,Data value read from or written to pin 5" "Low,High"
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bitfld.long 0x0C 4. " DATA_3[4] ,Data value read from or written to pin 4" "Low,High"
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textline " "
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bitfld.long 0x0C 3. " DATA_3[3] ,Data value read from or written to pin 3" "Low,High"
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bitfld.long 0x0C 2. " DATA_3[2] ,Data value read from or written to pin 2" "Low,High"
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bitfld.long 0x0C 1. " DATA_3[1] ,Data value read from or written to pin 1" "Low,High"
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bitfld.long 0x0C 0. " DATA_3[0] ,Data value read from or written to pin 0" "Low,High"
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rgroup.long 0x60++0x0F
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line.long 0x00 "DATA_0_RO,Read only pin value register"
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bitfld.long 0x00 31. " DATA_0_RO[31] ,GPIO pin value 31" "Low,High"
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bitfld.long 0x00 30. " DATA_0_RO[30] ,GPIO pin value 30" "Low,High"
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bitfld.long 0x00 29. " DATA_0_RO[29] ,GPIO pin value 29" "Low,High"
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bitfld.long 0x00 28. " DATA_0_RO[28] ,GPIO pin value 28" "Low,High"
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textline " "
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bitfld.long 0x00 27. " DATA_0_RO[27] ,GPIO pin value 27" "Low,High"
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bitfld.long 0x00 26. " DATA_0_RO[26] ,GPIO pin value 26" "Low,High"
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bitfld.long 0x00 25. " DATA_0_RO[25] ,GPIO pin value 25" "Low,High"
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bitfld.long 0x00 24. " DATA_0_RO[24] ,GPIO pin value 24" "Low,High"
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textline " "
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bitfld.long 0x00 23. " DATA_0_RO[23] ,GPIO pin value 23" "Low,High"
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bitfld.long 0x00 22. " DATA_0_RO[22] ,GPIO pin value 22" "Low,High"
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bitfld.long 0x00 21. " DATA_0_RO[21] ,GPIO pin value 21" "Low,High"
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bitfld.long 0x00 20. " DATA_0_RO[20] ,GPIO pin value 20" "Low,High"
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textline " "
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bitfld.long 0x00 19. " DATA_0_RO[19] ,GPIO pin value 19" "Low,High"
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bitfld.long 0x00 18. " DATA_0_RO[18] ,GPIO pin value 18" "Low,High"
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bitfld.long 0x00 17. " DATA_0_RO[17] ,GPIO pin value 17" "Low,High"
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bitfld.long 0x00 16. " DATA_0_RO[16] ,GPIO pin value 16" "Low,High"
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textline " "
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bitfld.long 0x00 15. " DATA_0_RO[15] ,GPIO pin value 15" "Low,High"
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bitfld.long 0x00 14. " DATA_0_RO[14] ,GPIO pin value 14" "Low,High"
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bitfld.long 0x00 13. " DATA_0_RO[13] ,GPIO pin value 13" "Low,High"
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bitfld.long 0x00 12. " DATA_0_RO[12] ,GPIO pin value 12" "Low,High"
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textline " "
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bitfld.long 0x00 11. " DATA_0_RO[11] ,GPIO pin value 11" "Low,High"
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bitfld.long 0x00 10. " DATA_0_RO[10] ,GPIO pin value 10" "Low,High"
|
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bitfld.long 0x00 9. " DATA_0_RO[9] ,GPIO pin value 9" "Low,High"
|
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bitfld.long 0x00 8. " DATA_0_RO[8] ,GPIO pin value 8" "Low,High"
|
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textline " "
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bitfld.long 0x00 7. " DATA_0_RO[7] ,GPIO pin value 7" "Low,High"
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bitfld.long 0x00 6. " DATA_0_RO[6] ,GPIO pin value 6" "Low,High"
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bitfld.long 0x00 5. " DATA_0_RO[5] ,GPIO pin value 5" "Low,High"
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bitfld.long 0x00 4. " DATA_0_RO[4] ,GPIO pin value 4" "Low,High"
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textline " "
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bitfld.long 0x00 3. " DATA_0_RO[3] ,GPIO pin value 3" "Low,High"
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bitfld.long 0x00 2. " DATA_0_RO[2] ,GPIO pin value 2" "Low,High"
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bitfld.long 0x00 1. " DATA_0_RO[1] ,GPIO pin value 1" "Low,High"
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bitfld.long 0x00 0. " DATA_0_RO[0] ,GPIO pin value 0" "Low,High"
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line.long 0x04 "DATA_1_RO,Read only pin value register"
|
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bitfld.long 0x04 21. " DATA_1_RO[21] ,GPIO pin value 21" "Low,High"
|
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bitfld.long 0x04 20. " DATA_1_RO[20] ,GPIO pin value 20" "Low,High"
|
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bitfld.long 0x04 19. " DATA_1_RO[19] ,GPIO pin value 19" "Low,High"
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bitfld.long 0x04 18. " DATA_1_RO[18] ,GPIO pin value 18" "Low,High"
|
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textline " "
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bitfld.long 0x04 17. " DATA_1_RO[17] ,GPIO pin value 17" "Low,High"
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bitfld.long 0x04 16. " DATA_1_RO[16] ,GPIO pin value 16" "Low,High"
|
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bitfld.long 0x04 15. " DATA_1_RO[15] ,GPIO pin value 15" "Low,High"
|
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bitfld.long 0x04 14. " DATA_1_RO[14] ,GPIO pin value 14" "Low,High"
|
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textline " "
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bitfld.long 0x04 13. " DATA_1_RO[13] ,GPIO pin value 13" "Low,High"
|
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bitfld.long 0x04 12. " DATA_1_RO[12] ,GPIO pin value 12" "Low,High"
|
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bitfld.long 0x04 11. " DATA_1_RO[11] ,GPIO pin value 11" "Low,High"
|
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bitfld.long 0x04 10. " DATA_1_RO[10] ,GPIO pin value 10" "Low,High"
|
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textline " "
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bitfld.long 0x04 9. " DATA_1_RO[9] ,GPIO pin value 9" "Low,High"
|
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bitfld.long 0x04 8. " DATA_1_RO[8] ,GPIO pin value 8" "Low,High"
|
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bitfld.long 0x04 7. " DATA_1_RO[7] ,GPIO pin value 7" "Low,High"
|
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bitfld.long 0x04 6. " DATA_1_RO[6] ,GPIO pin value 6" "Low,High"
|
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textline " "
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bitfld.long 0x04 5. " DATA_1_RO[5] ,GPIO pin value 5" "Low,High"
|
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bitfld.long 0x04 4. " DATA_1_RO[4] ,GPIO pin value 4" "Low,High"
|
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bitfld.long 0x04 3. " DATA_1_RO[3] ,GPIO pin value 3" "Low,High"
|
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bitfld.long 0x04 2. " DATA_1_RO[2] ,GPIO pin value 2" "Low,High"
|
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textline " "
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bitfld.long 0x04 1. " DATA_1_RO[1] ,GPIO pin value 1" "Low,High"
|
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bitfld.long 0x04 0. " DATA_1_RO[0] ,GPIO pin value 0" "Low,High"
|
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line.long 0x08 "DATA_2_RO,Read only pin value register"
|
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bitfld.long 0x08 31. " DATA_2_RO[31] ,GPIO pin value 31" "Low,High"
|
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bitfld.long 0x08 30. " DATA_2_RO[30] ,GPIO pin value 30" "Low,High"
|
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bitfld.long 0x08 29. " DATA_2_RO[29] ,GPIO pin value 29" "Low,High"
|
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bitfld.long 0x08 28. " DATA_2_RO[28] ,GPIO pin value 28" "Low,High"
|
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textline " "
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bitfld.long 0x08 27. " DATA_2_RO[27] ,GPIO pin value 27" "Low,High"
|
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bitfld.long 0x08 26. " DATA_2_RO[26] ,GPIO pin value 26" "Low,High"
|
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bitfld.long 0x08 25. " DATA_2_RO[25] ,GPIO pin value 25" "Low,High"
|
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bitfld.long 0x08 24. " DATA_2_RO[24] ,GPIO pin value 24" "Low,High"
|
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textline " "
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bitfld.long 0x08 23. " DATA_2_RO[23] ,GPIO pin value 23" "Low,High"
|
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bitfld.long 0x08 22. " DATA_2_RO[22] ,GPIO pin value 22" "Low,High"
|
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bitfld.long 0x08 21. " DATA_2_RO[21] ,GPIO pin value 21" "Low,High"
|
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bitfld.long 0x08 20. " DATA_2_RO[20] ,GPIO pin value 20" "Low,High"
|
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textline " "
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bitfld.long 0x08 19. " DATA_2_RO[19] ,GPIO pin value 19" "Low,High"
|
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bitfld.long 0x08 18. " DATA_2_RO[18] ,GPIO pin value 18" "Low,High"
|
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bitfld.long 0x08 17. " DATA_2_RO[17] ,GPIO pin value 17" "Low,High"
|
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bitfld.long 0x08 16. " DATA_2_RO[16] ,GPIO pin value 16" "Low,High"
|
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textline " "
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bitfld.long 0x08 15. " DATA_2_RO[15] ,GPIO pin value 15" "Low,High"
|
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bitfld.long 0x08 14. " DATA_2_RO[14] ,GPIO pin value 14" "Low,High"
|
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bitfld.long 0x08 13. " DATA_2_RO[13] ,GPIO pin value 13" "Low,High"
|
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bitfld.long 0x08 12. " DATA_2_RO[12] ,GPIO pin value 12" "Low,High"
|
|
textline " "
|
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bitfld.long 0x08 11. " DATA_2_RO[11] ,GPIO pin value 11" "Low,High"
|
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bitfld.long 0x08 10. " DATA_2_RO[10] ,GPIO pin value 10" "Low,High"
|
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bitfld.long 0x08 9. " DATA_2_RO[9] ,GPIO pin value 9" "Low,High"
|
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bitfld.long 0x08 8. " DATA_2_RO[8] ,GPIO pin value 8" "Low,High"
|
|
textline " "
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bitfld.long 0x08 7. " DATA_2_RO[7] ,GPIO pin value 7" "Low,High"
|
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bitfld.long 0x08 6. " DATA_2_RO[6] ,GPIO pin value 6" "Low,High"
|
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bitfld.long 0x08 5. " DATA_2_RO[5] ,GPIO pin value 5" "Low,High"
|
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bitfld.long 0x08 4. " DATA_2_RO[4] ,GPIO pin value 4" "Low,High"
|
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textline " "
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bitfld.long 0x08 3. " DATA_2_RO[3] ,GPIO pin value 3" "Low,High"
|
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bitfld.long 0x08 2. " DATA_2_RO[2] ,GPIO pin value 2" "Low,High"
|
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bitfld.long 0x08 1. " DATA_2_RO[1] ,GPIO pin value 1" "Low,High"
|
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bitfld.long 0x08 0. " DATA_2_RO[0] ,GPIO pin value 0" "Low,High"
|
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line.long 0x0C "DATA_3_RO,Read only pin value register"
|
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bitfld.long 0x0C 31. " DATA_3_RO[31] ,GPIO pin value 31" "Low,High"
|
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bitfld.long 0x0C 30. " DATA_3_RO[30] ,GPIO pin value 30" "Low,High"
|
|
bitfld.long 0x0C 29. " DATA_3_RO[29] ,GPIO pin value 29" "Low,High"
|
|
bitfld.long 0x0C 28. " DATA_3_RO[28] ,GPIO pin value 28" "Low,High"
|
|
textline " "
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bitfld.long 0x0C 27. " DATA_3_RO[27] ,GPIO pin value 27" "Low,High"
|
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bitfld.long 0x0C 26. " DATA_3_RO[26] ,GPIO pin value 26" "Low,High"
|
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bitfld.long 0x0C 25. " DATA_3_RO[25] ,GPIO pin value 25" "Low,High"
|
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bitfld.long 0x0C 24. " DATA_3_RO[24] ,GPIO pin value 24" "Low,High"
|
|
textline " "
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bitfld.long 0x0C 23. " DATA_3_RO[23] ,GPIO pin value 23" "Low,High"
|
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bitfld.long 0x0C 22. " DATA_3_RO[22] ,GPIO pin value 22" "Low,High"
|
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bitfld.long 0x0C 21. " DATA_3_RO[21] ,GPIO pin value 21" "Low,High"
|
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bitfld.long 0x0C 20. " DATA_3_RO[20] ,GPIO pin value 20" "Low,High"
|
|
textline " "
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bitfld.long 0x0C 19. " DATA_3_RO[19] ,GPIO pin value 19" "Low,High"
|
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bitfld.long 0x0C 18. " DATA_3_RO[18] ,GPIO pin value 18" "Low,High"
|
|
bitfld.long 0x0C 17. " DATA_3_RO[17] ,GPIO pin value 17" "Low,High"
|
|
bitfld.long 0x0C 16. " DATA_3_RO[16] ,GPIO pin value 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " DATA_3_RO[15] ,GPIO pin value 15" "Low,High"
|
|
bitfld.long 0x0C 14. " DATA_3_RO[14] ,GPIO pin value 14" "Low,High"
|
|
bitfld.long 0x0C 13. " DATA_3_RO[13] ,GPIO pin value 13" "Low,High"
|
|
bitfld.long 0x0C 12. " DATA_3_RO[12] ,GPIO pin value 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " DATA_3_RO[11] ,GPIO pin value 11" "Low,High"
|
|
bitfld.long 0x0C 10. " DATA_3_RO[10] ,GPIO pin value 10" "Low,High"
|
|
bitfld.long 0x0C 9. " DATA_3_RO[9] ,GPIO pin value 9" "Low,High"
|
|
bitfld.long 0x0C 8. " DATA_3_RO[8] ,GPIO pin value 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " DATA_3_RO[7] ,GPIO pin value 7" "Low,High"
|
|
bitfld.long 0x0C 6. " DATA_3_RO[6] ,GPIO pin value 6" "Low,High"
|
|
bitfld.long 0x0C 5. " DATA_3_RO[5] ,GPIO pin value 5" "Low,High"
|
|
bitfld.long 0x0C 4. " DATA_3_RO[4] ,GPIO pin value 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " DATA_3_RO[3] ,GPIO pin value 3" "Low,High"
|
|
bitfld.long 0x0C 2. " DATA_3_RO[2] ,GPIO pin value 2" "Low,High"
|
|
bitfld.long 0x0C 1. " DATA_3_RO[1] ,GPIO pin value 1" "Low,High"
|
|
bitfld.long 0x0C 0. " DATA_3_RO[0] ,GPIO pin value 0" "Low,High"
|
|
tree "GPIO Bank 0"
|
|
group.long (0x200+0x0)++0x0B
|
|
line.long 0x00 "BYPM_0,Bypass configuration register"
|
|
bitfld.long 0x00 31. " BYPASS_MODE_0[31] ,Bypass configuration for bank 0 for pin 31" "Software,Bypass"
|
|
bitfld.long 0x00 30. " BYPASS_MODE_0[30] ,Bypass configuration for bank 0 for pin 30" "Software,Bypass"
|
|
bitfld.long 0x00 29. " BYPASS_MODE_0[29] ,Bypass configuration for bank 0 for pin 29" "Software,Bypass"
|
|
bitfld.long 0x00 28. " BYPASS_MODE_0[28] ,Bypass configuration for bank 0 for pin 28" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BYPASS_MODE_0[27] ,Bypass configuration for bank 0 for pin 27" "Software,Bypass"
|
|
bitfld.long 0x00 26. " BYPASS_MODE_0[26] ,Bypass configuration for bank 0 for pin 26" "Software,Bypass"
|
|
bitfld.long 0x00 25. " BYPASS_MODE_0[25] ,Bypass configuration for bank 0 for pin 25" "Software,Bypass"
|
|
bitfld.long 0x00 24. " BYPASS_MODE_0[24] ,Bypass configuration for bank 0 for pin 24" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BYPASS_MODE_0[23] ,Bypass configuration for bank 0 for pin 23" "Software,Bypass"
|
|
bitfld.long 0x00 22. " BYPASS_MODE_0[22] ,Bypass configuration for bank 0 for pin 22" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 21. " BYPASS_MODE_0[21] ,Bypass configuration for bank 0 for pin 21" "Software,Bypass"
|
|
bitfld.long 0x00 20. " BYPASS_MODE_0[20] ,Bypass configuration for bank 0 for pin 20" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BYPASS_MODE_0[19] ,Bypass configuration for bank 0 for pin 19" "Software,Bypass"
|
|
bitfld.long 0x00 18. " BYPASS_MODE_0[18] ,Bypass configuration for bank 0 for pin 18" "Software,Bypass"
|
|
bitfld.long 0x00 17. " BYPASS_MODE_0[17] ,Bypass configuration for bank 0 for pin 17" "Software,Bypass"
|
|
bitfld.long 0x00 16. " BYPASS_MODE_0[16] ,Bypass configuration for bank 0 for pin 16" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BYPASS_MODE_0[15] ,Bypass configuration for bank 0 for pin 15" "Software,Bypass"
|
|
bitfld.long 0x00 14. " BYPASS_MODE_0[14] ,Bypass configuration for bank 0 for pin 14" "Software,Bypass"
|
|
bitfld.long 0x00 13. " BYPASS_MODE_0[13] ,Bypass configuration for bank 0 for pin 13" "Software,Bypass"
|
|
bitfld.long 0x00 12. " BYPASS_MODE_0[12] ,Bypass configuration for bank 0 for pin 12" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BYPASS_MODE_0[11] ,Bypass configuration for bank 0 for pin 11" "Software,Bypass"
|
|
bitfld.long 0x00 10. " BYPASS_MODE_0[10] ,Bypass configuration for bank 0 for pin 10" "Software,Bypass"
|
|
bitfld.long 0x00 9. " BYPASS_MODE_0[9] ,Bypass configuration for bank 0 for pin 9" "Software,Bypass"
|
|
bitfld.long 0x00 8. " BYPASS_MODE_0[8] ,Bypass configuration for bank 0 for pin 8" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BYPASS_MODE_0[7] ,Bypass configuration for bank 0 for pin 7" "Software,Bypass"
|
|
bitfld.long 0x00 6. " BYPASS_MODE_0[6] ,Bypass configuration for bank 0 for pin 6" "Software,Bypass"
|
|
bitfld.long 0x00 5. " BYPASS_MODE_0[5] ,Bypass configuration for bank 0 for pin 5" "Software,Bypass"
|
|
bitfld.long 0x00 4. " BYPASS_MODE_0[4] ,Bypass configuration for bank 0 for pin 4" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BYPASS_MODE_0[3] ,Bypass configuration for bank 0 for pin 3" "Software,Bypass"
|
|
bitfld.long 0x00 2. " BYPASS_MODE_0[2] ,Bypass configuration for bank 0 for pin 2" "Software,Bypass"
|
|
bitfld.long 0x00 1. " BYPASS_MODE_0[1] ,Bypass configuration for bank 0 for pin 1" "Software,Bypass"
|
|
bitfld.long 0x00 0. " BYPASS_MODE_0[0] ,Bypass configuration for bank 0 for pin 0" "Software,Bypass"
|
|
line.long 0x04 "DIRM_0,Direction mode configuration register"
|
|
bitfld.long 0x04 31. " DIRECTION_0[31] ,Direction mode for bank 0 pin 31" "Input,Output"
|
|
bitfld.long 0x04 30. " DIRECTION_0[30] ,Direction mode for bank 0 pin 30" "Input,Output"
|
|
bitfld.long 0x04 29. " DIRECTION_0[29] ,Direction mode for bank 0 pin 29" "Input,Output"
|
|
bitfld.long 0x04 28. " DIRECTION_0[28] ,Direction mode for bank 0 pin 28" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 27. " DIRECTION_0[27] ,Direction mode for bank 0 pin 27" "Input,Output"
|
|
bitfld.long 0x04 26. " DIRECTION_0[26] ,Direction mode for bank 0 pin 26" "Input,Output"
|
|
bitfld.long 0x04 25. " DIRECTION_0[25] ,Direction mode for bank 0 pin 25" "Input,Output"
|
|
bitfld.long 0x04 24. " DIRECTION_0[24] ,Direction mode for bank 0 pin 24" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 23. " DIRECTION_0[23] ,Direction mode for bank 0 pin 23" "Input,Output"
|
|
bitfld.long 0x04 22. " DIRECTION_0[22] ,Direction mode for bank 0 pin 22" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 21. " DIRECTION_0[21] ,Direction mode for bank 0 pin 21" "Input,Output"
|
|
bitfld.long 0x04 20. " DIRECTION_0[20] ,Direction mode for bank 0 pin 20" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 19. " DIRECTION_0[19] ,Direction mode for bank 0 pin 19" "Input,Output"
|
|
bitfld.long 0x04 18. " DIRECTION_0[18] ,Direction mode for bank 0 pin 18" "Input,Output"
|
|
bitfld.long 0x04 17. " DIRECTION_0[17] ,Direction mode for bank 0 pin 17" "Input,Output"
|
|
bitfld.long 0x04 16. " DIRECTION_0[16] ,Direction mode for bank 0 pin 16" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 15. " DIRECTION_0[15] ,Direction mode for bank 0 pin 15" "Input,Output"
|
|
bitfld.long 0x04 14. " DIRECTION_0[14] ,Direction mode for bank 0 pin 14" "Input,Output"
|
|
bitfld.long 0x04 13. " DIRECTION_0[13] ,Direction mode for bank 0 pin 13" "Input,Output"
|
|
bitfld.long 0x04 12. " DIRECTION_0[12] ,Direction mode for bank 0 pin 12" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 11. " DIRECTION_0[11] ,Direction mode for bank 0 pin 11" "Input,Output"
|
|
bitfld.long 0x04 10. " DIRECTION_0[10] ,Direction mode for bank 0 pin 10" "Input,Output"
|
|
bitfld.long 0x04 9. " DIRECTION_0[9] ,Direction mode for bank 0 pin 9" "Input,Output"
|
|
bitfld.long 0x04 8. " DIRECTION_0[8] ,Direction mode for bank 0 pin 8" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 7. " DIRECTION_0[7] ,Direction mode for bank 0 pin 7" "Input,Output"
|
|
bitfld.long 0x04 6. " DIRECTION_0[6] ,Direction mode for bank 0 pin 6" "Input,Output"
|
|
bitfld.long 0x04 5. " DIRECTION_0[5] ,Direction mode for bank 0 pin 5" "Input,Output"
|
|
bitfld.long 0x04 4. " DIRECTION_0[4] ,Direction mode for bank 0 pin 4" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 3. " DIRECTION_0[3] ,Direction mode for bank 0 pin 3" "Input,Output"
|
|
bitfld.long 0x04 2. " DIRECTION_0[2] ,Direction mode for bank 0 pin 2" "Input,Output"
|
|
bitfld.long 0x04 1. " DIRECTION_0[1] ,Direction mode for bank 0 pin 1" "Input,Output"
|
|
bitfld.long 0x04 0. " DIRECTION_0[0] ,Direction mode for bank 0 pin 0" "Input,Output"
|
|
line.long 0x08 "OEN_0,Output enable register"
|
|
bitfld.long 0x08 31. " OP_ENABLE_0[31] ,Output enable for bank 0 pin 31" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " OP_ENABLE_0[30] ,Output enable for bank 0 pin 30" "Disabled,Enabled"
|
|
bitfld.long 0x08 29. " OP_ENABLE_0[29] ,Output enable for bank 0 pin 29" "Disabled,Enabled"
|
|
bitfld.long 0x08 28. " OP_ENABLE_0[28] ,Output enable for bank 0 pin 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 27. " OP_ENABLE_0[27] ,Output enable for bank 0 pin 27" "Disabled,Enabled"
|
|
bitfld.long 0x08 26. " OP_ENABLE_0[26] ,Output enable for bank 0 pin 26" "Disabled,Enabled"
|
|
bitfld.long 0x08 25. " OP_ENABLE_0[25] ,Output enable for bank 0 pin 25" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " OP_ENABLE_0[24] ,Output enable for bank 0 pin 24" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 23. " OP_ENABLE_0[23] ,Output enable for bank 0 pin 23" "Disabled,Enabled"
|
|
bitfld.long 0x08 22. " OP_ENABLE_0[22] ,Output enable for bank 0 pin 22" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 21. " OP_ENABLE_0[21] ,Output enable for bank 0 pin 21" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " OP_ENABLE_0[20] ,Output enable for bank 0 pin 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " OP_ENABLE_0[19] ,Output enable for bank 0 pin 19" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " OP_ENABLE_0[18] ,Output enable for bank 0 pin 18" "Disabled,Enabled"
|
|
bitfld.long 0x08 17. " OP_ENABLE_0[17] ,Output enable for bank 0 pin 17" "Disabled,Enabled"
|
|
bitfld.long 0x08 16. " OP_ENABLE_0[16] ,Output enable for bank 0 pin 16" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 15. " OP_ENABLE_0[15] ,Output enable for bank 0 pin 15" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " OP_ENABLE_0[14] ,Output enable for bank 0 pin 14" "Disabled,Enabled"
|
|
bitfld.long 0x08 13. " OP_ENABLE_0[13] ,Output enable for bank 0 pin 13" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " OP_ENABLE_0[12] ,Output enable for bank 0 pin 12" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 11. " OP_ENABLE_0[11] ,Output enable for bank 0 pin 11" "Disabled,Enabled"
|
|
bitfld.long 0x08 10. " OP_ENABLE_0[10] ,Output enable for bank 0 pin 10" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " OP_ENABLE_0[9] ,Output enable for bank 0 pin 9" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " OP_ENABLE_0[8] ,Output enable for bank 0 pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " OP_ENABLE_0[7] ,Output enable for bank 0 pin 7" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " OP_ENABLE_0[6] ,Output enable for bank 0 pin 6" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " OP_ENABLE_0[5] ,Output enable for bank 0 pin 5" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " OP_ENABLE_0[4] ,Output enable for bank 0 pin 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " OP_ENABLE_0[3] ,Output enable for bank 0 pin 3" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " OP_ENABLE_0[2] ,Output enable for bank 0 pin 2" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " OP_ENABLE_0[1] ,Output enable for bank 0 pin 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " OP_ENABLE_0[0] ,Output enable for bank 0 pin 0" "Disabled,Enabled"
|
|
group.long (0x20C+0x0)++0x03
|
|
line.long 0x00 "INT_MASK_0,Interrupt Mask status register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " INT_MASK_0[31]_set/clr ,Interrupt mask for bank 0 pin 31" "Not masked,Masked"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " INT_MASK_0[30]_set/clr ,Interrupt mask for bank 0 pin 30" "Not masked,Masked"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " INT_MASK_0[29]_set/clr ,Interrupt mask for bank 0 pin 29" "Not masked,Masked"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " INT_MASK_0[28]_set/clr ,Interrupt mask for bank 0 pin 28" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " INT_MASK_0[27]_set/clr ,Interrupt mask for bank 0 pin 27" "Not masked,Masked"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " INT_MASK_0[26]_set/clr ,Interrupt mask for bank 0 pin 26" "Not masked,Masked"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " INT_MASK_0[25]_set/clr ,Interrupt mask for bank 0 pin 25" "Not masked,Masked"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " INT_MASK_0[24]_set/clr ,Interrupt mask for bank 0 pin 24" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " INT_MASK_0[23]_set/clr ,Interrupt mask for bank 0 pin 23" "Not masked,Masked"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " INT_MASK_0[22]_set/clr ,Interrupt mask for bank 0 pin 22" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " INT_MASK_0[21]_set/clr ,Interrupt mask for bank 0 pin 21" "Not masked,Masked"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " INT_MASK_0[20]_set/clr ,Interrupt mask for bank 0 pin 20" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " INT_MASK_0[19]_set/clr ,Interrupt mask for bank 0 pin 19" "Not masked,Masked"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " INT_MASK_0[18]_set/clr ,Interrupt mask for bank 0 pin 18" "Not masked,Masked"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " INT_MASK_0[17]_set/clr ,Interrupt mask for bank 0 pin 17" "Not masked,Masked"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " INT_MASK_0[16]_set/clr ,Interrupt mask for bank 0 pin 16" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " INT_MASK_0[15]_set/clr ,Interrupt mask for bank 0 pin 15" "Not masked,Masked"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " INT_MASK_0[14]_set/clr ,Interrupt mask for bank 0 pin 14" "Not masked,Masked"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " INT_MASK_0[13]_set/clr ,Interrupt mask for bank 0 pin 13" "Not masked,Masked"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " INT_MASK_0[12]_set/clr ,Interrupt mask for bank 0 pin 12" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " INT_MASK_0[11]_set/clr ,Interrupt mask for bank 0 pin 11" "Not masked,Masked"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " INT_MASK_0[10]_set/clr ,Interrupt mask for bank 0 pin 10" "Not masked,Masked"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " INT_MASK_0[9]_set/clr ,Interrupt mask for bank 0 pin 9" "Not masked,Masked"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " INT_MASK_0[8]_set/clr ,Interrupt mask for bank 0 pin 8" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " INT_MASK_0[7]_set/clr ,Interrupt mask for bank 0 pin 7" "Not masked,Masked"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " INT_MASK_0[6]_set/clr ,Interrupt mask for bank 0 pin 6" "Not masked,Masked"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " INT_MASK_0[5]_set/clr ,Interrupt mask for bank 0 pin 5" "Not masked,Masked"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " INT_MASK_0[4]_set/clr ,Interrupt mask for bank 0 pin 4" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " INT_MASK_0[3]_set/clr ,Interrupt mask for bank 0 pin 3" "Not masked,Masked"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " INT_MASK_0[2]_set/clr ,Interrupt mask for bank 0 pin 2" "Not masked,Masked"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " INT_MASK_0[1]_set/clr ,Interrupt mask for bank 0 pin 1" "Not masked,Masked"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " INT_MASK_0[0]_set/clr ,Interrupt mask for bank 0 pin 0" "Not masked,Masked"
|
|
group.long (0x218+0x0)++0x0F
|
|
line.long 0x00 "INT_STAT_0,Interrupt Status register"
|
|
eventfld.long 0x00 31. " INT_STATUS_0[31] ,Interrupt status for bank 0 pin 31" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 30. " INT_STATUS_0[30] ,Interrupt status for bank 0 pin 30" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 29. " INT_STATUS_0[29] ,Interrupt status for bank 0 pin 29" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 28. " INT_STATUS_0[28] ,Interrupt status for bank 0 pin 28" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 27. " INT_STATUS_0[27] ,Interrupt status for bank 0 pin 27" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 26. " INT_STATUS_0[26] ,Interrupt status for bank 0 pin 26" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 25. " INT_STATUS_0[25] ,Interrupt status for bank 0 pin 25" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 24. " INT_STATUS_0[24] ,Interrupt status for bank 0 pin 24" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 23. " INT_STATUS_0[23] ,Interrupt status for bank 0 pin 23" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 22. " INT_STATUS_0[22] ,Interrupt status for bank 0 pin 22" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 21. " INT_STATUS_0[21] ,Interrupt status for bank 0 pin 21" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 20. " INT_STATUS_0[20] ,Interrupt status for bank 0 pin 20" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 19. " INT_STATUS_0[19] ,Interrupt status for bank 0 pin 19" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 18. " INT_STATUS_0[18] ,Interrupt status for bank 0 pin 18" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 17. " INT_STATUS_0[17] ,Interrupt status for bank 0 pin 17" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 16. " INT_STATUS_0[16] ,Interrupt status for bank 0 pin 16" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 15. " INT_STATUS_0[15] ,Interrupt status for bank 0 pin 15" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 14. " INT_STATUS_0[14] ,Interrupt status for bank 0 pin 14" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 13. " INT_STATUS_0[13] ,Interrupt status for bank 0 pin 13" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 12. " INT_STATUS_0[12] ,Interrupt status for bank 0 pin 12" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 11. " INT_STATUS_0[11] ,Interrupt status for bank 0 pin 11" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 10. " INT_STATUS_0[10] ,Interrupt status for bank 0 pin 10" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 9. " INT_STATUS_0[9] ,Interrupt status for bank 0 pin 9" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 8. " INT_STATUS_0[8] ,Interrupt status for bank 0 pin 8" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 7. " INT_STATUS_0[7] ,Interrupt status for bank 0 pin 7" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 6. " INT_STATUS_0[6] ,Interrupt status for bank 0 pin 6" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 5. " INT_STATUS_0[5] ,Interrupt status for bank 0 pin 5" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 4. " INT_STATUS_0[4] ,Interrupt status for bank 0 pin 4" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " INT_STATUS_0[3] ,Interrupt status for bank 0 pin 3" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 2. " INT_STATUS_0[2] ,Interrupt status for bank 0 pin 2" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " INT_STATUS_0[1] ,Interrupt status for bank 0 pin 1" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " INT_STATUS_0[0] ,Interrupt status for bank 0 pin 0" "No interrupt,Interrupt"
|
|
line.long 0x04 "INT_TYPE_0,Interrupt Type configuration register"
|
|
bitfld.long 0x04 31. " INT_TYPE_0[31] ,Interrupt type for bank 0 pin 31" "Level,Edge"
|
|
bitfld.long 0x04 30. " INT_TYPE_0[30] ,Interrupt type for bank 0 pin 30" "Level,Edge"
|
|
bitfld.long 0x04 29. " INT_TYPE_0[29] ,Interrupt type for bank 0 pin 29" "Level,Edge"
|
|
bitfld.long 0x04 28. " INT_TYPE_0[28] ,Interrupt type for bank 0 pin 28" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 27. " INT_TYPE_0[27] ,Interrupt type for bank 0 pin 27" "Level,Edge"
|
|
bitfld.long 0x04 26. " INT_TYPE_0[26] ,Interrupt type for bank 0 pin 26" "Level,Edge"
|
|
bitfld.long 0x04 25. " INT_TYPE_0[25] ,Interrupt type for bank 0 pin 25" "Level,Edge"
|
|
bitfld.long 0x04 24. " INT_TYPE_0[24] ,Interrupt type for bank 0 pin 24" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 23. " INT_TYPE_0[23] ,Interrupt type for bank 0 pin 23" "Level,Edge"
|
|
bitfld.long 0x04 22. " INT_TYPE_0[22] ,Interrupt type for bank 0 pin 22" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 21. " INT_TYPE_0[21] ,Interrupt type for bank 0 pin 21" "Level,Edge"
|
|
bitfld.long 0x04 20. " INT_TYPE_0[20] ,Interrupt type for bank 0 pin 20" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 19. " INT_TYPE_0[19] ,Interrupt type for bank 0 pin 19" "Level,Edge"
|
|
bitfld.long 0x04 18. " INT_TYPE_0[18] ,Interrupt type for bank 0 pin 18" "Level,Edge"
|
|
bitfld.long 0x04 17. " INT_TYPE_0[17] ,Interrupt type for bank 0 pin 17" "Level,Edge"
|
|
bitfld.long 0x04 16. " INT_TYPE_0[16] ,Interrupt type for bank 0 pin 16" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 15. " INT_TYPE_0[15] ,Interrupt type for bank 0 pin 15" "Level,Edge"
|
|
bitfld.long 0x04 14. " INT_TYPE_0[14] ,Interrupt type for bank 0 pin 14" "Level,Edge"
|
|
bitfld.long 0x04 13. " INT_TYPE_0[13] ,Interrupt type for bank 0 pin 13" "Level,Edge"
|
|
bitfld.long 0x04 12. " INT_TYPE_0[12] ,Interrupt type for bank 0 pin 12" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 11. " INT_TYPE_0[11] ,Interrupt type for bank 0 pin 11" "Level,Edge"
|
|
bitfld.long 0x04 10. " INT_TYPE_0[10] ,Interrupt type for bank 0 pin 10" "Level,Edge"
|
|
bitfld.long 0x04 9. " INT_TYPE_0[9] ,Interrupt type for bank 0 pin 9" "Level,Edge"
|
|
bitfld.long 0x04 8. " INT_TYPE_0[8] ,Interrupt type for bank 0 pin 8" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 7. " INT_TYPE_0[7] ,Interrupt type for bank 0 pin 7" "Level,Edge"
|
|
bitfld.long 0x04 6. " INT_TYPE_0[6] ,Interrupt type for bank 0 pin 6" "Level,Edge"
|
|
bitfld.long 0x04 5. " INT_TYPE_0[5] ,Interrupt type for bank 0 pin 5" "Level,Edge"
|
|
bitfld.long 0x04 4. " INT_TYPE_0[4] ,Interrupt type for bank 0 pin 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 3. " INT_TYPE_0[3] ,Interrupt type for bank 0 pin 3" "Level,Edge"
|
|
bitfld.long 0x04 2. " INT_TYPE_0[2] ,Interrupt type for bank 0 pin 2" "Level,Edge"
|
|
bitfld.long 0x04 1. " INT_TYPE_0[1] ,Interrupt type for bank 0 pin 1" "Level,Edge"
|
|
bitfld.long 0x04 0. " INT_TYPE_0[0] ,Interrupt type for bank 0 pin 0" "Level,Edge"
|
|
line.long 0x08 "INT_POLARITY_0,Interrupt polarity configuration register"
|
|
bitfld.long 0x08 31. " INT_POL_0[31] ,Interrupt polarity for bank 0 pin 31" "Low,High"
|
|
bitfld.long 0x08 30. " INT_POL_0[30] ,Interrupt polarity for bank 0 pin 30" "Low,High"
|
|
bitfld.long 0x08 29. " INT_POL_0[29] ,Interrupt polarity for bank 0 pin 29" "Low,High"
|
|
bitfld.long 0x08 28. " INT_POL_0[28] ,Interrupt polarity for bank 0 pin 28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 27. " INT_POL_0[27] ,Interrupt polarity for bank 0 pin 27" "Low,High"
|
|
bitfld.long 0x08 26. " INT_POL_0[26] ,Interrupt polarity for bank 0 pin 26" "Low,High"
|
|
bitfld.long 0x08 25. " INT_POL_0[25] ,Interrupt polarity for bank 0 pin 25" "Low,High"
|
|
bitfld.long 0x08 24. " INT_POL_0[24] ,Interrupt polarity for bank 0 pin 24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 23. " INT_POL_0[23] ,Interrupt polarity for bank 0 pin 23" "Low,High"
|
|
bitfld.long 0x08 22. " INT_POL_0[22] ,Interrupt polarity for bank 0 pin 22" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 21. " INT_POL_0[21] ,Interrupt polarity for bank 0 pin 21" "Low,High"
|
|
bitfld.long 0x08 20. " INT_POL_0[20] ,Interrupt polarity for bank 0 pin 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 19. " INT_POL_0[19] ,Interrupt polarity for bank 0 pin 19" "Low,High"
|
|
bitfld.long 0x08 18. " INT_POL_0[18] ,Interrupt polarity for bank 0 pin 18" "Low,High"
|
|
bitfld.long 0x08 17. " INT_POL_0[17] ,Interrupt polarity for bank 0 pin 17" "Low,High"
|
|
bitfld.long 0x08 16. " INT_POL_0[16] ,Interrupt polarity for bank 0 pin 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 15. " INT_POL_0[15] ,Interrupt polarity for bank 0 pin 15" "Low,High"
|
|
bitfld.long 0x08 14. " INT_POL_0[14] ,Interrupt polarity for bank 0 pin 14" "Low,High"
|
|
bitfld.long 0x08 13. " INT_POL_0[13] ,Interrupt polarity for bank 0 pin 13" "Low,High"
|
|
bitfld.long 0x08 12. " INT_POL_0[12] ,Interrupt polarity for bank 0 pin 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " INT_POL_0[11] ,Interrupt polarity for bank 0 pin 11" "Low,High"
|
|
bitfld.long 0x08 10. " INT_POL_0[10] ,Interrupt polarity for bank 0 pin 10" "Low,High"
|
|
bitfld.long 0x08 9. " INT_POL_0[9] ,Interrupt polarity for bank 0 pin 9" "Low,High"
|
|
bitfld.long 0x08 8. " INT_POL_0[8] ,Interrupt polarity for bank 0 pin 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 7. " INT_POL_0[7] ,Interrupt polarity for bank 0 pin 7" "Low,High"
|
|
bitfld.long 0x08 6. " INT_POL_0[6] ,Interrupt polarity for bank 0 pin 6" "Low,High"
|
|
bitfld.long 0x08 5. " INT_POL_0[5] ,Interrupt polarity for bank 0 pin 5" "Low,High"
|
|
bitfld.long 0x08 4. " INT_POL_0[4] ,Interrupt polarity for bank 0 pin 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 3. " INT_POL_0[3] ,Interrupt polarity for bank 0 pin 3" "Low,High"
|
|
bitfld.long 0x08 2. " INT_POL_0[2] ,Interrupt polarity for bank 0 pin 2" "Low,High"
|
|
bitfld.long 0x08 1. " INT_POL_0[1] ,Interrupt polarity for bank 0 pin 1" "Low,High"
|
|
bitfld.long 0x08 0. " INT_POL_0[0] ,Interrupt polarity for bank 0 pin 0" "Low,High"
|
|
line.long 0x0C "INT_ANY_0,Interrupt On Any configuration register"
|
|
bitfld.long 0x0C 31. " INT_ON_ANY_0[31] ,Interrupt edge triggering mode for bank 0 0 pin 31" "Single,Both"
|
|
bitfld.long 0x0C 30. " INT_ON_ANY_0[30] ,Interrupt edge triggering mode for bank 0 0 pin 30" "Single,Both"
|
|
bitfld.long 0x0C 29. " INT_ON_ANY_0[29] ,Interrupt edge triggering mode for bank 0 0 pin 29" "Single,Both"
|
|
bitfld.long 0x0C 28. " INT_ON_ANY_0[28] ,Interrupt edge triggering mode for bank 0 0 pin 28" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " INT_ON_ANY_0[27] ,Interrupt edge triggering mode for bank 0 0 pin 27" "Single,Both"
|
|
bitfld.long 0x0C 26. " INT_ON_ANY_0[26] ,Interrupt edge triggering mode for bank 0 0 pin 26" "Single,Both"
|
|
bitfld.long 0x0C 25. " INT_ON_ANY_0[25] ,Interrupt edge triggering mode for bank 0 0 pin 25" "Single,Both"
|
|
bitfld.long 0x0C 24. " INT_ON_ANY_0[24] ,Interrupt edge triggering mode for bank 0 0 pin 24" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 23. " INT_ON_ANY_0[23] ,Interrupt edge triggering mode for bank 0 0 pin 23" "Single,Both"
|
|
bitfld.long 0x0C 22. " INT_ON_ANY_0[22] ,Interrupt edge triggering mode for bank 0 0 pin 22" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 21. " INT_ON_ANY_0[21] ,Interrupt edge triggering mode for bank 0 0 pin 21" "Single,Both"
|
|
bitfld.long 0x0C 20. " INT_ON_ANY_0[20] ,Interrupt edge triggering mode for bank 0 0 pin 20" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " INT_ON_ANY_0[19] ,Interrupt edge triggering mode for bank 0 0 pin 19" "Single,Both"
|
|
bitfld.long 0x0C 18. " INT_ON_ANY_0[18] ,Interrupt edge triggering mode for bank 0 0 pin 18" "Single,Both"
|
|
bitfld.long 0x0C 17. " INT_ON_ANY_0[17] ,Interrupt edge triggering mode for bank 0 0 pin 17" "Single,Both"
|
|
bitfld.long 0x0C 16. " INT_ON_ANY_0[16] ,Interrupt edge triggering mode for bank 0 0 pin 16" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " INT_ON_ANY_0[15] ,Interrupt edge triggering mode for bank 0 0 pin 15" "Single,Both"
|
|
bitfld.long 0x0C 14. " INT_ON_ANY_0[14] ,Interrupt edge triggering mode for bank 0 0 pin 14" "Single,Both"
|
|
bitfld.long 0x0C 13. " INT_ON_ANY_0[13] ,Interrupt edge triggering mode for bank 0 0 pin 13" "Single,Both"
|
|
bitfld.long 0x0C 12. " INT_ON_ANY_0[12] ,Interrupt edge triggering mode for bank 0 0 pin 12" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " INT_ON_ANY_0[11] ,Interrupt edge triggering mode for bank 0 0 pin 11" "Single,Both"
|
|
bitfld.long 0x0C 10. " INT_ON_ANY_0[10] ,Interrupt edge triggering mode for bank 0 0 pin 10" "Single,Both"
|
|
bitfld.long 0x0C 9. " INT_ON_ANY_0[9] ,Interrupt edge triggering mode for bank 0 0 pin 9" "Single,Both"
|
|
bitfld.long 0x0C 8. " INT_ON_ANY_0[8] ,Interrupt edge triggering mode for bank 0 0 pin 8" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " INT_ON_ANY_0[7] ,Interrupt edge triggering mode for bank 0 0 pin 7" "Single,Both"
|
|
bitfld.long 0x0C 6. " INT_ON_ANY_0[6] ,Interrupt edge triggering mode for bank 0 0 pin 6" "Single,Both"
|
|
bitfld.long 0x0C 5. " INT_ON_ANY_0[5] ,Interrupt edge triggering mode for bank 0 0 pin 5" "Single,Both"
|
|
bitfld.long 0x0C 4. " INT_ON_ANY_0[4] ,Interrupt edge triggering mode for bank 0 0 pin 4" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " INT_ON_ANY_0[3] ,Interrupt edge triggering mode for bank 0 0 pin 3" "Single,Both"
|
|
bitfld.long 0x0C 2. " INT_ON_ANY_0[2] ,Interrupt edge triggering mode for bank 0 0 pin 2" "Single,Both"
|
|
bitfld.long 0x0C 1. " INT_ON_ANY_0[1] ,Interrupt edge triggering mode for bank 0 0 pin 1" "Single,Both"
|
|
bitfld.long 0x0C 0. " INT_ON_ANY_0[0] ,Interrupt edge triggering mode for bank 0 0 pin 0" "Single,Both"
|
|
tree.end
|
|
tree "GPIO Bank 1"
|
|
group.long (0x200+0x40)++0x0B
|
|
line.long 0x00 "BYPM_1,Bypass configuration register"
|
|
bitfld.long 0x00 21. " BYPASS_MODE_1[21] ,Bypass configuration for bank 1 for pin 21" "Software,Bypass"
|
|
bitfld.long 0x00 20. " BYPASS_MODE_1[20] ,Bypass configuration for bank 1 for pin 20" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BYPASS_MODE_1[19] ,Bypass configuration for bank 1 for pin 19" "Software,Bypass"
|
|
bitfld.long 0x00 18. " BYPASS_MODE_1[18] ,Bypass configuration for bank 1 for pin 18" "Software,Bypass"
|
|
bitfld.long 0x00 17. " BYPASS_MODE_1[17] ,Bypass configuration for bank 1 for pin 17" "Software,Bypass"
|
|
bitfld.long 0x00 16. " BYPASS_MODE_1[16] ,Bypass configuration for bank 1 for pin 16" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BYPASS_MODE_1[15] ,Bypass configuration for bank 1 for pin 15" "Software,Bypass"
|
|
bitfld.long 0x00 14. " BYPASS_MODE_1[14] ,Bypass configuration for bank 1 for pin 14" "Software,Bypass"
|
|
bitfld.long 0x00 13. " BYPASS_MODE_1[13] ,Bypass configuration for bank 1 for pin 13" "Software,Bypass"
|
|
bitfld.long 0x00 12. " BYPASS_MODE_1[12] ,Bypass configuration for bank 1 for pin 12" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BYPASS_MODE_1[11] ,Bypass configuration for bank 1 for pin 11" "Software,Bypass"
|
|
bitfld.long 0x00 10. " BYPASS_MODE_1[10] ,Bypass configuration for bank 1 for pin 10" "Software,Bypass"
|
|
bitfld.long 0x00 9. " BYPASS_MODE_1[9] ,Bypass configuration for bank 1 for pin 9" "Software,Bypass"
|
|
bitfld.long 0x00 8. " BYPASS_MODE_1[8] ,Bypass configuration for bank 1 for pin 8" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BYPASS_MODE_1[7] ,Bypass configuration for bank 1 for pin 7" "Software,Bypass"
|
|
bitfld.long 0x00 6. " BYPASS_MODE_1[6] ,Bypass configuration for bank 1 for pin 6" "Software,Bypass"
|
|
bitfld.long 0x00 5. " BYPASS_MODE_1[5] ,Bypass configuration for bank 1 for pin 5" "Software,Bypass"
|
|
bitfld.long 0x00 4. " BYPASS_MODE_1[4] ,Bypass configuration for bank 1 for pin 4" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BYPASS_MODE_1[3] ,Bypass configuration for bank 1 for pin 3" "Software,Bypass"
|
|
bitfld.long 0x00 2. " BYPASS_MODE_1[2] ,Bypass configuration for bank 1 for pin 2" "Software,Bypass"
|
|
bitfld.long 0x00 1. " BYPASS_MODE_1[1] ,Bypass configuration for bank 1 for pin 1" "Software,Bypass"
|
|
bitfld.long 0x00 0. " BYPASS_MODE_1[0] ,Bypass configuration for bank 1 for pin 0" "Software,Bypass"
|
|
line.long 0x04 "DIRM_1,Direction mode configuration register"
|
|
bitfld.long 0x04 21. " DIRECTION_1[21] ,Direction mode for bank 1 pin 21" "Input,Output"
|
|
bitfld.long 0x04 20. " DIRECTION_1[20] ,Direction mode for bank 1 pin 20" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 19. " DIRECTION_1[19] ,Direction mode for bank 1 pin 19" "Input,Output"
|
|
bitfld.long 0x04 18. " DIRECTION_1[18] ,Direction mode for bank 1 pin 18" "Input,Output"
|
|
bitfld.long 0x04 17. " DIRECTION_1[17] ,Direction mode for bank 1 pin 17" "Input,Output"
|
|
bitfld.long 0x04 16. " DIRECTION_1[16] ,Direction mode for bank 1 pin 16" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 15. " DIRECTION_1[15] ,Direction mode for bank 1 pin 15" "Input,Output"
|
|
bitfld.long 0x04 14. " DIRECTION_1[14] ,Direction mode for bank 1 pin 14" "Input,Output"
|
|
bitfld.long 0x04 13. " DIRECTION_1[13] ,Direction mode for bank 1 pin 13" "Input,Output"
|
|
bitfld.long 0x04 12. " DIRECTION_1[12] ,Direction mode for bank 1 pin 12" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 11. " DIRECTION_1[11] ,Direction mode for bank 1 pin 11" "Input,Output"
|
|
bitfld.long 0x04 10. " DIRECTION_1[10] ,Direction mode for bank 1 pin 10" "Input,Output"
|
|
bitfld.long 0x04 9. " DIRECTION_1[9] ,Direction mode for bank 1 pin 9" "Input,Output"
|
|
bitfld.long 0x04 8. " DIRECTION_1[8] ,Direction mode for bank 1 pin 8" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 7. " DIRECTION_1[7] ,Direction mode for bank 1 pin 7" "Input,Output"
|
|
bitfld.long 0x04 6. " DIRECTION_1[6] ,Direction mode for bank 1 pin 6" "Input,Output"
|
|
bitfld.long 0x04 5. " DIRECTION_1[5] ,Direction mode for bank 1 pin 5" "Input,Output"
|
|
bitfld.long 0x04 4. " DIRECTION_1[4] ,Direction mode for bank 1 pin 4" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 3. " DIRECTION_1[3] ,Direction mode for bank 1 pin 3" "Input,Output"
|
|
bitfld.long 0x04 2. " DIRECTION_1[2] ,Direction mode for bank 1 pin 2" "Input,Output"
|
|
bitfld.long 0x04 1. " DIRECTION_1[1] ,Direction mode for bank 1 pin 1" "Input,Output"
|
|
bitfld.long 0x04 0. " DIRECTION_1[0] ,Direction mode for bank 1 pin 0" "Input,Output"
|
|
line.long 0x08 "OEN_1,Output enable register"
|
|
bitfld.long 0x08 21. " OP_ENABLE_1[21] ,Output enable for bank 1 pin 21" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " OP_ENABLE_1[20] ,Output enable for bank 1 pin 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " OP_ENABLE_1[19] ,Output enable for bank 1 pin 19" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " OP_ENABLE_1[18] ,Output enable for bank 1 pin 18" "Disabled,Enabled"
|
|
bitfld.long 0x08 17. " OP_ENABLE_1[17] ,Output enable for bank 1 pin 17" "Disabled,Enabled"
|
|
bitfld.long 0x08 16. " OP_ENABLE_1[16] ,Output enable for bank 1 pin 16" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 15. " OP_ENABLE_1[15] ,Output enable for bank 1 pin 15" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " OP_ENABLE_1[14] ,Output enable for bank 1 pin 14" "Disabled,Enabled"
|
|
bitfld.long 0x08 13. " OP_ENABLE_1[13] ,Output enable for bank 1 pin 13" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " OP_ENABLE_1[12] ,Output enable for bank 1 pin 12" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 11. " OP_ENABLE_1[11] ,Output enable for bank 1 pin 11" "Disabled,Enabled"
|
|
bitfld.long 0x08 10. " OP_ENABLE_1[10] ,Output enable for bank 1 pin 10" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " OP_ENABLE_1[9] ,Output enable for bank 1 pin 9" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " OP_ENABLE_1[8] ,Output enable for bank 1 pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " OP_ENABLE_1[7] ,Output enable for bank 1 pin 7" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " OP_ENABLE_1[6] ,Output enable for bank 1 pin 6" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " OP_ENABLE_1[5] ,Output enable for bank 1 pin 5" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " OP_ENABLE_1[4] ,Output enable for bank 1 pin 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " OP_ENABLE_1[3] ,Output enable for bank 1 pin 3" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " OP_ENABLE_1[2] ,Output enable for bank 1 pin 2" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " OP_ENABLE_1[1] ,Output enable for bank 1 pin 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " OP_ENABLE_1[0] ,Output enable for bank 1 pin 0" "Disabled,Enabled"
|
|
group.long (0x20C+0x40)++0x03
|
|
line.long 0x00 "INT_MASK_1,Interrupt Mask status register"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " INT_MASK_1[19]_set/clr ,Interrupt mask for bank 1 pin 19" "Not masked,Masked"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " INT_MASK_1[18]_set/clr ,Interrupt mask for bank 1 pin 18" "Not masked,Masked"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " INT_MASK_1[17]_set/clr ,Interrupt mask for bank 1 pin 17" "Not masked,Masked"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " INT_MASK_1[16]_set/clr ,Interrupt mask for bank 1 pin 16" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " INT_MASK_1[15]_set/clr ,Interrupt mask for bank 1 pin 15" "Not masked,Masked"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " INT_MASK_1[14]_set/clr ,Interrupt mask for bank 1 pin 14" "Not masked,Masked"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " INT_MASK_1[13]_set/clr ,Interrupt mask for bank 1 pin 13" "Not masked,Masked"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " INT_MASK_1[12]_set/clr ,Interrupt mask for bank 1 pin 12" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " INT_MASK_1[11]_set/clr ,Interrupt mask for bank 1 pin 11" "Not masked,Masked"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " INT_MASK_1[10]_set/clr ,Interrupt mask for bank 1 pin 10" "Not masked,Masked"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " INT_MASK_1[9]_set/clr ,Interrupt mask for bank 1 pin 9" "Not masked,Masked"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " INT_MASK_1[8]_set/clr ,Interrupt mask for bank 1 pin 8" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " INT_MASK_1[7]_set/clr ,Interrupt mask for bank 1 pin 7" "Not masked,Masked"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " INT_MASK_1[6]_set/clr ,Interrupt mask for bank 1 pin 6" "Not masked,Masked"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " INT_MASK_1[5]_set/clr ,Interrupt mask for bank 1 pin 5" "Not masked,Masked"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " INT_MASK_1[4]_set/clr ,Interrupt mask for bank 1 pin 4" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " INT_MASK_1[3]_set/clr ,Interrupt mask for bank 1 pin 3" "Not masked,Masked"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " INT_MASK_1[2]_set/clr ,Interrupt mask for bank 1 pin 2" "Not masked,Masked"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " INT_MASK_1[1]_set/clr ,Interrupt mask for bank 1 pin 1" "Not masked,Masked"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " INT_MASK_1[0]_set/clr ,Interrupt mask for bank 1 pin 0" "Not masked,Masked"
|
|
group.long (0x218+0x40)++0x0F
|
|
line.long 0x00 "INT_STAT_1,Interrupt Status register"
|
|
eventfld.long 0x00 21. " INT_STATUS_1[21] ,Interrupt status for bank 1 pin 21" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 20. " INT_STATUS_1[20] ,Interrupt status for bank 1 pin 20" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 19. " INT_STATUS_1[19] ,Interrupt status for bank 1 pin 19" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 18. " INT_STATUS_1[18] ,Interrupt status for bank 1 pin 18" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 17. " INT_STATUS_1[17] ,Interrupt status for bank 1 pin 17" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 16. " INT_STATUS_1[16] ,Interrupt status for bank 1 pin 16" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 15. " INT_STATUS_1[15] ,Interrupt status for bank 1 pin 15" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 14. " INT_STATUS_1[14] ,Interrupt status for bank 1 pin 14" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 13. " INT_STATUS_1[13] ,Interrupt status for bank 1 pin 13" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 12. " INT_STATUS_1[12] ,Interrupt status for bank 1 pin 12" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 11. " INT_STATUS_1[11] ,Interrupt status for bank 1 pin 11" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 10. " INT_STATUS_1[10] ,Interrupt status for bank 1 pin 10" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 9. " INT_STATUS_1[9] ,Interrupt status for bank 1 pin 9" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 8. " INT_STATUS_1[8] ,Interrupt status for bank 1 pin 8" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 7. " INT_STATUS_1[7] ,Interrupt status for bank 1 pin 7" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 6. " INT_STATUS_1[6] ,Interrupt status for bank 1 pin 6" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 5. " INT_STATUS_1[5] ,Interrupt status for bank 1 pin 5" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 4. " INT_STATUS_1[4] ,Interrupt status for bank 1 pin 4" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " INT_STATUS_1[3] ,Interrupt status for bank 1 pin 3" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 2. " INT_STATUS_1[2] ,Interrupt status for bank 1 pin 2" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " INT_STATUS_1[1] ,Interrupt status for bank 1 pin 1" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " INT_STATUS_1[0] ,Interrupt status for bank 1 pin 0" "No interrupt,Interrupt"
|
|
line.long 0x04 "INT_TYPE_1,Interrupt Type configuration register"
|
|
bitfld.long 0x04 21. " INT_TYPE_1[21] ,Interrupt type for bank 1 pin 21" "Level,Edge"
|
|
bitfld.long 0x04 20. " INT_TYPE_1[20] ,Interrupt type for bank 1 pin 20" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 19. " INT_TYPE_1[19] ,Interrupt type for bank 1 pin 19" "Level,Edge"
|
|
bitfld.long 0x04 18. " INT_TYPE_1[18] ,Interrupt type for bank 1 pin 18" "Level,Edge"
|
|
bitfld.long 0x04 17. " INT_TYPE_1[17] ,Interrupt type for bank 1 pin 17" "Level,Edge"
|
|
bitfld.long 0x04 16. " INT_TYPE_1[16] ,Interrupt type for bank 1 pin 16" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 15. " INT_TYPE_1[15] ,Interrupt type for bank 1 pin 15" "Level,Edge"
|
|
bitfld.long 0x04 14. " INT_TYPE_1[14] ,Interrupt type for bank 1 pin 14" "Level,Edge"
|
|
bitfld.long 0x04 13. " INT_TYPE_1[13] ,Interrupt type for bank 1 pin 13" "Level,Edge"
|
|
bitfld.long 0x04 12. " INT_TYPE_1[12] ,Interrupt type for bank 1 pin 12" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 11. " INT_TYPE_1[11] ,Interrupt type for bank 1 pin 11" "Level,Edge"
|
|
bitfld.long 0x04 10. " INT_TYPE_1[10] ,Interrupt type for bank 1 pin 10" "Level,Edge"
|
|
bitfld.long 0x04 9. " INT_TYPE_1[9] ,Interrupt type for bank 1 pin 9" "Level,Edge"
|
|
bitfld.long 0x04 8. " INT_TYPE_1[8] ,Interrupt type for bank 1 pin 8" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 7. " INT_TYPE_1[7] ,Interrupt type for bank 1 pin 7" "Level,Edge"
|
|
bitfld.long 0x04 6. " INT_TYPE_1[6] ,Interrupt type for bank 1 pin 6" "Level,Edge"
|
|
bitfld.long 0x04 5. " INT_TYPE_1[5] ,Interrupt type for bank 1 pin 5" "Level,Edge"
|
|
bitfld.long 0x04 4. " INT_TYPE_1[4] ,Interrupt type for bank 1 pin 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 3. " INT_TYPE_1[3] ,Interrupt type for bank 1 pin 3" "Level,Edge"
|
|
bitfld.long 0x04 2. " INT_TYPE_1[2] ,Interrupt type for bank 1 pin 2" "Level,Edge"
|
|
bitfld.long 0x04 1. " INT_TYPE_1[1] ,Interrupt type for bank 1 pin 1" "Level,Edge"
|
|
bitfld.long 0x04 0. " INT_TYPE_1[0] ,Interrupt type for bank 1 pin 0" "Level,Edge"
|
|
line.long 0x08 "INT_POLARITY_1,Interrupt polarity configuration register"
|
|
bitfld.long 0x08 21. " INT_POL_1[21] ,Interrupt polarity for bank 1 pin 21" "Low,High"
|
|
bitfld.long 0x08 20. " INT_POL_1[20] ,Interrupt polarity for bank 1 pin 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 19. " INT_POL_1[19] ,Interrupt polarity for bank 1 pin 19" "Low,High"
|
|
bitfld.long 0x08 18. " INT_POL_1[18] ,Interrupt polarity for bank 1 pin 18" "Low,High"
|
|
bitfld.long 0x08 17. " INT_POL_1[17] ,Interrupt polarity for bank 1 pin 17" "Low,High"
|
|
bitfld.long 0x08 16. " INT_POL_1[16] ,Interrupt polarity for bank 1 pin 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 15. " INT_POL_1[15] ,Interrupt polarity for bank 1 pin 15" "Low,High"
|
|
bitfld.long 0x08 14. " INT_POL_1[14] ,Interrupt polarity for bank 1 pin 14" "Low,High"
|
|
bitfld.long 0x08 13. " INT_POL_1[13] ,Interrupt polarity for bank 1 pin 13" "Low,High"
|
|
bitfld.long 0x08 12. " INT_POL_1[12] ,Interrupt polarity for bank 1 pin 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " INT_POL_1[11] ,Interrupt polarity for bank 1 pin 11" "Low,High"
|
|
bitfld.long 0x08 10. " INT_POL_1[10] ,Interrupt polarity for bank 1 pin 10" "Low,High"
|
|
bitfld.long 0x08 9. " INT_POL_1[9] ,Interrupt polarity for bank 1 pin 9" "Low,High"
|
|
bitfld.long 0x08 8. " INT_POL_1[8] ,Interrupt polarity for bank 1 pin 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 7. " INT_POL_1[7] ,Interrupt polarity for bank 1 pin 7" "Low,High"
|
|
bitfld.long 0x08 6. " INT_POL_1[6] ,Interrupt polarity for bank 1 pin 6" "Low,High"
|
|
bitfld.long 0x08 5. " INT_POL_1[5] ,Interrupt polarity for bank 1 pin 5" "Low,High"
|
|
bitfld.long 0x08 4. " INT_POL_1[4] ,Interrupt polarity for bank 1 pin 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 3. " INT_POL_1[3] ,Interrupt polarity for bank 1 pin 3" "Low,High"
|
|
bitfld.long 0x08 2. " INT_POL_1[2] ,Interrupt polarity for bank 1 pin 2" "Low,High"
|
|
bitfld.long 0x08 1. " INT_POL_1[1] ,Interrupt polarity for bank 1 pin 1" "Low,High"
|
|
bitfld.long 0x08 0. " INT_POL_1[0] ,Interrupt polarity for bank 1 pin 0" "Low,High"
|
|
line.long 0x0C "INT_ANY_1,Interrupt On Any configuration register"
|
|
bitfld.long 0x0C 21. " INT_ON_ANY_1[21] ,Interrupt edge triggering mode for bank 1 0 pin 21" "Single,Both"
|
|
bitfld.long 0x0C 20. " INT_ON_ANY_1[20] ,Interrupt edge triggering mode for bank 1 0 pin 20" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " INT_ON_ANY_1[19] ,Interrupt edge triggering mode for bank 1 0 pin 19" "Single,Both"
|
|
bitfld.long 0x0C 18. " INT_ON_ANY_1[18] ,Interrupt edge triggering mode for bank 1 0 pin 18" "Single,Both"
|
|
bitfld.long 0x0C 17. " INT_ON_ANY_1[17] ,Interrupt edge triggering mode for bank 1 0 pin 17" "Single,Both"
|
|
bitfld.long 0x0C 16. " INT_ON_ANY_1[16] ,Interrupt edge triggering mode for bank 1 0 pin 16" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " INT_ON_ANY_1[15] ,Interrupt edge triggering mode for bank 1 0 pin 15" "Single,Both"
|
|
bitfld.long 0x0C 14. " INT_ON_ANY_1[14] ,Interrupt edge triggering mode for bank 1 0 pin 14" "Single,Both"
|
|
bitfld.long 0x0C 13. " INT_ON_ANY_1[13] ,Interrupt edge triggering mode for bank 1 0 pin 13" "Single,Both"
|
|
bitfld.long 0x0C 12. " INT_ON_ANY_1[12] ,Interrupt edge triggering mode for bank 1 0 pin 12" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " INT_ON_ANY_1[11] ,Interrupt edge triggering mode for bank 1 0 pin 11" "Single,Both"
|
|
bitfld.long 0x0C 10. " INT_ON_ANY_1[10] ,Interrupt edge triggering mode for bank 1 0 pin 10" "Single,Both"
|
|
bitfld.long 0x0C 9. " INT_ON_ANY_1[9] ,Interrupt edge triggering mode for bank 1 0 pin 9" "Single,Both"
|
|
bitfld.long 0x0C 8. " INT_ON_ANY_1[8] ,Interrupt edge triggering mode for bank 1 0 pin 8" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " INT_ON_ANY_1[7] ,Interrupt edge triggering mode for bank 1 0 pin 7" "Single,Both"
|
|
bitfld.long 0x0C 6. " INT_ON_ANY_1[6] ,Interrupt edge triggering mode for bank 1 0 pin 6" "Single,Both"
|
|
bitfld.long 0x0C 5. " INT_ON_ANY_1[5] ,Interrupt edge triggering mode for bank 1 0 pin 5" "Single,Both"
|
|
bitfld.long 0x0C 4. " INT_ON_ANY_1[4] ,Interrupt edge triggering mode for bank 1 0 pin 4" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " INT_ON_ANY_1[3] ,Interrupt edge triggering mode for bank 1 0 pin 3" "Single,Both"
|
|
bitfld.long 0x0C 2. " INT_ON_ANY_1[2] ,Interrupt edge triggering mode for bank 1 0 pin 2" "Single,Both"
|
|
bitfld.long 0x0C 1. " INT_ON_ANY_1[1] ,Interrupt edge triggering mode for bank 1 0 pin 1" "Single,Both"
|
|
bitfld.long 0x0C 0. " INT_ON_ANY_1[0] ,Interrupt edge triggering mode for bank 1 0 pin 0" "Single,Both"
|
|
tree.end
|
|
tree "GPIO Bank 2"
|
|
group.long (0x200+0x80)++0x0B
|
|
line.long 0x00 "BYPM_2,Bypass configuration register"
|
|
bitfld.long 0x00 31. " BYPASS_MODE_2[31] ,Bypass configuration for bank 2 for pin 31" "Software,Bypass"
|
|
bitfld.long 0x00 30. " BYPASS_MODE_2[30] ,Bypass configuration for bank 2 for pin 30" "Software,Bypass"
|
|
bitfld.long 0x00 29. " BYPASS_MODE_2[29] ,Bypass configuration for bank 2 for pin 29" "Software,Bypass"
|
|
bitfld.long 0x00 28. " BYPASS_MODE_2[28] ,Bypass configuration for bank 2 for pin 28" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BYPASS_MODE_2[27] ,Bypass configuration for bank 2 for pin 27" "Software,Bypass"
|
|
bitfld.long 0x00 26. " BYPASS_MODE_2[26] ,Bypass configuration for bank 2 for pin 26" "Software,Bypass"
|
|
bitfld.long 0x00 25. " BYPASS_MODE_2[25] ,Bypass configuration for bank 2 for pin 25" "Software,Bypass"
|
|
bitfld.long 0x00 24. " BYPASS_MODE_2[24] ,Bypass configuration for bank 2 for pin 24" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BYPASS_MODE_2[23] ,Bypass configuration for bank 2 for pin 23" "Software,Bypass"
|
|
bitfld.long 0x00 22. " BYPASS_MODE_2[22] ,Bypass configuration for bank 2 for pin 22" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 21. " BYPASS_MODE_2[21] ,Bypass configuration for bank 2 for pin 21" "Software,Bypass"
|
|
bitfld.long 0x00 20. " BYPASS_MODE_2[20] ,Bypass configuration for bank 2 for pin 20" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BYPASS_MODE_2[19] ,Bypass configuration for bank 2 for pin 19" "Software,Bypass"
|
|
bitfld.long 0x00 18. " BYPASS_MODE_2[18] ,Bypass configuration for bank 2 for pin 18" "Software,Bypass"
|
|
bitfld.long 0x00 17. " BYPASS_MODE_2[17] ,Bypass configuration for bank 2 for pin 17" "Software,Bypass"
|
|
bitfld.long 0x00 16. " BYPASS_MODE_2[16] ,Bypass configuration for bank 2 for pin 16" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BYPASS_MODE_2[15] ,Bypass configuration for bank 2 for pin 15" "Software,Bypass"
|
|
bitfld.long 0x00 14. " BYPASS_MODE_2[14] ,Bypass configuration for bank 2 for pin 14" "Software,Bypass"
|
|
bitfld.long 0x00 13. " BYPASS_MODE_2[13] ,Bypass configuration for bank 2 for pin 13" "Software,Bypass"
|
|
bitfld.long 0x00 12. " BYPASS_MODE_2[12] ,Bypass configuration for bank 2 for pin 12" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BYPASS_MODE_2[11] ,Bypass configuration for bank 2 for pin 11" "Software,Bypass"
|
|
bitfld.long 0x00 10. " BYPASS_MODE_2[10] ,Bypass configuration for bank 2 for pin 10" "Software,Bypass"
|
|
bitfld.long 0x00 9. " BYPASS_MODE_2[9] ,Bypass configuration for bank 2 for pin 9" "Software,Bypass"
|
|
bitfld.long 0x00 8. " BYPASS_MODE_2[8] ,Bypass configuration for bank 2 for pin 8" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BYPASS_MODE_2[7] ,Bypass configuration for bank 2 for pin 7" "Software,Bypass"
|
|
bitfld.long 0x00 6. " BYPASS_MODE_2[6] ,Bypass configuration for bank 2 for pin 6" "Software,Bypass"
|
|
bitfld.long 0x00 5. " BYPASS_MODE_2[5] ,Bypass configuration for bank 2 for pin 5" "Software,Bypass"
|
|
bitfld.long 0x00 4. " BYPASS_MODE_2[4] ,Bypass configuration for bank 2 for pin 4" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BYPASS_MODE_2[3] ,Bypass configuration for bank 2 for pin 3" "Software,Bypass"
|
|
bitfld.long 0x00 2. " BYPASS_MODE_2[2] ,Bypass configuration for bank 2 for pin 2" "Software,Bypass"
|
|
bitfld.long 0x00 1. " BYPASS_MODE_2[1] ,Bypass configuration for bank 2 for pin 1" "Software,Bypass"
|
|
bitfld.long 0x00 0. " BYPASS_MODE_2[0] ,Bypass configuration for bank 2 for pin 0" "Software,Bypass"
|
|
line.long 0x04 "DIRM_2,Direction mode configuration register"
|
|
bitfld.long 0x04 31. " DIRECTION_2[31] ,Direction mode for bank 2 pin 31" "Input,Output"
|
|
bitfld.long 0x04 30. " DIRECTION_2[30] ,Direction mode for bank 2 pin 30" "Input,Output"
|
|
bitfld.long 0x04 29. " DIRECTION_2[29] ,Direction mode for bank 2 pin 29" "Input,Output"
|
|
bitfld.long 0x04 28. " DIRECTION_2[28] ,Direction mode for bank 2 pin 28" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 27. " DIRECTION_2[27] ,Direction mode for bank 2 pin 27" "Input,Output"
|
|
bitfld.long 0x04 26. " DIRECTION_2[26] ,Direction mode for bank 2 pin 26" "Input,Output"
|
|
bitfld.long 0x04 25. " DIRECTION_2[25] ,Direction mode for bank 2 pin 25" "Input,Output"
|
|
bitfld.long 0x04 24. " DIRECTION_2[24] ,Direction mode for bank 2 pin 24" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 23. " DIRECTION_2[23] ,Direction mode for bank 2 pin 23" "Input,Output"
|
|
bitfld.long 0x04 22. " DIRECTION_2[22] ,Direction mode for bank 2 pin 22" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 21. " DIRECTION_2[21] ,Direction mode for bank 2 pin 21" "Input,Output"
|
|
bitfld.long 0x04 20. " DIRECTION_2[20] ,Direction mode for bank 2 pin 20" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 19. " DIRECTION_2[19] ,Direction mode for bank 2 pin 19" "Input,Output"
|
|
bitfld.long 0x04 18. " DIRECTION_2[18] ,Direction mode for bank 2 pin 18" "Input,Output"
|
|
bitfld.long 0x04 17. " DIRECTION_2[17] ,Direction mode for bank 2 pin 17" "Input,Output"
|
|
bitfld.long 0x04 16. " DIRECTION_2[16] ,Direction mode for bank 2 pin 16" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 15. " DIRECTION_2[15] ,Direction mode for bank 2 pin 15" "Input,Output"
|
|
bitfld.long 0x04 14. " DIRECTION_2[14] ,Direction mode for bank 2 pin 14" "Input,Output"
|
|
bitfld.long 0x04 13. " DIRECTION_2[13] ,Direction mode for bank 2 pin 13" "Input,Output"
|
|
bitfld.long 0x04 12. " DIRECTION_2[12] ,Direction mode for bank 2 pin 12" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 11. " DIRECTION_2[11] ,Direction mode for bank 2 pin 11" "Input,Output"
|
|
bitfld.long 0x04 10. " DIRECTION_2[10] ,Direction mode for bank 2 pin 10" "Input,Output"
|
|
bitfld.long 0x04 9. " DIRECTION_2[9] ,Direction mode for bank 2 pin 9" "Input,Output"
|
|
bitfld.long 0x04 8. " DIRECTION_2[8] ,Direction mode for bank 2 pin 8" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 7. " DIRECTION_2[7] ,Direction mode for bank 2 pin 7" "Input,Output"
|
|
bitfld.long 0x04 6. " DIRECTION_2[6] ,Direction mode for bank 2 pin 6" "Input,Output"
|
|
bitfld.long 0x04 5. " DIRECTION_2[5] ,Direction mode for bank 2 pin 5" "Input,Output"
|
|
bitfld.long 0x04 4. " DIRECTION_2[4] ,Direction mode for bank 2 pin 4" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 3. " DIRECTION_2[3] ,Direction mode for bank 2 pin 3" "Input,Output"
|
|
bitfld.long 0x04 2. " DIRECTION_2[2] ,Direction mode for bank 2 pin 2" "Input,Output"
|
|
bitfld.long 0x04 1. " DIRECTION_2[1] ,Direction mode for bank 2 pin 1" "Input,Output"
|
|
bitfld.long 0x04 0. " DIRECTION_2[0] ,Direction mode for bank 2 pin 0" "Input,Output"
|
|
line.long 0x08 "OEN_2,Output enable register"
|
|
bitfld.long 0x08 31. " OP_ENABLE_2[31] ,Output enable for bank 2 pin 31" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " OP_ENABLE_2[30] ,Output enable for bank 2 pin 30" "Disabled,Enabled"
|
|
bitfld.long 0x08 29. " OP_ENABLE_2[29] ,Output enable for bank 2 pin 29" "Disabled,Enabled"
|
|
bitfld.long 0x08 28. " OP_ENABLE_2[28] ,Output enable for bank 2 pin 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 27. " OP_ENABLE_2[27] ,Output enable for bank 2 pin 27" "Disabled,Enabled"
|
|
bitfld.long 0x08 26. " OP_ENABLE_2[26] ,Output enable for bank 2 pin 26" "Disabled,Enabled"
|
|
bitfld.long 0x08 25. " OP_ENABLE_2[25] ,Output enable for bank 2 pin 25" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " OP_ENABLE_2[24] ,Output enable for bank 2 pin 24" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 23. " OP_ENABLE_2[23] ,Output enable for bank 2 pin 23" "Disabled,Enabled"
|
|
bitfld.long 0x08 22. " OP_ENABLE_2[22] ,Output enable for bank 2 pin 22" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 21. " OP_ENABLE_2[21] ,Output enable for bank 2 pin 21" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " OP_ENABLE_2[20] ,Output enable for bank 2 pin 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " OP_ENABLE_2[19] ,Output enable for bank 2 pin 19" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " OP_ENABLE_2[18] ,Output enable for bank 2 pin 18" "Disabled,Enabled"
|
|
bitfld.long 0x08 17. " OP_ENABLE_2[17] ,Output enable for bank 2 pin 17" "Disabled,Enabled"
|
|
bitfld.long 0x08 16. " OP_ENABLE_2[16] ,Output enable for bank 2 pin 16" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 15. " OP_ENABLE_2[15] ,Output enable for bank 2 pin 15" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " OP_ENABLE_2[14] ,Output enable for bank 2 pin 14" "Disabled,Enabled"
|
|
bitfld.long 0x08 13. " OP_ENABLE_2[13] ,Output enable for bank 2 pin 13" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " OP_ENABLE_2[12] ,Output enable for bank 2 pin 12" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 11. " OP_ENABLE_2[11] ,Output enable for bank 2 pin 11" "Disabled,Enabled"
|
|
bitfld.long 0x08 10. " OP_ENABLE_2[10] ,Output enable for bank 2 pin 10" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " OP_ENABLE_2[9] ,Output enable for bank 2 pin 9" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " OP_ENABLE_2[8] ,Output enable for bank 2 pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " OP_ENABLE_2[7] ,Output enable for bank 2 pin 7" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " OP_ENABLE_2[6] ,Output enable for bank 2 pin 6" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " OP_ENABLE_2[5] ,Output enable for bank 2 pin 5" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " OP_ENABLE_2[4] ,Output enable for bank 2 pin 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " OP_ENABLE_2[3] ,Output enable for bank 2 pin 3" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " OP_ENABLE_2[2] ,Output enable for bank 2 pin 2" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " OP_ENABLE_2[1] ,Output enable for bank 2 pin 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " OP_ENABLE_2[0] ,Output enable for bank 2 pin 0" "Disabled,Enabled"
|
|
group.long (0x20C+0x80)++0x03
|
|
line.long 0x00 "INT_MASK_2,Interrupt Mask status register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " INT_MASK_2[31]_set/clr ,Interrupt mask for bank 2 pin 31" "Not masked,Masked"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " INT_MASK_2[30]_set/clr ,Interrupt mask for bank 2 pin 30" "Not masked,Masked"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " INT_MASK_2[29]_set/clr ,Interrupt mask for bank 2 pin 29" "Not masked,Masked"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " INT_MASK_2[28]_set/clr ,Interrupt mask for bank 2 pin 28" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " INT_MASK_2[27]_set/clr ,Interrupt mask for bank 2 pin 27" "Not masked,Masked"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " INT_MASK_2[26]_set/clr ,Interrupt mask for bank 2 pin 26" "Not masked,Masked"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " INT_MASK_2[25]_set/clr ,Interrupt mask for bank 2 pin 25" "Not masked,Masked"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " INT_MASK_2[24]_set/clr ,Interrupt mask for bank 2 pin 24" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " INT_MASK_2[23]_set/clr ,Interrupt mask for bank 2 pin 23" "Not masked,Masked"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " INT_MASK_2[22]_set/clr ,Interrupt mask for bank 2 pin 22" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " INT_MASK_2[21]_set/clr ,Interrupt mask for bank 2 pin 21" "Not masked,Masked"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " INT_MASK_2[20]_set/clr ,Interrupt mask for bank 2 pin 20" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " INT_MASK_2[19]_set/clr ,Interrupt mask for bank 2 pin 19" "Not masked,Masked"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " INT_MASK_2[18]_set/clr ,Interrupt mask for bank 2 pin 18" "Not masked,Masked"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " INT_MASK_2[17]_set/clr ,Interrupt mask for bank 2 pin 17" "Not masked,Masked"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " INT_MASK_2[16]_set/clr ,Interrupt mask for bank 2 pin 16" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " INT_MASK_2[15]_set/clr ,Interrupt mask for bank 2 pin 15" "Not masked,Masked"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " INT_MASK_2[14]_set/clr ,Interrupt mask for bank 2 pin 14" "Not masked,Masked"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " INT_MASK_2[13]_set/clr ,Interrupt mask for bank 2 pin 13" "Not masked,Masked"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " INT_MASK_2[12]_set/clr ,Interrupt mask for bank 2 pin 12" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " INT_MASK_2[11]_set/clr ,Interrupt mask for bank 2 pin 11" "Not masked,Masked"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " INT_MASK_2[10]_set/clr ,Interrupt mask for bank 2 pin 10" "Not masked,Masked"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " INT_MASK_2[9]_set/clr ,Interrupt mask for bank 2 pin 9" "Not masked,Masked"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " INT_MASK_2[8]_set/clr ,Interrupt mask for bank 2 pin 8" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " INT_MASK_2[7]_set/clr ,Interrupt mask for bank 2 pin 7" "Not masked,Masked"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " INT_MASK_2[6]_set/clr ,Interrupt mask for bank 2 pin 6" "Not masked,Masked"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " INT_MASK_2[5]_set/clr ,Interrupt mask for bank 2 pin 5" "Not masked,Masked"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " INT_MASK_2[4]_set/clr ,Interrupt mask for bank 2 pin 4" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " INT_MASK_2[3]_set/clr ,Interrupt mask for bank 2 pin 3" "Not masked,Masked"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " INT_MASK_2[2]_set/clr ,Interrupt mask for bank 2 pin 2" "Not masked,Masked"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " INT_MASK_2[1]_set/clr ,Interrupt mask for bank 2 pin 1" "Not masked,Masked"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " INT_MASK_2[0]_set/clr ,Interrupt mask for bank 2 pin 0" "Not masked,Masked"
|
|
group.long (0x218+0x80)++0x0F
|
|
line.long 0x00 "INT_STAT_2,Interrupt Status register"
|
|
eventfld.long 0x00 31. " INT_STATUS_2[31] ,Interrupt status for bank 2 pin 31" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 30. " INT_STATUS_2[30] ,Interrupt status for bank 2 pin 30" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 29. " INT_STATUS_2[29] ,Interrupt status for bank 2 pin 29" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 28. " INT_STATUS_2[28] ,Interrupt status for bank 2 pin 28" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 27. " INT_STATUS_2[27] ,Interrupt status for bank 2 pin 27" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 26. " INT_STATUS_2[26] ,Interrupt status for bank 2 pin 26" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 25. " INT_STATUS_2[25] ,Interrupt status for bank 2 pin 25" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 24. " INT_STATUS_2[24] ,Interrupt status for bank 2 pin 24" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 23. " INT_STATUS_2[23] ,Interrupt status for bank 2 pin 23" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 22. " INT_STATUS_2[22] ,Interrupt status for bank 2 pin 22" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 21. " INT_STATUS_2[21] ,Interrupt status for bank 2 pin 21" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 20. " INT_STATUS_2[20] ,Interrupt status for bank 2 pin 20" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 19. " INT_STATUS_2[19] ,Interrupt status for bank 2 pin 19" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 18. " INT_STATUS_2[18] ,Interrupt status for bank 2 pin 18" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 17. " INT_STATUS_2[17] ,Interrupt status for bank 2 pin 17" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 16. " INT_STATUS_2[16] ,Interrupt status for bank 2 pin 16" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 15. " INT_STATUS_2[15] ,Interrupt status for bank 2 pin 15" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 14. " INT_STATUS_2[14] ,Interrupt status for bank 2 pin 14" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 13. " INT_STATUS_2[13] ,Interrupt status for bank 2 pin 13" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 12. " INT_STATUS_2[12] ,Interrupt status for bank 2 pin 12" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 11. " INT_STATUS_2[11] ,Interrupt status for bank 2 pin 11" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 10. " INT_STATUS_2[10] ,Interrupt status for bank 2 pin 10" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 9. " INT_STATUS_2[9] ,Interrupt status for bank 2 pin 9" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 8. " INT_STATUS_2[8] ,Interrupt status for bank 2 pin 8" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 7. " INT_STATUS_2[7] ,Interrupt status for bank 2 pin 7" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 6. " INT_STATUS_2[6] ,Interrupt status for bank 2 pin 6" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 5. " INT_STATUS_2[5] ,Interrupt status for bank 2 pin 5" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 4. " INT_STATUS_2[4] ,Interrupt status for bank 2 pin 4" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " INT_STATUS_2[3] ,Interrupt status for bank 2 pin 3" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 2. " INT_STATUS_2[2] ,Interrupt status for bank 2 pin 2" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " INT_STATUS_2[1] ,Interrupt status for bank 2 pin 1" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " INT_STATUS_2[0] ,Interrupt status for bank 2 pin 0" "No interrupt,Interrupt"
|
|
line.long 0x04 "INT_TYPE_2,Interrupt Type configuration register"
|
|
bitfld.long 0x04 31. " INT_TYPE_2[31] ,Interrupt type for bank 2 pin 31" "Level,Edge"
|
|
bitfld.long 0x04 30. " INT_TYPE_2[30] ,Interrupt type for bank 2 pin 30" "Level,Edge"
|
|
bitfld.long 0x04 29. " INT_TYPE_2[29] ,Interrupt type for bank 2 pin 29" "Level,Edge"
|
|
bitfld.long 0x04 28. " INT_TYPE_2[28] ,Interrupt type for bank 2 pin 28" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 27. " INT_TYPE_2[27] ,Interrupt type for bank 2 pin 27" "Level,Edge"
|
|
bitfld.long 0x04 26. " INT_TYPE_2[26] ,Interrupt type for bank 2 pin 26" "Level,Edge"
|
|
bitfld.long 0x04 25. " INT_TYPE_2[25] ,Interrupt type for bank 2 pin 25" "Level,Edge"
|
|
bitfld.long 0x04 24. " INT_TYPE_2[24] ,Interrupt type for bank 2 pin 24" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 23. " INT_TYPE_2[23] ,Interrupt type for bank 2 pin 23" "Level,Edge"
|
|
bitfld.long 0x04 22. " INT_TYPE_2[22] ,Interrupt type for bank 2 pin 22" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 21. " INT_TYPE_2[21] ,Interrupt type for bank 2 pin 21" "Level,Edge"
|
|
bitfld.long 0x04 20. " INT_TYPE_2[20] ,Interrupt type for bank 2 pin 20" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 19. " INT_TYPE_2[19] ,Interrupt type for bank 2 pin 19" "Level,Edge"
|
|
bitfld.long 0x04 18. " INT_TYPE_2[18] ,Interrupt type for bank 2 pin 18" "Level,Edge"
|
|
bitfld.long 0x04 17. " INT_TYPE_2[17] ,Interrupt type for bank 2 pin 17" "Level,Edge"
|
|
bitfld.long 0x04 16. " INT_TYPE_2[16] ,Interrupt type for bank 2 pin 16" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 15. " INT_TYPE_2[15] ,Interrupt type for bank 2 pin 15" "Level,Edge"
|
|
bitfld.long 0x04 14. " INT_TYPE_2[14] ,Interrupt type for bank 2 pin 14" "Level,Edge"
|
|
bitfld.long 0x04 13. " INT_TYPE_2[13] ,Interrupt type for bank 2 pin 13" "Level,Edge"
|
|
bitfld.long 0x04 12. " INT_TYPE_2[12] ,Interrupt type for bank 2 pin 12" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 11. " INT_TYPE_2[11] ,Interrupt type for bank 2 pin 11" "Level,Edge"
|
|
bitfld.long 0x04 10. " INT_TYPE_2[10] ,Interrupt type for bank 2 pin 10" "Level,Edge"
|
|
bitfld.long 0x04 9. " INT_TYPE_2[9] ,Interrupt type for bank 2 pin 9" "Level,Edge"
|
|
bitfld.long 0x04 8. " INT_TYPE_2[8] ,Interrupt type for bank 2 pin 8" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 7. " INT_TYPE_2[7] ,Interrupt type for bank 2 pin 7" "Level,Edge"
|
|
bitfld.long 0x04 6. " INT_TYPE_2[6] ,Interrupt type for bank 2 pin 6" "Level,Edge"
|
|
bitfld.long 0x04 5. " INT_TYPE_2[5] ,Interrupt type for bank 2 pin 5" "Level,Edge"
|
|
bitfld.long 0x04 4. " INT_TYPE_2[4] ,Interrupt type for bank 2 pin 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 3. " INT_TYPE_2[3] ,Interrupt type for bank 2 pin 3" "Level,Edge"
|
|
bitfld.long 0x04 2. " INT_TYPE_2[2] ,Interrupt type for bank 2 pin 2" "Level,Edge"
|
|
bitfld.long 0x04 1. " INT_TYPE_2[1] ,Interrupt type for bank 2 pin 1" "Level,Edge"
|
|
bitfld.long 0x04 0. " INT_TYPE_2[0] ,Interrupt type for bank 2 pin 0" "Level,Edge"
|
|
line.long 0x08 "INT_POLARITY_2,Interrupt polarity configuration register"
|
|
bitfld.long 0x08 31. " INT_POL_2[31] ,Interrupt polarity for bank 2 pin 31" "Low,High"
|
|
bitfld.long 0x08 30. " INT_POL_2[30] ,Interrupt polarity for bank 2 pin 30" "Low,High"
|
|
bitfld.long 0x08 29. " INT_POL_2[29] ,Interrupt polarity for bank 2 pin 29" "Low,High"
|
|
bitfld.long 0x08 28. " INT_POL_2[28] ,Interrupt polarity for bank 2 pin 28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 27. " INT_POL_2[27] ,Interrupt polarity for bank 2 pin 27" "Low,High"
|
|
bitfld.long 0x08 26. " INT_POL_2[26] ,Interrupt polarity for bank 2 pin 26" "Low,High"
|
|
bitfld.long 0x08 25. " INT_POL_2[25] ,Interrupt polarity for bank 2 pin 25" "Low,High"
|
|
bitfld.long 0x08 24. " INT_POL_2[24] ,Interrupt polarity for bank 2 pin 24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 23. " INT_POL_2[23] ,Interrupt polarity for bank 2 pin 23" "Low,High"
|
|
bitfld.long 0x08 22. " INT_POL_2[22] ,Interrupt polarity for bank 2 pin 22" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 21. " INT_POL_2[21] ,Interrupt polarity for bank 2 pin 21" "Low,High"
|
|
bitfld.long 0x08 20. " INT_POL_2[20] ,Interrupt polarity for bank 2 pin 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 19. " INT_POL_2[19] ,Interrupt polarity for bank 2 pin 19" "Low,High"
|
|
bitfld.long 0x08 18. " INT_POL_2[18] ,Interrupt polarity for bank 2 pin 18" "Low,High"
|
|
bitfld.long 0x08 17. " INT_POL_2[17] ,Interrupt polarity for bank 2 pin 17" "Low,High"
|
|
bitfld.long 0x08 16. " INT_POL_2[16] ,Interrupt polarity for bank 2 pin 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 15. " INT_POL_2[15] ,Interrupt polarity for bank 2 pin 15" "Low,High"
|
|
bitfld.long 0x08 14. " INT_POL_2[14] ,Interrupt polarity for bank 2 pin 14" "Low,High"
|
|
bitfld.long 0x08 13. " INT_POL_2[13] ,Interrupt polarity for bank 2 pin 13" "Low,High"
|
|
bitfld.long 0x08 12. " INT_POL_2[12] ,Interrupt polarity for bank 2 pin 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " INT_POL_2[11] ,Interrupt polarity for bank 2 pin 11" "Low,High"
|
|
bitfld.long 0x08 10. " INT_POL_2[10] ,Interrupt polarity for bank 2 pin 10" "Low,High"
|
|
bitfld.long 0x08 9. " INT_POL_2[9] ,Interrupt polarity for bank 2 pin 9" "Low,High"
|
|
bitfld.long 0x08 8. " INT_POL_2[8] ,Interrupt polarity for bank 2 pin 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 7. " INT_POL_2[7] ,Interrupt polarity for bank 2 pin 7" "Low,High"
|
|
bitfld.long 0x08 6. " INT_POL_2[6] ,Interrupt polarity for bank 2 pin 6" "Low,High"
|
|
bitfld.long 0x08 5. " INT_POL_2[5] ,Interrupt polarity for bank 2 pin 5" "Low,High"
|
|
bitfld.long 0x08 4. " INT_POL_2[4] ,Interrupt polarity for bank 2 pin 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 3. " INT_POL_2[3] ,Interrupt polarity for bank 2 pin 3" "Low,High"
|
|
bitfld.long 0x08 2. " INT_POL_2[2] ,Interrupt polarity for bank 2 pin 2" "Low,High"
|
|
bitfld.long 0x08 1. " INT_POL_2[1] ,Interrupt polarity for bank 2 pin 1" "Low,High"
|
|
bitfld.long 0x08 0. " INT_POL_2[0] ,Interrupt polarity for bank 2 pin 0" "Low,High"
|
|
line.long 0x0C "INT_ANY_2,Interrupt On Any configuration register"
|
|
bitfld.long 0x0C 31. " INT_ON_ANY_2[31] ,Interrupt edge triggering mode for bank 2 0 pin 31" "Single,Both"
|
|
bitfld.long 0x0C 30. " INT_ON_ANY_2[30] ,Interrupt edge triggering mode for bank 2 0 pin 30" "Single,Both"
|
|
bitfld.long 0x0C 29. " INT_ON_ANY_2[29] ,Interrupt edge triggering mode for bank 2 0 pin 29" "Single,Both"
|
|
bitfld.long 0x0C 28. " INT_ON_ANY_2[28] ,Interrupt edge triggering mode for bank 2 0 pin 28" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " INT_ON_ANY_2[27] ,Interrupt edge triggering mode for bank 2 0 pin 27" "Single,Both"
|
|
bitfld.long 0x0C 26. " INT_ON_ANY_2[26] ,Interrupt edge triggering mode for bank 2 0 pin 26" "Single,Both"
|
|
bitfld.long 0x0C 25. " INT_ON_ANY_2[25] ,Interrupt edge triggering mode for bank 2 0 pin 25" "Single,Both"
|
|
bitfld.long 0x0C 24. " INT_ON_ANY_2[24] ,Interrupt edge triggering mode for bank 2 0 pin 24" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 23. " INT_ON_ANY_2[23] ,Interrupt edge triggering mode for bank 2 0 pin 23" "Single,Both"
|
|
bitfld.long 0x0C 22. " INT_ON_ANY_2[22] ,Interrupt edge triggering mode for bank 2 0 pin 22" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 21. " INT_ON_ANY_2[21] ,Interrupt edge triggering mode for bank 2 0 pin 21" "Single,Both"
|
|
bitfld.long 0x0C 20. " INT_ON_ANY_2[20] ,Interrupt edge triggering mode for bank 2 0 pin 20" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " INT_ON_ANY_2[19] ,Interrupt edge triggering mode for bank 2 0 pin 19" "Single,Both"
|
|
bitfld.long 0x0C 18. " INT_ON_ANY_2[18] ,Interrupt edge triggering mode for bank 2 0 pin 18" "Single,Both"
|
|
bitfld.long 0x0C 17. " INT_ON_ANY_2[17] ,Interrupt edge triggering mode for bank 2 0 pin 17" "Single,Both"
|
|
bitfld.long 0x0C 16. " INT_ON_ANY_2[16] ,Interrupt edge triggering mode for bank 2 0 pin 16" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " INT_ON_ANY_2[15] ,Interrupt edge triggering mode for bank 2 0 pin 15" "Single,Both"
|
|
bitfld.long 0x0C 14. " INT_ON_ANY_2[14] ,Interrupt edge triggering mode for bank 2 0 pin 14" "Single,Both"
|
|
bitfld.long 0x0C 13. " INT_ON_ANY_2[13] ,Interrupt edge triggering mode for bank 2 0 pin 13" "Single,Both"
|
|
bitfld.long 0x0C 12. " INT_ON_ANY_2[12] ,Interrupt edge triggering mode for bank 2 0 pin 12" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " INT_ON_ANY_2[11] ,Interrupt edge triggering mode for bank 2 0 pin 11" "Single,Both"
|
|
bitfld.long 0x0C 10. " INT_ON_ANY_2[10] ,Interrupt edge triggering mode for bank 2 0 pin 10" "Single,Both"
|
|
bitfld.long 0x0C 9. " INT_ON_ANY_2[9] ,Interrupt edge triggering mode for bank 2 0 pin 9" "Single,Both"
|
|
bitfld.long 0x0C 8. " INT_ON_ANY_2[8] ,Interrupt edge triggering mode for bank 2 0 pin 8" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " INT_ON_ANY_2[7] ,Interrupt edge triggering mode for bank 2 0 pin 7" "Single,Both"
|
|
bitfld.long 0x0C 6. " INT_ON_ANY_2[6] ,Interrupt edge triggering mode for bank 2 0 pin 6" "Single,Both"
|
|
bitfld.long 0x0C 5. " INT_ON_ANY_2[5] ,Interrupt edge triggering mode for bank 2 0 pin 5" "Single,Both"
|
|
bitfld.long 0x0C 4. " INT_ON_ANY_2[4] ,Interrupt edge triggering mode for bank 2 0 pin 4" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " INT_ON_ANY_2[3] ,Interrupt edge triggering mode for bank 2 0 pin 3" "Single,Both"
|
|
bitfld.long 0x0C 2. " INT_ON_ANY_2[2] ,Interrupt edge triggering mode for bank 2 0 pin 2" "Single,Both"
|
|
bitfld.long 0x0C 1. " INT_ON_ANY_2[1] ,Interrupt edge triggering mode for bank 2 0 pin 1" "Single,Both"
|
|
bitfld.long 0x0C 0. " INT_ON_ANY_2[0] ,Interrupt edge triggering mode for bank 2 0 pin 0" "Single,Both"
|
|
tree.end
|
|
tree "GPIO Bank 3"
|
|
group.long (0x200+0xC0)++0x0B
|
|
line.long 0x00 "BYPM_3,Bypass configuration register"
|
|
bitfld.long 0x00 31. " BYPASS_MODE_3[31] ,Bypass configuration for bank 3 for pin 31" "Software,Bypass"
|
|
bitfld.long 0x00 30. " BYPASS_MODE_3[30] ,Bypass configuration for bank 3 for pin 30" "Software,Bypass"
|
|
bitfld.long 0x00 29. " BYPASS_MODE_3[29] ,Bypass configuration for bank 3 for pin 29" "Software,Bypass"
|
|
bitfld.long 0x00 28. " BYPASS_MODE_3[28] ,Bypass configuration for bank 3 for pin 28" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BYPASS_MODE_3[27] ,Bypass configuration for bank 3 for pin 27" "Software,Bypass"
|
|
bitfld.long 0x00 26. " BYPASS_MODE_3[26] ,Bypass configuration for bank 3 for pin 26" "Software,Bypass"
|
|
bitfld.long 0x00 25. " BYPASS_MODE_3[25] ,Bypass configuration for bank 3 for pin 25" "Software,Bypass"
|
|
bitfld.long 0x00 24. " BYPASS_MODE_3[24] ,Bypass configuration for bank 3 for pin 24" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BYPASS_MODE_3[23] ,Bypass configuration for bank 3 for pin 23" "Software,Bypass"
|
|
bitfld.long 0x00 22. " BYPASS_MODE_3[22] ,Bypass configuration for bank 3 for pin 22" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 21. " BYPASS_MODE_3[21] ,Bypass configuration for bank 3 for pin 21" "Software,Bypass"
|
|
bitfld.long 0x00 20. " BYPASS_MODE_3[20] ,Bypass configuration for bank 3 for pin 20" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BYPASS_MODE_3[19] ,Bypass configuration for bank 3 for pin 19" "Software,Bypass"
|
|
bitfld.long 0x00 18. " BYPASS_MODE_3[18] ,Bypass configuration for bank 3 for pin 18" "Software,Bypass"
|
|
bitfld.long 0x00 17. " BYPASS_MODE_3[17] ,Bypass configuration for bank 3 for pin 17" "Software,Bypass"
|
|
bitfld.long 0x00 16. " BYPASS_MODE_3[16] ,Bypass configuration for bank 3 for pin 16" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 15. " BYPASS_MODE_3[15] ,Bypass configuration for bank 3 for pin 15" "Software,Bypass"
|
|
bitfld.long 0x00 14. " BYPASS_MODE_3[14] ,Bypass configuration for bank 3 for pin 14" "Software,Bypass"
|
|
bitfld.long 0x00 13. " BYPASS_MODE_3[13] ,Bypass configuration for bank 3 for pin 13" "Software,Bypass"
|
|
bitfld.long 0x00 12. " BYPASS_MODE_3[12] ,Bypass configuration for bank 3 for pin 12" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BYPASS_MODE_3[11] ,Bypass configuration for bank 3 for pin 11" "Software,Bypass"
|
|
bitfld.long 0x00 10. " BYPASS_MODE_3[10] ,Bypass configuration for bank 3 for pin 10" "Software,Bypass"
|
|
bitfld.long 0x00 9. " BYPASS_MODE_3[9] ,Bypass configuration for bank 3 for pin 9" "Software,Bypass"
|
|
bitfld.long 0x00 8. " BYPASS_MODE_3[8] ,Bypass configuration for bank 3 for pin 8" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BYPASS_MODE_3[7] ,Bypass configuration for bank 3 for pin 7" "Software,Bypass"
|
|
bitfld.long 0x00 6. " BYPASS_MODE_3[6] ,Bypass configuration for bank 3 for pin 6" "Software,Bypass"
|
|
bitfld.long 0x00 5. " BYPASS_MODE_3[5] ,Bypass configuration for bank 3 for pin 5" "Software,Bypass"
|
|
bitfld.long 0x00 4. " BYPASS_MODE_3[4] ,Bypass configuration for bank 3 for pin 4" "Software,Bypass"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BYPASS_MODE_3[3] ,Bypass configuration for bank 3 for pin 3" "Software,Bypass"
|
|
bitfld.long 0x00 2. " BYPASS_MODE_3[2] ,Bypass configuration for bank 3 for pin 2" "Software,Bypass"
|
|
bitfld.long 0x00 1. " BYPASS_MODE_3[1] ,Bypass configuration for bank 3 for pin 1" "Software,Bypass"
|
|
bitfld.long 0x00 0. " BYPASS_MODE_3[0] ,Bypass configuration for bank 3 for pin 0" "Software,Bypass"
|
|
line.long 0x04 "DIRM_3,Direction mode configuration register"
|
|
bitfld.long 0x04 31. " DIRECTION_3[31] ,Direction mode for bank 3 pin 31" "Input,Output"
|
|
bitfld.long 0x04 30. " DIRECTION_3[30] ,Direction mode for bank 3 pin 30" "Input,Output"
|
|
bitfld.long 0x04 29. " DIRECTION_3[29] ,Direction mode for bank 3 pin 29" "Input,Output"
|
|
bitfld.long 0x04 28. " DIRECTION_3[28] ,Direction mode for bank 3 pin 28" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 27. " DIRECTION_3[27] ,Direction mode for bank 3 pin 27" "Input,Output"
|
|
bitfld.long 0x04 26. " DIRECTION_3[26] ,Direction mode for bank 3 pin 26" "Input,Output"
|
|
bitfld.long 0x04 25. " DIRECTION_3[25] ,Direction mode for bank 3 pin 25" "Input,Output"
|
|
bitfld.long 0x04 24. " DIRECTION_3[24] ,Direction mode for bank 3 pin 24" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 23. " DIRECTION_3[23] ,Direction mode for bank 3 pin 23" "Input,Output"
|
|
bitfld.long 0x04 22. " DIRECTION_3[22] ,Direction mode for bank 3 pin 22" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 21. " DIRECTION_3[21] ,Direction mode for bank 3 pin 21" "Input,Output"
|
|
bitfld.long 0x04 20. " DIRECTION_3[20] ,Direction mode for bank 3 pin 20" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 19. " DIRECTION_3[19] ,Direction mode for bank 3 pin 19" "Input,Output"
|
|
bitfld.long 0x04 18. " DIRECTION_3[18] ,Direction mode for bank 3 pin 18" "Input,Output"
|
|
bitfld.long 0x04 17. " DIRECTION_3[17] ,Direction mode for bank 3 pin 17" "Input,Output"
|
|
bitfld.long 0x04 16. " DIRECTION_3[16] ,Direction mode for bank 3 pin 16" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 15. " DIRECTION_3[15] ,Direction mode for bank 3 pin 15" "Input,Output"
|
|
bitfld.long 0x04 14. " DIRECTION_3[14] ,Direction mode for bank 3 pin 14" "Input,Output"
|
|
bitfld.long 0x04 13. " DIRECTION_3[13] ,Direction mode for bank 3 pin 13" "Input,Output"
|
|
bitfld.long 0x04 12. " DIRECTION_3[12] ,Direction mode for bank 3 pin 12" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 11. " DIRECTION_3[11] ,Direction mode for bank 3 pin 11" "Input,Output"
|
|
bitfld.long 0x04 10. " DIRECTION_3[10] ,Direction mode for bank 3 pin 10" "Input,Output"
|
|
bitfld.long 0x04 9. " DIRECTION_3[9] ,Direction mode for bank 3 pin 9" "Input,Output"
|
|
bitfld.long 0x04 8. " DIRECTION_3[8] ,Direction mode for bank 3 pin 8" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 7. " DIRECTION_3[7] ,Direction mode for bank 3 pin 7" "Input,Output"
|
|
bitfld.long 0x04 6. " DIRECTION_3[6] ,Direction mode for bank 3 pin 6" "Input,Output"
|
|
bitfld.long 0x04 5. " DIRECTION_3[5] ,Direction mode for bank 3 pin 5" "Input,Output"
|
|
bitfld.long 0x04 4. " DIRECTION_3[4] ,Direction mode for bank 3 pin 4" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 3. " DIRECTION_3[3] ,Direction mode for bank 3 pin 3" "Input,Output"
|
|
bitfld.long 0x04 2. " DIRECTION_3[2] ,Direction mode for bank 3 pin 2" "Input,Output"
|
|
bitfld.long 0x04 1. " DIRECTION_3[1] ,Direction mode for bank 3 pin 1" "Input,Output"
|
|
bitfld.long 0x04 0. " DIRECTION_3[0] ,Direction mode for bank 3 pin 0" "Input,Output"
|
|
line.long 0x08 "OEN_3,Output enable register"
|
|
bitfld.long 0x08 31. " OP_ENABLE_3[31] ,Output enable for bank 3 pin 31" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " OP_ENABLE_3[30] ,Output enable for bank 3 pin 30" "Disabled,Enabled"
|
|
bitfld.long 0x08 29. " OP_ENABLE_3[29] ,Output enable for bank 3 pin 29" "Disabled,Enabled"
|
|
bitfld.long 0x08 28. " OP_ENABLE_3[28] ,Output enable for bank 3 pin 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 27. " OP_ENABLE_3[27] ,Output enable for bank 3 pin 27" "Disabled,Enabled"
|
|
bitfld.long 0x08 26. " OP_ENABLE_3[26] ,Output enable for bank 3 pin 26" "Disabled,Enabled"
|
|
bitfld.long 0x08 25. " OP_ENABLE_3[25] ,Output enable for bank 3 pin 25" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " OP_ENABLE_3[24] ,Output enable for bank 3 pin 24" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 23. " OP_ENABLE_3[23] ,Output enable for bank 3 pin 23" "Disabled,Enabled"
|
|
bitfld.long 0x08 22. " OP_ENABLE_3[22] ,Output enable for bank 3 pin 22" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 21. " OP_ENABLE_3[21] ,Output enable for bank 3 pin 21" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " OP_ENABLE_3[20] ,Output enable for bank 3 pin 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " OP_ENABLE_3[19] ,Output enable for bank 3 pin 19" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " OP_ENABLE_3[18] ,Output enable for bank 3 pin 18" "Disabled,Enabled"
|
|
bitfld.long 0x08 17. " OP_ENABLE_3[17] ,Output enable for bank 3 pin 17" "Disabled,Enabled"
|
|
bitfld.long 0x08 16. " OP_ENABLE_3[16] ,Output enable for bank 3 pin 16" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 15. " OP_ENABLE_3[15] ,Output enable for bank 3 pin 15" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " OP_ENABLE_3[14] ,Output enable for bank 3 pin 14" "Disabled,Enabled"
|
|
bitfld.long 0x08 13. " OP_ENABLE_3[13] ,Output enable for bank 3 pin 13" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " OP_ENABLE_3[12] ,Output enable for bank 3 pin 12" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 11. " OP_ENABLE_3[11] ,Output enable for bank 3 pin 11" "Disabled,Enabled"
|
|
bitfld.long 0x08 10. " OP_ENABLE_3[10] ,Output enable for bank 3 pin 10" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " OP_ENABLE_3[9] ,Output enable for bank 3 pin 9" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " OP_ENABLE_3[8] ,Output enable for bank 3 pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " OP_ENABLE_3[7] ,Output enable for bank 3 pin 7" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " OP_ENABLE_3[6] ,Output enable for bank 3 pin 6" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " OP_ENABLE_3[5] ,Output enable for bank 3 pin 5" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " OP_ENABLE_3[4] ,Output enable for bank 3 pin 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " OP_ENABLE_3[3] ,Output enable for bank 3 pin 3" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " OP_ENABLE_3[2] ,Output enable for bank 3 pin 2" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " OP_ENABLE_3[1] ,Output enable for bank 3 pin 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " OP_ENABLE_3[0] ,Output enable for bank 3 pin 0" "Disabled,Enabled"
|
|
group.long (0x20C+0xC0)++0x03
|
|
line.long 0x00 "INT_MASK_3,Interrupt Mask status register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " INT_MASK_3[31]_set/clr ,Interrupt mask for bank 3 pin 31" "Not masked,Masked"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " INT_MASK_3[30]_set/clr ,Interrupt mask for bank 3 pin 30" "Not masked,Masked"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " INT_MASK_3[29]_set/clr ,Interrupt mask for bank 3 pin 29" "Not masked,Masked"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " INT_MASK_3[28]_set/clr ,Interrupt mask for bank 3 pin 28" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " INT_MASK_3[27]_set/clr ,Interrupt mask for bank 3 pin 27" "Not masked,Masked"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " INT_MASK_3[26]_set/clr ,Interrupt mask for bank 3 pin 26" "Not masked,Masked"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " INT_MASK_3[25]_set/clr ,Interrupt mask for bank 3 pin 25" "Not masked,Masked"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " INT_MASK_3[24]_set/clr ,Interrupt mask for bank 3 pin 24" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " INT_MASK_3[23]_set/clr ,Interrupt mask for bank 3 pin 23" "Not masked,Masked"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " INT_MASK_3[22]_set/clr ,Interrupt mask for bank 3 pin 22" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " INT_MASK_3[21]_set/clr ,Interrupt mask for bank 3 pin 21" "Not masked,Masked"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " INT_MASK_3[20]_set/clr ,Interrupt mask for bank 3 pin 20" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " INT_MASK_3[19]_set/clr ,Interrupt mask for bank 3 pin 19" "Not masked,Masked"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " INT_MASK_3[18]_set/clr ,Interrupt mask for bank 3 pin 18" "Not masked,Masked"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " INT_MASK_3[17]_set/clr ,Interrupt mask for bank 3 pin 17" "Not masked,Masked"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " INT_MASK_3[16]_set/clr ,Interrupt mask for bank 3 pin 16" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " INT_MASK_3[15]_set/clr ,Interrupt mask for bank 3 pin 15" "Not masked,Masked"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " INT_MASK_3[14]_set/clr ,Interrupt mask for bank 3 pin 14" "Not masked,Masked"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " INT_MASK_3[13]_set/clr ,Interrupt mask for bank 3 pin 13" "Not masked,Masked"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " INT_MASK_3[12]_set/clr ,Interrupt mask for bank 3 pin 12" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " INT_MASK_3[11]_set/clr ,Interrupt mask for bank 3 pin 11" "Not masked,Masked"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " INT_MASK_3[10]_set/clr ,Interrupt mask for bank 3 pin 10" "Not masked,Masked"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " INT_MASK_3[9]_set/clr ,Interrupt mask for bank 3 pin 9" "Not masked,Masked"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " INT_MASK_3[8]_set/clr ,Interrupt mask for bank 3 pin 8" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " INT_MASK_3[7]_set/clr ,Interrupt mask for bank 3 pin 7" "Not masked,Masked"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " INT_MASK_3[6]_set/clr ,Interrupt mask for bank 3 pin 6" "Not masked,Masked"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " INT_MASK_3[5]_set/clr ,Interrupt mask for bank 3 pin 5" "Not masked,Masked"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " INT_MASK_3[4]_set/clr ,Interrupt mask for bank 3 pin 4" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " INT_MASK_3[3]_set/clr ,Interrupt mask for bank 3 pin 3" "Not masked,Masked"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " INT_MASK_3[2]_set/clr ,Interrupt mask for bank 3 pin 2" "Not masked,Masked"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " INT_MASK_3[1]_set/clr ,Interrupt mask for bank 3 pin 1" "Not masked,Masked"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " INT_MASK_3[0]_set/clr ,Interrupt mask for bank 3 pin 0" "Not masked,Masked"
|
|
group.long (0x218+0xC0)++0x0F
|
|
line.long 0x00 "INT_STAT_3,Interrupt Status register"
|
|
eventfld.long 0x00 31. " INT_STATUS_3[31] ,Interrupt status for bank 3 pin 31" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 30. " INT_STATUS_3[30] ,Interrupt status for bank 3 pin 30" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 29. " INT_STATUS_3[29] ,Interrupt status for bank 3 pin 29" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 28. " INT_STATUS_3[28] ,Interrupt status for bank 3 pin 28" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 27. " INT_STATUS_3[27] ,Interrupt status for bank 3 pin 27" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 26. " INT_STATUS_3[26] ,Interrupt status for bank 3 pin 26" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 25. " INT_STATUS_3[25] ,Interrupt status for bank 3 pin 25" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 24. " INT_STATUS_3[24] ,Interrupt status for bank 3 pin 24" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 23. " INT_STATUS_3[23] ,Interrupt status for bank 3 pin 23" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 22. " INT_STATUS_3[22] ,Interrupt status for bank 3 pin 22" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 21. " INT_STATUS_3[21] ,Interrupt status for bank 3 pin 21" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 20. " INT_STATUS_3[20] ,Interrupt status for bank 3 pin 20" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 19. " INT_STATUS_3[19] ,Interrupt status for bank 3 pin 19" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 18. " INT_STATUS_3[18] ,Interrupt status for bank 3 pin 18" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 17. " INT_STATUS_3[17] ,Interrupt status for bank 3 pin 17" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 16. " INT_STATUS_3[16] ,Interrupt status for bank 3 pin 16" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 15. " INT_STATUS_3[15] ,Interrupt status for bank 3 pin 15" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 14. " INT_STATUS_3[14] ,Interrupt status for bank 3 pin 14" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 13. " INT_STATUS_3[13] ,Interrupt status for bank 3 pin 13" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 12. " INT_STATUS_3[12] ,Interrupt status for bank 3 pin 12" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 11. " INT_STATUS_3[11] ,Interrupt status for bank 3 pin 11" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 10. " INT_STATUS_3[10] ,Interrupt status for bank 3 pin 10" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 9. " INT_STATUS_3[9] ,Interrupt status for bank 3 pin 9" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 8. " INT_STATUS_3[8] ,Interrupt status for bank 3 pin 8" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 7. " INT_STATUS_3[7] ,Interrupt status for bank 3 pin 7" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 6. " INT_STATUS_3[6] ,Interrupt status for bank 3 pin 6" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 5. " INT_STATUS_3[5] ,Interrupt status for bank 3 pin 5" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 4. " INT_STATUS_3[4] ,Interrupt status for bank 3 pin 4" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " INT_STATUS_3[3] ,Interrupt status for bank 3 pin 3" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 2. " INT_STATUS_3[2] ,Interrupt status for bank 3 pin 2" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " INT_STATUS_3[1] ,Interrupt status for bank 3 pin 1" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " INT_STATUS_3[0] ,Interrupt status for bank 3 pin 0" "No interrupt,Interrupt"
|
|
line.long 0x04 "INT_TYPE_3,Interrupt Type configuration register"
|
|
bitfld.long 0x04 31. " INT_TYPE_3[31] ,Interrupt type for bank 3 pin 31" "Level,Edge"
|
|
bitfld.long 0x04 30. " INT_TYPE_3[30] ,Interrupt type for bank 3 pin 30" "Level,Edge"
|
|
bitfld.long 0x04 29. " INT_TYPE_3[29] ,Interrupt type for bank 3 pin 29" "Level,Edge"
|
|
bitfld.long 0x04 28. " INT_TYPE_3[28] ,Interrupt type for bank 3 pin 28" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 27. " INT_TYPE_3[27] ,Interrupt type for bank 3 pin 27" "Level,Edge"
|
|
bitfld.long 0x04 26. " INT_TYPE_3[26] ,Interrupt type for bank 3 pin 26" "Level,Edge"
|
|
bitfld.long 0x04 25. " INT_TYPE_3[25] ,Interrupt type for bank 3 pin 25" "Level,Edge"
|
|
bitfld.long 0x04 24. " INT_TYPE_3[24] ,Interrupt type for bank 3 pin 24" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 23. " INT_TYPE_3[23] ,Interrupt type for bank 3 pin 23" "Level,Edge"
|
|
bitfld.long 0x04 22. " INT_TYPE_3[22] ,Interrupt type for bank 3 pin 22" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 21. " INT_TYPE_3[21] ,Interrupt type for bank 3 pin 21" "Level,Edge"
|
|
bitfld.long 0x04 20. " INT_TYPE_3[20] ,Interrupt type for bank 3 pin 20" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 19. " INT_TYPE_3[19] ,Interrupt type for bank 3 pin 19" "Level,Edge"
|
|
bitfld.long 0x04 18. " INT_TYPE_3[18] ,Interrupt type for bank 3 pin 18" "Level,Edge"
|
|
bitfld.long 0x04 17. " INT_TYPE_3[17] ,Interrupt type for bank 3 pin 17" "Level,Edge"
|
|
bitfld.long 0x04 16. " INT_TYPE_3[16] ,Interrupt type for bank 3 pin 16" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 15. " INT_TYPE_3[15] ,Interrupt type for bank 3 pin 15" "Level,Edge"
|
|
bitfld.long 0x04 14. " INT_TYPE_3[14] ,Interrupt type for bank 3 pin 14" "Level,Edge"
|
|
bitfld.long 0x04 13. " INT_TYPE_3[13] ,Interrupt type for bank 3 pin 13" "Level,Edge"
|
|
bitfld.long 0x04 12. " INT_TYPE_3[12] ,Interrupt type for bank 3 pin 12" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 11. " INT_TYPE_3[11] ,Interrupt type for bank 3 pin 11" "Level,Edge"
|
|
bitfld.long 0x04 10. " INT_TYPE_3[10] ,Interrupt type for bank 3 pin 10" "Level,Edge"
|
|
bitfld.long 0x04 9. " INT_TYPE_3[9] ,Interrupt type for bank 3 pin 9" "Level,Edge"
|
|
bitfld.long 0x04 8. " INT_TYPE_3[8] ,Interrupt type for bank 3 pin 8" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 7. " INT_TYPE_3[7] ,Interrupt type for bank 3 pin 7" "Level,Edge"
|
|
bitfld.long 0x04 6. " INT_TYPE_3[6] ,Interrupt type for bank 3 pin 6" "Level,Edge"
|
|
bitfld.long 0x04 5. " INT_TYPE_3[5] ,Interrupt type for bank 3 pin 5" "Level,Edge"
|
|
bitfld.long 0x04 4. " INT_TYPE_3[4] ,Interrupt type for bank 3 pin 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x04 3. " INT_TYPE_3[3] ,Interrupt type for bank 3 pin 3" "Level,Edge"
|
|
bitfld.long 0x04 2. " INT_TYPE_3[2] ,Interrupt type for bank 3 pin 2" "Level,Edge"
|
|
bitfld.long 0x04 1. " INT_TYPE_3[1] ,Interrupt type for bank 3 pin 1" "Level,Edge"
|
|
bitfld.long 0x04 0. " INT_TYPE_3[0] ,Interrupt type for bank 3 pin 0" "Level,Edge"
|
|
line.long 0x08 "INT_POLARITY_3,Interrupt polarity configuration register"
|
|
bitfld.long 0x08 31. " INT_POL_3[31] ,Interrupt polarity for bank 3 pin 31" "Low,High"
|
|
bitfld.long 0x08 30. " INT_POL_3[30] ,Interrupt polarity for bank 3 pin 30" "Low,High"
|
|
bitfld.long 0x08 29. " INT_POL_3[29] ,Interrupt polarity for bank 3 pin 29" "Low,High"
|
|
bitfld.long 0x08 28. " INT_POL_3[28] ,Interrupt polarity for bank 3 pin 28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 27. " INT_POL_3[27] ,Interrupt polarity for bank 3 pin 27" "Low,High"
|
|
bitfld.long 0x08 26. " INT_POL_3[26] ,Interrupt polarity for bank 3 pin 26" "Low,High"
|
|
bitfld.long 0x08 25. " INT_POL_3[25] ,Interrupt polarity for bank 3 pin 25" "Low,High"
|
|
bitfld.long 0x08 24. " INT_POL_3[24] ,Interrupt polarity for bank 3 pin 24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 23. " INT_POL_3[23] ,Interrupt polarity for bank 3 pin 23" "Low,High"
|
|
bitfld.long 0x08 22. " INT_POL_3[22] ,Interrupt polarity for bank 3 pin 22" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 21. " INT_POL_3[21] ,Interrupt polarity for bank 3 pin 21" "Low,High"
|
|
bitfld.long 0x08 20. " INT_POL_3[20] ,Interrupt polarity for bank 3 pin 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 19. " INT_POL_3[19] ,Interrupt polarity for bank 3 pin 19" "Low,High"
|
|
bitfld.long 0x08 18. " INT_POL_3[18] ,Interrupt polarity for bank 3 pin 18" "Low,High"
|
|
bitfld.long 0x08 17. " INT_POL_3[17] ,Interrupt polarity for bank 3 pin 17" "Low,High"
|
|
bitfld.long 0x08 16. " INT_POL_3[16] ,Interrupt polarity for bank 3 pin 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 15. " INT_POL_3[15] ,Interrupt polarity for bank 3 pin 15" "Low,High"
|
|
bitfld.long 0x08 14. " INT_POL_3[14] ,Interrupt polarity for bank 3 pin 14" "Low,High"
|
|
bitfld.long 0x08 13. " INT_POL_3[13] ,Interrupt polarity for bank 3 pin 13" "Low,High"
|
|
bitfld.long 0x08 12. " INT_POL_3[12] ,Interrupt polarity for bank 3 pin 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " INT_POL_3[11] ,Interrupt polarity for bank 3 pin 11" "Low,High"
|
|
bitfld.long 0x08 10. " INT_POL_3[10] ,Interrupt polarity for bank 3 pin 10" "Low,High"
|
|
bitfld.long 0x08 9. " INT_POL_3[9] ,Interrupt polarity for bank 3 pin 9" "Low,High"
|
|
bitfld.long 0x08 8. " INT_POL_3[8] ,Interrupt polarity for bank 3 pin 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 7. " INT_POL_3[7] ,Interrupt polarity for bank 3 pin 7" "Low,High"
|
|
bitfld.long 0x08 6. " INT_POL_3[6] ,Interrupt polarity for bank 3 pin 6" "Low,High"
|
|
bitfld.long 0x08 5. " INT_POL_3[5] ,Interrupt polarity for bank 3 pin 5" "Low,High"
|
|
bitfld.long 0x08 4. " INT_POL_3[4] ,Interrupt polarity for bank 3 pin 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 3. " INT_POL_3[3] ,Interrupt polarity for bank 3 pin 3" "Low,High"
|
|
bitfld.long 0x08 2. " INT_POL_3[2] ,Interrupt polarity for bank 3 pin 2" "Low,High"
|
|
bitfld.long 0x08 1. " INT_POL_3[1] ,Interrupt polarity for bank 3 pin 1" "Low,High"
|
|
bitfld.long 0x08 0. " INT_POL_3[0] ,Interrupt polarity for bank 3 pin 0" "Low,High"
|
|
line.long 0x0C "INT_ANY_3,Interrupt On Any configuration register"
|
|
bitfld.long 0x0C 31. " INT_ON_ANY_3[31] ,Interrupt edge triggering mode for bank 3 0 pin 31" "Single,Both"
|
|
bitfld.long 0x0C 30. " INT_ON_ANY_3[30] ,Interrupt edge triggering mode for bank 3 0 pin 30" "Single,Both"
|
|
bitfld.long 0x0C 29. " INT_ON_ANY_3[29] ,Interrupt edge triggering mode for bank 3 0 pin 29" "Single,Both"
|
|
bitfld.long 0x0C 28. " INT_ON_ANY_3[28] ,Interrupt edge triggering mode for bank 3 0 pin 28" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " INT_ON_ANY_3[27] ,Interrupt edge triggering mode for bank 3 0 pin 27" "Single,Both"
|
|
bitfld.long 0x0C 26. " INT_ON_ANY_3[26] ,Interrupt edge triggering mode for bank 3 0 pin 26" "Single,Both"
|
|
bitfld.long 0x0C 25. " INT_ON_ANY_3[25] ,Interrupt edge triggering mode for bank 3 0 pin 25" "Single,Both"
|
|
bitfld.long 0x0C 24. " INT_ON_ANY_3[24] ,Interrupt edge triggering mode for bank 3 0 pin 24" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 23. " INT_ON_ANY_3[23] ,Interrupt edge triggering mode for bank 3 0 pin 23" "Single,Both"
|
|
bitfld.long 0x0C 22. " INT_ON_ANY_3[22] ,Interrupt edge triggering mode for bank 3 0 pin 22" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 21. " INT_ON_ANY_3[21] ,Interrupt edge triggering mode for bank 3 0 pin 21" "Single,Both"
|
|
bitfld.long 0x0C 20. " INT_ON_ANY_3[20] ,Interrupt edge triggering mode for bank 3 0 pin 20" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " INT_ON_ANY_3[19] ,Interrupt edge triggering mode for bank 3 0 pin 19" "Single,Both"
|
|
bitfld.long 0x0C 18. " INT_ON_ANY_3[18] ,Interrupt edge triggering mode for bank 3 0 pin 18" "Single,Both"
|
|
bitfld.long 0x0C 17. " INT_ON_ANY_3[17] ,Interrupt edge triggering mode for bank 3 0 pin 17" "Single,Both"
|
|
bitfld.long 0x0C 16. " INT_ON_ANY_3[16] ,Interrupt edge triggering mode for bank 3 0 pin 16" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " INT_ON_ANY_3[15] ,Interrupt edge triggering mode for bank 3 0 pin 15" "Single,Both"
|
|
bitfld.long 0x0C 14. " INT_ON_ANY_3[14] ,Interrupt edge triggering mode for bank 3 0 pin 14" "Single,Both"
|
|
bitfld.long 0x0C 13. " INT_ON_ANY_3[13] ,Interrupt edge triggering mode for bank 3 0 pin 13" "Single,Both"
|
|
bitfld.long 0x0C 12. " INT_ON_ANY_3[12] ,Interrupt edge triggering mode for bank 3 0 pin 12" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " INT_ON_ANY_3[11] ,Interrupt edge triggering mode for bank 3 0 pin 11" "Single,Both"
|
|
bitfld.long 0x0C 10. " INT_ON_ANY_3[10] ,Interrupt edge triggering mode for bank 3 0 pin 10" "Single,Both"
|
|
bitfld.long 0x0C 9. " INT_ON_ANY_3[9] ,Interrupt edge triggering mode for bank 3 0 pin 9" "Single,Both"
|
|
bitfld.long 0x0C 8. " INT_ON_ANY_3[8] ,Interrupt edge triggering mode for bank 3 0 pin 8" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " INT_ON_ANY_3[7] ,Interrupt edge triggering mode for bank 3 0 pin 7" "Single,Both"
|
|
bitfld.long 0x0C 6. " INT_ON_ANY_3[6] ,Interrupt edge triggering mode for bank 3 0 pin 6" "Single,Both"
|
|
bitfld.long 0x0C 5. " INT_ON_ANY_3[5] ,Interrupt edge triggering mode for bank 3 0 pin 5" "Single,Both"
|
|
bitfld.long 0x0C 4. " INT_ON_ANY_3[4] ,Interrupt edge triggering mode for bank 3 0 pin 4" "Single,Both"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " INT_ON_ANY_3[3] ,Interrupt edge triggering mode for bank 3 0 pin 3" "Single,Both"
|
|
bitfld.long 0x0C 2. " INT_ON_ANY_3[2] ,Interrupt edge triggering mode for bank 3 0 pin 2" "Single,Both"
|
|
bitfld.long 0x0C 1. " INT_ON_ANY_3[1] ,Interrupt edge triggering mode for bank 3 0 pin 1" "Single,Both"
|
|
bitfld.long 0x0C 0. " INT_ON_ANY_3[0] ,Interrupt edge triggering mode for bank 3 0 pin 0" "Single,Both"
|
|
tree.end
|
|
width 11.
|
|
tree.end
|
|
tree.open "QOS301 (Quality of Service)"
|
|
tree "GPV_QOS301_CPU"
|
|
base ad:0xF8946000
|
|
width 13.
|
|
group.long 0x10C++0x23
|
|
line.long 0x00 "QOS_CNTL,QoS control register"
|
|
bitfld.long 0x00 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled"
|
|
line.long 0x04 "MAX_OT,Maximum number of outstanding transactions"
|
|
bitfld.long 0x04 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.byte 0x04 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses"
|
|
bitfld.long 0x04 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.byte 0x04 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses"
|
|
line.long 0x08 "MAX_COMB_OT,Maximum number of combined outstanding transactions"
|
|
hexmask.long.byte 0x08 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses"
|
|
hexmask.long.byte 0x08 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses"
|
|
line.long 0x0C "AW_P,AW channel peak rate"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " AW_P ,Channel peak rate"
|
|
line.long 0x10 "AW_B,AW channel burstiness allowance"
|
|
hexmask.long.word 0x10 0.--15. 1. " AW_B ,Channel burstiness"
|
|
line.long 0x14 "AW_R,AW channel average rate"
|
|
hexmask.long.word 0x14 20.--31. 1. " AW_R ,Channel average rate"
|
|
line.long 0x18 "AR_P,AR channel peak rate"
|
|
hexmask.long.byte 0x18 24.--31. 1. " AR_P ,Channel peak rate"
|
|
line.long 0x1C "AR_B,AR channel burstiness allowance"
|
|
hexmask.long.word 0x1C 0.--15. 1. " AR_B ,Channel burstiness"
|
|
line.long 0x20 "AR_R,AR channel average rate"
|
|
hexmask.long.word 0x20 20.--31. 1. " AR_R ,Channel average rate"
|
|
width 11.
|
|
tree.end
|
|
tree "GPV_QOS301_DMAC"
|
|
base ad:0xF8947000
|
|
width 13.
|
|
group.long 0x10C++0x23
|
|
line.long 0x00 "QOS_CNTL,QoS control register"
|
|
bitfld.long 0x00 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled"
|
|
line.long 0x04 "MAX_OT,Maximum number of outstanding transactions"
|
|
bitfld.long 0x04 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.byte 0x04 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses"
|
|
bitfld.long 0x04 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.byte 0x04 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses"
|
|
line.long 0x08 "MAX_COMB_OT,Maximum number of combined outstanding transactions"
|
|
hexmask.long.byte 0x08 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses"
|
|
hexmask.long.byte 0x08 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses"
|
|
line.long 0x0C "AW_P,AW channel peak rate"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " AW_P ,Channel peak rate"
|
|
line.long 0x10 "AW_B,AW channel burstiness allowance"
|
|
hexmask.long.word 0x10 0.--15. 1. " AW_B ,Channel burstiness"
|
|
line.long 0x14 "AW_R,AW channel average rate"
|
|
hexmask.long.word 0x14 20.--31. 1. " AW_R ,Channel average rate"
|
|
line.long 0x18 "AR_P,AR channel peak rate"
|
|
hexmask.long.byte 0x18 24.--31. 1. " AR_P ,Channel peak rate"
|
|
line.long 0x1C "AR_B,AR channel burstiness allowance"
|
|
hexmask.long.word 0x1C 0.--15. 1. " AR_B ,Channel burstiness"
|
|
line.long 0x20 "AR_R,AR channel average rate"
|
|
hexmask.long.word 0x20 20.--31. 1. " AR_R ,Channel average rate"
|
|
width 11.
|
|
tree.end
|
|
tree "GPV_QOS301_IOU"
|
|
base ad:0xF8948000
|
|
width 13.
|
|
group.long 0x10C++0x23
|
|
line.long 0x00 "QOS_CNTL,QoS control register"
|
|
bitfld.long 0x00 7. " EN_AWAR_OT ,Enable combined regulation of outstanding transactions" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " EN_AR_OT ,Enable regulation of outstanding read transactions" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EN_AW_OT ,Enable regulation of outstanding write transactions" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " EN_AWAR_RATE ,Enable combined AW/AR rate regulation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EN_AR_RATE ,Enable AR rate regulation" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EN_AW_RATE ,Enable AW rate regulation" "Disabled,Enabled"
|
|
line.long 0x04 "MAX_OT,Maximum number of outstanding transactions"
|
|
bitfld.long 0x04 24.--29. " AR_MAX_OTI ,Integer part of max outstanding AR addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.byte 0x04 16.--23. 1. " AR_MAX_OTF ,Fraction part of max outstanding AR addresses"
|
|
bitfld.long 0x04 8.--13. " AW_MAX_OTI ,Integer part of max outstanding AW addresses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.byte 0x04 0.--7. 1. " AW_MAX_OTF ,Fraction part of max outstanding AW addresses"
|
|
line.long 0x08 "MAX_COMB_OT,Maximum number of combined outstanding transactions"
|
|
hexmask.long.byte 0x08 8.--14. 1. " AWAR_MAX_OTI ,Integer part of max combined outstanding AW/AR addresses"
|
|
hexmask.long.byte 0x08 0.--7. 1. " AWAR_MAX_OTF ,Fraction part of max combined outstanding AW/AR addresses"
|
|
line.long 0x0C "AW_P,AW channel peak rate"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " AW_P ,Channel peak rate"
|
|
line.long 0x10 "AW_B,AW channel burstiness allowance"
|
|
hexmask.long.word 0x10 0.--15. 1. " AW_B ,Channel burstiness"
|
|
line.long 0x14 "AW_R,AW channel average rate"
|
|
hexmask.long.word 0x14 20.--31. 1. " AW_R ,Channel average rate"
|
|
line.long 0x18 "AR_P,AR channel peak rate"
|
|
hexmask.long.byte 0x18 24.--31. 1. " AR_P ,Channel peak rate"
|
|
line.long 0x1C "AR_B,AR channel burstiness allowance"
|
|
hexmask.long.word 0x1C 0.--15. 1. " AR_B ,Channel burstiness"
|
|
line.long 0x20 "AR_R,AR channel average rate"
|
|
hexmask.long.word 0x20 20.--31. 1. " AR_R ,Channel average rate"
|
|
width 11.
|
|
tree.end
|
|
tree.end
|
|
tree.open "I2C (Inter Integrated Circuit)"
|
|
tree "I2C0"
|
|
base ad:0xE0004000
|
|
width 22.
|
|
if (((d.w(ad:0xE0004000))&0x2)==0x2)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "CONTROL_REG0,Control Register"
|
|
bitfld.word 0x00 14.--15. " DIVISOR_A ,Divisor for stage A clock divider" "/1,/2,/3,/4"
|
|
bitfld.word 0x00 8.--13. " DIVISOR_B ,Divisor for stage B clock divider" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,?..."
|
|
bitfld.word 0x00 6. " CLR_FIFO ,Clear fifo" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " SLVMON ,Slave monitor mode" "Normal,Monitor"
|
|
textline " "
|
|
bitfld.word 0x00 4. " HOLD ,Hold bus" "No hold,Hold"
|
|
bitfld.word 0x00 3. " ACKEN ,Acknowledge enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " NEA ,Addressing mode" "Extended,Normal"
|
|
bitfld.word 0x00 1. " MS ,Overall interface mode" "Slave,Master"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RW ,Direction of transfer" "Transmitter,Receiver"
|
|
else
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "CONTROL_REG0,Control Register"
|
|
bitfld.word 0x00 14.--15. " DIVISOR_A ,Divisor for stage A clock divider" "/1,/2,/3,/4"
|
|
bitfld.word 0x00 8.--13. " DIVISOR_B ,Divisor for stage B clock divider" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,?..."
|
|
bitfld.word 0x00 6. " CLR_FIFO ,Clear fifo" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " SLVMON ,Slave monitor mode" "Normal,Monitor"
|
|
textline " "
|
|
bitfld.word 0x00 4. " HOLD ,Hold bus" "No hold,Hold"
|
|
bitfld.word 0x00 3. " ACKEN ,Acknowledge enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " MS ,Overall interface mode" "Slave,Master"
|
|
endif
|
|
rgroup.word 0x04++0x01
|
|
line.word 0x00 "STATUS_REG0,Status register 0"
|
|
bitfld.word 0x00 8. " BA ,Bus Active" "Inactive,Active"
|
|
bitfld.word 0x00 7. " RXOVF ,Receiver Overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 6. " TXDV ,Transmit Data Valid" "Invalid,Valid"
|
|
bitfld.word 0x00 5. " RXDV ,Receiver Data Valid" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 3. " RXRW ,RX read write" "Disabled,Enabled"
|
|
if (((d.w(ad:0xE0004000))&0x04)==0x00)
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "I2C_ADDRESS_REG0,IIC Address register"
|
|
hexmask.word 0x00 0.--9. 1. " ADD ,Address"
|
|
else
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "I2C_ADDRESS_REG0,IIC Address register"
|
|
hexmask.word.byte 0x00 0.--6. 1. " ADD ,Address"
|
|
endif
|
|
group.word 0x0C++0x01
|
|
line.word 0x00 "I2C_DATA_REG0,IIC data register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DATA ,Data"
|
|
hgroup.word 0x10++0x01
|
|
hide.word 0x00 "INTERRUPT_STATUS_REG0,IIC interrupt status register"
|
|
in
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "TRANSFER_SIZE_REG0,Transfer Size Register"
|
|
bitfld.byte 0x00 0.--3. " TRANSFER_SIZE ,Transfer size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "SLAVE_MON_PAUSE_REG0,Slave Monitor Pause Register"
|
|
bitfld.byte 0x00 0.--3. " PAUSE ,Pause interval" "Paused,Paused,Paused,Paused,Paused,Paused,Paused,Paused,?..."
|
|
group.byte 0x1C++0x00
|
|
line.byte 0x00 "TIME_OUT_REG0,Time out register"
|
|
rgroup.word 0x20++0x01
|
|
line.word 0x00 "INTRPT_MASK_REG0,Interrupt mask register"
|
|
bitfld.word 0x00 9. " ARB_LOST ,Arbitration lost" "Not masked,Masked"
|
|
bitfld.word 0x00 7. " RX_UNF ,FIFO receive underflow" "Not masked,Masked"
|
|
bitfld.word 0x00 6. " TX_OVF ,FIFO transmit overflow" "Not masked,Masked"
|
|
bitfld.word 0x00 5. " RX_OVF ,Receive overflow" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x00 4. " SLV_RDY ,Monitored slave ready" "Not masked,Masked"
|
|
bitfld.word 0x00 3. " TO ,Transfer time out" "Not masked,Masked"
|
|
bitfld.word 0x00 2. " NACK ,Transfer not acknowledged" "Not masked,Masked"
|
|
bitfld.word 0x00 1. " DATA ,More data" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x00 0. " COMP ,Transfer complete" "Not masked,Masked"
|
|
wgroup.word 0x24++0x01
|
|
line.word 0x00 "INTRPT_ENABLE_REG0,Interrupt Enable register"
|
|
bitfld.word 0x00 9. " ARB_LOST ,Arbitration lost" "No effect,Enable"
|
|
bitfld.word 0x00 7. " RX_UNF ,FIFO receive underflow" "No effect,Enable"
|
|
bitfld.word 0x00 6. " TX_OVF ,FIFO transmit overflow" "No effect,Enable"
|
|
bitfld.word 0x00 5. " RX_OVF ,Receive overflow" "No effect,Enable"
|
|
textline " "
|
|
bitfld.word 0x00 4. " SLV_RDY ,Monitored slave ready" "No effect,Enable"
|
|
bitfld.word 0x00 3. " TO ,Transfer time out" "No effect,Enable"
|
|
bitfld.word 0x00 2. " NACK ,Transfer not acknowledged" "No effect,Enable"
|
|
bitfld.word 0x00 1. " DATA ,More data" "No effect,Enable"
|
|
textline " "
|
|
bitfld.word 0x00 0. " COMP ,Transfer complete" "No effect,Enable"
|
|
wgroup.word 0x28++0x01
|
|
line.word 0x00 "INTRPT_DISABLE_REG0,Interrupt Enable register"
|
|
bitfld.word 0x00 9. " ARB_LOST ,Arbitration lost" "No effect,Disable"
|
|
bitfld.word 0x00 7. " RX_UNF ,FIFO receive underflow" "No effect,Disable"
|
|
bitfld.word 0x00 6. " TX_OVF ,FIFO transmit overflow" "No effect,Disable"
|
|
bitfld.word 0x00 5. " RX_OVF ,Receive overflow" "No effect,Disable"
|
|
textline " "
|
|
bitfld.word 0x00 4. " SLV_RDY ,Monitored slave ready" "No effect,Disable"
|
|
bitfld.word 0x00 3. " TO ,Transfer time out" "No effect,Disable"
|
|
bitfld.word 0x00 2. " NACK ,Transfer not acknowledged" "No effect,Disable"
|
|
bitfld.word 0x00 1. " DATA ,More data" "No effect,Disable"
|
|
textline " "
|
|
bitfld.word 0x00 0. " COMP ,Transfer complete" "No effect,Disable"
|
|
width 11.
|
|
tree.end
|
|
tree "I2C0"
|
|
base ad:0xE0005000
|
|
width 22.
|
|
if (((d.w(ad:0xE0005000))&0x2)==0x2)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "CONTROL_REG0,Control Register"
|
|
bitfld.word 0x00 14.--15. " DIVISOR_A ,Divisor for stage A clock divider" "/1,/2,/3,/4"
|
|
bitfld.word 0x00 8.--13. " DIVISOR_B ,Divisor for stage B clock divider" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,?..."
|
|
bitfld.word 0x00 6. " CLR_FIFO ,Clear fifo" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " SLVMON ,Slave monitor mode" "Normal,Monitor"
|
|
textline " "
|
|
bitfld.word 0x00 4. " HOLD ,Hold bus" "No hold,Hold"
|
|
bitfld.word 0x00 3. " ACKEN ,Acknowledge enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " NEA ,Addressing mode" "Extended,Normal"
|
|
bitfld.word 0x00 1. " MS ,Overall interface mode" "Slave,Master"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RW ,Direction of transfer" "Transmitter,Receiver"
|
|
else
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "CONTROL_REG0,Control Register"
|
|
bitfld.word 0x00 14.--15. " DIVISOR_A ,Divisor for stage A clock divider" "/1,/2,/3,/4"
|
|
bitfld.word 0x00 8.--13. " DIVISOR_B ,Divisor for stage B clock divider" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,?..."
|
|
bitfld.word 0x00 6. " CLR_FIFO ,Clear fifo" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " SLVMON ,Slave monitor mode" "Normal,Monitor"
|
|
textline " "
|
|
bitfld.word 0x00 4. " HOLD ,Hold bus" "No hold,Hold"
|
|
bitfld.word 0x00 3. " ACKEN ,Acknowledge enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " MS ,Overall interface mode" "Slave,Master"
|
|
endif
|
|
rgroup.word 0x04++0x01
|
|
line.word 0x00 "STATUS_REG0,Status register 0"
|
|
bitfld.word 0x00 8. " BA ,Bus Active" "Inactive,Active"
|
|
bitfld.word 0x00 7. " RXOVF ,Receiver Overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 6. " TXDV ,Transmit Data Valid" "Invalid,Valid"
|
|
bitfld.word 0x00 5. " RXDV ,Receiver Data Valid" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.word 0x00 3. " RXRW ,RX read write" "Disabled,Enabled"
|
|
if (((d.w(ad:0xE0005000))&0x04)==0x00)
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "I2C_ADDRESS_REG0,IIC Address register"
|
|
hexmask.word 0x00 0.--9. 1. " ADD ,Address"
|
|
else
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "I2C_ADDRESS_REG0,IIC Address register"
|
|
hexmask.word.byte 0x00 0.--6. 1. " ADD ,Address"
|
|
endif
|
|
group.word 0x0C++0x01
|
|
line.word 0x00 "I2C_DATA_REG0,IIC data register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DATA ,Data"
|
|
hgroup.word 0x10++0x01
|
|
hide.word 0x00 "INTERRUPT_STATUS_REG0,IIC interrupt status register"
|
|
in
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "TRANSFER_SIZE_REG0,Transfer Size Register"
|
|
bitfld.byte 0x00 0.--3. " TRANSFER_SIZE ,Transfer size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "SLAVE_MON_PAUSE_REG0,Slave Monitor Pause Register"
|
|
bitfld.byte 0x00 0.--3. " PAUSE ,Pause interval" "Paused,Paused,Paused,Paused,Paused,Paused,Paused,Paused,?..."
|
|
group.byte 0x1C++0x00
|
|
line.byte 0x00 "TIME_OUT_REG0,Time out register"
|
|
rgroup.word 0x20++0x01
|
|
line.word 0x00 "INTRPT_MASK_REG0,Interrupt mask register"
|
|
bitfld.word 0x00 9. " ARB_LOST ,Arbitration lost" "Not masked,Masked"
|
|
bitfld.word 0x00 7. " RX_UNF ,FIFO receive underflow" "Not masked,Masked"
|
|
bitfld.word 0x00 6. " TX_OVF ,FIFO transmit overflow" "Not masked,Masked"
|
|
bitfld.word 0x00 5. " RX_OVF ,Receive overflow" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x00 4. " SLV_RDY ,Monitored slave ready" "Not masked,Masked"
|
|
bitfld.word 0x00 3. " TO ,Transfer time out" "Not masked,Masked"
|
|
bitfld.word 0x00 2. " NACK ,Transfer not acknowledged" "Not masked,Masked"
|
|
bitfld.word 0x00 1. " DATA ,More data" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x00 0. " COMP ,Transfer complete" "Not masked,Masked"
|
|
wgroup.word 0x24++0x01
|
|
line.word 0x00 "INTRPT_ENABLE_REG0,Interrupt Enable register"
|
|
bitfld.word 0x00 9. " ARB_LOST ,Arbitration lost" "No effect,Enable"
|
|
bitfld.word 0x00 7. " RX_UNF ,FIFO receive underflow" "No effect,Enable"
|
|
bitfld.word 0x00 6. " TX_OVF ,FIFO transmit overflow" "No effect,Enable"
|
|
bitfld.word 0x00 5. " RX_OVF ,Receive overflow" "No effect,Enable"
|
|
textline " "
|
|
bitfld.word 0x00 4. " SLV_RDY ,Monitored slave ready" "No effect,Enable"
|
|
bitfld.word 0x00 3. " TO ,Transfer time out" "No effect,Enable"
|
|
bitfld.word 0x00 2. " NACK ,Transfer not acknowledged" "No effect,Enable"
|
|
bitfld.word 0x00 1. " DATA ,More data" "No effect,Enable"
|
|
textline " "
|
|
bitfld.word 0x00 0. " COMP ,Transfer complete" "No effect,Enable"
|
|
wgroup.word 0x28++0x01
|
|
line.word 0x00 "INTRPT_DISABLE_REG0,Interrupt Enable register"
|
|
bitfld.word 0x00 9. " ARB_LOST ,Arbitration lost" "No effect,Disable"
|
|
bitfld.word 0x00 7. " RX_UNF ,FIFO receive underflow" "No effect,Disable"
|
|
bitfld.word 0x00 6. " TX_OVF ,FIFO transmit overflow" "No effect,Disable"
|
|
bitfld.word 0x00 5. " RX_OVF ,Receive overflow" "No effect,Disable"
|
|
textline " "
|
|
bitfld.word 0x00 4. " SLV_RDY ,Monitored slave ready" "No effect,Disable"
|
|
bitfld.word 0x00 3. " TO ,Transfer time out" "No effect,Disable"
|
|
bitfld.word 0x00 2. " NACK ,Transfer not acknowledged" "No effect,Disable"
|
|
bitfld.word 0x00 1. " DATA ,More data" "No effect,Disable"
|
|
textline " "
|
|
bitfld.word 0x00 0. " COMP ,Transfer complete" "No effect,Disable"
|
|
width 11.
|
|
tree.end
|
|
tree.end
|
|
tree "L2CPL310 (L2 Cache PL310)"
|
|
base ad:0xF8F02000
|
|
width 28.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "REG0_CACHE_ID,Cache ID register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer"
|
|
bitfld.long 0x00 10.--15. " CACHE_ID ,Cache id" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 6.--9. " PART_NUM ,Part number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--5. " RTL_RELEASE ,RTL release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "REG0_CACHE_TYPE,Cache type register"
|
|
bitfld.long 0x00 31. " DATA_BANKING ,Data banking" "Not implemented,Implemented"
|
|
bitfld.long 0x00 25.--28. " CTYPE ,Cache type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 24. " H ,Unified" "Low,High"
|
|
bitfld.long 0x00 23. " DSIZE_23 ,Fixed to 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20.--22. " DSIZE_MID ,L2 cache way size Read from Auxiliary Control Register 19 through 17" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 19. " DSIZE_19 ,Fixed to 0" "0,1"
|
|
bitfld.long 0x00 18. " L2_ASSOC_D ,Read from Auxiliary Control Register bit 16" "Low,High"
|
|
bitfld.long 0x00 12.--13. " L2CACHE_LINE_LEN_D ,L2 cache line length" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ISIZE_11 ,Fixed to 0" "0,1"
|
|
bitfld.long 0x00 8.--10. " ISIZE_MID ,L2 cache way size Read from Auxiliary Control Register[19:17]" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 7. " ISIZE_7 ,Fixed to 0" "0,1"
|
|
bitfld.long 0x00 6. " L2_ASSOC_I ,Read from Auxiliary Control Register bit 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " L2CACHE_LINE_LEN_I ,L2 cache line length" "0,1,2,3"
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "REG1_CONTROL,Control register"
|
|
bitfld.long 0x00 0. " L2_ENABLE ,L2 Cache enable" "Disabled,Enabled"
|
|
line.long 0x04 "REG1_AUX_CONTROL,Auxilary control register"
|
|
bitfld.long 0x04 30. " EARLY_BRESP_EN ,Early BRESP enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 29. " INSTR_PREFETCH_EN ,Instruction prefetch enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 28. " DATA_PREFETCH_EN ,Data prefetch enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 27. " NONSEC_INTE_ACCESS_CTRL ,Non-secure interrupt access control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 26. " NONSEC_LOCKDOWN_EN ,Non-secure lockdown enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 25. " CACHE_REPLACE_POLICY ,Cache replacement policy" "Pseudo-random,Round-robin"
|
|
bitfld.long 0x04 23.--24. " FORCE_WRITE_ALLOC ,Force write allocate" "AWCACHE,No allocate,Override AWCACHE,Mapped to 0"
|
|
bitfld.long 0x04 22. " SHARED_ATTR_OVERRIDE_EN ,Shared attribute override enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " PARITY_EN ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " EVENT_MON_BUS_EN ,Event monitor bus enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 17.--19. " WAY_SIZE ,Way-size" "Reserved,16KB,32KB,64KB,128KB,256KB,512KB,?..."
|
|
bitfld.long 0x04 16. " ASSOCIATIVITY ,Associativity" "8-way,16-way"
|
|
textline " "
|
|
bitfld.long 0x04 13. " SHARED_ATTR_INVA_EN ,Shared Attribute Invalidate" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " EX_CACHE_CONFIG ,Exclusive cache configuration" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " STORE_BUFF_DEV_LIM_EN ,Store buffer device limitation Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " HIGH_PR_SO_DEV_RD_EN ,High Priority for SO and Dev Reads Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " FULL_LINE_ZERO_ENABLE ,Full Line of Zero Enable" "Disabled,Enabled"
|
|
line.long 0x08 "REG1_TAG_RAM_CONTROL,Configures Tag RAM latencies"
|
|
bitfld.long 0x08 8.--10. " RAM_WR_ACCESS_LAT ,RAM write access latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
bitfld.long 0x08 4.--6. " RAM_RD_ACCESS_LAT ,RAM read access" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
bitfld.long 0x08 0.--2. " RAM_SETUP_LAT ,RAM setup latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
line.long 0x0C "REG1_DATA_RAM_CONTROL,Configures data RAM latencies"
|
|
bitfld.long 0x0C 8.--10. " RAM_WR_ACCESS_LAT ,RAM write access latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
bitfld.long 0x0C 4.--6. " RAM_RD_ACCESS_LAT ,RAM read access" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
bitfld.long 0x0C 0.--2. " RAM_SETUP_LAT ,RAM setup latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
group.long 0x200++0x17
|
|
line.long 0x00 "REG2_EV_COUNTER_CTRL,Event Counter Control Register"
|
|
bitfld.long 0x00 2. " COUNTER1_RESET ,Event Counter1 reset" "No reset,Reset"
|
|
bitfld.long 0x00 1. " COUNTER0_RESET ,Event Counter0 reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " EV_CTR_EN ,Event counter enable" "Disabled,Enabled"
|
|
line.long 0x04 "REG2_EV_COUNTER1_CFG,Event Counter 0 Configuration Register"
|
|
bitfld.long 0x04 2.--5. " CTR_EV_SRC ,Counter event source Event Encoding" "Disabled,CO,DRHIT,DRREQ,DWHIT,DWREQ,DWTREQ,IRHIT,IRREQ,WA,IPFALLOC,EPFHIT,EPFALLOC,SRRCVD,SRCONF,EPFRCVD"
|
|
bitfld.long 0x04 0.--1. " EV_CTR_INTR_GEN ,Event counter interrupt generation" "Disabled,Enabled/Increment,Enabled/Overflow,Disabled"
|
|
line.long 0x08 "REG2_EV_COUNTER0_CFG,Event Counter 0 Configuration Register"
|
|
bitfld.long 0x08 2.--5. " CTR_EV_SRC ,Counter event source Event Encoding" "Disabled,CO,DRHIT,DRREQ,DWHIT,DWREQ,DWTREQ,IRHIT,IRREQ,WA,IPFALLOC,EPFHIT,EPFALLOC,SRRCVD,SRCONF,EPFRCVD"
|
|
bitfld.long 0x08 0.--1. " EV_CTR_INTR_GEN ,Event counter interrupt generation" "Disabled,Enabled/Increment,Enabled/Overflow,Disabled"
|
|
line.long 0x0C "REG2_EV_COUNTER1,Event Counter 1 Register"
|
|
line.long 0x10 "REG2_EV_COUNTER0,Event Counter 0 Register"
|
|
line.long 0x14 "REG2_INT_MASK,Interrupt Mask Register"
|
|
bitfld.long 0x14 8. " DECERR ,DECERR from L3" "Masked,Not masked"
|
|
bitfld.long 0x14 7. " SLVERR ,SLVERR from L3" "Masked,Not masked"
|
|
bitfld.long 0x14 6. " ERRRD ,Error on L2 data RAM Read" "Masked,Not masked"
|
|
bitfld.long 0x14 5. " ERRRT ,Error on L2 tag RAM Read" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x14 4. " ERRWD ,Error on L2 data RAM Write" "Masked,Not masked"
|
|
bitfld.long 0x14 3. " ERRWT ,Error on L2 tag RAM Write" "Masked,Not masked"
|
|
bitfld.long 0x14 2. " PARRD ,Parity Error on L2 data RAM Read" "Masked,Not masked"
|
|
bitfld.long 0x14 1. " PARRT ,Parity Error on L2 tag RAM Read" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x14 0. " ECNTR ,Event Counter1/0 Overflow Increment" "Masked,Not masked"
|
|
rgroup.long 0x218++0x07
|
|
line.long 0x00 "REG2_INT_MASK_STATUS,Masked interrupt status"
|
|
bitfld.long 0x00 8. " DECERR ,DECERR from L3" "Low,High"
|
|
bitfld.long 0x00 7. " SLVERR ,SLVERR from L3" "Low,High"
|
|
bitfld.long 0x00 6. " ERRRD ,Error on L2 data RAM Read" "Low,High"
|
|
bitfld.long 0x00 5. " ERRRT ,Error on L2 tag RAM Read" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ERRWD ,Error on L2 data RAM Write" "Low,High"
|
|
bitfld.long 0x00 3. " ERRWT ,Error on L2 tag RAM Write" "Low,High"
|
|
bitfld.long 0x00 2. " PARRD ,Parity Error on L2 data RAM Read" "Low,High"
|
|
bitfld.long 0x00 1. " PARRT ,Parity Error on L2 tag RAM Read" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ECNTR ,Event Counter1/0 Overflow Increment" "Low,High"
|
|
line.long 0x04 "REG2_INT_RAW_STATUS,Interrupt Raw Status Register"
|
|
bitfld.long 0x04 8. " DECERR ,DECERR from L3" "Low,High"
|
|
bitfld.long 0x04 7. " SLVERR ,SLVERR from L3" "Low,High"
|
|
bitfld.long 0x04 6. " ERRRD ,Error on L2 data RAM Read" "Low,High"
|
|
bitfld.long 0x04 5. " ERRRT ,Error on L2 tag RAM Read" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 4. " ERRWD ,Error on L2 data RAM Write" "Low,High"
|
|
bitfld.long 0x04 3. " ERRWT ,Error on L2 tag RAM Write" "Low,High"
|
|
bitfld.long 0x04 2. " PARRD ,Parity Error on L2 data RAM Read" "Low,High"
|
|
bitfld.long 0x04 1. " PARRT ,Parity Error on L2 tag RAM Read" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 0. " ECNTR ,Event Counter1/0 Overflow Increment" "Low,High"
|
|
wgroup.long 0x220++0x03
|
|
line.long 0x00 "REG2_INT_CLEAR,Clears the Raw Interrupt Status Register"
|
|
bitfld.long 0x00 8. " DECERR ,DECERR from L3" "No effect,Clear"
|
|
bitfld.long 0x00 7. " SLVERR ,SLVERR from L3" "No effect,Clear"
|
|
bitfld.long 0x00 6. " ERRRD ,Error on L2 data RAM Read" "No effect,Clear"
|
|
bitfld.long 0x00 5. " ERRRT ,Error on L2 tag RAM Read" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ERRWD ,Error on L2 data RAM Write" "No effect,Clear"
|
|
bitfld.long 0x00 3. " ERRWT ,Error on L2 tag RAM Write" "No effect,Clear"
|
|
bitfld.long 0x00 2. " PARRD ,Parity Error on L2 data RAM Read" "No effect,Clear"
|
|
bitfld.long 0x00 1. " PARRT ,Parity Error on L2 tag RAM Read" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ECNTR ,Event Counter1/0 Overflow Increment" "No effect,Clear"
|
|
group.long 0x730++0x03
|
|
line.long 0x00 "REG7_CACHE_SYNC,Drain the STB"
|
|
bitfld.long 0x00 0. " C ,Cache sync" "Not drained,Drained"
|
|
group.long 0x770++0x03
|
|
line.long 0x00 "REG7_INV_PA,Invalidate Line by PA"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. " TAG ,Tag"
|
|
hexmask.long.byte 0x00 5.--11. 1. " INDEX ,Index"
|
|
bitfld.long 0x00 0. " C ,C" "Low,High"
|
|
group.long 0x77C++0x03
|
|
line.long 0x00 "REG7_INV_WAY,Invalidate by Way Invalidate all data in specified ways"
|
|
hexmask.long.word 0x00 0.--15. 1. " WAY_BITS ,Way bits"
|
|
group.long 0x7B0++0x03
|
|
line.long 0x00 "REG7_CLEAN_PA,Clean Line by PA"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. " TAG ,Tag"
|
|
hexmask.long.byte 0x00 5.--11. 1. " INDEX ,Index"
|
|
bitfld.long 0x00 0. " C ,C" "Low,High"
|
|
group.long 0x7B8++0x07
|
|
line.long 0x00 "REG7_CLEAN_INDEX,Clean Line by Set/Way Write the specific L2 cache line"
|
|
bitfld.long 0x00 28.--31. " WAY ,Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 5.--11. 1. " INDEX ,Index"
|
|
bitfld.long 0x00 0. " C ,C" "Low,High"
|
|
line.long 0x04 "REG7_CLEAN_WAY,Clean by Way Writes each line of the specified L2 cache ways"
|
|
hexmask.long.word 0x04 0.--15. 1. " WAY_BITS ,Way bits"
|
|
group.long 0x7F0++0x03
|
|
line.long 0x00 "REG7_CLEAN_INV_PA,Clean and Invalidate Line by PA Write the specific L2 cache line"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. " TAG ,Tag"
|
|
hexmask.long.byte 0x00 5.--11. 1. " INDEX ,Index"
|
|
bitfld.long 0x00 0. " C ,C" "Low,High"
|
|
group.long 0x7F8++0x07
|
|
line.long 0x00 "REG7_CLEAN_INV_INDEX,Clean and Invalidate Line by Set/Way Write the specific L2 cache line"
|
|
bitfld.long 0x00 28.--31. " WAY ,Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 5.--11. 1. " INDEX ,Index"
|
|
bitfld.long 0x00 0. " C ,C" "Low,High"
|
|
line.long 0x04 "REG7_CLEAN_INV_WAY,Clean and Invalidate by Way Writes each line of the specified L2 cache ways"
|
|
hexmask.long.word 0x04 0.--15. 1. " WAY_BITS ,Way bits"
|
|
group.long 0x900++0x3F
|
|
line.long 0x0 "REG9_D_LOCKDOWN0,Data lock down 0"
|
|
bitfld.long 0x0 15. " DATALOCK000[15] ,Cache data lockdown 15" "Allocation,No allocation"
|
|
bitfld.long 0x0 14. " DATALOCK000[14] ,Cache data lockdown 14" "Allocation,No allocation"
|
|
bitfld.long 0x0 13. " DATALOCK000[13] ,Cache data lockdown 13" "Allocation,No allocation"
|
|
bitfld.long 0x0 12. " DATALOCK000[12] ,Cache data lockdown 12" "Allocation,No allocation"
|
|
textline " "
|
|
bitfld.long 0x0 11. " DATALOCK000[11] ,Cache data lockdown 11" "Allocation,No allocation"
|
|
bitfld.long 0x0 10. " DATALOCK000[10] ,Cache data lockdown 10" "Allocation,No allocation"
|
|
bitfld.long 0x0 9. " DATALOCK000[9] ,Cache data lockdown 9" "Allocation,No allocation"
|
|
bitfld.long 0x0 8. " DATALOCK000[8] ,Cache data lockdown 8" "Allocation,No allocation"
|
|
textline " "
|
|
bitfld.long 0x0 7. " DATALOCK000[7] ,Cache data lockdown 7" "Allocation,No allocation"
|
|
bitfld.long 0x0 6. " DATALOCK000[6] ,Cache data lockdown 6" "Allocation,No allocation"
|
|
bitfld.long 0x0 5. " DATALOCK000[5] ,Cache data lockdown 5" "Allocation,No allocation"
|
|
bitfld.long 0x0 4. " DATALOCK000[4] ,Cache data lockdown 4" "Allocation,No allocation"
|
|
textline " "
|
|
bitfld.long 0x0 3. " DATALOCK000[3] ,Cache data lockdown 3" "Allocation,No allocation"
|
|
bitfld.long 0x0 2. " DATALOCK000[2] ,Cache data lockdown 2" "Allocation,No allocation"
|
|
bitfld.long 0x0 1. " DATALOCK000[1] ,Cache data lockdown 1" "Allocation,No allocation"
|
|
bitfld.long 0x0 0. " DATALOCK000[0] ,Cache data lockdown 0" "Allocation,No allocation"
|
|
line.long (0x0+0x04) "REG9_I_LOCKDOWN0,Instruction lock down 0"
|
|
bitfld.long (0x0+0x04) 15. " INSTRLOCK000[15] ,Cache instruction lockdown 15" "Low,High"
|
|
bitfld.long (0x0+0x04) 14. " INSTRLOCK000[14] ,Cache instruction lockdown 14" "Low,High"
|
|
bitfld.long (0x0+0x04) 13. " INSTRLOCK000[13] ,Cache instruction lockdown 13" "Low,High"
|
|
bitfld.long (0x0+0x04) 12. " INSTRLOCK000[12] ,Cache instruction lockdown 12" "Low,High"
|
|
textline " "
|
|
bitfld.long (0x0+0x04) 11. " INSTRLOCK000[11] ,Cache instruction lockdown 11" "Low,High"
|
|
bitfld.long (0x0+0x04) 10. " INSTRLOCK000[10] ,Cache instruction lockdown 10" "Low,High"
|
|
bitfld.long (0x0+0x04) 9. " INSTRLOCK000[9] ,Cache instruction lockdown 9" "Low,High"
|
|
bitfld.long (0x0+0x04) 8. " INSTRLOCK000[8] ,Cache instruction lockdown 8" "Low,High"
|
|
textline " "
|
|
bitfld.long (0x0+0x04) 7. " INSTRLOCK000[7] ,Cache instruction lockdown 7" "Low,High"
|
|
bitfld.long (0x0+0x04) 6. " INSTRLOCK000[6] ,Cache instruction lockdown 6" "Low,High"
|
|
bitfld.long (0x0+0x04) 5. " INSTRLOCK000[5] ,Cache instruction lockdown 5" "Low,High"
|
|
bitfld.long (0x0+0x04) 4. " INSTRLOCK000[4] ,Cache instruction lockdown 4" "Low,High"
|
|
textline " "
|
|
bitfld.long (0x0+0x04) 3. " INSTRLOCK000[3] ,Cache instruction lockdown 3" "Low,High"
|
|
bitfld.long (0x0+0x04) 2. " INSTRLOCK000[2] ,Cache instruction lockdown 2" "Low,High"
|
|
bitfld.long (0x0+0x04) 1. " INSTRLOCK000[1] ,Cache instruction lockdown 1" "Low,High"
|
|
bitfld.long (0x0+0x04) 0. " INSTRLOCK000[0] ,Cache instruction lockdown 0" "Low,High"
|
|
line.long 0x8 "REG9_D_LOCKDOWN1,Data lock down 1"
|
|
bitfld.long 0x8 15. " DATALOCK001[15] ,Cache data lockdown 15" "Allocation,No allocation"
|
|
bitfld.long 0x8 14. " DATALOCK001[14] ,Cache data lockdown 14" "Allocation,No allocation"
|
|
bitfld.long 0x8 13. " DATALOCK001[13] ,Cache data lockdown 13" "Allocation,No allocation"
|
|
bitfld.long 0x8 12. " DATALOCK001[12] ,Cache data lockdown 12" "Allocation,No allocation"
|
|
textline " "
|
|
bitfld.long 0x8 11. " DATALOCK001[11] ,Cache data lockdown 11" "Allocation,No allocation"
|
|
bitfld.long 0x8 10. " DATALOCK001[10] ,Cache data lockdown 10" "Allocation,No allocation"
|
|
bitfld.long 0x8 9. " DATALOCK001[9] ,Cache data lockdown 9" "Allocation,No allocation"
|
|
bitfld.long 0x8 8. " DATALOCK001[8] ,Cache data lockdown 8" "Allocation,No allocation"
|
|
textline " "
|
|
bitfld.long 0x8 7. " DATALOCK001[7] ,Cache data lockdown 7" "Allocation,No allocation"
|
|
bitfld.long 0x8 6. " DATALOCK001[6] ,Cache data lockdown 6" "Allocation,No allocation"
|
|
bitfld.long 0x8 5. " DATALOCK001[5] ,Cache data lockdown 5" "Allocation,No allocation"
|
|
bitfld.long 0x8 4. " DATALOCK001[4] ,Cache data lockdown 4" "Allocation,No allocation"
|
|
textline " "
|
|
bitfld.long 0x8 3. " DATALOCK001[3] ,Cache data lockdown 3" "Allocation,No allocation"
|
|
bitfld.long 0x8 2. " DATALOCK001[2] ,Cache data lockdown 2" "Allocation,No allocation"
|
|
bitfld.long 0x8 1. " DATALOCK001[1] ,Cache data lockdown 1" "Allocation,No allocation"
|
|
bitfld.long 0x8 0. " DATALOCK001[0] ,Cache data lockdown 0" "Allocation,No allocation"
|
|
line.long (0x8+0x04) "REG9_I_LOCKDOWN1,Instruction lock down 1"
|
|
bitfld.long (0x8+0x04) 15. " INSTRLOCK001[15] ,Cache instruction lockdown 15" "Low,High"
|
|
bitfld.long (0x8+0x04) 14. " INSTRLOCK001[14] ,Cache instruction lockdown 14" "Low,High"
|
|
bitfld.long (0x8+0x04) 13. " INSTRLOCK001[13] ,Cache instruction lockdown 13" "Low,High"
|
|
bitfld.long (0x8+0x04) 12. " INSTRLOCK001[12] ,Cache instruction lockdown 12" "Low,High"
|
|
textline " "
|
|
bitfld.long (0x8+0x04) 11. " INSTRLOCK001[11] ,Cache instruction lockdown 11" "Low,High"
|
|
bitfld.long (0x8+0x04) 10. " INSTRLOCK001[10] ,Cache instruction lockdown 10" "Low,High"
|
|
bitfld.long (0x8+0x04) 9. " INSTRLOCK001[9] ,Cache instruction lockdown 9" "Low,High"
|
|
bitfld.long (0x8+0x04) 8. " INSTRLOCK001[8] ,Cache instruction lockdown 8" "Low,High"
|
|
textline " "
|
|
bitfld.long (0x8+0x04) 7. " INSTRLOCK001[7] ,Cache instruction lockdown 7" "Low,High"
|
|
bitfld.long (0x8+0x04) 6. " INSTRLOCK001[6] ,Cache instruction lockdown 6" "Low,High"
|
|
bitfld.long (0x8+0x04) 5. " INSTRLOCK001[5] ,Cache instruction lockdown 5" "Low,High"
|
|
bitfld.long (0x8+0x04) 4. " INSTRLOCK001[4] ,Cache instruction lockdown 4" "Low,High"
|
|
textline " "
|
|
bitfld.long (0x8+0x04) 3. " INSTRLOCK001[3] ,Cache instruction lockdown 3" "Low,High"
|
|
bitfld.long (0x8+0x04) 2. " INSTRLOCK001[2] ,Cache instruction lockdown 2" "Low,High"
|
|
bitfld.long (0x8+0x04) 1. " INSTRLOCK001[1] ,Cache instruction lockdown 1" "Low,High"
|
|
bitfld.long (0x8+0x04) 0. " INSTRLOCK001[0] ,Cache instruction lockdown 0" "Low,High"
|
|
line.long 0x10 "REG9_D_LOCKDOWN2,Data lock down 2"
|
|
bitfld.long 0x10 15. " DATALOCK010[15] ,Cache data lockdown 15" "Allocation,No allocation"
|
|
bitfld.long 0x10 14. " DATALOCK010[14] ,Cache data lockdown 14" "Allocation,No allocation"
|
|
bitfld.long 0x10 13. " DATALOCK010[13] ,Cache data lockdown 13" "Allocation,No allocation"
|
|
bitfld.long 0x10 12. " DATALOCK010[12] ,Cache data lockdown 12" "Allocation,No allocation"
|
|
textline " "
|
|
bitfld.long 0x10 11. " DATALOCK010[11] ,Cache data lockdown 11" "Allocation,No allocation"
|
|
bitfld.long 0x10 10. " DATALOCK010[10] ,Cache data lockdown 10" "Allocation,No allocation"
|
|
bitfld.long 0x10 9. " DATALOCK010[9] ,Cache data lockdown 9" "Allocation,No allocation"
|
|
bitfld.long 0x10 8. " DATALOCK010[8] ,Cache data lockdown 8" "Allocation,No allocation"
|
|
textline " "
|
|
bitfld.long 0x10 7. " DATALOCK010[7] ,Cache data lockdown 7" "Allocation,No allocation"
|
|
bitfld.long 0x10 6. " DATALOCK010[6] ,Cache data lockdown 6" "Allocation,No allocation"
|
|
bitfld.long 0x10 5. " DATALOCK010[5] ,Cache data lockdown 5" "Allocation,No allocation"
|
|
bitfld.long 0x10 4. " DATALOCK010[4] ,Cache data lockdown 4" "Allocation,No allocation"
|
|
textline " "
|
|
bitfld.long 0x10 3. " DATALOCK010[3] ,Cache data lockdown 3" "Allocation,No allocation"
|
|
bitfld.long 0x10 2. " DATALOCK010[2] ,Cache data lockdown 2" "Allocation,No allocation"
|
|
bitfld.long 0x10 1. " DATALOCK010[1] ,Cache data lockdown 1" "Allocation,No allocation"
|
|
bitfld.long 0x10 0. " DATALOCK010[0] ,Cache data lockdown 0" "Allocation,No allocation"
|
|
line.long (0x10+0x04) "REG9_I_LOCKDOWN2,Instruction lock down 2"
|
|
bitfld.long (0x10+0x04) 15. " INSTRLOCK010[15] ,Cache instruction lockdown 15" "Low,High"
|
|
bitfld.long (0x10+0x04) 14. " INSTRLOCK010[14] ,Cache instruction lockdown 14" "Low,High"
|
|
bitfld.long (0x10+0x04) 13. " INSTRLOCK010[13] ,Cache instruction lockdown 13" "Low,High"
|
|
bitfld.long (0x10+0x04) 12. " INSTRLOCK010[12] ,Cache instruction lockdown 12" "Low,High"
|
|
textline " "
|
|
bitfld.long (0x10+0x04) 11. " INSTRLOCK010[11] ,Cache instruction lockdown 11" "Low,High"
|
|
bitfld.long (0x10+0x04) 10. " INSTRLOCK010[10] ,Cache instruction lockdown 10" "Low,High"
|
|
bitfld.long (0x10+0x04) 9. " INSTRLOCK010[9] ,Cache instruction lockdown 9" "Low,High"
|
|
bitfld.long (0x10+0x04) 8. " INSTRLOCK010[8] ,Cache instruction lockdown 8" "Low,High"
|
|
textline " "
|
|
bitfld.long (0x10+0x04) 7. " INSTRLOCK010[7] ,Cache instruction lockdown 7" "Low,High"
|
|
bitfld.long (0x10+0x04) 6. " INSTRLOCK010[6] ,Cache instruction lockdown 6" "Low,High"
|
|
bitfld.long (0x10+0x04) 5. " INSTRLOCK010[5] ,Cache instruction lockdown 5" "Low,High"
|
|
bitfld.long (0x10+0x04) 4. " INSTRLOCK010[4] ,Cache instruction lockdown 4" "Low,High"
|
|
textline " "
|
|
bitfld.long (0x10+0x04) 3. " INSTRLOCK010[3] ,Cache instruction lockdown 3" "Low,High"
|
|
bitfld.long (0x10+0x04) 2. " INSTRLOCK010[2] ,Cache instruction lockdown 2" "Low,High"
|
|
bitfld.long (0x10+0x04) 1. " INSTRLOCK010[1] ,Cache instruction lockdown 1" "Low,High"
|
|
bitfld.long (0x10+0x04) 0. " INSTRLOCK010[0] ,Cache instruction lockdown 0" "Low,High"
|
|
line.long 0x18 "REG9_D_LOCKDOWN3,Data lock down 3"
|
|
bitfld.long 0x18 15. " DATALOCK011[15] ,Cache data lockdown 15" "Allocation,No allocation"
|
|
bitfld.long 0x18 14. " DATALOCK011[14] ,Cache data lockdown 14" "Allocation,No allocation"
|
|
bitfld.long 0x18 13. " DATALOCK011[13] ,Cache data lockdown 13" "Allocation,No allocation"
|
|
bitfld.long 0x18 12. " DATALOCK011[12] ,Cache data lockdown 12" "Allocation,No allocation"
|
|
textline " "
|
|
bitfld.long 0x18 11. " DATALOCK011[11] ,Cache data lockdown 11" "Allocation,No allocation"
|
|
bitfld.long 0x18 10. " DATALOCK011[10] ,Cache data lockdown 10" "Allocation,No allocation"
|
|
bitfld.long 0x18 9. " DATALOCK011[9] ,Cache data lockdown 9" "Allocation,No allocation"
|
|
bitfld.long 0x18 8. " DATALOCK011[8] ,Cache data lockdown 8" "Allocation,No allocation"
|
|
textline " "
|
|
bitfld.long 0x18 7. " DATALOCK011[7] ,Cache data lockdown 7" "Allocation,No allocation"
|
|
bitfld.long 0x18 6. " DATALOCK011[6] ,Cache data lockdown 6" "Allocation,No allocation"
|
|
bitfld.long 0x18 5. " DATALOCK011[5] ,Cache data lockdown 5" "Allocation,No allocation"
|
|
bitfld.long 0x18 4. " DATALOCK011[4] ,Cache data lockdown 4" "Allocation,No allocation"
|
|
textline " "
|
|
bitfld.long 0x18 3. " DATALOCK011[3] ,Cache data lockdown 3" "Allocation,No allocation"
|
|
bitfld.long 0x18 2. " DATALOCK011[2] ,Cache data lockdown 2" "Allocation,No allocation"
|
|
bitfld.long 0x18 1. " DATALOCK011[1] ,Cache data lockdown 1" "Allocation,No allocation"
|
|
bitfld.long 0x18 0. " DATALOCK011[0] ,Cache data lockdown 0" "Allocation,No allocation"
|
|
line.long (0x18+0x04) "REG9_I_LOCKDOWN3,Instruction lock down 3"
|
|
bitfld.long (0x18+0x04) 15. " INSTRLOCK011[15] ,Cache instruction lockdown 15" "Low,High"
|
|
bitfld.long (0x18+0x04) 14. " INSTRLOCK011[14] ,Cache instruction lockdown 14" "Low,High"
|
|
bitfld.long (0x18+0x04) 13. " INSTRLOCK011[13] ,Cache instruction lockdown 13" "Low,High"
|
|
bitfld.long (0x18+0x04) 12. " INSTRLOCK011[12] ,Cache instruction lockdown 12" "Low,High"
|
|
textline " "
|
|
bitfld.long (0x18+0x04) 11. " INSTRLOCK011[11] ,Cache instruction lockdown 11" "Low,High"
|
|
bitfld.long (0x18+0x04) 10. " INSTRLOCK011[10] ,Cache instruction lockdown 10" "Low,High"
|
|
bitfld.long (0x18+0x04) 9. " INSTRLOCK011[9] ,Cache instruction lockdown 9" "Low,High"
|
|
bitfld.long (0x18+0x04) 8. " INSTRLOCK011[8] ,Cache instruction lockdown 8" "Low,High"
|
|
textline " "
|
|
bitfld.long (0x18+0x04) 7. " INSTRLOCK011[7] ,Cache instruction lockdown 7" "Low,High"
|
|
bitfld.long (0x18+0x04) 6. " INSTRLOCK011[6] ,Cache instruction lockdown 6" "Low,High"
|
|
bitfld.long (0x18+0x04) 5. " INSTRLOCK011[5] ,Cache instruction lockdown 5" "Low,High"
|
|
bitfld.long (0x18+0x04) 4. " INSTRLOCK011[4] ,Cache instruction lockdown 4" "Low,High"
|
|
textline " "
|
|
bitfld.long (0x18+0x04) 3. " INSTRLOCK011[3] ,Cache instruction lockdown 3" "Low,High"
|
|
bitfld.long (0x18+0x04) 2. " INSTRLOCK011[2] ,Cache instruction lockdown 2" "Low,High"
|
|
bitfld.long (0x18+0x04) 1. " INSTRLOCK011[1] ,Cache instruction lockdown 1" "Low,High"
|
|
bitfld.long (0x18+0x04) 0. " INSTRLOCK011[0] ,Cache instruction lockdown 0" "Low,High"
|
|
line.long 0x20 "REG9_D_LOCKDOWN4,Data lock down 4"
|
|
bitfld.long 0x20 15. " DATALOCK100[15] ,Cache data lockdown 15" "Allocation,No allocation"
|
|
bitfld.long 0x20 14. " DATALOCK100[14] ,Cache data lockdown 14" "Allocation,No allocation"
|
|
bitfld.long 0x20 13. " DATALOCK100[13] ,Cache data lockdown 13" "Allocation,No allocation"
|
|
bitfld.long 0x20 12. " DATALOCK100[12] ,Cache data lockdown 12" "Allocation,No allocation"
|
|
textline " "
|
|
bitfld.long 0x20 11. " DATALOCK100[11] ,Cache data lockdown 11" "Allocation,No allocation"
|
|
bitfld.long 0x20 10. " DATALOCK100[10] ,Cache data lockdown 10" "Allocation,No allocation"
|
|
bitfld.long 0x20 9. " DATALOCK100[9] ,Cache data lockdown 9" "Allocation,No allocation"
|
|
bitfld.long 0x20 8. " DATALOCK100[8] ,Cache data lockdown 8" "Allocation,No allocation"
|
|
textline " "
|
|
bitfld.long 0x20 7. " DATALOCK100[7] ,Cache data lockdown 7" "Allocation,No allocation"
|
|
bitfld.long 0x20 6. " DATALOCK100[6] ,Cache data lockdown 6" "Allocation,No allocation"
|
|
bitfld.long 0x20 5. " DATALOCK100[5] ,Cache data lockdown 5" "Allocation,No allocation"
|
|
bitfld.long 0x20 4. " DATALOCK100[4] ,Cache data lockdown 4" "Allocation,No allocation"
|
|
textline " "
|
|
bitfld.long 0x20 3. " DATALOCK100[3] ,Cache data lockdown 3" "Allocation,No allocation"
|
|
bitfld.long 0x20 2. " DATALOCK100[2] ,Cache data lockdown 2" "Allocation,No allocation"
|
|
bitfld.long 0x20 1. " DATALOCK100[1] ,Cache data lockdown 1" "Allocation,No allocation"
|
|
bitfld.long 0x20 0. " DATALOCK100[0] ,Cache data lockdown 0" "Allocation,No allocation"
|
|
line.long (0x20+0x04) "REG9_I_LOCKDOWN4,Instruction lock down 4"
|
|
bitfld.long (0x20+0x04) 15. " INSTRLOCK100[15] ,Cache instruction lockdown 15" "Low,High"
|
|
bitfld.long (0x20+0x04) 14. " INSTRLOCK100[14] ,Cache instruction lockdown 14" "Low,High"
|
|
bitfld.long (0x20+0x04) 13. " INSTRLOCK100[13] ,Cache instruction lockdown 13" "Low,High"
|
|
bitfld.long (0x20+0x04) 12. " INSTRLOCK100[12] ,Cache instruction lockdown 12" "Low,High"
|
|
textline " "
|
|
bitfld.long (0x20+0x04) 11. " INSTRLOCK100[11] ,Cache instruction lockdown 11" "Low,High"
|
|
bitfld.long (0x20+0x04) 10. " INSTRLOCK100[10] ,Cache instruction lockdown 10" "Low,High"
|
|
bitfld.long (0x20+0x04) 9. " INSTRLOCK100[9] ,Cache instruction lockdown 9" "Low,High"
|
|
bitfld.long (0x20+0x04) 8. " INSTRLOCK100[8] ,Cache instruction lockdown 8" "Low,High"
|
|
textline " "
|
|
bitfld.long (0x20+0x04) 7. " INSTRLOCK100[7] ,Cache instruction lockdown 7" "Low,High"
|
|
bitfld.long (0x20+0x04) 6. " INSTRLOCK100[6] ,Cache instruction lockdown 6" "Low,High"
|
|
bitfld.long (0x20+0x04) 5. " INSTRLOCK100[5] ,Cache instruction lockdown 5" "Low,High"
|
|
bitfld.long (0x20+0x04) 4. " INSTRLOCK100[4] ,Cache instruction lockdown 4" "Low,High"
|
|
textline " "
|
|
bitfld.long (0x20+0x04) 3. " INSTRLOCK100[3] ,Cache instruction lockdown 3" "Low,High"
|
|
bitfld.long (0x20+0x04) 2. " INSTRLOCK100[2] ,Cache instruction lockdown 2" "Low,High"
|
|
bitfld.long (0x20+0x04) 1. " INSTRLOCK100[1] ,Cache instruction lockdown 1" "Low,High"
|
|
bitfld.long (0x20+0x04) 0. " INSTRLOCK100[0] ,Cache instruction lockdown 0" "Low,High"
|
|
line.long 0x28 "REG9_D_LOCKDOWN5,Data lock down 5"
|
|
bitfld.long 0x28 15. " DATALOCK101[15] ,Cache data lockdown 15" "Allocation,No allocation"
|
|
bitfld.long 0x28 14. " DATALOCK101[14] ,Cache data lockdown 14" "Allocation,No allocation"
|
|
bitfld.long 0x28 13. " DATALOCK101[13] ,Cache data lockdown 13" "Allocation,No allocation"
|
|
bitfld.long 0x28 12. " DATALOCK101[12] ,Cache data lockdown 12" "Allocation,No allocation"
|
|
textline " "
|
|
bitfld.long 0x28 11. " DATALOCK101[11] ,Cache data lockdown 11" "Allocation,No allocation"
|
|
bitfld.long 0x28 10. " DATALOCK101[10] ,Cache data lockdown 10" "Allocation,No allocation"
|
|
bitfld.long 0x28 9. " DATALOCK101[9] ,Cache data lockdown 9" "Allocation,No allocation"
|
|
bitfld.long 0x28 8. " DATALOCK101[8] ,Cache data lockdown 8" "Allocation,No allocation"
|
|
textline " "
|
|
bitfld.long 0x28 7. " DATALOCK101[7] ,Cache data lockdown 7" "Allocation,No allocation"
|
|
bitfld.long 0x28 6. " DATALOCK101[6] ,Cache data lockdown 6" "Allocation,No allocation"
|
|
bitfld.long 0x28 5. " DATALOCK101[5] ,Cache data lockdown 5" "Allocation,No allocation"
|
|
bitfld.long 0x28 4. " DATALOCK101[4] ,Cache data lockdown 4" "Allocation,No allocation"
|
|
textline " "
|
|
bitfld.long 0x28 3. " DATALOCK101[3] ,Cache data lockdown 3" "Allocation,No allocation"
|
|
bitfld.long 0x28 2. " DATALOCK101[2] ,Cache data lockdown 2" "Allocation,No allocation"
|
|
bitfld.long 0x28 1. " DATALOCK101[1] ,Cache data lockdown 1" "Allocation,No allocation"
|
|
bitfld.long 0x28 0. " DATALOCK101[0] ,Cache data lockdown 0" "Allocation,No allocation"
|
|
line.long (0x28+0x04) "REG9_I_LOCKDOWN5,Instruction lock down 5"
|
|
bitfld.long (0x28+0x04) 15. " INSTRLOCK101[15] ,Cache instruction lockdown 15" "Low,High"
|
|
bitfld.long (0x28+0x04) 14. " INSTRLOCK101[14] ,Cache instruction lockdown 14" "Low,High"
|
|
bitfld.long (0x28+0x04) 13. " INSTRLOCK101[13] ,Cache instruction lockdown 13" "Low,High"
|
|
bitfld.long (0x28+0x04) 12. " INSTRLOCK101[12] ,Cache instruction lockdown 12" "Low,High"
|
|
textline " "
|
|
bitfld.long (0x28+0x04) 11. " INSTRLOCK101[11] ,Cache instruction lockdown 11" "Low,High"
|
|
bitfld.long (0x28+0x04) 10. " INSTRLOCK101[10] ,Cache instruction lockdown 10" "Low,High"
|
|
bitfld.long (0x28+0x04) 9. " INSTRLOCK101[9] ,Cache instruction lockdown 9" "Low,High"
|
|
bitfld.long (0x28+0x04) 8. " INSTRLOCK101[8] ,Cache instruction lockdown 8" "Low,High"
|
|
textline " "
|
|
bitfld.long (0x28+0x04) 7. " INSTRLOCK101[7] ,Cache instruction lockdown 7" "Low,High"
|
|
bitfld.long (0x28+0x04) 6. " INSTRLOCK101[6] ,Cache instruction lockdown 6" "Low,High"
|
|
bitfld.long (0x28+0x04) 5. " INSTRLOCK101[5] ,Cache instruction lockdown 5" "Low,High"
|
|
bitfld.long (0x28+0x04) 4. " INSTRLOCK101[4] ,Cache instruction lockdown 4" "Low,High"
|
|
textline " "
|
|
bitfld.long (0x28+0x04) 3. " INSTRLOCK101[3] ,Cache instruction lockdown 3" "Low,High"
|
|
bitfld.long (0x28+0x04) 2. " INSTRLOCK101[2] ,Cache instruction lockdown 2" "Low,High"
|
|
bitfld.long (0x28+0x04) 1. " INSTRLOCK101[1] ,Cache instruction lockdown 1" "Low,High"
|
|
bitfld.long (0x28+0x04) 0. " INSTRLOCK101[0] ,Cache instruction lockdown 0" "Low,High"
|
|
line.long 0x30 "REG9_D_LOCKDOWN6,Data lock down 6"
|
|
bitfld.long 0x30 15. " DATALOCK110[15] ,Cache data lockdown 15" "Allocation,No allocation"
|
|
bitfld.long 0x30 14. " DATALOCK110[14] ,Cache data lockdown 14" "Allocation,No allocation"
|
|
bitfld.long 0x30 13. " DATALOCK110[13] ,Cache data lockdown 13" "Allocation,No allocation"
|
|
bitfld.long 0x30 12. " DATALOCK110[12] ,Cache data lockdown 12" "Allocation,No allocation"
|
|
textline " "
|
|
bitfld.long 0x30 11. " DATALOCK110[11] ,Cache data lockdown 11" "Allocation,No allocation"
|
|
bitfld.long 0x30 10. " DATALOCK110[10] ,Cache data lockdown 10" "Allocation,No allocation"
|
|
bitfld.long 0x30 9. " DATALOCK110[9] ,Cache data lockdown 9" "Allocation,No allocation"
|
|
bitfld.long 0x30 8. " DATALOCK110[8] ,Cache data lockdown 8" "Allocation,No allocation"
|
|
textline " "
|
|
bitfld.long 0x30 7. " DATALOCK110[7] ,Cache data lockdown 7" "Allocation,No allocation"
|
|
bitfld.long 0x30 6. " DATALOCK110[6] ,Cache data lockdown 6" "Allocation,No allocation"
|
|
bitfld.long 0x30 5. " DATALOCK110[5] ,Cache data lockdown 5" "Allocation,No allocation"
|
|
bitfld.long 0x30 4. " DATALOCK110[4] ,Cache data lockdown 4" "Allocation,No allocation"
|
|
textline " "
|
|
bitfld.long 0x30 3. " DATALOCK110[3] ,Cache data lockdown 3" "Allocation,No allocation"
|
|
bitfld.long 0x30 2. " DATALOCK110[2] ,Cache data lockdown 2" "Allocation,No allocation"
|
|
bitfld.long 0x30 1. " DATALOCK110[1] ,Cache data lockdown 1" "Allocation,No allocation"
|
|
bitfld.long 0x30 0. " DATALOCK110[0] ,Cache data lockdown 0" "Allocation,No allocation"
|
|
line.long (0x30+0x04) "REG9_I_LOCKDOWN6,Instruction lock down 6"
|
|
bitfld.long (0x30+0x04) 15. " INSTRLOCK110[15] ,Cache instruction lockdown 15" "Low,High"
|
|
bitfld.long (0x30+0x04) 14. " INSTRLOCK110[14] ,Cache instruction lockdown 14" "Low,High"
|
|
bitfld.long (0x30+0x04) 13. " INSTRLOCK110[13] ,Cache instruction lockdown 13" "Low,High"
|
|
bitfld.long (0x30+0x04) 12. " INSTRLOCK110[12] ,Cache instruction lockdown 12" "Low,High"
|
|
textline " "
|
|
bitfld.long (0x30+0x04) 11. " INSTRLOCK110[11] ,Cache instruction lockdown 11" "Low,High"
|
|
bitfld.long (0x30+0x04) 10. " INSTRLOCK110[10] ,Cache instruction lockdown 10" "Low,High"
|
|
bitfld.long (0x30+0x04) 9. " INSTRLOCK110[9] ,Cache instruction lockdown 9" "Low,High"
|
|
bitfld.long (0x30+0x04) 8. " INSTRLOCK110[8] ,Cache instruction lockdown 8" "Low,High"
|
|
textline " "
|
|
bitfld.long (0x30+0x04) 7. " INSTRLOCK110[7] ,Cache instruction lockdown 7" "Low,High"
|
|
bitfld.long (0x30+0x04) 6. " INSTRLOCK110[6] ,Cache instruction lockdown 6" "Low,High"
|
|
bitfld.long (0x30+0x04) 5. " INSTRLOCK110[5] ,Cache instruction lockdown 5" "Low,High"
|
|
bitfld.long (0x30+0x04) 4. " INSTRLOCK110[4] ,Cache instruction lockdown 4" "Low,High"
|
|
textline " "
|
|
bitfld.long (0x30+0x04) 3. " INSTRLOCK110[3] ,Cache instruction lockdown 3" "Low,High"
|
|
bitfld.long (0x30+0x04) 2. " INSTRLOCK110[2] ,Cache instruction lockdown 2" "Low,High"
|
|
bitfld.long (0x30+0x04) 1. " INSTRLOCK110[1] ,Cache instruction lockdown 1" "Low,High"
|
|
bitfld.long (0x30+0x04) 0. " INSTRLOCK110[0] ,Cache instruction lockdown 0" "Low,High"
|
|
line.long 0x38 "REG9_D_LOCKDOWN7,Data lock down 7"
|
|
bitfld.long 0x38 15. " DATALOCK111[15] ,Cache data lockdown 15" "Allocation,No allocation"
|
|
bitfld.long 0x38 14. " DATALOCK111[14] ,Cache data lockdown 14" "Allocation,No allocation"
|
|
bitfld.long 0x38 13. " DATALOCK111[13] ,Cache data lockdown 13" "Allocation,No allocation"
|
|
bitfld.long 0x38 12. " DATALOCK111[12] ,Cache data lockdown 12" "Allocation,No allocation"
|
|
textline " "
|
|
bitfld.long 0x38 11. " DATALOCK111[11] ,Cache data lockdown 11" "Allocation,No allocation"
|
|
bitfld.long 0x38 10. " DATALOCK111[10] ,Cache data lockdown 10" "Allocation,No allocation"
|
|
bitfld.long 0x38 9. " DATALOCK111[9] ,Cache data lockdown 9" "Allocation,No allocation"
|
|
bitfld.long 0x38 8. " DATALOCK111[8] ,Cache data lockdown 8" "Allocation,No allocation"
|
|
textline " "
|
|
bitfld.long 0x38 7. " DATALOCK111[7] ,Cache data lockdown 7" "Allocation,No allocation"
|
|
bitfld.long 0x38 6. " DATALOCK111[6] ,Cache data lockdown 6" "Allocation,No allocation"
|
|
bitfld.long 0x38 5. " DATALOCK111[5] ,Cache data lockdown 5" "Allocation,No allocation"
|
|
bitfld.long 0x38 4. " DATALOCK111[4] ,Cache data lockdown 4" "Allocation,No allocation"
|
|
textline " "
|
|
bitfld.long 0x38 3. " DATALOCK111[3] ,Cache data lockdown 3" "Allocation,No allocation"
|
|
bitfld.long 0x38 2. " DATALOCK111[2] ,Cache data lockdown 2" "Allocation,No allocation"
|
|
bitfld.long 0x38 1. " DATALOCK111[1] ,Cache data lockdown 1" "Allocation,No allocation"
|
|
bitfld.long 0x38 0. " DATALOCK111[0] ,Cache data lockdown 0" "Allocation,No allocation"
|
|
line.long (0x38+0x04) "REG9_I_LOCKDOWN7,Instruction lock down 7"
|
|
bitfld.long (0x38+0x04) 15. " INSTRLOCK111[15] ,Cache instruction lockdown 15" "Low,High"
|
|
bitfld.long (0x38+0x04) 14. " INSTRLOCK111[14] ,Cache instruction lockdown 14" "Low,High"
|
|
bitfld.long (0x38+0x04) 13. " INSTRLOCK111[13] ,Cache instruction lockdown 13" "Low,High"
|
|
bitfld.long (0x38+0x04) 12. " INSTRLOCK111[12] ,Cache instruction lockdown 12" "Low,High"
|
|
textline " "
|
|
bitfld.long (0x38+0x04) 11. " INSTRLOCK111[11] ,Cache instruction lockdown 11" "Low,High"
|
|
bitfld.long (0x38+0x04) 10. " INSTRLOCK111[10] ,Cache instruction lockdown 10" "Low,High"
|
|
bitfld.long (0x38+0x04) 9. " INSTRLOCK111[9] ,Cache instruction lockdown 9" "Low,High"
|
|
bitfld.long (0x38+0x04) 8. " INSTRLOCK111[8] ,Cache instruction lockdown 8" "Low,High"
|
|
textline " "
|
|
bitfld.long (0x38+0x04) 7. " INSTRLOCK111[7] ,Cache instruction lockdown 7" "Low,High"
|
|
bitfld.long (0x38+0x04) 6. " INSTRLOCK111[6] ,Cache instruction lockdown 6" "Low,High"
|
|
bitfld.long (0x38+0x04) 5. " INSTRLOCK111[5] ,Cache instruction lockdown 5" "Low,High"
|
|
bitfld.long (0x38+0x04) 4. " INSTRLOCK111[4] ,Cache instruction lockdown 4" "Low,High"
|
|
textline " "
|
|
bitfld.long (0x38+0x04) 3. " INSTRLOCK111[3] ,Cache instruction lockdown 3" "Low,High"
|
|
bitfld.long (0x38+0x04) 2. " INSTRLOCK111[2] ,Cache instruction lockdown 2" "Low,High"
|
|
bitfld.long (0x38+0x04) 1. " INSTRLOCK111[1] ,Cache instruction lockdown 1" "Low,High"
|
|
bitfld.long (0x38+0x04) 0. " INSTRLOCK111[0] ,Cache instruction lockdown 0" "Low,High"
|
|
group.long 0x950++0x07
|
|
line.long 0x00 "REG9_LOCK_LINE_EN,Lockdown by Line Enable Register"
|
|
bitfld.long 0x00 0. " LOCK_DOWN_BY_LINE_ENABLE ,Lockdown by line enable" "Disabled,Enabled"
|
|
line.long 0x04 "REG9_UNLOCK_WAY,Cache lockdown by way"
|
|
bitfld.long 0x04 15. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[15] ,Unlock all lines by way operation" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[14] ,Unlock all lines by way operation" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[13] ,Unlock all lines by way operation" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[12] ,Unlock all lines by way operation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 11. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[11] ,Unlock all lines by way operation" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[10] ,Unlock all lines by way operation" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[9] ,Unlock all lines by way operation" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[8] ,Unlock all lines by way operation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[7] ,Unlock all lines by way operation" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[6] ,Unlock all lines by way operation" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[5] ,Unlock all lines by way operation" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[4] ,Unlock all lines by way operation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[3] ,Unlock all lines by way operation" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[2] ,Unlock all lines by way operation" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[1] ,Unlock all lines by way operation" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[0] ,Unlock all lines by way operation" "Disabled,Enabled"
|
|
group.long 0xC00++0x07
|
|
line.long 0x00 "REG12_ADDR_FILTERING_START,Address filtering start address register"
|
|
hexmask.long.word 0x00 20.--31. 0x10 " ADDR_FILTERING_START ,Address filtering start address"
|
|
bitfld.long 0x00 0. " ADDR_FILTERING_ENABLE ,Address filtering enable" "Disabled,Enabled"
|
|
line.long 0x04 "REG12_ADDR_FILTERING_START,Address filtering start address register"
|
|
hexmask.long.word 0x04 20.--31. 0x10 " ADDR_FILTERING_END ,Address filtering end address"
|
|
group.long 0xF40++0x03
|
|
line.long 0x00 "REG15_DEBUG_CTRL,The Debug Control Register"
|
|
bitfld.long 0x00 2. " SPNIDEN ,Reads value of SPNIDEN input" "Low,High"
|
|
bitfld.long 0x00 1. " DWB ,Disable write-back" "No,Yes"
|
|
bitfld.long 0x00 0. " DCL ,Disable cache linefill" "No,Yes"
|
|
group.long 0xF60++0x03
|
|
line.long 0x00 "REG15_PREFETCH_CTRL,Purpose Enables prefetch-related features that can improve system performance"
|
|
bitfld.long 0x00 30. " DOUBLE_LINEFILL_EN ,Double linefill enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " INST_PREF_EN ,Instruction prefetch enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " DATA_PREF_EN ,Data prefetch enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " DOUBLE_LINEFILL_ON_WRAPREAD_EN ,Double linefill on WRAP read disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 24. " PREF_DROP_EN ,Prefetch drop enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " INCR_DOUBLE_LINEFILL_EN ,Incr double Linefill enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " NOT_SAME_ID_ON_EXCL_SEQ_EN ,Not same ID on exclusive sequence enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " PREFETCH_OFFSET ,Prefetch offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0xF80++0x03
|
|
line.long 0x00 "REG15_POWER_CTRL,Purpose Controls the operating mode clock and power modes"
|
|
bitfld.long 0x00 1. " DYNAMIC_CLK_GATING_EN ,Dynamic clock gating enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " STANDBY_MODE_EN ,Standby mode enable" "Disabled,Enabled"
|
|
width 11.
|
|
tree.end
|
|
tree "MPCORE (Mpcore - SCU, Interrupt controller, Counters and Timers)"
|
|
base ad:0xF8F00000
|
|
width 46.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SCU_CONTROL_REGISTER,SCU Control Register"
|
|
bitfld.long 0x00 6. " IC_STANDBY_ENABLE ,IC standby enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SCU_STANDBY_ENABLE ,SCU standby enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " FORCE_ALL_DEVICE_TO_PORT0_ENABLE ,Force all Device to port 0 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SCU_SPECULATIVE_LINEFILLS_ENABLE ,SCU Speculative linefills enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SCU_RAMS_PARITY_ENABLE ,SCU RAM parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ADDRESS_FILTERING_ENABLE ,Addres filtering enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SCU_ENABLE ,SCU enabled" "Disabled,Enabled"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "SCU_CONFIGURATION_REGISTER,SCU Configuration Register"
|
|
bitfld.long 0x00 14.--15. " TAG_RAM_SIZE3 ,Cortex-A9 processor CPU3 tag RAM size" "16KB,32KB,64KB,?..."
|
|
bitfld.long 0x00 12.--13. " TAG_RAM_SIZE2 ,Cortex-A9 processor CPU2 tag RAM size" "16KB,32KB,64KB,?..."
|
|
bitfld.long 0x00 10.--11. " TAG_RAM_SIZE1 ,Cortex-A9 processor CPU1 tag RAM size" "16KB,32KB,64KB,?..."
|
|
bitfld.long 0x00 8.--9. " TAG_RAM_SIZE0 ,Cortex-A9 processor CPU0 tag RAM size" "16KB,32KB,64KB,?..."
|
|
textline " "
|
|
bitfld.long 0x00 7. " CPU3_SMP ,Shows the Cortex-A9 processors that are in Symmetric Multi-processing (SMP) or Asymmetric Multi-processing (AMP) mode" "AMP,SMP"
|
|
bitfld.long 0x00 6. " CPU2_SMP ,Shows the Cortex-A9 processors that are in Symmetric Multi-processing (SMP) or Asymmetric Multi-processing (AMP) mode" "AMP,SMP"
|
|
bitfld.long 0x00 5. " CPU1_SMP ,Shows the Cortex-A9 processors that are in Symmetric Multi-processing (SMP) or Asymmetric Multi-processing (AMP) mode" "AMP,SMP"
|
|
bitfld.long 0x00 4. " CPU0_SMP ,Shows the Cortex-A9 processors that are in Symmetric Multi-processing (SMP) or Asymmetric Multi-processing (AMP) mode" "AMP,SMP"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " CPU_NUMBER ,Number of CPUs present in the Cortex-A9 MPCore processor" "1,2,3,4"
|
|
group.long 0x08++0x07
|
|
line.long 0x00 "SCU_CPU_POWER_STATUS_REGISTER,SCU CPU Power Status Register"
|
|
bitfld.long 0x00 24.--25. " CPU3_status ,Power status of the Cortex-A9 processor" "Normal,Reserved,Dormant,Powered-off"
|
|
bitfld.long 0x00 16.--17. " CPU2_status ,Power status of the Cortex-A9 processor" "Normal,Reserved,Dormant,Powered-off"
|
|
bitfld.long 0x00 8.--9. " CPU1_status ,Power status of the Cortex-A9 processor" "Normal,Reserved,Dormant,Powered-off"
|
|
bitfld.long 0x00 0.--1. " CPU0_status ,Power status of the Cortex-A9 processor" "Normal,Reserved,Dormant,Powered-off"
|
|
line.long 0x04 "SCU_INVALIDATE_ALL_REGISTERS_IN_SECURE_STATE,SCU Invalidate All Registers in Secure State"
|
|
bitfld.long 0x04 12.--15. " CPU3_WAYS ,Specifies the ways that must be invalidated for CPU3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 8.--11. " CPU2_WAYS ,Specifies the ways that must be invalidated for CPU2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 4.--7. " CPU1_WAYS ,Specifies the ways that must be invalidated for CPU1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--3. " CPU0_WAYS ,Specifies the ways that must be invalidated for CPU0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x40++0x07
|
|
line.long 0x00 "FILTERING_START_ADDRESS_REGISTER,Filtering Start Address Register"
|
|
hexmask.long.word 0x00 20.--31. 0x10 " FILTERING_START_ADDRESS ,Start address for use with master port 1 in a two-master port configuration"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " SBZ ,SBZ"
|
|
line.long 0x04 "FILTERING_END_ADDRESS_REGISTER,Filtering End Address Register"
|
|
hexmask.long.word 0x04 20.--31. 0x10 " FILTERING_END_ADDRESS ,End address for use with master port 1 in a two-master port configuration"
|
|
hexmask.long.tbyte 0x04 0.--19. 1. " SBZ ,SBZ"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "SCU_ACCESS_CONTROL_REGISTER_SAC,SCU Access Control"
|
|
bitfld.long 0x00 3. " CPU3 ,CPU3 access" "Not accessed,Accessed"
|
|
bitfld.long 0x00 2. " CPU2 ,CPU2 access" "Not accessed,Accessed"
|
|
bitfld.long 0x00 1. " CPU1 ,CPU1 access" "Not accessed,Accessed"
|
|
bitfld.long 0x00 0. " CPU0 ,CPU0 access" "Not accessed,Accessed"
|
|
rgroup.long 0x54++0x03
|
|
line.long 0x00 "SCU_NON_SECURE_ACCESS_CONTROL_REGISTER,SCU Non-secure Access Control Register"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. " SBZ ,SBZ"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CPU3_GLOBAL_TIMER ,Non-secure access to the global timer for CPU3" "Secure only,Both"
|
|
bitfld.long 0x00 10. " CPU2_GLOBAL_TIMER ,Non-secure access to the global timer for CPU2" "Secure only,Both"
|
|
bitfld.long 0x00 9. " CPU1_GLOBAL_TIMER ,Non-secure access to the global timer for CPU1" "Secure only,Both"
|
|
bitfld.long 0x00 8. " CPU0_GLOBAL_TIMER ,Non-secure access to the global timer for CPU0" "Secure only,Both"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PRIVATE_TIMERS_FOR_CPU3 ,Non-secure access to the private timer and watchdog for CPU3" "Secure only,Both"
|
|
bitfld.long 0x00 6. " PRIVATE_TIMERS_FOR_CPU2 ,Non-secure access to the private timer and watchdog for CPU2" "Secure only,Both"
|
|
bitfld.long 0x00 5. " PRIVATE_TIMERS_FOR_CPU1 ,Non-secure access to the private timer and watchdog for CPU1" "Secure only,Both"
|
|
bitfld.long 0x00 4. " PRIVATE_TIMERS_FOR_CPU0 ,Non-secure access to the private timer and watchdog for CPU0" "Secure only,Both"
|
|
textline " "
|
|
bitfld.long 0x00 3. " COMPONENT_ACCESS_FOR_CPU3 ,Non-secure access to the components for CPU3" "Cannot write,Can write"
|
|
bitfld.long 0x00 2. " COMPONENT_ACCESS_FOR_CPU2 ,Non-secure access to the components for CPU2" "Cannot write,Can write"
|
|
bitfld.long 0x00 1. " COMPONENT_ACCESS_FOR_CPU1 ,Non-secure access to the components for CPU1" "Cannot write,Can write"
|
|
bitfld.long 0x00 0. " COMPONENT_ACCESS_FOR_CPU0 ,Non-secure access to the components for CPU0" "Cannot write,Can write"
|
|
group.long 0x100++0x1F
|
|
line.long 0x00 "ICCICR,CPU Interface Control Register"
|
|
line.long 0x04 "ICCPMR,Interrupt Priority Mask Register"
|
|
line.long 0x08 "ICCBPR,Binary Point Register"
|
|
line.long 0x0C "ICCIAR,Interrupt Acknowledge Register"
|
|
line.long 0x10 "ICCEOIR,End Of Interrupt Register"
|
|
line.long 0x14 "ICCRPR,Running Priority Register"
|
|
line.long 0x18 "ICCHPIR,Highest Pending Interrupt Register"
|
|
line.long 0x1C "ICCABPR,Aliased Non-secure Binary Point Register"
|
|
rgroup.long 0x1FC++0x03
|
|
line.long 0x00 "ICCIDR,CPU Interface Implementer Identification Register"
|
|
hexmask.long.word 0x00 20.--31. 1. " PART_NUMBER ,Identifies the peripheral"
|
|
bitfld.long 0x00 16.--19. " ARCHITECTURE_VERSION ,Identifies the architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " REVISION_NUMBER ,Returns the revision number of the Interrupt Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--11. 1. " IMPLEMENTER ,JEP106 code of the company that implemented the Cortex-A9 processor interface RTL"
|
|
group.long 0x200++0x1B
|
|
line.long 0x00 "GLOBAL_TIMER_COUNTER_REGISTER0,Global Timer Counter Register 0"
|
|
line.long 0x04 "GLOBAL_TIMER_COUNTER_REGISTER1,Global Timer Counter Register 1"
|
|
line.long 0x08 "GLOBAL_TIMER_CONTROL_REGISTER,Global Timer Control Register"
|
|
hexmask.long.byte 0x08 8.--15. 1. " PRESCALER ,Prescaler"
|
|
bitfld.long 0x08 3. " AUTO_INCREMENT ,Auto increment mode select" "Single shot,Auto increment"
|
|
bitfld.long 0x08 2. " IRQ_ENABLE ,IRQ enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " COMP_ENABLE ,Interrupt ID 27 pending in the Interrupt Distributor" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 0. " TIMER_ENABLE ,Timer enable" "Disabled,Enabled"
|
|
line.long 0x0C "GLOBAL_TIMER_INTERRUPT_STATUS_REGISTER,Global Timer Interrupt Status Register"
|
|
bitfld.long 0x0C 0. " EVENT_FLAG ,Event flag" "No event,Event"
|
|
line.long 0x10 "COMPARATOR_VALUE_REGISTER0,Comparator Value Register_0"
|
|
line.long 0x14 "COMPARATOR_VALUE_REGISTER1,Comparator Value Register_1"
|
|
line.long 0x18 "AUTO_INCREMENT_REGISTER,Auto-increment Register"
|
|
group.long 0x600++0x0F
|
|
line.long 0x00 "PRIVATE_TIMER_LOAD_REGISTER,Private Timer Load Register"
|
|
line.long 0x04 "PRIVATE_TIMER_COUNTER_REGISTER,Private Timer Counter Register"
|
|
line.long 0x08 "PRIVATE_TIMER_CONTROL_REGISTER,Private Timer Control Register"
|
|
hexmask.long.byte 0x08 8.--15. 1. " PRESCALER ,Prescaler"
|
|
bitfld.long 0x08 2. " IRQ_ENABLE ,IRQ enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " AUTO_RELOAD ,Auto reload" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 0. " TIMER_ENABLE ,Timer enable" "Disabled,Enabled"
|
|
line.long 0x0C "PRIVATE_TIMER_INTERRUPT_STATUS_REGISTER,Private Timer Interrupt Status Register"
|
|
eventfld.long 0x0C 0. " EVENT_FLAG ,Event flag" "No event,Event"
|
|
group.long 0x620++0x07
|
|
line.long 0x00 "WATCHDOG_LOAD_REGISTER,Watchdog Load Register"
|
|
line.long 0x04 "WATCHDOG_COUNTER_REGISTER,Watchdog Counter Register"
|
|
if (((d.l(ad:0xF8F00000+0x628))&0x8)==0x8)
|
|
group.long 0x628++0x03
|
|
line.long 0x00 "WATCHDOG_CONTROL_REGISTER,Watchdog Control Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PRESCALER ,Prescaler"
|
|
bitfld.long 0x00 3. " WATCHDOG_MODE ,Watchdog mode" "Timer,Watchdog"
|
|
bitfld.long 0x00 1. " AUTO_RELOAD ,Auto reload mode select" "Single shot,Auto reload"
|
|
textline " "
|
|
bitfld.long 0x00 0. " WATCHDOG_ENABLE ,Global watchdog enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x628++0x03
|
|
line.long 0x00 "WATCHDOG_CONTROL_REGISTER,Watchdog Control Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PRESCALER ,Prescaler"
|
|
bitfld.long 0x00 3. " WATCHDOG_MODE ,Watchdog mode" "Timer,Watchdog"
|
|
bitfld.long 0x00 2. " IT_ENABLE ,Interrupt ID 30 pending in the Interrupt Distributor" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " AUTO_RELOAD ,Auto reload mode select" "Single shot,Auto reload"
|
|
textline " "
|
|
bitfld.long 0x00 0. " WATCHDOG_ENABLE ,Global watchdog enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x62C++0x0B
|
|
line.long 0x00 "WATCHDOG_INTERRUPT_STATUS_REGISTER,Watchdog Interrupt Status Register"
|
|
eventfld.long 0x00 0. " EVENT_FLAG ,Event flag" "No event,Event"
|
|
line.long 0x04 "WATCHDOG_RESET_STATUS_REGISTER,Watchdog Reset Status Register"
|
|
eventfld.long 0x04 0. " RESET_FLAG ,Reset flag" "No reset,Reset"
|
|
line.long 0x08 "WATCHDOG_DISABLE_REGISTER,Watchdog Disable Register"
|
|
group.long 0x1000++0x03
|
|
line.long 0x00 "ICDDCR_FOR_SECURE_MODE,Distributor Control Register"
|
|
bitfld.long 0x00 1. " ENABLE_NON_SECURE ,Non-secure interrupts control enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ENABLE_SECURE ,Secure interrupts control enable" "Disabled,Enabled"
|
|
rgroup.long 0x1004++0x07
|
|
line.long 0x00 "ICDICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 11.--15. " LSPI ,Number of Lockable Shared Peripheral Interrupts (LSPIs) that the controller contains" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 10. " SECURITYEXTN ,Number of security domains that the controller contains" "Reserved,Two"
|
|
bitfld.long 0x00 5.--7. " CPU_NUMBER ,CPU number" "1,2,3,4,?..."
|
|
bitfld.long 0x00 0.--4. " IT_LINES_NUMBER ,IT Lines number (interrupts/external interrupt lines)" "32/No lines,64/32,96/64,128/96,160/128,192/160,224/192,256/224,?..."
|
|
line.long 0x04 "ICDIIDR,Distributor Implementer Identification"
|
|
hexmask.long.byte 0x04 24.--31. 1. " IMPLEMENTATION_VERSION ,Gives implementation version number"
|
|
hexmask.long.word 0x04 12.--23. 1. " REVISION_NUMBER ,Return the revision number of the controller"
|
|
hexmask.long.word 0x04 0.--11. 1. " IMPLEMENTER ,Implementer Number"
|
|
width 13.
|
|
group.long 0x1080++0x1F
|
|
line.long 0x0 "ICDISR0,Interrupt Security Register_0"
|
|
line.long 0x4 "ICDISR1,Interrupt Security Register_1"
|
|
line.long 0x8 "ICDISR2,Interrupt Security Register_2"
|
|
line.long 0xC "ICDISR3,Interrupt Security Register_3"
|
|
line.long 0x10 "ICDISR4,Interrupt Security Register_4"
|
|
line.long 0x14 "ICDISR5,Interrupt Security Register_5"
|
|
line.long 0x18 "ICDISR6,Interrupt Security Register_6"
|
|
line.long 0x1C "ICDISR7,Interrupt Security Register_7"
|
|
group.long 0x1100++0x1F
|
|
line.long 0x0 "ICDISER0,Interrupt Set-Enable Register_0"
|
|
line.long 0x4 "ICDISER1,Interrupt Set-Enable Register_1"
|
|
line.long 0x8 "ICDISER2,Interrupt Set-Enable Register_2"
|
|
line.long 0xC "ICDISER3,Interrupt Set-Enable Register_3"
|
|
line.long 0x10 "ICDISER4,Interrupt Set-Enable Register_4"
|
|
line.long 0x14 "ICDISER5,Interrupt Set-Enable Register_5"
|
|
line.long 0x18 "ICDISER6,Interrupt Set-Enable Register_6"
|
|
line.long 0x1C "ICDISER7,Interrupt Set-Enable Register_7"
|
|
group.long 0x1180++0x1F
|
|
line.long 0x0 "ICDICER0,Interrupt Clear-Enable Register_0"
|
|
line.long 0x4 "ICDICER1,Interrupt Clear-Enable Register_1"
|
|
line.long 0x8 "ICDICER2,Interrupt Clear-Enable Register_2"
|
|
line.long 0xC "ICDICER3,Interrupt Clear-Enable Register_3"
|
|
line.long 0x10 "ICDICER4,Interrupt Clear-Enable Register_4"
|
|
line.long 0x14 "ICDICER5,Interrupt Clear-Enable Register_5"
|
|
line.long 0x18 "ICDICER6,Interrupt Clear-Enable Register_6"
|
|
line.long 0x1C "ICDICER7,Interrupt Clear-Enable Register_7"
|
|
group.long 0x1200++0x9F
|
|
line.long 0x0 "ICDISPR0,Interrupt Set-Pending Register_0"
|
|
line.long 0x4 "ICDISPR1,Interrupt Set-Pending Register_1"
|
|
line.long 0x8 "ICDISPR2,Interrupt Set-Pending Register_2"
|
|
line.long 0xC "ICDISPR3,Interrupt Set-Pending Register_3"
|
|
line.long 0x10 "ICDISPR4,Interrupt Set-Pending Register_4"
|
|
line.long 0x14 "ICDISPR5,Interrupt Set-Pending Register_5"
|
|
line.long 0x18 "ICDISPR6,Interrupt Set-Pending Register_6"
|
|
line.long 0x1C "ICDISPR7,Interrupt Set-Pending Register_7"
|
|
line.long 0x20 "ICDISPR8,Interrupt Set-Pending Register_8"
|
|
line.long 0x24 "ICDISPR9,Interrupt Set-Pending Register_9"
|
|
line.long 0x28 "ICDISPR10,Interrupt Set-Pending Register_10"
|
|
line.long 0x2C "ICDISPR11,Interrupt Set-Pending Register_11"
|
|
line.long 0x30 "ICDISPR12,Interrupt Set-Pending Register_12"
|
|
line.long 0x34 "ICDISPR13,Interrupt Set-Pending Register_13"
|
|
line.long 0x38 "ICDISPR14,Interrupt Set-Pending Register_14"
|
|
line.long 0x3C "ICDISPR15,Interrupt Set-Pending Register_15"
|
|
line.long 0x40 "ICDISPR16,Interrupt Set-Pending Register_16"
|
|
line.long 0x44 "ICDISPR17,Interrupt Set-Pending Register_17"
|
|
line.long 0x48 "ICDISPR18,Interrupt Set-Pending Register_18"
|
|
line.long 0x4C "ICDISPR19,Interrupt Set-Pending Register_19"
|
|
line.long 0x50 "ICDISPR20,Interrupt Set-Pending Register_20"
|
|
line.long 0x54 "ICDISPR21,Interrupt Set-Pending Register_21"
|
|
line.long 0x58 "ICDISPR22,Interrupt Set-Pending Register_22"
|
|
line.long 0x5C "ICDISPR23,Interrupt Set-Pending Register_23"
|
|
line.long 0x60 "ICDISPR24,Interrupt Set-Pending Register_24"
|
|
line.long 0x64 "ICDISPR25,Interrupt Set-Pending Register_25"
|
|
line.long 0x68 "ICDISPR26,Interrupt Set-Pending Register_26"
|
|
line.long 0x6C "ICDISPR27,Interrupt Set-Pending Register_27"
|
|
line.long 0x70 "ICDISPR28,Interrupt Set-Pending Register_28"
|
|
line.long 0x74 "ICDISPR29,Interrupt Set-Pending Register_29"
|
|
line.long 0x78 "ICDISPR30,Interrupt Set-Pending Register_30"
|
|
line.long 0x7C "ICDISPR31,Interrupt Set-Pending Register_31"
|
|
line.long 0x80 "ICDICPR0,Interrupt Clear-Pending Register_0"
|
|
line.long 0x84 "ICDICPR1,Interrupt Clear-Pending Register_1"
|
|
line.long 0x88 "ICDICPR2,Interrupt Clear-Pending Register_2"
|
|
line.long 0x8C "ICDICPR3,Interrupt Clear-Pending Register_3"
|
|
line.long 0x90 "ICDICPR4,Interrupt Clear-Pending Register_4"
|
|
line.long 0x94 "ICDICPR5,Interrupt Clear-Pending Register_5"
|
|
line.long 0x98 "ICDICPR6,Interrupt Clear-Pending Register_6"
|
|
line.long 0x9C "ICDICPR7,Interrupt Clear-Pending Register_7"
|
|
group.long 0x1300++0x1F
|
|
line.long 0x0 "ICDABR0,Active Bit register_0"
|
|
line.long 0x4 "ICDABR1,Active Bit register_1"
|
|
line.long 0x8 "ICDABR2,Active Bit register_2"
|
|
line.long 0xC "ICDABR3,Active Bit register_3"
|
|
line.long 0x10 "ICDABR4,Active Bit register_4"
|
|
line.long 0x14 "ICDABR5,Active Bit register_5"
|
|
line.long 0x18 "ICDABR6,Active Bit register_6"
|
|
line.long 0x1C "ICDABR7,Active Bit register_7"
|
|
group.long 0x1400++0xFF
|
|
line.long 0x0 "ICDIPTR0,Interrupt Priority Register_0"
|
|
line.long 0x4 "ICDIPTR1,Interrupt Priority Register_1"
|
|
line.long 0x8 "ICDIPTR2,Interrupt Priority Register_2"
|
|
line.long 0xC "ICDIPTR3,Interrupt Priority Register_3"
|
|
line.long 0x10 "ICDIPTR4,Interrupt Priority Register_4"
|
|
line.long 0x14 "ICDIPTR5,Interrupt Priority Register_5"
|
|
line.long 0x18 "ICDIPTR6,Interrupt Priority Register_6"
|
|
line.long 0x1C "ICDIPTR7,Interrupt Priority Register_7"
|
|
line.long 0x20 "ICDIPTR8,Interrupt Priority Register_8"
|
|
line.long 0x24 "ICDIPTR9,Interrupt Priority Register_9"
|
|
line.long 0x28 "ICDIPTR10,Interrupt Priority Register_10"
|
|
line.long 0x2C "ICDIPTR11,Interrupt Priority Register_11"
|
|
line.long 0x30 "ICDIPTR12,Interrupt Priority Register_12"
|
|
line.long 0x34 "ICDIPTR13,Interrupt Priority Register_13"
|
|
line.long 0x38 "ICDIPTR14,Interrupt Priority Register_14"
|
|
line.long 0x3C "ICDIPTR15,Interrupt Priority Register_15"
|
|
line.long 0x40 "ICDIPTR16,Interrupt Priority Register_16"
|
|
line.long 0x44 "ICDIPTR17,Interrupt Priority Register_17"
|
|
line.long 0x48 "ICDIPTR18,Interrupt Priority Register_18"
|
|
line.long 0x4C "ICDIPTR19,Interrupt Priority Register_19"
|
|
line.long 0x50 "ICDIPTR20,Interrupt Priority Register_20"
|
|
line.long 0x54 "ICDIPTR21,Interrupt Priority Register_21"
|
|
line.long 0x58 "ICDIPTR22,Interrupt Priority Register_22"
|
|
line.long 0x5C "ICDIPTR23,Interrupt Priority Register_23"
|
|
line.long 0x60 "ICDIPTR24,Interrupt Priority Register_24"
|
|
line.long 0x64 "ICDIPTR25,Interrupt Priority Register_25"
|
|
line.long 0x68 "ICDIPTR26,Interrupt Priority Register_26"
|
|
line.long 0x6C "ICDIPTR27,Interrupt Priority Register_27"
|
|
line.long 0x70 "ICDIPTR28,Interrupt Priority Register_28"
|
|
line.long 0x74 "ICDIPTR29,Interrupt Priority Register_29"
|
|
line.long 0x78 "ICDIPTR30,Interrupt Priority Register_30"
|
|
line.long 0x7C "ICDIPTR31,Interrupt Priority Register_31"
|
|
line.long 0x80 "ICDIPTR32,Interrupt Priority Register_32"
|
|
line.long 0x84 "ICDIPTR33,Interrupt Priority Register_33"
|
|
line.long 0x88 "ICDIPTR34,Interrupt Priority Register_34"
|
|
line.long 0x8C "ICDIPTR35,Interrupt Priority Register_35"
|
|
line.long 0x90 "ICDIPTR36,Interrupt Priority Register_36"
|
|
line.long 0x94 "ICDIPTR37,Interrupt Priority Register_37"
|
|
line.long 0x98 "ICDIPTR38,Interrupt Priority Register_38"
|
|
line.long 0x9C "ICDIPTR39,Interrupt Priority Register_39"
|
|
line.long 0xA0 "ICDIPTR40,Interrupt Priority Register_40"
|
|
line.long 0xA4 "ICDIPTR41,Interrupt Priority Register_41"
|
|
line.long 0xA8 "ICDIPTR42,Interrupt Priority Register_42"
|
|
line.long 0xAC "ICDIPTR43,Interrupt Priority Register_43"
|
|
line.long 0xB0 "ICDIPTR44,Interrupt Priority Register_44"
|
|
line.long 0xB4 "ICDIPTR45,Interrupt Priority Register_45"
|
|
line.long 0xB8 "ICDIPTR46,Interrupt Priority Register_46"
|
|
line.long 0xBC "ICDIPTR47,Interrupt Priority Register_47"
|
|
line.long 0xC0 "ICDIPTR48,Interrupt Priority Register_48"
|
|
line.long 0xC4 "ICDIPTR49,Interrupt Priority Register_49"
|
|
line.long 0xC8 "ICDIPTR50,Interrupt Priority Register_50"
|
|
line.long 0xCC "ICDIPTR51,Interrupt Priority Register_51"
|
|
line.long 0xD0 "ICDIPTR52,Interrupt Priority Register_52"
|
|
line.long 0xD4 "ICDIPTR53,Interrupt Priority Register_53"
|
|
line.long 0xD8 "ICDIPTR54,Interrupt Priority Register_54"
|
|
line.long 0xDC "ICDIPTR55,Interrupt Priority Register_55"
|
|
line.long 0xE0 "ICDIPTR56,Interrupt Priority Register_56"
|
|
line.long 0xE4 "ICDIPTR57,Interrupt Priority Register_57"
|
|
line.long 0xE8 "ICDIPTR58,Interrupt Priority Register_58"
|
|
line.long 0xEC "ICDIPTR59,Interrupt Priority Register_59"
|
|
line.long 0xF0 "ICDIPTR60,Interrupt Priority Register_60"
|
|
line.long 0xF4 "ICDIPTR61,Interrupt Priority Register_61"
|
|
line.long 0xF8 "ICDIPTR62,Interrupt Priority Register_62"
|
|
line.long 0xFC "ICDIPTR63,Interrupt Priority Register_63"
|
|
group.long 0x1800++0xFF
|
|
line.long 0x0 "ICDIPTR_T0,Interrupt Processor Targets Register_0"
|
|
line.long 0x4 "ICDIPTR_T1,Interrupt Processor Targets Register_1"
|
|
line.long 0x8 "ICDIPTR_T2,Interrupt Processor Targets Register_2"
|
|
line.long 0xC "ICDIPTR_T3,Interrupt Processor Targets Register_3"
|
|
line.long 0x10 "ICDIPTR_T4,Interrupt Processor Targets Register_4"
|
|
line.long 0x14 "ICDIPTR_T5,Interrupt Processor Targets Register_5"
|
|
line.long 0x18 "ICDIPTR_T6,Interrupt Processor Targets Register_6"
|
|
line.long 0x1C "ICDIPTR_T7,Interrupt Processor Targets Register_7"
|
|
line.long 0x20 "ICDIPTR_T8,Interrupt Processor Targets Register_8"
|
|
line.long 0x24 "ICDIPTR_T9,Interrupt Processor Targets Register_9"
|
|
line.long 0x28 "ICDIPTR_T10,Interrupt Processor Targets Register_10"
|
|
line.long 0x2C "ICDIPTR_T11,Interrupt Processor Targets Register_11"
|
|
line.long 0x30 "ICDIPTR_T12,Interrupt Processor Targets Register_12"
|
|
line.long 0x34 "ICDIPTR_T13,Interrupt Processor Targets Register_13"
|
|
line.long 0x38 "ICDIPTR_T14,Interrupt Processor Targets Register_14"
|
|
line.long 0x3C "ICDIPTR_T15,Interrupt Processor Targets Register_15"
|
|
line.long 0x40 "ICDIPTR_T16,Interrupt Processor Targets Register_16"
|
|
line.long 0x44 "ICDIPTR_T17,Interrupt Processor Targets Register_17"
|
|
line.long 0x48 "ICDIPTR_T18,Interrupt Processor Targets Register_18"
|
|
line.long 0x4C "ICDIPTR_T19,Interrupt Processor Targets Register_19"
|
|
line.long 0x50 "ICDIPTR_T20,Interrupt Processor Targets Register_20"
|
|
line.long 0x54 "ICDIPTR_T21,Interrupt Processor Targets Register_21"
|
|
line.long 0x58 "ICDIPTR_T22,Interrupt Processor Targets Register_22"
|
|
line.long 0x5C "ICDIPTR_T23,Interrupt Processor Targets Register_23"
|
|
line.long 0x60 "ICDIPTR_T24,Interrupt Processor Targets Register_24"
|
|
line.long 0x64 "ICDIPTR_T25,Interrupt Processor Targets Register_25"
|
|
line.long 0x68 "ICDIPTR_T26,Interrupt Processor Targets Register_26"
|
|
line.long 0x6C "ICDIPTR_T27,Interrupt Processor Targets Register_27"
|
|
line.long 0x70 "ICDIPTR_T28,Interrupt Processor Targets Register_28"
|
|
line.long 0x74 "ICDIPTR_T29,Interrupt Processor Targets Register_29"
|
|
line.long 0x78 "ICDIPTR_T30,Interrupt Processor Targets Register_30"
|
|
line.long 0x7C "ICDIPTR_T31,Interrupt Processor Targets Register_31"
|
|
line.long 0x80 "ICDIPTR_T32,Interrupt Processor Targets Register_32"
|
|
line.long 0x84 "ICDIPTR_T33,Interrupt Processor Targets Register_33"
|
|
line.long 0x88 "ICDIPTR_T34,Interrupt Processor Targets Register_34"
|
|
line.long 0x8C "ICDIPTR_T35,Interrupt Processor Targets Register_35"
|
|
line.long 0x90 "ICDIPTR_T36,Interrupt Processor Targets Register_36"
|
|
line.long 0x94 "ICDIPTR_T37,Interrupt Processor Targets Register_37"
|
|
line.long 0x98 "ICDIPTR_T38,Interrupt Processor Targets Register_38"
|
|
line.long 0x9C "ICDIPTR_T39,Interrupt Processor Targets Register_39"
|
|
line.long 0xA0 "ICDIPTR_T40,Interrupt Processor Targets Register_40"
|
|
line.long 0xA4 "ICDIPTR_T41,Interrupt Processor Targets Register_41"
|
|
line.long 0xA8 "ICDIPTR_T42,Interrupt Processor Targets Register_42"
|
|
line.long 0xAC "ICDIPTR_T43,Interrupt Processor Targets Register_43"
|
|
line.long 0xB0 "ICDIPTR_T44,Interrupt Processor Targets Register_44"
|
|
line.long 0xB4 "ICDIPTR_T45,Interrupt Processor Targets Register_45"
|
|
line.long 0xB8 "ICDIPTR_T46,Interrupt Processor Targets Register_46"
|
|
line.long 0xBC "ICDIPTR_T47,Interrupt Processor Targets Register_47"
|
|
line.long 0xC0 "ICDIPTR_T48,Interrupt Processor Targets Register_48"
|
|
line.long 0xC4 "ICDIPTR_T49,Interrupt Processor Targets Register_49"
|
|
line.long 0xC8 "ICDIPTR_T50,Interrupt Processor Targets Register_50"
|
|
line.long 0xCC "ICDIPTR_T51,Interrupt Processor Targets Register_51"
|
|
line.long 0xD0 "ICDIPTR_T52,Interrupt Processor Targets Register_52"
|
|
line.long 0xD4 "ICDIPTR_T53,Interrupt Processor Targets Register_53"
|
|
line.long 0xD8 "ICDIPTR_T54,Interrupt Processor Targets Register_54"
|
|
line.long 0xDC "ICDIPTR_T55,Interrupt Processor Targets Register_55"
|
|
line.long 0xE0 "ICDIPTR_T56,Interrupt Processor Targets Register_56"
|
|
line.long 0xE4 "ICDIPTR_T57,Interrupt Processor Targets Register_57"
|
|
line.long 0xE8 "ICDIPTR_T58,Interrupt Processor Targets Register_58"
|
|
line.long 0xEC "ICDIPTR_T59,Interrupt Processor Targets Register_59"
|
|
line.long 0xF0 "ICDIPTR_T60,Interrupt Processor Targets Register_60"
|
|
line.long 0xF4 "ICDIPTR_T61,Interrupt Processor Targets Register_61"
|
|
line.long 0xF8 "ICDIPTR_T62,Interrupt Processor Targets Register_62"
|
|
line.long 0xFC "ICDIPTR_T63,Interrupt Processor Targets Register_63"
|
|
group.long 0x1C00++0x3F
|
|
line.long 0x0 "ICDICFR0,Interrupt Configuration Register_0"
|
|
line.long 0x4 "ICDICFR1,Interrupt Configuration Register_1"
|
|
line.long 0x8 "ICDICFR2,Interrupt Configuration Register_2"
|
|
line.long 0xC "ICDICFR3,Interrupt Configuration Register_3"
|
|
line.long 0x10 "ICDICFR4,Interrupt Configuration Register_4"
|
|
line.long 0x14 "ICDICFR5,Interrupt Configuration Register_5"
|
|
line.long 0x18 "ICDICFR6,Interrupt Configuration Register_6"
|
|
line.long 0x1C "ICDICFR7,Interrupt Configuration Register_7"
|
|
line.long 0x20 "ICDICFR8,Interrupt Configuration Register_8"
|
|
line.long 0x24 "ICDICFR9,Interrupt Configuration Register_9"
|
|
line.long 0x28 "ICDICFR10,Interrupt Configuration Register_10"
|
|
line.long 0x2C "ICDICFR11,Interrupt Configuration Register_11"
|
|
line.long 0x30 "ICDICFR12,Interrupt Configuration Register_12"
|
|
line.long 0x34 "ICDICFR13,Interrupt Configuration Register_13"
|
|
line.long 0x38 "ICDICFR14,Interrupt Configuration Register_14"
|
|
line.long 0x3C "ICDICFR15,Interrupt Configuration Register_15"
|
|
rgroup.long 0x1D00++0x1F
|
|
line.long 0x00 "PPI_STATUS,PPI Status Register"
|
|
bitfld.long 0x00 15. " PPI[4]_STATUS ,nIRQ status" "Low,High"
|
|
bitfld.long 0x00 14. " PPI[3]_STATUS ,Private watchdog status" "Low,High"
|
|
bitfld.long 0x00 13. " PPI[2]_STATUS ,Private timer status" "Low,High"
|
|
bitfld.long 0x00 12. " PPI[1]_STATUS ,nFIQ status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PPI[0]_STATUS ,Global timer status" "Low,High"
|
|
line.long 0x4 "SPI_STATUS0,SPI Status Register 0"
|
|
bitfld.long 0x4 31. " SPI31_STATUS ,Status of the IRQS31" "Low,High"
|
|
bitfld.long 0x4 30. " SPI30_STATUS ,Status of the IRQS30" "Low,High"
|
|
bitfld.long 0x4 29. " SPI29_STATUS ,Status of the IRQS29" "Low,High"
|
|
bitfld.long 0x4 28. " SPI28_STATUS ,Status of the IRQS28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 27. " SPI27_STATUS ,Status of the IRQS27" "Low,High"
|
|
bitfld.long 0x4 26. " SPI26_STATUS ,Status of the IRQS26" "Low,High"
|
|
bitfld.long 0x4 25. " SPI25_STATUS ,Status of the IRQS25" "Low,High"
|
|
bitfld.long 0x4 24. " SPI24_STATUS ,Status of the IRQS24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 23. " SPI23_STATUS ,Status of the IRQS23" "Low,High"
|
|
bitfld.long 0x4 22. " SPI22_STATUS ,Status of the IRQS22" "Low,High"
|
|
bitfld.long 0x4 21. " SPI21_STATUS ,Status of the IRQS21" "Low,High"
|
|
bitfld.long 0x4 20. " SPI20_STATUS ,Status of the IRQS20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 19. " SPI19_STATUS ,Status of the IRQS19" "Low,High"
|
|
bitfld.long 0x4 18. " SPI18_STATUS ,Status of the IRQS18" "Low,High"
|
|
bitfld.long 0x4 17. " SPI17_STATUS ,Status of the IRQS17" "Low,High"
|
|
bitfld.long 0x4 16. " SPI16_STATUS ,Status of the IRQS16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 15. " SPI15_STATUS ,Status of the IRQS15" "Low,High"
|
|
bitfld.long 0x4 14. " SPI14_STATUS ,Status of the IRQS14" "Low,High"
|
|
bitfld.long 0x4 13. " SPI13_STATUS ,Status of the IRQS13" "Low,High"
|
|
bitfld.long 0x4 12. " SPI12_STATUS ,Status of the IRQS12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 11. " SPI11_STATUS ,Status of the IRQS11" "Low,High"
|
|
bitfld.long 0x4 10. " SPI10_STATUS ,Status of the IRQS10" "Low,High"
|
|
bitfld.long 0x4 9. " SPI9_STATUS ,Status of the IRQS9" "Low,High"
|
|
bitfld.long 0x4 8. " SPI8_STATUS ,Status of the IRQS8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 7. " SPI7_STATUS ,Status of the IRQS7" "Low,High"
|
|
bitfld.long 0x4 6. " SPI6_STATUS ,Status of the IRQS6" "Low,High"
|
|
bitfld.long 0x4 5. " SPI5_STATUS ,Status of the IRQS5" "Low,High"
|
|
bitfld.long 0x4 4. " SPI4_STATUS ,Status of the IRQS4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 3. " SPI3_STATUS ,Status of the IRQS3" "Low,High"
|
|
bitfld.long 0x4 2. " SPI2_STATUS ,Status of the IRQS2" "Low,High"
|
|
bitfld.long 0x4 1. " SPI1_STATUS ,Status of the IRQS1" "Low,High"
|
|
bitfld.long 0x4 0. " SPI0_STATUS ,Status of the IRQS0" "Low,High"
|
|
line.long 0x8 "SPI_STATUS1,SPI Status Register 1"
|
|
bitfld.long 0x8 31. " SPI31_STATUS ,Status of the IRQS31" "Low,High"
|
|
bitfld.long 0x8 30. " SPI30_STATUS ,Status of the IRQS30" "Low,High"
|
|
bitfld.long 0x8 29. " SPI29_STATUS ,Status of the IRQS29" "Low,High"
|
|
bitfld.long 0x8 28. " SPI28_STATUS ,Status of the IRQS28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x8 27. " SPI27_STATUS ,Status of the IRQS27" "Low,High"
|
|
bitfld.long 0x8 26. " SPI26_STATUS ,Status of the IRQS26" "Low,High"
|
|
bitfld.long 0x8 25. " SPI25_STATUS ,Status of the IRQS25" "Low,High"
|
|
bitfld.long 0x8 24. " SPI24_STATUS ,Status of the IRQS24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x8 23. " SPI23_STATUS ,Status of the IRQS23" "Low,High"
|
|
bitfld.long 0x8 22. " SPI22_STATUS ,Status of the IRQS22" "Low,High"
|
|
bitfld.long 0x8 21. " SPI21_STATUS ,Status of the IRQS21" "Low,High"
|
|
bitfld.long 0x8 20. " SPI20_STATUS ,Status of the IRQS20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x8 19. " SPI19_STATUS ,Status of the IRQS19" "Low,High"
|
|
bitfld.long 0x8 18. " SPI18_STATUS ,Status of the IRQS18" "Low,High"
|
|
bitfld.long 0x8 17. " SPI17_STATUS ,Status of the IRQS17" "Low,High"
|
|
bitfld.long 0x8 16. " SPI16_STATUS ,Status of the IRQS16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x8 15. " SPI15_STATUS ,Status of the IRQS15" "Low,High"
|
|
bitfld.long 0x8 14. " SPI14_STATUS ,Status of the IRQS14" "Low,High"
|
|
bitfld.long 0x8 13. " SPI13_STATUS ,Status of the IRQS13" "Low,High"
|
|
bitfld.long 0x8 12. " SPI12_STATUS ,Status of the IRQS12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x8 11. " SPI11_STATUS ,Status of the IRQS11" "Low,High"
|
|
bitfld.long 0x8 10. " SPI10_STATUS ,Status of the IRQS10" "Low,High"
|
|
bitfld.long 0x8 9. " SPI9_STATUS ,Status of the IRQS9" "Low,High"
|
|
bitfld.long 0x8 8. " SPI8_STATUS ,Status of the IRQS8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x8 7. " SPI7_STATUS ,Status of the IRQS7" "Low,High"
|
|
bitfld.long 0x8 6. " SPI6_STATUS ,Status of the IRQS6" "Low,High"
|
|
bitfld.long 0x8 5. " SPI5_STATUS ,Status of the IRQS5" "Low,High"
|
|
bitfld.long 0x8 4. " SPI4_STATUS ,Status of the IRQS4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x8 3. " SPI3_STATUS ,Status of the IRQS3" "Low,High"
|
|
bitfld.long 0x8 2. " SPI2_STATUS ,Status of the IRQS2" "Low,High"
|
|
bitfld.long 0x8 1. " SPI1_STATUS ,Status of the IRQS1" "Low,High"
|
|
bitfld.long 0x8 0. " SPI0_STATUS ,Status of the IRQS0" "Low,High"
|
|
line.long 0xC "SPI_STATUS2,SPI Status Register 2"
|
|
bitfld.long 0xC 31. " SPI31_STATUS ,Status of the IRQS31" "Low,High"
|
|
bitfld.long 0xC 30. " SPI30_STATUS ,Status of the IRQS30" "Low,High"
|
|
bitfld.long 0xC 29. " SPI29_STATUS ,Status of the IRQS29" "Low,High"
|
|
bitfld.long 0xC 28. " SPI28_STATUS ,Status of the IRQS28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0xC 27. " SPI27_STATUS ,Status of the IRQS27" "Low,High"
|
|
bitfld.long 0xC 26. " SPI26_STATUS ,Status of the IRQS26" "Low,High"
|
|
bitfld.long 0xC 25. " SPI25_STATUS ,Status of the IRQS25" "Low,High"
|
|
bitfld.long 0xC 24. " SPI24_STATUS ,Status of the IRQS24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0xC 23. " SPI23_STATUS ,Status of the IRQS23" "Low,High"
|
|
bitfld.long 0xC 22. " SPI22_STATUS ,Status of the IRQS22" "Low,High"
|
|
bitfld.long 0xC 21. " SPI21_STATUS ,Status of the IRQS21" "Low,High"
|
|
bitfld.long 0xC 20. " SPI20_STATUS ,Status of the IRQS20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0xC 19. " SPI19_STATUS ,Status of the IRQS19" "Low,High"
|
|
bitfld.long 0xC 18. " SPI18_STATUS ,Status of the IRQS18" "Low,High"
|
|
bitfld.long 0xC 17. " SPI17_STATUS ,Status of the IRQS17" "Low,High"
|
|
bitfld.long 0xC 16. " SPI16_STATUS ,Status of the IRQS16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0xC 15. " SPI15_STATUS ,Status of the IRQS15" "Low,High"
|
|
bitfld.long 0xC 14. " SPI14_STATUS ,Status of the IRQS14" "Low,High"
|
|
bitfld.long 0xC 13. " SPI13_STATUS ,Status of the IRQS13" "Low,High"
|
|
bitfld.long 0xC 12. " SPI12_STATUS ,Status of the IRQS12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0xC 11. " SPI11_STATUS ,Status of the IRQS11" "Low,High"
|
|
bitfld.long 0xC 10. " SPI10_STATUS ,Status of the IRQS10" "Low,High"
|
|
bitfld.long 0xC 9. " SPI9_STATUS ,Status of the IRQS9" "Low,High"
|
|
bitfld.long 0xC 8. " SPI8_STATUS ,Status of the IRQS8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0xC 7. " SPI7_STATUS ,Status of the IRQS7" "Low,High"
|
|
bitfld.long 0xC 6. " SPI6_STATUS ,Status of the IRQS6" "Low,High"
|
|
bitfld.long 0xC 5. " SPI5_STATUS ,Status of the IRQS5" "Low,High"
|
|
bitfld.long 0xC 4. " SPI4_STATUS ,Status of the IRQS4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0xC 3. " SPI3_STATUS ,Status of the IRQS3" "Low,High"
|
|
bitfld.long 0xC 2. " SPI2_STATUS ,Status of the IRQS2" "Low,High"
|
|
bitfld.long 0xC 1. " SPI1_STATUS ,Status of the IRQS1" "Low,High"
|
|
bitfld.long 0xC 0. " SPI0_STATUS ,Status of the IRQS0" "Low,High"
|
|
line.long 0x10 "SPI_STATUS3,SPI Status Register 3"
|
|
bitfld.long 0x10 31. " SPI31_STATUS ,Status of the IRQS31" "Low,High"
|
|
bitfld.long 0x10 30. " SPI30_STATUS ,Status of the IRQS30" "Low,High"
|
|
bitfld.long 0x10 29. " SPI29_STATUS ,Status of the IRQS29" "Low,High"
|
|
bitfld.long 0x10 28. " SPI28_STATUS ,Status of the IRQS28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x10 27. " SPI27_STATUS ,Status of the IRQS27" "Low,High"
|
|
bitfld.long 0x10 26. " SPI26_STATUS ,Status of the IRQS26" "Low,High"
|
|
bitfld.long 0x10 25. " SPI25_STATUS ,Status of the IRQS25" "Low,High"
|
|
bitfld.long 0x10 24. " SPI24_STATUS ,Status of the IRQS24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x10 23. " SPI23_STATUS ,Status of the IRQS23" "Low,High"
|
|
bitfld.long 0x10 22. " SPI22_STATUS ,Status of the IRQS22" "Low,High"
|
|
bitfld.long 0x10 21. " SPI21_STATUS ,Status of the IRQS21" "Low,High"
|
|
bitfld.long 0x10 20. " SPI20_STATUS ,Status of the IRQS20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x10 19. " SPI19_STATUS ,Status of the IRQS19" "Low,High"
|
|
bitfld.long 0x10 18. " SPI18_STATUS ,Status of the IRQS18" "Low,High"
|
|
bitfld.long 0x10 17. " SPI17_STATUS ,Status of the IRQS17" "Low,High"
|
|
bitfld.long 0x10 16. " SPI16_STATUS ,Status of the IRQS16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x10 15. " SPI15_STATUS ,Status of the IRQS15" "Low,High"
|
|
bitfld.long 0x10 14. " SPI14_STATUS ,Status of the IRQS14" "Low,High"
|
|
bitfld.long 0x10 13. " SPI13_STATUS ,Status of the IRQS13" "Low,High"
|
|
bitfld.long 0x10 12. " SPI12_STATUS ,Status of the IRQS12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x10 11. " SPI11_STATUS ,Status of the IRQS11" "Low,High"
|
|
bitfld.long 0x10 10. " SPI10_STATUS ,Status of the IRQS10" "Low,High"
|
|
bitfld.long 0x10 9. " SPI9_STATUS ,Status of the IRQS9" "Low,High"
|
|
bitfld.long 0x10 8. " SPI8_STATUS ,Status of the IRQS8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x10 7. " SPI7_STATUS ,Status of the IRQS7" "Low,High"
|
|
bitfld.long 0x10 6. " SPI6_STATUS ,Status of the IRQS6" "Low,High"
|
|
bitfld.long 0x10 5. " SPI5_STATUS ,Status of the IRQS5" "Low,High"
|
|
bitfld.long 0x10 4. " SPI4_STATUS ,Status of the IRQS4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x10 3. " SPI3_STATUS ,Status of the IRQS3" "Low,High"
|
|
bitfld.long 0x10 2. " SPI2_STATUS ,Status of the IRQS2" "Low,High"
|
|
bitfld.long 0x10 1. " SPI1_STATUS ,Status of the IRQS1" "Low,High"
|
|
bitfld.long 0x10 0. " SPI0_STATUS ,Status of the IRQS0" "Low,High"
|
|
line.long 0x14 "SPI_STATUS4,SPI Status Register 4"
|
|
bitfld.long 0x14 31. " SPI31_STATUS ,Status of the IRQS31" "Low,High"
|
|
bitfld.long 0x14 30. " SPI30_STATUS ,Status of the IRQS30" "Low,High"
|
|
bitfld.long 0x14 29. " SPI29_STATUS ,Status of the IRQS29" "Low,High"
|
|
bitfld.long 0x14 28. " SPI28_STATUS ,Status of the IRQS28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x14 27. " SPI27_STATUS ,Status of the IRQS27" "Low,High"
|
|
bitfld.long 0x14 26. " SPI26_STATUS ,Status of the IRQS26" "Low,High"
|
|
bitfld.long 0x14 25. " SPI25_STATUS ,Status of the IRQS25" "Low,High"
|
|
bitfld.long 0x14 24. " SPI24_STATUS ,Status of the IRQS24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x14 23. " SPI23_STATUS ,Status of the IRQS23" "Low,High"
|
|
bitfld.long 0x14 22. " SPI22_STATUS ,Status of the IRQS22" "Low,High"
|
|
bitfld.long 0x14 21. " SPI21_STATUS ,Status of the IRQS21" "Low,High"
|
|
bitfld.long 0x14 20. " SPI20_STATUS ,Status of the IRQS20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x14 19. " SPI19_STATUS ,Status of the IRQS19" "Low,High"
|
|
bitfld.long 0x14 18. " SPI18_STATUS ,Status of the IRQS18" "Low,High"
|
|
bitfld.long 0x14 17. " SPI17_STATUS ,Status of the IRQS17" "Low,High"
|
|
bitfld.long 0x14 16. " SPI16_STATUS ,Status of the IRQS16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x14 15. " SPI15_STATUS ,Status of the IRQS15" "Low,High"
|
|
bitfld.long 0x14 14. " SPI14_STATUS ,Status of the IRQS14" "Low,High"
|
|
bitfld.long 0x14 13. " SPI13_STATUS ,Status of the IRQS13" "Low,High"
|
|
bitfld.long 0x14 12. " SPI12_STATUS ,Status of the IRQS12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x14 11. " SPI11_STATUS ,Status of the IRQS11" "Low,High"
|
|
bitfld.long 0x14 10. " SPI10_STATUS ,Status of the IRQS10" "Low,High"
|
|
bitfld.long 0x14 9. " SPI9_STATUS ,Status of the IRQS9" "Low,High"
|
|
bitfld.long 0x14 8. " SPI8_STATUS ,Status of the IRQS8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x14 7. " SPI7_STATUS ,Status of the IRQS7" "Low,High"
|
|
bitfld.long 0x14 6. " SPI6_STATUS ,Status of the IRQS6" "Low,High"
|
|
bitfld.long 0x14 5. " SPI5_STATUS ,Status of the IRQS5" "Low,High"
|
|
bitfld.long 0x14 4. " SPI4_STATUS ,Status of the IRQS4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x14 3. " SPI3_STATUS ,Status of the IRQS3" "Low,High"
|
|
bitfld.long 0x14 2. " SPI2_STATUS ,Status of the IRQS2" "Low,High"
|
|
bitfld.long 0x14 1. " SPI1_STATUS ,Status of the IRQS1" "Low,High"
|
|
bitfld.long 0x14 0. " SPI0_STATUS ,Status of the IRQS0" "Low,High"
|
|
line.long 0x18 "SPI_STATUS5,SPI Status Register 5"
|
|
bitfld.long 0x18 31. " SPI31_STATUS ,Status of the IRQS31" "Low,High"
|
|
bitfld.long 0x18 30. " SPI30_STATUS ,Status of the IRQS30" "Low,High"
|
|
bitfld.long 0x18 29. " SPI29_STATUS ,Status of the IRQS29" "Low,High"
|
|
bitfld.long 0x18 28. " SPI28_STATUS ,Status of the IRQS28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x18 27. " SPI27_STATUS ,Status of the IRQS27" "Low,High"
|
|
bitfld.long 0x18 26. " SPI26_STATUS ,Status of the IRQS26" "Low,High"
|
|
bitfld.long 0x18 25. " SPI25_STATUS ,Status of the IRQS25" "Low,High"
|
|
bitfld.long 0x18 24. " SPI24_STATUS ,Status of the IRQS24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x18 23. " SPI23_STATUS ,Status of the IRQS23" "Low,High"
|
|
bitfld.long 0x18 22. " SPI22_STATUS ,Status of the IRQS22" "Low,High"
|
|
bitfld.long 0x18 21. " SPI21_STATUS ,Status of the IRQS21" "Low,High"
|
|
bitfld.long 0x18 20. " SPI20_STATUS ,Status of the IRQS20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x18 19. " SPI19_STATUS ,Status of the IRQS19" "Low,High"
|
|
bitfld.long 0x18 18. " SPI18_STATUS ,Status of the IRQS18" "Low,High"
|
|
bitfld.long 0x18 17. " SPI17_STATUS ,Status of the IRQS17" "Low,High"
|
|
bitfld.long 0x18 16. " SPI16_STATUS ,Status of the IRQS16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x18 15. " SPI15_STATUS ,Status of the IRQS15" "Low,High"
|
|
bitfld.long 0x18 14. " SPI14_STATUS ,Status of the IRQS14" "Low,High"
|
|
bitfld.long 0x18 13. " SPI13_STATUS ,Status of the IRQS13" "Low,High"
|
|
bitfld.long 0x18 12. " SPI12_STATUS ,Status of the IRQS12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x18 11. " SPI11_STATUS ,Status of the IRQS11" "Low,High"
|
|
bitfld.long 0x18 10. " SPI10_STATUS ,Status of the IRQS10" "Low,High"
|
|
bitfld.long 0x18 9. " SPI9_STATUS ,Status of the IRQS9" "Low,High"
|
|
bitfld.long 0x18 8. " SPI8_STATUS ,Status of the IRQS8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x18 7. " SPI7_STATUS ,Status of the IRQS7" "Low,High"
|
|
bitfld.long 0x18 6. " SPI6_STATUS ,Status of the IRQS6" "Low,High"
|
|
bitfld.long 0x18 5. " SPI5_STATUS ,Status of the IRQS5" "Low,High"
|
|
bitfld.long 0x18 4. " SPI4_STATUS ,Status of the IRQS4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x18 3. " SPI3_STATUS ,Status of the IRQS3" "Low,High"
|
|
bitfld.long 0x18 2. " SPI2_STATUS ,Status of the IRQS2" "Low,High"
|
|
bitfld.long 0x18 1. " SPI1_STATUS ,Status of the IRQS1" "Low,High"
|
|
bitfld.long 0x18 0. " SPI0_STATUS ,Status of the IRQS0" "Low,High"
|
|
line.long 0x1C "SPI_STATUS6,SPI Status Register 6"
|
|
bitfld.long 0x1C 31. " SPI31_STATUS ,Status of the IRQS31" "Low,High"
|
|
bitfld.long 0x1C 30. " SPI30_STATUS ,Status of the IRQS30" "Low,High"
|
|
bitfld.long 0x1C 29. " SPI29_STATUS ,Status of the IRQS29" "Low,High"
|
|
bitfld.long 0x1C 28. " SPI28_STATUS ,Status of the IRQS28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1C 27. " SPI27_STATUS ,Status of the IRQS27" "Low,High"
|
|
bitfld.long 0x1C 26. " SPI26_STATUS ,Status of the IRQS26" "Low,High"
|
|
bitfld.long 0x1C 25. " SPI25_STATUS ,Status of the IRQS25" "Low,High"
|
|
bitfld.long 0x1C 24. " SPI24_STATUS ,Status of the IRQS24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1C 23. " SPI23_STATUS ,Status of the IRQS23" "Low,High"
|
|
bitfld.long 0x1C 22. " SPI22_STATUS ,Status of the IRQS22" "Low,High"
|
|
bitfld.long 0x1C 21. " SPI21_STATUS ,Status of the IRQS21" "Low,High"
|
|
bitfld.long 0x1C 20. " SPI20_STATUS ,Status of the IRQS20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1C 19. " SPI19_STATUS ,Status of the IRQS19" "Low,High"
|
|
bitfld.long 0x1C 18. " SPI18_STATUS ,Status of the IRQS18" "Low,High"
|
|
bitfld.long 0x1C 17. " SPI17_STATUS ,Status of the IRQS17" "Low,High"
|
|
bitfld.long 0x1C 16. " SPI16_STATUS ,Status of the IRQS16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1C 15. " SPI15_STATUS ,Status of the IRQS15" "Low,High"
|
|
bitfld.long 0x1C 14. " SPI14_STATUS ,Status of the IRQS14" "Low,High"
|
|
bitfld.long 0x1C 13. " SPI13_STATUS ,Status of the IRQS13" "Low,High"
|
|
bitfld.long 0x1C 12. " SPI12_STATUS ,Status of the IRQS12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1C 11. " SPI11_STATUS ,Status of the IRQS11" "Low,High"
|
|
bitfld.long 0x1C 10. " SPI10_STATUS ,Status of the IRQS10" "Low,High"
|
|
bitfld.long 0x1C 9. " SPI9_STATUS ,Status of the IRQS9" "Low,High"
|
|
bitfld.long 0x1C 8. " SPI8_STATUS ,Status of the IRQS8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1C 7. " SPI7_STATUS ,Status of the IRQS7" "Low,High"
|
|
bitfld.long 0x1C 6. " SPI6_STATUS ,Status of the IRQS6" "Low,High"
|
|
bitfld.long 0x1C 5. " SPI5_STATUS ,Status of the IRQS5" "Low,High"
|
|
bitfld.long 0x1C 4. " SPI4_STATUS ,Status of the IRQS4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1C 3. " SPI3_STATUS ,Status of the IRQS3" "Low,High"
|
|
bitfld.long 0x1C 2. " SPI2_STATUS ,Status of the IRQS2" "Low,High"
|
|
bitfld.long 0x1C 1. " SPI1_STATUS ,Status of the IRQS1" "Low,High"
|
|
bitfld.long 0x1C 0. " SPI0_STATUS ,Status of the IRQS0" "Low,High"
|
|
group.long 0x1F00++0x03
|
|
line.long 0x00 "ICDSGIR,Software Generated Interrupt Register"
|
|
width 12.
|
|
tree.end
|
|
tree "OCM (On-Chip Memory)"
|
|
base ad:0xF800C000
|
|
width 23.
|
|
group.long 0x00++0x0F
|
|
line.long 0x00 "OCM_PARITY_CTRL,Control fields for RAM parity operation"
|
|
bitfld.long 0x00 20. " ODDPARITYEN[15] ,Enable RAM Odd Parity Generation 15" "Even,Odd"
|
|
bitfld.long 0x00 19. " ODDPARITYEN[14] ,Enable RAM Odd Parity Generation 14" "Even,Odd"
|
|
bitfld.long 0x00 18. " ODDPARITYEN[13] ,Enable RAM Odd Parity Generation 13" "Even,Odd"
|
|
bitfld.long 0x00 17. " ODDPARITYEN[12] ,Enable RAM Odd Parity Generation 12" "Even,Odd"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ODDPARITYEN[11] ,Enable RAM Odd Parity Generation 11" "Even,Odd"
|
|
bitfld.long 0x00 15. " ODDPARITYEN[10] ,Enable RAM Odd Parity Generation 10" "Even,Odd"
|
|
bitfld.long 0x00 14. " ODDPARITYEN[9] ,Enable RAM Odd Parity Generation 9" "Even,Odd"
|
|
bitfld.long 0x00 13. " ODDPARITYEN[8] ,Enable RAM Odd Parity Generation 8" "Even,Odd"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ODDPARITYEN[7] ,Enable RAM Odd Parity Generation 7" "Even,Odd"
|
|
bitfld.long 0x00 11. " ODDPARITYEN[6] ,Enable RAM Odd Parity Generation 6" "Even,Odd"
|
|
bitfld.long 0x00 10. " ODDPARITYEN[5] ,Enable RAM Odd Parity Generation 5" "Even,Odd"
|
|
bitfld.long 0x00 9. " ODDPARITYEN[4] ,Enable RAM Odd Parity Generation 4" "Even,Odd"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ODDPARITYEN[3] ,Enable RAM Odd Parity Generation 3" "Even,Odd"
|
|
bitfld.long 0x00 7. " ODDPARITYEN[2] ,Enable RAM Odd Parity Generation 2" "Even,Odd"
|
|
bitfld.long 0x00 6. " ODDPARITYEN[1] ,Enable RAM Odd Parity Generation 1" "Even,Odd"
|
|
bitfld.long 0x00 5. " ODDPARITYEN[0] ,Enable RAM Odd Parity Generation 0" "Even,Odd"
|
|
textline " "
|
|
bitfld.long 0x00 4. " LOCKFAILERRIRQEN ,Enable interrupt when an AXI LOCK command is detected" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " MULTIPLEPARITYERRIRQEN ,Enable interrupt when a multiple parity error is detected" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SINGLEPARITYERRIRQEN ,Enable interrupt when a single parity error is detected" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RDRESPPARITYERREN ,Enable AXI read 'SLVERR' response for parity error detection" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PARITYCHECKDIS ,Disable RAM Parity Checking" "No,Yes"
|
|
line.long 0x04 "OCM_PARITY_ERRADDRESS,Stores the first parity error access address"
|
|
hexmask.long.word 0x04 0.--13. 1. " PARITYERRADDRESS ,Parity error access address"
|
|
line.long 0x08 "OCM_IRQ_STS,Status of OCM Interrupt"
|
|
eventfld.long 0x08 2. " LOCKFAILERR ,Status of AXI LOCK error" "Not occurred,Occurred"
|
|
eventfld.long 0x08 1. " MULTIPLEPARITYERR ,Status of OCM multiple parity error" "Not occurred,Occurred"
|
|
eventfld.long 0x08 0. " SINGLEPARITYERR ,Status of OCM single parity error" "Not occurred,Occurred"
|
|
line.long 0x0C "OCM_CONTROL,Control fields for OCM"
|
|
bitfld.long 0x0C 2. " CLKRATIO2TO1EN ,Indicates that the clock ratio between cpu_6or4xclk and cpu_2xclk is 2:1" "Disabled,Enabled"
|
|
bitfld.long 0x0C 1. " DISABLEROM ,Disable ROM CEN signal" "No,Yes"
|
|
bitfld.long 0x0C 0. " SCUWRPRIORITYLO ,Changes the priority of the SCU write port" "Medium,Low"
|
|
width 12.
|
|
tree.end
|
|
tree "QSPI (Quad-SPI Controller)"
|
|
base ad:0xE000D000
|
|
width 23.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CONFIG_REG,SPI configuration register"
|
|
bitfld.long 0x00 31. " LEG_FLSH ,Flash memory interface mode control" "Legacy SPI,Flash memory interface"
|
|
bitfld.long 0x00 26. " ENDIAN ,Endian select" "Little,Big"
|
|
bitfld.long 0x00 17. " MODEFAIL_GEN_EN ,ModeFail Generation Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " MAN_START_COM ,Manual Start Command" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MAN_START_EN ,Manual Start Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " MANUAL_CS ,Manual CS" "Auto,Manual"
|
|
bitfld.long 0x00 10.--13. " CS ,Peripheral chip select lines" "Slave 0,slave 1,Slave 0,Slave 2,Slave 0,Slave 1,Slave 0,Slave 3,Slave 0,Slave 1,Slave 0,Slave 2,Slave 0,Slave 1,Slave 0,No slave"
|
|
bitfld.long 0x00 9. " PERI_SEL ,Peripheral select decode" "4-16,1 of 4 only"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REF_CLK ,Master reference clock select" "SPI REFERENCE CLOCK,ext_clk"
|
|
bitfld.long 0x00 6.--7. " FIFO_WIDTH ,FIFO width" "8bits,16bits,24bits,32bits"
|
|
bitfld.long 0x00 3.--5. " BAUD_RATE_DIV ,Master mode baud rate divisor" "/2,/4,/8,/16,/32,/64,/128,/256"
|
|
bitfld.long 0x00 2. " CLK_PH ,Clock phase" "Active,Inactive"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLK_POL ,Clock polarity outside SPI word" "Low,High"
|
|
bitfld.long 0x00 0. " MODE_SEL ,Mode select" "Slave,Master"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "INTR_STATUS_REG,SPI interrupt status register"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " TX_FIFO_UNDERFLOW_set/clr ,TX FIFO underflow" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " RX_FIFO_FULL_set/clr ,RX FIFO full" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " RX_FIFO_NOT_EMPTY_set/clr ,RX FIFO not empty" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " TX_FIFO_FULL_set/clr ,TX FIFO full" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " TX_FIFO_NOT_FULL_set/clr ,TX FIFO not full" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " MODE_FAIL_set/clr ,ModeFail interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RX_OVERFLOW_set/clr ,Receive Overflow interrupt" "No interrupt,Interrupt"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "INTRPT_MASK_REG,Interrupt mask register"
|
|
bitfld.long 0x00 6. " TX_FIFO_UNDERFLOW ,TX FIFO underflow" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " RX_FIFO_FULL ,RX FIFO full" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " RX_FIFO_NOT_EMPTY ,RX FIFO not empty" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " TX_FIFO_FULL ,TX FIFO full" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TX_FIFO_NOT_FULL ,TX FIFO not full" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " MODE_FAIL ,ModeFail interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " RX_OVERFLOW ,Receive Overflow interrupt" "Not masked,Masked"
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "EN_REG,SPI_Enable Register"
|
|
bitfld.long 0x00 0. " SPI_EN ,SPI Enable" "Disabled,Enabled"
|
|
line.long 0x04 "DELAY_REG,Delay Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " D_NSS ,Delay in SPI REFERENCE CLOCK or ext_clk cycles for the length that the master mode chip select outputs are de-asserted between words"
|
|
hexmask.long.byte 0x04 16.--23. 1. " D_BTWN ,Delay in SPI REFERENCE CLOCK or ext_clk cycles between one chip select being de-activated and the activation of another"
|
|
hexmask.long.byte 0x04 8.--15. 1. " D_AFTER ,Delay in SPI REFERENCE CLOCK or ext_clk cycles between last bit of current word and the first bit of the next word"
|
|
hexmask.long.byte 0x04 0.--7. 1. " D_INT ,Added delay in SPI REFERENCE CLOCK or ext_clk cycles between setting n_ss_out low and first bit transfer"
|
|
wgroup.long 0x1C++0x03
|
|
line.long 0x00 "TXD0,Transmit Data 0 Register"
|
|
hgroup.long 0x20++0x03
|
|
hide.long 0x00 "RX_DATA_REG,Receive Data Register"
|
|
in
|
|
group.long 0x24++0x0F
|
|
line.long 0x00 "SLAVE_IDLE_COUNT_REG,Slave Idle Count Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SLAVE_IDLE_COUNT ,Slave idle count"
|
|
line.long 0x04 "TX_THRES_REG,TX_FIFO Threshold Register"
|
|
line.long 0x08 "RX_THRES_REG,RX FIFO Threshold Register"
|
|
line.long 0x0C "GPIO,General Purpose Inputs and Outputs Register for the Quad-SPI Controller core"
|
|
bitfld.long 0x0C 0. " WP_N ,Write Protect" "Low,High"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "LPBK_DLY_ADJ,Loopback Master Clock Delay Adjustment Register"
|
|
bitfld.long 0x00 5. " USE_LPBK ,Use external loopback master clock" "Unused,Used"
|
|
bitfld.long 0x00 3.--4. " DLY1 ,Delay adjustment" "0 ns,0.4 ns,0.8 ns,1.2 ns"
|
|
bitfld.long 0x00 0.--2. " DLY0 ,Delay adjustment step" "0,1,2,3,4,5,6,7"
|
|
wgroup.long 0x80++0x0B
|
|
line.long 0x00 "TXD1,Transmit Data 1 Register"
|
|
line.long 0x04 "TXD2,Transmit Data 2 Register"
|
|
line.long 0x08 "TXD3,Transmit Data 3 Register"
|
|
if (((d.l(ad:0xE000D000+0xA0))&0x2000000)==0x2000000)
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "LQSPI_CFG,Configuration Register specifically for the Linear Quad-SPI Controller"
|
|
bitfld.long 0x00 31. " LQ_MODE ,Linear quad SPI mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TWO_MEM ,Both upper and lower memories" "Inactive,Active"
|
|
bitfld.long 0x00 29. " SEP_BUS ,Separate memory bus" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " U_PAGE ,Upper memory page" "Lower,Upper"
|
|
textline " "
|
|
bitfld.long 0x00 26. " CMD_MERGE ,Merge back-to-back AXI read commands" "Not merged,Merged"
|
|
bitfld.long 0x00 25. " MODE_EN ,Enable MODE_BITS[23:16] to be sent" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " MODE_ON ,Mode on" "Off,On"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MODE_BITS ,Mode value for dual I/O or quad I/O for follow on read"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RD_ZEROS ,Zero out all read data" "Low,High"
|
|
bitfld.long 0x00 8.--10. " DUMMY_BYTE ,Number of dummy bytes between address and return read data" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INST_CODE ,Read instruction code"
|
|
else
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "LQSPI_CFG,Configuration Register specifically for the Linear Quad-SPI Controller"
|
|
bitfld.long 0x00 31. " LQ_MODE ,Linear quad SPI mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TWO_MEM ,Both upper and lower memories" "Inactive,Active"
|
|
bitfld.long 0x00 29. " SEP_BUS ,Separate memory bus" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " U_PAGE ,Upper memory page" "Lower,Upper"
|
|
textline " "
|
|
bitfld.long 0x00 26. " CMD_MERGE ,Merge back-to-back AXI read commands" "Not merged,Merged"
|
|
bitfld.long 0x00 25. " MODE_EN ,Enable MODE_BITS[23:16] to be sent" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RD_ZEROS ,Zero out all read data" "Low,High"
|
|
bitfld.long 0x00 8.--10. " DUMMY_BYTE ,Number of dummy bytes between address and return read data" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INST_CODE ,Read instruction code"
|
|
endif
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "LQSPI_STS,Status Register specifically for the Linear Quad-SPI Controller"
|
|
bitfld.long 0x00 8. " CMD_MERGED ,AXI read commands have been merged" "Not merged,Merged"
|
|
bitfld.long 0x00 2. " FB_RECVD ,AXI Fixed burst command received" "Not received,Received"
|
|
bitfld.long 0x00 1. " WR_RECVD ,AXI write command received" "Not received,Received"
|
|
bitfld.long 0x00 0. " UNKN_INST ,Unknown read instruction code" "Low,High"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "MOD_ID,Module Identification register"
|
|
width 12.
|
|
tree.end
|
|
tree.open "SDIO (SD2.0/ SDIO2.0/ MMC3.31 AHB Host Controller)"
|
|
tree "SD0"
|
|
base ad:0xE0100000
|
|
width 31.
|
|
group.long 0x00++0x0F
|
|
line.long 0x00 "SDMA_SYSTEM_ADDRESS_REGISTER,This register contains the system memory address for a DMA transfer"
|
|
line.long 0x04 "BLOCK_SIZE_BLOCK_COUNT,Block size and block count register"
|
|
hexmask.long.word 0x04 16.--31. 1. " BLOCKS_COUNT_FOR_CURRENT_TRANSFER ,This register is enabled when Block Count Enable in the Transfer"
|
|
bitfld.long 0x04 12.--14. " HOST_SDMA_BUFFER_SIZE ,Counter clock prescale" "/8,/64,/256,/4096,?..."
|
|
hexmask.long.word 0x04 0.--11. 1. " TRANSFER_BLOCK_SIZE ,Block size for block data transfers for CMD17, CMD18, CMD24, CMD25, and CMD53"
|
|
line.long 0x08 "ARGUMENT,Argument register"
|
|
line.long 0x0C "TRANSFER_MODE_COMMAND,Transfer mode and command register"
|
|
bitfld.long 0x0C 24.--28. " COMMAND_INDEX ,Command number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x0C 22.--23. " COMMAND_TYPE ,Special commands type" "Normal,Suspend,Resume,?..."
|
|
bitfld.long 0x0C 21. " DATA_PRESENT_SELECT ,Data Present Select" "No data,Data present"
|
|
bitfld.long 0x0C 20. " COMMAND_INDEX_CHECK_ENABLE ,Command Index Check Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " COMMAND_CRC_CHECK_ENABLE ,Command CRC Check Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 16.--17. " RESPONSE_TYPE_SELECT ,Response Type Select" "No response,136 bits,48 bits,48 bits/check"
|
|
bitfld.long 0x0C 5. " MULTI_SINGLE_BLOCK_SELECT ,Enables multiple block DAT line data transfers" "Disabled,Enabled"
|
|
bitfld.long 0x0C 4. " DATA_TRANSFER_DIRECTION_SELECT ,Direction of DAT line data transfers" "Write,Read"
|
|
textline " "
|
|
bitfld.long 0x0C 2. " AUTO_CMD12_ENABLE ,Auto CMD12 enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 1. " BLOCK_COUNT_ENABLE ,Block count enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " DMA_ENABLE ,DMA enable" "Disabled,Enabled"
|
|
rgroup.long 0x10++0x0F
|
|
line.long 0x00 "RESPONSE0,Response register 0"
|
|
line.long 0x04 "RESPONSE1,Response register 1"
|
|
line.long 0x08 "RESPONSE2,Response register 2"
|
|
line.long 0x0C "RESPONSE3,Response register 3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "BUFFER_DATA_PORT,Buffer data port register"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "PRESENT_STATE,Present State register"
|
|
bitfld.long 0x00 24. " CMD_LINE_SIGNAL_LEVEL ,CMD line level" "Low,High"
|
|
bitfld.long 0x00 23. " DAT[3]_BIT3_LINE_SIGNAL_LEVEL ,DAT3 line level" "Low,High"
|
|
bitfld.long 0x00 22. " DAT[2]_BIT2_LINE_SIGNAL_LEVEL ,DAT2 line level" "Low,High"
|
|
bitfld.long 0x00 21. " DAT[1]_BIT1_LINE_SIGNAL_LEVEL ,DAT1 line level" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 20. " DAT[0]_BIT0_LINE_SIGNAL_LEVEL ,DAT0 line level" "Low,High"
|
|
bitfld.long 0x00 19. " WRITE_PROTECT_SWITCH_PIN_LEVEL ,Write protect switch pin level" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " CARD_DETECT_PIN_LEVEL ,Card detect pin value" "Not present,Present"
|
|
bitfld.long 0x00 17. " CARD_STATE_STABLE ,Card state" "Unstable,Stable"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CARD_INSERTED ,Card inserted" "Not inserted,Inserted"
|
|
bitfld.long 0x00 11. " BUFFER_READ_ENABLE ,Buffer Read Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " BUFFER_WRITE_ENABLE ,Buffer Write Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " READ_TRANSFER_ACTIVE ,Read Transfer Active" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 8. " WRITE_TRANSFER_ACTIVE ,Write Transfer Active" "Inactive,Active"
|
|
bitfld.long 0x00 2. " DAT_LINE_ACTIVE ,DAT Line Active" "Inactive,Active"
|
|
bitfld.long 0x00 1. " COMMAND_INHIBIT_DAT ,Command Inhibit (DAT)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " COMMAND_INHIBIT_CMD ,Command Inhibit (CMD)" "Disabled,Enabled"
|
|
width 62.
|
|
group.long 0x28++0x13
|
|
line.long 0x00 "HOST_CONTROL_POWER_CONTROL_BLOCK_GAP_CONTROL_WAKEUP_CONTROL,Host control/power control/block gap control/wake-up control register"
|
|
bitfld.long 0x00 26. " WAKEUP_EVENT_ENABLE_ON_SD_CARD_REMOVAL ,Wakeup event enable on SD card removal" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " WAKEUP_EVENT_ENABLE_ON_SD_CARD_INSERTION ,Wakeup event enable on SD card insertion" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " WAKEUP_EVENT_ENABLE_ON_CARD_INTERRUPT ,Wakeup event enable on card interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " INTERRUPT_AT_BLOCK_GAP ,Interrupt at Block Gap" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. " READ_WAIT_CONTROL ,Read Wait Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CONTINUE_REQUEST ,Continue Request" "Ignored,Restarted"
|
|
textline " "
|
|
bitfld.long 0x00 16. " STOP_AT_BLOCK_GAP_REQUEST ,Stop at Block Gap Request" "Transfered,Stopped"
|
|
bitfld.long 0x00 9.--11. " SD_BUS_VOLTAGE_SELECT ,SD Bus Voltage select" "Reserved,Reserved,Reserved,Reserved,Reserved,1.8V,3.0V,3.3V"
|
|
bitfld.long 0x00 8. " SD_BUS_POWER ,SD Bus Power" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CARD_DETECT_SIGNAL_DETETCTION ,Source for card detection" "SDCD,Card detect test level"
|
|
bitfld.long 0x00 6. " CARD_DETECT_TEST_LEVEL ,Card Detect Test Level" "Not inserted,Inserted"
|
|
bitfld.long 0x00 3.--4. " DMA_SELECT ,DMA mode select" "SDMA,32-bit ADMA1,32-bit AMDA2,64-bit ADMA2"
|
|
textline " "
|
|
bitfld.long 0x00 2. " HIGH_SPEED_ENABLE ,High Speed Enable" "Normal speed,High speed"
|
|
bitfld.long 0x00 1. " DATA_TRANSFER_WIDTH_SD1_OR_SD4 ,Selects the data width of the HC" "1-bit mode,4-bit mode"
|
|
bitfld.long 0x00 0. " LED_CONTROL ,LED control" "Disabled,Enabled"
|
|
line.long 0x04 "CLOCK_CONTROL_TIMEOUT_CONTROL_SOFTWARE_RESET,Clock control/timeout control/software reset register"
|
|
bitfld.long 0x04 26. " SOFTWARE_RESET_FOR_DAT_LINE ,Software Reset for DAT line" "No reset,Reset"
|
|
bitfld.long 0x04 25. " SOFTWARE_RESET_FOR_CMD_LINE ,Software Reset for CMD line" "No reset,Reset"
|
|
bitfld.long 0x04 24. " SOFTWARE_RESET_FOR_ALL ,Software Reset for All" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " DATA_TIMEOUT_COUNTER_VALUE ,Data Timeout Counter Value" "TMCLK* 2^13,TMCLK* 2^14,TMCLK* 2^15,TMCLK* 2^16,TMCLK* 2^17,TMCLK* 2^18,TMCLK* 2^19,TMCLK* 2^20,TMCLK* 2^21,TMCLK* 2^22,TMCLK* 2^23,TMCLK* 2^24,TMCLK* 2^25,TMCLK* 2^26,TMCLK* 2^27,?..."
|
|
hexmask.long.byte 0x04 8.--15. 1. " SDCLK_FREQUENCY_SELECT ,SDCLK Frequency Select"
|
|
bitfld.long 0x04 2. " SD_CLOCK_ENABLE ,SD Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " INTERNAL_CLOCK_STABLE ,Internal Clock Stable" "Not ready,Ready"
|
|
bitfld.long 0x04 0. " INTERNAL_CLOCK_ENABLE ,Internal Clock Enable" "Disabled,Enabled"
|
|
line.long 0x08 "NORMAL_INTERRUPT_STATUS_ERROR_INTERRUPT_STATUS,Normal interrupt status/error interrupt status register"
|
|
eventfld.long 0x08 29. " CEATA_ERROR_STATUS ,CEATA Error Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 28. " TARGET_RESPONSE_ERROR ,Target Response Error" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 25. " ADMA_ERROR ,ADMA Error" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 24. " AUTO_CMD12_ERROR ,Auto CMD12 Error" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 23. " CURRENT_LIMIT_ERROR ,Current Limit Error" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 22. " DATA_END_BIT_ERROR ,Data End Bit Error" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 21. " DATA_CRC_ERROR ,Data CRC Error" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 20. " DATA_TIMEOUT_ERROR ,Data Timeout Error" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 19. " COMMAND_INDEX_ERROR ,Command Index Error" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 18. " COMMAND_END_BIT_ERROR ,Command End Bit Error" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 17. " COMMAND_CRC_ERROR ,Command CRC Error" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 16. " COMMAND_TIMEOUT_ERROR ,Command Timeout Error" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 15. " ERROR_INTERRUPT ,Error Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 10. " BOOT_TERMINATE_INTERRUPT ,Boot Terminate Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 9. " BOOT_ACK_RCV ,Boot Acknowlede Received" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 8. " CARD_INTERRUPT ,Card Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 7. " CARD_REMOVAL ,Card Removal" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 6. " CARD_INSERTION ,Card Insertion" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 5. " BUFFER_READ_READY ,Buffer Read Ready" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 4. " BUFFER_WRITE_READY ,Buffer Write Ready" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 3. " DMA_INTERRUPT ,DMA Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 2. " BLOCK_GAP_EVENT ,Block Gap Event" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 1. " TRANSFER_COMPLETE ,Transfer Complete" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 0. " COMMAND_COMPLETE ,Command complete" "No interrupt,Interrupt"
|
|
line.long 0x0C "NORMAL_INTERRUPT_STATUS_ENABLE_ERROR_INTERRUPT_STATUS_ENABLE,Normal interrupt status enable/error interrupt status enable register"
|
|
bitfld.long 0x0C 29. " CEATA_ERROR_STATUS_ENABLE ,CEATA Error Status" "Disabled,Enabled"
|
|
bitfld.long 0x0C 28. " TARGET_RESPONSE_ERROR_ENABLE ,Target Response Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 25. " ADMA_ERROR_ENABLE ,ADMA Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " AUTO_CMD12_ERROR_ENABLE ,Auto CMD12 Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 23. " CURRENT_LIMIT_ERROR_ENABLE ,Current Limit Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 22. " DATA_END_BIT_ERROR_ENABLE ,Data End Bit Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 21. " DATA_CRC_ERROR_ENABLE ,Data CRC Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 20. " DATA_TIMEOUT_ERROR_ENABLE ,Data Timeout Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 19. " COMMAND_INDEX_ERROR_ENABLE ,Command Index Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 18. " COMMAND_END_BIT_ERROR_ENABLE ,Command End Bit Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 17. " COMMAND_CRC_ERROR_ENABLE ,Command CRC Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 16. " COMMAND_TIMEOUT_ERROR_ENABLE ,Command Timeout Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " FIXED_TO_0_ENABLE ,Fixed to 0" "0,1"
|
|
bitfld.long 0x0C 10. " BOOT_TERMINATE_INTERRUPT_ENABLE ,Boot Terminate Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 9. " BOOT_ACK_RCV_ENABLE ,Boot Acknowlede Received Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 8. " CARD_INTERRUPT_ENABLE ,Card Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 7. " CARD_REMOVAL_ENABLE ,Card Removal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 6. " CARD_INSERTION_ENABLE ,Card Insertion Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 5. " BUFFER_READ_READY_ENABLE ,Buffer Read Ready Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 4. " BUFFER_WRITE_READY_ENABLE ,Buffer Write Ready Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 3. " DMA_INTERRUPT_ENABLE ,DMA Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 2. " BLOCK_GAP_EVENT_ENABLE ,Block Gap Event Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 1. " TRANSFER_COMPLETE_ENABLE ,Transfer Complete Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " COMMAND_COMPLETE_ENABLE ,Command Complete Enable" "Disabled,Enabled"
|
|
line.long 0x10 " NORMAL_INTERRUPT_SIGNAL_ENABLE_ERROR_INTERRUPT_SIGNAL_ENABLE,Normal interrupt signal enable/error interrupt signal enable register"
|
|
bitfld.long 0x10 29. " CEATA_ERROR_SIGNAL_ENABLE ,CEATA Error Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 28. " TARGET_RESPONSE_ERROR_SIGNAL_ENABLE ,Target Response Error Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 25. " ADMA_ERROR_SIGNAL_ENABLE ,ADMA Error Signal Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 24. " AUTO_CMD12_ERROR_SIGNAL_ENABLE ,Auto CMD12 Error Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 23. " CURRENT_LIMIT_ERROR_SIGNAL_ENABLE ,Current Limit Error Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 22. " DATA_END_BIT_ERROR_SIGNAL_ENABLE ,Data End Bit Error Signal Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 21. " DATA_CRC_ERROR_SIGNAL_ENABLE ,Data CRC Error Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 20. " DATA_TIMEOUT_ERROR_SIGNAL_ENABLE ,Data Timeout Error Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 19. " COMMAND_INDEX_ERROR_SIGNAL_ENABLE ,Command Index Error Signal Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 18. " COMMAND_END_BIT_ERROR_SIGNAL_ENABLE ,Command End Bit Error Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 17. " COMMAND_CRC_ERROR_SIGNAL_ENABLE ,Command CRC Error Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 16. " COMMAND_TIMEOUT_ERROR_SIGNAL_ENABLE ,Command Timeout Error Signal Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 15. " FIXED_TO_0_SIGNAL_ENABLE ,Fixed to 0" "0,1"
|
|
bitfld.long 0x10 10. " BOOT_TERMINATE_INTERRUPT_SIGNAL_ENABLE ,Boot Terminate Interrupt Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 9. " BOOT_ACK_RCV_SIGNAL_ENABLE ,Boot Acknowlede Received Signal Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 8. " CARD_INTERRUPT_SIGNAL_ENABLE ,Card Interrupt Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 7. " CARD_REMOVAL_SIGNAL_ENABLE ,Card Removal Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 6. " CARD_INSERTION_SIGNAL_ENABLE ,Card Insertion Signal Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 5. " BUFFER_READ_READY_SIGNAL_ENABLE ,Buffer Read Ready Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 4. " BUFFER_WRITE_READY_SIGNAL_ENABLE ,Buffer Write Ready Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 3. " DMA_INTERRUPT_SIGNAL_ENABLE ,DMA Interrupt Signal Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 2. " BLOCK_GAP_EVENT_SIGNAL_ENABLE ,Block Gap Event Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " TRANSFER_COMPLETE_SIGNAL_ENABLE ,Transfer Complete Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " COMMAND_COMPLETE_SIGNAL_ENABLE ,Command Complete Signal Enable" "Disabled,Enabled"
|
|
rgroup.long 0x3C++0x07
|
|
line.long 0x00 "AUTO_CMD12_ERROR_STATUS,Auto CMD12 error status register"
|
|
bitfld.long 0x00 7. " COMMAND_NOT_ISSUED_BY_AUTO_CMD12_ERROR ,Command Not Issued by Auto CMD12 Error" "No error,Error"
|
|
bitfld.long 0x00 4. " AUTO_CMD12_INDEX_ERROR ,Auto CMD12 Index Error" "No error,Error"
|
|
bitfld.long 0x00 3. " AUTO_CMD12_END_BIT_ERROR ,Auto CMD12 End Bit Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AUTO_CMD12_CRC_ERROR ,Auto CMD12 CRC Error" "No error,Error"
|
|
bitfld.long 0x00 1. " AUTO_CMD12_TIMEOUT_ERROR ,Auto CMD12 Timeout Error" "No error,Error"
|
|
bitfld.long 0x00 0. " AUTO_CMD12_NOT_EXECUTED ,Auto CMD12 Not Executed" "Executed,Not executed"
|
|
line.long 0x04 "CAPABILITIES,Capabilities register"
|
|
bitfld.long 0x04 30. " SPI_BLOCK_MODE ,SPI Block Mode" "Not supported,Supported"
|
|
bitfld.long 0x04 29. " SPI_MODE ,SPI Mode" "Not supported,Supported"
|
|
bitfld.long 0x04 28. " 64_BIT_SYSTEM_BUS_SUPPORT ,64-Bit System Bus Support" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x04 27. " INTERRUPT_MODE ,Interrupt Mode" "Not supported,Supported"
|
|
bitfld.long 0x04 26. " VOLTAGE_SUPPORT_1_8_V ,1.8V Voltage Support" "Not supported,Supported"
|
|
bitfld.long 0x04 25. " VOLTAGE_SUPPORT_3_0_V ,3.0V Voltage Support" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x04 24. " VOLTAGE_SUPPORT_3_3_V ,3.3V Voltage Support" "Not supported,Supported"
|
|
bitfld.long 0x04 23. " SUSPEND_RESUME_SUPPORT ,Suspend / Resume Support" "Not supported,Supported"
|
|
bitfld.long 0x04 22. " SDMA_SUPPORT ,SDMA Support" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x04 21. " HIGH_SPEED_SUPPORT ,High Speed Support" "Not supported,Supported"
|
|
bitfld.long 0x04 19. " ADMA2_SUPPORT ,ADMA2 Support" "Not supported,Supported"
|
|
bitfld.long 0x04 18. " EXTENDED_MEDIA_BUS_SUPPORT ,Extended Media Bus Support" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x04 16.--17. " MAX_BLOCK_LENGTH ,Maximum Block size" "512 bytes,1024 bytes,2048 bytes,4096 bytes"
|
|
bitfld.long 0x04 8.--13. " BASE_CLOCK_FREQUENCY_FOR_SD_CLOCK ,Base Clock Frequency for SD clock" "0 MHz,1 MHz,2 MHz,3 MHz,4 MHz,5 MHz,6 MHz,7 MHz,8 MHz,9 MHz,10 MHz,11 MHz,12 MHz,13 MHz,14 MHz,15 MHz,16 MHz,17 MHz,18 MHz,19 MHz,20 MHz,21 MHz,22 MHz,23 MHz,24 MHz,25 MHz,26 MHz,27 MHz,28 MHz,29 MHz,30 MHz,31 MHz,32 MHz,33 MHz,34 MHz,35 MHz,36 MHz,37 MHz,38 MHz,39 MHz,40 MHz,41 MHz,42 MHz,43 MHz,44 MHz,45 MHz,46 MHz,47 MHz,48 MHz,49 MHz,50 MHz,51 MHz,52 MHz,53 MHz,54 MHz,55 MHz,56 MHz,57 MHz,58 MHz,59 MHz,60 MHz,61 MHz,62 MHz,63 MHz"
|
|
bitfld.long 0x04 7. " TIMEOUT_CLOCK_UNIT ,Timeout Clock Unit" "kHz,MHz"
|
|
textline " "
|
|
bitfld.long 0x04 0.--5. " TIMEOUT_CLOCK_FREQUENCY ,Timeout Clock Frequency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "MAXIMUM_CURRENT_CAPABILITIES,Maximum current capabilities register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MAXIMUM_CURRENT_FOR_1_8V ,Maximum Current for 1.8V"
|
|
hexmask.long.byte 0x00 8.--15. 1. " MAXIMUM_CURRENT_FOR_3_0V ,Maximum Current for 3.0V"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MAXIMUM_CURRENT_FOR_3_3V ,Maximum Current for 3.3V"
|
|
width 75.
|
|
wgroup.long 0x50++0x03
|
|
line.long 0x00 "FORCE_EVENT_FOR_AUTOCMD12_ERROR_STATUS_FORCE_EVENT_REGISTER_FOR_ERROR_INT,Force event register for Auto CMD12 error status/force event register for error interrupt status"
|
|
bitfld.long 0x00 31. " FORCE_EVENT_FOR_VENDOR_SPECIFIC_ERROR_STATUS[1] ,Additional status bits can be defined in this register by the vendor" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. " FORCE_EVENT_FOR_VENDOR_SPECIFIC_ERROR_STATUS[0] ,Additional status bits can be defined in this register by the vendor" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FORCE_EVENT_FOR_CEATA_ERROR ,Force Event for Ceata Error" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 28. " FORCE_EVENT_FOR_TARGET_RESPONSE_ERROR ,Force Event for Target Response Error" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FORCE_EVENT_FOR_ADMA_ERROR ,Force Event for ADMA Error" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. " FORCE_EVENT_FOR_AUTO_CMD12_ERROR ,Force Event for Auto CMD12 Error" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FORCE_EVENT_FOR_CURRENT_LIMIT_ERROR ,Force Event for Current Limit Error" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 22. " FORCE_EVENT_FOR_DATA_END_BIT_ERROR ,Force Event for Data End Bit Error" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FORCE_EVENT_FOR_DATA_CRC_ERROR ,Force Event for Data CRC Error" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " FORCE_EVENT_FOR_DATA_TIMEOUT_ERROR ,Force Event for Data Timeout Error" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FORCE_EVENT_FOR_COMMAND_INDEX_ERROR ,Force Event for Command Index Error" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. " FORCE_EVENT_FOR_COMMAND_END_BIT_ERROR ,Force Event for Command End Bit Error" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 17. " FORCE_EVENT_FOR_COMMAND_CRC_ERROR ,Force Event for Command CRC Error" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16. " FORCE_EVENT_FOR_COMMAND_TIMEOUT_ERROR ,Force Event for Command Timeout Error" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FORCE_EVENT_FOR_COMMAND_NOT_ISSUED_BY_AUTO_CMD12_ERROR ,Force Event for Command not Issued by Auto Cmd12 Error" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " FORCE_EVENT_FOR_AUTO_CMD12_INDEX_ERROR ,Force Event for Auto Cmd12 Index Error" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FORCE_EVENT_FOR_AUTO_CMD12_END_BIT_ERROR ,Force Event for Auto Cmd12 End Bit Error" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " FORCE_EVENT_FOR_AUTO_CMD12_CRC_ERROR ,Force Event for Auto Cmd12 CRC Error" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FORCE_EVENT_FOR_AUTO_CMD12_TIMEOUT_ERROR ,Force Event for Auto Cmd12 Timeout Error" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " FORCE_EVENT_FOR_AUTO_CMD12_NOT_EXECUTED ,Force Event for Auto Cmd12 Not Executed Error" "No interrupt,Interrupt"
|
|
width 47.
|
|
group.long 0x54++0x07
|
|
line.long 0x00 "ADMA_ERROR_STATUS,ADMA error status register"
|
|
eventfld.long 0x00 2. " ADMA_LENGTH_MISMATCH_ERROR ,ADMA Length Mismatch Error" "No error,Error"
|
|
bitfld.long 0x00 0.--1. " ADMA_ERROR_STATE ,ADMA Error State" "ST_STOP,ST_FDS,Reserved,ST_TFR"
|
|
line.long 0x04 "ADMA_SYSTEM_ADDRESS,ADMA system address register"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "BOOT_TIMEOUT_CONTROL,Boot Timeout control register"
|
|
wgroup.long 0x64++0x03
|
|
line.long 0x00 "DEBUG_SELECTION,Debug Selection Register"
|
|
bitfld.long 0x00 0. " DEBUG_SEL ,Debug selection" "Receiver/Fifo ctrl,Cmd/interrupt status/Transmitter/ahb_face/clk"
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "SPI_INTERRUPT_SUPPORT,SPI interrupt support register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SPI_INT_SUPPORT ,SPI interrupt support"
|
|
rgroup.long 0xFC++0x03
|
|
line.long 0x00 "SLOT_INTERRUPT_STATUS_HOST_CONTROLLER_VERSION,Slot interrupt status and Host controller version register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " SPECIFICATION_VERSION_NUMBER ,Host Controller Specification Version."
|
|
hexmask.long.byte 0x00 16.--23. 1. " VENDOR_VERSION_NUMBER ,Vendor Version Number"
|
|
bitfld.long 0x00 7. " INTERRUPT_SIGNAL_FOR_SLOT8 ,Interrupt Signal for Slot 8" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " INTERRUPT_SIGNAL_FOR_SLOT7 ,Interrupt Signal for Slot 7" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 5. " INTERRUPT_SIGNAL_FOR_SLOT6 ,Interrupt Signal for Slot 6" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " INTERRUPT_SIGNAL_FOR_SLOT5 ,Interrupt Signal for Slot 5" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " INTERRUPT_SIGNAL_FOR_SLOT4 ,Interrupt Signal for Slot 4" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " INTERRUPT_SIGNAL_FOR_SLOT3 ,Interrupt Signal for Slot 3" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " INTERRUPT_SIGNAL_FOR_SLOT2 ,Interrupt Signal for Slot 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " INTERRUPT_SIGNAL_FOR_SLOT1 ,Interrupt Signal for Slot 1" "No interrupt,Interrupt"
|
|
width 12.
|
|
tree.end
|
|
tree "SD1"
|
|
base ad:0xE0101000
|
|
width 31.
|
|
group.long 0x00++0x0F
|
|
line.long 0x00 "SDMA_SYSTEM_ADDRESS_REGISTER,This register contains the system memory address for a DMA transfer"
|
|
line.long 0x04 "BLOCK_SIZE_BLOCK_COUNT,Block size and block count register"
|
|
hexmask.long.word 0x04 16.--31. 1. " BLOCKS_COUNT_FOR_CURRENT_TRANSFER ,This register is enabled when Block Count Enable in the Transfer"
|
|
bitfld.long 0x04 12.--14. " HOST_SDMA_BUFFER_SIZE ,Counter clock prescale" "/8,/64,/256,/4096,?..."
|
|
hexmask.long.word 0x04 0.--11. 1. " TRANSFER_BLOCK_SIZE ,Block size for block data transfers for CMD17, CMD18, CMD24, CMD25, and CMD53"
|
|
line.long 0x08 "ARGUMENT,Argument register"
|
|
line.long 0x0C "TRANSFER_MODE_COMMAND,Transfer mode and command register"
|
|
bitfld.long 0x0C 24.--28. " COMMAND_INDEX ,Command number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x0C 22.--23. " COMMAND_TYPE ,Special commands type" "Normal,Suspend,Resume,?..."
|
|
bitfld.long 0x0C 21. " DATA_PRESENT_SELECT ,Data Present Select" "No data,Data present"
|
|
bitfld.long 0x0C 20. " COMMAND_INDEX_CHECK_ENABLE ,Command Index Check Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " COMMAND_CRC_CHECK_ENABLE ,Command CRC Check Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 16.--17. " RESPONSE_TYPE_SELECT ,Response Type Select" "No response,136 bits,48 bits,48 bits/check"
|
|
bitfld.long 0x0C 5. " MULTI_SINGLE_BLOCK_SELECT ,Enables multiple block DAT line data transfers" "Disabled,Enabled"
|
|
bitfld.long 0x0C 4. " DATA_TRANSFER_DIRECTION_SELECT ,Direction of DAT line data transfers" "Write,Read"
|
|
textline " "
|
|
bitfld.long 0x0C 2. " AUTO_CMD12_ENABLE ,Auto CMD12 enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 1. " BLOCK_COUNT_ENABLE ,Block count enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " DMA_ENABLE ,DMA enable" "Disabled,Enabled"
|
|
rgroup.long 0x10++0x0F
|
|
line.long 0x00 "RESPONSE0,Response register 0"
|
|
line.long 0x04 "RESPONSE1,Response register 1"
|
|
line.long 0x08 "RESPONSE2,Response register 2"
|
|
line.long 0x0C "RESPONSE3,Response register 3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "BUFFER_DATA_PORT,Buffer data port register"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "PRESENT_STATE,Present State register"
|
|
bitfld.long 0x00 24. " CMD_LINE_SIGNAL_LEVEL ,CMD line level" "Low,High"
|
|
bitfld.long 0x00 23. " DAT[3]_BIT3_LINE_SIGNAL_LEVEL ,DAT3 line level" "Low,High"
|
|
bitfld.long 0x00 22. " DAT[2]_BIT2_LINE_SIGNAL_LEVEL ,DAT2 line level" "Low,High"
|
|
bitfld.long 0x00 21. " DAT[1]_BIT1_LINE_SIGNAL_LEVEL ,DAT1 line level" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 20. " DAT[0]_BIT0_LINE_SIGNAL_LEVEL ,DAT0 line level" "Low,High"
|
|
bitfld.long 0x00 19. " WRITE_PROTECT_SWITCH_PIN_LEVEL ,Write protect switch pin level" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " CARD_DETECT_PIN_LEVEL ,Card detect pin value" "Not present,Present"
|
|
bitfld.long 0x00 17. " CARD_STATE_STABLE ,Card state" "Unstable,Stable"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CARD_INSERTED ,Card inserted" "Not inserted,Inserted"
|
|
bitfld.long 0x00 11. " BUFFER_READ_ENABLE ,Buffer Read Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " BUFFER_WRITE_ENABLE ,Buffer Write Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " READ_TRANSFER_ACTIVE ,Read Transfer Active" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 8. " WRITE_TRANSFER_ACTIVE ,Write Transfer Active" "Inactive,Active"
|
|
bitfld.long 0x00 2. " DAT_LINE_ACTIVE ,DAT Line Active" "Inactive,Active"
|
|
bitfld.long 0x00 1. " COMMAND_INHIBIT_DAT ,Command Inhibit (DAT)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " COMMAND_INHIBIT_CMD ,Command Inhibit (CMD)" "Disabled,Enabled"
|
|
width 62.
|
|
group.long 0x28++0x13
|
|
line.long 0x00 "HOST_CONTROL_POWER_CONTROL_BLOCK_GAP_CONTROL_WAKEUP_CONTROL,Host control/power control/block gap control/wake-up control register"
|
|
bitfld.long 0x00 26. " WAKEUP_EVENT_ENABLE_ON_SD_CARD_REMOVAL ,Wakeup event enable on SD card removal" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " WAKEUP_EVENT_ENABLE_ON_SD_CARD_INSERTION ,Wakeup event enable on SD card insertion" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " WAKEUP_EVENT_ENABLE_ON_CARD_INTERRUPT ,Wakeup event enable on card interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " INTERRUPT_AT_BLOCK_GAP ,Interrupt at Block Gap" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. " READ_WAIT_CONTROL ,Read Wait Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CONTINUE_REQUEST ,Continue Request" "Ignored,Restarted"
|
|
textline " "
|
|
bitfld.long 0x00 16. " STOP_AT_BLOCK_GAP_REQUEST ,Stop at Block Gap Request" "Transfered,Stopped"
|
|
bitfld.long 0x00 9.--11. " SD_BUS_VOLTAGE_SELECT ,SD Bus Voltage select" "Reserved,Reserved,Reserved,Reserved,Reserved,1.8V,3.0V,3.3V"
|
|
bitfld.long 0x00 8. " SD_BUS_POWER ,SD Bus Power" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CARD_DETECT_SIGNAL_DETETCTION ,Source for card detection" "SDCD,Card detect test level"
|
|
bitfld.long 0x00 6. " CARD_DETECT_TEST_LEVEL ,Card Detect Test Level" "Not inserted,Inserted"
|
|
bitfld.long 0x00 3.--4. " DMA_SELECT ,DMA mode select" "SDMA,32-bit ADMA1,32-bit AMDA2,64-bit ADMA2"
|
|
textline " "
|
|
bitfld.long 0x00 2. " HIGH_SPEED_ENABLE ,High Speed Enable" "Normal speed,High speed"
|
|
bitfld.long 0x00 1. " DATA_TRANSFER_WIDTH_SD1_OR_SD4 ,Selects the data width of the HC" "1-bit mode,4-bit mode"
|
|
bitfld.long 0x00 0. " LED_CONTROL ,LED control" "Disabled,Enabled"
|
|
line.long 0x04 "CLOCK_CONTROL_TIMEOUT_CONTROL_SOFTWARE_RESET,Clock control/timeout control/software reset register"
|
|
bitfld.long 0x04 26. " SOFTWARE_RESET_FOR_DAT_LINE ,Software Reset for DAT line" "No reset,Reset"
|
|
bitfld.long 0x04 25. " SOFTWARE_RESET_FOR_CMD_LINE ,Software Reset for CMD line" "No reset,Reset"
|
|
bitfld.long 0x04 24. " SOFTWARE_RESET_FOR_ALL ,Software Reset for All" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " DATA_TIMEOUT_COUNTER_VALUE ,Data Timeout Counter Value" "TMCLK* 2^13,TMCLK* 2^14,TMCLK* 2^15,TMCLK* 2^16,TMCLK* 2^17,TMCLK* 2^18,TMCLK* 2^19,TMCLK* 2^20,TMCLK* 2^21,TMCLK* 2^22,TMCLK* 2^23,TMCLK* 2^24,TMCLK* 2^25,TMCLK* 2^26,TMCLK* 2^27,?..."
|
|
hexmask.long.byte 0x04 8.--15. 1. " SDCLK_FREQUENCY_SELECT ,SDCLK Frequency Select"
|
|
bitfld.long 0x04 2. " SD_CLOCK_ENABLE ,SD Clock Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " INTERNAL_CLOCK_STABLE ,Internal Clock Stable" "Not ready,Ready"
|
|
bitfld.long 0x04 0. " INTERNAL_CLOCK_ENABLE ,Internal Clock Enable" "Disabled,Enabled"
|
|
line.long 0x08 "NORMAL_INTERRUPT_STATUS_ERROR_INTERRUPT_STATUS,Normal interrupt status/error interrupt status register"
|
|
eventfld.long 0x08 29. " CEATA_ERROR_STATUS ,CEATA Error Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 28. " TARGET_RESPONSE_ERROR ,Target Response Error" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 25. " ADMA_ERROR ,ADMA Error" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 24. " AUTO_CMD12_ERROR ,Auto CMD12 Error" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 23. " CURRENT_LIMIT_ERROR ,Current Limit Error" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 22. " DATA_END_BIT_ERROR ,Data End Bit Error" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 21. " DATA_CRC_ERROR ,Data CRC Error" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 20. " DATA_TIMEOUT_ERROR ,Data Timeout Error" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 19. " COMMAND_INDEX_ERROR ,Command Index Error" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 18. " COMMAND_END_BIT_ERROR ,Command End Bit Error" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 17. " COMMAND_CRC_ERROR ,Command CRC Error" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 16. " COMMAND_TIMEOUT_ERROR ,Command Timeout Error" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 15. " ERROR_INTERRUPT ,Error Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 10. " BOOT_TERMINATE_INTERRUPT ,Boot Terminate Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 9. " BOOT_ACK_RCV ,Boot Acknowlede Received" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 8. " CARD_INTERRUPT ,Card Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 7. " CARD_REMOVAL ,Card Removal" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 6. " CARD_INSERTION ,Card Insertion" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 5. " BUFFER_READ_READY ,Buffer Read Ready" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 4. " BUFFER_WRITE_READY ,Buffer Write Ready" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 3. " DMA_INTERRUPT ,DMA Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x08 2. " BLOCK_GAP_EVENT ,Block Gap Event" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 1. " TRANSFER_COMPLETE ,Transfer Complete" "No interrupt,Interrupt"
|
|
eventfld.long 0x08 0. " COMMAND_COMPLETE ,Command complete" "No interrupt,Interrupt"
|
|
line.long 0x0C "NORMAL_INTERRUPT_STATUS_ENABLE_ERROR_INTERRUPT_STATUS_ENABLE,Normal interrupt status enable/error interrupt status enable register"
|
|
bitfld.long 0x0C 29. " CEATA_ERROR_STATUS_ENABLE ,CEATA Error Status" "Disabled,Enabled"
|
|
bitfld.long 0x0C 28. " TARGET_RESPONSE_ERROR_ENABLE ,Target Response Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 25. " ADMA_ERROR_ENABLE ,ADMA Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " AUTO_CMD12_ERROR_ENABLE ,Auto CMD12 Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 23. " CURRENT_LIMIT_ERROR_ENABLE ,Current Limit Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 22. " DATA_END_BIT_ERROR_ENABLE ,Data End Bit Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 21. " DATA_CRC_ERROR_ENABLE ,Data CRC Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 20. " DATA_TIMEOUT_ERROR_ENABLE ,Data Timeout Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 19. " COMMAND_INDEX_ERROR_ENABLE ,Command Index Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 18. " COMMAND_END_BIT_ERROR_ENABLE ,Command End Bit Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 17. " COMMAND_CRC_ERROR_ENABLE ,Command CRC Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 16. " COMMAND_TIMEOUT_ERROR_ENABLE ,Command Timeout Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " FIXED_TO_0_ENABLE ,Fixed to 0" "0,1"
|
|
bitfld.long 0x0C 10. " BOOT_TERMINATE_INTERRUPT_ENABLE ,Boot Terminate Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 9. " BOOT_ACK_RCV_ENABLE ,Boot Acknowlede Received Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 8. " CARD_INTERRUPT_ENABLE ,Card Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 7. " CARD_REMOVAL_ENABLE ,Card Removal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 6. " CARD_INSERTION_ENABLE ,Card Insertion Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 5. " BUFFER_READ_READY_ENABLE ,Buffer Read Ready Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 4. " BUFFER_WRITE_READY_ENABLE ,Buffer Write Ready Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 3. " DMA_INTERRUPT_ENABLE ,DMA Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 2. " BLOCK_GAP_EVENT_ENABLE ,Block Gap Event Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 1. " TRANSFER_COMPLETE_ENABLE ,Transfer Complete Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " COMMAND_COMPLETE_ENABLE ,Command Complete Enable" "Disabled,Enabled"
|
|
line.long 0x10 " NORMAL_INTERRUPT_SIGNAL_ENABLE_ERROR_INTERRUPT_SIGNAL_ENABLE,Normal interrupt signal enable/error interrupt signal enable register"
|
|
bitfld.long 0x10 29. " CEATA_ERROR_SIGNAL_ENABLE ,CEATA Error Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 28. " TARGET_RESPONSE_ERROR_SIGNAL_ENABLE ,Target Response Error Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 25. " ADMA_ERROR_SIGNAL_ENABLE ,ADMA Error Signal Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 24. " AUTO_CMD12_ERROR_SIGNAL_ENABLE ,Auto CMD12 Error Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 23. " CURRENT_LIMIT_ERROR_SIGNAL_ENABLE ,Current Limit Error Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 22. " DATA_END_BIT_ERROR_SIGNAL_ENABLE ,Data End Bit Error Signal Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 21. " DATA_CRC_ERROR_SIGNAL_ENABLE ,Data CRC Error Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 20. " DATA_TIMEOUT_ERROR_SIGNAL_ENABLE ,Data Timeout Error Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 19. " COMMAND_INDEX_ERROR_SIGNAL_ENABLE ,Command Index Error Signal Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 18. " COMMAND_END_BIT_ERROR_SIGNAL_ENABLE ,Command End Bit Error Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 17. " COMMAND_CRC_ERROR_SIGNAL_ENABLE ,Command CRC Error Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 16. " COMMAND_TIMEOUT_ERROR_SIGNAL_ENABLE ,Command Timeout Error Signal Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 15. " FIXED_TO_0_SIGNAL_ENABLE ,Fixed to 0" "0,1"
|
|
bitfld.long 0x10 10. " BOOT_TERMINATE_INTERRUPT_SIGNAL_ENABLE ,Boot Terminate Interrupt Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 9. " BOOT_ACK_RCV_SIGNAL_ENABLE ,Boot Acknowlede Received Signal Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 8. " CARD_INTERRUPT_SIGNAL_ENABLE ,Card Interrupt Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 7. " CARD_REMOVAL_SIGNAL_ENABLE ,Card Removal Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 6. " CARD_INSERTION_SIGNAL_ENABLE ,Card Insertion Signal Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 5. " BUFFER_READ_READY_SIGNAL_ENABLE ,Buffer Read Ready Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 4. " BUFFER_WRITE_READY_SIGNAL_ENABLE ,Buffer Write Ready Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 3. " DMA_INTERRUPT_SIGNAL_ENABLE ,DMA Interrupt Signal Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 2. " BLOCK_GAP_EVENT_SIGNAL_ENABLE ,Block Gap Event Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " TRANSFER_COMPLETE_SIGNAL_ENABLE ,Transfer Complete Signal Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " COMMAND_COMPLETE_SIGNAL_ENABLE ,Command Complete Signal Enable" "Disabled,Enabled"
|
|
rgroup.long 0x3C++0x07
|
|
line.long 0x00 "AUTO_CMD12_ERROR_STATUS,Auto CMD12 error status register"
|
|
bitfld.long 0x00 7. " COMMAND_NOT_ISSUED_BY_AUTO_CMD12_ERROR ,Command Not Issued by Auto CMD12 Error" "No error,Error"
|
|
bitfld.long 0x00 4. " AUTO_CMD12_INDEX_ERROR ,Auto CMD12 Index Error" "No error,Error"
|
|
bitfld.long 0x00 3. " AUTO_CMD12_END_BIT_ERROR ,Auto CMD12 End Bit Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AUTO_CMD12_CRC_ERROR ,Auto CMD12 CRC Error" "No error,Error"
|
|
bitfld.long 0x00 1. " AUTO_CMD12_TIMEOUT_ERROR ,Auto CMD12 Timeout Error" "No error,Error"
|
|
bitfld.long 0x00 0. " AUTO_CMD12_NOT_EXECUTED ,Auto CMD12 Not Executed" "Executed,Not executed"
|
|
line.long 0x04 "CAPABILITIES,Capabilities register"
|
|
bitfld.long 0x04 30. " SPI_BLOCK_MODE ,SPI Block Mode" "Not supported,Supported"
|
|
bitfld.long 0x04 29. " SPI_MODE ,SPI Mode" "Not supported,Supported"
|
|
bitfld.long 0x04 28. " 64_BIT_SYSTEM_BUS_SUPPORT ,64-Bit System Bus Support" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x04 27. " INTERRUPT_MODE ,Interrupt Mode" "Not supported,Supported"
|
|
bitfld.long 0x04 26. " VOLTAGE_SUPPORT_1_8_V ,1.8V Voltage Support" "Not supported,Supported"
|
|
bitfld.long 0x04 25. " VOLTAGE_SUPPORT_3_0_V ,3.0V Voltage Support" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x04 24. " VOLTAGE_SUPPORT_3_3_V ,3.3V Voltage Support" "Not supported,Supported"
|
|
bitfld.long 0x04 23. " SUSPEND_RESUME_SUPPORT ,Suspend / Resume Support" "Not supported,Supported"
|
|
bitfld.long 0x04 22. " SDMA_SUPPORT ,SDMA Support" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x04 21. " HIGH_SPEED_SUPPORT ,High Speed Support" "Not supported,Supported"
|
|
bitfld.long 0x04 19. " ADMA2_SUPPORT ,ADMA2 Support" "Not supported,Supported"
|
|
bitfld.long 0x04 18. " EXTENDED_MEDIA_BUS_SUPPORT ,Extended Media Bus Support" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x04 16.--17. " MAX_BLOCK_LENGTH ,Maximum Block size" "512 bytes,1024 bytes,2048 bytes,4096 bytes"
|
|
bitfld.long 0x04 8.--13. " BASE_CLOCK_FREQUENCY_FOR_SD_CLOCK ,Base Clock Frequency for SD clock" "0 MHz,1 MHz,2 MHz,3 MHz,4 MHz,5 MHz,6 MHz,7 MHz,8 MHz,9 MHz,10 MHz,11 MHz,12 MHz,13 MHz,14 MHz,15 MHz,16 MHz,17 MHz,18 MHz,19 MHz,20 MHz,21 MHz,22 MHz,23 MHz,24 MHz,25 MHz,26 MHz,27 MHz,28 MHz,29 MHz,30 MHz,31 MHz,32 MHz,33 MHz,34 MHz,35 MHz,36 MHz,37 MHz,38 MHz,39 MHz,40 MHz,41 MHz,42 MHz,43 MHz,44 MHz,45 MHz,46 MHz,47 MHz,48 MHz,49 MHz,50 MHz,51 MHz,52 MHz,53 MHz,54 MHz,55 MHz,56 MHz,57 MHz,58 MHz,59 MHz,60 MHz,61 MHz,62 MHz,63 MHz"
|
|
bitfld.long 0x04 7. " TIMEOUT_CLOCK_UNIT ,Timeout Clock Unit" "kHz,MHz"
|
|
textline " "
|
|
bitfld.long 0x04 0.--5. " TIMEOUT_CLOCK_FREQUENCY ,Timeout Clock Frequency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "MAXIMUM_CURRENT_CAPABILITIES,Maximum current capabilities register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MAXIMUM_CURRENT_FOR_1_8V ,Maximum Current for 1.8V"
|
|
hexmask.long.byte 0x00 8.--15. 1. " MAXIMUM_CURRENT_FOR_3_0V ,Maximum Current for 3.0V"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MAXIMUM_CURRENT_FOR_3_3V ,Maximum Current for 3.3V"
|
|
width 75.
|
|
wgroup.long 0x50++0x03
|
|
line.long 0x00 "FORCE_EVENT_FOR_AUTOCMD12_ERROR_STATUS_FORCE_EVENT_REGISTER_FOR_ERROR_INT,Force event register for Auto CMD12 error status/force event register for error interrupt status"
|
|
bitfld.long 0x00 31. " FORCE_EVENT_FOR_VENDOR_SPECIFIC_ERROR_STATUS[1] ,Additional status bits can be defined in this register by the vendor" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. " FORCE_EVENT_FOR_VENDOR_SPECIFIC_ERROR_STATUS[0] ,Additional status bits can be defined in this register by the vendor" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FORCE_EVENT_FOR_CEATA_ERROR ,Force Event for Ceata Error" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 28. " FORCE_EVENT_FOR_TARGET_RESPONSE_ERROR ,Force Event for Target Response Error" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FORCE_EVENT_FOR_ADMA_ERROR ,Force Event for ADMA Error" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. " FORCE_EVENT_FOR_AUTO_CMD12_ERROR ,Force Event for Auto CMD12 Error" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FORCE_EVENT_FOR_CURRENT_LIMIT_ERROR ,Force Event for Current Limit Error" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 22. " FORCE_EVENT_FOR_DATA_END_BIT_ERROR ,Force Event for Data End Bit Error" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FORCE_EVENT_FOR_DATA_CRC_ERROR ,Force Event for Data CRC Error" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " FORCE_EVENT_FOR_DATA_TIMEOUT_ERROR ,Force Event for Data Timeout Error" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FORCE_EVENT_FOR_COMMAND_INDEX_ERROR ,Force Event for Command Index Error" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. " FORCE_EVENT_FOR_COMMAND_END_BIT_ERROR ,Force Event for Command End Bit Error" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 17. " FORCE_EVENT_FOR_COMMAND_CRC_ERROR ,Force Event for Command CRC Error" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16. " FORCE_EVENT_FOR_COMMAND_TIMEOUT_ERROR ,Force Event for Command Timeout Error" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FORCE_EVENT_FOR_COMMAND_NOT_ISSUED_BY_AUTO_CMD12_ERROR ,Force Event for Command not Issued by Auto Cmd12 Error" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " FORCE_EVENT_FOR_AUTO_CMD12_INDEX_ERROR ,Force Event for Auto Cmd12 Index Error" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FORCE_EVENT_FOR_AUTO_CMD12_END_BIT_ERROR ,Force Event for Auto Cmd12 End Bit Error" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " FORCE_EVENT_FOR_AUTO_CMD12_CRC_ERROR ,Force Event for Auto Cmd12 CRC Error" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FORCE_EVENT_FOR_AUTO_CMD12_TIMEOUT_ERROR ,Force Event for Auto Cmd12 Timeout Error" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " FORCE_EVENT_FOR_AUTO_CMD12_NOT_EXECUTED ,Force Event for Auto Cmd12 Not Executed Error" "No interrupt,Interrupt"
|
|
width 47.
|
|
group.long 0x54++0x07
|
|
line.long 0x00 "ADMA_ERROR_STATUS,ADMA error status register"
|
|
eventfld.long 0x00 2. " ADMA_LENGTH_MISMATCH_ERROR ,ADMA Length Mismatch Error" "No error,Error"
|
|
bitfld.long 0x00 0.--1. " ADMA_ERROR_STATE ,ADMA Error State" "ST_STOP,ST_FDS,Reserved,ST_TFR"
|
|
line.long 0x04 "ADMA_SYSTEM_ADDRESS,ADMA system address register"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "BOOT_TIMEOUT_CONTROL,Boot Timeout control register"
|
|
wgroup.long 0x64++0x03
|
|
line.long 0x00 "DEBUG_SELECTION,Debug Selection Register"
|
|
bitfld.long 0x00 0. " DEBUG_SEL ,Debug selection" "Receiver/Fifo ctrl,Cmd/interrupt status/Transmitter/ahb_face/clk"
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "SPI_INTERRUPT_SUPPORT,SPI interrupt support register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SPI_INT_SUPPORT ,SPI interrupt support"
|
|
rgroup.long 0xFC++0x03
|
|
line.long 0x00 "SLOT_INTERRUPT_STATUS_HOST_CONTROLLER_VERSION,Slot interrupt status and Host controller version register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " SPECIFICATION_VERSION_NUMBER ,Host Controller Specification Version."
|
|
hexmask.long.byte 0x00 16.--23. 1. " VENDOR_VERSION_NUMBER ,Vendor Version Number"
|
|
bitfld.long 0x00 7. " INTERRUPT_SIGNAL_FOR_SLOT8 ,Interrupt Signal for Slot 8" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " INTERRUPT_SIGNAL_FOR_SLOT7 ,Interrupt Signal for Slot 7" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 5. " INTERRUPT_SIGNAL_FOR_SLOT6 ,Interrupt Signal for Slot 6" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " INTERRUPT_SIGNAL_FOR_SLOT5 ,Interrupt Signal for Slot 5" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " INTERRUPT_SIGNAL_FOR_SLOT4 ,Interrupt Signal for Slot 4" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " INTERRUPT_SIGNAL_FOR_SLOT3 ,Interrupt Signal for Slot 3" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " INTERRUPT_SIGNAL_FOR_SLOT2 ,Interrupt Signal for Slot 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " INTERRUPT_SIGNAL_FOR_SLOT1 ,Interrupt Signal for Slot 1" "No interrupt,Interrupt"
|
|
width 12.
|
|
tree.end
|
|
tree.end
|
|
tree "SLCR (System Level Control Registers)"
|
|
base ad:0xF8000000
|
|
width 18.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SCL,Secure Configuration Lock"
|
|
bitfld.long 0x00 0. " LOCK ,Secure configuration lock" "Unlocked,Locked"
|
|
wgroup.long 0x04++0x07
|
|
line.long 0x00 "SLCR_LOCK,SLCR Write Protection Lock"
|
|
hexmask.long.word 0x00 0.--15. 1. " LOCK_KEY ,Lock key"
|
|
line.long 0x04 "SLCR_UNLOCK,SLCR Write Protection Unlock"
|
|
hexmask.long.word 0x04 0.--15. 1. " UNLOCK_KEY ,Unlock key"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "SLCR_LOCKSTA,SLCR Write Protection Status"
|
|
bitfld.long 0x00 0. " LOCK_STATUS ,Current state of write protection mode of SLCR" "Writeable,Non writeable"
|
|
group.long 0x100++0x0B
|
|
line.long 0x00 "ARM_PLL_CTRL,ARM PLL Control"
|
|
bitfld.long 0x00 25. " UPDATE_SERVICED ,PLL update serviced" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " UPDATE_CLR ,Clear PLL update " "No effect,Cleared"
|
|
hexmask.long.byte 0x00 12.--18. 1. " PLL_FDIV ,Provides the feedback divisor for the PLL."
|
|
bitfld.long 0x00 4. " PLL_BYPASS_FORCE ,PLL bypass force" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PLL_BYPASS_QUAL ,Qualifies the PLL bootstrap signal sampled from boot_mode[3] in the MIO" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " PLL_PWRDWN ,PLL powerdown" "Powered up,Powered down"
|
|
bitfld.long 0x00 0. " PLL_RESET ,PLL reset" "No reset,Reset"
|
|
line.long 0x04 "DDR_PLL_CTRL,DDR PLL Control"
|
|
bitfld.long 0x04 25. " UPDATE_SERVICED ,PLL update serviced" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " UPDATE_CLR ,Clear PLL update " "No effect,Cleared"
|
|
hexmask.long.byte 0x04 12.--18. 1. " PLL_FDIV ,Provides the feedback divisor for the PLL."
|
|
bitfld.long 0x04 4. " PLL_BYPASS_FORCE ,PLL bypass force" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x04 3. " PLL_BYPASS_QUAL ,Qualifies the PLL bootstrap signal sampled from boot_mode[3] in the MIO" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " PLL_PWRDWN ,PLL powerdown" "Powered up,Powered down"
|
|
bitfld.long 0x04 0. " PLL_RESET ,PLL reset" "No reset,Reset"
|
|
line.long 0x08 "IO_PLL_CTRL,IO PLL Control"
|
|
bitfld.long 0x08 25. " UPDATE_SERVICED ,PLL update serviced" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " UPDATE_CLR ,Clear PLL update " "No effect,Cleared"
|
|
hexmask.long.byte 0x08 12.--18. 1. " PLL_FDIV ,Provides the feedback divisor for the PLL."
|
|
bitfld.long 0x08 4. " PLL_BYPASS_FORCE ,PLL bypass force" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x08 3. " PLL_BYPASS_QUAL ,Qualifies the PLL bootstrap signal sampled from boot_mode[3] in the MIO" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " PLL_PWRDWN ,PLL powerdown" "Powered up,Powered down"
|
|
bitfld.long 0x08 0. " PLL_RESET ,PLL reset" "No reset,Reset"
|
|
rgroup.long 0x10C++0x03
|
|
line.long 0x00 "PLL_STATUS,PLL Status"
|
|
bitfld.long 0x00 5. " IO_PLL_STABLE ,IO PLL clock stable status" "Unstable,Stable"
|
|
bitfld.long 0x00 4. " DDR_PLL_STABLE ,DDR PLL clock stable status" "Unstable,Stable"
|
|
bitfld.long 0x00 3. " ARM_PLL_STABLE ,ARM PLL clock stable status" "Unstable,Stable"
|
|
bitfld.long 0x00 2. " IO_PLL_LOCK ,IO PLL lock status" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DDR_PLL_LOCK ,DDR PLL lock status" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " ARM_PLL_LOCK ,ARM PLL lock status" "Not locked,Locked"
|
|
group.long 0x110++0xB7
|
|
line.long 0x00 "ARM_PLL_CFG,ARM PLL Configuration"
|
|
bitfld.long 0x00 24.--28. " LOCK_DLY ,Lock delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 12.--21. 1. " LOCK_CNT ,Lock counter"
|
|
bitfld.long 0x00 8.--11. " PLL_CP ,PLL charge pump control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " PLL_RES ,PLL loop filter resistor control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "DDR_PLL_CFG,DDR PLL Configuration"
|
|
bitfld.long 0x04 24.--28. " LOCK_DLY ,Lock delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x04 12.--21. 1. " LOCK_CNT ,Lock counter"
|
|
bitfld.long 0x04 8.--11. " PLL_CP ,PLL charge pump control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 4.--7. " PLL_RES ,PLL loop filter resistor control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "IO_PLL_CFG,IO PLL Configuration"
|
|
bitfld.long 0x08 24.--28. " LOCK_DLY ,Lock delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x08 12.--21. 1. " LOCK_CNT ,Lock counter"
|
|
bitfld.long 0x08 8.--11. " PLL_CP ,PLL charge pump control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 4.--7. " PLL_RES ,PLL loop filter resistor control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x0C "PLL_BG_CTRL,PLL Bandgap control"
|
|
bitfld.long 0x0C 0. " BG_PWRDWN ,BandGap powerdown" "Powered up,Powered down"
|
|
line.long 0x10 "ARM_CLK_CTRL,CORTEX A9 Clock Control"
|
|
bitfld.long 0x10 28. " CPU_PERI_CLKACT ,Clock active" "Disabled,Enabled"
|
|
bitfld.long 0x10 27. " CPU_1XCLKACT ,Clock active" "Disabled,Enabled"
|
|
bitfld.long 0x10 26. " CPU_2XCLKACT ,Clock active" "Disabled,Enabled"
|
|
bitfld.long 0x10 25. " CPU_3OR2XCLKACT ,Clock active" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 24. " CPU_6OR4XCLKACT ,Clock active" "Disabled,Enabled"
|
|
hexmask.long.byte 0x10 8.--13. 1. " DIVISOR ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
bitfld.long 0x10 4.--5. " SRCSEL ,Source used to generate the clock" "CPU PLL,CPU PLL,DDR divided clock,IO PLL"
|
|
line.long 0x14 "DDR_CLK_CTRL,DDR Clock Control"
|
|
hexmask.long.byte 0x14 26.--31. 1. " DDR_2XCLK_DIVISOR ,Divisor value for the ddr_2xclk"
|
|
hexmask.long.byte 0x14 20.--25. 1. " DDR_3XCLK_DIVISOR ,Divisor value for the ddr_3xclk"
|
|
bitfld.long 0x14 1. " DDR_2XCLKACT ,Clock active" "Disabled,Enabled"
|
|
bitfld.long 0x14 0. " DDR_3XCLKACT ,Clock active" "Disabled,Enabled"
|
|
line.long 0x18 "DCI_CLK_CTRL,DCI clock control"
|
|
hexmask.long.byte 0x18 20.--25. 1. " DIVISOR1 ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
hexmask.long.byte 0x18 8.--13. 1. " DIVISOR0 ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
bitfld.long 0x18 0. " CLKACT ,Clock active" "Disabled,Enabled"
|
|
line.long 0x1C "APER_CLK_CTRL,AMBA Peripheral Clock Control"
|
|
bitfld.long 0x1C 24. " SMC_CPU_1XCLKACT ,SMC AMBA Clock active" "Disabled,Enabled"
|
|
bitfld.long 0x1C 23. " LQSPI_CPU_1XCLKACT ,LQSPI AMBA Clock active" "Disabled,Enabled"
|
|
bitfld.long 0x1C 22. " GPIO_CPU_1XCLKACT ,GPIO AMBA Clock active" "Disabled,Enabled"
|
|
bitfld.long 0x1C 21. " UART1_CPU_1XCLKACT ,UART 1 AMBA Clock active" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 20. " UART0_CPU_1XCLKACT ,UART 0 AMBA Clock active" "Disabled,Enabled"
|
|
bitfld.long 0x1C 19. " I2C1_CPU_1XCLKACT ,I2C 1 AMBA Clock active" "Disabled,Enabled"
|
|
bitfld.long 0x1C 18. " I2C0_CPU_1XCLKACT ,I2C 0 AMBA Clock active" "Disabled,Enabled"
|
|
bitfld.long 0x1C 17. " CAN1_CPU_1XCLKACT ,CAN 1 AMBA Clock active" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 16. " CAN0_CPU_1XCLKACT ,CAN 0 AMBA Clock active" "Disabled,Enabled"
|
|
bitfld.long 0x1C 15. " SPI1_CPU_1XCLKACT ,SPI 1 AMBA Clock active" "Disabled,Enabled"
|
|
bitfld.long 0x1C 14. " SPI0_CPU_1XCLKACT ,SPI 0 AMBA Clock active" "Disabled,Enabled"
|
|
bitfld.long 0x1C 11. " SDI1_CPU_1XCLKACT ,SDIO 1 AMBA Clock active" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 10. " SDI0_CPU_1XCLKACT ,SDIO0 AMBA Clock active" "Disabled,Enabled"
|
|
bitfld.long 0x1C 7. " GEM1_CPU_1XCLKACT ,Gigabit Ethernet MAC 1 AMBA Clock active" "Disabled,Enabled"
|
|
bitfld.long 0x1C 6. " GEM0_CPU_1XCLKACT ,Gigabit Ethernet MAC 0 AMBA Clock active" "Disabled,Enabled"
|
|
bitfld.long 0x1C 3. " USB1_CPU_1XCLKACT ,USB 1 AMBA Clock active" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 2. " USB0_CPU_1XCLKACT ,USB 0 AMBA Clock active" "Disabled,Enabled"
|
|
bitfld.long 0x1C 0. " DMA_CPU_2XCLKACT ,DMA 0 AMBA Clock active" "Disabled,Enabled"
|
|
line.long 0x20 "USB0_CLK_CTRL,USB 0 ULPI Clock Control"
|
|
hexmask.long.byte 0x20 20.--25. 1. " DIVISOR1 ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
hexmask.long.byte 0x20 8.--13. 1. " DIVISOR0 ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
bitfld.long 0x20 4.--6. " SRCSEL ,Selects the source used to generate the clock" "IO PLL,IO PLL,ARM PLL,DDR PLL,USB0 MIO ULPI,USB0 MIO ULPI,USB0 MIO ULPI,USB0 MIO ULPI"
|
|
bitfld.long 0x20 0. " CLKACT ,Clock active" "Disabled,Enabled"
|
|
line.long 0x24 "USB1_CLK_CTRL,USB 1 ULPI Clock Control"
|
|
hexmask.long.byte 0x24 20.--25. 1. " DIVISOR1 ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
hexmask.long.byte 0x24 8.--13. 1. " DIVISOR0 ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
bitfld.long 0x24 4.--6. " SRCSEL ,Selects the source used to generate the clock" "IO PLL,IO PLL,ARM PLL,DDR PLL,USB0 MIO ULPI,USB0 MIO ULPI,USB0 MIO ULPI,USB0 MIO ULPI"
|
|
bitfld.long 0x24 0. " CLKACT ,Clock active" "Disabled,Enabled"
|
|
line.long 0x28 "GEM0_RCLK_CTRL,Gigabit Ethernet MAC 0 RX Clock Control"
|
|
bitfld.long 0x28 4. " SRCSEL ,Selects the source used to generate the clock" "GEM 0 MIO RX,GEM 0 EMIO RX"
|
|
bitfld.long 0x28 0. " CLKACT ,Clock active" "Disabled,Enabled"
|
|
line.long 0x2C "GEM1_RCLK_CTRL,Gigabit Ethernet MAC 1 RX Clock Control"
|
|
bitfld.long 0x2C 4. " SRCSEL ,Selects the source used to generate the clock" "GEM 1 MIO RX,GEM 1 EMIO RX"
|
|
bitfld.long 0x2C 0. " CLKACT ,Clock active" "Disabled,Enabled"
|
|
line.long 0x30 "GEM0_CLK_CTRL,Gigabit Ethernet MAC 0 Ref Clock Control"
|
|
hexmask.long.byte 0x30 20.--25. 1. " DIVISOR1 ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
hexmask.long.byte 0x30 8.--13. 1. " DIVISOR0 ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
bitfld.long 0x30 4.--6. " SRCSEL ,Selects the source used to generate the clock" "IO PLL,IO PLL,ARM PLL,DDR PLL,Ethernet 0 FMIO clock,Ethernet 0 FMIO clock,Ethernet 0 FMIO clock,Ethernet 0 FMIO clock"
|
|
bitfld.long 0x30 0. " CLKACT ,Clock active" "Disabled,Enabled"
|
|
line.long 0x34 "GEM1_CLK_CTRL,Gigabit Ethernet MAC 1 Ref Clock Control"
|
|
hexmask.long.byte 0x34 20.--25. 1. " DIVISOR1 ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
hexmask.long.byte 0x34 8.--13. 1. " DIVISOR0 ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
bitfld.long 0x34 4.--6. " SRCSEL ,Selects the source used to generate the clock" "IO PLL,IO PLL,ARM PLL,DDR PLL,Ethernet 1 FMIO clock,Ethernet 1 FMIO clock,Ethernet 1 FMIO clock,Ethernet 1 FMIO clock"
|
|
bitfld.long 0x34 0. " CLKACT ,Clock active" "Disabled,Enabled"
|
|
line.long 0x38 "SMC_CLK_CTRL,SMC Reference Clock Control"
|
|
hexmask.long.byte 0x38 8.--13. 1. " DIVISOR ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
bitfld.long 0x38 4.--5. " SRCSEL ,Selects the source used to generate the clock" "IO PLL,IO PLL,ARM PLL,DDR PLL"
|
|
bitfld.long 0x38 0. " CLKACT ,Clock active" "Disabled,Enabled"
|
|
line.long 0x3C "LQSPI_CLK_CTRL,Linear Quad-SPI Reference Clock Control"
|
|
hexmask.long.byte 0x3C 8.--13. 1. " DIVISOR ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
bitfld.long 0x3C 4.--5. " SRCSEL ,Selects the source used to generate the clock" "IO PLL,IO PLL,ARM PLL,DDR PLL"
|
|
bitfld.long 0x3C 0. " CLKACT ,Clock active" "Disabled,Enabled"
|
|
line.long 0x40 "SDIO_CLK_CTRL,SDIO Reference Clock Control"
|
|
hexmask.long.byte 0x40 8.--13. 1. " DIVISOR ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
bitfld.long 0x40 4.--5. " SRCSEL ,Selects the source used to generate the clock" "IO PLL,IO PLL,ARM PLL,DDR PLL"
|
|
bitfld.long 0x40 1. " CLKACT1 ,SDIO 1 Clock active" "Disabled,Enabled"
|
|
bitfld.long 0x40 0. " CLKACT0 ,SDIO 0 clock active" "Disabled,Enabled"
|
|
line.long 0x44 "UART_CLK_CTRL,UART Reference Clock Control"
|
|
hexmask.long.byte 0x44 8.--13. 1. " DIVISOR ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
bitfld.long 0x44 4.--5. " SRCSEL ,Selects the source used to generate the clock" "IO PLL,IO PLL,ARM PLL,DDR PLL"
|
|
bitfld.long 0x44 1. " CLKACT1 ,UART 1 reference clock active" "Disabled,Enabled"
|
|
bitfld.long 0x44 0. " CLKACT0 ,UART 0 reference clock active" "Disabled,Enabled"
|
|
line.long 0x48 "SPI_CLK_CTRL,SPI Reference Clock Control"
|
|
hexmask.long.byte 0x48 8.--13. 1. " DIVISOR ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
bitfld.long 0x48 4.--5. " SRCSEL ,Selects the source used to generate the clock" "IO PLL,IO PLL,ARM PLL,DDR PLL"
|
|
bitfld.long 0x48 1. " CLKACT1 ,SPI 1 reference clock active" "Disabled,Enabled"
|
|
bitfld.long 0x48 0. " CLKACT0 ,SPI 0 reference clock active" "Disabled,Enabled"
|
|
line.long 0x4C "CAN_CLK_CTRL,CAN Reference Clock Control"
|
|
hexmask.long.byte 0x4C 20.--25. 1. " DIVISOR1 ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
hexmask.long.byte 0x4C 8.--13. 1. " DIVISOR0 ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
bitfld.long 0x4C 4.--5. " SRCSEL ,Selects the source used to generate the clock" "IO PLL,IO PLL,ARM PLL,DDR PLL"
|
|
bitfld.long 0x4C 1. " CLKACT1 ,CAN 1 reference clock active" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4C 0. " CLKACT0 ,CAN 0 reference clock active" "Disabled,Enabled"
|
|
line.long 0x50 "CAN_MIOCLK_CTRL,CAN MIO Clock Control"
|
|
bitfld.long 0x50 22. " CAN1_REF_SEL ,CAN1 Reference Clock selection" "Internal PLL,MIO based on the next field"
|
|
bitfld.long 0x50 16.--21. " CAN1_MUX ,CAN1 mux selection for MIO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,?..."
|
|
bitfld.long 0x50 6. " CAN0_REF_SEL ,CAN 0 Reference Clock selection" "Internal PLL,MIO based on the next field"
|
|
bitfld.long 0x50 0.--5. " CAN0_MUX ,CAN0 mux selection for MIO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,?..."
|
|
line.long 0x54 "DBG_CLK_CTRL,SoC Debug Clock Control"
|
|
hexmask.long.byte 0x54 8.--13. 1. " DIVISOR ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
bitfld.long 0x54 4.--6. " SRCSEL ,Selects the source used to generate the clock" "IO PLL,IO PLL,ARM PLL,DDR PLL,FMIO trace clock,FMIO trace clock,FMIO trace clock,FMIO trace clock"
|
|
bitfld.long 0x54 1. " CPU_1XCLKAC ,CPU 1x clock active" "Disabled,Enabled"
|
|
bitfld.long 0x54 0. " CLKACT_TRC ,Debug trace clock active" "Disabled,Enabled"
|
|
line.long 0x58 "PCAP_CLK_CTRL,PCAP 2X Clock Contol"
|
|
hexmask.long.byte 0x58 8.--13. 1. " DIVISOR ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
bitfld.long 0x58 4.--5. " SRCSEL ,Selects the source used to generate the clock" "IO PLL,IO PLL,ARM PLL,DDR PLL"
|
|
bitfld.long 0x58 0. " CLKACT ,Clock active" "Disabled,Enabled"
|
|
line.long 0x5C "TOPSW_CLK_CTRL,Top-Level Switch Clock Control"
|
|
bitfld.long 0x5C 0. " CLK_DIS ,Clock disable control" "No,Yes"
|
|
line.long 0x60 "FPGA0_CLK_CTRL,FPGA 0 Output Clock Control"
|
|
hexmask.long.byte 0x60 20.--25. 1. " DIVISOR1 ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
hexmask.long.byte 0x60 8.--13. 1. " DIVISOR0 ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
bitfld.long 0x60 4.--5. " SRCSEL ,Selects the source used to generate the clock" "IO PLL,IO PLL,ARM PLL,DDR PLL"
|
|
line.long 0x64 "FPGA0_THR_CTRL,FPGA 0 Clock Throttle Control"
|
|
bitfld.long 0x64 3. " SYNC ,Indicates whether fpga_stop input from the fabric should be considered synchronous or asynchronous" "Asynchronous,Synchronous"
|
|
bitfld.long 0x64 2. " EDGE ,Selects between edge stop or level stop modes of operation for the clock throttle logic" "Level,Edge"
|
|
bitfld.long 0x64 1. " CNT_RST ,Resets clock throttle counter when in halt state" "No effect,Reset"
|
|
bitfld.long 0x64 0. " CPU_START ,Start or restart count on detection of 0 to 1 transition in the value of this bit" "No effect,Started/Restarted"
|
|
line.long 0x68 "FPGA0_THR_CNT,FPGA 0 Clock Throttle Count"
|
|
bitfld.long 0x68 16.--19. " DLY_CNT ,Delay count value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x68 0.--15. 1. " LAST_CNT ,Last count value"
|
|
line.long 0x6C "FPGA0_THR_STA,FPGA 0 Clock Throttle Status"
|
|
bitfld.long 0x6C 16. " RUNNING ,Current running status of FPGA clock output" "Stopped,Running"
|
|
hexmask.long.word 0x6C 0.--15. 1. " CURR_VAL ,Current clock throttle counter value"
|
|
line.long 0x70 "FPGA1_CLK_CTRL,FPGA 1 Output Clock Control"
|
|
hexmask.long.byte 0x70 20.--25. 1. " DIVISOR1 ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
hexmask.long.byte 0x70 8.--13. 1. " DIVISOR0 ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
bitfld.long 0x70 4.--5. " SRCSEL ,Selects the source used to generate the clock" "IO PLL,IO PLL,ARM PLL,DDR PLL"
|
|
line.long 0x74 "FPGA1_THR_CTRL,FPGA 1 Clock Throttle Control"
|
|
bitfld.long 0x74 3. " SYNC ,Indicates whether fpga_stop input from the fabric should be considered synchronous or asynchronous" "Asynchronous,Synchronous"
|
|
bitfld.long 0x74 2. " EDGE ,Selects between edge stop or level stop modes of operation for the clock throttle logic" "Level,Edge"
|
|
bitfld.long 0x74 1. " CNT_RST ,Resets clock throttle counter when in halt state" "No effect,Reset"
|
|
bitfld.long 0x74 0. " CPU_START ,Start or restart count on detection of 0 to 1 transition in the value of this bit" "No effect,Started/Restarted"
|
|
line.long 0x78 "FPGA1_THR_CNT,FPGA 1 Clock Throttle Count"
|
|
bitfld.long 0x78 16.--19. " DLY_CNT ,Delay count value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x78 0.--15. 1. " LAST_CNT ,Last count value"
|
|
line.long 0x7C "FPGA1_THR_STA,FPGA 1 Clock Throttle Status"
|
|
bitfld.long 0x7C 16. " RUNNING ,Current running status of FPGA clock output" "Stopped,Running"
|
|
hexmask.long.word 0x7C 0.--15. 1. " CURR_VAL ,Current clock throttle counter value"
|
|
line.long 0x80 "FPGA2_CLK_CTRL,FPGA 2 Output Clock Control"
|
|
hexmask.long.byte 0x80 20.--25. 1. " DIVISOR1 ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
hexmask.long.byte 0x80 8.--13. 1. " DIVISOR0 ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
bitfld.long 0x80 4.--5. " SRCSEL ,Selects the source used to generate the clock" "IO PLL,IO PLL,ARM PLL,DDR PLL"
|
|
line.long 0x84 "FPGA2_THR_CTRL,FPGA 2 Clock Throttle Control"
|
|
bitfld.long 0x84 3. " SYNC ,Indicates whether fpga_stop input from the fabric should be considered synchronous or asynchronous" "Asynchronous,Synchronous"
|
|
bitfld.long 0x84 2. " EDGE ,Selects between edge stop or level stop modes of operation for the clock throttle logic" "Level,Edge"
|
|
bitfld.long 0x84 1. " CNT_RST ,Resets clock throttle counter when in halt state" "No effect,Reset"
|
|
bitfld.long 0x84 0. " CPU_START ,Start or restart count on detection of 0 to 1 transition in the value of this bit" "No effect,Started/Restarted"
|
|
line.long 0x88 "FPGA2_THR_CNT,FPGA 2 Clock Throttle Count"
|
|
bitfld.long 0x88 16.--19. " DLY_CNT ,Delay count value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x88 0.--15. 1. " LAST_CNT ,Last count value"
|
|
line.long 0x8C "FPGA2_THR_STA,FPGA 2 Clock Throttle Status"
|
|
bitfld.long 0x8C 16. " RUNNING ,Current running status of FPGA clock output" "Stopped,Running"
|
|
hexmask.long.word 0x8C 0.--15. 1. " CURR_VAL ,Current clock throttle counter value"
|
|
line.long 0x90 "FPGA3_CLK_CTRL,FPGA 3 Output Clock Control"
|
|
hexmask.long.byte 0x90 20.--25. 1. " DIVISOR1 ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
hexmask.long.byte 0x90 8.--13. 1. " DIVISOR0 ,Divisor used to divide the source clock to generate the required generated clock frequency"
|
|
bitfld.long 0x90 4.--5. " SRCSEL ,Selects the source used to generate the clock" "IO PLL,IO PLL,ARM PLL,DDR PLL"
|
|
line.long 0x94 "FPGA3_THR_CTRL,FPGA 3 Clock Throttle Control"
|
|
bitfld.long 0x94 3. " SYNC ,Indicates whether fpga_stop input from the fabric should be considered synchronous or asynchronous" "Asynchronous,Synchronous"
|
|
bitfld.long 0x94 2. " EDGE ,Selects between edge stop or level stop modes of operation for the clock throttle logic" "Level,Edge"
|
|
bitfld.long 0x94 1. " CNT_RST ,Resets clock throttle counter when in halt state" "No effect,Reset"
|
|
bitfld.long 0x94 0. " CPU_START ,Start or restart count on detection of 0 to 1 transition in the value of this bit" "No effect,Started/Restarted"
|
|
line.long 0x98 "FPGA3_THR_CNT,FPGA 3 Clock Throttle Count"
|
|
bitfld.long 0x98 16.--19. " DLY_CNT ,Delay count value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x98 0.--15. 1. " LAST_CNT ,Last count value"
|
|
line.long 0x9C "FPGA3_THR_STA,FPGA 3 Clock Throttle Status"
|
|
bitfld.long 0x9C 16. " RUNNING ,Current running status of FPGA clock output" "Stopped,Running"
|
|
hexmask.long.word 0x9C 0.--15. 1. " CURR_VAL ,Current clock throttle counter value"
|
|
line.long 0xA0 "SYNC_CTRL,Clock Synchronisation Mode Control"
|
|
bitfld.long 0xA0 0. " APU_DDR_SYNC ,Synchronous mode request for L2CC M1 port AsyncAxi bridge" "Asynchronous,Synchronous"
|
|
line.long 0xA4 "SYNC_STATUS,Clock Synchronisation Mode Status"
|
|
bitfld.long 0xA4 0. " APU_DDR_BUSY ,Synchronous mode busy for L2CC M1 port AsyncAxi bridge" "Active,Busy"
|
|
line.long 0xA8 "BANDGAP_TRIM,Band gap trim register"
|
|
bitfld.long 0xA8 8. " TRIM_EN ,Bandgap trim enable" "Disabled,Enabled"
|
|
bitfld.long 0xA8 0.--5. " TRIM_VAL ,Bandgap trim value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0xAC "CC_TEST,Test register"
|
|
bitfld.long 0xAC 4.--6. " FB ,FB" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xAC 0.--2. " LOCK ,LOCK" "0,1,2,3,4,5,6,7"
|
|
line.long 0xB0 "PLL_PREDIVISOR,PLL pre-divisor"
|
|
bitfld.long 0xB0 0.--5. " PRE_DIVISOR ,Divisor value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0xB4 "CLK_621_TRUE,6:2:1 ratio clock"
|
|
bitfld.long 0xB4 0. " CLK_621_TRUE ,Enable the 6:2:1 mode" "4:2:2:1,6:3:2:1"
|
|
group.long 0x1D0++0x0B
|
|
line.long 0x00 "PICTURE_DBG,Picture debug configuartion register"
|
|
bitfld.long 0x00 5.--6. " CLOCK_SEL ,Clock Select" "APU PLL,DDR PLL,IO PLL,?..."
|
|
bitfld.long 0x00 4. " TRIGGER_EN ,Enables all the triggers" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " CNT_LOAD ,Load the count value into the counter" "Not loaded,Loaded"
|
|
bitfld.long 0x00 1.--2. " TRIGGER_SEL ,Trigger Select" "SLCR,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0. " START ,Picture debug start" "Disabled,Enabled"
|
|
line.long 0x04 "PICTURE_DBG_UCNT,Picture debug upper count register"
|
|
line.long 0x08 "PICTURE_DBG_LCNT,Picture debug lower count register"
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "PSS_RST_CTRL,PSS Software Reset Control"
|
|
bitfld.long 0x00 0. " SOFT_RST ,PSS software reset" "No reset,Reset"
|
|
line.long 0x04 "DDR_RST_CTRL,DDR Software Reset Control"
|
|
bitfld.long 0x04 0. " DDR_RST ,DDR software reset" "No reset,Reset"
|
|
group.long 0x20C++0x3B
|
|
line.long 0x00 "DMAC_RST_CTRL,DMAC Software Reset Control"
|
|
bitfld.long 0x00 0. " DMAC_RST ,DMAC software reset" "No reset,Reset"
|
|
line.long 0x04 "USB_RST_CTRL,USB Software Reset Control"
|
|
bitfld.long 0x04 5. " USB1_ULPI_RST ,USB 1 ULPI software reset" "No reset,Reset"
|
|
bitfld.long 0x04 4. " USB0_ULPI_RST ,USB 0 ULPI software reset" "No reset,Reset"
|
|
bitfld.long 0x04 1. " USB1_CPU1X_RST ,USB 1 master and slave AMBA software reset" "No reset,Reset"
|
|
bitfld.long 0x04 0. " USB0_CPU1X_RST ,USB 0 master and slave AMBA software reset" "No reset,Reset"
|
|
line.long 0x08 "GEM_RST_CTRL,Gigabit Ethernet MAC Software Reset Control"
|
|
bitfld.long 0x08 7. " GEM1_REF_RST ,Gigabit Ethernet 1 Reference software reset" "No reset,Reset"
|
|
bitfld.long 0x08 6. " GEM0_REF_RST ,Gigabit Ethernet 0 Reference software reset" "No reset,Reset"
|
|
bitfld.long 0x08 5. " GEM1_RX_RST ,Gigabit Ethernet MAC1 RX software reset" "No reset,Reset"
|
|
bitfld.long 0x08 4. " GEM0_RX_RST ,Gigabit Ethernet MAC 0 RX software reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x08 1. " GEM1_CPU1X_RST ,Gigabit Ethernet MAC 1 software reset" "No reset,Reset"
|
|
bitfld.long 0x08 0. " GEM0_CPU1X_RST ,Gigabit Ethernet MAC 0 software reset" "No reset,Reset"
|
|
line.long 0x0C "SDIO_RST_CTRL,SDIO Software Reset Control"
|
|
bitfld.long 0x0C 5. " SDIO1_REF_RST ,SDIO 1 Reference software reset" "No reset,Reset"
|
|
bitfld.long 0x0C 4. " SDIO0_REF_RST ,SDIO 0 Reference software reset" "No reset,Reset"
|
|
bitfld.long 0x0C 1. " SDIO1_CPU1X_RST ,SDIO 1 master and slave AMBA software reset" "No reset,Reset"
|
|
bitfld.long 0x0C 0. " SDIO0_CPU1X_RST ,SDIO 0 master and slave AMBA software reset" "No reset,Reset"
|
|
line.long 0x10 "SPI_RST_CTRL,SPI Software Reset Control"
|
|
bitfld.long 0x10 3. " SPI1_REF_RST ,SPI 1 Reference software reset" "No reset,Reset"
|
|
bitfld.long 0x10 2. " SPI0_REF_RST ,SPI 0 Reference software reset" "No reset,Reset"
|
|
bitfld.long 0x10 1. " SPI1_CPU1X_RST ,SPI 1 AMBA software reset" "No reset,Reset"
|
|
bitfld.long 0x10 0. " SPI0_CPU1X_RST ,SPI 0 AMBA software reset" "No reset,Reset"
|
|
line.long 0x14 "CAN_RST_CTRL,CAN Software Reset Control"
|
|
bitfld.long 0x14 3. " CAN1_REF_RST ,CAN 1 Reference software reset" "No reset,Reset"
|
|
bitfld.long 0x14 2. " CAN0_REF_RST ,CAN 0 Reference software reset" "No reset,Reset"
|
|
bitfld.long 0x14 1. " CAN1_CPU1X_RST ,CAN 1 AMBA software reset" "No reset,Reset"
|
|
bitfld.long 0x14 0. " CAN0_CPU1X_RST ,CAN 0 AMBA software reset" "No reset,Reset"
|
|
line.long 0x18 "I2C_RST_CTRL,I2C Software Reset Control"
|
|
bitfld.long 0x18 1. " I2C1_CPU1X_RST ,I2C 1 AMBA software reset" "No reset,Reset"
|
|
bitfld.long 0x18 0. " I2C0_CPU1X_RST ,I2C 0 AMBA software reset" "No reset,Reset"
|
|
line.long 0x1C "UART_RST_CTRL,UART Software Reset Control"
|
|
bitfld.long 0x1C 3. " UART1_REF_RST ,UART1 Reference software reset. 0" "No reset,Reset"
|
|
bitfld.long 0x1C 2. " UART0_REF_RST ,UART0 Reference software reset. 0" "No reset,Reset"
|
|
bitfld.long 0x1C 1. " UART1_CPU1X_RST ,UART 1 AMBA software reset" "No reset,Reset"
|
|
bitfld.long 0x1C 0. " UART0_CPU1X_RST ,UART 0 AMBA software reset" "No reset,Reset"
|
|
line.long 0x20 "GPIO_RST_CTRL,GPIO Software Reset Control"
|
|
bitfld.long 0x20 0. " GPIO_CPU1X_RST ,GPIO AMBA software reset" "No reset,Reset"
|
|
line.long 0x24 "LQSPI_RST_CTRL,Linear Quad-SpI Software Reset Control"
|
|
bitfld.long 0x24 1. " QSPI_REF_RST ,QSPI Reference software reset" "No reset,Reset"
|
|
bitfld.long 0x24 0. " LQSPI_CPU1X_RST ,Linear QSPI AMBA software reset" "No reset,Reset"
|
|
line.long 0x28 "SMC_RST_CTRL,SMC Software Reset Control"
|
|
bitfld.long 0x28 1. " SMC_REF_RST ,SMC Reference software reset" "No reset,Reset"
|
|
bitfld.long 0x28 0. " SMC_CPU1X_RST ,SMC AMBA software reset" "No reset,Reset"
|
|
line.long 0x2C "OCM_RST_CTRL,OCM Software Reset Control"
|
|
bitfld.long 0x2C 0. " OCM_RST ,OCM Software Reset" "No reset,Reset"
|
|
line.long 0x30 "DEVCI_RST_CTRL,Device Config Interface Software Reset Control"
|
|
bitfld.long 0x30 1. " DEVCI_CPU1X_RST ,Device Configuration AMBA software reset" "No reset,Reset"
|
|
bitfld.long 0x30 0. " PCAP2X_RST ,Device Configuration PCAP2X software reset" "No reset,Reset"
|
|
line.long 0x34 "FPGA_RST_CTRL,FPGA Software Reset Control"
|
|
bitfld.long 0x34 24. " FPGA_ACP_RST ,FPGA ACP port soft reset" "No reset,Reset"
|
|
bitfld.long 0x34 23. " FPGA_AXDS3_RST ,AXDS3AXI interface soft reset" "No reset,Reset"
|
|
bitfld.long 0x34 22. " FPGA_AXDS2_RST ,AXDS2AXI interface soft reset" "No reset,Reset"
|
|
bitfld.long 0x34 21. " FPGA_AXDS1_RST ,AXDS1AXI interface soft reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x34 20. " FPGA_AXDS0_RST ,AXDS0AXI interface soft reset" "No reset,Reset"
|
|
bitfld.long 0x34 17. " FSSW1_FPGA_RST ,General purpose FPGA slave interface 1 soft reset" "No reset,Reset"
|
|
bitfld.long 0x34 16. " FSSW0_FPGA_RST ,General purpose FPGA slave interface 0 soft reset" "No reset,Reset"
|
|
bitfld.long 0x34 13. " FPGA_FMSW1_RST ,General purpose FPGA master interface 1 soft reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x34 12. " FPGA_FMSW0_RST ,General purpose FPGA master interface 0 soft reset" "No reset,Reset"
|
|
bitfld.long 0x34 11. " FPGA_DMA3_RST ,FPGA DMA 3 peripheral request soft reset" "No reset,Reset"
|
|
bitfld.long 0x34 10. " FPGA_DMA2_RST ,FPGA DMA 2 peripheral request soft reset" "No reset,Reset"
|
|
bitfld.long 0x34 9. " FPGA_DMA1_RST ,FPGA DMA 1 peripheral request soft reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x34 8. " FPGA_DMA0_RST ,FPGA DMA 0 peripheral request soft reset" "No reset,Reset"
|
|
bitfld.long 0x34 3. " FPGA3_OUT_RST ,FPGA3 software reset" "No reset,Reset"
|
|
bitfld.long 0x34 2. " FPGA2_OUT_RST ,FPGA2 software reset" "No reset,Reset"
|
|
bitfld.long 0x34 1. " FPGA1_OUT_RST ,FPGA1 software reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x34 0. " FPGA0_OUT_RST ,FPGA0 software reset" "No reset,Reset"
|
|
line.long 0x38 "A9_CPU_RST_CTRL,A9 CPU software Reset Control"
|
|
bitfld.long 0x38 8. " PERI_RST ,CPU peripheral soft reset" "No reset,Reset"
|
|
bitfld.long 0x38 5. " A9_CLKSTOP1 ,Clock stop for core 1" "No reset,Reset"
|
|
bitfld.long 0x38 4. " A9_CLKSTOP0 ,Clock stop for core 0" "No reset,Reset"
|
|
bitfld.long 0x38 1. " A9_RST1 ,A9 core 1 reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x38 0. " A9_RST0 ,A9 core 0 reset" "No reset,Reset"
|
|
group.long 0x24C++0x03
|
|
line.long 0x00 "RS_AWDT_CTRL,Watchdog Timer Reset Control"
|
|
bitfld.long 0x00 1. " CTRL1 ,APU watchdog timer 1" "No reset,Reset"
|
|
bitfld.long 0x00 0. " CTRL0 ,APU watchdog timer 0" "No reset,Reset"
|
|
rgroup.long 0x250++0x03
|
|
line.long 0x00 "RST_REASON,Reset Reason"
|
|
bitfld.long 0x00 6. " POR ,Last reset was due to POR" "Low,High"
|
|
bitfld.long 0x00 5. " SRST_B ,Last reset was due to SRST_B" "Low,High"
|
|
bitfld.long 0x00 4. " DBG_RST ,Last reset was due to debug system reset" "Low,High"
|
|
bitfld.long 0x00 3. " SLC_RST ,Last reset was due to SLC soft reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AWDT1_RST ,Last reset was due to APU watchdog timer 1" "Low,High"
|
|
bitfld.long 0x00 1. " AWDT0_RST ,Last reset was due to APU watchdog timer 0" "Low,High"
|
|
bitfld.long 0x00 0. " SWDT_RST ,Last reset was due to system watchdog timeout" "Low,High"
|
|
wgroup.long 0x254++0x03
|
|
line.long 0x00 "RST_REASON_CLR,Reset Reason Clear"
|
|
bitfld.long 0x00 0. " CLEAR ,Clears reset reason source within the reset controller" "No effect,Clear"
|
|
group.long 0x258++0x03
|
|
line.long 0x00 "REBOOT_STATUS,Reboot Status"
|
|
rgroup.long 0x25C++0x03
|
|
line.long 0x00 "BOOT_MODE,Boot Mode bootstrap register"
|
|
bitfld.long 0x00 4. " PLL_BYPASS ,PLL bypass" "Not bypassed,Bypassed"
|
|
bitfld.long 0x00 3. " JTAG_MODE ,Sampled bootstrap to indicate current jtag mode" "Cascaded,Independent"
|
|
bitfld.long 0x00 0.--2. " BOOT_DEVICE ,Sampled bootstrap to indicate current boot mode" "JTAG,QSPI,NOR,Reserved,NAND,SDCARD,Reserved,Reserved"
|
|
group.long 0x300++0x07
|
|
line.long 0x00 "APU_CTRL,APU Control"
|
|
bitfld.long 0x00 2. " CFGSDISABLE ,Disables write access to some system control processor registers, and some GIC registers" "No,Yes"
|
|
bitfld.long 0x00 0.--1. " CP15SDISABLE ,Disable write access to some system control processor (CP15) registers, in each processor" "0,1,2,3"
|
|
line.long 0x04 "WDT_CLK_SEL,APU watchdog timer clock select"
|
|
bitfld.long 0x04 0. " SEL ,Watchdog timer clock source selection" "Cpu_1xclk,Wdt_clk_in from FPGA"
|
|
group.long 0x400++0x0B
|
|
line.long 0x00 "TZ_OCM_RAM0,OCM RAM TrustZone Configuration Register 0"
|
|
bitfld.long 0x00 31. " TZ31 ,TrustZone status for 4KB page 31 at 124KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " TZ30 ,TrustZone status for 4KB page 30 at 120KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " TZ29 ,TrustZone status for 4KB page 29 at 116KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 28. " TZ28 ,TrustZone status for 4KB page 28 at 112KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 27. " TZ27 ,TrustZone status for 4KB page 27 at 108KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " TZ26 ,TrustZone status for 4KB page 26 at 104KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 25. " TZ25 ,TrustZone status for 4KB page 25 at 100KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " TZ24 ,TrustZone status for 4KB page 24 at 96KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TZ23 ,TrustZone status for 4KB page 23 at 92KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 22. " TZ22 ,TrustZone status for 4KB page 22 at 88KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " TZ21 ,TrustZone status for 4KB page 21 at 84KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " TZ20 ,TrustZone status for 4KB page 20 at 80KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TZ19 ,TrustZone status for 4KB page 19 at 76KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " TZ18 ,TrustZone status for 4KB page 18 at 72KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " TZ17 ,TrustZone status for 4KB page 17 at 68KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 16. " TZ16 ,TrustZone status for 4KB page 16 at 64KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 15. " TZ15 ,TrustZone status for 4KB page 15 at 60KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " TZ14 ,TrustZone status for 4KB page 14 at 56KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 13. " TZ13 ,TrustZone status for 4KB page 13 at 52KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " TZ12 ,TrustZone status for 4KB page 12 at 48KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TZ11 ,TrustZone status for 4KB page 11 at 44KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 10. " TZ10 ,TrustZone status for 4KB page 10 at 40KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " TZ9 ,TrustZone status for 4KB page 9 at 36KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " TZ8 ,TrustZone status for 4KB page 8 at 32KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TZ7 ,TrustZone status for 4KB page 7 at 28KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " TZ6 ,TrustZone status for 4KB page 6 at 24KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " TZ5 ,TrustZone status for 4KB page 5 at 20KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 4. " TZ4 ,TrustZone status for 4KB page 4 at 16KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TZ3 ,TrustZone status for 4KB page 3 at 12KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " TZ2 ,TrustZone status for 4KB page 2 at 8KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 1. " TZ1 ,TrustZone status for 4KB page 1 at 4KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " TZ0 ,TrustZone status for 4KB page 0 at 0KB" "Secure,Non-secure"
|
|
line.long 0x04 "TZ_OCM_RAM1,OCM RAM TrustZone Configuration Register 1"
|
|
bitfld.long 0x04 31. " TZ63 ,TrustZone status for 4KB page 63 at 252KB" "Secure,Non-secure"
|
|
bitfld.long 0x04 30. " TZ62 ,TrustZone status for 4KB page 62 at 248KB" "Secure,Non-secure"
|
|
bitfld.long 0x04 29. " TZ61 ,TrustZone status for 4KB page 61 at 244KB" "Secure,Non-secure"
|
|
bitfld.long 0x04 28. " TZ60 ,TrustZone status for 4KB page 60 at 240KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x04 27. " TZ59 ,TrustZone status for 4KB page 59 at 236KB" "Secure,Non-secure"
|
|
bitfld.long 0x04 26. " TZ58 ,TrustZone status for 4KB page 58 at 232KB" "Secure,Non-secure"
|
|
bitfld.long 0x04 25. " TZ57 ,TrustZone status for 4KB page 57 at 228KB" "Secure,Non-secure"
|
|
bitfld.long 0x04 24. " TZ56 ,TrustZone status for 4KB page 56 at 224KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x04 23. " TZ55 ,TrustZone status for 4KB page 55 at 220KB" "Secure,Non-secure"
|
|
bitfld.long 0x04 22. " TZ54 ,TrustZone status for 4KB page 54 at 216KB" "Secure,Non-secure"
|
|
bitfld.long 0x04 21. " TZ53 ,TrustZone status for 4KB page 53 at 212KB" "Secure,Non-secure"
|
|
bitfld.long 0x04 20. " TZ52 ,TrustZone status for 4KB page 52 at 208KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x04 19. " TZ51 ,TrustZone status for 4KB page 51 at 204KB" "Secure,Non-secure"
|
|
bitfld.long 0x04 18. " TZ50 ,TrustZone status for 4KB page 50 at 200KB" "Secure,Non-secure"
|
|
bitfld.long 0x04 17. " TZ49 ,TrustZone status for 4KB page 49 at 196KB" "Secure,Non-secure"
|
|
bitfld.long 0x04 16. " TZ48 ,TrustZone status for 4KB page 48 at 192KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x04 15. " TZ47 ,TrustZone status for 4KB page 47 at 188KB" "Secure,Non-secure"
|
|
bitfld.long 0x04 14. " TZ46 ,TrustZone status for 4KB page 46 at 184KB" "Secure,Non-secure"
|
|
bitfld.long 0x04 13. " TZ45 ,TrustZone status for 4KB page 45 at 180KB" "Secure,Non-secure"
|
|
bitfld.long 0x04 12. " TZ44 ,TrustZone status for 4KB page 44 at 176KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x04 11. " TZ43 ,TrustZone status for 4KB page 43 at 172KB" "Secure,Non-secure"
|
|
bitfld.long 0x04 10. " TZ42 ,TrustZone status for 4KB page 42 at 168KB" "Secure,Non-secure"
|
|
bitfld.long 0x04 9. " TZ41 ,TrustZone status for 4KB page 41 at 164KB" "Secure,Non-secure"
|
|
bitfld.long 0x04 8. " TZ40 ,TrustZone status for 4KB page 40 at 160KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x04 7. " TZ39 ,TrustZone status for 4KB page 39 at 156KB" "Secure,Non-secure"
|
|
bitfld.long 0x04 6. " TZ38 ,TrustZone status for 4KB page 38 at 152KB" "Secure,Non-secure"
|
|
bitfld.long 0x04 5. " TZ37 ,TrustZone status for 4KB page 37 at 148KB" "Secure,Non-secure"
|
|
bitfld.long 0x04 4. " TZ36 ,TrustZone status for 4KB page 36 at 144KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x04 3. " TZ35 ,TrustZone status for 4KB page 35 at 140KB" "Secure,Non-secure"
|
|
bitfld.long 0x04 2. " TZ34 ,TrustZone status for 4KB page 34 at 136KB" "Secure,Non-secure"
|
|
bitfld.long 0x04 1. " TZ33 ,TrustZone status for 4KB page 33 at 132KB" "Secure,Non-secure"
|
|
bitfld.long 0x04 0. " TZ32 ,TrustZone status for 4KB page 32 at 128KB" "Secure,Non-secure"
|
|
line.long 0x08 "TZ_OCM_ROM,OCM ROM TrustZone Configuration Register"
|
|
bitfld.long 0x08 31. " TZ95 ,TrustZone status for 4KB page 95 at 380KB" "Secure,Non-secure"
|
|
bitfld.long 0x08 30. " TZ94 ,TrustZone status for 4KB page 94 at 376KB" "Secure,Non-secure"
|
|
bitfld.long 0x08 29. " TZ93 ,TrustZone status for 4KB page 93 at 372KB" "Secure,Non-secure"
|
|
bitfld.long 0x08 28. " TZ92 ,TrustZone status for 4KB page 92 at 368KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 27. " TZ91 ,TrustZone status for 4KB page 91 at 364KB" "Secure,Non-secure"
|
|
bitfld.long 0x08 26. " TZ90 ,TrustZone status for 4KB page 90 at 360KB" "Secure,Non-secure"
|
|
bitfld.long 0x08 25. " TZ89 ,TrustZone status for 4KB page 89 at 356KB" "Secure,Non-secure"
|
|
bitfld.long 0x08 24. " TZ88 ,TrustZone status for 4KB page 88 at 352KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 23. " TZ87 ,TrustZone status for 4KB page 87 at 348KB" "Secure,Non-secure"
|
|
bitfld.long 0x08 22. " TZ86 ,TrustZone status for 4KB page 86 at 344KB" "Secure,Non-secure"
|
|
bitfld.long 0x08 21. " TZ85 ,TrustZone status for 4KB page 85 at 340KB" "Secure,Non-secure"
|
|
bitfld.long 0x08 20. " TZ84 ,TrustZone status for 4KB page 84 at 336KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 19. " TZ83 ,TrustZone status for 4KB page 83 at 332KB" "Secure,Non-secure"
|
|
bitfld.long 0x08 18. " TZ82 ,TrustZone status for 4KB page 82 at 328KB" "Secure,Non-secure"
|
|
bitfld.long 0x08 17. " TZ81 ,TrustZone status for 4KB page 81 at 324KB" "Secure,Non-secure"
|
|
bitfld.long 0x08 16. " TZ80 ,TrustZone status for 4KB page 80 at 320KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 15. " TZ79 ,TrustZone status for 4KB page 79 at 316KB" "Secure,Non-secure"
|
|
bitfld.long 0x08 14. " TZ78 ,TrustZone status for 4KB page 78 at 312KB" "Secure,Non-secure"
|
|
bitfld.long 0x08 13. " TZ77 ,TrustZone status for 4KB page 77 at 308KB" "Secure,Non-secure"
|
|
bitfld.long 0x08 12. " TZ76 ,TrustZone status for 4KB page 76 at 304KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 11. " TZ75 ,TrustZone status for 4KB page 75 at 300KB" "Secure,Non-secure"
|
|
bitfld.long 0x08 10. " TZ74 ,TrustZone status for 4KB page 74 at 296KB" "Secure,Non-secure"
|
|
bitfld.long 0x08 9. " TZ73 ,TrustZone status for 4KB page 73 at 292KB" "Secure,Non-secure"
|
|
bitfld.long 0x08 8. " TZ72 ,TrustZone status for 4KB page 72 at 288KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 7. " TZ71 ,TrustZone status for 4KB page 71 at 284KB" "Secure,Non-secure"
|
|
bitfld.long 0x08 6. " TZ70 ,TrustZone status for 4KB page 70 at 280KB" "Secure,Non-secure"
|
|
bitfld.long 0x08 5. " TZ69 ,TrustZone status for 4KB page 69 at 276KB" "Secure,Non-secure"
|
|
bitfld.long 0x08 4. " TZ68 ,TrustZone status for 4KB page 68 at 272KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 3. " TZ67 ,TrustZone status for 4KB page 67 at 268KB" "Secure,Non-secure"
|
|
bitfld.long 0x08 2. " TZ66 ,TrustZone status for 4KB page 66 at 264KB" "Secure,Non-secure"
|
|
bitfld.long 0x08 1. " TZ65 ,TrustZone status for 4KB page 65 at 260KB" "Secure,Non-secure"
|
|
bitfld.long 0x08 0. " TZ64 ,TrustZone status for 4KB page 64 at 256KB" "Secure,Non-secure"
|
|
group.long 0x430++0x03
|
|
line.long 0x00 "TZ_DDR_RAM,DDR RAM TrustZone Configuration Register"
|
|
bitfld.long 0x00 31. " TZ31 ,TrustZone status for 64KB page 31 at 1984KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " TZ30 ,TrustZone status for 64KB page 30 at 1920KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 29. " TZ29 ,TrustZone status for 64KB page 29 at 1856KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 28. " TZ28 ,TrustZone status for 64KB page 28 at 1792KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 27. " TZ27 ,TrustZone status for 64KB page 27 at 1728KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 26. " TZ26 ,TrustZone status for 64KB page 26 at 1664KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 25. " TZ25 ,TrustZone status for 64KB page 25 at 1600KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 24. " TZ24 ,TrustZone status for 64KB page 24 at 1536KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TZ23 ,TrustZone status for 64KB page 23 at 1472KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 22. " TZ22 ,TrustZone status for 64KB page 22 at 1408KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 21. " TZ21 ,TrustZone status for 64KB page 21 at 1344KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 20. " TZ20 ,TrustZone status for 64KB page 20 at 1280KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TZ19 ,TrustZone status for 64KB page 19 at 1216KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 18. " TZ18 ,TrustZone status for 64KB page 18 at 1152KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " TZ17 ,TrustZone status for 64KB page 17 at 1088KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 16. " TZ16 ,TrustZone status for 64KB page 16 at 1024KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 15. " TZ15 ,TrustZone status for 64KB page 15 at 960KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 14. " TZ14 ,TrustZone status for 64KB page 14 at 896KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 13. " TZ13 ,TrustZone status for 64KB page 13 at 832KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 12. " TZ12 ,TrustZone status for 64KB page 12 at 768KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TZ11 ,TrustZone status for 64KB page 11 at 704KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 10. " TZ10 ,TrustZone status for 64KB page 10 at 640KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 9. " TZ9 ,TrustZone status for 64KB page 9 at 576KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 8. " TZ8 ,TrustZone status for 64KB page 8 at 512KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TZ7 ,TrustZone status for 64KB page 7 at 448KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 6. " TZ6 ,TrustZone status for 64KB page 6 at 384KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 5. " TZ5 ,TrustZone status for 64KB page 5 at 320KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 4. " TZ4 ,TrustZone status for 64KB page 4 at 256KB" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TZ3 ,TrustZone status for 64KB page 3 at 192KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 2. " TZ2 ,TrustZone status for 64KB page 2 at 128KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 1. " TZ1 ,TrustZone status for 64KB page 1 at 64KB" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " TZ0 ,TrustZone status for 64KB page 0 at 0KB" "Secure,Non-secure"
|
|
group.long 0x440++0x0B
|
|
line.long 0x00 "TZ_DMA_NS,DMAC TrustZone Configuration Register"
|
|
bitfld.long 0x00 0. " DMAC_NS ,TZ security" "Secure,Non-secure"
|
|
line.long 0x04 "TZ_DMA_IRQ_NS,DMAC TrustZone Configuration Register for Interrupts"
|
|
bitfld.long 0x04 15. " DMA_IRQ_NS[15] ,TZ security" "Secure,Non-secure"
|
|
bitfld.long 0x04 14. " DMA_IRQ_NS[14] ,TZ security" "Secure,Non-secure"
|
|
bitfld.long 0x04 13. " DMA_IRQ_NS[13] ,TZ security" "Secure,Non-secure"
|
|
bitfld.long 0x04 12. " DMA_IRQ_NS[12] ,TZ security" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x04 11. " DMA_IRQ_NS[11] ,TZ security" "Secure,Non-secure"
|
|
bitfld.long 0x04 10. " DMA_IRQ_NS[10] ,TZ security" "Secure,Non-secure"
|
|
bitfld.long 0x04 9. " DMA_IRQ_NS[9] ,TZ security" "Secure,Non-secure"
|
|
bitfld.long 0x04 8. " DMA_IRQ_NS[8] ,TZ security" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x04 7. " DMA_IRQ_NS[7] ,TZ security" "Secure,Non-secure"
|
|
bitfld.long 0x04 6. " DMA_IRQ_NS[6] ,TZ security" "Secure,Non-secure"
|
|
bitfld.long 0x04 5. " DMA_IRQ_NS[5] ,TZ security" "Secure,Non-secure"
|
|
bitfld.long 0x04 4. " DMA_IRQ_NS[4] ,TZ security" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x04 3. " DMA_IRQ_NS[3] ,TZ security" "Secure,Non-secure"
|
|
bitfld.long 0x04 2. " DMA_IRQ_NS[2] ,TZ security" "Secure,Non-secure"
|
|
bitfld.long 0x04 1. " DMA_IRQ_NS[1] ,TZ security" "Secure,Non-secure"
|
|
bitfld.long 0x04 0. " DMA_IRQ_NS[0] ,TZ security" "Secure,Non-secure"
|
|
line.long 0x08 "TZ_DMA_PERIPH_NS,DMAC TrustZone Configuration Register for Peripherals"
|
|
bitfld.long 0x08 3. " DMAC_PERIPH_NS[3] ,TZ security" "Secure,Non-secure"
|
|
bitfld.long 0x08 2. " DMAC_PERIPH_NS[2] ,TZ security" "Secure,Non-secure"
|
|
bitfld.long 0x08 1. " DMAC_PERIPH_NS[1] ,TZ security" "Secure,Non-secure"
|
|
bitfld.long 0x08 0. " DMAC_PERIPH_NS[0] ,TZ security" "Secure,Non-secure"
|
|
group.long 0x450++0x0B
|
|
line.long 0x00 "TZ_GEM,GEM TrustZone Configuration Register"
|
|
bitfld.long 0x00 1. " E1 ,TrustZone status for Gigabit Ethernet MAC 1" "Secure,Non-secure"
|
|
bitfld.long 0x00 0. " E0 ,TrustZone status for Gigabit Ethernet MAC 0" "Secure,Non-secure"
|
|
line.long 0x04 "TZ_SDIO,SDIO TrustZone Configuration Register"
|
|
bitfld.long 0x04 1. " S1 ,TrustZone status for SDIO controller 1" "Secure,Non-secure"
|
|
bitfld.long 0x04 0. " S0 ,TrustZone status for SDIO controller 0" "Secure,Non-secure"
|
|
line.long 0x08 "TZ_USB,USB TrustZone Configuration Register"
|
|
bitfld.long 0x08 1. " U1 ,TrustZone status for USB controller 1" "Secure,Non-secure"
|
|
bitfld.long 0x08 0. " U0 ,TrustZone status for USB controller 0" "Secure,Non-secure"
|
|
group.long 0x484++0x07
|
|
line.long 0x00 "TZ_FPGA_M,FPGA master ports TrustZone Disable Register"
|
|
bitfld.long 0x00 1. " M1 ,Secure disable for FPGA AXI master port 1" "No,Yes"
|
|
bitfld.long 0x00 0. " M0 ,Secure disable for FPGA AXI master port 0" "No,Yes"
|
|
line.long 0x04 "TZ_FPGA_AFI,FPGA AFI AXI ports TrustZone Disable Register"
|
|
bitfld.long 0x04 3. " P3 ,Secure disable for FPGA AFI AXI port 3" "No,Yes"
|
|
bitfld.long 0x04 2. " P2 ,Secure disable for FPGA AFI AXI port 2" "No,Yes"
|
|
bitfld.long 0x04 1. " P1 ,Secure disable for FPGA AFI AXI port 1" "No,Yes"
|
|
bitfld.long 0x04 0. " P0 ,Secure disable for FPGA AFI AXI port 0" "No,Yes"
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "DBG_CTRL,SoC Debug Control"
|
|
bitfld.long 0x00 0. " SRST_B_TRI_B ,Controls direction of top level SRST_B" "Input,Output"
|
|
group.long 0x530++0x03
|
|
line.long 0x00 "PSS_IDCODE,PSS IDCODE"
|
|
bitfld.long 0x00 29.--31. " IDCODE_VERSION[2:0] ,Revision from FPGA gasket" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 28. " FOUNDARY ,Foundary" "Low,High"
|
|
hexmask.long.byte 0x00 21.--27. 1. " FAMILY ,Family"
|
|
bitfld.long 0x00 17.--20. " IDCODE_SUBFAM[3:0] ,Subfamily from FPGA gasket" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 12.--16. " IDCODE_DEVTYPE[4:0] ,Device from FPGA gasket" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 1.--11. 1. " MANUFACTURER_ID ,Manufacturer ID"
|
|
group.long 0x600++0x03
|
|
line.long 0x00 "DDR_URGENT,DDR Urgent Control"
|
|
bitfld.long 0x00 7. " S3_ARURGENT ,Identifies DDR's AXI port S3 read prioritisation" "Not requesting,Requesting"
|
|
bitfld.long 0x00 6. " S2_ARURGENT ,Identifies DDR's AXI port S2 read prioritisation" "Not requesting,Requesting"
|
|
bitfld.long 0x00 5. " S1_ARURGENT ,Identifies DDR's AXI port S1 read prioritisation" "Not requesting,Requesting"
|
|
bitfld.long 0x00 4. " S0_ARURGENT ,Identifies DDR's AXI port S0 read prioritisation" "Not requesting,Requesting"
|
|
textline " "
|
|
bitfld.long 0x00 3. " S3_AWURGENT ,Identifies DDR's AXI port S3 write prioritisation" "Not requesting,Requesting"
|
|
bitfld.long 0x00 2. " S2_AWURGENT ,Identifies DDR's AXI port S2 write prioritisation" "Not requesting,Requesting"
|
|
bitfld.long 0x00 1. " S1_AWURGENT ,Identifies DDR's AXI port S1 write prioritisation" "Not requesting,Requesting"
|
|
bitfld.long 0x00 0. " S0_AWURGENT ,Identifies DDR's AXI port S0 write prioritisation" "Not requesting,Requesting"
|
|
wgroup.long 0x60C++0x03
|
|
line.long 0x00 "DDR_CAL_START,DDR Calibration Start Triggers"
|
|
bitfld.long 0x00 1. " START_CAL_DLL ,Issue a dll_calib to the DRAM" "No effect,Start"
|
|
bitfld.long 0x00 0. " START_CAL_SHORT ,Issue ZQ Calibration Short Command to the DDR" "No effect,Start"
|
|
group.long 0x610++0x03
|
|
line.long 0x00 "DDR_REF_CTRL,DDR Refresh Control"
|
|
bitfld.long 0x00 0. " SELFREF_MODE ,Self refresh mode enable" "Disabled,Enabled"
|
|
wgroup.long 0x614++0x03
|
|
line.long 0x00 "DDR_REF_START,DDR Refresh Start Triggers"
|
|
bitfld.long 0x00 0. " START_REF ,Drives the co_gs_rank_refresh input into the DDR controller" "No effect,Start"
|
|
rgroup.long 0x618++0x03
|
|
line.long 0x00 "DDR_CMD_STA,DDR Command Store Status"
|
|
bitfld.long 0x00 0. " CMD_Q_NEMPTY ,DDR controller command store fill status" "Empty,Not empty"
|
|
group.long 0x61C++0x03
|
|
line.long 0x00 "DDR_URGENT_SEL,DDR Urgent Select"
|
|
bitfld.long 0x00 14.--15. " S3_ARQOS_MODE ,Selects between the AXI port s3_arqos[3], fabric signal or static register to drive the DDRC urgent bit" "S3_ARURGENT,s3_arqos,ddr_arb[3],?..."
|
|
bitfld.long 0x00 12.--13. " S2_ARQOS_MODE ,Selects between the AXI port s2_arqos[3], fabric signal or static register to drive the DDRC urgent bit" "S2_ARURGENT,s2_arqos,ddr_arb[2],?..."
|
|
bitfld.long 0x00 10.--11. " S1_ARQOS_MODE ,Selects between the AXI port s1_arqos[3], fabric signal or static register to drive the DDRC urgent bit" "S1_ARURGENT,s1_arqos,ddr_arb[1],?..."
|
|
bitfld.long 0x00 8.--9. " S0_ARQOS_MODE ,Selects between the fabric signal or static register to drive the DDRC urgent bit" "S0_ARURGENT,Reserved,ddr_arb[0],?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " S3_AWQOS_MODE ,Selects between the AXI port s3_awqos[3], fabric signal or static register to drive the DDRC urgent bit" "S3_AWURGENT,s3_awqos,ddr_arb[3],?..."
|
|
bitfld.long 0x00 4.--5. " S2_AWQOS_MODE ,Selects between the AXI port s2_awqos[3], fabric signal or static register to drive the DDRC urgent bit" "S2_AWURGENT,s2_awqos,ddr_arb[2],?..."
|
|
bitfld.long 0x00 2.--3. " S1_AWQOS_MODE ,Selects between the AXI port s1_awqos[3], fabric signal or static register to drive the DDRC urgent bit" "S1_AWURGENT,s1_awqos,ddr_arb[1],?..."
|
|
bitfld.long 0x00 0.--1. " S0_AWQOS_MODE ,Selects between the fabric signal or static register to drive the DDRC urgent bit" "S0_AWURGENT,Reserved,ddr_arb[0],?..."
|
|
group.long 0x620++0x03
|
|
line.long 0x00 "DDR_DFI_STATUS,DDR DFI status"
|
|
bitfld.long 0x00 0. " DFI_CAL_ST ,Allow a calibration of the IOB's at a time when the DDR controller is in its calibration mode" "Not allowed,Allowed"
|
|
if (((d.l(ad:0xF8000000+0x700))&0xE00)==0x800)
|
|
group.long 0x700++0x03
|
|
line.long 0x00 "MIO_PIN_0,MIO Control for Pin 0"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[0]/gpio_0_pin_out[0],?..."
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_cs_n[0],smc_nand_cs_n,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,?..."
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_n_ss_out_uppe"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x700))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x700++0x03
|
|
line.long 0x00 "MIO_PIN_0,MIO Control for Pin 0"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[0]/gpio_0_pin_out[0],?..."
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_cs_n[0],smc_nand_cs_n,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,?..."
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_n_ss_out_uppe"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x700++0x03
|
|
line.long 0x00 "MIO_PIN_0,MIO Control for Pin 0"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[0]/gpio_0_pin_out[0],?..."
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_cs_n[0],smc_nand_cs_n,sdio0_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,?..."
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_n_ss_out_uppe"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x704))&0xE00)==0x800)
|
|
group.long 0x704++0x03
|
|
line.long 0x00 "MIO_PIN_1,MIO Control for Pin 1"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[1]/gpio_0_pin_out[1],?..."
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[25],smc_sram_cs_n[1],sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,?..."
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_n_ss_out"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x704))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x704++0x03
|
|
line.long 0x00 "MIO_PIN_1,MIO Control for Pin 1"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[1]/gpio_0_pin_out[1],?..."
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[25],smc_sram_cs_n[1],sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,?..."
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_n_ss_out"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x704++0x03
|
|
line.long 0x00 "MIO_PIN_1,MIO Control for Pin 1"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[1]/gpio_0_pin_out[1],?..."
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[25],smc_sram_cs_n[1],sdio1_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,?..."
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_n_ss_out"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x708))&0xE00)==0x800)
|
|
group.long 0x708++0x03
|
|
line.long 0x00 "MIO_PIN_2,MIO Control for Pin 2"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[2]/gpio_0_pin_out[2],?..."
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_clk,smc_nand_ale,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[8]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_mo_mo0/qspi_si_mi0"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x708))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x708++0x03
|
|
line.long 0x00 "MIO_PIN_2,MIO Control for Pin 2"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[2]/gpio_0_pin_out[2],?..."
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_clk,smc_nand_ale,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[8]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_mo_mo0/qspi_si_mi0"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x708++0x03
|
|
line.long 0x00 "MIO_PIN_2,MIO Control for Pin 2"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[2]/gpio_0_pin_out[2],?..."
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_clk,smc_nand_ale,sdio0_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[8]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_mo_mo0/qspi_si_mi0"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x70C))&0xE00)==0x800)
|
|
group.long 0x70C++0x03
|
|
line.long 0x00 "MIO_PIN_3,MIO Control for Pin 3"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[3]/gpio_0_pin_out[3],?..."
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_data_in[0]/smc_sram_data_out[0],smc_nand_we_b,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[9]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_mi_mi1/qspi_mi_mo1"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x70C))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x70C++0x03
|
|
line.long 0x00 "MIO_PIN_3,MIO Control for Pin 3"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[3]/gpio_0_pin_out[3],?..."
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_data_in[0]/smc_sram_data_out[0],smc_nand_we_b,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[9]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_mi_mi1/qspi_mi_mo1"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x70C++0x03
|
|
line.long 0x00 "MIO_PIN_3,MIO Control for Pin 3"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[3]/gpio_0_pin_out[3],?..."
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_data_in[0]/smc_sram_data_out[0],smc_nand_we_b,sdio1_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[9]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_mi_mi1/qspi_mi_mo1"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x710))&0xE00)==0x800)
|
|
group.long 0x710++0x03
|
|
line.long 0x00 "MIO_PIN_4,MIO Control for Pin 4"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[4]/gpio_0_pin_out[4],?..."
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_data_in[1]/smc_sram_data_out[1],smc_nand_data_in[2]/smc_nand_data_out[2],sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[10]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_mi2/qspi_mo2"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x710))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x710++0x03
|
|
line.long 0x00 "MIO_PIN_4,MIO Control for Pin 4"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[4]/gpio_0_pin_out[4],?..."
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_data_in[1]/smc_sram_data_out[1],smc_nand_data_in[2]/smc_nand_data_out[2],sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[10]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_mi2/qspi_mo2"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x710++0x03
|
|
line.long 0x00 "MIO_PIN_4,MIO Control for Pin 4"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[4]/gpio_0_pin_out[4],?..."
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_data_in[1]/smc_sram_data_out[1],smc_nand_data_in[2]/smc_nand_data_out[2],sdio0_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[10]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_mi2/qspi_mo2"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x714))&0xE00)==0x800)
|
|
group.long 0x714++0x03
|
|
line.long 0x00 "MIO_PIN_5,MIO Control for Pin 5"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[5]/gpio_0_pin_out[5],?..."
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_data_in[2]/smc_sram_data_out[2],smc_nand_data_in[0]/smc_nand_data_out[0],sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[11]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_mi3/qspi_mo3"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x714))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x714++0x03
|
|
line.long 0x00 "MIO_PIN_5,MIO Control for Pin 5"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[5]/gpio_0_pin_out[5],?..."
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_data_in[2]/smc_sram_data_out[2],smc_nand_data_in[0]/smc_nand_data_out[0],sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[11]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_mi3/qspi_mo3"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x714++0x03
|
|
line.long 0x00 "MIO_PIN_5,MIO Control for Pin 5"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[5]/gpio_0_pin_out[5],?..."
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_data_in[2]/smc_sram_data_out[2],smc_nand_data_in[0]/smc_nand_data_out[0],sdio1_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[11]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_mi3/qspi_mo3"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x718))&0xE00)==0x800)
|
|
group.long 0x718++0x03
|
|
line.long 0x00 "MIO_PIN_6,MIO Control for Pin 6"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[6]/gpio_0_pin_out[6],?..."
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_data_in[3]/smc_sram_data_out[3],smc_nand_data_in[1]/smc_nand_data_out[1],sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[12]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_sclk_out"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x718))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x718++0x03
|
|
line.long 0x00 "MIO_PIN_6,MIO Control for Pin 6"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[6]/gpio_0_pin_out[6],?..."
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_data_in[3]/smc_sram_data_out[3],smc_nand_data_in[1]/smc_nand_data_out[1],sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[12]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_sclk_out"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x718++0x03
|
|
line.long 0x00 "MIO_PIN_6,MIO Control for Pin 6"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[6]/gpio_0_pin_out[6],?..."
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_data_in[3]/smc_sram_data_out[3],smc_nand_data_in[1]/smc_nand_data_out[1],sdio0_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[12]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_sclk_out"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x71C))&0xE00)==0x800)
|
|
group.long 0x71C++0x03
|
|
line.long 0x00 "MIO_PIN_7,MIO Control for Pin 7"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_out[7],?..."
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_oe_b,smc_nand_cle,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[13]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,?..."
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x71C))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x71C++0x03
|
|
line.long 0x00 "MIO_PIN_7,MIO Control for Pin 7"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_out[7],?..."
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_oe_b,smc_nand_cle,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[13]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,?..."
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x71C++0x03
|
|
line.long 0x00 "MIO_PIN_7,MIO Control for Pin 7"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_out[7],?..."
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_oe_b,smc_nand_cle,sdio1_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[13]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,?..."
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x720))&0xE00)==0x800)
|
|
group.long 0x720++0x03
|
|
line.long 0x00 "MIO_PIN_8,MIO Control for Pin 8"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_out[8],can1_phy_tx,Reserved,Reserved,Reserved,Reserved,Reserved,ua1_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_we_b,smc_nand_re_b,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[14]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_clk_for_lpbk"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x720))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x720++0x03
|
|
line.long 0x00 "MIO_PIN_8,MIO Control for Pin 8"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_out[8],can1_phy_tx,Reserved,Reserved,Reserved,Reserved,Reserved,ua1_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_we_b,smc_nand_re_b,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[14]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_clk_for_lpbk"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x720++0x03
|
|
line.long 0x00 "MIO_PIN_8,MIO Control for Pin 8"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_out[8],can1_phy_tx,Reserved,Reserved,Reserved,Reserved,Reserved,ua1_txd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_we_b,smc_nand_re_b,sdio0_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[14]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_clk_for_lpbk"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x724))&0xE00)==0x800)
|
|
group.long 0x724++0x03
|
|
line.long 0x00 "MIO_PIN_9,MIO Control for Pin 9"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[9]/gpio_0_pin_out[9],can1_phy_rx,Reserved,Reserved,Reserved,Reserved,Reserved,ua1_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_data_in[6]/smc_sram_data_out[6],smc_nand_data_in[4]/smc_nand_data_out[4],sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[15]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_sclk_out_upper"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x724))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x724++0x03
|
|
line.long 0x00 "MIO_PIN_9,MIO Control for Pin 9"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[9]/gpio_0_pin_out[9],can1_phy_rx,Reserved,Reserved,Reserved,Reserved,Reserved,ua1_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_data_in[6]/smc_sram_data_out[6],smc_nand_data_in[4]/smc_nand_data_out[4],sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[15]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_sclk_out_upper"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x724++0x03
|
|
line.long 0x00 "MIO_PIN_9,MIO Control for Pin 9"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[9]/gpio_0_pin_out[9],can1_phy_rx,Reserved,Reserved,Reserved,Reserved,Reserved,ua1_rxd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_data_in[6]/smc_sram_data_out[6],smc_nand_data_in[4]/smc_nand_data_out[4],sdio1_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[15]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_sclk_out_upper"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x728))&0xE00)==0x800)
|
|
group.long 0x728++0x03
|
|
line.long 0x00 "MIO_PIN_10,MIO Control for Pin 10"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[10]/gpio_0_pin_out[10],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,pjtag_tdi,sd1_data_in[0]/sd1_data_out[0],spi1_mo/spi1_si,Reserved,ua0_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_data_in[7]/smc_sram_data_out[7],smc_nand_data_in[5]/smc_nand_data_out[5],sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[2]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_mi_upper[0]/qspi_mo_upper[0]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x728))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x728++0x03
|
|
line.long 0x00 "MIO_PIN_10,MIO Control for Pin 10"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[10]/gpio_0_pin_out[10],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,pjtag_tdi,sd1_data_in[0]/sd1_data_out[0],spi1_mo/spi1_si,Reserved,ua0_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_data_in[7]/smc_sram_data_out[7],smc_nand_data_in[5]/smc_nand_data_out[5],sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[2]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_mi_upper[0]/qspi_mo_upper[0]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x728++0x03
|
|
line.long 0x00 "MIO_PIN_10,MIO Control for Pin 10"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[10]/gpio_0_pin_out[10],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,pjtag_tdi,sd1_data_in[0]/sd1_data_out[0],spi1_mo/spi1_si,Reserved,ua0_rxd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_data_in[7]/smc_sram_data_out[7],smc_nand_data_in[5]/smc_nand_data_out[5],sdio0_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[2]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_mi_upper[0]/qspi_mo_upper[0]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x72C))&0xE00)==0x800)
|
|
group.long 0x72C++0x03
|
|
line.long 0x00 "MIO_PIN_11,MIO Control for Pin 11"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[11]/gpio_0_pin_out[11],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,pjtag_tdo,sd1_cmd_in/sd1_cmd_out,spi1_mi/spi1_so,Reserved,ua0_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_data_in[4]/smc_sram_data_out[4],smc_nand_data_in[6]/smc_nand_data_out[6],sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[3]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_mi_upper[1]/qspi_mo_upper[1]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x72C))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x72C++0x03
|
|
line.long 0x00 "MIO_PIN_11,MIO Control for Pin 11"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[11]/gpio_0_pin_out[11],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,pjtag_tdo,sd1_cmd_in/sd1_cmd_out,spi1_mi/spi1_so,Reserved,ua0_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_data_in[4]/smc_sram_data_out[4],smc_nand_data_in[6]/smc_nand_data_out[6],sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[3]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_mi_upper[1]/qspi_mo_upper[1]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x72C++0x03
|
|
line.long 0x00 "MIO_PIN_11,MIO Control for Pin 11"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[11]/gpio_0_pin_out[11],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,pjtag_tdo,sd1_cmd_in/sd1_cmd_out,spi1_mi/spi1_so,Reserved,ua0_txd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_data_in[4]/smc_sram_data_out[4],smc_nand_data_in[6]/smc_nand_data_out[6],sdio1_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[3]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_mi_upper[1]/qspi_mo_upper[1]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x730))&0xE00)==0x800)
|
|
group.long 0x730++0x03
|
|
line.long 0x00 "MIO_PIN_12,MIO Control for Pin 12"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[12]/gpio_0_pin_out[12],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,pjtag_tck,sd1_clk_in/sd1_clk_out,spi1_sclk_in/spi1_sclk_out,Reserved,ua1_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_wait,smc_nand_data_in[7]/smc_nand_data_out[7],sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,traceclk"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_mi_upper[2]/qspi_mo_upper[2]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x730))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x730++0x03
|
|
line.long 0x00 "MIO_PIN_12,MIO Control for Pin 12"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[12]/gpio_0_pin_out[12],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,pjtag_tck,sd1_clk_in/sd1_clk_out,spi1_sclk_in/spi1_sclk_out,Reserved,ua1_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_wait,smc_nand_data_in[7]/smc_nand_data_out[7],sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,traceclk"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_mi_upper[2]/qspi_mo_upper[2]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x730++0x03
|
|
line.long 0x00 "MIO_PIN_12,MIO Control for Pin 12"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[12]/gpio_0_pin_out[12],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,pjtag_tck,sd1_clk_in/sd1_clk_out,spi1_sclk_in/spi1_sclk_out,Reserved,ua1_txd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_wait,smc_nand_data_in[7]/smc_nand_data_out[7],sdio0_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,traceclk"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_mi_upper[2]/qspi_mo_upper[2]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x734))&0xE00)==0x800)
|
|
group.long 0x734++0x03
|
|
line.long 0x00 "MIO_PIN_13,MIO Control for Pin 13"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[13]/gpio_0_pin_out[13],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,pjtag_tms,sd1_data_in[1]/sd1_data_out[1],spi1_n_ss_in/spi1_n_ss_out[0],Reserved,ua1_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_data_in[5]/smc_sram_data_out[5],smc_nand_data_in[3]/smc_nand_data_out[3],sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracectl"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_mi_upper[3]/qspi_mo_upper[3]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x734))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x734++0x03
|
|
line.long 0x00 "MIO_PIN_13,MIO Control for Pin 13"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[13]/gpio_0_pin_out[13],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,pjtag_tms,sd1_data_in[1]/sd1_data_out[1],spi1_n_ss_in/spi1_n_ss_out[0],Reserved,ua1_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_data_in[5]/smc_sram_data_out[5],smc_nand_data_in[3]/smc_nand_data_out[3],sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracectl"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_mi_upper[3]/qspi_mo_upper[3]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x734++0x03
|
|
line.long 0x00 "MIO_PIN_13,MIO Control for Pin 13"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[13]/gpio_0_pin_out[13],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,pjtag_tms,sd1_data_in[1]/sd1_data_out[1],spi1_n_ss_in/spi1_n_ss_out[0],Reserved,ua1_rxd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_data_in[5]/smc_sram_data_out[5],smc_nand_data_in[3]/smc_nand_data_out[3],sdio1_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracectl"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_mi_upper[3]/qspi_mo_upper[3]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x738))&0xE00)==0x800)
|
|
group.long 0x738++0x03
|
|
line.long 0x00 "MIO_PIN_14,MIO Control for Pin 14"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[14]/gpio_0_pin_out[14],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,wdt_clk_in,sd1_data_in[2]/sd1_data_out[2],spi1_n_ss_out[1],Reserved,ua0_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_fbclk,smc_nand_busy,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[0]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_fb_clock"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x738))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x738++0x03
|
|
line.long 0x00 "MIO_PIN_14,MIO Control for Pin 14"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[14]/gpio_0_pin_out[14],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,wdt_clk_in,sd1_data_in[2]/sd1_data_out[2],spi1_n_ss_out[1],Reserved,ua0_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_fbclk,smc_nand_busy,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[0]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_fb_clock"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x738++0x03
|
|
line.long 0x00 "MIO_PIN_14,MIO Control for Pin 14"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[14]/gpio_0_pin_out[14],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,wdt_clk_in,sd1_data_in[2]/sd1_data_out[2],spi1_n_ss_out[1],Reserved,ua0_rxd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_fbclk,smc_nand_busy,sdio0_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[0]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,qspi_fb_clock"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x73C))&0xE00)==0x800)
|
|
group.long 0x73C++0x03
|
|
line.long 0x00 "MIO_PIN_15,MIO Control for Pin 15"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[15]/gpio_0_pin_out[15],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,wdt_rst_out,sd1_data_in[3]/sd1_data_out[3],spi1_n_ss_out[2],Reserved,ua0_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[0],Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[1]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,?..."
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x73C))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x73C++0x03
|
|
line.long 0x00 "MIO_PIN_15,MIO Control for Pin 15"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[15]/gpio_0_pin_out[15],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,wdt_rst_out,sd1_data_in[3]/sd1_data_out[3],spi1_n_ss_out[2],Reserved,ua0_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[0],Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[1]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,?..."
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x73C++0x03
|
|
line.long 0x00 "MIO_PIN_15,MIO Control for Pin 15"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[15]/gpio_0_pin_out[15],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,wdt_rst_out,sd1_data_in[3]/sd1_data_out[3],spi1_n_ss_out[2],Reserved,ua0_txd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[0],Reserved,sdio1_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[1]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,?..."
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x740))&0xE00)==0x800)
|
|
group.long 0x740++0x03
|
|
line.long 0x00 "MIO_PIN_16,MIO Control for Pin 16"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[16]/gpio_0_pin_out[16],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,Reserved,sd0_clk_in/sd0_clk_out,spi0_sclk_in/spi0_sclk_out,ttc1_wave_out,ua1_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[1],smc_nand_data_in[8]/smc_nand_data_out[8],sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,racedq[4]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_tx_clk"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x740))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x740++0x03
|
|
line.long 0x00 "MIO_PIN_16,MIO Control for Pin 16"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[16]/gpio_0_pin_out[16],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,Reserved,sd0_clk_in/sd0_clk_out,spi0_sclk_in/spi0_sclk_out,ttc1_wave_out,ua1_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[1],smc_nand_data_in[8]/smc_nand_data_out[8],sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,racedq[4]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_tx_clk"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x740++0x03
|
|
line.long 0x00 "MIO_PIN_16,MIO Control for Pin 16"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[16]/gpio_0_pin_out[16],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,Reserved,sd0_clk_in/sd0_clk_out,spi0_sclk_in/spi0_sclk_out,ttc1_wave_out,ua1_txd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[1],smc_nand_data_in[8]/smc_nand_data_out[8],sdio0_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,racedq[4]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_tx_clk"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x744))&0xE00)==0x800)
|
|
group.long 0x744++0x03
|
|
line.long 0x00 "MIO_PIN_17,MIO Control for Pin 17"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[17]/gpio_0_pin_out[17],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,Reserved,sd0_cmd_in/sd0_cmd_out,spi0_mi/spi0_so,ttc1_clk_in,ua1_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[2],smc_nand_data_in[9]/smc_nand_data_out[9],sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[5]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_txd[0]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x744))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x744++0x03
|
|
line.long 0x00 "MIO_PIN_17,MIO Control for Pin 17"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[17]/gpio_0_pin_out[17],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,Reserved,sd0_cmd_in/sd0_cmd_out,spi0_mi/spi0_so,ttc1_clk_in,ua1_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[2],smc_nand_data_in[9]/smc_nand_data_out[9],sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[5]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_txd[0]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x744++0x03
|
|
line.long 0x00 "MIO_PIN_17,MIO Control for Pin 17"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[17]/gpio_0_pin_out[17],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,Reserved,sd0_cmd_in/sd0_cmd_out,spi0_mi/spi0_so,ttc1_clk_in,ua1_rxd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[2],smc_nand_data_in[9]/smc_nand_data_out[9],sdio1_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[5]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_txd[0]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x748))&0xE00)==0x800)
|
|
group.long 0x748++0x03
|
|
line.long 0x00 "MIO_PIN_18,MIO Control for Pin 18"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[18]/gpio_0_pin_out[18],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,Reserved,sd0_data_in[0]/sd0_data_out[0],spi0_n_ss_in/spi0_n_ss_out[0],ttc0_wave_out,ua0_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[3],smc_nand_data_in[10]/smc_nand_data_out[10],sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[6]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_txd[1]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x748))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x748++0x03
|
|
line.long 0x00 "MIO_PIN_18,MIO Control for Pin 18"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[18]/gpio_0_pin_out[18],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,Reserved,sd0_data_in[0]/sd0_data_out[0],spi0_n_ss_in/spi0_n_ss_out[0],ttc0_wave_out,ua0_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[3],smc_nand_data_in[10]/smc_nand_data_out[10],sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[6]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_txd[1]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x748++0x03
|
|
line.long 0x00 "MIO_PIN_18,MIO Control for Pin 18"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[18]/gpio_0_pin_out[18],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,Reserved,sd0_data_in[0]/sd0_data_out[0],spi0_n_ss_in/spi0_n_ss_out[0],ttc0_wave_out,ua0_rxd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[3],smc_nand_data_in[10]/smc_nand_data_out[10],sdio0_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[6]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_txd[1]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x74C))&0xE00)==0x800)
|
|
group.long 0x74C++0x03
|
|
line.long 0x00 "MIO_PIN_19,MIO Control for Pin 19"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[19]/gpio_0_pin_out[19],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,Reserved,sd0_data_in[1]/sd0_data_out[1],spi0_n_ss_out[1],ttc0_clk_in,ua0_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[4],smc_nand_data_in[11]/smc_nand_data_out[11],sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[7]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_txd[2]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x74C))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x74C++0x03
|
|
line.long 0x00 "MIO_PIN_19,MIO Control for Pin 19"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[19]/gpio_0_pin_out[19],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,Reserved,sd0_data_in[1]/sd0_data_out[1],spi0_n_ss_out[1],ttc0_clk_in,ua0_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[4],smc_nand_data_in[11]/smc_nand_data_out[11],sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[7]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_txd[2]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x74C++0x03
|
|
line.long 0x00 "MIO_PIN_19,MIO Control for Pin 19"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[19]/gpio_0_pin_out[19],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,Reserved,sd0_data_in[1]/sd0_data_out[1],spi0_n_ss_out[1],ttc0_clk_in,ua0_txd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[4],smc_nand_data_in[11]/smc_nand_data_out[11],sdio1_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[7]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_txd[2]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x750))&0xE00)==0x800)
|
|
group.long 0x750++0x03
|
|
line.long 0x00 "MIO_PIN_20,MIO Control for Pin 20"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[20]/gpio_0_pin_out[20],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,Reserved,sd0_data_in[2]/sd0_data_out[2],spi0_n_ss_out[2],Reserved,ua1_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[5],smc_nand_data_in[12]/smc_nand_data_out[12],sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,?..."
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_txd[3]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x750))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x750++0x03
|
|
line.long 0x00 "MIO_PIN_20,MIO Control for Pin 20"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[20]/gpio_0_pin_out[20],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,Reserved,sd0_data_in[2]/sd0_data_out[2],spi0_n_ss_out[2],Reserved,ua1_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[5],smc_nand_data_in[12]/smc_nand_data_out[12],sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,?..."
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_txd[3]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x750++0x03
|
|
line.long 0x00 "MIO_PIN_20,MIO Control for Pin 20"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[20]/gpio_0_pin_out[20],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,Reserved,sd0_data_in[2]/sd0_data_out[2],spi0_n_ss_out[2],Reserved,ua1_txd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[5],smc_nand_data_in[12]/smc_nand_data_out[12],sdio0_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,?..."
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_txd[3]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x754))&0xE00)==0x800)
|
|
group.long 0x754++0x03
|
|
line.long 0x00 "MIO_PIN_21,MIO Control for Pin 21"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[21]/gpio_0_pin_out[21],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,Reserved,sd0_data_in[3]/sd0_data_out[3],spi0_mo/spi0_si,Reserved,ua1_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[6],smc_nand_data_in[13]/smc_nand_data_out[13],sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,?..."
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_tx_ctl"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x754))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x754++0x03
|
|
line.long 0x00 "MIO_PIN_21,MIO Control for Pin 21"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[21]/gpio_0_pin_out[21],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,Reserved,sd0_data_in[3]/sd0_data_out[3],spi0_mo/spi0_si,Reserved,ua1_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[6],smc_nand_data_in[13]/smc_nand_data_out[13],sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,?..."
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_tx_ctl"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x754++0x03
|
|
line.long 0x00 "MIO_PIN_21,MIO Control for Pin 21"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[21]/gpio_0_pin_out[21],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,Reserved,sd0_data_in[3]/sd0_data_out[3],spi0_mo/spi0_si,Reserved,ua1_rxd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[6],smc_nand_data_in[13]/smc_nand_data_out[13],sdio1_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,?..."
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_tx_ctl"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x758))&0xE00)==0x800)
|
|
group.long 0x758++0x03
|
|
line.long 0x00 "MIO_PIN_22,MIO Control for Pin 22"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[22]/gpio_0_pin_out[22],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,pjtag_tdi,sd1_data_in[0]/sd1_data_out[0],spi1_mo/spi1_si,Reserved,ua0_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[7],smc_nand_data_in[14]/smc_nand_data_out[14],sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[2]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_rx_clk"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x758))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x758++0x03
|
|
line.long 0x00 "MIO_PIN_22,MIO Control for Pin 22"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[22]/gpio_0_pin_out[22],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,pjtag_tdi,sd1_data_in[0]/sd1_data_out[0],spi1_mo/spi1_si,Reserved,ua0_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[7],smc_nand_data_in[14]/smc_nand_data_out[14],sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[2]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_rx_clk"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x758++0x03
|
|
line.long 0x00 "MIO_PIN_22,MIO Control for Pin 22"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[22]/gpio_0_pin_out[22],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,pjtag_tdi,sd1_data_in[0]/sd1_data_out[0],spi1_mo/spi1_si,Reserved,ua0_rxd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[7],smc_nand_data_in[14]/smc_nand_data_out[14],sdio0_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[2]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_rx_clk"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x75C))&0xE00)==0x800)
|
|
group.long 0x75C++0x03
|
|
line.long 0x00 "MIO_PIN_23,MIO Control for Pin 23"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[23]/gpio_0_pin_out[23],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,pjtag_tdo,sd1_cmd_in/sd1_cmd_out,spi1_mi/spi1_so,Reserved,ua0_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[8],smc_nand_data_in[15]/smc_nand_data_out[15],sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[3]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_rxd[0]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x75C))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x75C++0x03
|
|
line.long 0x00 "MIO_PIN_23,MIO Control for Pin 23"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[23]/gpio_0_pin_out[23],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,pjtag_tdo,sd1_cmd_in/sd1_cmd_out,spi1_mi/spi1_so,Reserved,ua0_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[8],smc_nand_data_in[15]/smc_nand_data_out[15],sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[3]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_rxd[0]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x75C++0x03
|
|
line.long 0x00 "MIO_PIN_23,MIO Control for Pin 23"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[23]/gpio_0_pin_out[23],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,pjtag_tdo,sd1_cmd_in/sd1_cmd_out,spi1_mi/spi1_so,Reserved,ua0_txd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[8],smc_nand_data_in[15]/smc_nand_data_out[15],sdio1_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[3]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_rxd[0]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x760))&0xE00)==0x800)
|
|
group.long 0x760++0x03
|
|
line.long 0x00 "MIO_PIN_24,MIO Control for Pin 24"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[24]/gpio_0_pin_out[24],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,pjtag_tck,sd1_clk_in/sd1_clk_out,spi1_sclk_in/spi1_sclk_out,Reserved,ua1_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[9],Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,traceclk"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_rxd[1]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x760))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x760++0x03
|
|
line.long 0x00 "MIO_PIN_24,MIO Control for Pin 24"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[24]/gpio_0_pin_out[24],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,pjtag_tck,sd1_clk_in/sd1_clk_out,spi1_sclk_in/spi1_sclk_out,Reserved,ua1_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[9],Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,traceclk"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_rxd[1]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x760++0x03
|
|
line.long 0x00 "MIO_PIN_24,MIO Control for Pin 24"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[24]/gpio_0_pin_out[24],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,pjtag_tck,sd1_clk_in/sd1_clk_out,spi1_sclk_in/spi1_sclk_out,Reserved,ua1_txd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[9],Reserved,sdio0_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,traceclk"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_rxd[1]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x764))&0xE00)==0x800)
|
|
group.long 0x764++0x03
|
|
line.long 0x00 "MIO_PIN_25,MIO Control for Pin 25"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[25]/gpio_0_pin_out[25],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,pjtag_tms,sd1_data_in[1]/sd1_data_out[1],spi1_n_ss_in/spi1_n_ss_out[0],Reserved,ua1_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[10],Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracectl"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_rxd[2]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x764))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x764++0x03
|
|
line.long 0x00 "MIO_PIN_25,MIO Control for Pin 25"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[25]/gpio_0_pin_out[25],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,pjtag_tms,sd1_data_in[1]/sd1_data_out[1],spi1_n_ss_in/spi1_n_ss_out[0],Reserved,ua1_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[10],Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracectl"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_rxd[2]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x764++0x03
|
|
line.long 0x00 "MIO_PIN_25,MIO Control for Pin 25"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[25]/gpio_0_pin_out[25],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,pjtag_tms,sd1_data_in[1]/sd1_data_out[1],spi1_n_ss_in/spi1_n_ss_out[0],Reserved,ua1_rxd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[10],Reserved,sdio1_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracectl"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_rxd[2]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x768))&0xE00)==0x800)
|
|
group.long 0x768++0x03
|
|
line.long 0x00 "MIO_PIN_26,MIO Control for Pin 26"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[26]/gpio_0_pin_out[26],can0_phy_rx,i2c0_sda_input/i2c0_sda_out,wdt_clk_in,sd1_data_in[2]/sd1_data_out[2],spi1_n_ss_out[1],Reserved,ua0_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[11],Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[0]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_rxd[3]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x768))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x768++0x03
|
|
line.long 0x00 "MIO_PIN_26,MIO Control for Pin 26"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[26]/gpio_0_pin_out[26],can0_phy_rx,i2c0_sda_input/i2c0_sda_out,wdt_clk_in,sd1_data_in[2]/sd1_data_out[2],spi1_n_ss_out[1],Reserved,ua0_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[11],Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[0]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_rxd[3]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x768++0x03
|
|
line.long 0x00 "MIO_PIN_26,MIO Control for Pin 26"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[26]/gpio_0_pin_out[26],can0_phy_rx,i2c0_sda_input/i2c0_sda_out,wdt_clk_in,sd1_data_in[2]/sd1_data_out[2],spi1_n_ss_out[1],Reserved,ua0_rxd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[11],Reserved,sdio0_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[0]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_rxd[3]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x76C))&0xE00)==0x800)
|
|
group.long 0x76C++0x03
|
|
line.long 0x00 "MIO_PIN_27,MIO Control for Pin 27"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[27]/gpio_0_pin_out[27],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,wdt_rst_out,sd1_data_in[3]/sd1_data_out[3],spi1_n_ss_out[2],Reserved,ua0_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[12],Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[1]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_rx_ctl"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x76C))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x76C++0x03
|
|
line.long 0x00 "MIO_PIN_27,MIO Control for Pin 27"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[27]/gpio_0_pin_out[27],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,wdt_rst_out,sd1_data_in[3]/sd1_data_out[3],spi1_n_ss_out[2],Reserved,ua0_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[12],Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[1]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_rx_ctl"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x76C++0x03
|
|
line.long 0x00 "MIO_PIN_27,MIO Control for Pin 27"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[27]/gpio_0_pin_out[27],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,wdt_rst_out,sd1_data_in[3]/sd1_data_out[3],spi1_n_ss_out[2],Reserved,ua0_txd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[12],Reserved,sdio1_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,tracedq[1]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem0_rgmii_rx_ctl"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x770))&0xE00)==0x800)
|
|
group.long 0x770++0x03
|
|
line.long 0x00 "MIO_PIN_28,MIO Control for Pin 28"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[28]/gpio_0_pin_out[28],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,Reserved,sd0_clk_in/sd0_clk_out,spi0_sclk_in/spi0_sclk_out,ttc1_wave_out,ua1_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[13],Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_rx_data[4]/usb0_ulpi_tx_data[4]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_tx_clk"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x770))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x770++0x03
|
|
line.long 0x00 "MIO_PIN_28,MIO Control for Pin 28"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[28]/gpio_0_pin_out[28],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,Reserved,sd0_clk_in/sd0_clk_out,spi0_sclk_in/spi0_sclk_out,ttc1_wave_out,ua1_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[13],Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_rx_data[4]/usb0_ulpi_tx_data[4]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_tx_clk"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x770++0x03
|
|
line.long 0x00 "MIO_PIN_28,MIO Control for Pin 28"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[28]/gpio_0_pin_out[28],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,Reserved,sd0_clk_in/sd0_clk_out,spi0_sclk_in/spi0_sclk_out,ttc1_wave_out,ua1_txd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[13],Reserved,sdio0_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_rx_data[4]/usb0_ulpi_tx_data[4]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_tx_clk"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x774))&0xE00)==0x800)
|
|
group.long 0x774++0x03
|
|
line.long 0x00 "MIO_PIN_29,MIO Control for Pin 29"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[29]/gpio_0_pin_out[29],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,Reserved,sd0_cmd_in/sd0_cmd_out,spi0_mi/spi0_so,ttc1_clk_in,ua1_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[14],Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_dir"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_txd[0]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x774))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x774++0x03
|
|
line.long 0x00 "MIO_PIN_29,MIO Control for Pin 29"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[29]/gpio_0_pin_out[29],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,Reserved,sd0_cmd_in/sd0_cmd_out,spi0_mi/spi0_so,ttc1_clk_in,ua1_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[14],Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_dir"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_txd[0]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x774++0x03
|
|
line.long 0x00 "MIO_PIN_29,MIO Control for Pin 29"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[29]/gpio_0_pin_out[29],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,Reserved,sd0_cmd_in/sd0_cmd_out,spi0_mi/spi0_so,ttc1_clk_in,ua1_rxd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[14],Reserved,sdio1_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_dir"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_txd[0]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x778))&0xE00)==0x800)
|
|
group.long 0x778++0x03
|
|
line.long 0x00 "MIO_PIN_30,MIO Control for Pin 30"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[30]/gpio_0_pin_out[30],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,Reserved,sd0_data_in[0]/sd0_data_out[0],spi0_n_ss_in/spi0_n_ss_out[0],ttc0_wave_out,ua0_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[15],Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_stp"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_txd[1]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x778))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x778++0x03
|
|
line.long 0x00 "MIO_PIN_30,MIO Control for Pin 30"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[30]/gpio_0_pin_out[30],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,Reserved,sd0_data_in[0]/sd0_data_out[0],spi0_n_ss_in/spi0_n_ss_out[0],ttc0_wave_out,ua0_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[15],Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_stp"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_txd[1]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x778++0x03
|
|
line.long 0x00 "MIO_PIN_30,MIO Control for Pin 30"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[30]/gpio_0_pin_out[30],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,Reserved,sd0_data_in[0]/sd0_data_out[0],spi0_n_ss_in/spi0_n_ss_out[0],ttc0_wave_out,ua0_rxd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[15],Reserved,sdio0_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_stp"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_txd[1]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x77C))&0xE00)==0x800)
|
|
group.long 0x77C++0x03
|
|
line.long 0x00 "MIO_PIN_31,MIO Control for Pin 31"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[31]/gpio_0_pin_out[31],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,Reserved,sd0_data_in[1]/sd0_data_out[1],spi0_n_ss_out[1],ttc0_clk_in,ua0_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[16],Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_nxt"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_txd[2]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x77C))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x77C++0x03
|
|
line.long 0x00 "MIO_PIN_31,MIO Control for Pin 31"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[31]/gpio_0_pin_out[31],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,Reserved,sd0_data_in[1]/sd0_data_out[1],spi0_n_ss_out[1],ttc0_clk_in,ua0_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[16],Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_nxt"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_txd[2]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x77C++0x03
|
|
line.long 0x00 "MIO_PIN_31,MIO Control for Pin 31"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_0_pin_in[31]/gpio_0_pin_out[31],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,Reserved,sd0_data_in[1]/sd0_data_out[1],spi0_n_ss_out[1],ttc0_clk_in,ua0_txd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[16],Reserved,sdio1_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_nxt"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_txd[2]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x780))&0xE00)==0x800)
|
|
group.long 0x780++0x03
|
|
line.long 0x00 "MIO_PIN_32,MIO Control for Pin 32"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[0]/gpio_1_pin_out[0],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,Reserved,sd0_data_in[2]/sd0_data_out[2],spi0_n_ss_out[2],Reserved,ua1_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[17],Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_rx_data[0]/usb0_ulpi_tx_data[0]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_txd[3]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x780))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x780++0x03
|
|
line.long 0x00 "MIO_PIN_32,MIO Control for Pin 32"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[0]/gpio_1_pin_out[0],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,Reserved,sd0_data_in[2]/sd0_data_out[2],spi0_n_ss_out[2],Reserved,ua1_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[17],Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_rx_data[0]/usb0_ulpi_tx_data[0]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_txd[3]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x780++0x03
|
|
line.long 0x00 "MIO_PIN_32,MIO Control for Pin 32"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[0]/gpio_1_pin_out[0],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,Reserved,sd0_data_in[2]/sd0_data_out[2],spi0_n_ss_out[2],Reserved,ua1_txd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[17],Reserved,sdio0_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_rx_data[0]/usb0_ulpi_tx_data[0]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_txd[3]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x784))&0xE00)==0x800)
|
|
group.long 0x784++0x03
|
|
line.long 0x00 "MIO_PIN_33,MIO Control for Pin 33"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[1]/gpio_1_pin_out[1],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,Reserved,sd0_data_in[3]/sd0_data_out[3],spi0_mo/spi0_si,Reserved,ua1_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[18],Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_rx_data[1]/usb0_ulpi_tx_data[1]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_tx_ctl"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x784))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x784++0x03
|
|
line.long 0x00 "MIO_PIN_33,MIO Control for Pin 33"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[1]/gpio_1_pin_out[1],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,Reserved,sd0_data_in[3]/sd0_data_out[3],spi0_mo/spi0_si,Reserved,ua1_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[18],Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_rx_data[1]/usb0_ulpi_tx_data[1]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_tx_ctl"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x784++0x03
|
|
line.long 0x00 "MIO_PIN_33,MIO Control for Pin 33"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[1]/gpio_1_pin_out[1],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,Reserved,sd0_data_in[3]/sd0_data_out[3],spi0_mo/spi0_si,Reserved,ua1_rxd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[18],Reserved,sdio1_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_rx_data[1]/usb0_ulpi_tx_data[1]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_tx_ctl"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x788))&0xE00)==0x800)
|
|
group.long 0x788++0x03
|
|
line.long 0x00 "MIO_PIN_34,MIO Control for Pin 34"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[2]/gpio_1_pin_out[2],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,pjtag_tdi,sd1_data_in[0]/sd1_data_out[0],spi1_mo/spi1_si,Reserved,ua0_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[19],Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_rx_data[2]/usb0_ulpi_tx_data[2]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rx_clk"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x788))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x788++0x03
|
|
line.long 0x00 "MIO_PIN_34,MIO Control for Pin 34"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[2]/gpio_1_pin_out[2],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,pjtag_tdi,sd1_data_in[0]/sd1_data_out[0],spi1_mo/spi1_si,Reserved,ua0_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[19],Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_rx_data[2]/usb0_ulpi_tx_data[2]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rx_clk"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x788++0x03
|
|
line.long 0x00 "MIO_PIN_34,MIO Control for Pin 34"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[2]/gpio_1_pin_out[2],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,pjtag_tdi,sd1_data_in[0]/sd1_data_out[0],spi1_mo/spi1_si,Reserved,ua0_rxd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[19],Reserved,sdio0_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_rx_data[2]/usb0_ulpi_tx_data[2]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rx_clk"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x78C))&0xE00)==0x800)
|
|
group.long 0x78C++0x03
|
|
line.long 0x00 "MIO_PIN_35,MIO Control for Pin 35"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[3]/gpio_1_pin_out[3],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,pjtag_tdo,sd1_cmd_in/sd1_cmd_out,spi1_mi/spi1_so,Reserved,ua0_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[20],Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_rx_data[3]/usb0_ulpi_tx_data[3]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rxd[0]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x78C))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x78C++0x03
|
|
line.long 0x00 "MIO_PIN_35,MIO Control for Pin 35"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[3]/gpio_1_pin_out[3],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,pjtag_tdo,sd1_cmd_in/sd1_cmd_out,spi1_mi/spi1_so,Reserved,ua0_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[20],Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_rx_data[3]/usb0_ulpi_tx_data[3]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rxd[0]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x78C++0x03
|
|
line.long 0x00 "MIO_PIN_35,MIO Control for Pin 35"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[3]/gpio_1_pin_out[3],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,pjtag_tdo,sd1_cmd_in/sd1_cmd_out,spi1_mi/spi1_so,Reserved,ua0_txd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[20],Reserved,sdio1_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_rx_data[3]/usb0_ulpi_tx_data[3]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rxd[0]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x790))&0xE00)==0x800)
|
|
group.long 0x790++0x03
|
|
line.long 0x00 "MIO_PIN_36,MIO Control for Pin 36"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[4]/gpio_1_pin_out[4],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,pjtag_tck,sd1_clk_in/sd1_clk_out,spi1_sclk_in/spi1_sclk_out,Reserved,ua1_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[21],Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_xcvr_clk_in/usb0_xcvr_clk_out"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rxd[1]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x790))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x790++0x03
|
|
line.long 0x00 "MIO_PIN_36,MIO Control for Pin 36"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[4]/gpio_1_pin_out[4],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,pjtag_tck,sd1_clk_in/sd1_clk_out,spi1_sclk_in/spi1_sclk_out,Reserved,ua1_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[21],Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_xcvr_clk_in/usb0_xcvr_clk_out"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rxd[1]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x790++0x03
|
|
line.long 0x00 "MIO_PIN_36,MIO Control for Pin 36"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[4]/gpio_1_pin_out[4],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,pjtag_tck,sd1_clk_in/sd1_clk_out,spi1_sclk_in/spi1_sclk_out,Reserved,ua1_txd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[21],Reserved,sdio0_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_xcvr_clk_in/usb0_xcvr_clk_out"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rxd[1]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x794))&0xE00)==0x800)
|
|
group.long 0x794++0x03
|
|
line.long 0x00 "MIO_PIN_37,MIO Control for Pin 37"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[5]/gpio_1_pin_out[5],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,pjtag_tms,sd1_data_in[1]/sd1_data_out[1],spi1_n_ss_in/spi1_n_ss_out[0],Reserved,ua1_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[22],Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_rx_data[5]/usb0_ulpi_tx_data[5]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rxd[2]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x794))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x794++0x03
|
|
line.long 0x00 "MIO_PIN_37,MIO Control for Pin 37"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[5]/gpio_1_pin_out[5],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,pjtag_tms,sd1_data_in[1]/sd1_data_out[1],spi1_n_ss_in/spi1_n_ss_out[0],Reserved,ua1_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[22],Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_rx_data[5]/usb0_ulpi_tx_data[5]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rxd[2]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x794++0x03
|
|
line.long 0x00 "MIO_PIN_37,MIO Control for Pin 37"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[5]/gpio_1_pin_out[5],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,pjtag_tms,sd1_data_in[1]/sd1_data_out[1],spi1_n_ss_in/spi1_n_ss_out[0],Reserved,ua1_rxd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[22],Reserved,sdio1_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_rx_data[5]/usb0_ulpi_tx_data[5]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rxd[2]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x798))&0xE00)==0x800)
|
|
group.long 0x798++0x03
|
|
line.long 0x00 "MIO_PIN_38,MIO Control for Pin 38"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[6]/gpio_1_pin_out[6],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,wdt_clk_in,sd1_data_in[2]/sd1_data_out[2],spi1_n_ss_out[1],Reserved,ua0_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[23],Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_rx_data[6]/usb0_ulpi_tx_data[6]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rxd[3]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x798))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x798++0x03
|
|
line.long 0x00 "MIO_PIN_38,MIO Control for Pin 38"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[6]/gpio_1_pin_out[6],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,wdt_clk_in,sd1_data_in[2]/sd1_data_out[2],spi1_n_ss_out[1],Reserved,ua0_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[23],Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_rx_data[6]/usb0_ulpi_tx_data[6]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rxd[3]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x798++0x03
|
|
line.long 0x00 "MIO_PIN_38,MIO Control for Pin 38"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[6]/gpio_1_pin_out[6],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,wdt_clk_in,sd1_data_in[2]/sd1_data_out[2],spi1_n_ss_out[1],Reserved,ua0_rxd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[23],Reserved,sdio0_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_rx_data[6]/usb0_ulpi_tx_data[6]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rxd[3]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x79C))&0xE00)==0x800)
|
|
group.long 0x79C++0x03
|
|
line.long 0x00 "MIO_PIN_39,MIO Control for Pin 39"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[7]/gpio_1_pin_out[7],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,wdt_rst_out,sd1_data_in[3]/sd1_data_out[3],spi1_n_ss_out[2],Reserved,ua0_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[24],Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_rx_data[7]/usb0_ulpi_tx_data[7]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rx_ctl"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x79C))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x79C++0x03
|
|
line.long 0x00 "MIO_PIN_39,MIO Control for Pin 39"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[7]/gpio_1_pin_out[7],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,wdt_rst_out,sd1_data_in[3]/sd1_data_out[3],spi1_n_ss_out[2],Reserved,ua0_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[24],Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_rx_data[7]/usb0_ulpi_tx_data[7]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rx_ctl"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x79C++0x03
|
|
line.long 0x00 "MIO_PIN_39,MIO Control for Pin 39"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[7]/gpio_1_pin_out[7],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,wdt_rst_out,sd1_data_in[3]/sd1_data_out[3],spi1_n_ss_out[2],Reserved,ua0_txd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,smc_sram_add[24],Reserved,sdio1_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb0_ulpi_rx_data[7]/usb0_ulpi_tx_data[7]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rx_ctl"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x7A0))&0xE00)==0x800)
|
|
group.long 0x7A0++0x03
|
|
line.long 0x00 "MIO_PIN_40,MIO Control for Pin 40"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[8]/gpio_1_pin_out[8],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,Reserved,sd0_clk_in/sd0_clk_out,spi0_sclk_in/spi0_sclk_out,ttc1_wave_out,ua1_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_rx_data[4]/usb1_ulpi_tx_data[4]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_tx_clk"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x7A0))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x7A0++0x03
|
|
line.long 0x00 "MIO_PIN_40,MIO Control for Pin 40"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[8]/gpio_1_pin_out[8],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,Reserved,sd0_clk_in/sd0_clk_out,spi0_sclk_in/spi0_sclk_out,ttc1_wave_out,ua1_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_rx_data[4]/usb1_ulpi_tx_data[4]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_tx_clk"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x7A0++0x03
|
|
line.long 0x00 "MIO_PIN_40,MIO Control for Pin 40"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[8]/gpio_1_pin_out[8],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,Reserved,sd0_clk_in/sd0_clk_out,spi0_sclk_in/spi0_sclk_out,ttc1_wave_out,ua1_txd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio0_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_rx_data[4]/usb1_ulpi_tx_data[4]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_tx_clk"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x7A4))&0xE00)==0x800)
|
|
group.long 0x7A4++0x03
|
|
line.long 0x00 "MIO_PIN_41,MIO Control for Pin 41"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[9]/gpio_1_pin_out[9],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,Reserved,sd0_cmd_in/sd0_cmd_out,spi0_mi/spi0_so,ttc1_clk_in,ua1_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_dir"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_txd[0]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x7A4))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x7A4++0x03
|
|
line.long 0x00 "MIO_PIN_41,MIO Control for Pin 41"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[9]/gpio_1_pin_out[9],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,Reserved,sd0_cmd_in/sd0_cmd_out,spi0_mi/spi0_so,ttc1_clk_in,ua1_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_dir"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_txd[0]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x7A4++0x03
|
|
line.long 0x00 "MIO_PIN_41,MIO Control for Pin 41"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[9]/gpio_1_pin_out[9],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,Reserved,sd0_cmd_in/sd0_cmd_out,spi0_mi/spi0_so,ttc1_clk_in,ua1_rxd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio1_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_dir"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_txd[0]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x7A8))&0xE00)==0x800)
|
|
group.long 0x7A8++0x03
|
|
line.long 0x00 "MIO_PIN_42,MIO Control for Pin 42"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[10]/gpio_1_pin_out[10],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,Reserved,sd0_data_in[0]/sd0_data_out[0],spi0_n_ss_in/spi0_n_ss_out[0],tc0_wave_out,ua0_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_stp"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_txd[1]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x7A8))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x7A8++0x03
|
|
line.long 0x00 "MIO_PIN_42,MIO Control for Pin 42"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[10]/gpio_1_pin_out[10],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,Reserved,sd0_data_in[0]/sd0_data_out[0],spi0_n_ss_in/spi0_n_ss_out[0],tc0_wave_out,ua0_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_stp"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_txd[1]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x7A8++0x03
|
|
line.long 0x00 "MIO_PIN_42,MIO Control for Pin 42"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[10]/gpio_1_pin_out[10],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,Reserved,sd0_data_in[0]/sd0_data_out[0],spi0_n_ss_in/spi0_n_ss_out[0],tc0_wave_out,ua0_rxd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio0_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_stp"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_txd[1]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x7AC))&0xE00)==0x800)
|
|
group.long 0x7AC++0x03
|
|
line.long 0x00 "MIO_PIN_43,MIO Control for Pin 43"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[11]/gpio_1_pin_out[11],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,Reserved,sd0_data_in[1]/sd0_data_out[1],spi0_n_ss_out[1],ttc0_clk_in,ua0_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_nxt"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_txd[2]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x7AC))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x7AC++0x03
|
|
line.long 0x00 "MIO_PIN_43,MIO Control for Pin 43"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[11]/gpio_1_pin_out[11],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,Reserved,sd0_data_in[1]/sd0_data_out[1],spi0_n_ss_out[1],ttc0_clk_in,ua0_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_nxt"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_txd[2]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x7AC++0x03
|
|
line.long 0x00 "MIO_PIN_43,MIO Control for Pin 43"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[11]/gpio_1_pin_out[11],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,Reserved,sd0_data_in[1]/sd0_data_out[1],spi0_n_ss_out[1],ttc0_clk_in,ua0_txd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio1_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_nxt"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_txd[2]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x7B0))&0xE00)==0x800)
|
|
group.long 0x7B0++0x03
|
|
line.long 0x00 "MIO_PIN_44,MIO Control for Pin 44"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[12]/gpio_1_pin_out[12],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,Reserved,sd0_data_in[2]/sd0_data_out[2],spi0_n_ss_out[2],Reserved,ua1_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_rx_data[0]/usb1_ulpi_tx_data[0]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_txd[3]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x7B0))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x7B0++0x03
|
|
line.long 0x00 "MIO_PIN_44,MIO Control for Pin 44"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[12]/gpio_1_pin_out[12],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,Reserved,sd0_data_in[2]/sd0_data_out[2],spi0_n_ss_out[2],Reserved,ua1_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_rx_data[0]/usb1_ulpi_tx_data[0]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_txd[3]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x7B0++0x03
|
|
line.long 0x00 "MIO_PIN_44,MIO Control for Pin 44"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[12]/gpio_1_pin_out[12],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,Reserved,sd0_data_in[2]/sd0_data_out[2],spi0_n_ss_out[2],Reserved,ua1_txd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio0_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_rx_data[0]/usb1_ulpi_tx_data[0]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_txd[3]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x7B4))&0xE00)==0x800)
|
|
group.long 0x7B4++0x03
|
|
line.long 0x00 "MIO_PIN_45,MIO Control for Pin 45"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[13]/gpio_1_pin_out[13],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,Reserved,sd0_data_in[3]/sd0_data_out[3],spi0_mo/spi0_si,Reserved,ua1_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_rx_data[1]/usb1_ulpi_tx_data[1]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_tx_ctl"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x7B4))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x7B4++0x03
|
|
line.long 0x00 "MIO_PIN_45,MIO Control for Pin 45"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[13]/gpio_1_pin_out[13],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,Reserved,sd0_data_in[3]/sd0_data_out[3],spi0_mo/spi0_si,Reserved,ua1_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_rx_data[1]/usb1_ulpi_tx_data[1]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_tx_ctl"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x7B4++0x03
|
|
line.long 0x00 "MIO_PIN_45,MIO Control for Pin 45"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[13]/gpio_1_pin_out[13],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,Reserved,sd0_data_in[3]/sd0_data_out[3],spi0_mo/spi0_si,Reserved,ua1_rxd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio1_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_rx_data[1]/usb1_ulpi_tx_data[1]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_tx_ctl"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x7B8))&0xE00)==0x800)
|
|
group.long 0x7B8++0x03
|
|
line.long 0x00 "MIO_PIN_46,MIO Control for Pin 46"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[14]/gpio_1_pin_out[14],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,pjtag_tdi,sd1_data_in[0]/sd1_data_out[0],spi1_mo/spi1_si,Reserved,ua0_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_rx_data[2]/usb1_ulpi_tx_data[2]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rx_clk"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x7B8))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x7B8++0x03
|
|
line.long 0x00 "MIO_PIN_46,MIO Control for Pin 46"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[14]/gpio_1_pin_out[14],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,pjtag_tdi,sd1_data_in[0]/sd1_data_out[0],spi1_mo/spi1_si,Reserved,ua0_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_rx_data[2]/usb1_ulpi_tx_data[2]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rx_clk"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x7B8++0x03
|
|
line.long 0x00 "MIO_PIN_46,MIO Control for Pin 46"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[14]/gpio_1_pin_out[14],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,pjtag_tdi,sd1_data_in[0]/sd1_data_out[0],spi1_mo/spi1_si,Reserved,ua0_rxd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio0_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_rx_data[2]/usb1_ulpi_tx_data[2]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rx_clk"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x7BC))&0xE00)==0x800)
|
|
group.long 0x7BC++0x03
|
|
line.long 0x00 "MIO_PIN_47,MIO Control for Pin 47"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[15]/gpio_1_pin_out[15],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,pjtag_tdo,sd1_cmd_in/sd1_cmd_out,spi1_mi/spi1_so,Reserved,ua0_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_rx_data[3]/usb1_ulpi_tx_data[3]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rxd[0]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x7BC))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x7BC++0x03
|
|
line.long 0x00 "MIO_PIN_47,MIO Control for Pin 47"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[15]/gpio_1_pin_out[15],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,pjtag_tdo,sd1_cmd_in/sd1_cmd_out,spi1_mi/spi1_so,Reserved,ua0_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_rx_data[3]/usb1_ulpi_tx_data[3]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rxd[0]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x7BC++0x03
|
|
line.long 0x00 "MIO_PIN_47,MIO Control for Pin 47"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[15]/gpio_1_pin_out[15],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,pjtag_tdo,sd1_cmd_in/sd1_cmd_out,spi1_mi/spi1_so,Reserved,ua0_txd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio1_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_rx_data[3]/usb1_ulpi_tx_data[3]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rxd[0]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x7C0))&0xE00)==0x800)
|
|
group.long 0x7C0++0x03
|
|
line.long 0x00 "MIO_PIN_48,MIO Control for Pin 48"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[16]/gpio_1_pin_out[16],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,pjtag_tck,sd1_clk_in/sd1_clk_out,spi1_sclk_in/spi1_sclk_out,Reserved,ua1_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_xcvr_clk_in/usb1_xcvr_clk_out"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rxd[1]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x7C0))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x7C0++0x03
|
|
line.long 0x00 "MIO_PIN_48,MIO Control for Pin 48"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[16]/gpio_1_pin_out[16],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,pjtag_tck,sd1_clk_in/sd1_clk_out,spi1_sclk_in/spi1_sclk_out,Reserved,ua1_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_xcvr_clk_in/usb1_xcvr_clk_out"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rxd[1]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x7C0++0x03
|
|
line.long 0x00 "MIO_PIN_48,MIO Control for Pin 48"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[16]/gpio_1_pin_out[16],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,pjtag_tck,sd1_clk_in/sd1_clk_out,spi1_sclk_in/spi1_sclk_out,Reserved,ua1_txd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio0_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_xcvr_clk_in/usb1_xcvr_clk_out"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rxd[1]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x7C4))&0xE00)==0x800)
|
|
group.long 0x7C4++0x03
|
|
line.long 0x00 "MIO_PIN_49,MIO Control for Pin 49"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[17]/gpio_1_pin_out[17],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,pjtag_tms,sd1_data_in[1]/sd1_data_out[1],spi1_n_ss_in/spi1_n_ss_out[0],Reserved,ua1_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_rx_data[5]/usb1_ulpi_tx_data[5]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rxd[2]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x7C4))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x7C4++0x03
|
|
line.long 0x00 "MIO_PIN_49,MIO Control for Pin 49"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[17]/gpio_1_pin_out[17],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,pjtag_tms,sd1_data_in[1]/sd1_data_out[1],spi1_n_ss_in/spi1_n_ss_out[0],Reserved,ua1_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_rx_data[5]/usb1_ulpi_tx_data[5]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rxd[2]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x7C4++0x03
|
|
line.long 0x00 "MIO_PIN_49,MIO Control for Pin 49"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[17]/gpio_1_pin_out[17],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,pjtag_tms,sd1_data_in[1]/sd1_data_out[1],spi1_n_ss_in/spi1_n_ss_out[0],Reserved,ua1_rxd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio1_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_rx_data[5]/usb1_ulpi_tx_data[5]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rxd[2]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x7C8))&0xE00)==0x800)
|
|
group.long 0x7C8++0x03
|
|
line.long 0x00 "MIO_PIN_50,MIO Control for Pin 50"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[18]/gpio_1_pin_out[18],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,wdt_clk_in,sd1_data_in[2]/sd1_data_out[2],spi1_n_ss_out[1],Reserved,ua0_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_rx_data[6]/usb1_ulpi_tx_data[6]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rxd[3]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x7C8))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x7C8++0x03
|
|
line.long 0x00 "MIO_PIN_50,MIO Control for Pin 50"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[18]/gpio_1_pin_out[18],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,wdt_clk_in,sd1_data_in[2]/sd1_data_out[2],spi1_n_ss_out[1],Reserved,ua0_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_rx_data[6]/usb1_ulpi_tx_data[6]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rxd[3]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x7C8++0x03
|
|
line.long 0x00 "MIO_PIN_50,MIO Control for Pin 50"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[18]/gpio_1_pin_out[18],can0_phy_rx,i2c0_scl_input/i2c0_scl_out,wdt_clk_in,sd1_data_in[2]/sd1_data_out[2],spi1_n_ss_out[1],Reserved,ua0_rxd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio0_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_rx_data[6]/usb1_ulpi_tx_data[6]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rxd[3]"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x7CC))&0xE00)==0x800)
|
|
group.long 0x7CC++0x03
|
|
line.long 0x00 "MIO_PIN_51,MIO Control for Pin 51"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[19]/gpio_1_pin_out[19],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,wdt_rst_out,sd1_data_in[3]/sd1_data_out[3],spi1_n_ss_out[2],Reserved,ua0_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_rx_data[7]/usb1_ulpi_tx_data[7]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rx_ctl"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x7CC))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x7CC++0x03
|
|
line.long 0x00 "MIO_PIN_51,MIO Control for Pin 51"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[19]/gpio_1_pin_out[19],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,wdt_rst_out,sd1_data_in[3]/sd1_data_out[3],spi1_n_ss_out[2],Reserved,ua0_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_rx_data[7]/usb1_ulpi_tx_data[7]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rx_ctl"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x7CC++0x03
|
|
line.long 0x00 "MIO_PIN_51,MIO Control for Pin 51"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[19]/gpio_1_pin_out[19],can0_phy_tx,i2c0_sda_input/i2c0_sda_out,wdt_rst_out,sd1_data_in[3]/sd1_data_out[3],spi1_n_ss_out[2],Reserved,ua0_txd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio1_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,usb1_ulpi_rx_data[7]/usb1_ulpi_tx_data[7]"
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,gem1_rgmii_rx_ctl"
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x7D0))&0xE00)==0x800)
|
|
group.long 0x7D0++0x03
|
|
line.long 0x00 "MIO_PIN_52,MIO Control for Pin 52"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[20]/gpio_1_pin_out[20],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,wdt_clk_in,gem0_mdc,gem1_mdc,Reserved,ua1_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,?..."
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,?..."
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x7D0))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x7D0++0x03
|
|
line.long 0x00 "MIO_PIN_52,MIO Control for Pin 52"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[20]/gpio_1_pin_out[20],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,wdt_clk_in,gem0_mdc,gem1_mdc,Reserved,ua1_txd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio0_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,?..."
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,?..."
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x7D0++0x03
|
|
line.long 0x00 "MIO_PIN_52,MIO Control for Pin 52"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[20]/gpio_1_pin_out[20],can1_phy_tx,i2c1_scl_input/i2c1_scl_out,wdt_clk_in,gem0_mdc,gem1_mdc,Reserved,ua1_txd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio0_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,?..."
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,?..."
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xF8000000+0x7D4))&0xE00)==0x800)
|
|
group.long 0x7D4++0x03
|
|
line.long 0x00 "MIO_PIN_53,MIO Control for Pin 53"
|
|
bitfld.long 0x00 13. " DISABLERCVR ,Disables the receiver" "No,Yes"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[21]/gpio_1_pin_out[21],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,wdt_rst_out,gem0_mdio_in/gem0_mdio_out,gem1_mdio_in/gem1_mdio_out,Reserved,ua1_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,?..."
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,?..."
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xF8000000+0x7D4))&0xE00)==(0x200||0x400||0x600||0xA00||0xC00||0xE00))
|
|
group.long 0x7D4++0x03
|
|
line.long 0x00 "MIO_PIN_53,MIO Control for Pin 53"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 8. " SPEED ,Selects the speed of the I/O" "Slow CMOS,Fast CMOS"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[21]/gpio_1_pin_out[21],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,wdt_rst_out,gem0_mdio_in/gem0_mdio_out,gem1_mdio_in/gem1_mdio_out,Reserved,ua1_rxd"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio1_bus_pow"
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,?..."
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,?..."
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x7D4++0x03
|
|
line.long 0x00 "MIO_PIN_53,MIO Control for Pin 53"
|
|
bitfld.long 0x00 12. " PULLUP ,Controls the use of a pull-up for the associated GPIOB" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " IO_TYPE ,Selects the IO Type" "LVTTL,LVCMOS18,LVCMOS25,LVCMOS33,HSTL,LVCMOS33,LVCMOS33,LVCMOS33"
|
|
bitfld.long 0x00 5.--7. " L3_SEL ,Level 3 Mux Select" "gpio_1_pin_in[21]/gpio_1_pin_out[21],can1_phy_rx,i2c1_sda_input/i2c1_sda_out,wdt_rst_out,gem0_mdio_in/gem0_mdio_out,gem1_mdio_in/gem1_mdio_out,Reserved,ua1_rxd"
|
|
bitfld.long 0x00 3.--4. " L2_SEL ,Level 2 Mux Select" "Level 3 Mux Output,Reserved,Reserved,sdio1_bus_pow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " L1_SEL ,Level 1 Mux Select" "Level 2 Mux Output,?..."
|
|
bitfld.long 0x00 1. " L0_SEL ,Level 0 Mux Select" "Level 1 Mux Output,?..."
|
|
bitfld.long 0x00 0. " TRI_ENABLE ,Tri-state enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x800++0x07
|
|
line.long 0x00 "MIO_FMIO_GEM_SEL,Select function to be routed via MIO or FMIO"
|
|
bitfld.long 0x00 1. " GEM1_IF_SELECT ,GEM 1 Interface selection" "RGMII to/from MIO,GMII to/from FMIO"
|
|
bitfld.long 0x00 0. " GEM0_IF_SELECT ,GEM 0 Interface selection" "RGMII to/from MIO,GMII to/from FMIO"
|
|
line.long 0x04 "MIO_LOOPBACK,Loopback function within MIO"
|
|
bitfld.long 0x04 3. " I2C0_LOOP_I2C1 ,I2C Loopback Control" "Connected,Looped"
|
|
bitfld.long 0x04 2. " CAN0_LOOP_CAN1 ,CAN Loopback Control" "Connected,Looped"
|
|
bitfld.long 0x04 1. " UA0_LOOP_UA1 ,UART Loopback Control" "Connected,Looped"
|
|
bitfld.long 0x04 0. " SPI0_LOOP_SPI1 ,SPI Loopback Control" "Connected,Looped"
|
|
group.long 0x80C++0x07
|
|
line.long 0x00 "MIO_MST_TRI0,Parallel access to the master tri-state enables for all pins least significant word"
|
|
bitfld.long 0x00 31. " PIN_31_TRI ,Master Tri-state Enable for pin 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PIN_30_TRI ,Master Tri-state Enable for pin 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " PIN_29_TRI ,Master Tri-state Enable for pin 29" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " PIN_28_TRI ,Master Tri-state Enable for pin 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PIN_27_TRI ,Master Tri-state Enable for pin 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " PIN_26_TRI ,Master Tri-state Enable for pin 26" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " PIN_25_TRI ,Master Tri-state Enable for pin 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PIN_24_TRI ,Master Tri-state Enable for pin 24" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PIN_23_TRI ,Master Tri-state Enable for pin 23" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " PIN_22_TRI ,Master Tri-state Enable for pin 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " PIN_21_TRI ,Master Tri-state Enable for pin 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " PIN_20_TRI ,Master Tri-state Enable for pin 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PIN_19_TRI ,Master Tri-state Enable for pin 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " PIN_18_TRI ,Master Tri-state Enable for pin 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " PIN_17_TRI ,Master Tri-state Enable for pin 17" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " PIN_16_TRI ,Master Tri-state Enable for pin 16" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PIN_15_TRI ,Master Tri-state Enable for pin 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " PIN_14_TRI ,Master Tri-state Enable for pin 14" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " PIN_13_TRI ,Master Tri-state Enable for pin 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PIN_12_TRI ,Master Tri-state Enable for pin 12" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PIN_11_TRI ,Master Tri-state Enable for pin 11" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " PIN_10_TRI ,Master Tri-state Enable for pin 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " PIN_9_TRI ,Master Tri-state Enable for pin 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " PIN_8_TRI ,Master Tri-state Enable for pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PIN_7_TRI ,Master Tri-state Enable for pin 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " PIN_6_TRI ,Master Tri-state Enable for pin 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " PIN_5_TRI ,Master Tri-state Enable for pin 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PIN_4_TRI ,Master Tri-state Enable for pin 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PIN_3_TRI ,Master Tri-state Enable for pin 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PIN_2_TRI ,Master Tri-state Enable for pin 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " PIN_1_TRI ,Master Tri-state Enable for pin 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PIN_0_TRI ,Master Tri-state Enable for pin 0" "Disabled,Enabled"
|
|
line.long 0x04 "MIO_MST_TRI11,Parallel access to the master tri-state enables for all pins most significant word"
|
|
bitfld.long 0x04 21. " PIN_53_TRI ,Master Tri-state Enable for pin 53" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PIN_52_TRI ,Master Tri-state Enable for pin 52" "Disabled,Enabled"
|
|
bitfld.long 0x04 19. " PIN_51_TRI ,Master Tri-state Enable for pin 51" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " PIN_50_TRI ,Master Tri-state Enable for pin 50" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 17. " PIN_49_TRI ,Master Tri-state Enable for pin 49" "Disabled,Enabled"
|
|
bitfld.long 0x04 16. " PIN_48_TRI ,Master Tri-state Enable for pin 48" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " PIN_47_TRI ,Master Tri-state Enable for pin 47" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " PIN_46_TRI ,Master Tri-state Enable for pin 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " PIN_45_TRI ,Master Tri-state Enable for pin 45" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " PIN_44_TRI ,Master Tri-state Enable for pin 44" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " PIN_43_TRI ,Master Tri-state Enable for pin 43" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " PIN_42_TRI ,Master Tri-state Enable for pin 42" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 9. " PIN_41_TRI ,Master Tri-state Enable for pin 41" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " PIN_40_TRI ,Master Tri-state Enable for pin 40" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " PIN_39_TRI ,Master Tri-state Enable for pin 39" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " PIN_38_TRI ,Master Tri-state Enable for pin 38" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 5. " PIN_37_TRI ,Master Tri-state Enable for pin 37" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " PIN_36_TRI ,Master Tri-state Enable for pin 36" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " PIN_35_TRI ,Master Tri-state Enable for pin 35" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " PIN_34_TRI ,Master Tri-state Enable for pin 34" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " PIN_33_TRI ,Master Tri-state Enable for pin 33" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " PIN_32_TRI ,Master Tri-state Enable for pin 32" "Disabled,Enabled"
|
|
group.long 0x830++0x07
|
|
line.long 0x00 "SD0_WP_CD_SEL,SDIO 0 WP CD select register"
|
|
bitfld.long 0x00 16.--21. " SDIO0_CD_SEL ,SDIO0 CD Select" "MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,FMIO,FMIO,FMIO,FMIO,FMIO,FMIO,FMIO,FMIO,FMIO,FMIO"
|
|
bitfld.long 0x00 0.--5. " SDIO0_WP_SEL ,SDIO0 WP Select" "MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,FMIO,FMIO,FMIO,FMIO,FMIO,FMIO,FMIO,FMIO,FMIO,FMIO"
|
|
line.long 0x04 "SD1_WP_CD_SEL,SDIO 1 WP CD select register"
|
|
bitfld.long 0x04 16.--21. " SDIO1_CD_SEL ,SDIO1 CD Select" "MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,FMIO,FMIO,FMIO,FMIO,FMIO,FMIO,FMIO,FMIO,FMIO,FMIO"
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|
bitfld.long 0x04 0.--5. " SDIO1_WP_SEL ,SDIO1 WP Select" "MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,MIO,FMIO,FMIO,FMIO,FMIO,FMIO,FMIO,FMIO,FMIO,FMIO,FMIO"
|
|
group.long 0x900++0x03
|
|
line.long 0x00 "LVL_SHFTR_EN,Level Shifters Enable"
|
|
bitfld.long 0x00 2.--3. " USER_INP_ICT_EN_1 ,Enable level shifters for PSS user inputs to FPGA in FPGA tile 1" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. " USER_INP_ICT_EN_0 ,Enable level shifters for PSS user inputs to FPGA in FPGA tile 0" "0,1,2,3"
|
|
if (((d.l(ad:0xF8000000+0x910))&0x10)==0x10)
|
|
group.long 0x910++0x03
|
|
line.long 0x00 "OCM_CFG,OCM configuration"
|
|
bitfld.long 0x00 4. " SWAP ,RAM swap" "Not swapped,Swapped"
|
|
bitfld.long 0x00 3. " RAM_HI3 ,Maps the RAM in 64kByte chunks to the following part of address" "Low,High"
|
|
bitfld.long 0x00 2. " RAM_HI2 ,Maps the RAM in 64kByte chunks to the following part of address" "Low,High"
|
|
bitfld.long 0x00 1. " RAM_HI1 ,Maps the RAM in 64kByte chunks to the following part of address" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RAM_HI0 ,Maps the RAM in 64kByte chunks to the following part of address" "Low,High"
|
|
else
|
|
group.long 0x910++0x03
|
|
line.long 0x00 "OCM_CFG,OCM configuration"
|
|
bitfld.long 0x00 4. " SWAP ,RAM swap" "Not swapped,Swapped"
|
|
endif
|
|
group.long 0xA00++0x1F
|
|
line.long 0x00 "CPU0_RAM0,CPU#0: dcache outer/dcache tag/dcache data (3 RAM controls)"
|
|
bitfld.long 0x00 21. " EMAS2 ,RAM 2 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x00 19.--20. " EMAW2 ,RAM 2 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x00 16.--18. " EMA2 ,RAM 2 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 13. " EMAS1 ,RAM 1 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x00 11.--12. " EMAW1 ,RAM 1 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x00 8.--10. " EMA1 ,RAM 1 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMAS0 ,RAM 0 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x00 3.--4. " EMAW0 ,RAM 0 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x00 0.--2. " EMA0 ,RAM 0 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "CPU0_RAM1,CPU#0: global history buffer/icache tag/icache data (3 RAM controls)"
|
|
bitfld.long 0x04 21. " EMAS2 ,RAM 2 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x04 19.--20. " EMAW2 ,RAM 2 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x04 16.--18. " EMA2 ,RAM 2 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x04 13. " EMAS1 ,RAM 1 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x04 11.--12. " EMAW1 ,RAM 1 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x04 8.--10. " EMA1 ,RAM 1 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x04 5. " EMAS0 ,RAM 0 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x04 3.--4. " EMAW0 ,RAM 0 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x04 0.--2. " EMA0 ,RAM 0 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x08 "CPU0_RAM2,CPU#0: TLB hi/TLB lo/btac_target/btac_control (4 RAM controls)"
|
|
bitfld.long 0x08 29. " EMAS3 ,RAM 3 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x08 27.--28. " EMAW3 ,RAM 3 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x08 24.--26. " EMA3 ,RAM 3 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x08 21. " EMAS2 ,RAM 2 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x08 19.--20. " EMAW2 ,RAM 2 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x08 16.--18. " EMA2 ,RAM 2 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x08 13. " EMAS1 ,RAM 1 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x08 11.--12. " EMAW1 ,RAM 1 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x08 8.--10. " EMA1 ,RAM 1 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x08 5. " EMAS0 ,RAM 0 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x08 3.--4. " EMAW0 ,RAM 0 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x08 0.--2. " EMA0 ,RAM 0 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x0C "CPU1_RAM0,CPU#1: dcache outer/dcache tag/dcache data (3 RAM controls)"
|
|
bitfld.long 0x0C 21. " EMAS2 ,RAM 2 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x0C 19.--20. " EMAW2 ,RAM 2 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x0C 16.--18. " EMA2 ,RAM 2 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " EMAS1 ,RAM 1 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x0C 11.--12. " EMAW1 ,RAM 1 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x0C 8.--10. " EMA1 ,RAM 1 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x0C 5. " EMAS0 ,RAM 0 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x0C 3.--4. " EMAW0 ,RAM 0 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x0C 0.--2. " EMA0 ,RAM 0 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "CPU1_RAM1,CPU#1: global history buffer/icache tag/icache data (3 RAM controls)"
|
|
bitfld.long 0x10 21. " EMAS2 ,RAM 2 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x10 19.--20. " EMAW2 ,RAM 2 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x10 16.--18. " EMA2 ,RAM 2 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x10 13. " EMAS1 ,RAM 1 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x10 11.--12. " EMAW1 ,RAM 1 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x10 8.--10. " EMA1 ,RAM 1 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x10 5. " EMAS0 ,RAM 0 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x10 3.--4. " EMAW0 ,RAM 0 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x10 0.--2. " EMA0 ,RAM 0 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "CPU1_RAM2,CPU#1: TLB hi/TLB lo/btac_target/btac_control (4 RAM controls)"
|
|
bitfld.long 0x14 29. " EMAS3 ,RAM 3 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x14 27.--28. " EMAW3 ,RAM 3 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x14 24.--26. " EMA3 ,RAM 3 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x14 21. " EMAS2 ,RAM 2 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x14 19.--20. " EMAW2 ,RAM 2 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x14 16.--18. " EMA2 ,RAM 2 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x14 13. " EMAS1 ,RAM 1 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x14 11.--12. " EMAW1 ,RAM 1 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x14 8.--10. " EMA1 ,RAM 1 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x14 5. " EMAS0 ,RAM 0 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x14 3.--4. " EMAW0 ,RAM 0 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x14 0.--2. " EMA0 ,RAM 0 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x18 "SCU_RAM,SCU: tag (1 RAM control)"
|
|
bitfld.long 0x18 5. " EMAS0 ,RAM 0 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x18 3.--4. " EMAW0 ,RAM 0 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x18 0.--2. " EMA0 ,RAM 0 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x1C "L2C_RAM,L2 Cache: tag/parity/data (3 RAM controls)"
|
|
bitfld.long 0x1C 21. " EMAS2 ,RAM 2 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x1C 19.--20. " EMAW2 ,RAM 2 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x1C 16.--18. " EMA2 ,RAM 2 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x1C 13. " EMAS1 ,RAM 1 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x1C 11.--12. " EMAW1 ,RAM 1 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x1C 8.--10. " EMA1 ,RAM 1 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x1C 5. " EMAS0 ,RAM 0 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x1C 3.--4. " EMAW0 ,RAM 0 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x1C 0.--2. " EMA0 ,RAM 0 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
group.long 0xA30++0x1B
|
|
line.long 0x00 "IOU_RAM_GEM01,IOU: GEM 0/1 4 RAM controls"
|
|
bitfld.long 0x00 27.--29. " EMAB3 ,RAM 3 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 24.--26. " EMAA3 ,RAM 3 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 19.--21. " EMAB2 ,RAM 2 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--18. " EMAA2 ,RAM 2 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 11.--13. " EMAB1 ,RAM 1 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--10. " EMAA1 ,RAM 1 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3.--5. " EMAB0 ,RAM 0 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " EMAA0 ,RAM 0 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "IOU_RAM_USB01,IOU: USB 0/1 4 RAM controls"
|
|
bitfld.long 0x04 27.--29. " EMAB3 ,RAM 3 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 24.--26. " EMAA3 ,RAM 3 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 19.--21. " EMAB2 ,RAM 2 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 16.--18. " EMAA2 ,RAM 2 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x04 11.--13. " EMAB1 ,RAM 1 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 8.--10. " EMAA1 ,RAM 1 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 3.--5. " EMAB0 ,RAM 0 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 0.--2. " EMAA0 ,RAM 0 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x08 "IOU_RAM_SDIO0,IOU: SDIO 0 4 RAM controls"
|
|
bitfld.long 0x08 27.--29. " EMAB3 ,RAM 3 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 24.--26. " EMAA3 ,RAM 3 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 19.--21. " EMAB2 ,RAM 2 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 16.--18. " EMAA2 ,RAM 2 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x08 11.--13. " EMAB1 ,RAM 1 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 8.--10. " EMAA1 ,RAM 1 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 3.--5. " EMAB0 ,RAM 0 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 0.--2. " EMAA0 ,RAM 0 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x0C "IOU_RAM_SDIO1,IOU: SDIO 1 4 RAM controls"
|
|
bitfld.long 0x0C 27.--29. " EMAB3 ,RAM 3 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0C 24.--26. " EMAA3 ,RAM 3 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0C 19.--21. " EMAB2 ,RAM 2 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0C 16.--18. " EMAA2 ,RAM 2 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x0C 11.--13. " EMAB1 ,RAM 1 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0C 8.--10. " EMAA1 ,RAM 1 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0C 3.--5. " EMAB0 ,RAM 0 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0C 0.--2. " EMAA0 ,RAM 0 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "IOU_RAM_CAN0,IOU: CAN 0 3 RAM controls"
|
|
bitfld.long 0x10 19.--21. " EMAB2 ,RAM 2 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 16.--18. " EMAA2 ,RAM 2 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 11.--13. " EMAB1 ,RAM 1 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 8.--10. " EMAA1 ,RAM 1 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x10 3.--5. " EMAB0 ,RAM 0 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 0.--2. " EMAA0 ,RAM 0 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "IOU_RAM_CAN1,IOU: CAN 1 3 RAM controls"
|
|
bitfld.long 0x14 19.--21. " EMAB2 ,RAM 2 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 16.--18. " EMAA2 ,RAM 2 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 11.--13. " EMAB1 ,RAM 1 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 8.--10. " EMAA1 ,RAM 1 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x14 3.--5. " EMAB0 ,RAM 0 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 0.--2. " EMAA0 ,RAM 0 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x18 "IOU_RAM_LQSPI,IOU: LQSPI 2 RAM controls"
|
|
bitfld.long 0x18 11.--13. " EMAB1 ,RAM 1 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 8.--10. " EMAA1 ,RAM 1 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 3.--5. " EMAB0 ,RAM 0 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 0.--2. " EMAA0 ,RAM 0 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
group.long 0xA50++0x03
|
|
line.long 0x00 "DMAC_RAM,DMA Controller: 1 RAM control"
|
|
bitfld.long 0x00 3.--5. " EMAB0 ,RAM 0 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " EMAA0 ,RAM 0 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
group.long 0xA60++0x33
|
|
line.long 0x00 "AFI0_RAM0,AFI0: RAM 3 to RAM 0 controls"
|
|
bitfld.long 0x00 27.--29. " EMAB3 ,RAM 3 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 24.--26. " EMAA3 ,RAM 3 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 19.--21. " EMAB2 ,RAM 2 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--18. " EMAA2 ,RAM 2 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 11.--13. " EMAB1 ,RAM 1 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--10. " EMAA1 ,RAM 1 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3.--5. " EMAB0 ,RAM 0 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " EMAA0 ,RAM 0 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "AFI0_RAM1,AFI0: RAM 7 to RAM 4controls"
|
|
bitfld.long 0x04 27.--29. " EMAB3 ,RAM 3 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 24.--26. " EMAA3 ,RAM 3 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 19.--21. " EMAB2 ,RAM 2 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 16.--18. " EMAA2 ,RAM 2 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x04 11.--13. " EMAB1 ,RAM 1 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 8.--10. " EMAA1 ,RAM 1 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 3.--5. " EMAB0 ,RAM 0 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 0.--2. " EMAA0 ,RAM 0 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x08 "AFI0_RAM2,AFI0: RAM 9 to RAM 8 controls"
|
|
bitfld.long 0x08 11.--13. " EMAB1 ,RAM 1 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 8.--10. " EMAA1 ,RAM 1 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 3.--5. " EMAB0 ,RAM 0 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 0.--2. " EMAA0 ,RAM 0 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x0C "AFI1_RAM0,AFI1: RAM 3 to RAM 0 controls"
|
|
bitfld.long 0x0C 27.--29. " EMAB3 ,RAM 3 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0C 24.--26. " EMAA3 ,RAM 3 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0C 19.--21. " EMAB2 ,RAM 2 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0C 16.--18. " EMAA2 ,RAM 2 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x0C 11.--13. " EMAB1 ,RAM 1 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0C 8.--10. " EMAA1 ,RAM 1 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0C 3.--5. " EMAB0 ,RAM 0 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0C 0.--2. " EMAA0 ,RAM 0 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "AFI1_RAM1,AFI1: RAM 7 to RAM 4 controls"
|
|
bitfld.long 0x10 27.--29. " EMAB3 ,RAM 3 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 24.--26. " EMAA3 ,RAM 3 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 19.--21. " EMAB2 ,RAM 2 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 16.--18. " EMAA2 ,RAM 2 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
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|
bitfld.long 0x10 11.--13. " EMAB1 ,RAM 1 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 8.--10. " EMAA1 ,RAM 1 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 3.--5. " EMAB0 ,RAM 0 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 0.--2. " EMAA0 ,RAM 0 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "AFI1_RAM2,AFI1: RAM 9 to RAM 8 controls"
|
|
bitfld.long 0x14 11.--13. " EMAB1 ,RAM 1 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 8.--10. " EMAA1 ,RAM 1 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 3.--5. " EMAB0 ,RAM 0 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 0.--2. " EMAA0 ,RAM 0 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x18 "AFI2_RAM0,AFI2: RAM 3 to RAM 0 controls"
|
|
bitfld.long 0x18 27.--29. " EMAB3 ,RAM 3 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 24.--26. " EMAA3 ,RAM 3 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 19.--21. " EMAB2 ,RAM 2 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 16.--18. " EMAA2 ,RAM 2 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x18 11.--13. " EMAB1 ,RAM 1 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 8.--10. " EMAA1 ,RAM 1 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 3.--5. " EMAB0 ,RAM 0 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 0.--2. " EMAA0 ,RAM 0 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x1C "AFI2_RAM1,AFI2: RAM 7 to RAM 4 controls"
|
|
bitfld.long 0x1C 27.--29. " EMAB3 ,RAM 3 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x1C 24.--26. " EMAA3 ,RAM 3 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x1C 19.--21. " EMAB2 ,RAM 2 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x1C 16.--18. " EMAA2 ,RAM 2 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x1C 11.--13. " EMAB1 ,RAM 1 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x1C 8.--10. " EMAA1 ,RAM 1 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x1C 3.--5. " EMAB0 ,RAM 0 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x1C 0.--2. " EMAA0 ,RAM 0 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x20 "AFI2_RAM2,AFI2: RAM 9 to RAM 8 controls"
|
|
bitfld.long 0x20 11.--13. " EMAB1 ,RAM 1 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x20 8.--10. " EMAA1 ,RAM 1 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x20 3.--5. " EMAB0 ,RAM 0 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x20 0.--2. " EMAA0 ,RAM 0 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x24 "AFI3_RAM0,AFI3: RAM 3 to RAM 0 controls"
|
|
bitfld.long 0x24 27.--29. " EMAB3 ,RAM 3 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x24 24.--26. " EMAA3 ,RAM 3 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x24 19.--21. " EMAB2 ,RAM 2 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x24 16.--18. " EMAA2 ,RAM 2 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x24 11.--13. " EMAB1 ,RAM 1 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x24 8.--10. " EMAA1 ,RAM 1 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x24 3.--5. " EMAB0 ,RAM 0 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x24 0.--2. " EMAA0 ,RAM 0 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x28 "AFI3_RAM1,AFI3: RAM 7 to RAM 4controls"
|
|
bitfld.long 0x28 27.--29. " EMAB3 ,RAM 3 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x28 24.--26. " EMAA3 ,RAM 3 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x28 19.--21. " EMAB2 ,RAM 2 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x28 16.--18. " EMAA2 ,RAM 2 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x28 11.--13. " EMAB1 ,RAM 1 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x28 8.--10. " EMAA1 ,RAM 1 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x28 3.--5. " EMAB0 ,RAM 0 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x28 0.--2. " EMAA0 ,RAM 0 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x2C "AFI3_RAM2,AFI3: RAM 9 to RAM 8 controls"
|
|
bitfld.long 0x2C 11.--13. " EMAB1 ,RAM 1 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x2C 8.--10. " EMAA1 ,RAM 1 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x2C 3.--5. " EMAB0 ,RAM 0 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x2C 0.--2. " EMAA0 ,RAM 0 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x30 "OCM_RAM,OCM: 4 RAM controls"
|
|
bitfld.long 0x30 29. " EMAS3 ,RAM 3 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x30 27.--28. " EMAW3 ,RAM 3 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x30 24.--26. " EMA3 ,RAM 3 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x30 21. " EMAS2 ,RAM 2 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x30 19.--20. " EMAW2 ,RAM 2 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x30 16.--18. " EMA2 ,RAM 2 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x30 13. " EMAS1 ,RAM 1 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x30 11.--12. " EMAW1 ,RAM 1 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x30 8.--10. " EMA1 ,RAM 1 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x30 5. " EMAS0 ,RAM 0 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x30 3.--4. " EMAW0 ,RAM 0 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x30 0.--2. " EMA0 ,RAM 0 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0xA94++0x07
|
|
line.long 0x00 "OCM_ROM0,OCM: 4 ROM controls"
|
|
bitfld.long 0x00 27. " KEN3 ,ROM 3 Keeper Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--26. " EMA3 ,ROM 3 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 19. " KEN2 ,ROM 2 Keeper Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--18. " EMA2 ,ROM 2 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 11. " KEN1 ,ROM 1 Keeper Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--10. " EMA1 ,ROM 1 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3. " KEN0 ,ROM 0 Keeper Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--2. " EMA0 ,ROM 0 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "OCM_ROM1,OCM: 4 ROM controls"
|
|
bitfld.long 0x04 27. " KEN3 ,ROM 3 Keeper Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24.--26. " EMA3 ,ROM 3 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 19. " KEN2 ,ROM 2 Keeper Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 16.--18. " EMA2 ,ROM 2 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x04 11. " KEN1 ,ROM 1 Keeper Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 8.--10. " EMA1 ,ROM 1 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 3. " KEN0 ,ROM 0 Keeper Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--2. " EMA0 ,ROM 0 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
group.long 0xAA0++0x03
|
|
line.long 0x00 "DEVCI_RAM,DEVCI: Tx and Rx FIFOs (2 RAM controls)"
|
|
bitfld.long 0x00 11.--13. " EMAB1 ,RAM 1 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--10. " EMAA1 ,RAM 1 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3.--5. " EMAB0 ,RAM 0 Extra Margin Adjustment (EMAB[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " EMAA0 ,RAM 0 Extra Margin Adjustment (EMAA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
group.long 0xAB0++0x03
|
|
line.long 0x00 "CSG_RAM,Coresight: embedded trace buffer"
|
|
bitfld.long 0x00 5. " EMAS0 ,RAM 0 Extra Margin Adjustment (sensing)" "Low,High"
|
|
bitfld.long 0x00 3.--4. " EMAW0 ,RAM 0 Extra Margin Adjustment (writes)" "0,1,2,3"
|
|
bitfld.long 0x00 0.--2. " EMA0 ,RAM 0 Extra Margin Adjustment (EMA[0] = LSB)" "0,1,2,3,4,5,6,7"
|
|
group.long 0xB00++0x1F
|
|
line.long 0x00 "GPIOB_CTRL,GPIOB control"
|
|
hexmask.long.word 0x00 16.--31. 1. " DRVR_BIAS ,Driver Bias Control"
|
|
bitfld.long 0x00 9. " SRSTN_PULLUP_EN ,Enables internal pullup" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " CLK_PULLUP_EN ,Enables internal pullup" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--7. " VREF_SEL ,Specifies GP" "VREF = test mode,VREF = test mode-060,VREF = test mode-075,Reserved,VREF = test mode-090,Reserved,Reserved,Reserved,VREF = test mode-108,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,VREF = test mode-125,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,VREF = testmode x,?..."
|
|
textline " "
|
|
bitfld.long 0x00 1. " VREF_PULLUP_EN ,Enables internal pullup" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " VREF_EN ,Enables VREF internal generator" "Disabled,Enabled"
|
|
line.long 0x04 "GPIOB_CFG_CMOS18,GPIOB CMOS 1.8V IO configuration"
|
|
bitfld.long 0x04 22.--23. " M_SLOW_SLOW ,Skew" "0,1,2,3"
|
|
bitfld.long 0x04 20.--21. " M_SLOW_FAST ,Skew" "0,1,2,3"
|
|
bitfld.long 0x04 19. " M_FAST_SLOW ,Skew" "Low,High"
|
|
bitfld.long 0x04 18. " M_FAST_FAST ,Skew" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " M_NDRV_SLOW ,N Drive for slow mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 8.--11. " M_NDRV_FAST ,N Drive for fast mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 4.--7. " M_PDRV_SLOW ,P Drive for slow mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--3. " M_PDRV_FAST ,P Drive for fast mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "GPIOB_CFG_CMOS25,GPIOB CMOS 2.5V IO configuration"
|
|
bitfld.long 0x08 22.--23. " M_SLOW_SLOW ,Skew" "0,1,2,3"
|
|
bitfld.long 0x08 20.--21. " M_SLOW_FAST ,Skew" "0,1,2,3"
|
|
bitfld.long 0x08 19. " M_FAST_SLOW ,Skew" "Low,High"
|
|
bitfld.long 0x08 18. " M_FAST_FAST ,Skew" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 12.--15. " M_NDRV_SLOW ,N Drive for slow mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 8.--11. " M_NDRV_FAST ,N Drive for fast mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 4.--7. " M_PDRV_SLOW ,P Drive for slow mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 0.--3. " M_PDRV_FAST ,P Drive for fast mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x0C "GPIOB_CFG_CMOS33,GPIOB CMOS 3.3V IO configuration"
|
|
bitfld.long 0x0C 22.--23. " M_SLOW_SLOW ,Skew" "0,1,2,3"
|
|
bitfld.long 0x0C 20.--21. " M_SLOW_FAST ,Skew" "0,1,2,3"
|
|
bitfld.long 0x0C 19. " M_FAST_SLOW ,Skew" "Low,High"
|
|
bitfld.long 0x0C 18. " M_FAST_FAST ,Skew" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0C 12.--15. " M_NDRV_SLOW ,N Drive for slow mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 8.--11. " M_NDRV_FAST ,N Drive for fast mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 4.--7. " M_PDRV_SLOW ,P Drive for slow mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 0.--3. " M_PDRV_FAST ,P Drive for fast mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "GPIOB_CFG_LVTTL,GPIOB LVTTL IO configuration"
|
|
bitfld.long 0x10 22.--23. " M_SLOW_SLOW ,Skew" "0,1,2,3"
|
|
bitfld.long 0x10 20.--21. " M_SLOW_FAST ,Skew" "0,1,2,3"
|
|
bitfld.long 0x10 19. " M_FAST_SLOW ,Skew" "Low,High"
|
|
bitfld.long 0x10 18. " M_FAST_FAST ,Skew" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x10 12.--15. " M_NDRV_SLOW ,N Drive for slow mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x10 8.--11. " M_NDRV_FAST ,N Drive for fast mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x10 4.--7. " M_PDRV_SLOW ,P Drive for slow mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x10 0.--3. " M_PDRV_FAST ,P Drive for fast mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x14 "GPIOB_CFG_HSTL,GPIOB HSTL configuration"
|
|
bitfld.long 0x14 22.--23. " M_SLOW_SLOW ,Skew" "0,1,2,3"
|
|
bitfld.long 0x14 20.--21. " M_SLOW_FAST ,Skew" "0,1,2,3"
|
|
bitfld.long 0x14 19. " M_FAST_SLOW ,Skew" "Low,High"
|
|
bitfld.long 0x14 18. " M_FAST_FAST ,Skew" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x14 12.--15. " M_NDRV_SLOW ,N Drive for slow mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x14 8.--11. " M_NDRV_FAST ,N Drive for fast mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x14 4.--7. " M_PDRV_SLOW ,P Drive for slow mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x14 0.--3. " M_PDRV_FAST ,P Drive for fast mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x18 "GPIOB_TEST_O_0,GPIOB test output data [31:0]"
|
|
bitfld.long 0x18 31. " OUT[31] ,Writes output value to GPIOB pin 31" "Low,High"
|
|
bitfld.long 0x18 30. " OUT[30] ,Writes output value to GPIOB pin 30" "Low,High"
|
|
bitfld.long 0x18 29. " OUT[29] ,Writes output value to GPIOB pin 29" "Low,High"
|
|
bitfld.long 0x18 28. " OUT[28] ,Writes output value to GPIOB pin 28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x18 27. " OUT[27] ,Writes output value to GPIOB pin 27" "Low,High"
|
|
bitfld.long 0x18 26. " OUT[26] ,Writes output value to GPIOB pin 26" "Low,High"
|
|
bitfld.long 0x18 25. " OUT[25] ,Writes output value to GPIOB pin 25" "Low,High"
|
|
bitfld.long 0x18 24. " OUT[24] ,Writes output value to GPIOB pin 24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x18 23. " OUT[23] ,Writes output value to GPIOB pin 23" "Low,High"
|
|
bitfld.long 0x18 22. " OUT[22] ,Writes output value to GPIOB pin 22" "Low,High"
|
|
bitfld.long 0x18 21. " OUT[21] ,Writes output value to GPIOB pin 21" "Low,High"
|
|
bitfld.long 0x18 20. " OUT[20] ,Writes output value to GPIOB pin 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x18 19. " OUT[19] ,Writes output value to GPIOB pin 19" "Low,High"
|
|
bitfld.long 0x18 18. " OUT[18] ,Writes output value to GPIOB pin 18" "Low,High"
|
|
bitfld.long 0x18 17. " OUT[17] ,Writes output value to GPIOB pin 17" "Low,High"
|
|
bitfld.long 0x18 16. " OUT[16] ,Writes output value to GPIOB pin 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x18 15. " OUT[15] ,Writes output value to GPIOB pin 15" "Low,High"
|
|
bitfld.long 0x18 14. " OUT[14] ,Writes output value to GPIOB pin 14" "Low,High"
|
|
bitfld.long 0x18 13. " OUT[13] ,Writes output value to GPIOB pin 13" "Low,High"
|
|
bitfld.long 0x18 12. " OUT[12] ,Writes output value to GPIOB pin 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x18 11. " OUT[11] ,Writes output value to GPIOB pin 11" "Low,High"
|
|
bitfld.long 0x18 10. " OUT[10] ,Writes output value to GPIOB pin 10" "Low,High"
|
|
bitfld.long 0x18 9. " OUT[9] ,Writes output value to GPIOB pin 9" "Low,High"
|
|
bitfld.long 0x18 8. " OUT[8] ,Writes output value to GPIOB pin 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x18 7. " OUT[7] ,Writes output value to GPIOB pin 7" "Low,High"
|
|
bitfld.long 0x18 6. " OUT[6] ,Writes output value to GPIOB pin 6" "Low,High"
|
|
bitfld.long 0x18 5. " OUT[5] ,Writes output value to GPIOB pin 5" "Low,High"
|
|
bitfld.long 0x18 4. " OUT[4] ,Writes output value to GPIOB pin 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x18 3. " OUT[3] ,Writes output value to GPIOB pin 3" "Low,High"
|
|
bitfld.long 0x18 2. " OUT[2] ,Writes output value to GPIOB pin 2" "Low,High"
|
|
bitfld.long 0x18 1. " OUT[1] ,Writes output value to GPIOB pin 1" "Low,High"
|
|
bitfld.long 0x18 0. " OUT[0] ,Writes output value to GPIOB pin 0" "Low,High"
|
|
line.long 0x1C "GPIOB_TEST_T_0,GPIOB test tri-state control [31:0]"
|
|
bitfld.long 0x1C 31. " TRI[31] ,Writes tristate value to GPIOB pin 31" "Low,High"
|
|
bitfld.long 0x1C 30. " TRI[30] ,Writes tristate value to GPIOB pin 30" "Low,High"
|
|
bitfld.long 0x1C 29. " TRI[29] ,Writes tristate value to GPIOB pin 29" "Low,High"
|
|
bitfld.long 0x1C 28. " TRI[28] ,Writes tristate value to GPIOB pin 28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1C 27. " TRI[27] ,Writes tristate value to GPIOB pin 27" "Low,High"
|
|
bitfld.long 0x1C 26. " TRI[26] ,Writes tristate value to GPIOB pin 26" "Low,High"
|
|
bitfld.long 0x1C 25. " TRI[25] ,Writes tristate value to GPIOB pin 25" "Low,High"
|
|
bitfld.long 0x1C 24. " TRI[24] ,Writes tristate value to GPIOB pin 24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1C 23. " TRI[23] ,Writes tristate value to GPIOB pin 23" "Low,High"
|
|
bitfld.long 0x1C 22. " TRI[22] ,Writes tristate value to GPIOB pin 22" "Low,High"
|
|
bitfld.long 0x1C 21. " TRI[21] ,Writes tristate value to GPIOB pin 21" "Low,High"
|
|
bitfld.long 0x1C 20. " TRI[20] ,Writes tristate value to GPIOB pin 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1C 19. " TRI[19] ,Writes tristate value to GPIOB pin 19" "Low,High"
|
|
bitfld.long 0x1C 18. " TRI[18] ,Writes tristate value to GPIOB pin 18" "Low,High"
|
|
bitfld.long 0x1C 17. " TRI[17] ,Writes tristate value to GPIOB pin 17" "Low,High"
|
|
bitfld.long 0x1C 16. " TRI[16] ,Writes tristate value to GPIOB pin 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1C 15. " TRI[15] ,Writes tristate value to GPIOB pin 15" "Low,High"
|
|
bitfld.long 0x1C 14. " TRI[14] ,Writes tristate value to GPIOB pin 14" "Low,High"
|
|
bitfld.long 0x1C 13. " TRI[13] ,Writes tristate value to GPIOB pin 13" "Low,High"
|
|
bitfld.long 0x1C 12. " TRI[12] ,Writes tristate value to GPIOB pin 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1C 11. " TRI[11] ,Writes tristate value to GPIOB pin 11" "Low,High"
|
|
bitfld.long 0x1C 10. " TRI[10] ,Writes tristate value to GPIOB pin 10" "Low,High"
|
|
bitfld.long 0x1C 9. " TRI[9] ,Writes tristate value to GPIOB pin 9" "Low,High"
|
|
bitfld.long 0x1C 8. " TRI[8] ,Writes tristate value to GPIOB pin 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1C 7. " TRI[7] ,Writes tristate value to GPIOB pin 7" "Low,High"
|
|
bitfld.long 0x1C 6. " TRI[6] ,Writes tristate value to GPIOB pin 6" "Low,High"
|
|
bitfld.long 0x1C 5. " TRI[5] ,Writes tristate value to GPIOB pin 5" "Low,High"
|
|
bitfld.long 0x1C 4. " TRI[4] ,Writes tristate value to GPIOB pin 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x1C 3. " TRI[3] ,Writes tristate value to GPIOB pin 3" "Low,High"
|
|
bitfld.long 0x1C 2. " TRI[2] ,Writes tristate value to GPIOB pin 2" "Low,High"
|
|
bitfld.long 0x1C 1. " TRI[1] ,Writes tristate value to GPIOB pin 1" "Low,High"
|
|
bitfld.long 0x1C 0. " TRI[0] ,Writes tristate value to GPIOB pin 0" "Low,High"
|
|
rgroup.long 0xB20++0x03
|
|
line.long 0x00 "GPIOB_TEST_I_0,GPIOB test input data [31:0]"
|
|
bitfld.long 0x00 31. " INP[31] ,Reads current GPIOB pin value 31" "Low,High"
|
|
bitfld.long 0x00 30. " INP[30] ,Reads current GPIOB pin value 30" "Low,High"
|
|
bitfld.long 0x00 29. " INP[29] ,Reads current GPIOB pin value 29" "Low,High"
|
|
bitfld.long 0x00 28. " INP[28] ,Reads current GPIOB pin value 28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " INP[27] ,Reads current GPIOB pin value 27" "Low,High"
|
|
bitfld.long 0x00 26. " INP[26] ,Reads current GPIOB pin value 26" "Low,High"
|
|
bitfld.long 0x00 25. " INP[25] ,Reads current GPIOB pin value 25" "Low,High"
|
|
bitfld.long 0x00 24. " INP[24] ,Reads current GPIOB pin value 24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " INP[23] ,Reads current GPIOB pin value 23" "Low,High"
|
|
bitfld.long 0x00 22. " INP[22] ,Reads current GPIOB pin value 22" "Low,High"
|
|
bitfld.long 0x00 21. " INP[21] ,Reads current GPIOB pin value 21" "Low,High"
|
|
bitfld.long 0x00 20. " INP[20] ,Reads current GPIOB pin value 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " INP[19] ,Reads current GPIOB pin value 19" "Low,High"
|
|
bitfld.long 0x00 18. " INP[18] ,Reads current GPIOB pin value 18" "Low,High"
|
|
bitfld.long 0x00 17. " INP[17] ,Reads current GPIOB pin value 17" "Low,High"
|
|
bitfld.long 0x00 16. " INP[16] ,Reads current GPIOB pin value 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " INP[15] ,Reads current GPIOB pin value 15" "Low,High"
|
|
bitfld.long 0x00 14. " INP[14] ,Reads current GPIOB pin value 14" "Low,High"
|
|
bitfld.long 0x00 13. " INP[13] ,Reads current GPIOB pin value 13" "Low,High"
|
|
bitfld.long 0x00 12. " INP[12] ,Reads current GPIOB pin value 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " INP[11] ,Reads current GPIOB pin value 11" "Low,High"
|
|
bitfld.long 0x00 10. " INP[10] ,Reads current GPIOB pin value 10" "Low,High"
|
|
bitfld.long 0x00 9. " INP[9] ,Reads current GPIOB pin value 9" "Low,High"
|
|
bitfld.long 0x00 8. " INP[8] ,Reads current GPIOB pin value 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " INP[7] ,Reads current GPIOB pin value 7" "Low,High"
|
|
bitfld.long 0x00 6. " INP[6] ,Reads current GPIOB pin value 6" "Low,High"
|
|
bitfld.long 0x00 5. " INP[5] ,Reads current GPIOB pin value 5" "Low,High"
|
|
bitfld.long 0x00 4. " INP[4] ,Reads current GPIOB pin value 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INP[3] ,Reads current GPIOB pin value 3" "Low,High"
|
|
bitfld.long 0x00 2. " INP[2] ,Reads current GPIOB pin value 2" "Low,High"
|
|
bitfld.long 0x00 1. " INP[1] ,Reads current GPIOB pin value 1" "Low,High"
|
|
bitfld.long 0x00 0. " INP[0] ,Reads current GPIOB pin value 0" "Low,High"
|
|
group.long 0xB24++0x07
|
|
line.long 0x00 "GPIOB_TEST_O_32,GPIOB test output data [57:32]"
|
|
bitfld.long 0x00 25. " OUT[57] ,Writes output value to GPIOB pin 57" "Low,High"
|
|
bitfld.long 0x00 24. " OUT[56] ,Writes output value to GPIOB pin 56" "Low,High"
|
|
bitfld.long 0x00 23. " OUT[55] ,Writes output value to GPIOB pin 55" "Low,High"
|
|
bitfld.long 0x00 22. " OUT[54] ,Writes output value to GPIOB pin 54" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " OUT[53] ,Writes output value to GPIOB pin 53" "Low,High"
|
|
bitfld.long 0x00 20. " OUT[52] ,Writes output value to GPIOB pin 52" "Low,High"
|
|
bitfld.long 0x00 19. " OUT[51] ,Writes output value to GPIOB pin 51" "Low,High"
|
|
bitfld.long 0x00 18. " OUT[50] ,Writes output value to GPIOB pin 50" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " OUT[49] ,Writes output value to GPIOB pin 49" "Low,High"
|
|
bitfld.long 0x00 16. " OUT[48] ,Writes output value to GPIOB pin 48" "Low,High"
|
|
bitfld.long 0x00 15. " OUT[47] ,Writes output value to GPIOB pin 47" "Low,High"
|
|
bitfld.long 0x00 14. " OUT[46] ,Writes output value to GPIOB pin 46" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " OUT[45] ,Writes output value to GPIOB pin 45" "Low,High"
|
|
bitfld.long 0x00 12. " OUT[44] ,Writes output value to GPIOB pin 44" "Low,High"
|
|
bitfld.long 0x00 11. " OUT[43] ,Writes output value to GPIOB pin 43" "Low,High"
|
|
bitfld.long 0x00 10. " OUT[42] ,Writes output value to GPIOB pin 42" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " OUT[41] ,Writes output value to GPIOB pin 41" "Low,High"
|
|
bitfld.long 0x00 8. " OUT[40] ,Writes output value to GPIOB pin 40" "Low,High"
|
|
bitfld.long 0x00 7. " OUT[39] ,Writes output value to GPIOB pin 39" "Low,High"
|
|
bitfld.long 0x00 6. " OUT[38] ,Writes output value to GPIOB pin 38" "Low,High"
|
|
textline " "
|
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bitfld.long 0x00 5. " OUT[37] ,Writes output value to GPIOB pin 37" "Low,High"
|
|
bitfld.long 0x00 4. " OUT[36] ,Writes output value to GPIOB pin 36" "Low,High"
|
|
bitfld.long 0x00 3. " OUT[35] ,Writes output value to GPIOB pin 35" "Low,High"
|
|
bitfld.long 0x00 2. " OUT[34] ,Writes output value to GPIOB pin 34" "Low,High"
|
|
textline " "
|
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bitfld.long 0x00 1. " OUT[33] ,Writes output value to GPIOB pin 33" "Low,High"
|
|
bitfld.long 0x00 0. " OUT[32] ,Writes output value to GPIOB pin 32" "Low,High"
|
|
line.long 0x04 "GPIOB_TEST_T_32,GPIOB test tri-state control [57:32]"
|
|
bitfld.long 0x04 25. " TRI[57] ,Writes tristate value to GPIOB pin 57" "Low,High"
|
|
bitfld.long 0x04 24. " TRI[56] ,Writes tristate value to GPIOB pin 56" "Low,High"
|
|
bitfld.long 0x04 23. " TRI[55] ,Writes tristate value to GPIOB pin 55" "Low,High"
|
|
bitfld.long 0x04 22. " TRI[54] ,Writes tristate value to GPIOB pin 54" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 21. " TRI[53] ,Writes tristate value to GPIOB pin 53" "Low,High"
|
|
bitfld.long 0x04 20. " TRI[52] ,Writes tristate value to GPIOB pin 52" "Low,High"
|
|
bitfld.long 0x04 19. " TRI[51] ,Writes tristate value to GPIOB pin 51" "Low,High"
|
|
bitfld.long 0x04 18. " TRI[50] ,Writes tristate value to GPIOB pin 50" "Low,High"
|
|
textline " "
|
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bitfld.long 0x04 17. " TRI[49] ,Writes tristate value to GPIOB pin 49" "Low,High"
|
|
bitfld.long 0x04 16. " TRI[48] ,Writes tristate value to GPIOB pin 48" "Low,High"
|
|
bitfld.long 0x04 15. " TRI[47] ,Writes tristate value to GPIOB pin 47" "Low,High"
|
|
bitfld.long 0x04 14. " TRI[46] ,Writes tristate value to GPIOB pin 46" "Low,High"
|
|
textline " "
|
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bitfld.long 0x04 13. " TRI[45] ,Writes tristate value to GPIOB pin 45" "Low,High"
|
|
bitfld.long 0x04 12. " TRI[44] ,Writes tristate value to GPIOB pin 44" "Low,High"
|
|
bitfld.long 0x04 11. " TRI[43] ,Writes tristate value to GPIOB pin 43" "Low,High"
|
|
bitfld.long 0x04 10. " TRI[42] ,Writes tristate value to GPIOB pin 42" "Low,High"
|
|
textline " "
|
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bitfld.long 0x04 9. " TRI[41] ,Writes tristate value to GPIOB pin 41" "Low,High"
|
|
bitfld.long 0x04 8. " TRI[40] ,Writes tristate value to GPIOB pin 40" "Low,High"
|
|
bitfld.long 0x04 7. " TRI[39] ,Writes tristate value to GPIOB pin 39" "Low,High"
|
|
bitfld.long 0x04 6. " TRI[38] ,Writes tristate value to GPIOB pin 38" "Low,High"
|
|
textline " "
|
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bitfld.long 0x04 5. " TRI[37] ,Writes tristate value to GPIOB pin 37" "Low,High"
|
|
bitfld.long 0x04 4. " TRI[36] ,Writes tristate value to GPIOB pin 36" "Low,High"
|
|
bitfld.long 0x04 3. " TRI[35] ,Writes tristate value to GPIOB pin 35" "Low,High"
|
|
bitfld.long 0x04 2. " TRI[34] ,Writes tristate value to GPIOB pin 34" "Low,High"
|
|
textline " "
|
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bitfld.long 0x04 1. " TRI[33] ,Writes tristate value to GPIOB pin 33" "Low,High"
|
|
bitfld.long 0x04 0. " TRI[32] ,Writes tristate value to GPIOB pin 32" "Low,High"
|
|
rgroup.long 0xB2C++0x03
|
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line.long 0x00 "GPIOB_TEST_I_32,GPIOB test input data [57:32]"
|
|
bitfld.long 0x00 25. " INP[57] ,Reads current GPIOB pin value 57" "Low,High"
|
|
bitfld.long 0x00 24. " INP[56] ,Reads current GPIOB pin value 56" "Low,High"
|
|
bitfld.long 0x00 23. " INP[55] ,Reads current GPIOB pin value 55" "Low,High"
|
|
bitfld.long 0x00 22. " INP[54] ,Reads current GPIOB pin value 54" "Low,High"
|
|
textline " "
|
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bitfld.long 0x00 21. " INP[53] ,Reads current GPIOB pin value 53" "Low,High"
|
|
bitfld.long 0x00 20. " INP[52] ,Reads current GPIOB pin value 52" "Low,High"
|
|
bitfld.long 0x00 19. " INP[51] ,Reads current GPIOB pin value 51" "Low,High"
|
|
bitfld.long 0x00 18. " INP[50] ,Reads current GPIOB pin value 50" "Low,High"
|
|
textline " "
|
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bitfld.long 0x00 17. " INP[49] ,Reads current GPIOB pin value 49" "Low,High"
|
|
bitfld.long 0x00 16. " INP[48] ,Reads current GPIOB pin value 48" "Low,High"
|
|
bitfld.long 0x00 15. " INP[47] ,Reads current GPIOB pin value 47" "Low,High"
|
|
bitfld.long 0x00 14. " INP[46] ,Reads current GPIOB pin value 46" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " INP[45] ,Reads current GPIOB pin value 45" "Low,High"
|
|
bitfld.long 0x00 12. " INP[44] ,Reads current GPIOB pin value 44" "Low,High"
|
|
bitfld.long 0x00 11. " INP[43] ,Reads current GPIOB pin value 43" "Low,High"
|
|
bitfld.long 0x00 10. " INP[42] ,Reads current GPIOB pin value 42" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " INP[41] ,Reads current GPIOB pin value 41" "Low,High"
|
|
bitfld.long 0x00 8. " INP[40] ,Reads current GPIOB pin value 40" "Low,High"
|
|
bitfld.long 0x00 7. " INP[39] ,Reads current GPIOB pin value 39" "Low,High"
|
|
bitfld.long 0x00 6. " INP[38] ,Reads current GPIOB pin value 38" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " INP[37] ,Reads current GPIOB pin value 37" "Low,High"
|
|
bitfld.long 0x00 4. " INP[36] ,Reads current GPIOB pin value 36" "Low,High"
|
|
bitfld.long 0x00 3. " INP[35] ,Reads current GPIOB pin value 35" "Low,High"
|
|
bitfld.long 0x00 2. " INP[34] ,Reads current GPIOB pin value 34" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " INP[33] ,Reads current GPIOB pin value 33" "Low,High"
|
|
bitfld.long 0x00 0. " INP[32] ,Reads current GPIOB pin value 32" "Low,High"
|
|
group.long 0xB40++0x1B
|
|
line.long 0x00 "DDRIOB_ADDR0,DDR IOB Config for A[14:0], CKE and DRST_B"
|
|
bitfld.long 0x00 11. " PULLUP_EN ,Enables pullup on output" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--10. " OUTPUT_EN ,Enables output mode to enable output ties to" "Ibuf,,,Obuf"
|
|
bitfld.long 0x00 8. " TERM_DISABLE_MODE , Termination 'dynamic_dci_ts' is used during read transactions" "No,Yes"
|
|
bitfld.long 0x00 7. " IBUF_DISABLE_MODE ,Use ibuf_disable_into control ibuf" "Disabled,Enabled"
|
|
bitfld.long 0x00 5.--6. " DCI_TYPE ,DCI Mode Selection" "Disabled,Drive,,Termination"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TERM_EN , Tri State Termination Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " DCI_UPDATE_B ,DCI Update Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1.--2. " INP_TYPE ,Input buffer control" "Off,Vref based differential receiver for SSTL/HSTL,Differential input receiver,LVCMOS receiver"
|
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line.long 0x04 "DDRIOB_ADDR1,DDR IOB Config for BA[2:0], ODT, CS_B, WE_B, RAS_B and CAS_B"
|
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bitfld.long 0x00 11. " PULLUP_EN ,Enables pullup on output" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--10. " OUTPUT_EN ,Enables output mode to enable output ties to" "Ibuf,,,Obuf"
|
|
bitfld.long 0x00 8. " TERM_DISABLE_MODE , Termination 'dynamic_dci_ts' is used during read transactions" "No,Yes"
|
|
bitfld.long 0x00 7. " IBUF_DISABLE_MODE ,Use ibuf_disable_into control ibuf" "Disabled,Enabled"
|
|
bitfld.long 0x00 5.--6. " DCI_TYPE ,DCI Mode Selection" "Disabled,Drive,,Termination"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TERM_EN , Tri State Termination Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " DCI_UPDATE_B ,DCI Update Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1.--2. " INP_TYPE ,Input buffer control" "Off,Vref based differential receiver for SSTL/HSTL,Differential input receiver,LVCMOS receiver"
|
|
line.long 0x08 "DDRIOB_DATA0,DDR IOB Config for Data 15:0"
|
|
bitfld.long 0x00 11. " PULLUP_EN ,Enables pullup on output" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--10. " OUTPUT_EN ,Enables output mode to enable output ties to" "Ibuf,,,Obuf"
|
|
bitfld.long 0x00 8. " TERM_DISABLE_MODE , Termination 'dynamic_dci_ts' is used during read transactions" "No,Yes"
|
|
bitfld.long 0x00 7. " IBUF_DISABLE_MODE ,Use ibuf_disable_into control ibuf" "Disabled,Enabled"
|
|
bitfld.long 0x00 5.--6. " DCI_TYPE ,DCI Mode Selection" "Disabled,Drive,,Termination"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TERM_EN , Tri State Termination Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " DCI_UPDATE_B ,DCI Update Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1.--2. " INP_TYPE ,Input buffer control" "Off,Vref based differential receiver for SSTL/HSTL,Differential input receiver,LVCMOS receiver"
|
|
line.long 0x0C "DDRIOB_DATA1,DDR IOB Config for Data 31:16"
|
|
bitfld.long 0x00 11. " PULLUP_EN ,Enables pullup on output" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--10. " OUTPUT_EN ,Enables output mode to enable output ties to" "Ibuf,,,Obuf"
|
|
bitfld.long 0x00 8. " TERM_DISABLE_MODE , Termination 'dynamic_dci_ts' is used during read transactions" "No,Yes"
|
|
bitfld.long 0x00 7. " IBUF_DISABLE_MODE ,Use ibuf_disable_into control ibuf" "Disabled,Enabled"
|
|
bitfld.long 0x00 5.--6. " DCI_TYPE ,DCI Mode Selection" "Disabled,Drive,,Termination"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TERM_EN , Tri State Termination Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " DCI_UPDATE_B ,DCI Update Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1.--2. " INP_TYPE ,Input buffer control" "Off,Vref based differential receiver for SSTL/HSTL,Differential input receiver,LVCMOS receiver"
|
|
line.long 0x10 "DDRIOB_DIFF0,DDR IOB Config for DQS 1:0"
|
|
bitfld.long 0x00 11. " PULLUP_EN ,Enables pullup on output" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--10. " OUTPUT_EN ,Enables output mode to enable output ties to" "Ibuf,,,Obuf"
|
|
bitfld.long 0x00 8. " TERM_DISABLE_MODE , Termination 'dynamic_dci_ts' is used during read transactions" "No,Yes"
|
|
bitfld.long 0x00 7. " IBUF_DISABLE_MODE ,Use ibuf_disable_into control ibuf" "Disabled,Enabled"
|
|
bitfld.long 0x00 5.--6. " DCI_TYPE ,DCI Mode Selection" "Disabled,Drive,,Termination"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TERM_EN , Tri State Termination Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " DCI_UPDATE_B ,DCI Update Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1.--2. " INP_TYPE ,Input buffer control" "Off,Vref based differential receiver for SSTL/HSTL,Differential input receiver,LVCMOS receiver"
|
|
line.long 0x14 "DDRIOB_DIFF1,DDR IOB Config for DQS 3:2"
|
|
bitfld.long 0x00 11. " PULLUP_EN ,Enables pullup on output" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--10. " OUTPUT_EN ,Enables output mode to enable output ties to" "Ibuf,,,Obuf"
|
|
bitfld.long 0x00 8. " TERM_DISABLE_MODE , Termination 'dynamic_dci_ts' is used during read transactions" "No,Yes"
|
|
bitfld.long 0x00 7. " IBUF_DISABLE_MODE ,Use ibuf_disable_into control ibuf" "Disabled,Enabled"
|
|
bitfld.long 0x00 5.--6. " DCI_TYPE ,DCI Mode Selection" "Disabled,Drive,,Termination"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TERM_EN , Tri State Termination Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " DCI_UPDATE_B ,DCI Update Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1.--2. " INP_TYPE ,Input buffer control" "Off,Vref based differential receiver for SSTL/HSTL,Differential input receiver,LVCMOS receiver"
|
|
line.long 0x18 "DDRIOB_CLOCK,DDR IOB Config for Clock Output"
|
|
bitfld.long 0x00 11. " PULLUP_EN ,Enables pullup on output" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--10. " OUTPUT_EN ,Enables output mode to enable output ties to" "Ibuf,,,Obuf"
|
|
bitfld.long 0x00 8. " TERM_DISABLE_MODE , Termination 'dynamic_dci_ts' is used during read transactions" "No,Yes"
|
|
bitfld.long 0x00 7. " IBUF_DISABLE_MODE ,Use ibuf_disable_into control ibuf" "Disabled,Enabled"
|
|
bitfld.long 0x00 5.--6. " DCI_TYPE ,DCI Mode Selection" "Disabled,Drive,,Termination"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TERM_EN , Tri State Termination Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " DCI_UPDATE_B ,DCI Update Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1.--2. " INP_TYPE ,Input buffer control" "Off,Vref based differential receiver for SSTL/HSTL,Differential input receiver,LVCMOS receiver"
|
|
width 25.
|
|
hgroup.long 0xB5C++0x0F
|
|
hide.long 0x00 "DDRIOB_DRIVE_SLEW_ADDR,Drive and Slew controls for Address and Command pins"
|
|
hide.long 0x04 "DDRIOB_DRIVE_SLEW_DATA ,Drive and Slew controls for DQ pins"
|
|
hide.long 0x08 "DDRIOB_DRIVE_SLEW_DIFF,Drive and Slew controls for DQS pins"
|
|
hide.long 0x0C "DDRIOB_DRIVE_SLEW_CLOCK,Drive and Slew controls for Clock pins"
|
|
group.long 0x0B6C++0x0B
|
|
line.long 0x00 "DDRIOB_DDR_CTRL,DDR IOB Buffer Control"
|
|
bitfld.long 0x00 9. " REFIO_EN ,Enables VRP/VRN" "Not used,Used"
|
|
bitfld.long 0x00 5.--6. " VREF_EXT_EN ,Enables External VREF input" "Disabled for lower 16 bits,Enabled for lower 16 bits,Disabled for upper 16 bits,Enabled for upper 16 bits"
|
|
textline " "
|
|
bitfld.long 0x00 1.--4. " VREF_SEL ,Specifies DDR IOB Vref generator output" "0.6V,0.675V,,0.75V,,,,0.90V,?..."
|
|
bitfld.long 0x00 0. " VREF_INT_EN ,Enables VREF internal generator" "Disabled,Enabled"
|
|
line.long 0x04 "DDRIOB_DCI_CTRL,DDR IOB DCI Config"
|
|
bitfld.long 0x04 20. " UPDATE_CONTROL ,DCI Update Mode" "0,1"
|
|
bitfld.long 0x04 17.--19. " PREF_OPT2 ,DCI Calibration" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 14.--15. " PREF_OPT1 ,DCI Calibration" "0,1,2,3"
|
|
bitfld.long 0x04 11.--13. " NREF_OPT4 ,DCI Calibration" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x04 8.--10. " NREF_OPT2 ,DCI Calibration" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 6.--7. " NREF_OPT1 ,DCI Calibration" "0,1,2,3"
|
|
bitfld.long 0x04 1. " ENABLE ,DCI System Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " RESET ,At least toggle once to initialize flops in DCI system" "No reset,Reset"
|
|
line.long 0x08 "DDRIOB_DCI_STATUS,DDR IO Buffer DCI Status"
|
|
bitfld.long 0x08 13. " DONE ,DCI done signal" "No,Yes"
|
|
rbitfld.long 0x08 0. " LOCK ,DCI Status input Read Only" "No,Yes"
|
|
width 12.
|
|
tree.end
|
|
tree "Shared Memory Controller"
|
|
base ad:0xE000E000
|
|
width 23.
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "MEMC_STATUS,Memc Status Register"
|
|
bitfld.long 0x00 12. " RAW_ECC_INT1 ,Raw status of the ECC interrupt on interface 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 11. " RAW_ECC_INT0 ,Raw status of the ECC interrupt on interface 0" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10. " ECC_INT1 ,Status of the ECC interrupt on interface 1" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ECC_INT0 ,Status of the ECC interrupt on interface 0" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " ECC_INT1_EN ,Status of the ECC interrupt enable on interface 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ECC_INT0_EN ,Status of the ECC interrupt enable on interface 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RAW_INT_STATUS1 ,Current raw interrupt status for interface 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " RAW_INT_STATUS0 ,Current raw interrupt status for interface 0" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " INT_STATUS1 ,Current interrupt status for interface 1" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INT_STATUS0 ,Current interrupt status for interface 0" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " INT_EN1 ,Status of memory interface 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " INT_EN0 ,Status of memory interface 0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STATE ,Operating state of the SMC" "Ready,Low-power"
|
|
line.long 0x04 "MEMIF_CFG,Memory Interface Configuration Register"
|
|
bitfld.long 0x04 16.--17. " EXCLUSIVE_MONITORS ,Number of implemented exclusive access monitors" "0,1,2,3"
|
|
bitfld.long 0x04 14. " REMAP1 ,Value of the remap_1 input" "Low,High"
|
|
bitfld.long 0x04 12.--13. " MEMORY_WIDTH1 ,Maximum width of the SMC memory data bus for interface 1" "8 bits,16 bits,32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x04 10.--11. " MEMORY_CHIPS1 ,Number of different chip selects that the memory interface 1 supports" "1,2,3,4"
|
|
bitfld.long 0x04 8.--9. " MEMORY_TYPE1 ,Memory interface 1 type" "Configuration,SRAM non-multiplexed,NAND,SRAM multiplexed"
|
|
bitfld.long 0x04 6. " REMAP0 ,Value of the remap_0 input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 4.--5. " MEMORY_WIDTH0 ,Maximum width of the SMC memory data bus for interface 0" "8 bits,16 bits,32 bits,?..."
|
|
bitfld.long 0x04 2.--3. " MEMORY_CHIPS0 ,Number of different chip selects that the memory interface 0 supports" "1,2,3,4"
|
|
bitfld.long 0x04 0.--1. " MEMORY_TYPE0 ,Memory interface 0 type" "Reserved,SRAM non-multiplexed,NAND,SRAM multiplexed"
|
|
wgroup.long 0x08++0x07
|
|
line.long 0x00 "MEMC_CFG_SET,Memc Config Set Register"
|
|
bitfld.long 0x00 6. " ECC_INT_ENABLE1 ,ECC interrupt 1 enable" "No effect,Enable"
|
|
bitfld.long 0x00 5. " ECC_INT_ENABLE0 ,ECC interrupt 0 enable" "No effect,Enable"
|
|
bitfld.long 0x00 2. " LOW_POWER_REQ ,SMC low-power state request" "No effect,Request"
|
|
textline " "
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|
bitfld.long 0x00 1. " INT_ENABLE1 ,Memory interface 1 interrupt enable" "No effect,Enable"
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|
bitfld.long 0x00 0. " INT_ENABLE0 ,Memory interface 0 interrupt enable" "No effect,Enable"
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|
line.long 0x04 "MEMC_CFG_CLR,Memc Config Clear Register"
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|
bitfld.long 0x04 6. " ECC_INT_DISABLE1 ,ECC interrupt 1 disable" "No,Yes"
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|
bitfld.long 0x04 5. " ECC_INT_DISABLE0 ,ECC interrupt 0 disable" "No,Yes"
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|
bitfld.long 0x04 4. " INT_CLR_1 ,SMC interrupt 1 clear" "No effect,Clear"
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|
textline " "
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|
bitfld.long 0x04 3. " INT_CLR_0 ,SMC interrupt 0 clear" "No effect,Clear"
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|
bitfld.long 0x04 2. " LOW_POWER_EXIT ,SMC exit low-power state request" "No effect,Request"
|
|
bitfld.long 0x04 1. " INT_DISABLE1 ,Memory interface 1 interrupt disable" "No,Yes"
|
|
textline " "
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|
bitfld.long 0x04 0. " INT_DISABLE0 ,Memory interface 0 interrupt disable" "No,Yes"
|
|
if (((d.l((ad:0xE000E000+0x10)))&0x600000)==0x0)
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|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "DIRECT_CMD,Direct Command Register"
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|
bitfld.long 0x00 23.--25. " CHIP_SELECT ,Chip configuration bank" "Chip 1 interface 0,Chip 2 interface 0,Chip 3 interface 0,Chip 4 interface 0,Chip 1 interface 1,Chip 2 interface 1,Chip 3 interface 1,Chip 4 interface 1"
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|
bitfld.long 0x00 21.--22. " CMD_TYPE ,Selects the command type" "UpdateRegs and AXI,ModeReg,UpdateRegs,ModeReg and UpdateRegs"
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|
textline " "
|
|
bitfld.long 0x00 20. " SET_CRE ,Configuration register enable signal" "Low,High"
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|
hexmask.long.word 0x00 0.--15. 1. " WDATA ,WDATA"
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|
elif (((d.l((ad:0xE000E000+0x10)))&0x600000)==(0x200000||0x600000))
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "DIRECT_CMD,Direct Command Register"
|
|
bitfld.long 0x00 23.--25. " CHIP_SELECT ,Chip configuration bank" "Chip 1 interface 0,Chip 2 interface 0,Chip 3 interface 0,Chip 4 interface 0,Chip 1 interface 1,Chip 2 interface 1,Chip 3 interface 1,Chip 4 interface 1"
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|
bitfld.long 0x00 21.--22. " CMD_TYPE ,Selects the command type" "UpdateRegs and AXI,ModeReg,UpdateRegs,ModeReg and UpdateRegs"
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|
textline " "
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|
bitfld.long 0x00 20. " SET_CRE ,Configuration register enable signal" "Low,High"
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|
hexmask.long.tbyte 0x00 0.--19. 1. " ADDR ,External memory address"
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|
else
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|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "DIRECT_CMD,Direct Command Register"
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|
bitfld.long 0x00 23.--25. " CHIP_SELECT ,Chip configuration bank" "Chip 1 interface 0,Chip 2 interface 0,Chip 3 interface 0,Chip 4 interface 0,Chip 1 interface 1,Chip 2 interface 1,Chip 3 interface 1,Chip 4 interface 1"
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|
bitfld.long 0x00 21.--22. " CMD_TYPE ,Selects the command type" "UpdateRegs and AXI,ModeReg,UpdateRegs,ModeReg and UpdateRegs"
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|
textline " "
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|
bitfld.long 0x00 20. " SET_CRE ,Configuration register enable signal" "Low,High"
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|
endif
|
|
wgroup.long 0x14++0x03
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|
line.long 0x00 "SET_CYCLES,Set Cycles Register"
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|
bitfld.long 0x00 20.--23. " SET_T6 ,Value written to we_time/t_rr" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 17.--19. " SET_T5 ,Value written to t_rr/t_ar" "0,1,2,3,4,5,6,7"
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|
bitfld.long 0x00 14.--16. " SET_T4 ,Value written to t_pc/t_clr" "0,1,2,3,4,5,6,7"
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|
textline " "
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|
bitfld.long 0x00 11.--13. " SET_T3 ,Value written to t_wp" "0,1,2,3,4,5,6,7"
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|
bitfld.long 0x00 8.--10. " SET_T2 ,Value written to t_ceoe/t_rea" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--7. " SET_T1 ,Value written to t_wc" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
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|
bitfld.long 0x00 0.--3. " SET_T0 ,Value written to t_rc" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "SET_OPMODE,Optmode Set Register"
|
|
bitfld.long 0x00 13.--15. " SET_BURST_ALIGN ,Burst align" "Disabled,32,64,128,256,?..."
|
|
bitfld.long 0x00 12. " SET_BLS ,Byte line strobe" "Chip select,we_n timing"
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|
bitfld.long 0x00 11. " SET_ADV ,Address valid" "No effect,Valid"
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|
textline " "
|
|
bitfld.long 0x00 10. " SET_BAA ,Burst address advance" "Disabled,Enabled"
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|
bitfld.long 0x00 7.--9. " SET_WR_BL ,Memory write burst length" "1,4,8,16,32,Continuous,?..."
|
|
bitfld.long 0x00 6. " SET_WR_SYNC ,Synchronous write" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " SET_RD_BL ,Memory read burst length" "1,4,8,16,32,Continuous,?..."
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|
bitfld.long 0x00 2. " SET_RD_SYNC ,Synchronous read" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " SET_MW ,Memory width" "8,16,32,?..."
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "REFRESH_PERIOD_0,Refresh Period 0 Register"
|
|
bitfld.long 0x00 0.--3. " PERIOD ,Number of consecutive memory bursts that are permitted" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "REFRESH_PERIOD_1,Refresh Period 1 Register"
|
|
bitfld.long 0x04 0.--3. " PERIOD ,Number of consecutive memory bursts that are permitted" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x100++0x07
|
|
line.long 0x00 "SRAM_CYCLES0_0,SRAM Cycles Register"
|
|
bitfld.long 0x00 20. " WE_TIME ,WE time" "2 mclk cycles,Together"
|
|
bitfld.long 0x00 17.--19. " T_TR ,Turnaround time for SRAM chip configurations" "Reserved,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 14.--16. " T_PC ,Page cycle time for SRAM chip configurations" "Reserved,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 11.--13. " T_WP ,we_n assertion delay" "Reserved,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--10. " T_CEOE ,oe_n assertion delay for SRAM chip configurations" "Reserved,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--7. " T_WC ,Write cycle time" "Reserved,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " T_RC ,Read cycle time" "Reserved,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "OPMODE0_0,Opmode Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " ADDRESS_MATCH ,Comparison value for address bits"
|
|
hexmask.long.byte 0x04 16.--23. 1. " ADDRESS_MASK ,Mask for address bits"
|
|
bitfld.long 0x04 13.--15. " BURST_ALIGN ,Burst align" "Disabled,32,64,128,256,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12. " BLS ,Byte-lane strobe outputs" "Chip select,we_n timing"
|
|
bitfld.long 0x04 11. " ADV ,Address advance signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " BAA ,Burst address advance signal" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7.--9. " WR_BL ,Burst length for writes" "1,4,8,16,32,Continuous,?..."
|
|
bitfld.long 0x04 6. " WR_SYNC ,Write sync mode" "Disabled,Enabled"
|
|
bitfld.long 0x04 3.--5. " RD_BL ,Burst length for reads" "1,4,8,16,32,Continuous,?..."
|
|
textline " "
|
|
bitfld.long 0x04 2. " RD_SYNC ,Read sync mode" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--1. " MW ,SMC memory data bus width" "8,16,32,?..."
|
|
rgroup.long 0x120++0x07
|
|
line.long 0x00 "SRAM_CYCLES0_1,SRAM Cycles Register"
|
|
bitfld.long 0x00 20. " WE_TIME ,WE time" "2 mclk cycles,Together"
|
|
bitfld.long 0x00 17.--19. " T_TR ,Turnaround time for SRAM chip configurations" "Reserved,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 14.--16. " T_PC ,Page cycle time for SRAM chip configurations" "Reserved,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 11.--13. " T_WP ,we_n assertion delay" "Reserved,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--10. " T_CEOE ,oe_n assertion delay for SRAM chip configurations" "Reserved,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--7. " T_WC ,Write cycle time" "Reserved,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " T_RC ,Read cycle time" "Reserved,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "OPMODE0_1,Opmode Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " ADDRESS_MATCH ,Comparison value for address bits"
|
|
hexmask.long.byte 0x04 16.--23. 1. " ADDRESS_MASK ,Mask for address bits"
|
|
bitfld.long 0x04 13.--15. " BURST_ALIGN ,Burst align" "Disabled,32,64,128,256,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12. " BLS ,Byte-lane strobe outputs" "Chip select,we_n timing"
|
|
bitfld.long 0x04 11. " ADV ,Address advance signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " BAA ,Burst address advance signal" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7.--9. " WR_BL ,Burst length for writes" "1,4,8,16,32,Continuous,?..."
|
|
bitfld.long 0x04 6. " WR_SYNC ,Write sync mode" "Disabled,Enabled"
|
|
bitfld.long 0x04 3.--5. " RD_BL ,Burst length for reads" "1,4,8,16,32,Continuous,?..."
|
|
textline " "
|
|
bitfld.long 0x04 2. " RD_SYNC ,Read sync mode" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--1. " MW ,SMC memory data bus width" "8,16,32,?..."
|
|
rgroup.long 0x180++0x07
|
|
line.long 0x00 "NAND_CYCLES1_0,NAND Cycles Register"
|
|
bitfld.long 0x00 20.--23. " T_RR ,Busy to re_n for NAND chip configurations" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 17.--19. " T_AR ,ID read time for NAND chip configurations" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 14.--16. " T_CLR ,Status read time for NAND chip configurations" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 11.--13. " T_WP ,we_n assertion delay" "Reserved,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--10. " T_REA ,re_n assertion delay for NAND chip configurations" "Reserved,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--7. " T_WC ,Write cycle time" "Reserved,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " T_RC ,Read cycle time" "Reserved,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "OPMODE1_0,Opmode Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " ADDRESS_MATCH ,Comparison value for address bits"
|
|
hexmask.long.byte 0x04 16.--23. 1. " ADDRESS_MASK ,Mask for address bits"
|
|
bitfld.long 0x04 13.--15. " BURST_ALIGN ,Burst align" "Disabled,32,64,128,256,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12. " BLS ,Byte-lane strobe outputs" "Chip select,we_n timing"
|
|
bitfld.long 0x04 11. " ADV ,Address advance signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " BAA ,Burst address advance signal" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7.--9. " WR_BL ,Burst length for writes" "1,4,8,16,32,Continuous,?..."
|
|
bitfld.long 0x04 6. " WR_SYNC ,Write sync mode" "Disabled,Enabled"
|
|
bitfld.long 0x04 3.--5. " RD_BL ,Burst length for reads" "1,4,8,16,32,Continuous,?..."
|
|
textline " "
|
|
bitfld.long 0x04 2. " RD_SYNC ,Read sync mode" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--1. " MW ,SMC memory data bus width" "8,16,32,?..."
|
|
rgroup.byte 0x200++0x00
|
|
line.byte 0x00 "USER_STATUS,USER_STATUS input signals Register"
|
|
wgroup.byte 0x204++0x00
|
|
line.byte 0x00 "USER_CONFIG,USER_CONFIG output signals Register"
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ECC_STATUS_0,ECC Status Register"
|
|
bitfld.long 0x00 29. " ECC_READ[4] ,Read flag for ECC block 4" "Not read,Read"
|
|
bitfld.long 0x00 28. " ECC_READ[3] ,Read flag for ECC block 3" "Not read,Read"
|
|
bitfld.long 0x00 27. " ECC_READ[2] ,Read flag for ECC block 2" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 26. " ECC_READ[1] ,Read flag for ECC block 1" "Not read,Read"
|
|
bitfld.long 0x00 25. " ECC_READ[0] ,Read flag for ECC block 0" "Not read,Read"
|
|
bitfld.long 0x00 24. " ECC_CAN_CORRECT[4] ,Correctable flag for ECC block 4" "Not correctable,Correctable"
|
|
textline " "
|
|
bitfld.long 0x00 23. " ECC_CAN_CORRECT[3] ,Correctable flag for ECC block 3" "Not correctable,Correctable"
|
|
bitfld.long 0x00 22. " ECC_CAN_CORRECT[2] ,Correctable flag for ECC block 2" "Not correctable,Correctable"
|
|
bitfld.long 0x00 21. " ECC_CAN_CORRECT[1] ,Correctable flag for ECC block 1" "Not correctable,Correctable"
|
|
textline " "
|
|
bitfld.long 0x00 20. " ECC_CAN_CORRECT[0] ,Correctable flag for ECC block 0" "Not correctable,Correctable"
|
|
bitfld.long 0x00 19. " ECC_FAIL[4] ,Pass/fail flag for ECC block 4" "Pass,Fail"
|
|
bitfld.long 0x00 18. " ECC_FAIL[3] ,Pass/fail flag for ECC block 3" "Pass,Fail"
|
|
textline " "
|
|
bitfld.long 0x00 17. " ECC_FAIL[2] ,Pass/fail flag for ECC block 2" "Pass,Fail"
|
|
bitfld.long 0x00 16. " ECC_FAIL[1] ,Pass/fail flag for ECC block 1" "Pass,Fail"
|
|
bitfld.long 0x00 15. " ECC_FAIL[0] ,Pass/fail flag for ECC block 0" "Pass,Fail"
|
|
textline " "
|
|
bitfld.long 0x00 14. " ECC_VALUE_VALID[4] ,Valid flag for ECC block 4" "Not valid,Valid"
|
|
bitfld.long 0x00 13. " ECC_VALUE_VALID[3] ,Valid flag for ECC block 3" "Not valid,Valid"
|
|
bitfld.long 0x00 12. " ECC_VALUE_VALID[2] ,Valid flag for ECC block 2" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ECC_VALUE_VALID[1] ,Valid flag for ECC block 1" "Not valid,Valid"
|
|
bitfld.long 0x00 10. " ECC_VALUE_VALID[0] ,Valid flag for ECC block 0" "Not valid,Valid"
|
|
bitfld.long 0x00 9. " ECC_READ_NOT_WRITE ,ECC write/read flag" "Write,Read"
|
|
textline " "
|
|
bitfld.long 0x00 7.--8. " ECC_LAST_STATUS ,ECC last status" "Completed successfully,Unaligned Address/out-of-range,Data stop after incomplete block,Data stopped but values not read/written"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ECC_STATUS ,Status of the ECC block" "Idle,Busy"
|
|
bitfld.long 0x00 5. " RAW_INT_STATUS[5] ,Abort raw interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " RAW_INT_STATUS[4] ,Extra block raw interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RAW_INT_STATUS[3] ,Block 3 raw interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " RAW_INT_STATUS[2] ,Block 2 raw interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " RAW_INT_STATUS[1] ,Block 1 raw interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RAW_INT_STATUS[0] ,Block 0 raw interrupt status" "No interrupt,Interrupt"
|
|
group.long 0x304++0x0b
|
|
line.long 0x00 "ECC_MEMCFG_0,ECC Memory Configuration Register"
|
|
bitfld.long 0x00 11.--12. " ECC_EXTRA_BLOCK_SIZE ,Size of the extra block in memory" "4 bytes,8 bytes,16 bytes,32 bytes"
|
|
bitfld.long 0x00 10. " ECC_EXTRA_BLOCK ,ECC Extra Block Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " ECC_INT_ABORT ,Interrupt on ECC abort" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ECC_INT_PASS ,Interrupt when a correct ECC value is read from memory" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 7. " ECC_IGNORE_ADD_EIGHT ,A8 output with the address" "Output,Not output"
|
|
bitfld.long 0x00 5.--6. " ECC_JUMP ,Memory column change address commands" "Disabled,Column change commands,Full command,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4. " ECC_READ_END ,ECC values read from end of the page" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--3. " ECC_MODE ,Mode of ECC block" "Bypassed,Not read/written to/from memory,Read/written to/from memory,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " PAGE_SIZE ,The number of 512 byte blocks in a page" "No 512 byte blocks,One 512 byte block,Two 512 byte blocks,Four 512 byte blocks"
|
|
line.long 0x04 "ECC_MEMCOMMAND1_0,ECC Memory Command 1 Register"
|
|
bitfld.long 0x04 24. " NAND_RD_CMD_END_VALID ,Use end command" "Not valid,Valid"
|
|
hexmask.long.byte 0x04 16.--23. 1. " NAND_RD_CMD_END ,The NAND command used to initiate a write"
|
|
hexmask.long.byte 0x04 8.--15. 1. " NAND_RD_CMD ,The NAND command used to initiate a read"
|
|
textline " "
|
|
hexmask.long.byte 0x04 0.--7. 1. " NAND_WR_CMD ,The NAND command used to initiate a write"
|
|
line.long 0x08 "ECC_MEMCOMMAND2_0,ECC Memory Command 2 Register"
|
|
bitfld.long 0x08 24. " NAND_RD_COL_CHANGE_END_VALID ,Use end command" "Not valid,Valid"
|
|
hexmask.long.byte 0x08 16.--23. 1. " NAND_RD_COL_CHANGE_ENDD ,The NAND command used to initiate a write"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " NAND_RD_COL_CHANGE ,The NAND command used to initiate a read"
|
|
hexmask.long.byte 0x08 0.--7. 1. " NAND_WR_COL_CHANGE ,The NAND command used to initiate a write"
|
|
rgroup.long 0x310++0x17
|
|
line.long 0x00 "ECC_ADDR0_0,ECC Address Register 0 (lower 32 bits)"
|
|
line.long 0x04 "ECC_ADDR1_0,ECC Address Register 1 (upper 24 bits)"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " ECC_ADDR ,Address bits 55 to 32"
|
|
line.long 0x8 "ECC_VALUE0_0,ECC Value Register 0"
|
|
bitfld.long 0x8 31. " ECC_INT ,ECC interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x8 30. " ECC_VALID ,ECC valid flag" "Not valid,Valid"
|
|
bitfld.long 0x8 29. " ECC_READ ,ECC read flag" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x8 28. " ECC_FAIL ,ECC fail flag" "Not fail,Fail"
|
|
bitfld.long 0x8 27. " ECC_CORRECT ,ECC correctable flag" "Not correctable,Correctable"
|
|
hexmask.long.tbyte 0x8 0.--23. 1. " ECC_VALUE ,ECC value of check result for block"
|
|
line.long 0xC "ECC_VALUE1_0,ECC Value Register 1"
|
|
bitfld.long 0xC 31. " ECC_INT ,ECC interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0xC 30. " ECC_VALID ,ECC valid flag" "Not valid,Valid"
|
|
bitfld.long 0xC 29. " ECC_READ ,ECC read flag" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0xC 28. " ECC_FAIL ,ECC fail flag" "Not fail,Fail"
|
|
bitfld.long 0xC 27. " ECC_CORRECT ,ECC correctable flag" "Not correctable,Correctable"
|
|
hexmask.long.tbyte 0xC 0.--23. 1. " ECC_VALUE ,ECC value of check result for block"
|
|
line.long 0x10 "ECC_VALUE2_0,ECC Value Register 2"
|
|
bitfld.long 0x10 31. " ECC_INT ,ECC interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 30. " ECC_VALID ,ECC valid flag" "Not valid,Valid"
|
|
bitfld.long 0x10 29. " ECC_READ ,ECC read flag" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x10 28. " ECC_FAIL ,ECC fail flag" "Not fail,Fail"
|
|
bitfld.long 0x10 27. " ECC_CORRECT ,ECC correctable flag" "Not correctable,Correctable"
|
|
hexmask.long.tbyte 0x10 0.--23. 1. " ECC_VALUE ,ECC value of check result for block"
|
|
line.long 0x14 "ECC_VALUE3_0,ECC Value Register 3"
|
|
bitfld.long 0x14 31. " ECC_INT ,ECC interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 30. " ECC_VALID ,ECC valid flag" "Not valid,Valid"
|
|
bitfld.long 0x14 29. " ECC_READ ,ECC read flag" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x14 28. " ECC_FAIL ,ECC fail flag" "Not fail,Fail"
|
|
bitfld.long 0x14 27. " ECC_CORRECT ,ECC correctable flag" "Not correctable,Correctable"
|
|
hexmask.long.tbyte 0x14 0.--23. 1. " ECC_VALUE ,ECC value of check result for block"
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "ECC_STATUS_1,ECC Status Register"
|
|
bitfld.long 0x00 29. " ECC_READ[4] ,Read flag for ECC block 4" "Not read,Read"
|
|
bitfld.long 0x00 28. " ECC_READ[3] ,Read flag for ECC block 3" "Not read,Read"
|
|
bitfld.long 0x00 27. " ECC_READ[2] ,Read flag for ECC block 2" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 26. " ECC_READ[1] ,Read flag for ECC block 1" "Not read,Read"
|
|
bitfld.long 0x00 25. " ECC_READ[0] ,Read flag for ECC block 0" "Not read,Read"
|
|
bitfld.long 0x00 24. " ECC_CAN_CORRECT[4] ,Correctable flag for ECC block 4" "Not correctable,Correctable"
|
|
textline " "
|
|
bitfld.long 0x00 23. " ECC_CAN_CORRECT[3] ,Correctable flag for ECC block 3" "Not correctable,Correctable"
|
|
bitfld.long 0x00 22. " ECC_CAN_CORRECT[2] ,Correctable flag for ECC block 2" "Not correctable,Correctable"
|
|
bitfld.long 0x00 21. " ECC_CAN_CORRECT[1] ,Correctable flag for ECC block 1" "Not correctable,Correctable"
|
|
textline " "
|
|
bitfld.long 0x00 20. " ECC_CAN_CORRECT[0] ,Correctable flag for ECC block 0" "Not correctable,Correctable"
|
|
bitfld.long 0x00 19. " ECC_FAIL[4] ,Pass/fail flag for ECC block 4" "Pass,Fail"
|
|
bitfld.long 0x00 18. " ECC_FAIL[3] ,Pass/fail flag for ECC block 3" "Pass,Fail"
|
|
textline " "
|
|
bitfld.long 0x00 17. " ECC_FAIL[2] ,Pass/fail flag for ECC block 2" "Pass,Fail"
|
|
bitfld.long 0x00 16. " ECC_FAIL[1] ,Pass/fail flag for ECC block 1" "Pass,Fail"
|
|
bitfld.long 0x00 15. " ECC_FAIL[0] ,Pass/fail flag for ECC block 0" "Pass,Fail"
|
|
textline " "
|
|
bitfld.long 0x00 14. " ECC_VALUE_VALID[4] ,Valid flag for ECC block 4" "Not valid,Valid"
|
|
bitfld.long 0x00 13. " ECC_VALUE_VALID[3] ,Valid flag for ECC block 3" "Not valid,Valid"
|
|
bitfld.long 0x00 12. " ECC_VALUE_VALID[2] ,Valid flag for ECC block 2" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ECC_VALUE_VALID[1] ,Valid flag for ECC block 1" "Not valid,Valid"
|
|
bitfld.long 0x00 10. " ECC_VALUE_VALID[0] ,Valid flag for ECC block 0" "Not valid,Valid"
|
|
bitfld.long 0x00 9. " ECC_READ_NOT_WRITE ,ECC write/read flag" "Write,Read"
|
|
textline " "
|
|
bitfld.long 0x00 7.--8. " ECC_LAST_STATUS ,ECC last status" "Completed successfully,Unaligned Address/out-of-range,Data stop after incomplete block,Data stopped but values not read/written"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ECC_STATUS ,Status of the ECC block" "Idle,Busy"
|
|
bitfld.long 0x00 5. " RAW_INT_STATUS[5] ,Abort raw interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " RAW_INT_STATUS[4] ,Extra block raw interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RAW_INT_STATUS[3] ,Block 3 raw interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " RAW_INT_STATUS[2] ,Block 2 raw interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " RAW_INT_STATUS[1] ,Block 1 raw interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RAW_INT_STATUS[0] ,Block 0 raw interrupt status" "No interrupt,Interrupt"
|
|
group.long 0x404++0x0b
|
|
line.long 0x00 "ECC_MEMCFG_1,ECC Memory Configuration Register"
|
|
bitfld.long 0x00 11.--12. " ECC_EXTRA_BLOCK_SIZE , Size of the extra block in memory" "4 bytes,8 bytes,16 bytes,32 bytes"
|
|
bitfld.long 0x00 10. " ECC_EXTRA_BLOCK ,ECC Extra Block Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " ECC_INT_ABORT ,Interrupt on ECC abort" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ECC_INT_PASS ,Interrupt when a correct ECC value is read from memory" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 7. " ECC_IGNORE_ADD_EIGHT ,A8 output with the address" "Output,Not output"
|
|
bitfld.long 0x00 5.--6. " ECC_JUMP ,Memory column change address commands" "Disabled,Column change commands,Full command,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4. " ECC_READ_END ,ECC values read from end of the page" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--3. " ECC_MODE ,Mode of ECC block" "Bypassed,Not read/written to/from memory,Read/written to/from memory,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " PAGE_SIZE ,The number of 512 byte blocks in a page" "No 512 byte blocks,One 512 byte block,Two 512 byte blocks,Four 512 byte blocks"
|
|
line.long 0x04 "ECC_MEMCOMMAND1_1,ECC Memory Command 1 Register"
|
|
bitfld.long 0x04 24. " NAND_RD_CMD_END_VALID ,Use end command" "Not valid,Valid"
|
|
hexmask.long.byte 0x04 16.--23. 1. " NAND_RD_CMD_END ,The NAND command used to initiate a write"
|
|
hexmask.long.byte 0x04 8.--15. 1. " NAND_RD_CMD ,The NAND command used to initiate a read"
|
|
textline " "
|
|
hexmask.long.byte 0x04 0.--7. 1. " NAND_WR_CMD ,The NAND command used to initiate a write"
|
|
line.long 0x08 "ECC_MEMCOMMAND2_1,ECC Memory Command 2 Register"
|
|
bitfld.long 0x08 24. " NAND_RD_COL_CHANGE_END_VALID ,Use end command" "Not valid,Valid"
|
|
hexmask.long.byte 0x08 16.--23. 1. " NAND_RD_COL_CHANGE_END ,The NAND command used to initiate a write"
|
|
textline ""
|
|
hexmask.long.byte 0x08 8.--15. 1. " NAND_RD_COL_CHANGE ,The NAND command used to initiate a read"
|
|
hexmask.long.byte 0x08 0.--7. 1. " NAND_WR_COL_CHANGE ,The NAND command used to initiate a write"
|
|
rgroup.long 0x410++0x17
|
|
line.long 0x00 "ECC_ADDR0_1,ECC Address Register 0 (lower 32 bits)"
|
|
line.long 0x04 "ECC_ADDR1_1,ECC Address Register 1 (upper 24 bits)"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " ECC_ADDR ,Address bits 55 to 32"
|
|
line.long 0x8 "ECC_VALUE0_1,ECC Value Register 0"
|
|
bitfld.long 0x8 31. " ECC_INT ,ECC interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x8 30. " ECC_VALID ,ECC valid flag" "Not valid,Valid"
|
|
bitfld.long 0x8 29. " ECC_READ ,ECC read flag" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x8 28. " ECC_FAIL ,ECC fail flag" "Not fail,Fail"
|
|
bitfld.long 0x8 27. " ECC_CORRECT ,ECC correctable flag" "Not correctable,Correctable"
|
|
hexmask.long.tbyte 0x8 0.--23. 1. " ECC_VALUE ,ECC value of check result for block"
|
|
line.long 0xC "ECC_VALUE1_1,ECC Value Register 1"
|
|
bitfld.long 0xC 31. " ECC_INT ,ECC interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0xC 30. " ECC_VALID ,ECC valid flag" "Not valid,Valid"
|
|
bitfld.long 0xC 29. " ECC_READ ,ECC read flag" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0xC 28. " ECC_FAIL ,ECC fail flag" "Not fail,Fail"
|
|
bitfld.long 0xC 27. " ECC_CORRECT ,ECC correctable flag" "Not correctable,Correctable"
|
|
hexmask.long.tbyte 0xC 0.--23. 1. " ECC_VALUE ,ECC value of check result for block"
|
|
line.long 0x10 "ECC_VALUE2_1,ECC Value Register 2"
|
|
bitfld.long 0x10 31. " ECC_INT ,ECC interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 30. " ECC_VALID ,ECC valid flag" "Not valid,Valid"
|
|
bitfld.long 0x10 29. " ECC_READ ,ECC read flag" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x10 28. " ECC_FAIL ,ECC fail flag" "Not fail,Fail"
|
|
bitfld.long 0x10 27. " ECC_CORRECT ,ECC correctable flag" "Not correctable,Correctable"
|
|
hexmask.long.tbyte 0x10 0.--23. 1. " ECC_VALUE ,ECC value of check result for block"
|
|
line.long 0x14 "ECC_VALUE3_1,ECC Value Register 3"
|
|
bitfld.long 0x14 31. " ECC_INT ,ECC interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 30. " ECC_VALID ,ECC valid flag" "Not valid,Valid"
|
|
bitfld.long 0x14 29. " ECC_READ ,ECC read flag" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x14 28. " ECC_FAIL ,ECC fail flag" "Not fail,Fail"
|
|
bitfld.long 0x14 27. " ECC_CORRECT ,ECC correctable flag" "Not correctable,Correctable"
|
|
hexmask.long.tbyte 0x14 0.--23. 1. " ECC_VALUE ,ECC value of check result for block"
|
|
group.long 0xe00++0x03
|
|
line.long 0x00 "INTEGRATION_TEST,Integration Test Register"
|
|
bitfld.long 0x00 0. " INT_TEST_EN ,Integration test enable" "Disabled,Enabled"
|
|
rgroup.long 0xFE0++0x0f
|
|
line.long 0x00 "PERIPH_ID_0,Peripheral ID Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PART_NUMBER_0 ,Part number"
|
|
line.long 0x04 "PERIPH_ID_1,Peripheral ID Register 1"
|
|
bitfld.long 0x04 4.--7. " DESIGNER_0 ,Designer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--3. " PART_NUMBER_1 ,Part number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "PERIPH_ID_2,Peripheral ID Register 2"
|
|
bitfld.long 0x08 4.--7. " REVISION ,Revision" "Reserved,R1p0,R1p1,R1p2,R2p0,R2p1,?..."
|
|
bitfld.long 0x08 0.--3. " DESIGNER_1 ,Designer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x0c "PERIPH_ID_3,Peripheral ID Register 3"
|
|
bitfld.long 0x0c 0. " INTEGRATION_CFG ,Integration config" "Not implemented,Implemented"
|
|
rgroup.byte 0xFF0++0x00
|
|
line.byte 0x00 "PCELL_ID_0,PCELL ID Register 0"
|
|
rgroup.byte 0xFF4++0x00
|
|
line.byte 0x00 "PCELL_ID_1,PCELL ID Register 1"
|
|
rgroup.byte 0xFF8++0x00
|
|
line.byte 0x00 "PCELL_ID_2,PCELL ID Register 2"
|
|
rgroup.byte 0xFFC++0x00
|
|
line.byte 0x00 "PCELL_ID_3,PCELL ID Register 3"
|
|
width 11.
|
|
tree.end
|
|
tree.open "Serial Peripheral Interface"
|
|
tree "SPI0"
|
|
base ad:0xE0006000
|
|
width 26.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CONFIG_REG0,SPI Configuration Register"
|
|
bitfld.long 0x00 17. " MODEFAIL_GEN_EN ,ModeFail Generation Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " MAN_START_COM ,Manual Start Command" "No effect,Start"
|
|
bitfld.long 0x00 15. " MAN_START_EN ,Manual Start Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " MANUAL_CS ,Manual CS" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--13. " CS ,Peripheral chip select lines" "Slave 0,Slave 1,Slave 0,Slave 2,Slave 0,Slave 1,Slave 0,Slave 3,Slave 0,Slave 1,Slave 0,Slave 2,Slave 0,Slave 1,Slave 0,No slave"
|
|
bitfld.long 0x00 9. " PERI_SEL ,Peripheral select decode" "1 of 4,4-to-16"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REF_CLK ,Master reference clock select" "SPI ref clock,ext_clk"
|
|
bitfld.long 0x00 6.--7. " FIFO_WIDTH ,FIFO width" "8bits,16bits,24bits,32bits"
|
|
bitfld.long 0x00 3.--5. " BAUD_RATE_DIV ,Master mode baud rate divisor" "div by 2,div by 4,div by 8,div by 16,div by 32,div by 64,div by 128,div by 256"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CLK_PH ,Clock phase" "Active,Inactive"
|
|
bitfld.long 0x00 1. " CLK_POL ,Clock polarity outside SPI word" "Low,High"
|
|
bitfld.long 0x00 0. " MODE_SEL ,Mode select" "Slave,Master"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "INTR_STATUS_REG0,SPI Interrupt STatus Register"
|
|
bitfld.long 0x00 6. " TX_FIFO_UNDERFLOW ,TX FIFO underflow" "No underflow,Underflow"
|
|
bitfld.long 0x00 5. " RX_FIFO_full ,RX FIFO full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RX_FIFO_NOT_EMPTY ,RX FIFO not empty" "<RX threshold,>=RX threshold"
|
|
bitfld.long 0x00 3. " TX_FIFO_FULL ,TX FIFO full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TX_FIFO_NOT_FULL ,TX FIFO not full" "<threshold,>=threshold"
|
|
bitfld.long 0x00 1. " MODE_FAIL ,ModeFail interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RX_OVERFLOW ,Receive Overflow interrupt" "No interrupt,Interrupt"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INTRPT_MASK_REG0_SET/CLR,Interrupt Mask Register"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " TX_FIFO_UNDERFLOW_set/clr ,TX FIFO underflow interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " RX_FIFO_FULL_set/clr ,RX FIFO full interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " RX_FIFO_NOT_EMPTY_set/clr ,RX FIFO not empty interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " TX_FIFO_FULL_set/clr ,TX FIFO full interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TX_FIFO_NOT_FULL_set/clr ,TX FIFO not full interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " MODE_FAIL_set/clr ,ModeFail interrupt " "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " RX_OVERFLOW_set/clr ,Receive Overflow interrupt" "Disabled,Enabled"
|
|
group.long 0x14++0x7
|
|
line.long 0x00 "EN_REG0,SPI Enable Register"
|
|
bitfld.long 0x00 0. " SPI_EN ,SPI Enable" "Disabled,Enabled"
|
|
line.long 0x04 "DELAY_REG0,Delay Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " D_NSS ,Delay in cycles for the length that the master mode chip select outputs are de-asserted between words"
|
|
hexmask.long.byte 0x04 16.--23. 1. " D_BTWN ,Delay in cycles between one chip select being de-activated and the activation of another"
|
|
hexmask.long.byte 0x04 8.--15. 1. " D_AFTER ,Delay in cycles between last bit of current word and the first bit of the next word"
|
|
hexmask.long.byte 0x04 0.--7. 1. " D_INT ,Delay in cycles between setting n_ss_out low and first bit transfer"
|
|
wgroup.long 0x1c++0x03
|
|
line.long 0x00 "TX_DATA_REG0,Transmit Data Register"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "RX_DATA_REG0,Receive Data Register"
|
|
group.long 0x24++0x0b
|
|
line.long 0x00 "SLAVE_IDLE_COUNT_REG0,Slave Idle Count Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SLAVE_IDLE_COUN ,Slave Idle Count"
|
|
line.long 0x04 "TX_THRES_REG0,TX FIFO Threshold Register"
|
|
line.long 0x08 "RX_THRES_REG0,RX FIFO Threshold Register"
|
|
rgroup.long 0xfc++0x03
|
|
line.long 0x00 "MOD_ID_REG0,Module ID Register"
|
|
hexmask.long.tbyte 0x00 0.--24. 1. " MODULE_ID ,Module ID Number"
|
|
width 11.
|
|
tree.end
|
|
tree "SPI1"
|
|
base ad:0xE0007000
|
|
width 26.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CONFIG_REG0,SPI Configuration Register"
|
|
bitfld.long 0x00 17. " MODEFAIL_GEN_EN ,ModeFail Generation Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " MAN_START_COM ,Manual Start Command" "No effect,Start"
|
|
bitfld.long 0x00 15. " MAN_START_EN ,Manual Start Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " MANUAL_CS ,Manual CS" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--13. " CS ,Peripheral chip select lines" "Slave 0,Slave 1,Slave 0,Slave 2,Slave 0,Slave 1,Slave 0,Slave 3,Slave 0,Slave 1,Slave 0,Slave 2,Slave 0,Slave 1,Slave 0,No slave"
|
|
bitfld.long 0x00 9. " PERI_SEL ,Peripheral select decode" "1 of 4,4-to-16"
|
|
textline " "
|
|
bitfld.long 0x00 8. " REF_CLK ,Master reference clock select" "SPI ref clock,ext_clk"
|
|
bitfld.long 0x00 6.--7. " FIFO_WIDTH ,FIFO width" "8bits,16bits,24bits,32bits"
|
|
bitfld.long 0x00 3.--5. " BAUD_RATE_DIV ,Master mode baud rate divisor" "div by 2,div by 4,div by 8,div by 16,div by 32,div by 64,div by 128,div by 256"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CLK_PH ,Clock phase" "Active,Inactive"
|
|
bitfld.long 0x00 1. " CLK_POL ,Clock polarity outside SPI word" "Low,High"
|
|
bitfld.long 0x00 0. " MODE_SEL ,Mode select" "Slave,Master"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "INTR_STATUS_REG0,SPI Interrupt STatus Register"
|
|
bitfld.long 0x00 6. " TX_FIFO_UNDERFLOW ,TX FIFO underflow" "No underflow,Underflow"
|
|
bitfld.long 0x00 5. " RX_FIFO_full ,RX FIFO full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RX_FIFO_NOT_EMPTY ,RX FIFO not empty" "<RX threshold,>=RX threshold"
|
|
bitfld.long 0x00 3. " TX_FIFO_FULL ,TX FIFO full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TX_FIFO_NOT_FULL ,TX FIFO not full" "<threshold,>=threshold"
|
|
bitfld.long 0x00 1. " MODE_FAIL ,ModeFail interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RX_OVERFLOW ,Receive Overflow interrupt" "No interrupt,Interrupt"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INTRPT_MASK_REG0_SET/CLR,Interrupt Mask Register"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " TX_FIFO_UNDERFLOW_set/clr ,TX FIFO underflow interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " RX_FIFO_FULL_set/clr ,RX FIFO full interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " RX_FIFO_NOT_EMPTY_set/clr ,RX FIFO not empty interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " TX_FIFO_FULL_set/clr ,TX FIFO full interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TX_FIFO_NOT_FULL_set/clr ,TX FIFO not full interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " MODE_FAIL_set/clr ,ModeFail interrupt " "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " RX_OVERFLOW_set/clr ,Receive Overflow interrupt" "Disabled,Enabled"
|
|
group.long 0x14++0x7
|
|
line.long 0x00 "EN_REG0,SPI Enable Register"
|
|
bitfld.long 0x00 0. " SPI_EN ,SPI Enable" "Disabled,Enabled"
|
|
line.long 0x04 "DELAY_REG0,Delay Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " D_NSS ,Delay in cycles for the length that the master mode chip select outputs are de-asserted between words"
|
|
hexmask.long.byte 0x04 16.--23. 1. " D_BTWN ,Delay in cycles between one chip select being de-activated and the activation of another"
|
|
hexmask.long.byte 0x04 8.--15. 1. " D_AFTER ,Delay in cycles between last bit of current word and the first bit of the next word"
|
|
hexmask.long.byte 0x04 0.--7. 1. " D_INT ,Delay in cycles between setting n_ss_out low and first bit transfer"
|
|
wgroup.long 0x1c++0x03
|
|
line.long 0x00 "TX_DATA_REG0,Transmit Data Register"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "RX_DATA_REG0,Receive Data Register"
|
|
group.long 0x24++0x0b
|
|
line.long 0x00 "SLAVE_IDLE_COUNT_REG0,Slave Idle Count Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SLAVE_IDLE_COUN ,Slave Idle Count"
|
|
line.long 0x04 "TX_THRES_REG0,TX FIFO Threshold Register"
|
|
line.long 0x08 "RX_THRES_REG0,RX FIFO Threshold Register"
|
|
rgroup.long 0xfc++0x03
|
|
line.long 0x00 "MOD_ID_REG0,Module ID Register"
|
|
hexmask.long.tbyte 0x00 0.--24. 1. " MODULE_ID ,Module ID Number"
|
|
width 11.
|
|
tree.end
|
|
tree.end
|
|
tree "System Watchdog Timer Registers"
|
|
base ad:0xF8005000
|
|
width 9.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "MODE,WD Zero Mode Register"
|
|
hexmask.long.word 0x00 12.--23. 1. " ZKEY ,Zero access key"
|
|
bitfld.long 0x00 9.--11. " EXTLN ,External signal length" "2,4,8,16,32,64,128,256"
|
|
bitfld.long 0x00 7.--8. " IRQLN ,Interrupt request length" "4,8,16,32"
|
|
bitfld.long 0x00 4.--6. " RSTLN ,Reset length" "2,4,8,16,32,64,128,256"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EXTEN ,External signal enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " IRQEN ,Interrupt request enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RSTEN ,Reset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " WDEN ,Watchdog enable" "Disabled,Enabled"
|
|
line.long 0x04 "CONTROL,Counter Control Register"
|
|
hexmask.long.word 0x04 6.--17. 1. " CKEY ,Counter access key"
|
|
bitfld.long 0x04 2.--5. " CRV ,Counter restart value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--1. " CLKSEL ,Counter clock prescale" "pclk/8,pclk/64,pclk/256,pclk/4096"
|
|
wgroup.word 0x08++0x01
|
|
line.word 0x00 "RESTART,Restart Key Register"
|
|
rgroup.byte 0x0c++0x00
|
|
line.byte 0x00 "STATUS,Status Register"
|
|
bitfld.byte 0x00 0. " WDZ ,Watchdog Count Status" "No zero,Zero"
|
|
width 11.
|
|
tree.end
|
|
tree.open "Triple Timer Counter"
|
|
tree "TTC0"
|
|
base ad:0xF8001000
|
|
width 23.
|
|
group.byte 0x0++0x00
|
|
line.byte 0x00 "CLOCK_CONTROL_1,Clock 1 Control Register"
|
|
bitfld.byte 0x00 6. " EX_E ,External Clock Edge" "Positive,Negative"
|
|
bitfld.byte 0x00 5. " C_SRC ,Clock Source" "pclk,ext_clk"
|
|
bitfld.byte 0x00 1.--4. " PS_V ,Prescale value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0. " PS_EN ,Prescale enable" "Disabled,Enabled"
|
|
group.byte 0x4++0x00
|
|
line.byte 0x00 "CLOCK_CONTROL_2,Clock 2 Control Register"
|
|
bitfld.byte 0x00 6. " EX_E ,External Clock Edge" "Positive,Negative"
|
|
bitfld.byte 0x00 5. " C_SRC ,Clock Source" "pclk,ext_clk"
|
|
bitfld.byte 0x00 1.--4. " PS_V ,Prescale value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0. " PS_EN ,Prescale enable" "Disabled,Enabled"
|
|
group.byte 0x8++0x00
|
|
line.byte 0x00 "CLOCK_CONTROL_3,Clock 3 Control Register"
|
|
bitfld.byte 0x00 6. " EX_E ,External Clock Edge" "Positive,Negative"
|
|
bitfld.byte 0x00 5. " C_SRC ,Clock Source" "pclk,ext_clk"
|
|
bitfld.byte 0x00 1.--4. " PS_V ,Prescale value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0. " PS_EN ,Prescale enable" "Disabled,Enabled"
|
|
group.byte 0xC++0x00
|
|
line.byte 0x00 "COUNTER_CONTROL_1,Clock 1 Operational Mode And Reset Register"
|
|
bitfld.byte 0x00 6. " WAVE_POL ,Waveform polarity" "Positive,Negative"
|
|
bitfld.byte 0x00 5. " WAVE_EN ,Output waveform enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " RST ,Counter reset" "No reset,Reset"
|
|
bitfld.byte 0x00 3. " MATCH ,Register Match mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " DEC ,Decrement" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " INT ,Interval Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " DIS ,Disable counter" "No,Yes"
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "COUNTER_CONTROL_2,Clock 2 Operational Mode And Reset Register"
|
|
bitfld.byte 0x00 6. " WAVE_POL ,Waveform polarity" "Positive,Negative"
|
|
bitfld.byte 0x00 5. " WAVE_EN ,Output waveform enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " RST ,Counter reset" "No reset,Reset"
|
|
bitfld.byte 0x00 3. " MATCH ,Register Match mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " DEC ,Decrement" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " INT ,Interval Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " DIS ,Disable counter" "No,Yes"
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "COUNTER_CONTROL_3,Clock 3 Operational Mode And Reset Register"
|
|
bitfld.byte 0x00 6. " WAVE_POL ,Waveform polarity" "Positive,Negative"
|
|
bitfld.byte 0x00 5. " WAVE_EN ,Output waveform enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " RST ,Counter reset" "No reset,Reset"
|
|
bitfld.byte 0x00 3. " MATCH ,Register Match mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " DEC ,Decrement" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " INT ,Interval Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " DIS ,Disable counter" "No,Yes"
|
|
sif (cpuis("ZYNQ-ULTRASCALE+*"))
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "COUNTER_VALUE_1,Current 1 Counter Value Register"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "COUNTER_VALUE_2,Current 2 Counter Value Register"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "COUNTER_VALUE_3,Current 3 Counter Value Register"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "INTERVAL_COUNTER_1,Current 1 Interval Value Register"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "INTERVAL_COUNTER_2,Current 2 Interval Value Register"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "INTERVAL_COUNTER_3,Current 3 Interval Value Register"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "MATCH_1_COUNTER_1,Current 1 Match Value Register"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "MATCH_1_COUNTER_2,Current 2 Match Value Register"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "MATCH_1_COUNTER_3,Current 3 Match Value Register"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "MATCH_2_COUNTER_1,Current 1 Match Value Register"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MATCH_2_COUNTER_2,Current 2 Match Value Register"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "MATCH_2_COUNTER_3,Current 3 Match Value Register"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "MATCH_3_COUNTER_1,Current 1 Match Value Register"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "MATCH_3_COUNTER_2,Current 2 Match Value Register"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "MATCH_3_COUNTER_3,Current 3 Match Value Register"
|
|
hgroup.byte 0x54++0x00
|
|
hide.byte 0x00 "INTERRUPT_REGISTER_1,Counter 1 Interrupt Register"
|
|
in
|
|
hgroup.byte 0x58++0x00
|
|
hide.byte 0x00 "INTERRUPT_REGISTER_2,Counter 2 Interrupt Register"
|
|
in
|
|
hgroup.byte 0x5C++0x00
|
|
hide.byte 0x00 "INTERRUPT_REGISTER_3,Counter 3 Interrupt Register"
|
|
in
|
|
else
|
|
rgroup.word 0x18++0x01
|
|
line.word 0x00 "COUNTER_VALUE_1,Current 1 Counter Value Register"
|
|
rgroup.word 0x1C++0x01
|
|
line.word 0x00 "COUNTER_VALUE_2,Current 2 Counter Value Register"
|
|
rgroup.word 0x20++0x01
|
|
line.word 0x00 "COUNTER_VALUE_3,Current 3 Counter Value Register"
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "INTERVAL_COUNTER_1,Current 1 Interval Value Register"
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "INTERVAL_COUNTER_2,Current 2 Interval Value Register"
|
|
group.word 0x2C++0x01
|
|
line.word 0x00 "INTERVAL_COUNTER_3,Current 3 Interval Value Register"
|
|
group.word 0x30++0x01
|
|
line.word 0x00 "MATCH_1_COUNTER_1,Current 1 Match Value Register"
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "MATCH_1_COUNTER_2,Current 2 Match Value Register"
|
|
group.word 0x38++0x01
|
|
line.word 0x00 "MATCH_1_COUNTER_3,Current 3 Match Value Register"
|
|
group.word 0x3C++0x01
|
|
line.word 0x00 "MATCH_2_COUNTER_1,Current 1 Match Value Register"
|
|
group.word 0x40++0x01
|
|
line.word 0x00 "MATCH_2_COUNTER_2,Current 2 Match Value Register"
|
|
group.word 0x44++0x01
|
|
line.word 0x00 "MATCH_2_COUNTER_3,Current 3 Match Value Register"
|
|
group.word 0x48++0x01
|
|
line.word 0x00 "MATCH_3_COUNTER_1,Current 1 Match Value Register"
|
|
group.word 0x4C++0x01
|
|
line.word 0x00 "MATCH_3_COUNTER_2,Current 2 Match Value Register"
|
|
group.word 0x50++0x01
|
|
line.word 0x00 "MATCH_3_COUNTER_3,Current 3 Match Value Register"
|
|
rgroup.byte 0x54++0x00
|
|
line.byte 0x00 "INTERRUPT_REGISTER_1,Counter 1 Interrupt Register"
|
|
bitfld.byte 0x00 5. " EV ,Event timer overflow interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 4. " OV ,Counter overflow" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 3. " M3 ,Match 3 interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " M2 ,Match 2 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " M1 ,Match 1 interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " IV ,Interval interrupt" "No interrupt,Interrupt"
|
|
rgroup.byte 0x58++0x00
|
|
line.byte 0x00 "INTERRUPT_REGISTER_2,Counter 2 Interrupt Register"
|
|
bitfld.byte 0x00 5. " EV ,Event timer overflow interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 4. " OV ,Counter overflow" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 3. " M3 ,Match 3 interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " M2 ,Match 2 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " M1 ,Match 1 interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " IV ,Interval interrupt" "No interrupt,Interrupt"
|
|
rgroup.byte 0x5C++0x00
|
|
line.byte 0x00 "INTERRUPT_REGISTER_3,Counter 3 Interrupt Register"
|
|
bitfld.byte 0x00 5. " EV ,Event timer overflow interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 4. " OV ,Counter overflow" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 3. " M3 ,Match 3 interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " M2 ,Match 2 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " M1 ,Match 1 interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " IV ,Interval interrupt" "No interrupt,Interrupt"
|
|
endif
|
|
group.byte 0x60++0x00
|
|
line.byte 0x00 "INTERRUPT_ENABLE_1,Counter 1 Interrupt Enable Register"
|
|
bitfld.byte 0x00 5. " IEN[5] ,Event timer overflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " IEN[4] ,Counter overflow enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " IEN[3] ,Match 3 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " IEN[2] ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " IEN[1] ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " IEN[0] ,Interval interrupt enable" "Disabled,Enabled"
|
|
group.byte 0x64++0x00
|
|
line.byte 0x00 "INTERRUPT_ENABLE_2,Counter 2 Interrupt Enable Register"
|
|
bitfld.byte 0x00 5. " IEN[5] ,Event timer overflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " IEN[4] ,Counter overflow enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " IEN[3] ,Match 3 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " IEN[2] ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " IEN[1] ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " IEN[0] ,Interval interrupt enable" "Disabled,Enabled"
|
|
group.byte 0x68++0x00
|
|
line.byte 0x00 "INTERRUPT_ENABLE_3,Counter 3 Interrupt Enable Register"
|
|
bitfld.byte 0x00 5. " IEN[5] ,Event timer overflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " IEN[4] ,Counter overflow enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " IEN[3] ,Match 3 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " IEN[2] ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " IEN[1] ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " IEN[0] ,Interval interrupt enable" "Disabled,Enabled"
|
|
sif (cpuis("ZYNQ-ULTRASCALE+*"))
|
|
group.byte 0x6C++0x00
|
|
line.byte 0x00 "EVENT_CONTROL_TIMER_1,Timer 1 Event Control Register"
|
|
bitfld.byte 0x00 3. " E_TM ,Test Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " E_OV ,Timer overflow counter" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low"
|
|
bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled"
|
|
group.byte 0x70++0x00
|
|
line.byte 0x00 "EVENT_CONTROL_TIMER_2,Timer 2 Event Control Register"
|
|
bitfld.byte 0x00 3. " E_TM ,Test Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " E_OV ,Timer overflow counter" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low"
|
|
bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled"
|
|
group.byte 0x74++0x00
|
|
line.byte 0x00 "EVENT_CONTROL_TIMER_3,Timer 3 Event Control Register"
|
|
bitfld.byte 0x00 3. " E_TM ,Test Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " E_OV ,Timer overflow counter" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low"
|
|
bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled"
|
|
rgroup.long 0x78++0x03
|
|
line.long 0x00 "EVENT_REGISTER_1,Timer 1 Event Register"
|
|
rgroup.long 0x7C++0x03
|
|
line.long 0x00 "EVENT_REGISTER_2,Timer 2 Event Register"
|
|
rgroup.long 0x80++0x03
|
|
line.long 0x00 "EVENT_REGISTER_3,Timer 3 Event Register"
|
|
else
|
|
group.byte 0x6C++0x00
|
|
line.byte 0x00 "EVENT_CONTROL_TIMER_1,Timer 1 Event Control Register"
|
|
bitfld.byte 0x00 3. " E_OV ,Timer overflow counter" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low"
|
|
bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled"
|
|
group.byte 0x70++0x00
|
|
line.byte 0x00 "EVENT_CONTROL_TIMER_2,Timer 2 Event Control Register"
|
|
bitfld.byte 0x00 3. " E_OV ,Timer overflow counter" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low"
|
|
bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled"
|
|
group.byte 0x74++0x00
|
|
line.byte 0x00 "EVENT_CONTROL_TIMER_3,Timer 3 Event Control Register"
|
|
bitfld.byte 0x00 3. " E_OV ,Timer overflow counter" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low"
|
|
bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled"
|
|
rgroup.word 0x78++0x01
|
|
line.word 0x00 "EVENT_REGISTER_1,Timer 1 Event Register"
|
|
rgroup.word 0x7C++0x01
|
|
line.word 0x00 "EVENT_REGISTER_2,Timer 2 Event Register"
|
|
rgroup.word 0x80++0x01
|
|
line.word 0x00 "EVENT_REGISTER_3,Timer 3 Event Register"
|
|
endif
|
|
width 11.
|
|
tree.end
|
|
tree "TTC1"
|
|
base ad:0xF8002000
|
|
width 23.
|
|
group.byte 0x0++0x00
|
|
line.byte 0x00 "CLOCK_CONTROL_1,Clock 1 Control Register"
|
|
bitfld.byte 0x00 6. " EX_E ,External Clock Edge" "Positive,Negative"
|
|
bitfld.byte 0x00 5. " C_SRC ,Clock Source" "pclk,ext_clk"
|
|
bitfld.byte 0x00 1.--4. " PS_V ,Prescale value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0. " PS_EN ,Prescale enable" "Disabled,Enabled"
|
|
group.byte 0x4++0x00
|
|
line.byte 0x00 "CLOCK_CONTROL_2,Clock 2 Control Register"
|
|
bitfld.byte 0x00 6. " EX_E ,External Clock Edge" "Positive,Negative"
|
|
bitfld.byte 0x00 5. " C_SRC ,Clock Source" "pclk,ext_clk"
|
|
bitfld.byte 0x00 1.--4. " PS_V ,Prescale value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0. " PS_EN ,Prescale enable" "Disabled,Enabled"
|
|
group.byte 0x8++0x00
|
|
line.byte 0x00 "CLOCK_CONTROL_3,Clock 3 Control Register"
|
|
bitfld.byte 0x00 6. " EX_E ,External Clock Edge" "Positive,Negative"
|
|
bitfld.byte 0x00 5. " C_SRC ,Clock Source" "pclk,ext_clk"
|
|
bitfld.byte 0x00 1.--4. " PS_V ,Prescale value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0. " PS_EN ,Prescale enable" "Disabled,Enabled"
|
|
group.byte 0xC++0x00
|
|
line.byte 0x00 "COUNTER_CONTROL_1,Clock 1 Operational Mode And Reset Register"
|
|
bitfld.byte 0x00 6. " WAVE_POL ,Waveform polarity" "Positive,Negative"
|
|
bitfld.byte 0x00 5. " WAVE_EN ,Output waveform enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " RST ,Counter reset" "No reset,Reset"
|
|
bitfld.byte 0x00 3. " MATCH ,Register Match mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " DEC ,Decrement" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " INT ,Interval Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " DIS ,Disable counter" "No,Yes"
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "COUNTER_CONTROL_2,Clock 2 Operational Mode And Reset Register"
|
|
bitfld.byte 0x00 6. " WAVE_POL ,Waveform polarity" "Positive,Negative"
|
|
bitfld.byte 0x00 5. " WAVE_EN ,Output waveform enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " RST ,Counter reset" "No reset,Reset"
|
|
bitfld.byte 0x00 3. " MATCH ,Register Match mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " DEC ,Decrement" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " INT ,Interval Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " DIS ,Disable counter" "No,Yes"
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "COUNTER_CONTROL_3,Clock 3 Operational Mode And Reset Register"
|
|
bitfld.byte 0x00 6. " WAVE_POL ,Waveform polarity" "Positive,Negative"
|
|
bitfld.byte 0x00 5. " WAVE_EN ,Output waveform enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " RST ,Counter reset" "No reset,Reset"
|
|
bitfld.byte 0x00 3. " MATCH ,Register Match mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " DEC ,Decrement" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " INT ,Interval Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " DIS ,Disable counter" "No,Yes"
|
|
sif (cpuis("ZYNQ-ULTRASCALE+*"))
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "COUNTER_VALUE_1,Current 1 Counter Value Register"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "COUNTER_VALUE_2,Current 2 Counter Value Register"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "COUNTER_VALUE_3,Current 3 Counter Value Register"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "INTERVAL_COUNTER_1,Current 1 Interval Value Register"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "INTERVAL_COUNTER_2,Current 2 Interval Value Register"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "INTERVAL_COUNTER_3,Current 3 Interval Value Register"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "MATCH_1_COUNTER_1,Current 1 Match Value Register"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "MATCH_1_COUNTER_2,Current 2 Match Value Register"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "MATCH_1_COUNTER_3,Current 3 Match Value Register"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "MATCH_2_COUNTER_1,Current 1 Match Value Register"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MATCH_2_COUNTER_2,Current 2 Match Value Register"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "MATCH_2_COUNTER_3,Current 3 Match Value Register"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "MATCH_3_COUNTER_1,Current 1 Match Value Register"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "MATCH_3_COUNTER_2,Current 2 Match Value Register"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "MATCH_3_COUNTER_3,Current 3 Match Value Register"
|
|
hgroup.byte 0x54++0x00
|
|
hide.byte 0x00 "INTERRUPT_REGISTER_1,Counter 1 Interrupt Register"
|
|
in
|
|
hgroup.byte 0x58++0x00
|
|
hide.byte 0x00 "INTERRUPT_REGISTER_2,Counter 2 Interrupt Register"
|
|
in
|
|
hgroup.byte 0x5C++0x00
|
|
hide.byte 0x00 "INTERRUPT_REGISTER_3,Counter 3 Interrupt Register"
|
|
in
|
|
else
|
|
rgroup.word 0x18++0x01
|
|
line.word 0x00 "COUNTER_VALUE_1,Current 1 Counter Value Register"
|
|
rgroup.word 0x1C++0x01
|
|
line.word 0x00 "COUNTER_VALUE_2,Current 2 Counter Value Register"
|
|
rgroup.word 0x20++0x01
|
|
line.word 0x00 "COUNTER_VALUE_3,Current 3 Counter Value Register"
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "INTERVAL_COUNTER_1,Current 1 Interval Value Register"
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "INTERVAL_COUNTER_2,Current 2 Interval Value Register"
|
|
group.word 0x2C++0x01
|
|
line.word 0x00 "INTERVAL_COUNTER_3,Current 3 Interval Value Register"
|
|
group.word 0x30++0x01
|
|
line.word 0x00 "MATCH_1_COUNTER_1,Current 1 Match Value Register"
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "MATCH_1_COUNTER_2,Current 2 Match Value Register"
|
|
group.word 0x38++0x01
|
|
line.word 0x00 "MATCH_1_COUNTER_3,Current 3 Match Value Register"
|
|
group.word 0x3C++0x01
|
|
line.word 0x00 "MATCH_2_COUNTER_1,Current 1 Match Value Register"
|
|
group.word 0x40++0x01
|
|
line.word 0x00 "MATCH_2_COUNTER_2,Current 2 Match Value Register"
|
|
group.word 0x44++0x01
|
|
line.word 0x00 "MATCH_2_COUNTER_3,Current 3 Match Value Register"
|
|
group.word 0x48++0x01
|
|
line.word 0x00 "MATCH_3_COUNTER_1,Current 1 Match Value Register"
|
|
group.word 0x4C++0x01
|
|
line.word 0x00 "MATCH_3_COUNTER_2,Current 2 Match Value Register"
|
|
group.word 0x50++0x01
|
|
line.word 0x00 "MATCH_3_COUNTER_3,Current 3 Match Value Register"
|
|
rgroup.byte 0x54++0x00
|
|
line.byte 0x00 "INTERRUPT_REGISTER_1,Counter 1 Interrupt Register"
|
|
bitfld.byte 0x00 5. " EV ,Event timer overflow interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 4. " OV ,Counter overflow" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 3. " M3 ,Match 3 interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " M2 ,Match 2 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " M1 ,Match 1 interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " IV ,Interval interrupt" "No interrupt,Interrupt"
|
|
rgroup.byte 0x58++0x00
|
|
line.byte 0x00 "INTERRUPT_REGISTER_2,Counter 2 Interrupt Register"
|
|
bitfld.byte 0x00 5. " EV ,Event timer overflow interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 4. " OV ,Counter overflow" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 3. " M3 ,Match 3 interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " M2 ,Match 2 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " M1 ,Match 1 interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " IV ,Interval interrupt" "No interrupt,Interrupt"
|
|
rgroup.byte 0x5C++0x00
|
|
line.byte 0x00 "INTERRUPT_REGISTER_3,Counter 3 Interrupt Register"
|
|
bitfld.byte 0x00 5. " EV ,Event timer overflow interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 4. " OV ,Counter overflow" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 3. " M3 ,Match 3 interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " M2 ,Match 2 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " M1 ,Match 1 interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " IV ,Interval interrupt" "No interrupt,Interrupt"
|
|
endif
|
|
group.byte 0x60++0x00
|
|
line.byte 0x00 "INTERRUPT_ENABLE_1,Counter 1 Interrupt Enable Register"
|
|
bitfld.byte 0x00 5. " IEN[5] ,Event timer overflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " IEN[4] ,Counter overflow enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " IEN[3] ,Match 3 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " IEN[2] ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " IEN[1] ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " IEN[0] ,Interval interrupt enable" "Disabled,Enabled"
|
|
group.byte 0x64++0x00
|
|
line.byte 0x00 "INTERRUPT_ENABLE_2,Counter 2 Interrupt Enable Register"
|
|
bitfld.byte 0x00 5. " IEN[5] ,Event timer overflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " IEN[4] ,Counter overflow enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " IEN[3] ,Match 3 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " IEN[2] ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " IEN[1] ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " IEN[0] ,Interval interrupt enable" "Disabled,Enabled"
|
|
group.byte 0x68++0x00
|
|
line.byte 0x00 "INTERRUPT_ENABLE_3,Counter 3 Interrupt Enable Register"
|
|
bitfld.byte 0x00 5. " IEN[5] ,Event timer overflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " IEN[4] ,Counter overflow enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " IEN[3] ,Match 3 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " IEN[2] ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " IEN[1] ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " IEN[0] ,Interval interrupt enable" "Disabled,Enabled"
|
|
sif (cpuis("ZYNQ-ULTRASCALE+*"))
|
|
group.byte 0x6C++0x00
|
|
line.byte 0x00 "EVENT_CONTROL_TIMER_1,Timer 1 Event Control Register"
|
|
bitfld.byte 0x00 3. " E_TM ,Test Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " E_OV ,Timer overflow counter" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low"
|
|
bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled"
|
|
group.byte 0x70++0x00
|
|
line.byte 0x00 "EVENT_CONTROL_TIMER_2,Timer 2 Event Control Register"
|
|
bitfld.byte 0x00 3. " E_TM ,Test Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " E_OV ,Timer overflow counter" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low"
|
|
bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled"
|
|
group.byte 0x74++0x00
|
|
line.byte 0x00 "EVENT_CONTROL_TIMER_3,Timer 3 Event Control Register"
|
|
bitfld.byte 0x00 3. " E_TM ,Test Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " E_OV ,Timer overflow counter" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low"
|
|
bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled"
|
|
rgroup.long 0x78++0x03
|
|
line.long 0x00 "EVENT_REGISTER_1,Timer 1 Event Register"
|
|
rgroup.long 0x7C++0x03
|
|
line.long 0x00 "EVENT_REGISTER_2,Timer 2 Event Register"
|
|
rgroup.long 0x80++0x03
|
|
line.long 0x00 "EVENT_REGISTER_3,Timer 3 Event Register"
|
|
else
|
|
group.byte 0x6C++0x00
|
|
line.byte 0x00 "EVENT_CONTROL_TIMER_1,Timer 1 Event Control Register"
|
|
bitfld.byte 0x00 3. " E_OV ,Timer overflow counter" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low"
|
|
bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled"
|
|
group.byte 0x70++0x00
|
|
line.byte 0x00 "EVENT_CONTROL_TIMER_2,Timer 2 Event Control Register"
|
|
bitfld.byte 0x00 3. " E_OV ,Timer overflow counter" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low"
|
|
bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled"
|
|
group.byte 0x74++0x00
|
|
line.byte 0x00 "EVENT_CONTROL_TIMER_3,Timer 3 Event Control Register"
|
|
bitfld.byte 0x00 3. " E_OV ,Timer overflow counter" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " E_LO ,Timer count level" "High,Low"
|
|
bitfld.byte 0x00 0. " E_EN ,Enable timer" "Disabled,Enabled"
|
|
rgroup.word 0x78++0x01
|
|
line.word 0x00 "EVENT_REGISTER_1,Timer 1 Event Register"
|
|
rgroup.word 0x7C++0x01
|
|
line.word 0x00 "EVENT_REGISTER_2,Timer 2 Event Register"
|
|
rgroup.word 0x80++0x01
|
|
line.word 0x00 "EVENT_REGISTER_3,Timer 3 Event Register"
|
|
endif
|
|
width 11.
|
|
tree.end
|
|
tree.end
|
|
tree.open "Universal Asynchronous Receiver Transmitter"
|
|
tree "UART0"
|
|
base ad:0xE0000000
|
|
width 28.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "CONTROL_REG0,UART Control Register"
|
|
bitfld.long 0x00 8. " STPBRK ,Stop transmitter break" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " STTBRK ,Start transmitter break" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RSTTO ,Restart receiver timeout counter" "No restart,Restart"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TXDIS ,Transmit disable" "No,Yes"
|
|
bitfld.long 0x00 4. " TXEN ,Transmit enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " RXDIS ,Receive disable" "Yes,No"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RXEN ,Receive enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TXRES ,Software reset for TX data path" "No reset,Reset"
|
|
bitfld.long 0x00 0. " RXRES ,Software reset for RX data path" "No reset,Reset"
|
|
line.long 0x04 "MODE_REG0,UART Mode Register"
|
|
bitfld.long 0x04 11. " IRMODE ,Enable IrDA mode" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " UCLKEN ,External uart_clk source select" "APB clock/pclk,User defined"
|
|
bitfld.long 0x04 8.--9. " CHMODE ,Channel mode" "Normal,Automatic cho,Local loopback,Remote loopback"
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " NBSTOP ,Number of stop bits" "1 stop bit,1.5 stop bits,2 stop bits,?..."
|
|
bitfld.long 0x04 3.--5. " PAR ,Parity type select" "Even,Odd,Space,Mark,No parity,No parity,No parity,No parity"
|
|
bitfld.long 0x04 1.--2. " CHRL ,Character length select" "8 bits,8 bits,7 bits,6 bits"
|
|
textline " "
|
|
bitfld.long 0x04 0. " CLKS ,Clock source select" "uart_clk,uart_clk/8"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INTRPT_MASK_REG0_SET/CLR,Interrupt Mask Register"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " TOVR_set/clr ,Transmitter FIFO Overflow interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TNFUL_set/clr ,Transmitter FIFO Nearly Full interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TTRIG_set/clr ,Transmitter FIFO Trigger interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " DMSI_set/clr ,Delta Modem Status Indicator interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " TIMEOUT_set/clr ,Receiver Timeout Error interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " PARE_set/clr ,Receiver Parity Error interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " FRAME_set/clr ,Receiver Framing Error interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " ROVR_set/clr ,Receiver Overflow Error interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " TFUL_set/clr ,Transmitter FIFO Full interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " TEMPTY_set/clr ,Transmitter FIFO Empty interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " RFUL_set/clr ,Receiver FIFO Full interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " REMPTY_set/clr ,Receiver FIFO Empty interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " RTRIG_set/clr ,Receiver FIFO Trigger interrupt" "Disabled,Enabled"
|
|
group.long 0x14++0x13
|
|
line.long 0x00 "CHNL_INT_STS_REG0,Channel Interrupt Status Register"
|
|
eventfld.long 0x00 12. " TOVR ,Transmitter FIFO Overflow interrupt mask status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 11. " TNFUL ,Transmitter FIFO Nearly Full interrupt mask status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 10. " TTRIG ,Transmitter FIFO Trigger interrupt mask status" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 9. " DMSI ,Delta Modem Status Indicator interrupt mask status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 8. " TIMEOUT ,Receiver Timeout Error interrupt mask status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 7. " PARE ,Receiver Parity Error interrupt mask status" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 6. " FRAME ,Receiver Framing Error interrupt mask status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 5. " ROVR ,Receiver Overflow Error interrupt mask status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 4. " TFUL ,Transmitter FIFO Full interrupt mask status" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " TEMPTY ,Transmitter FIFO Empty interrupt mask status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 2. " RFUL ,Receiver FIFO Full interrupt mask status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " REMPTY ,Receiver FIFO Empty interrupt mask status" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " RTRIG ,Receiver FIFO Trigger interrupt mask status" "No interrupt,Interrupt"
|
|
line.long 0x04 "BAUD_RATE_GEN_REG0,Baud Rate Divider Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " CD ,Baud Rate Clock Divisor Value"
|
|
line.long 0x08 "RCVR_TIMEOUT_REG0,Receiver Timeout Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " RTO ,Receiver timeout value"
|
|
line.long 0x0c "RCVR_FIFO_TRIGGER_LEVEL0,Receiver FIFO Trigger Level Register"
|
|
bitfld.long 0x0c 0.--5. " RTRIG ,Receiver FIFO trigger level value" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x10 "MODEM_CTRL_REG0,Modem Control Register"
|
|
bitfld.long 0x10 5. " FCM ,Automatic flow control mode" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " RTS ,Request to send output control" "Force 1,Force 0"
|
|
bitfld.long 0x10 0. " DTR ,Data Terminal Ready" "Force 1,Force 0"
|
|
rgroup.long 0x28++0x07
|
|
line.long 0x00 "MODEM_STS_REG0,Modem Status Register"
|
|
bitfld.long 0x00 8. " FCMS ,Flow Control Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DCD ,Data Carrier Detect Input Status" "High,Low"
|
|
bitfld.long 0x00 6. " RI ,Ring Indicator input status" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DSR ,Data Set Ready input status" "High,Low"
|
|
bitfld.long 0x00 4. " CTS ,Clear to Send input status" "High,Low"
|
|
bitfld.long 0x00 3. " DDCD ,Delta Data Carrier Detect Status" "No change,Change"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TERI ,Trailing Edge Ring Indicator Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " DDSR ,Delta Data Set Ready status" "No change,Change"
|
|
bitfld.long 0x00 0. " DCTS ,Delta Clear To Send Status" "No change,Change"
|
|
line.long 0x04 "CHANNEL_STS_REG0,Channel Status Register"
|
|
bitfld.long 0x04 14. " TNFUL ,Transmitter FIFO Nearly Full continuous status" ">1 byte unused,1 byte unused"
|
|
bitfld.long 0x04 13. " TTRIG ,Transmitter FIFO Trigger continuous status" "<TTRIG,>=TTRIG"
|
|
bitfld.long 0x04 12. " FDELT ,Receiver flow delay trigger continuous status" "<FDEL,>=FDEL"
|
|
textline " "
|
|
bitfld.long 0x04 11. " TACTIVE ,Transmitter state machine active status" "Inactive,Active"
|
|
bitfld.long 0x04 10. " RACTIVE ,Receiver state machine active status" "Inactive,Active"
|
|
bitfld.long 0x04 9. " DMSI ,Delta Modem Status Indicator status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 8. " TIMEOUT ,Receiver Timeout status" "Not occurred,Occurred"
|
|
bitfld.long 0x04 7. " PARE ,Receiver Parity Error status" "Not occurred,Occurred"
|
|
bitfld.long 0x04 6. " FRAME ,Receiver Frame Error status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 5. " ROVR ,Receiver Overflow Error status" "Not occurred,Occurred"
|
|
bitfld.long 0x04 4. " TFUL ,Transmitter FIFO Full continuous status" "Not full,Full"
|
|
bitfld.long 0x04 3. " TEMPTY ,Transmitter FIFO Empty continuous status" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x04 2. " RFUL ,Receiver FIFO Full continuous status" "Not full,Full"
|
|
bitfld.long 0x04 1. " REMPTY ,Receiver FIFO Full continuous status" "Not empty,Empty"
|
|
bitfld.long 0x04 0. " RTRIG ,Receiver FIFO Trigger continuous status" "<RTRIG,>=RTRIG"
|
|
group.long 0x30++0x17
|
|
line.long 0x00 "TX_RX_FIFO0,Transmit and Receive FIFO Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " FIFO ,TX/RX FIFO"
|
|
line.long 0x04 "BAUD_RATE_DIVIDER_REG0,Baud Rate Divider Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " BDIV ,Baud rate divider value"
|
|
line.long 0x08 "FLOW_DELAY_REG0,Flow Control Delay Register"
|
|
bitfld.long 0x08 0.--5. " FDEL ,RX FIFO trigger level for ua_nrts de-assertion" "Disabled,Disabled,Disabled,Disabled,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x0c "IR_MIN_RCV_PULSE_WDTH0,IR Minimum Received Pulse Width Register"
|
|
hexmask.long.word 0x0c 0.--15. 1. " PMN ,Number of uart_clk periods"
|
|
line.long 0x10 "IR_TRANSMITTED_PULSE_WDTH0,IR Transmitted Pulse Width Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PWID ,Pulse width"
|
|
line.long 0x14 "TX_FIFO_TRIGGER_LEVEL0,Transmitter FIFO Trigger Level Register"
|
|
bitfld.long 0x14 0.--5. " TTRIG ,Transmitter FIFO trigger level" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
width 11.
|
|
tree.end
|
|
tree "UART1"
|
|
base ad:0xE0001000
|
|
width 28.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "CONTROL_REG0,UART Control Register"
|
|
bitfld.long 0x00 8. " STPBRK ,Stop transmitter break" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " STTBRK ,Start transmitter break" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RSTTO ,Restart receiver timeout counter" "No restart,Restart"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TXDIS ,Transmit disable" "No,Yes"
|
|
bitfld.long 0x00 4. " TXEN ,Transmit enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " RXDIS ,Receive disable" "Yes,No"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RXEN ,Receive enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TXRES ,Software reset for TX data path" "No reset,Reset"
|
|
bitfld.long 0x00 0. " RXRES ,Software reset for RX data path" "No reset,Reset"
|
|
line.long 0x04 "MODE_REG0,UART Mode Register"
|
|
bitfld.long 0x04 11. " IRMODE ,Enable IrDA mode" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " UCLKEN ,External uart_clk source select" "APB clock/pclk,User defined"
|
|
bitfld.long 0x04 8.--9. " CHMODE ,Channel mode" "Normal,Automatic cho,Local loopback,Remote loopback"
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " NBSTOP ,Number of stop bits" "1 stop bit,1.5 stop bits,2 stop bits,?..."
|
|
bitfld.long 0x04 3.--5. " PAR ,Parity type select" "Even,Odd,Space,Mark,No parity,No parity,No parity,No parity"
|
|
bitfld.long 0x04 1.--2. " CHRL ,Character length select" "8 bits,8 bits,7 bits,6 bits"
|
|
textline " "
|
|
bitfld.long 0x04 0. " CLKS ,Clock source select" "uart_clk,uart_clk/8"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INTRPT_MASK_REG0_SET/CLR,Interrupt Mask Register"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " TOVR_set/clr ,Transmitter FIFO Overflow interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TNFUL_set/clr ,Transmitter FIFO Nearly Full interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TTRIG_set/clr ,Transmitter FIFO Trigger interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " DMSI_set/clr ,Delta Modem Status Indicator interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " TIMEOUT_set/clr ,Receiver Timeout Error interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " PARE_set/clr ,Receiver Parity Error interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " FRAME_set/clr ,Receiver Framing Error interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " ROVR_set/clr ,Receiver Overflow Error interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " TFUL_set/clr ,Transmitter FIFO Full interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " TEMPTY_set/clr ,Transmitter FIFO Empty interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " RFUL_set/clr ,Receiver FIFO Full interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " REMPTY_set/clr ,Receiver FIFO Empty interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " RTRIG_set/clr ,Receiver FIFO Trigger interrupt" "Disabled,Enabled"
|
|
group.long 0x14++0x13
|
|
line.long 0x00 "CHNL_INT_STS_REG0,Channel Interrupt Status Register"
|
|
eventfld.long 0x00 12. " TOVR ,Transmitter FIFO Overflow interrupt mask status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 11. " TNFUL ,Transmitter FIFO Nearly Full interrupt mask status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 10. " TTRIG ,Transmitter FIFO Trigger interrupt mask status" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 9. " DMSI ,Delta Modem Status Indicator interrupt mask status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 8. " TIMEOUT ,Receiver Timeout Error interrupt mask status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 7. " PARE ,Receiver Parity Error interrupt mask status" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 6. " FRAME ,Receiver Framing Error interrupt mask status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 5. " ROVR ,Receiver Overflow Error interrupt mask status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 4. " TFUL ,Transmitter FIFO Full interrupt mask status" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " TEMPTY ,Transmitter FIFO Empty interrupt mask status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 2. " RFUL ,Receiver FIFO Full interrupt mask status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " REMPTY ,Receiver FIFO Empty interrupt mask status" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " RTRIG ,Receiver FIFO Trigger interrupt mask status" "No interrupt,Interrupt"
|
|
line.long 0x04 "BAUD_RATE_GEN_REG0,Baud Rate Divider Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " CD ,Baud Rate Clock Divisor Value"
|
|
line.long 0x08 "RCVR_TIMEOUT_REG0,Receiver Timeout Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " RTO ,Receiver timeout value"
|
|
line.long 0x0c "RCVR_FIFO_TRIGGER_LEVEL0,Receiver FIFO Trigger Level Register"
|
|
bitfld.long 0x0c 0.--5. " RTRIG ,Receiver FIFO trigger level value" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x10 "MODEM_CTRL_REG0,Modem Control Register"
|
|
bitfld.long 0x10 5. " FCM ,Automatic flow control mode" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " RTS ,Request to send output control" "Force 1,Force 0"
|
|
bitfld.long 0x10 0. " DTR ,Data Terminal Ready" "Force 1,Force 0"
|
|
rgroup.long 0x28++0x07
|
|
line.long 0x00 "MODEM_STS_REG0,Modem Status Register"
|
|
bitfld.long 0x00 8. " FCMS ,Flow Control Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DCD ,Data Carrier Detect Input Status" "High,Low"
|
|
bitfld.long 0x00 6. " RI ,Ring Indicator input status" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DSR ,Data Set Ready input status" "High,Low"
|
|
bitfld.long 0x00 4. " CTS ,Clear to Send input status" "High,Low"
|
|
bitfld.long 0x00 3. " DDCD ,Delta Data Carrier Detect Status" "No change,Change"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TERI ,Trailing Edge Ring Indicator Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " DDSR ,Delta Data Set Ready status" "No change,Change"
|
|
bitfld.long 0x00 0. " DCTS ,Delta Clear To Send Status" "No change,Change"
|
|
line.long 0x04 "CHANNEL_STS_REG0,Channel Status Register"
|
|
bitfld.long 0x04 14. " TNFUL ,Transmitter FIFO Nearly Full continuous status" ">1 byte unused,1 byte unused"
|
|
bitfld.long 0x04 13. " TTRIG ,Transmitter FIFO Trigger continuous status" "<TTRIG,>=TTRIG"
|
|
bitfld.long 0x04 12. " FDELT ,Receiver flow delay trigger continuous status" "<FDEL,>=FDEL"
|
|
textline " "
|
|
bitfld.long 0x04 11. " TACTIVE ,Transmitter state machine active status" "Inactive,Active"
|
|
bitfld.long 0x04 10. " RACTIVE ,Receiver state machine active status" "Inactive,Active"
|
|
bitfld.long 0x04 9. " DMSI ,Delta Modem Status Indicator status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 8. " TIMEOUT ,Receiver Timeout status" "Not occurred,Occurred"
|
|
bitfld.long 0x04 7. " PARE ,Receiver Parity Error status" "Not occurred,Occurred"
|
|
bitfld.long 0x04 6. " FRAME ,Receiver Frame Error status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 5. " ROVR ,Receiver Overflow Error status" "Not occurred,Occurred"
|
|
bitfld.long 0x04 4. " TFUL ,Transmitter FIFO Full continuous status" "Not full,Full"
|
|
bitfld.long 0x04 3. " TEMPTY ,Transmitter FIFO Empty continuous status" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x04 2. " RFUL ,Receiver FIFO Full continuous status" "Not full,Full"
|
|
bitfld.long 0x04 1. " REMPTY ,Receiver FIFO Full continuous status" "Not empty,Empty"
|
|
bitfld.long 0x04 0. " RTRIG ,Receiver FIFO Trigger continuous status" "<RTRIG,>=RTRIG"
|
|
group.long 0x30++0x17
|
|
line.long 0x00 "TX_RX_FIFO0,Transmit and Receive FIFO Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " FIFO ,TX/RX FIFO"
|
|
line.long 0x04 "BAUD_RATE_DIVIDER_REG0,Baud Rate Divider Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " BDIV ,Baud rate divider value"
|
|
line.long 0x08 "FLOW_DELAY_REG0,Flow Control Delay Register"
|
|
bitfld.long 0x08 0.--5. " FDEL ,RX FIFO trigger level for ua_nrts de-assertion" "Disabled,Disabled,Disabled,Disabled,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x0c "IR_MIN_RCV_PULSE_WDTH0,IR Minimum Received Pulse Width Register"
|
|
hexmask.long.word 0x0c 0.--15. 1. " PMN ,Number of uart_clk periods"
|
|
line.long 0x10 "IR_TRANSMITTED_PULSE_WDTH0,IR Transmitted Pulse Width Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PWID ,Pulse width"
|
|
line.long 0x14 "TX_FIFO_TRIGGER_LEVEL0,Transmitter FIFO Trigger Level Register"
|
|
bitfld.long 0x14 0.--5. " TTRIG ,Transmitter FIFO trigger level" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
width 11.
|
|
tree.end
|
|
tree.end
|
|
tree.open "USB controller"
|
|
tree "USB0"
|
|
base ad:0xE0002000
|
|
width 22.
|
|
rgroup.long 0x00++0x17
|
|
line.long 0x00 "ID,ID Register"
|
|
bitfld.long 0x00 29.--31. " CIVERSION ,CI version" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 25.--28. " VERSION ,Version of the core" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 21.--24. " REVISION ,Revision number of the core" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--20. " TAG ,Tag of the core" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 8.--13. " NID ,NID Complement of ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " ID ,ID Configuration number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x04 "HWGENERAL,General Hardware Parameters Register"
|
|
bitfld.long 0x04 10.--11. " SM ,Serial engeine enable" "Disabled,?..."
|
|
bitfld.long 0x04 6.--9. " PHYM ,PHY interface type" "Reserved,Reserved,ULPI,?..."
|
|
bitfld.long 0x04 4.--5. " PHYW ,PHY bus width" "8 bit,?..."
|
|
textline " "
|
|
bitfld.long 0x04 1.--2. " CLKC ,Clocking used in the core" "Reserved,CLK,?..."
|
|
bitfld.long 0x04 0. " RT ,Reset Type" "Reserved,Asynchronous"
|
|
line.long 0x08 "HWHOST,Host Hardware Parameters Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TTPER ,VUSB_HS_TT_PERIODIC_CONTEXTS"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TTASY ,VUSB_HS_TT_ASYNC_CONTEXTS"
|
|
bitfld.long 0x08 1.--3. " NPORT ,Number of downstream ports by host port" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x08 0. " HC ,VUSB_HS_HOST" "Disabled,Enabled"
|
|
line.long 0x0c "HWDEVICE,Device Hardware Parameters Register"
|
|
bitfld.long 0x0c 1.--5. " DEVEP ,Number of endpoints" "0,1,2,3,4,5,6,7,8,9,10,11,12,?..."
|
|
bitfld.long 0x0c 0. " DC ,Device capable" "Not capable,Capable"
|
|
line.long 0x10 "HWTXBUF,TX Buffer Hardware Parameters Register"
|
|
hexmask.long.byte 0x10 16.--23. 1. " TXCHANADD ,Address bits for each Endpoint"
|
|
hexmask.long.byte 0x10 8.--15. 1. " TXADD ,Depth TX buffer"
|
|
hexmask.long.byte 0x10 0.--7. 1. " TXBURST ,Burst size for Memory"
|
|
line.long 0x14 "HWRXBUF,RX Buffer Hardware Parameters Register"
|
|
hexmask.long.byte 0x14 8.--15. 1. " RXADD ,Depth RX buffer"
|
|
hexmask.long.byte 0x14 0.--7. 1. " RXBURST ,Burst size of 16 for Memory To TX Buffer Transfers"
|
|
group.long 0x80++0x13
|
|
line.long 0x0 "GPTIMER0LD,General Purpose Timer 0 Load Value Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. " GPTLD ,General Purpose Timer 0 Load Value"
|
|
line.long (0x0+0x04) "GPTIMER0CTRL,General Purpose Timer 0 Control Register"
|
|
bitfld.long (0x0+0x04) 31. " GPTRUN ,General Purpose Timer Run" "Not run,Run"
|
|
bitfld.long (0x0+0x04) 30. " GPTRST ,General Purpose Timer Reset" "No reset,Reset"
|
|
bitfld.long (0x0+0x04) 24. " GPTMODE ,General Purpose Timer Mode" "One shot,Repeat"
|
|
textline " "
|
|
hexmask.long.tbyte (0x0+0x04) 0.--23. 1. " GPTCNT ,General Purpose Timer Counter"
|
|
line.long 0x8 "GPTIMER1LD,General Purpose Timer 1 Load Value Register"
|
|
hexmask.long.tbyte 0x8 0.--23. 1. " GPTLD ,General Purpose Timer 1 Load Value"
|
|
line.long (0x8+0x04) "GPTIMER1CTRL,General Purpose Timer 1 Control Register"
|
|
bitfld.long (0x8+0x04) 31. " GPTRUN ,General Purpose Timer Run" "Not run,Run"
|
|
bitfld.long (0x8+0x04) 30. " GPTRST ,General Purpose Timer Reset" "No reset,Reset"
|
|
bitfld.long (0x8+0x04) 24. " GPTMODE ,General Purpose Timer Mode" "One shot,Repeat"
|
|
textline " "
|
|
hexmask.long.tbyte (0x8+0x04) 0.--23. 1. " GPTCNT ,General Purpose Timer Counter"
|
|
line.long 0x10 "SBUSCFG,System Bus Interface Control Register"
|
|
bitfld.long 0x10 0.--2. " AHBBRST ,AHB Burst Mode" "Incremental,INCR4 to singles,INCR8 to INCR4 or singles,INCR16 to INCR8/ INCR4 or singles,Reserved,INCR4 to INCR of unspecifed length,INCR8 to INCR4 or INCR of unspecifed length,INCR16 to INCR8/INCR4 or INCR of unspecifed length"
|
|
rgroup.long 0x100++0x0b
|
|
line.long 0x00 "CAPLENGTH_HCIVERSION,Device/Host Capability Register"
|
|
hexmask.long.word 0x00 8.--23. 1. " HCIVERSION ,BCD encoding of the EHCI revision number supported by this host controller"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CAPLENGTH ,Capability Length"
|
|
line.long 0x04 "HCSPARAMS,Port teering Logic Capabilities Register"
|
|
bitfld.long 0x04 24.--27. " N_TT ,Number of embedded transaction translators associated with host controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 20.--23. " N_PTT ,Number of Ports per Transaction Translator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 16. " PI ,Port indicator" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " N_CC ,Number of companion controllers associated with this host controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 8.--11. " N_PCC ,Number of ports supported per internal Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 4. " PPC ,Port Power Control" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x04 0.--3. " N_PORTS ,Number of downstream ports supported by the host controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "HCCPARAMS,Multiple Mode Control Addressing Capability Register"
|
|
hexmask.long.byte 0x08 8.--15. 1. " EECP ,EECP"
|
|
bitfld.long 0x08 4.--7. " IST ,Isochronous Scheduling Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 2. " ASP ,Asynchronous Schedule Park Capability" "Not Capable,Capable"
|
|
textline " "
|
|
bitfld.long 0x08 1. " PFL ,Programmable Frame List Size" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " ADC ,64-bit Addressing Capability" "Not capable,Capable"
|
|
rgroup.long 0x120++0x07
|
|
line.long 0x00 "DCIVERSION,Device Controller Interface Version Number Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DCIVERSION ,BCD encoding of the interface version number"
|
|
line.long 0x04 "DCCPARAMS,Overall Host/Device Controller Capability Register"
|
|
bitfld.long 0x04 8. " HC ,Host Capable" "Not capable,Capable"
|
|
bitfld.long 0x04 7. " DC ,Device Capable" "Not capable,Capable"
|
|
bitfld.long 0x04 0.--4. " DEN ,Number of endpoints built into the device controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,?..."
|
|
if (((d.l((ad:0xE0002000+0x1A8)))&0x3)==0x3)
|
|
group.long 0x140++0x0f
|
|
line.long 0x00 "USBCMD,Serial Bus Host/Device Controller Command Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt Threshold Control"
|
|
bitfld.long 0x00 14. " ATDTW ,Semaphore" "Low,High"
|
|
bitfld.long 0x00 11. " ASPE ,Asynchronous Park Capability Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " ASP ,Asynchronous Park Capability" "0,1,2,3"
|
|
bitfld.long 0x00 7. " LR ,Light Host/Device Controller Reset" "No reset,Reset"
|
|
bitfld.long 0x00 6. " IAA ,Advance asynchronous schedule interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 5. " ASE ,Asynchronous Schedule Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PSE ,Periodic Schedule Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RST ,Controller reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RS ,Run/Stop" "Stop,Run"
|
|
line.long 0x04 "USBSTS,USB Status Register"
|
|
eventfld.long 0x04 25. " TI1 ,GPTIMER1CTRL transition to zero" "Low,High"
|
|
eventfld.long 0x04 24. " TI0 ,GPTIMER0CTRL transition to zero" "Low,High"
|
|
bitfld.long 0x04 19. " UPI ,USB transaction completion" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x04 18. " UAI ,USB Host Asynchronous Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 15. " AS ,Current real status of the Asynchronous Schedule" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " PS ,Periodic Schedule Status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " RCL ,Reclamation" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " HCH ,HCHaIted" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 7. " SRI ,SOF Received" "Not received,Received"
|
|
bitfld.long 0x04 5. " AAI ,Interrupt on Async Advance" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 4. " SEI ,System Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 3. " FRI ,Frame List Rollover" "No rollover,Rollover"
|
|
bitfld.long 0x04 2. " PCI ,Port Change Detect" "No change,Change"
|
|
bitfld.long 0x04 1. " UEI ,USB Error Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 0. " UI ,USB Interrupt" "No interrupt,Interrupt"
|
|
line.long 0x08 "USBINTR,USB Interrupt Enable Register"
|
|
bitfld.long 0x08 25. " TIE1 ,General Purpose Timer Interrupt Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " TIE0 ,General Purpose Timer Interrupt Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x08 19. " UPEI ,USB Host Periodic Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 18. " UAEI ,USB Host Asynchronous Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 16. " NAKEI ,NAK Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 10. " ULPIE ,ULPI Interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " SRE ,USB Reset Received Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " AAE ,Interrupt on Async Advance Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " SEE ,System Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " FRE ,Frame List Rollover Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " PCE ,Port Change Detect Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x08 1. " UEE ,USB Error Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 0. " UE ,USB Interrupt" "No interrupt,Interrupt"
|
|
line.long 0x0c "FRINDEX,Frame Index Register"
|
|
hexmask.long.word 0x0c 3.--13. 1. " FRINDEX[3:13] ,Frame List current index"
|
|
bitfld.long 0x0c 0.--2. " FRINDEX[0:2] ,Frame List Size" "12,11,10,9,8,7,6,5"
|
|
elif (((d.l((ad:0xE0002000+0x1A8)))&0x3)==0x2)
|
|
group.long 0x140++0x0b
|
|
line.long 0x00 "USBCMD,Serial Bus Host/Device Controller Command Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt Threshold Control"
|
|
bitfld.long 0x00 14. " ATDTW ,Semaphore" "Low,High"
|
|
bitfld.long 0x00 13. " SUTW ,Setup TripWir" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LR ,Light Host/Device Controller Reset" "No reset,Reset"
|
|
bitfld.long 0x00 1. " RST ,Controller reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " RS ,Run/Stop" "Stop,Run"
|
|
line.long 0x04 "USBSTS,USB Status Register"
|
|
eventfld.long 0x04 25. " TI1 ,GPTIMER1CTRL transition to zero" "Low,High"
|
|
eventfld.long 0x04 24. " TI0 ,GPTIMER0CTRL transition to zero" "Low,High"
|
|
bitfld.long 0x04 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 8. " SLI ,DCSuspend" "Disabled,Enabled"
|
|
eventfld.long 0x04 7. " SRI ,SOF Received" "Not received,Received"
|
|
textline " "
|
|
eventfld.long 0x04 6. " URI ,USB Reset Received" "Not received,Received"
|
|
bitfld.long 0x04 4. " SEI ,System Error" "No error,Error"
|
|
bitfld.long 0x04 2. " PCI ,Port Change Detect" "No change,Change"
|
|
textline " "
|
|
bitfld.long 0x04 1. " UEI ,USB Error Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " UI ,USB Interrupt" "No interrupt,Interrupt"
|
|
line.long 0x08 "USBINTR,USB Interrupt Enable Register"
|
|
bitfld.long 0x08 25. " TIE1 ,General Purpose Timer Interrupt Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " TIE0 ,General Purpose Timer Interrupt Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x08 19. " UPEI ,USB Host Periodic Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 18. " UAEI ,USB Host Asynchronous Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 16. " NAKEI ,NAK Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 10. " ULPIE ,ULPI Interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SLE ,DCSuspend Interrupt Enable." "Disabled,Enabled"
|
|
bitfld.long 0x08 7. " SRE ,USB Reset Received Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " URE ,USB Reset Received" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x08 4. " SEE ,System Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " PCE ,Port Change Detect Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x08 1. " UEE ,USB Error Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 0. " UE ,USB Interrupt" "No interrupt,Interrupt"
|
|
rgroup.long 0x14c++0x03
|
|
line.long 0x00 "FRINDEX,Frame Index Register"
|
|
hexmask.long.word 0x00 3.--13. 1. " FRINDEX[3:13] ,Frame List current index"
|
|
bitfld.long 0x00 0.--2. " FRINDEX[0:2] ,Frame List Size" "12,11,10,9,8,7,6,5"
|
|
else
|
|
group.long 0x140++0x0b
|
|
line.long 0x00 "USBCMD,Serial Bus Host/Device Controller Command Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt Threshold Control"
|
|
bitfld.long 0x00 14. " ATDTW ,Semaphore" "Low,High"
|
|
bitfld.long 0x00 7. " LR ,Light Host/Device Controller Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RST ,Controller reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " RS ,Run/Stop" "Stop,Run"
|
|
line.long 0x04 "USBSTS,USB Status Register"
|
|
eventfld.long 0x04 25. " TI1 ,GPTIMER1CTRL transition to zero" "Low,High"
|
|
eventfld.long 0x04 24. " TI0 ,GPTIMER0CTRL transition to zero" "Low,High"
|
|
bitfld.long 0x04 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 7. " SRI ,SOF Received" "Not received,Received"
|
|
bitfld.long 0x04 4. " SEI ,System Error" "No error,Error"
|
|
bitfld.long 0x04 2. " PCI ,Port Change Detect" "No change,Change"
|
|
textline " "
|
|
bitfld.long 0x04 1. " UEI ,USB Error Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " UI ,USB Interrupt" "No interrupt,Interrupt"
|
|
line.long 0x08 "USBINTR,USB Interrupt Enable Register"
|
|
bitfld.long 0x08 25. " TIE1 ,General Purpose Timer Interrupt Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " TIE0 ,General Purpose Timer Interrupt Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x08 19. " UPEI ,USB Host Periodic Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 18. " UAEI ,USB Host Asynchronous Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 16. " NAKEI ,NAK Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 10. " ULPIE ,ULPI Interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " SRE ,USB Reset Received Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " SEE ,System Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " PCE ,Port Change Detect Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x08 1. " UEE ,USB Error Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 0. " UE ,USB Interrupt" "No interrupt,Interrupt"
|
|
hgroup.long 0x14c++0x03
|
|
hide.long 0x00 "FRINDEX,Frame Index Register"
|
|
endif
|
|
if (((d.l((ad:0xE0002000+0x1A8)))&0x3)==0x3)
|
|
group.long 0x154++0x07
|
|
line.long 0x00 "PERIODICLISTBASE,Periodic List Base Address Register"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. " PERBASE ,Periodic List Base Address"
|
|
line.long 0x04 "ASYNCLISTADDR,Asynchronous List Base Address Register"
|
|
hexmask.long 0x04 5.--31. 0x20 " ASYBASE ,Asynchronous List Base Address"
|
|
elif (((d.l((ad:0xE0002000+0x1A8)))&0x3)==0x2)
|
|
group.long 0x154++0x07
|
|
line.long 0x00 "DEVICEADDR,Device Address Register"
|
|
hexmask.long.byte 0x00 25.--31. 1. " USBADRA ,Device address advance"
|
|
bitfld.long 0x00 24. " USBADR ,USB Device address" "Low,High"
|
|
line.long 0x04 "ENDPOINTLISTADDR,Endpoint List Base Address Register"
|
|
hexmask.long.tbyte 0x04 11.--31. 0x8 " EPBASE ,Endpoint List Base Address"
|
|
endif
|
|
group.long 0x15c++0x17
|
|
line.long 0x00 "TTCTRL,TT Control Register"
|
|
hexmask.long.byte 0x00 24.--30. 1. " TTHA ,Internal TT Hub Address Representation"
|
|
bitfld.long 0x00 1. " TTAS ,Embedded TT Asynchronous Buffers Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " TTAC ,Embedded TT Async Buffers Status" "Flushed,Not flushed"
|
|
line.long 0x04 "BURSTSIZE,Burst Size Register"
|
|
hexmask.long.word 0x04 8.--16. 1. " TXPBURST ,Programmable TX Burst Length"
|
|
hexmask.long.byte 0x04 0.--7. 1. " RXPBURST ,Programmable RX Burst Length"
|
|
line.long 0x08 "TXFILLTUNING,TX Latency FIFO Performance Tuning Register"
|
|
bitfld.long 0x08 16.--21. " TXFIFOTHRES ,FIFO Burst Threshold" "Reserved,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x08 8.--12. " TXSCHEALTH ,Scheduler Health Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x08 0.--6. 1. " TXSCHOH ,Scheduler Overhead"
|
|
line.long 0x0c "TXTTFILLTUNING,TT TX Latency FIFO Performance Tuning Register"
|
|
bitfld.long 0x0c 8.--12. " TXTTSCHHEALTH ,TT Scheduler Health Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x0c 0.--4. " TXTTSCHOH ,TT Scheduler Overhead" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x10 "IC_USB,Inter Chip USB Control Register"
|
|
bitfld.long 0x10 31. " IC8 ,Inter-Chip transceiver enable 8" "Disabled,Enabled"
|
|
bitfld.long 0x10 28.--30. " IC_VDD8 ,Inter-Chip voltage selection 8" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..."
|
|
bitfld.long 0x10 27. " IC7 ,Inter-Chip transceiver enable 7" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 24.--26. " IC_VDD7 ,Inter-Chip voltage selection 7" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..."
|
|
bitfld.long 0x10 23. " IC6 ,Inter-Chip transceiver enable 6" "Disabled,Enabled"
|
|
bitfld.long 0x10 20.--22. " IC_VDD6 ,Inter-Chip voltage selection 6" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..."
|
|
textline " "
|
|
bitfld.long 0x10 19. " IC5 ,Inter-Chip transceiver enable 5" "Disabled,Enabled"
|
|
bitfld.long 0x10 16.--18. " IC_VDD5 ,Inter-Chip voltage selection 5" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..."
|
|
bitfld.long 0x10 15. " IC4 ,Inter-Chip transceiver enable 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 12.--14. " IC_VDD4 ,Inter-Chip voltage selection 4" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..."
|
|
bitfld.long 0x10 11. " IC3 ,Inter-Chip transceiver enable 3" "Disabled,Enabled"
|
|
bitfld.long 0x10 8.--10. " IC_VDD3 ,Inter-Chip voltage selection 3" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..."
|
|
textline " "
|
|
bitfld.long 0x10 7. " IC2 ,Inter-Chip transceiver enable 2" "Disabled,Enabled"
|
|
bitfld.long 0x10 4.--6. " IC_VDD2 ,Inter-Chip voltage selection 2" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..."
|
|
bitfld.long 0x10 3. " IC1 ,Inter-Chip transceiver enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 0.--2. " IC_VDD1 ,Inter-Chip voltage selection 1" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..."
|
|
line.long 0x14 "ULPI_VIEWPORT,Indirect Access To The ULPI PHY Register"
|
|
bitfld.long 0x14 31. " ULPIWU ,ULPI Wakeup" "No wakeup,Wakeup"
|
|
bitfld.long 0x14 30. " ULPIRUN ,ULPI Run" "No run,Run"
|
|
bitfld.long 0x14 29. " ULPIRW ,ULPI Read/Write Control" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x14 27. " ULPISS ,ULPI Data Address" "No address,Address"
|
|
bitfld.long 0x14 24.--26. " ULPIPORT ,ULPI Port Number" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x14 16.--23. 1. " ULPIADDR ,ULPI Data Address"
|
|
textline " "
|
|
hexmask.long.byte 0x14 8.--15. 1. " ULPIDATRD ,ULPI Data Read"
|
|
hexmask.long.byte 0x14 0.--7. 1. " ULPIDATWR ,ULPI Data Write"
|
|
if (((d.l((ad:0xE0002000+0x1A8)))&0x3)==0x2)
|
|
group.long 0x178++0x07
|
|
line.long 0x00 "ENDPTNAK,Endpoint NAK Register"
|
|
bitfld.long 0x00 28. " EPTN[12] ,TX Endpoint 12 NAK" "Not received,Received"
|
|
bitfld.long 0x00 27. " EPTN[11] ,TX Endpoint 11 NAK" "Not received,Received"
|
|
bitfld.long 0x00 26. " EPTN[10] ,TX Endpoint 10 NAK" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 25. " EPTN[9] ,TX Endpoint 9 NAK" "Not received,Received"
|
|
bitfld.long 0x00 24. " EPTN[8] ,TX Endpoint 8 NAK" "Not received,Received"
|
|
bitfld.long 0x00 23. " EPTN[7] ,TX Endpoint 7 NAK" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 22. " EPTN[6] ,TX Endpoint 6 NAK" "Not received,Received"
|
|
bitfld.long 0x00 21. " EPTN[5] ,TX Endpoint 5 NAK" "Not received,Received"
|
|
bitfld.long 0x00 20. " EPTN[4] ,TX Endpoint 4 NAK" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 19. " EPTN[3] ,TX Endpoint 3 NAK" "Not received,Received"
|
|
bitfld.long 0x00 18. " EPTN[2] ,TX Endpoint 2 NAK" "Not received,Received"
|
|
bitfld.long 0x00 17. " EPTN[1] ,TX Endpoint 1 NAK" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EPTN[0] ,TX Endpoint 0 NAK" "Not received,Received"
|
|
bitfld.long 0x00 15. " EPRN[15] ,RX Endpoint 15 NAK" "Not received,Received"
|
|
bitfld.long 0x00 14. " EPRN[14] ,RX Endpoint 14 NAK" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 13. " EPRN[13] ,RX Endpoint 13 NAK" "Not received,Received"
|
|
bitfld.long 0x00 12. " EPRN[12] ,RX Endpoint 12 NAK" "Not received,Received"
|
|
bitfld.long 0x00 11. " EPRN[11] ,RX Endpoint 11 NAK" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 10. " EPRN[10] ,RX Endpoint 10 NAK" "Not received,Received"
|
|
bitfld.long 0x00 9. " EPRN[9] ,RX Endpoint 9 NAK" "Not received,Received"
|
|
bitfld.long 0x00 8. " EPRN[8] ,RX Endpoint 8 NAK" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 7. " EPRN[7] ,RX Endpoint 7 NAK" "Not received,Received"
|
|
bitfld.long 0x00 6. " EPRN[6] ,RX Endpoint 6 NAK" "Not received,Received"
|
|
bitfld.long 0x00 5. " EPRN[5] ,RX Endpoint 5 NAK" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EPRN[4] ,RX Endpoint 4 NAK" "Not received,Received"
|
|
bitfld.long 0x00 3. " EPRN[3] ,RX Endpoint 3 NAK" "Not received,Received"
|
|
bitfld.long 0x00 2. " EPRN[2] ,RX Endpoint 2 NAK" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EPRN[1] ,RX Endpoint 1 NAK" "Not received,Received"
|
|
bitfld.long 0x00 0. " EPRN[0] ,RX Endpoint 0 NAK" "Not received,Received"
|
|
line.long 0x04 "ENDPTNAKEN,Endpoint NAK Enable Register"
|
|
bitfld.long 0x04 28. " EPTNE[12] ,TX Endpoint 12 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 27. " EPTNE[11] ,TX Endpoint 11 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " EPTNE[10] ,TX Endpoint 10 NAK Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " EPTNE[9] ,TX Endpoint 9 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " EPTNE[8] ,TX Endpoint 8 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " EPTNE[7] ,TX Endpoint 7 NAK Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 22. " EPTNE[6] ,TX Endpoint 6 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " EPTNE[5] ,TX Endpoint 5 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " EPTNE[4] ,TX Endpoint 4 NAK Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " EPTNE[3] ,TX Endpoint 3 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " EPTNE[2] ,TX Endpoint 2 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " EPTNE[1] ,TX Endpoint 1 NAK Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " EPTNE[0] ,TX Endpoint 0 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " EPRNE[15] ,RX Endpoint 15 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " EPRNE[14] ,RX Endpoint 14 NAK Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " EPRNE[13] ,RX Endpoint 13 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " EPRNE[12] ,RX Endpoint 12 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " EPRNE[11] ,RX Endpoint 11 NAK Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " EPRNE[10] ,RX Endpoint 10 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " EPRNE[9] ,RX Endpoint 9 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " EPRNE[8] ,RX Endpoint 8 NAK Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " EPRNE[7] ,RX Endpoint 7 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " EPRNE[6] ,RX Endpoint 6 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " EPRNE[5] ,RX Endpoint 5 NAK Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EPRNE[4] ,RX Endpoint 4 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " EPRNE[3] ,RX Endpoint 3 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " EPRNE[2] ,RX Endpoint 2 NAK Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " EPRNE[1] ,RX Endpoint 1 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " EPRNE[0] ,RX Endpoint 0 NAK Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x178++0x07
|
|
hide.long 0x00 "ENDPTNAK,Endpoint NAK Register"
|
|
hide.long 0x04 "ENDPTNAKEN,Endpoint NAK Enable Register"
|
|
endif
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "PORTSC1,Port 1 Status And Control Register"
|
|
bitfld.long 0x00 30.--31. 25. " PTS ,Parallel Transceiver Select" "Reserved,Reserved,ULPI,?..."
|
|
bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full speed,Low speed,High speed,Not connected"
|
|
bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x00 23. " PHCD ,PHY Low Power Clock Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " WKDS ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " PTC ,Port Test Control" "Disabled,J_ STATE,K_ STATE,SE0/NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Off,Amber,Green,?..."
|
|
bitfld.long 0x00 12. " PP ,Port Power" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,K-state,J-state,?..."
|
|
bitfld.long 0x00 9. " HSP ,High-Speed Port" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SUSP ,Suspend" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " FPR ,Force Port Resume" "No resume,Resume"
|
|
bitfld.long 0x00 5. " OCC ,Over-current Change" "No change,Change"
|
|
textline " "
|
|
bitfld.long 0x00 4. " OCA ,Over-current Active" "No over-current,Over-current"
|
|
eventfld.long 0x00 3. " PEC ,Port Enabled Change" "No change,Change"
|
|
eventfld.long 0x00 2. " PE ,Port Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 1. " CSC ,Connect Status Change" "No change,Change"
|
|
bitfld.long 0x00 0. " CCS ,Current Connect Status" "No device,Present"
|
|
group.long 0x1a4++0x03
|
|
line.long 0x00 "OTGSC,On-The-Go Status And Control Register"
|
|
bitfld.long 0x00 30. " DPIE ,Data Pulse Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " 1MSE ,1 millisecond timer Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " BSEIE ,B Session End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BSVIE ,B Session Valid Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ASVIE ,A Session Valid Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " AVVIE ,A VBus Valid Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " IDIE ,USB ID Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 22. " DPIS ,Data Pulse Interrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 21. " 1MSS ,1 millisecond timer Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 20. " BSEIS ,B Session End Interrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 19. " BSVIS ,B Session Valid Interrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 18. " ASVIS ,A Session Valid Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 17. " AVVIS ,Frame IndexThis bit is set when VBus has either risen" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 16. " IDIS ,USB ID Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " DPS ,Data Bus Pulsing Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " 1MST ,1 millisecond timer toggle" "No toggle,Toggle"
|
|
bitfld.long 0x00 12. " BSE ,B Session End" "No end,End"
|
|
bitfld.long 0x00 11. " BSV ,B Session Valid" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASV ,A Session Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 9. " AVV ,A VBus Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 8. " ID ,USB ID" "A device,B device"
|
|
textline " "
|
|
bitfld.long 0x00 7. " HABA ,Hardware Assist B-Disconnect to A-connect" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " HADP ,Hardware Assist Data-Pulse" "Not started,Started"
|
|
bitfld.long 0x00 5. " IDPU ,ID Pullup" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DP ,Data Pulsing" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " OT ,OTG Termination" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " HAAR ,Hardware Assist Auto-Reset" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " VC ,VBUS Charge" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " VD ,VBUS Discharge" "Disabled,Enabled"
|
|
if (((d.l((ad:0xE0002000+0x1A8)))&0x3)==0x3)
|
|
group.long 0x1a8++0x03
|
|
line.long 0x00 "USBMODE,USB Mode Selection Register"
|
|
bitfld.long 0x00 15. " SRT ,Shorten Reset Time" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VBPS ,Vbus Power Select" "Low,High"
|
|
bitfld.long 0x00 4. " SDIS ,Stream Disable Mode" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SLOM ,Setup Lockout Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ES ,Endian Select" "Little,Big"
|
|
bitfld.long 0x00 0.--1. " CM ,Controller Mode" "Idle,Reserved,Device,Host"
|
|
elif (((d.l((ad:0xE0002000+0x1A8)))&0x3)==0x2)
|
|
group.long 0x1a8++0x03
|
|
line.long 0x00 "USBMODE,USB Mode Selection Register"
|
|
bitfld.long 0x00 15. " SRT ,Shorten Reset Time" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SDIS ,Stream Disable Mode" "Inactive,Active"
|
|
bitfld.long 0x00 3. " SLOM ,Setup Lockout Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ES ,Endian Select" "Little,Big"
|
|
bitfld.long 0x00 0.--1. " CM ,Controller Mode" "Idle,Reserved,Device,Host"
|
|
else
|
|
group.long 0x1a8++0x03
|
|
line.long 0x00 "USBMODE,USB Mode Selection Register"
|
|
bitfld.long 0x00 15. " SRT ,Shorten Reset Time" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SLOM ,Setup Lockout Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ES ,Endian Select" "Little,Big"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " CM ,Controller Mode" "Idle,Reserved,Device,Host"
|
|
endif
|
|
width 22.
|
|
if (((d.l((ad:0xE0002000+0x1A8)))&0x3)==0x2)
|
|
group.long 0x1ac++0x0b
|
|
line.long 0x00 "ENDPTSETUPSTAT,Setup Endpoint Status Register"
|
|
eventfld.long 0x00 12. " ENDPTSETUPSTAT[12] ,Setup Endpoint 12 Status" "Not received,Received"
|
|
eventfld.long 0x00 11. " ENDPTSETUPSTAT[11] ,Setup Endpoint 11 Status" "Not received,Received"
|
|
eventfld.long 0x00 10. " ENDPTSETUPSTAT[10] ,Setup Endpoint 10 Status" "Not received,Received"
|
|
textline " "
|
|
eventfld.long 0x00 9. " ENDPTSETUPSTAT[9] ,Setup Endpoint 9 Status" "Not received,Received"
|
|
eventfld.long 0x00 8. " ENDPTSETUPSTAT[8] ,Setup Endpoint 8 Status" "Not received,Received"
|
|
eventfld.long 0x00 7. " ENDPTSETUPSTAT[7] ,Setup Endpoint 7 Status" "Not received,Received"
|
|
textline " "
|
|
eventfld.long 0x00 6. " ENDPTSETUPSTAT[6] ,Setup Endpoint 6 Status" "Not received,Received"
|
|
eventfld.long 0x00 5. " ENDPTSETUPSTAT[5] ,Setup Endpoint 5 Status" "Not received,Received"
|
|
eventfld.long 0x00 4. " ENDPTSETUPSTAT[4] ,Setup Endpoint 4 Status" "Not received,Received"
|
|
textline " "
|
|
eventfld.long 0x00 3. " ENDPTSETUPSTAT[3] ,Setup Endpoint 3 Status" "Not received,Received"
|
|
eventfld.long 0x00 2. " ENDPTSETUPSTAT[2] ,Setup Endpoint 2 Status" "Not received,Received"
|
|
eventfld.long 0x00 1. " ENDPTSETUPSTAT[1] ,Setup Endpoint 1 Status" "Not received,Received"
|
|
textline " "
|
|
eventfld.long 0x00 0. " ENDPTSETUPSTAT[0] ,Setup Endpoint 0 Status" "Not received,Received"
|
|
width 22.
|
|
line.long 0x04 "ENDPTPRIME,Endpoint Prime Register"
|
|
eventfld.long 0x04 28. " PETB[12] ,Prime Endpoint 12 Transmit Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 27. " PETB[11] ,Prime Endpoint 11 Transmit Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 26. " PETB[10] ,Prime Endpoint 10 Transmit Buffer" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x04 25. " PETB[9] ,Prime Endpoint 9 Transmit Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 24. " PETB[8] ,Prime Endpoint 8 Transmit Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 23. " PETB[7] ,Prime Endpoint 7 Transmit Buffer" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x04 22. " PETB[6] ,Prime Endpoint 6 Transmit Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 21. " PETB[5] ,Prime Endpoint 5 Transmit Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 20. " PETB[4] ,Prime Endpoint 4 Transmit Buffer" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x04 19. " PETB[3] ,Prime Endpoint 3 Transmit Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 18. " PETB[2] ,Prime Endpoint 2 Transmit Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 17. " PETB[1] ,Prime Endpoint 1 Transmit Buffer" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x04 16. " PETB[0] ,Prime Endpoint 0 Transmit Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 12. " PERB[12] ,Prime Endpoint 12 Receive Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 11. " PERB[11] ,Prime Endpoint 11 Receive Buffer" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x04 10. " PERB[10] ,Prime Endpoint 10 Receive Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 9. " PERB[9] ,Prime Endpoint 9 Receive Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 8. " PERB[8] ,Prime Endpoint 8 Receive Buffer" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x04 7. " PERB[7] ,Prime Endpoint 7 Receive Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 6. " PERB[6] ,Prime Endpoint 6 Receive Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 5. " PERB[5] ,Prime Endpoint 5 Receive Buffer" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x04 4. " PERB[4] ,Prime Endpoint 4 Receive Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 3. " PERB[3] ,Prime Endpoint 3 Receive Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 2. " PERB[2] ,Prime Endpoint 2 Receive Buffer" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x04 1. " PERB[1] ,Prime Endpoint 1 Receive Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 0. " PERB[0] ,Prime Endpoint 0 Receive Buffer" "Not requested,Requested"
|
|
line.long 0x08 "ENDPTFLUSH,Endpoint Flush Register"
|
|
eventfld.long 0x08 28. " FETB[12] ,Flush Endpoint 12 Transmit Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 27. " FETB[11] ,Flush Endpoint 11 Transmit Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 26. " FETB[10] ,Flush Endpoint 10 Transmit Buffer" "No flush,Flush"
|
|
textline " "
|
|
eventfld.long 0x08 25. " FETB[9] ,Flush Endpoint 9 Transmit Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 24. " FETB[8] ,Flush Endpoint 8 Transmit Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 23. " FETB[7] ,Flush Endpoint 7 Transmit Buffer" "No flush,Flush"
|
|
textline " "
|
|
eventfld.long 0x08 22. " FETB[6] ,Flush Endpoint 6 Transmit Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 21. " FETB[5] ,Flush Endpoint 5 Transmit Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 20. " FETB[4] ,Flush Endpoint 4 Transmit Buffer" "No flush,Flush"
|
|
textline " "
|
|
eventfld.long 0x08 19. " FETB[3] ,Flush Endpoint 3 Transmit Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 18. " FETB[2] ,Flush Endpoint 2 Transmit Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 17. " FETB[1] ,Flush Endpoint 1 Transmit Buffer" "No flush,Flush"
|
|
textline " "
|
|
eventfld.long 0x08 16. " FETB[0] ,Flush Endpoint 0 Transmit Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 12. " FERB[12] ,Flush Endpoint 12 Receive Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 11. " FERB[11] ,Flush Endpoint 11 Receive Buffer" "No flush,Flush"
|
|
textline " "
|
|
eventfld.long 0x08 10. " FERB[10] ,Flush Endpoint 10 Receive Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 9. " FERB[9] ,Flush Endpoint 9 Receive Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 8. " FERB[8] ,Flush Endpoint 8 Receive Buffer" "No flush,Flush"
|
|
textline " "
|
|
eventfld.long 0x08 7. " FERB[7] ,Flush Endpoint 7 Receive Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 6. " FERB[6] ,Flush Endpoint 6 Receive Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 5. " FERB[5] ,Flush Endpoint 5 Receive Buffer" "No flush,Flush"
|
|
textline " "
|
|
eventfld.long 0x08 4. " FERB[4] ,Flush Endpoint 4 Receive Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 3. " FERB[3] ,Flush Endpoint 3 Receive Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 2. " FERB[2] ,Flush Endpoint 2 Receive Buffer" "No flush,Flush"
|
|
textline " "
|
|
eventfld.long 0x08 1. " FERB[1] ,Flush Endpoint 1 Receive Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 0. " FERB[0] ,Flush Endpoint 0 Receive Buffer" "No flush,Flush"
|
|
rgroup.long 0x1b8++0x07
|
|
line.long 0x00 "ENDPTSTAT,Endpoint Status Register"
|
|
bitfld.long 0x00 28. " ETBR[12] ,Endpoint 12 Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 27. " ETBR[11] ,Endpoint 11 Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 26. " ETBR[10] ,Endpoint 10 Transmit Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ETBR[9] ,Endpoint 9 Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 24. " ETBR[8] ,Endpoint 8 Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 23. " ETBR[7] ,Endpoint 7 Transmit Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ETBR[6] ,Endpoint 6 Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 21. " ETBR[5] ,Endpoint 5 Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " ETBR[4] ,Endpoint 4 Transmit Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ETBR[3] ,Endpoint 3 Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 18. " ETBR[2] ,Endpoint 2 Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 17. " ETBR[1] ,Endpoint 1 Transmit Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ETBR[0] ,Endpoint 0 Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 12. " ERBR[12] ,Endpoint 12 Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 11. " ERBR[11] ,Endpoint 11 Receive Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ERBR[10] ,Endpoint 10 Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 9. " ERBR[9] ,Endpoint 9 Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 8. " ERBR[8] ,Endpoint 8 Receive Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ERBR[7] ,Endpoint 7 Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 6. " ERBR[6] ,Endpoint 6 Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 5. " ERBR[5] ,Endpoint 5 Receive Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ERBR[4] ,Endpoint 4 Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 3. " ERBR[3] ,Endpoint 3 Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 2. " ERBR[2] ,Endpoint 2 Receive Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ERBR[1] ,Endpoint 1 Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 0. " ERBR[0] ,Endpoint 0 Receive Buffer Ready" "Not ready,Ready"
|
|
line.long 0x04 "ENDPTCOMPLETE,Endpoint Complete Register"
|
|
bitfld.long 0x04 28. " ETCE[12] ,Endpoint 12 Transmit Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 27. " ETCE[11] ,Endpoint 11 Transmit Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 26. " ETCE[10] ,Endpoint 10 Transmit Complete Event" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ETCE[9] ,Endpoint 9 Transmit Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 24. " ETCE[8] ,Endpoint 8 Transmit Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 23. " ETCE[7] ,Endpoint 7 Transmit Complete Event" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x04 22. " ETCE[6] ,Endpoint 6 Transmit Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 21. " ETCE[5] ,Endpoint 5 Transmit Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 20. " ETCE[4] ,Endpoint 4 Transmit Complete Event" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ETCE[3] ,Endpoint 3 Transmit Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 18. " ETCE[2] ,Endpoint 2 Transmit Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 17. " ETCE[1] ,Endpoint 1 Transmit Complete Event" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x04 16. " ETCE[0] ,Endpoint 0 Transmit Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 12. " ERCE[12] ,Endpoint 12 Receive Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 11. " ERCE[11] ,Endpoint 11 Receive Complete Event" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x04 10. " ERCE[10] ,Endpoint 10 Receive Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 9. " ERCE[9] ,Endpoint 9 Receive Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 8. " ERCE[8] ,Endpoint 8 Receive Complete Event" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ERCE[7] ,Endpoint 7 Receive Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 6. " ERCE[6] ,Endpoint 6 Receive Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 5. " ERCE[5] ,Endpoint 5 Receive Complete Event" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x04 4. " ERCE[4] ,Endpoint 4 Receive Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 3. " ERCE[3] ,Endpoint 3 Receive Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 2. " ERCE[2] ,Endpoint 2 Receive Complete Event" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ERCE[1] ,Endpoint 1 Receive Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 0. " ERCE[0] ,Endpoint 0 Receive Complete Event" "Not completed,Completed"
|
|
group.long 0x1c0++0x37
|
|
line.long 0x00 "ENDPTCTRL0,Endpoint 0 Control Register"
|
|
bitfld.long 0x00 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18.--19. " TXT ,TX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x00 16. " TXS ,TX Endpoint Stall" "OK,Stalled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--3. " RXT ,RX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x00 0. " RXS ,RX Endpoint Stall" "OK,Stalled"
|
|
line.long 0x4 "ENDPTCTRL1,Endpoint 1 Control Register"
|
|
bitfld.long 0x4 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 22. " TXR ,TX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x4 21. " TXI ,TX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x4 17. " TXD ,TX Endpoint Data" "Dual Port,?..."
|
|
bitfld.long 0x4 16. " TXS ,TX Endpoint Stall" "OK,Stalled"
|
|
textline " "
|
|
bitfld.long 0x4 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 6. " RXR ,RX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x4 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 2.--3. " RXT ,RX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x4 1. " RXD ,RX Endpoint Data Sink" "Dual Port,?..."
|
|
bitfld.long 0x4 0. " RXS ,RX Endpoint Stall" "OK,Stalled"
|
|
line.long 0x8 "ENDPTCTRL2,Endpoint 2 Control Register"
|
|
bitfld.long 0x8 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 22. " TXR ,TX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x8 21. " TXI ,TX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x8 17. " TXD ,TX Endpoint Data" "Dual Port,?..."
|
|
bitfld.long 0x8 16. " TXS ,TX Endpoint Stall" "OK,Stalled"
|
|
textline " "
|
|
bitfld.long 0x8 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 6. " RXR ,RX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x8 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 2.--3. " RXT ,RX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x8 1. " RXD ,RX Endpoint Data Sink" "Dual Port,?..."
|
|
bitfld.long 0x8 0. " RXS ,RX Endpoint Stall" "OK,Stalled"
|
|
line.long 0xC "ENDPTCTRL3,Endpoint 3 Control Register"
|
|
bitfld.long 0xC 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 22. " TXR ,TX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0xC 21. " TXI ,TX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0xC 17. " TXD ,TX Endpoint Data" "Dual Port,?..."
|
|
bitfld.long 0xC 16. " TXS ,TX Endpoint Stall" "OK,Stalled"
|
|
textline " "
|
|
bitfld.long 0xC 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 6. " RXR ,RX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0xC 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 2.--3. " RXT ,RX Endpoint Type" "Control,?..."
|
|
bitfld.long 0xC 1. " RXD ,RX Endpoint Data Sink" "Dual Port,?..."
|
|
bitfld.long 0xC 0. " RXS ,RX Endpoint Stall" "OK,Stalled"
|
|
line.long 0x10 "ENDPTCTRL4,Endpoint 4 Control Register"
|
|
bitfld.long 0x10 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 22. " TXR ,TX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x10 21. " TXI ,TX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x10 17. " TXD ,TX Endpoint Data" "Dual Port,?..."
|
|
bitfld.long 0x10 16. " TXS ,TX Endpoint Stall" "OK,Stalled"
|
|
textline " "
|
|
bitfld.long 0x10 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 6. " RXR ,RX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x10 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 2.--3. " RXT ,RX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x10 1. " RXD ,RX Endpoint Data Sink" "Dual Port,?..."
|
|
bitfld.long 0x10 0. " RXS ,RX Endpoint Stall" "OK,Stalled"
|
|
line.long 0x14 "ENDPTCTRL5,Endpoint 5 Control Register"
|
|
bitfld.long 0x14 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 22. " TXR ,TX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x14 21. " TXI ,TX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x14 17. " TXD ,TX Endpoint Data" "Dual Port,?..."
|
|
bitfld.long 0x14 16. " TXS ,TX Endpoint Stall" "OK,Stalled"
|
|
textline " "
|
|
bitfld.long 0x14 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 6. " RXR ,RX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x14 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 2.--3. " RXT ,RX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x14 1. " RXD ,RX Endpoint Data Sink" "Dual Port,?..."
|
|
bitfld.long 0x14 0. " RXS ,RX Endpoint Stall" "OK,Stalled"
|
|
line.long 0x18 "ENDPTCTRL6,Endpoint 6 Control Register"
|
|
bitfld.long 0x18 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 22. " TXR ,TX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x18 21. " TXI ,TX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x18 17. " TXD ,TX Endpoint Data" "Dual Port,?..."
|
|
bitfld.long 0x18 16. " TXS ,TX Endpoint Stall" "OK,Stalled"
|
|
textline " "
|
|
bitfld.long 0x18 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 6. " RXR ,RX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x18 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 2.--3. " RXT ,RX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x18 1. " RXD ,RX Endpoint Data Sink" "Dual Port,?..."
|
|
bitfld.long 0x18 0. " RXS ,RX Endpoint Stall" "OK,Stalled"
|
|
line.long 0x1C "ENDPTCTRL7,Endpoint 7 Control Register"
|
|
bitfld.long 0x1C 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 22. " TXR ,TX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x1C 21. " TXI ,TX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x1C 17. " TXD ,TX Endpoint Data" "Dual Port,?..."
|
|
bitfld.long 0x1C 16. " TXS ,TX Endpoint Stall" "OK,Stalled"
|
|
textline " "
|
|
bitfld.long 0x1C 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 6. " RXR ,RX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x1C 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 2.--3. " RXT ,RX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x1C 1. " RXD ,RX Endpoint Data Sink" "Dual Port,?..."
|
|
bitfld.long 0x1C 0. " RXS ,RX Endpoint Stall" "OK,Stalled"
|
|
line.long 0x20 "ENDPTCTRL8,Endpoint 8 Control Register"
|
|
bitfld.long 0x20 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 22. " TXR ,TX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x20 21. " TXI ,TX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x20 17. " TXD ,TX Endpoint Data" "Dual Port,?..."
|
|
bitfld.long 0x20 16. " TXS ,TX Endpoint Stall" "OK,Stalled"
|
|
textline " "
|
|
bitfld.long 0x20 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 6. " RXR ,RX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x20 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 2.--3. " RXT ,RX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x20 1. " RXD ,RX Endpoint Data Sink" "Dual Port,?..."
|
|
bitfld.long 0x20 0. " RXS ,RX Endpoint Stall" "OK,Stalled"
|
|
line.long 0x24 "ENDPTCTRL9,Endpoint 9 Control Register"
|
|
bitfld.long 0x24 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 22. " TXR ,TX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x24 21. " TXI ,TX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x24 17. " TXD ,TX Endpoint Data" "Dual Port,?..."
|
|
bitfld.long 0x24 16. " TXS ,TX Endpoint Stall" "OK,Stalled"
|
|
textline " "
|
|
bitfld.long 0x24 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 6. " RXR ,RX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x24 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 2.--3. " RXT ,RX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x24 1. " RXD ,RX Endpoint Data Sink" "Dual Port,?..."
|
|
bitfld.long 0x24 0. " RXS ,RX Endpoint Stall" "OK,Stalled"
|
|
line.long 0x28 "ENDPTCTRL10,Endpoint 10 Control Register"
|
|
bitfld.long 0x28 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 22. " TXR ,TX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x28 21. " TXI ,TX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x28 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x28 17. " TXD ,TX Endpoint Data" "Dual Port,?..."
|
|
bitfld.long 0x28 16. " TXS ,TX Endpoint Stall" "OK,Stalled"
|
|
textline " "
|
|
bitfld.long 0x28 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 6. " RXR ,RX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x28 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x28 2.--3. " RXT ,RX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x28 1. " RXD ,RX Endpoint Data Sink" "Dual Port,?..."
|
|
bitfld.long 0x28 0. " RXS ,RX Endpoint Stall" "OK,Stalled"
|
|
line.long 0x2C "ENDPTCTRL11,Endpoint 11 Control Register"
|
|
bitfld.long 0x2C 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 22. " TXR ,TX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x2C 21. " TXI ,TX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2C 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x2C 17. " TXD ,TX Endpoint Data" "Dual Port,?..."
|
|
bitfld.long 0x2C 16. " TXS ,TX Endpoint Stall" "OK,Stalled"
|
|
textline " "
|
|
bitfld.long 0x2C 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 6. " RXR ,RX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x2C 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2C 2.--3. " RXT ,RX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x2C 1. " RXD ,RX Endpoint Data Sink" "Dual Port,?..."
|
|
bitfld.long 0x2C 0. " RXS ,RX Endpoint Stall" "OK,Stalled"
|
|
line.long 0x30 "ENDPTCTRL12,Endpoint 12 Control Register"
|
|
bitfld.long 0x30 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 22. " TXR ,TX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x30 21. " TXI ,TX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x30 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x30 17. " TXD ,TX Endpoint Data" "Dual Port,?..."
|
|
bitfld.long 0x30 16. " TXS ,TX Endpoint Stall" "OK,Stalled"
|
|
textline " "
|
|
bitfld.long 0x30 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 6. " RXR ,RX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x30 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x30 2.--3. " RXT ,RX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x30 1. " RXD ,RX Endpoint Data Sink" "Dual Port,?..."
|
|
bitfld.long 0x30 0. " RXS ,RX Endpoint Stall" "OK,Stalled"
|
|
else
|
|
hgroup.long 0x1ac++0x47
|
|
hide.long 0x00 "ENDPTSETUPSTAT,Setup Endpoint Status Register"
|
|
hide.long 0x04 "ENDPTPRIME,Endpoint Prime Register"
|
|
hide.long 0x08 "ENDPTFLUSH,Endpoint Flush Register"
|
|
hide.long 0x0c "ENDPTSTAT,Endpoint Status Register"
|
|
hide.long 0x10 "ENDPTCOMPLETE,Endpoint Complete Register"
|
|
hide.long 0x14 "ENDPTCTRL0,Endpoint 0 Control Register"
|
|
hide.long 0x18 "ENDPTCTRL1,Endpoint 1 Control Register"
|
|
hide.long 0x1C "ENDPTCTRL2,Endpoint 2 Control Register"
|
|
hide.long 0x20 "ENDPTCTRL3,Endpoint 3 Control Register"
|
|
hide.long 0x24 "ENDPTCTRL4,Endpoint 4 Control Register"
|
|
hide.long 0x28 "ENDPTCTRL5,Endpoint 5 Control Register"
|
|
hide.long 0x2C "ENDPTCTRL6,Endpoint 6 Control Register"
|
|
hide.long 0x30 "ENDPTCTRL7,Endpoint 7 Control Register"
|
|
hide.long 0x34 "ENDPTCTRL8,Endpoint 8 Control Register"
|
|
hide.long 0x38 "ENDPTCTRL9,Endpoint 9 Control Register"
|
|
hide.long 0x3C "ENDPTCTRL10,Endpoint 10 Control Register"
|
|
hide.long 0x40 "ENDPTCTRL11,Endpoint 11 Control Register"
|
|
hide.long 0x44 "ENDPTCTRL12,Endpoint 12 Control Register"
|
|
endif
|
|
width 12.
|
|
tree.end
|
|
tree "USB1"
|
|
base ad:0xE0003000
|
|
width 22.
|
|
rgroup.long 0x00++0x17
|
|
line.long 0x00 "ID,ID Register"
|
|
bitfld.long 0x00 29.--31. " CIVERSION ,CI version" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 25.--28. " VERSION ,Version of the core" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 21.--24. " REVISION ,Revision number of the core" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--20. " TAG ,Tag of the core" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 8.--13. " NID ,NID Complement of ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " ID ,ID Configuration number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x04 "HWGENERAL,General Hardware Parameters Register"
|
|
bitfld.long 0x04 10.--11. " SM ,Serial engeine enable" "Disabled,?..."
|
|
bitfld.long 0x04 6.--9. " PHYM ,PHY interface type" "Reserved,Reserved,ULPI,?..."
|
|
bitfld.long 0x04 4.--5. " PHYW ,PHY bus width" "8 bit,?..."
|
|
textline " "
|
|
bitfld.long 0x04 1.--2. " CLKC ,Clocking used in the core" "Reserved,CLK,?..."
|
|
bitfld.long 0x04 0. " RT ,Reset Type" "Reserved,Asynchronous"
|
|
line.long 0x08 "HWHOST,Host Hardware Parameters Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TTPER ,VUSB_HS_TT_PERIODIC_CONTEXTS"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TTASY ,VUSB_HS_TT_ASYNC_CONTEXTS"
|
|
bitfld.long 0x08 1.--3. " NPORT ,Number of downstream ports by host port" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x08 0. " HC ,VUSB_HS_HOST" "Disabled,Enabled"
|
|
line.long 0x0c "HWDEVICE,Device Hardware Parameters Register"
|
|
bitfld.long 0x0c 1.--5. " DEVEP ,Number of endpoints" "0,1,2,3,4,5,6,7,8,9,10,11,12,?..."
|
|
bitfld.long 0x0c 0. " DC ,Device capable" "Not capable,Capable"
|
|
line.long 0x10 "HWTXBUF,TX Buffer Hardware Parameters Register"
|
|
hexmask.long.byte 0x10 16.--23. 1. " TXCHANADD ,Address bits for each Endpoint"
|
|
hexmask.long.byte 0x10 8.--15. 1. " TXADD ,Depth TX buffer"
|
|
hexmask.long.byte 0x10 0.--7. 1. " TXBURST ,Burst size for Memory"
|
|
line.long 0x14 "HWRXBUF,RX Buffer Hardware Parameters Register"
|
|
hexmask.long.byte 0x14 8.--15. 1. " RXADD ,Depth RX buffer"
|
|
hexmask.long.byte 0x14 0.--7. 1. " RXBURST ,Burst size of 16 for Memory To TX Buffer Transfers"
|
|
group.long 0x80++0x13
|
|
line.long 0x0 "GPTIMER0LD,General Purpose Timer 0 Load Value Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. " GPTLD ,General Purpose Timer 0 Load Value"
|
|
line.long (0x0+0x04) "GPTIMER0CTRL,General Purpose Timer 0 Control Register"
|
|
bitfld.long (0x0+0x04) 31. " GPTRUN ,General Purpose Timer Run" "Not run,Run"
|
|
bitfld.long (0x0+0x04) 30. " GPTRST ,General Purpose Timer Reset" "No reset,Reset"
|
|
bitfld.long (0x0+0x04) 24. " GPTMODE ,General Purpose Timer Mode" "One shot,Repeat"
|
|
textline " "
|
|
hexmask.long.tbyte (0x0+0x04) 0.--23. 1. " GPTCNT ,General Purpose Timer Counter"
|
|
line.long 0x8 "GPTIMER1LD,General Purpose Timer 1 Load Value Register"
|
|
hexmask.long.tbyte 0x8 0.--23. 1. " GPTLD ,General Purpose Timer 1 Load Value"
|
|
line.long (0x8+0x04) "GPTIMER1CTRL,General Purpose Timer 1 Control Register"
|
|
bitfld.long (0x8+0x04) 31. " GPTRUN ,General Purpose Timer Run" "Not run,Run"
|
|
bitfld.long (0x8+0x04) 30. " GPTRST ,General Purpose Timer Reset" "No reset,Reset"
|
|
bitfld.long (0x8+0x04) 24. " GPTMODE ,General Purpose Timer Mode" "One shot,Repeat"
|
|
textline " "
|
|
hexmask.long.tbyte (0x8+0x04) 0.--23. 1. " GPTCNT ,General Purpose Timer Counter"
|
|
line.long 0x10 "SBUSCFG,System Bus Interface Control Register"
|
|
bitfld.long 0x10 0.--2. " AHBBRST ,AHB Burst Mode" "Incremental,INCR4 to singles,INCR8 to INCR4 or singles,INCR16 to INCR8/ INCR4 or singles,Reserved,INCR4 to INCR of unspecifed length,INCR8 to INCR4 or INCR of unspecifed length,INCR16 to INCR8/INCR4 or INCR of unspecifed length"
|
|
rgroup.long 0x100++0x0b
|
|
line.long 0x00 "CAPLENGTH_HCIVERSION,Device/Host Capability Register"
|
|
hexmask.long.word 0x00 8.--23. 1. " HCIVERSION ,BCD encoding of the EHCI revision number supported by this host controller"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CAPLENGTH ,Capability Length"
|
|
line.long 0x04 "HCSPARAMS,Port teering Logic Capabilities Register"
|
|
bitfld.long 0x04 24.--27. " N_TT ,Number of embedded transaction translators associated with host controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 20.--23. " N_PTT ,Number of Ports per Transaction Translator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 16. " PI ,Port indicator" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " N_CC ,Number of companion controllers associated with this host controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 8.--11. " N_PCC ,Number of ports supported per internal Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 4. " PPC ,Port Power Control" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x04 0.--3. " N_PORTS ,Number of downstream ports supported by the host controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "HCCPARAMS,Multiple Mode Control Addressing Capability Register"
|
|
hexmask.long.byte 0x08 8.--15. 1. " EECP ,EECP"
|
|
bitfld.long 0x08 4.--7. " IST ,Isochronous Scheduling Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 2. " ASP ,Asynchronous Schedule Park Capability" "Not Capable,Capable"
|
|
textline " "
|
|
bitfld.long 0x08 1. " PFL ,Programmable Frame List Size" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " ADC ,64-bit Addressing Capability" "Not capable,Capable"
|
|
rgroup.long 0x120++0x07
|
|
line.long 0x00 "DCIVERSION,Device Controller Interface Version Number Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DCIVERSION ,BCD encoding of the interface version number"
|
|
line.long 0x04 "DCCPARAMS,Overall Host/Device Controller Capability Register"
|
|
bitfld.long 0x04 8. " HC ,Host Capable" "Not capable,Capable"
|
|
bitfld.long 0x04 7. " DC ,Device Capable" "Not capable,Capable"
|
|
bitfld.long 0x04 0.--4. " DEN ,Number of endpoints built into the device controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,?..."
|
|
if (((d.l((ad:0xE0003000+0x1A8)))&0x3)==0x3)
|
|
group.long 0x140++0x0f
|
|
line.long 0x00 "USBCMD,Serial Bus Host/Device Controller Command Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt Threshold Control"
|
|
bitfld.long 0x00 14. " ATDTW ,Semaphore" "Low,High"
|
|
bitfld.long 0x00 11. " ASPE ,Asynchronous Park Capability Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " ASP ,Asynchronous Park Capability" "0,1,2,3"
|
|
bitfld.long 0x00 7. " LR ,Light Host/Device Controller Reset" "No reset,Reset"
|
|
bitfld.long 0x00 6. " IAA ,Advance asynchronous schedule interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 5. " ASE ,Asynchronous Schedule Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PSE ,Periodic Schedule Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RST ,Controller reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RS ,Run/Stop" "Stop,Run"
|
|
line.long 0x04 "USBSTS,USB Status Register"
|
|
eventfld.long 0x04 25. " TI1 ,GPTIMER1CTRL transition to zero" "Low,High"
|
|
eventfld.long 0x04 24. " TI0 ,GPTIMER0CTRL transition to zero" "Low,High"
|
|
bitfld.long 0x04 19. " UPI ,USB transaction completion" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x04 18. " UAI ,USB Host Asynchronous Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 15. " AS ,Current real status of the Asynchronous Schedule" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " PS ,Periodic Schedule Status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " RCL ,Reclamation" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " HCH ,HCHaIted" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 7. " SRI ,SOF Received" "Not received,Received"
|
|
bitfld.long 0x04 5. " AAI ,Interrupt on Async Advance" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 4. " SEI ,System Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 3. " FRI ,Frame List Rollover" "No rollover,Rollover"
|
|
bitfld.long 0x04 2. " PCI ,Port Change Detect" "No change,Change"
|
|
bitfld.long 0x04 1. " UEI ,USB Error Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 0. " UI ,USB Interrupt" "No interrupt,Interrupt"
|
|
line.long 0x08 "USBINTR,USB Interrupt Enable Register"
|
|
bitfld.long 0x08 25. " TIE1 ,General Purpose Timer Interrupt Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " TIE0 ,General Purpose Timer Interrupt Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x08 19. " UPEI ,USB Host Periodic Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 18. " UAEI ,USB Host Asynchronous Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 16. " NAKEI ,NAK Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 10. " ULPIE ,ULPI Interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " SRE ,USB Reset Received Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " AAE ,Interrupt on Async Advance Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " SEE ,System Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " FRE ,Frame List Rollover Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " PCE ,Port Change Detect Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x08 1. " UEE ,USB Error Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 0. " UE ,USB Interrupt" "No interrupt,Interrupt"
|
|
line.long 0x0c "FRINDEX,Frame Index Register"
|
|
hexmask.long.word 0x0c 3.--13. 1. " FRINDEX[3:13] ,Frame List current index"
|
|
bitfld.long 0x0c 0.--2. " FRINDEX[0:2] ,Frame List Size" "12,11,10,9,8,7,6,5"
|
|
elif (((d.l((ad:0xE0003000+0x1A8)))&0x3)==0x2)
|
|
group.long 0x140++0x0b
|
|
line.long 0x00 "USBCMD,Serial Bus Host/Device Controller Command Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt Threshold Control"
|
|
bitfld.long 0x00 14. " ATDTW ,Semaphore" "Low,High"
|
|
bitfld.long 0x00 13. " SUTW ,Setup TripWir" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LR ,Light Host/Device Controller Reset" "No reset,Reset"
|
|
bitfld.long 0x00 1. " RST ,Controller reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " RS ,Run/Stop" "Stop,Run"
|
|
line.long 0x04 "USBSTS,USB Status Register"
|
|
eventfld.long 0x04 25. " TI1 ,GPTIMER1CTRL transition to zero" "Low,High"
|
|
eventfld.long 0x04 24. " TI0 ,GPTIMER0CTRL transition to zero" "Low,High"
|
|
bitfld.long 0x04 16. " NAKI ,NAK Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 8. " SLI ,DCSuspend" "Disabled,Enabled"
|
|
eventfld.long 0x04 7. " SRI ,SOF Received" "Not received,Received"
|
|
textline " "
|
|
eventfld.long 0x04 6. " URI ,USB Reset Received" "Not received,Received"
|
|
bitfld.long 0x04 4. " SEI ,System Error" "No error,Error"
|
|
bitfld.long 0x04 2. " PCI ,Port Change Detect" "No change,Change"
|
|
textline " "
|
|
bitfld.long 0x04 1. " UEI ,USB Error Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " UI ,USB Interrupt" "No interrupt,Interrupt"
|
|
line.long 0x08 "USBINTR,USB Interrupt Enable Register"
|
|
bitfld.long 0x08 25. " TIE1 ,General Purpose Timer Interrupt Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " TIE0 ,General Purpose Timer Interrupt Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x08 19. " UPEI ,USB Host Periodic Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 18. " UAEI ,USB Host Asynchronous Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 16. " NAKEI ,NAK Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 10. " ULPIE ,ULPI Interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SLE ,DCSuspend Interrupt Enable." "Disabled,Enabled"
|
|
bitfld.long 0x08 7. " SRE ,USB Reset Received Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " URE ,USB Reset Received" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x08 4. " SEE ,System Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " PCE ,Port Change Detect Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x08 1. " UEE ,USB Error Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 0. " UE ,USB Interrupt" "No interrupt,Interrupt"
|
|
rgroup.long 0x14c++0x03
|
|
line.long 0x00 "FRINDEX,Frame Index Register"
|
|
hexmask.long.word 0x00 3.--13. 1. " FRINDEX[3:13] ,Frame List current index"
|
|
bitfld.long 0x00 0.--2. " FRINDEX[0:2] ,Frame List Size" "12,11,10,9,8,7,6,5"
|
|
else
|
|
group.long 0x140++0x0b
|
|
line.long 0x00 "USBCMD,Serial Bus Host/Device Controller Command Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt Threshold Control"
|
|
bitfld.long 0x00 14. " ATDTW ,Semaphore" "Low,High"
|
|
bitfld.long 0x00 7. " LR ,Light Host/Device Controller Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RST ,Controller reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " RS ,Run/Stop" "Stop,Run"
|
|
line.long 0x04 "USBSTS,USB Status Register"
|
|
eventfld.long 0x04 25. " TI1 ,GPTIMER1CTRL transition to zero" "Low,High"
|
|
eventfld.long 0x04 24. " TI0 ,GPTIMER0CTRL transition to zero" "Low,High"
|
|
bitfld.long 0x04 10. " ULPII ,ULPI Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 7. " SRI ,SOF Received" "Not received,Received"
|
|
bitfld.long 0x04 4. " SEI ,System Error" "No error,Error"
|
|
bitfld.long 0x04 2. " PCI ,Port Change Detect" "No change,Change"
|
|
textline " "
|
|
bitfld.long 0x04 1. " UEI ,USB Error Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " UI ,USB Interrupt" "No interrupt,Interrupt"
|
|
line.long 0x08 "USBINTR,USB Interrupt Enable Register"
|
|
bitfld.long 0x08 25. " TIE1 ,General Purpose Timer Interrupt Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " TIE0 ,General Purpose Timer Interrupt Enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x08 19. " UPEI ,USB Host Periodic Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 18. " UAEI ,USB Host Asynchronous Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 16. " NAKEI ,NAK Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 10. " ULPIE ,ULPI Interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " SRE ,USB Reset Received Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " SEE ,System Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " PCE ,Port Change Detect Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x08 1. " UEE ,USB Error Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 0. " UE ,USB Interrupt" "No interrupt,Interrupt"
|
|
hgroup.long 0x14c++0x03
|
|
hide.long 0x00 "FRINDEX,Frame Index Register"
|
|
endif
|
|
if (((d.l((ad:0xE0003000+0x1A8)))&0x3)==0x3)
|
|
group.long 0x154++0x07
|
|
line.long 0x00 "PERIODICLISTBASE,Periodic List Base Address Register"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. " PERBASE ,Periodic List Base Address"
|
|
line.long 0x04 "ASYNCLISTADDR,Asynchronous List Base Address Register"
|
|
hexmask.long 0x04 5.--31. 0x20 " ASYBASE ,Asynchronous List Base Address"
|
|
elif (((d.l((ad:0xE0003000+0x1A8)))&0x3)==0x2)
|
|
group.long 0x154++0x07
|
|
line.long 0x00 "DEVICEADDR,Device Address Register"
|
|
hexmask.long.byte 0x00 25.--31. 1. " USBADRA ,Device address advance"
|
|
bitfld.long 0x00 24. " USBADR ,USB Device address" "Low,High"
|
|
line.long 0x04 "ENDPOINTLISTADDR,Endpoint List Base Address Register"
|
|
hexmask.long.tbyte 0x04 11.--31. 0x8 " EPBASE ,Endpoint List Base Address"
|
|
endif
|
|
group.long 0x15c++0x17
|
|
line.long 0x00 "TTCTRL,TT Control Register"
|
|
hexmask.long.byte 0x00 24.--30. 1. " TTHA ,Internal TT Hub Address Representation"
|
|
bitfld.long 0x00 1. " TTAS ,Embedded TT Asynchronous Buffers Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " TTAC ,Embedded TT Async Buffers Status" "Flushed,Not flushed"
|
|
line.long 0x04 "BURSTSIZE,Burst Size Register"
|
|
hexmask.long.word 0x04 8.--16. 1. " TXPBURST ,Programmable TX Burst Length"
|
|
hexmask.long.byte 0x04 0.--7. 1. " RXPBURST ,Programmable RX Burst Length"
|
|
line.long 0x08 "TXFILLTUNING,TX Latency FIFO Performance Tuning Register"
|
|
bitfld.long 0x08 16.--21. " TXFIFOTHRES ,FIFO Burst Threshold" "Reserved,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x08 8.--12. " TXSCHEALTH ,Scheduler Health Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x08 0.--6. 1. " TXSCHOH ,Scheduler Overhead"
|
|
line.long 0x0c "TXTTFILLTUNING,TT TX Latency FIFO Performance Tuning Register"
|
|
bitfld.long 0x0c 8.--12. " TXTTSCHHEALTH ,TT Scheduler Health Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x0c 0.--4. " TXTTSCHOH ,TT Scheduler Overhead" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x10 "IC_USB,Inter Chip USB Control Register"
|
|
bitfld.long 0x10 31. " IC8 ,Inter-Chip transceiver enable 8" "Disabled,Enabled"
|
|
bitfld.long 0x10 28.--30. " IC_VDD8 ,Inter-Chip voltage selection 8" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..."
|
|
bitfld.long 0x10 27. " IC7 ,Inter-Chip transceiver enable 7" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 24.--26. " IC_VDD7 ,Inter-Chip voltage selection 7" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..."
|
|
bitfld.long 0x10 23. " IC6 ,Inter-Chip transceiver enable 6" "Disabled,Enabled"
|
|
bitfld.long 0x10 20.--22. " IC_VDD6 ,Inter-Chip voltage selection 6" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..."
|
|
textline " "
|
|
bitfld.long 0x10 19. " IC5 ,Inter-Chip transceiver enable 5" "Disabled,Enabled"
|
|
bitfld.long 0x10 16.--18. " IC_VDD5 ,Inter-Chip voltage selection 5" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..."
|
|
bitfld.long 0x10 15. " IC4 ,Inter-Chip transceiver enable 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 12.--14. " IC_VDD4 ,Inter-Chip voltage selection 4" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..."
|
|
bitfld.long 0x10 11. " IC3 ,Inter-Chip transceiver enable 3" "Disabled,Enabled"
|
|
bitfld.long 0x10 8.--10. " IC_VDD3 ,Inter-Chip voltage selection 3" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..."
|
|
textline " "
|
|
bitfld.long 0x10 7. " IC2 ,Inter-Chip transceiver enable 2" "Disabled,Enabled"
|
|
bitfld.long 0x10 4.--6. " IC_VDD2 ,Inter-Chip voltage selection 2" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..."
|
|
bitfld.long 0x10 3. " IC1 ,Inter-Chip transceiver enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 0.--2. " IC_VDD1 ,Inter-Chip voltage selection 1" "No voltage,1.0 V,1.2 V,1.5 V,1.8 V,3.0 V,?..."
|
|
line.long 0x14 "ULPI_VIEWPORT,Indirect Access To The ULPI PHY Register"
|
|
bitfld.long 0x14 31. " ULPIWU ,ULPI Wakeup" "No wakeup,Wakeup"
|
|
bitfld.long 0x14 30. " ULPIRUN ,ULPI Run" "No run,Run"
|
|
bitfld.long 0x14 29. " ULPIRW ,ULPI Read/Write Control" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x14 27. " ULPISS ,ULPI Data Address" "No address,Address"
|
|
bitfld.long 0x14 24.--26. " ULPIPORT ,ULPI Port Number" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x14 16.--23. 1. " ULPIADDR ,ULPI Data Address"
|
|
textline " "
|
|
hexmask.long.byte 0x14 8.--15. 1. " ULPIDATRD ,ULPI Data Read"
|
|
hexmask.long.byte 0x14 0.--7. 1. " ULPIDATWR ,ULPI Data Write"
|
|
if (((d.l((ad:0xE0003000+0x1A8)))&0x3)==0x2)
|
|
group.long 0x178++0x07
|
|
line.long 0x00 "ENDPTNAK,Endpoint NAK Register"
|
|
bitfld.long 0x00 28. " EPTN[12] ,TX Endpoint 12 NAK" "Not received,Received"
|
|
bitfld.long 0x00 27. " EPTN[11] ,TX Endpoint 11 NAK" "Not received,Received"
|
|
bitfld.long 0x00 26. " EPTN[10] ,TX Endpoint 10 NAK" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 25. " EPTN[9] ,TX Endpoint 9 NAK" "Not received,Received"
|
|
bitfld.long 0x00 24. " EPTN[8] ,TX Endpoint 8 NAK" "Not received,Received"
|
|
bitfld.long 0x00 23. " EPTN[7] ,TX Endpoint 7 NAK" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 22. " EPTN[6] ,TX Endpoint 6 NAK" "Not received,Received"
|
|
bitfld.long 0x00 21. " EPTN[5] ,TX Endpoint 5 NAK" "Not received,Received"
|
|
bitfld.long 0x00 20. " EPTN[4] ,TX Endpoint 4 NAK" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 19. " EPTN[3] ,TX Endpoint 3 NAK" "Not received,Received"
|
|
bitfld.long 0x00 18. " EPTN[2] ,TX Endpoint 2 NAK" "Not received,Received"
|
|
bitfld.long 0x00 17. " EPTN[1] ,TX Endpoint 1 NAK" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EPTN[0] ,TX Endpoint 0 NAK" "Not received,Received"
|
|
bitfld.long 0x00 15. " EPRN[15] ,RX Endpoint 15 NAK" "Not received,Received"
|
|
bitfld.long 0x00 14. " EPRN[14] ,RX Endpoint 14 NAK" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 13. " EPRN[13] ,RX Endpoint 13 NAK" "Not received,Received"
|
|
bitfld.long 0x00 12. " EPRN[12] ,RX Endpoint 12 NAK" "Not received,Received"
|
|
bitfld.long 0x00 11. " EPRN[11] ,RX Endpoint 11 NAK" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 10. " EPRN[10] ,RX Endpoint 10 NAK" "Not received,Received"
|
|
bitfld.long 0x00 9. " EPRN[9] ,RX Endpoint 9 NAK" "Not received,Received"
|
|
bitfld.long 0x00 8. " EPRN[8] ,RX Endpoint 8 NAK" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 7. " EPRN[7] ,RX Endpoint 7 NAK" "Not received,Received"
|
|
bitfld.long 0x00 6. " EPRN[6] ,RX Endpoint 6 NAK" "Not received,Received"
|
|
bitfld.long 0x00 5. " EPRN[5] ,RX Endpoint 5 NAK" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EPRN[4] ,RX Endpoint 4 NAK" "Not received,Received"
|
|
bitfld.long 0x00 3. " EPRN[3] ,RX Endpoint 3 NAK" "Not received,Received"
|
|
bitfld.long 0x00 2. " EPRN[2] ,RX Endpoint 2 NAK" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EPRN[1] ,RX Endpoint 1 NAK" "Not received,Received"
|
|
bitfld.long 0x00 0. " EPRN[0] ,RX Endpoint 0 NAK" "Not received,Received"
|
|
line.long 0x04 "ENDPTNAKEN,Endpoint NAK Enable Register"
|
|
bitfld.long 0x04 28. " EPTNE[12] ,TX Endpoint 12 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 27. " EPTNE[11] ,TX Endpoint 11 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " EPTNE[10] ,TX Endpoint 10 NAK Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " EPTNE[9] ,TX Endpoint 9 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " EPTNE[8] ,TX Endpoint 8 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " EPTNE[7] ,TX Endpoint 7 NAK Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 22. " EPTNE[6] ,TX Endpoint 6 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " EPTNE[5] ,TX Endpoint 5 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " EPTNE[4] ,TX Endpoint 4 NAK Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " EPTNE[3] ,TX Endpoint 3 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " EPTNE[2] ,TX Endpoint 2 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " EPTNE[1] ,TX Endpoint 1 NAK Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " EPTNE[0] ,TX Endpoint 0 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " EPRNE[15] ,RX Endpoint 15 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " EPRNE[14] ,RX Endpoint 14 NAK Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " EPRNE[13] ,RX Endpoint 13 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " EPRNE[12] ,RX Endpoint 12 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " EPRNE[11] ,RX Endpoint 11 NAK Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " EPRNE[10] ,RX Endpoint 10 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " EPRNE[9] ,RX Endpoint 9 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " EPRNE[8] ,RX Endpoint 8 NAK Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " EPRNE[7] ,RX Endpoint 7 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " EPRNE[6] ,RX Endpoint 6 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " EPRNE[5] ,RX Endpoint 5 NAK Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EPRNE[4] ,RX Endpoint 4 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " EPRNE[3] ,RX Endpoint 3 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " EPRNE[2] ,RX Endpoint 2 NAK Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " EPRNE[1] ,RX Endpoint 1 NAK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " EPRNE[0] ,RX Endpoint 0 NAK Enable" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x178++0x07
|
|
hide.long 0x00 "ENDPTNAK,Endpoint NAK Register"
|
|
hide.long 0x04 "ENDPTNAKEN,Endpoint NAK Enable Register"
|
|
endif
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "PORTSC1,Port 1 Status And Control Register"
|
|
bitfld.long 0x00 30.--31. 25. " PTS ,Parallel Transceiver Select" "Reserved,Reserved,ULPI,?..."
|
|
bitfld.long 0x00 29. " STS ,Serial Transceiver Select" "Not selected,Selected"
|
|
bitfld.long 0x00 28. " PTW ,Parallel Transceiver Width" "8-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " PSPD ,Port Speed" "Full speed,Low speed,High speed,Not connected"
|
|
bitfld.long 0x00 24. " PFSC ,Port Force Full Speed Connect" "Not forced,Forced"
|
|
bitfld.long 0x00 23. " PHCD ,PHY Low Power Clock Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 22. " WKOC ,Wake on Over-current Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " WKDS ,Wake on Disconnect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " WKCN ,Wake on Connect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " PTC ,Port Test Control" "Disabled,J_ STATE,K_ STATE,SE0/NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Off,Amber,Green,?..."
|
|
bitfld.long 0x00 12. " PP ,Port Power" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,K-state,J-state,?..."
|
|
bitfld.long 0x00 9. " HSP ,High-Speed Port" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SUSP ,Suspend" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " FPR ,Force Port Resume" "No resume,Resume"
|
|
bitfld.long 0x00 5. " OCC ,Over-current Change" "No change,Change"
|
|
textline " "
|
|
bitfld.long 0x00 4. " OCA ,Over-current Active" "No over-current,Over-current"
|
|
eventfld.long 0x00 3. " PEC ,Port Enabled Change" "No change,Change"
|
|
eventfld.long 0x00 2. " PE ,Port Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 1. " CSC ,Connect Status Change" "No change,Change"
|
|
bitfld.long 0x00 0. " CCS ,Current Connect Status" "No device,Present"
|
|
group.long 0x1a4++0x03
|
|
line.long 0x00 "OTGSC,On-The-Go Status And Control Register"
|
|
bitfld.long 0x00 30. " DPIE ,Data Pulse Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " 1MSE ,1 millisecond timer Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " BSEIE ,B Session End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BSVIE ,B Session Valid Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ASVIE ,A Session Valid Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " AVVIE ,A VBus Valid Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " IDIE ,USB ID Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 22. " DPIS ,Data Pulse Interrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 21. " 1MSS ,1 millisecond timer Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 20. " BSEIS ,B Session End Interrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 19. " BSVIS ,B Session Valid Interrupt Status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 18. " ASVIS ,A Session Valid Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 17. " AVVIS ,Frame IndexThis bit is set when VBus has either risen" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 16. " IDIS ,USB ID Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " DPS ,Data Bus Pulsing Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " 1MST ,1 millisecond timer toggle" "No toggle,Toggle"
|
|
bitfld.long 0x00 12. " BSE ,B Session End" "No end,End"
|
|
bitfld.long 0x00 11. " BSV ,B Session Valid" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASV ,A Session Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 9. " AVV ,A VBus Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 8. " ID ,USB ID" "A device,B device"
|
|
textline " "
|
|
bitfld.long 0x00 7. " HABA ,Hardware Assist B-Disconnect to A-connect" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " HADP ,Hardware Assist Data-Pulse" "Not started,Started"
|
|
bitfld.long 0x00 5. " IDPU ,ID Pullup" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DP ,Data Pulsing" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " OT ,OTG Termination" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " HAAR ,Hardware Assist Auto-Reset" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " VC ,VBUS Charge" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " VD ,VBUS Discharge" "Disabled,Enabled"
|
|
if (((d.l((ad:0xE0003000+0x1A8)))&0x3)==0x3)
|
|
group.long 0x1a8++0x03
|
|
line.long 0x00 "USBMODE,USB Mode Selection Register"
|
|
bitfld.long 0x00 15. " SRT ,Shorten Reset Time" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VBPS ,Vbus Power Select" "Low,High"
|
|
bitfld.long 0x00 4. " SDIS ,Stream Disable Mode" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SLOM ,Setup Lockout Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ES ,Endian Select" "Little,Big"
|
|
bitfld.long 0x00 0.--1. " CM ,Controller Mode" "Idle,Reserved,Device,Host"
|
|
elif (((d.l((ad:0xE0003000+0x1A8)))&0x3)==0x2)
|
|
group.long 0x1a8++0x03
|
|
line.long 0x00 "USBMODE,USB Mode Selection Register"
|
|
bitfld.long 0x00 15. " SRT ,Shorten Reset Time" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SDIS ,Stream Disable Mode" "Inactive,Active"
|
|
bitfld.long 0x00 3. " SLOM ,Setup Lockout Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ES ,Endian Select" "Little,Big"
|
|
bitfld.long 0x00 0.--1. " CM ,Controller Mode" "Idle,Reserved,Device,Host"
|
|
else
|
|
group.long 0x1a8++0x03
|
|
line.long 0x00 "USBMODE,USB Mode Selection Register"
|
|
bitfld.long 0x00 15. " SRT ,Shorten Reset Time" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SLOM ,Setup Lockout Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ES ,Endian Select" "Little,Big"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " CM ,Controller Mode" "Idle,Reserved,Device,Host"
|
|
endif
|
|
width 22.
|
|
if (((d.l((ad:0xE0003000+0x1A8)))&0x3)==0x2)
|
|
group.long 0x1ac++0x0b
|
|
line.long 0x00 "ENDPTSETUPSTAT,Setup Endpoint Status Register"
|
|
eventfld.long 0x00 12. " ENDPTSETUPSTAT[12] ,Setup Endpoint 12 Status" "Not received,Received"
|
|
eventfld.long 0x00 11. " ENDPTSETUPSTAT[11] ,Setup Endpoint 11 Status" "Not received,Received"
|
|
eventfld.long 0x00 10. " ENDPTSETUPSTAT[10] ,Setup Endpoint 10 Status" "Not received,Received"
|
|
textline " "
|
|
eventfld.long 0x00 9. " ENDPTSETUPSTAT[9] ,Setup Endpoint 9 Status" "Not received,Received"
|
|
eventfld.long 0x00 8. " ENDPTSETUPSTAT[8] ,Setup Endpoint 8 Status" "Not received,Received"
|
|
eventfld.long 0x00 7. " ENDPTSETUPSTAT[7] ,Setup Endpoint 7 Status" "Not received,Received"
|
|
textline " "
|
|
eventfld.long 0x00 6. " ENDPTSETUPSTAT[6] ,Setup Endpoint 6 Status" "Not received,Received"
|
|
eventfld.long 0x00 5. " ENDPTSETUPSTAT[5] ,Setup Endpoint 5 Status" "Not received,Received"
|
|
eventfld.long 0x00 4. " ENDPTSETUPSTAT[4] ,Setup Endpoint 4 Status" "Not received,Received"
|
|
textline " "
|
|
eventfld.long 0x00 3. " ENDPTSETUPSTAT[3] ,Setup Endpoint 3 Status" "Not received,Received"
|
|
eventfld.long 0x00 2. " ENDPTSETUPSTAT[2] ,Setup Endpoint 2 Status" "Not received,Received"
|
|
eventfld.long 0x00 1. " ENDPTSETUPSTAT[1] ,Setup Endpoint 1 Status" "Not received,Received"
|
|
textline " "
|
|
eventfld.long 0x00 0. " ENDPTSETUPSTAT[0] ,Setup Endpoint 0 Status" "Not received,Received"
|
|
width 22.
|
|
line.long 0x04 "ENDPTPRIME,Endpoint Prime Register"
|
|
eventfld.long 0x04 28. " PETB[12] ,Prime Endpoint 12 Transmit Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 27. " PETB[11] ,Prime Endpoint 11 Transmit Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 26. " PETB[10] ,Prime Endpoint 10 Transmit Buffer" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x04 25. " PETB[9] ,Prime Endpoint 9 Transmit Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 24. " PETB[8] ,Prime Endpoint 8 Transmit Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 23. " PETB[7] ,Prime Endpoint 7 Transmit Buffer" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x04 22. " PETB[6] ,Prime Endpoint 6 Transmit Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 21. " PETB[5] ,Prime Endpoint 5 Transmit Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 20. " PETB[4] ,Prime Endpoint 4 Transmit Buffer" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x04 19. " PETB[3] ,Prime Endpoint 3 Transmit Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 18. " PETB[2] ,Prime Endpoint 2 Transmit Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 17. " PETB[1] ,Prime Endpoint 1 Transmit Buffer" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x04 16. " PETB[0] ,Prime Endpoint 0 Transmit Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 12. " PERB[12] ,Prime Endpoint 12 Receive Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 11. " PERB[11] ,Prime Endpoint 11 Receive Buffer" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x04 10. " PERB[10] ,Prime Endpoint 10 Receive Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 9. " PERB[9] ,Prime Endpoint 9 Receive Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 8. " PERB[8] ,Prime Endpoint 8 Receive Buffer" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x04 7. " PERB[7] ,Prime Endpoint 7 Receive Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 6. " PERB[6] ,Prime Endpoint 6 Receive Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 5. " PERB[5] ,Prime Endpoint 5 Receive Buffer" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x04 4. " PERB[4] ,Prime Endpoint 4 Receive Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 3. " PERB[3] ,Prime Endpoint 3 Receive Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 2. " PERB[2] ,Prime Endpoint 2 Receive Buffer" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x04 1. " PERB[1] ,Prime Endpoint 1 Receive Buffer" "Not requested,Requested"
|
|
eventfld.long 0x04 0. " PERB[0] ,Prime Endpoint 0 Receive Buffer" "Not requested,Requested"
|
|
line.long 0x08 "ENDPTFLUSH,Endpoint Flush Register"
|
|
eventfld.long 0x08 28. " FETB[12] ,Flush Endpoint 12 Transmit Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 27. " FETB[11] ,Flush Endpoint 11 Transmit Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 26. " FETB[10] ,Flush Endpoint 10 Transmit Buffer" "No flush,Flush"
|
|
textline " "
|
|
eventfld.long 0x08 25. " FETB[9] ,Flush Endpoint 9 Transmit Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 24. " FETB[8] ,Flush Endpoint 8 Transmit Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 23. " FETB[7] ,Flush Endpoint 7 Transmit Buffer" "No flush,Flush"
|
|
textline " "
|
|
eventfld.long 0x08 22. " FETB[6] ,Flush Endpoint 6 Transmit Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 21. " FETB[5] ,Flush Endpoint 5 Transmit Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 20. " FETB[4] ,Flush Endpoint 4 Transmit Buffer" "No flush,Flush"
|
|
textline " "
|
|
eventfld.long 0x08 19. " FETB[3] ,Flush Endpoint 3 Transmit Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 18. " FETB[2] ,Flush Endpoint 2 Transmit Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 17. " FETB[1] ,Flush Endpoint 1 Transmit Buffer" "No flush,Flush"
|
|
textline " "
|
|
eventfld.long 0x08 16. " FETB[0] ,Flush Endpoint 0 Transmit Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 12. " FERB[12] ,Flush Endpoint 12 Receive Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 11. " FERB[11] ,Flush Endpoint 11 Receive Buffer" "No flush,Flush"
|
|
textline " "
|
|
eventfld.long 0x08 10. " FERB[10] ,Flush Endpoint 10 Receive Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 9. " FERB[9] ,Flush Endpoint 9 Receive Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 8. " FERB[8] ,Flush Endpoint 8 Receive Buffer" "No flush,Flush"
|
|
textline " "
|
|
eventfld.long 0x08 7. " FERB[7] ,Flush Endpoint 7 Receive Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 6. " FERB[6] ,Flush Endpoint 6 Receive Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 5. " FERB[5] ,Flush Endpoint 5 Receive Buffer" "No flush,Flush"
|
|
textline " "
|
|
eventfld.long 0x08 4. " FERB[4] ,Flush Endpoint 4 Receive Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 3. " FERB[3] ,Flush Endpoint 3 Receive Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 2. " FERB[2] ,Flush Endpoint 2 Receive Buffer" "No flush,Flush"
|
|
textline " "
|
|
eventfld.long 0x08 1. " FERB[1] ,Flush Endpoint 1 Receive Buffer" "No flush,Flush"
|
|
eventfld.long 0x08 0. " FERB[0] ,Flush Endpoint 0 Receive Buffer" "No flush,Flush"
|
|
rgroup.long 0x1b8++0x07
|
|
line.long 0x00 "ENDPTSTAT,Endpoint Status Register"
|
|
bitfld.long 0x00 28. " ETBR[12] ,Endpoint 12 Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 27. " ETBR[11] ,Endpoint 11 Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 26. " ETBR[10] ,Endpoint 10 Transmit Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ETBR[9] ,Endpoint 9 Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 24. " ETBR[8] ,Endpoint 8 Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 23. " ETBR[7] ,Endpoint 7 Transmit Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ETBR[6] ,Endpoint 6 Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 21. " ETBR[5] ,Endpoint 5 Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 20. " ETBR[4] ,Endpoint 4 Transmit Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ETBR[3] ,Endpoint 3 Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 18. " ETBR[2] ,Endpoint 2 Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 17. " ETBR[1] ,Endpoint 1 Transmit Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ETBR[0] ,Endpoint 0 Transmit Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 12. " ERBR[12] ,Endpoint 12 Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 11. " ERBR[11] ,Endpoint 11 Receive Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ERBR[10] ,Endpoint 10 Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 9. " ERBR[9] ,Endpoint 9 Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 8. " ERBR[8] ,Endpoint 8 Receive Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ERBR[7] ,Endpoint 7 Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 6. " ERBR[6] ,Endpoint 6 Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 5. " ERBR[5] ,Endpoint 5 Receive Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ERBR[4] ,Endpoint 4 Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 3. " ERBR[3] ,Endpoint 3 Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 2. " ERBR[2] ,Endpoint 2 Receive Buffer Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ERBR[1] ,Endpoint 1 Receive Buffer Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 0. " ERBR[0] ,Endpoint 0 Receive Buffer Ready" "Not ready,Ready"
|
|
line.long 0x04 "ENDPTCOMPLETE,Endpoint Complete Register"
|
|
bitfld.long 0x04 28. " ETCE[12] ,Endpoint 12 Transmit Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 27. " ETCE[11] ,Endpoint 11 Transmit Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 26. " ETCE[10] ,Endpoint 10 Transmit Complete Event" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ETCE[9] ,Endpoint 9 Transmit Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 24. " ETCE[8] ,Endpoint 8 Transmit Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 23. " ETCE[7] ,Endpoint 7 Transmit Complete Event" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x04 22. " ETCE[6] ,Endpoint 6 Transmit Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 21. " ETCE[5] ,Endpoint 5 Transmit Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 20. " ETCE[4] ,Endpoint 4 Transmit Complete Event" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ETCE[3] ,Endpoint 3 Transmit Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 18. " ETCE[2] ,Endpoint 2 Transmit Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 17. " ETCE[1] ,Endpoint 1 Transmit Complete Event" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x04 16. " ETCE[0] ,Endpoint 0 Transmit Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 12. " ERCE[12] ,Endpoint 12 Receive Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 11. " ERCE[11] ,Endpoint 11 Receive Complete Event" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x04 10. " ERCE[10] ,Endpoint 10 Receive Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 9. " ERCE[9] ,Endpoint 9 Receive Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 8. " ERCE[8] ,Endpoint 8 Receive Complete Event" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ERCE[7] ,Endpoint 7 Receive Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 6. " ERCE[6] ,Endpoint 6 Receive Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 5. " ERCE[5] ,Endpoint 5 Receive Complete Event" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x04 4. " ERCE[4] ,Endpoint 4 Receive Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 3. " ERCE[3] ,Endpoint 3 Receive Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 2. " ERCE[2] ,Endpoint 2 Receive Complete Event" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ERCE[1] ,Endpoint 1 Receive Complete Event" "Not completed,Completed"
|
|
bitfld.long 0x04 0. " ERCE[0] ,Endpoint 0 Receive Complete Event" "Not completed,Completed"
|
|
group.long 0x1c0++0x37
|
|
line.long 0x00 "ENDPTCTRL0,Endpoint 0 Control Register"
|
|
bitfld.long 0x00 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18.--19. " TXT ,TX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x00 16. " TXS ,TX Endpoint Stall" "OK,Stalled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--3. " RXT ,RX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x00 0. " RXS ,RX Endpoint Stall" "OK,Stalled"
|
|
line.long 0x4 "ENDPTCTRL1,Endpoint 1 Control Register"
|
|
bitfld.long 0x4 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 22. " TXR ,TX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x4 21. " TXI ,TX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x4 17. " TXD ,TX Endpoint Data" "Dual Port,?..."
|
|
bitfld.long 0x4 16. " TXS ,TX Endpoint Stall" "OK,Stalled"
|
|
textline " "
|
|
bitfld.long 0x4 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 6. " RXR ,RX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x4 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 2.--3. " RXT ,RX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x4 1. " RXD ,RX Endpoint Data Sink" "Dual Port,?..."
|
|
bitfld.long 0x4 0. " RXS ,RX Endpoint Stall" "OK,Stalled"
|
|
line.long 0x8 "ENDPTCTRL2,Endpoint 2 Control Register"
|
|
bitfld.long 0x8 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 22. " TXR ,TX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x8 21. " TXI ,TX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x8 17. " TXD ,TX Endpoint Data" "Dual Port,?..."
|
|
bitfld.long 0x8 16. " TXS ,TX Endpoint Stall" "OK,Stalled"
|
|
textline " "
|
|
bitfld.long 0x8 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 6. " RXR ,RX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x8 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 2.--3. " RXT ,RX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x8 1. " RXD ,RX Endpoint Data Sink" "Dual Port,?..."
|
|
bitfld.long 0x8 0. " RXS ,RX Endpoint Stall" "OK,Stalled"
|
|
line.long 0xC "ENDPTCTRL3,Endpoint 3 Control Register"
|
|
bitfld.long 0xC 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 22. " TXR ,TX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0xC 21. " TXI ,TX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0xC 17. " TXD ,TX Endpoint Data" "Dual Port,?..."
|
|
bitfld.long 0xC 16. " TXS ,TX Endpoint Stall" "OK,Stalled"
|
|
textline " "
|
|
bitfld.long 0xC 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 6. " RXR ,RX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0xC 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 2.--3. " RXT ,RX Endpoint Type" "Control,?..."
|
|
bitfld.long 0xC 1. " RXD ,RX Endpoint Data Sink" "Dual Port,?..."
|
|
bitfld.long 0xC 0. " RXS ,RX Endpoint Stall" "OK,Stalled"
|
|
line.long 0x10 "ENDPTCTRL4,Endpoint 4 Control Register"
|
|
bitfld.long 0x10 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 22. " TXR ,TX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x10 21. " TXI ,TX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x10 17. " TXD ,TX Endpoint Data" "Dual Port,?..."
|
|
bitfld.long 0x10 16. " TXS ,TX Endpoint Stall" "OK,Stalled"
|
|
textline " "
|
|
bitfld.long 0x10 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 6. " RXR ,RX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x10 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 2.--3. " RXT ,RX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x10 1. " RXD ,RX Endpoint Data Sink" "Dual Port,?..."
|
|
bitfld.long 0x10 0. " RXS ,RX Endpoint Stall" "OK,Stalled"
|
|
line.long 0x14 "ENDPTCTRL5,Endpoint 5 Control Register"
|
|
bitfld.long 0x14 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 22. " TXR ,TX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x14 21. " TXI ,TX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x14 17. " TXD ,TX Endpoint Data" "Dual Port,?..."
|
|
bitfld.long 0x14 16. " TXS ,TX Endpoint Stall" "OK,Stalled"
|
|
textline " "
|
|
bitfld.long 0x14 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 6. " RXR ,RX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x14 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 2.--3. " RXT ,RX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x14 1. " RXD ,RX Endpoint Data Sink" "Dual Port,?..."
|
|
bitfld.long 0x14 0. " RXS ,RX Endpoint Stall" "OK,Stalled"
|
|
line.long 0x18 "ENDPTCTRL6,Endpoint 6 Control Register"
|
|
bitfld.long 0x18 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 22. " TXR ,TX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x18 21. " TXI ,TX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x18 17. " TXD ,TX Endpoint Data" "Dual Port,?..."
|
|
bitfld.long 0x18 16. " TXS ,TX Endpoint Stall" "OK,Stalled"
|
|
textline " "
|
|
bitfld.long 0x18 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 6. " RXR ,RX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x18 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 2.--3. " RXT ,RX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x18 1. " RXD ,RX Endpoint Data Sink" "Dual Port,?..."
|
|
bitfld.long 0x18 0. " RXS ,RX Endpoint Stall" "OK,Stalled"
|
|
line.long 0x1C "ENDPTCTRL7,Endpoint 7 Control Register"
|
|
bitfld.long 0x1C 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 22. " TXR ,TX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x1C 21. " TXI ,TX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x1C 17. " TXD ,TX Endpoint Data" "Dual Port,?..."
|
|
bitfld.long 0x1C 16. " TXS ,TX Endpoint Stall" "OK,Stalled"
|
|
textline " "
|
|
bitfld.long 0x1C 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 6. " RXR ,RX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x1C 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 2.--3. " RXT ,RX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x1C 1. " RXD ,RX Endpoint Data Sink" "Dual Port,?..."
|
|
bitfld.long 0x1C 0. " RXS ,RX Endpoint Stall" "OK,Stalled"
|
|
line.long 0x20 "ENDPTCTRL8,Endpoint 8 Control Register"
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bitfld.long 0x20 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
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bitfld.long 0x20 22. " TXR ,TX Data Toggle Reset" "No toggle,Toggle"
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bitfld.long 0x20 21. " TXI ,TX Data Toggle Inhibit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x20 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
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bitfld.long 0x20 17. " TXD ,TX Endpoint Data" "Dual Port,?..."
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bitfld.long 0x20 16. " TXS ,TX Endpoint Stall" "OK,Stalled"
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textline " "
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bitfld.long 0x20 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
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bitfld.long 0x20 6. " RXR ,RX Data Toggle Reset" "No toggle,Toggle"
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bitfld.long 0x20 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x20 2.--3. " RXT ,RX Endpoint Type" "Control,?..."
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bitfld.long 0x20 1. " RXD ,RX Endpoint Data Sink" "Dual Port,?..."
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bitfld.long 0x20 0. " RXS ,RX Endpoint Stall" "OK,Stalled"
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line.long 0x24 "ENDPTCTRL9,Endpoint 9 Control Register"
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bitfld.long 0x24 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
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bitfld.long 0x24 22. " TXR ,TX Data Toggle Reset" "No toggle,Toggle"
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bitfld.long 0x24 21. " TXI ,TX Data Toggle Inhibit" "Disabled,Enabled"
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|
textline " "
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bitfld.long 0x24 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
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bitfld.long 0x24 17. " TXD ,TX Endpoint Data" "Dual Port,?..."
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bitfld.long 0x24 16. " TXS ,TX Endpoint Stall" "OK,Stalled"
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|
textline " "
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bitfld.long 0x24 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
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bitfld.long 0x24 6. " RXR ,RX Data Toggle Reset" "No toggle,Toggle"
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bitfld.long 0x24 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x24 2.--3. " RXT ,RX Endpoint Type" "Control,?..."
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bitfld.long 0x24 1. " RXD ,RX Endpoint Data Sink" "Dual Port,?..."
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bitfld.long 0x24 0. " RXS ,RX Endpoint Stall" "OK,Stalled"
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line.long 0x28 "ENDPTCTRL10,Endpoint 10 Control Register"
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bitfld.long 0x28 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 22. " TXR ,TX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x28 21. " TXI ,TX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
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|
bitfld.long 0x28 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
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|
bitfld.long 0x28 17. " TXD ,TX Endpoint Data" "Dual Port,?..."
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|
bitfld.long 0x28 16. " TXS ,TX Endpoint Stall" "OK,Stalled"
|
|
textline " "
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bitfld.long 0x28 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 6. " RXR ,RX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x28 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x28 2.--3. " RXT ,RX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x28 1. " RXD ,RX Endpoint Data Sink" "Dual Port,?..."
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bitfld.long 0x28 0. " RXS ,RX Endpoint Stall" "OK,Stalled"
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line.long 0x2C "ENDPTCTRL11,Endpoint 11 Control Register"
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bitfld.long 0x2C 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 22. " TXR ,TX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x2C 21. " TXI ,TX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2C 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x2C 17. " TXD ,TX Endpoint Data" "Dual Port,?..."
|
|
bitfld.long 0x2C 16. " TXS ,TX Endpoint Stall" "OK,Stalled"
|
|
textline " "
|
|
bitfld.long 0x2C 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 6. " RXR ,RX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x2C 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2C 2.--3. " RXT ,RX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x2C 1. " RXD ,RX Endpoint Data Sink" "Dual Port,?..."
|
|
bitfld.long 0x2C 0. " RXS ,RX Endpoint Stall" "OK,Stalled"
|
|
line.long 0x30 "ENDPTCTRL12,Endpoint 12 Control Register"
|
|
bitfld.long 0x30 23. " TXE ,TX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 22. " TXR ,TX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x30 21. " TXI ,TX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x30 18.--19. " TXT ,TX Endpoint Type" "Control,Isochronous,Bulk,Interrupt"
|
|
bitfld.long 0x30 17. " TXD ,TX Endpoint Data" "Dual Port,?..."
|
|
bitfld.long 0x30 16. " TXS ,TX Endpoint Stall" "OK,Stalled"
|
|
textline " "
|
|
bitfld.long 0x30 7. " RXE ,RX Endpoint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 6. " RXR ,RX Data Toggle Reset" "No toggle,Toggle"
|
|
bitfld.long 0x30 5. " RXI ,RX Data Toggle Inhibit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x30 2.--3. " RXT ,RX Endpoint Type" "Control,?..."
|
|
bitfld.long 0x30 1. " RXD ,RX Endpoint Data Sink" "Dual Port,?..."
|
|
bitfld.long 0x30 0. " RXS ,RX Endpoint Stall" "OK,Stalled"
|
|
else
|
|
hgroup.long 0x1ac++0x47
|
|
hide.long 0x00 "ENDPTSETUPSTAT,Setup Endpoint Status Register"
|
|
hide.long 0x04 "ENDPTPRIME,Endpoint Prime Register"
|
|
hide.long 0x08 "ENDPTFLUSH,Endpoint Flush Register"
|
|
hide.long 0x0c "ENDPTSTAT,Endpoint Status Register"
|
|
hide.long 0x10 "ENDPTCOMPLETE,Endpoint Complete Register"
|
|
hide.long 0x14 "ENDPTCTRL0,Endpoint 0 Control Register"
|
|
hide.long 0x18 "ENDPTCTRL1,Endpoint 1 Control Register"
|
|
hide.long 0x1C "ENDPTCTRL2,Endpoint 2 Control Register"
|
|
hide.long 0x20 "ENDPTCTRL3,Endpoint 3 Control Register"
|
|
hide.long 0x24 "ENDPTCTRL4,Endpoint 4 Control Register"
|
|
hide.long 0x28 "ENDPTCTRL5,Endpoint 5 Control Register"
|
|
hide.long 0x2C "ENDPTCTRL6,Endpoint 6 Control Register"
|
|
hide.long 0x30 "ENDPTCTRL7,Endpoint 7 Control Register"
|
|
hide.long 0x34 "ENDPTCTRL8,Endpoint 8 Control Register"
|
|
hide.long 0x38 "ENDPTCTRL9,Endpoint 9 Control Register"
|
|
hide.long 0x3C "ENDPTCTRL10,Endpoint 10 Control Register"
|
|
hide.long 0x40 "ENDPTCTRL11,Endpoint 11 Control Register"
|
|
hide.long 0x44 "ENDPTCTRL12,Endpoint 12 Control Register"
|
|
endif
|
|
width 12.
|
|
tree.end
|
|
tree.end
|
|
textline ""
|